TW429602B - Structure of high voltage device and the fabricating method - Google Patents

Structure of high voltage device and the fabricating method

Info

Publication number
TW429602B
TW429602B TW88122235A TW88122235A TW429602B TW 429602 B TW429602 B TW 429602B TW 88122235 A TW88122235 A TW 88122235A TW 88122235 A TW88122235 A TW 88122235A TW 429602 B TW429602 B TW 429602B
Authority
TW
Taiwan
Prior art keywords
well region
conduction type
region
trench isolation
shallow trench
Prior art date
Application number
TW88122235A
Other languages
Chinese (zh)
Inventor
Sheng-Shiung Yang
Original Assignee
United Microelectronics Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by United Microelectronics Corp filed Critical United Microelectronics Corp
Priority to TW88122235A priority Critical patent/TW429602B/en
Application granted granted Critical
Publication of TW429602B publication Critical patent/TW429602B/en

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  • Metal-Oxide And Bipolar Metal-Oxide Semiconductor Integrated Circuits (AREA)

Abstract

This invention is about a high voltage device structure. The structure includes the second conduction type silicon epitaxy layer that is located on the first conduction type substrate and has a recessed structure. The first well region of the second conduction type is located on the recess side of the silicon epitaxy layer. The second well region of the first conduction type is located on the other side of the recess of silicon epitaxy layer. The third well region of the second conduction type is located in the first well region. Shallow trench isolation is located in the second well region and the fourth well region of the second conduction type is located in the second well region that is under the shallow trench isolation. Gate is located in the recess on top of substrate and covers part of the first well region, the third well region and the shallow trench isolation. Source region of the first conduction type is located in the third well region of the gate side. Drain region of the first conduction type is located in the second well region of the shallow trench isolation that is not covered by gate. Doped region of the second conduction type is located in the silicon epitaxy layer and substrate under the source region.
TW88122235A 1999-12-17 1999-12-17 Structure of high voltage device and the fabricating method TW429602B (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW88122235A TW429602B (en) 1999-12-17 1999-12-17 Structure of high voltage device and the fabricating method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW88122235A TW429602B (en) 1999-12-17 1999-12-17 Structure of high voltage device and the fabricating method

Publications (1)

Publication Number Publication Date
TW429602B true TW429602B (en) 2001-04-11

Family

ID=21643444

Family Applications (1)

Application Number Title Priority Date Filing Date
TW88122235A TW429602B (en) 1999-12-17 1999-12-17 Structure of high voltage device and the fabricating method

Country Status (1)

Country Link
TW (1) TW429602B (en)

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