TW359830B - Apparatus for saving power consumption in semiconductor memory devices - Google Patents

Apparatus for saving power consumption in semiconductor memory devices

Info

Publication number
TW359830B
TW359830B TW086117088A TW86117088A TW359830B TW 359830 B TW359830 B TW 359830B TW 086117088 A TW086117088 A TW 086117088A TW 86117088 A TW86117088 A TW 86117088A TW 359830 B TW359830 B TW 359830B
Authority
TW
Taiwan
Prior art keywords
power consumption
latch
semiconductor memory
memory devices
saving power
Prior art date
Application number
TW086117088A
Other languages
English (en)
Inventor
Kee-Woo Park
Jong-Woo Kim
Original Assignee
Hyundai Electronics Ind
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hyundai Electronics Ind filed Critical Hyundai Electronics Ind
Application granted granted Critical
Publication of TW359830B publication Critical patent/TW359830B/zh

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G11C7/1093—Input synchronization
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C11/00—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401—Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/4063—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing
    • G11C11/407—Auxiliary circuits, e.g. for addressing, decoding, driving, writing, sensing or timing for memory cells of the field-effect type
    • G11C11/4076—Timing circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/10—Input/output [I/O] data interface arrangements, e.g. I/O data control circuits, I/O data buffers
    • G11C7/1078—Data input circuits, e.g. write amplifiers, data input buffers, data input registers, data input level conversion circuits
    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C7/00—Arrangements for writing information into, or reading information out from, a digital store
    • G11C7/22—Read-write [R-W] timing or clocking circuits; Read-write [R-W] control signal generators or management 

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Dram (AREA)
TW086117088A 1996-12-31 1997-11-15 Apparatus for saving power consumption in semiconductor memory devices TW359830B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1019960080217A KR100231605B1 (ko) 1996-12-31 1996-12-31 반도체 메모리 소자의 전력소모 방지 장치

Publications (1)

Publication Number Publication Date
TW359830B true TW359830B (en) 1999-06-01

Family

ID=19493472

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086117088A TW359830B (en) 1996-12-31 1997-11-15 Apparatus for saving power consumption in semiconductor memory devices

Country Status (3)

Country Link
US (1) US5926435A (zh)
KR (1) KR100231605B1 (zh)
TW (1) TW359830B (zh)

Families Citing this family (42)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100269313B1 (ko) * 1997-11-07 2000-12-01 윤종용 대기시전류소모가적은반도체메모리장치
US6219742B1 (en) * 1998-04-29 2001-04-17 Compaq Computer Corporation Method and apparatus for artificially generating general purpose events in an ACPI environment
JP2002245778A (ja) * 2001-02-16 2002-08-30 Fujitsu Ltd 半導体装置
KR100400313B1 (ko) * 2001-06-20 2003-10-01 주식회사 하이닉스반도체 반도체 메모리 장치의 데이터 입출력 회로
US6667929B1 (en) 2002-06-14 2003-12-23 International Business Machines Corporation Power governor for dynamic RAM
US7167401B2 (en) * 2005-02-10 2007-01-23 Micron Technology, Inc. Low power chip select (CS) latency option
US8081474B1 (en) 2007-12-18 2011-12-20 Google Inc. Embossed heat spreader
US8090897B2 (en) 2006-07-31 2012-01-03 Google Inc. System and method for simulating an aspect of a memory circuit
US7392338B2 (en) 2006-07-31 2008-06-24 Metaram, Inc. Interface circuit system and method for autonomously performing power management operations in conjunction with a plurality of memory circuits
US8359187B2 (en) 2005-06-24 2013-01-22 Google Inc. Simulating a different number of memory circuit devices
US8386722B1 (en) 2008-06-23 2013-02-26 Google Inc. Stacked DIMM memory interface
US8244971B2 (en) 2006-07-31 2012-08-14 Google Inc. Memory circuit system and method
US7580312B2 (en) 2006-07-31 2009-08-25 Metaram, Inc. Power saving system and method for use with a plurality of memory circuits
US7386656B2 (en) 2006-07-31 2008-06-10 Metaram, Inc. Interface circuit system and method for performing power management operations in conjunction with only a portion of a memory circuit
US8438328B2 (en) 2008-02-21 2013-05-07 Google Inc. Emulation of abstracted DIMMs using abstracted DRAMs
US8397013B1 (en) 2006-10-05 2013-03-12 Google Inc. Hybrid memory module
US8077535B2 (en) 2006-07-31 2011-12-13 Google Inc. Memory refresh apparatus and method
US9542352B2 (en) 2006-02-09 2017-01-10 Google Inc. System and method for reducing command scheduling constraints of memory circuits
US8055833B2 (en) 2006-10-05 2011-11-08 Google Inc. System and method for increasing capacity, performance, and flexibility of flash storage
US7472220B2 (en) 2006-07-31 2008-12-30 Metaram, Inc. Interface circuit system and method for performing power management operations utilizing power management signals
US7590796B2 (en) 2006-07-31 2009-09-15 Metaram, Inc. System and method for power management in memory systems
US20080028136A1 (en) 2006-07-31 2008-01-31 Schakel Keith R Method and apparatus for refresh management of memory modules
GB2441726B (en) 2005-06-24 2010-08-11 Metaram Inc An integrated memory core and memory interface circuit
US8327104B2 (en) 2006-07-31 2012-12-04 Google Inc. Adjusting the timing of signals associated with a memory system
US8089795B2 (en) 2006-02-09 2012-01-03 Google Inc. Memory module with memory stack and interface with enhanced capabilities
US7609567B2 (en) 2005-06-24 2009-10-27 Metaram, Inc. System and method for simulating an aspect of a memory circuit
US9507739B2 (en) 2005-06-24 2016-11-29 Google Inc. Configurable memory circuit system and method
US8041881B2 (en) 2006-07-31 2011-10-18 Google Inc. Memory device with emulated characteristics
US20080082763A1 (en) 2006-10-02 2008-04-03 Metaram, Inc. Apparatus and method for power management of memory circuits by a system or component thereof
US8111566B1 (en) 2007-11-16 2012-02-07 Google, Inc. Optimal channel design for memory devices for providing a high-speed memory interface
US8060774B2 (en) 2005-06-24 2011-11-15 Google Inc. Memory systems and memory modules
US8335894B1 (en) 2008-07-25 2012-12-18 Google Inc. Configurable memory system with interface circuit
US10013371B2 (en) 2005-06-24 2018-07-03 Google Llc Configurable memory circuit system and method
US8796830B1 (en) 2006-09-01 2014-08-05 Google Inc. Stackable low-profile lead frame package
US8130560B1 (en) 2006-11-13 2012-03-06 Google Inc. Multi-rank partial width memory modules
JP5242397B2 (ja) * 2005-09-02 2013-07-24 メタラム インコーポレイテッド Ｄｒａｍをスタックする方法及び装置
US9632929B2 (en) 2006-02-09 2017-04-25 Google Inc. Translating an address associated with a command communicated between a system and memory circuits
US7724589B2 (en) 2006-07-31 2010-05-25 Google Inc. System and method for delaying a signal communicated from a system to at least one of a plurality of memory circuits
US8209479B2 (en) 2007-07-18 2012-06-26 Google Inc. Memory circuit system and method
US8080874B1 (en) 2007-09-14 2011-12-20 Google Inc. Providing additional space between an integrated circuit and a circuit board for positioning a component therebetween
WO2010144624A1 (en) 2009-06-09 2010-12-16 Google Inc. Programming of dimm termination resistance values
EP4170659A4 (en) 2021-09-10 2023-08-16 Changxin Memory Technologies, Inc. SIGNAL SHIELD CIRCUIT AND SEMICONDUCTOR MEMORY

Family Cites Families (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2585602B2 (ja) * 1987-06-10 1997-02-26 株式会社日立製作所 半導体記憶装置
JPH03230395A (ja) * 1990-02-02 1991-10-14 Hitachi Ltd スタティック型ｒａｍ
US5379261A (en) * 1993-03-26 1995-01-03 United Memories, Inc. Method and circuit for improved timing and noise margin in a DRAM
US5745429A (en) * 1995-08-28 1998-04-28 Micron Technology, Inc. Memory having and method for providing a reduced access time
US5537353A (en) * 1995-08-31 1996-07-16 Cirrus Logic, Inc. Low pin count-wide memory devices and systems and methods using the same
KR100209364B1 (ko) * 1995-10-27 1999-07-15 김영환 메모리장치

Also Published As

Publication number Publication date
US5926435A (en) 1999-07-20
KR100231605B1 (ko) 1999-11-15
KR19980060850A (ko) 1998-10-07

Similar Documents

Publication Publication Date Title
TW359830B (en) Apparatus for saving power consumption in semiconductor memory devices
JPS6447126A (en) Programming circuit for programmable logic array i/o cell
MY118314A (en) Semiconductor integrated circuit
HK1048871B (zh) 電腦的可重構邏輯
TW344133B (en) Semiconductor memory
TW330257B (en) The apparatus for semiconductor IC and memory, and its control circuit
KR880002184A (ko) 테스트 회로를 갖는 반도체 장치
GB8501143D0 (en) Integrated circuits
TW334565B (en) Semiconductor memory device
GB0219973D0 (en) An improved high density memory cell
TW430806B (en) Memory device having row decoder
KR910003898A (ko) 전원용 모놀리식집적회로
TW347612B (en) Counter and semiconductor memory including the counter
GB2315347B (en) Testing integrated circuits
EP0766251A3 (en) Semiconducteur memory device having extended margin in latching input signal
KR950001772A (ko) 반도체 기억장치
EP0574026A3 (en) Semiconductor integrated logic circuit with a test mode
KR950012706A (ko) 반도체 메모리 장치
GB2261089B (en) Data output control circuit
WO1999005789A3 (en) Voltage tolerant bus hold latch
TW364112B (en) Semiconductor memory having redundancy circuit
JPS6489098A (en) Semiconductor memory device
JPS64806A (en) Power amplifier circuit device
EP0350219A3 (en) Cmos latch circuit
JPS6467794A (en) Semiconductor integrated circuit

Legal Events

Date Code Title Description
MM4A Annulment or lapse of patent due to non-payment of fees