TW344118B - Etch process for single crystal silicon - Google Patents

Etch process for single crystal silicon

Info

Publication number
TW344118B
TW344118B TW086109337A TW86109337A TW344118B TW 344118 B TW344118 B TW 344118B TW 086109337 A TW086109337 A TW 086109337A TW 86109337 A TW86109337 A TW 86109337A TW 344118 B TW344118 B TW 344118B
Authority
TW
Taiwan
Prior art keywords
single crystal
crystal silicon
etch process
plasma
process gas
Prior art date
Application number
TW086109337A
Other languages
Chinese (zh)
Inventor
Zhao Ganming
Ko Terry
D Chinn Jeffrey
Original Assignee
Applied Materials Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Applied Materials Inc filed Critical Applied Materials Inc
Application granted granted Critical
Publication of TW344118B publication Critical patent/TW344118B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/3065—Plasma etching; Reactive-ion etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Drying Of Semiconductors (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Element Separation (AREA)
  • Plasma & Fusion (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)

Abstract

A process for etching a single crystal silicon, the process comprising the steps of: (a) introducing into an etch region a process gas comprising HBr, Cl2, and oxygen ; (b) generating a first plasma of the first process gas in the chamber; and (c) contacting a single crystal silicon with the plasma.
TW086109337A 1996-07-16 1997-07-02 Etch process for single crystal silicon TW344118B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP68080996 1996-07-16

Publications (1)

Publication Number Publication Date
TW344118B true TW344118B (en) 1998-11-01

Family

ID=58263706

Family Applications (1)

Application Number Title Priority Date Filing Date
TW086109337A TW344118B (en) 1996-07-16 1997-07-02 Etch process for single crystal silicon

Country Status (2)

Country Link
KR (1) KR980012064A (en)
TW (1) TW344118B (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8815744B2 (en) 2008-04-24 2014-08-26 Fairchild Semiconductor Corporation Technique for controlling trench profile in semiconductor structures

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR100702723B1 (en) * 2001-06-22 2007-04-03 동경 엘렉트론 주식회사 Dry-etching method
KR100596780B1 (en) * 2004-04-22 2006-07-04 주식회사 하이닉스반도체 Method for fabricating DRAM cell

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8815744B2 (en) 2008-04-24 2014-08-26 Fairchild Semiconductor Corporation Technique for controlling trench profile in semiconductor structures

Also Published As

Publication number Publication date
KR980012064A (en) 1998-04-30

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