TW203677B - Printed circuit board with internal capacitor - Google Patents

Printed circuit board with internal capacitor Download PDF

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Publication number
TW203677B
TW203677B TW081106737A TW81106737A TW203677B TW 203677 B TW203677 B TW 203677B TW 081106737 A TW081106737 A TW 081106737A TW 81106737 A TW81106737 A TW 81106737A TW 203677 B TW203677 B TW 203677B
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TW
Taiwan
Prior art keywords
circuit board
printed circuit
capacitor
dielectric layer
internal
Prior art date
Application number
TW081106737A
Other languages
Chinese (zh)
Inventor
R Howard James
L Lucas Gregory
Original Assignee
Zycon Corp
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Classifications

    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29CSHAPING OR JOINING OF PLASTICS; SHAPING OF MATERIAL IN A PLASTIC STATE, NOT OTHERWISE PROVIDED FOR; AFTER-TREATMENT OF THE SHAPED PRODUCTS, e.g. REPAIRING
    • B29C70/00Shaping composites, i.e. plastics material comprising reinforcements, fillers or preformed parts, e.g. inserts
    • B29C70/88Shaping composites, i.e. plastics material comprising reinforcements, fillers or preformed parts, e.g. inserts characterised primarily by possessing specific properties, e.g. electrically conductive or locally reinforced
    • B29C70/882Shaping composites, i.e. plastics material comprising reinforcements, fillers or preformed parts, e.g. inserts characterised primarily by possessing specific properties, e.g. electrically conductive or locally reinforced partly or totally electrically conductive, e.g. for EMI shielding
    • B29C70/885Shaping composites, i.e. plastics material comprising reinforcements, fillers or preformed parts, e.g. inserts characterised primarily by possessing specific properties, e.g. electrically conductive or locally reinforced partly or totally electrically conductive, e.g. for EMI shielding with incorporated metallic wires, nets, films or plates
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/16Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
    • H05K1/162Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor incorporating printed capacitors
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29KINDEXING SCHEME ASSOCIATED WITH SUBCLASSES B29B, B29C OR B29D, RELATING TO MOULDING MATERIALS OR TO MATERIALS FOR MOULDS, REINFORCEMENTS, FILLERS OR PREFORMED PARTS, e.g. INSERTS
    • B29K2995/00Properties of moulding materials, reinforcements, fillers, preformed parts or moulds
    • B29K2995/0003Properties of moulding materials, reinforcements, fillers, preformed parts or moulds having particular electrical or magnetic properties, e.g. piezoelectric
    • B29K2995/0006Dielectric
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29LINDEXING SCHEME ASSOCIATED WITH SUBCLASS B29C, RELATING TO PARTICULAR ARTICLES
    • B29L2009/00Layered products
    • BPERFORMING OPERATIONS; TRANSPORTING
    • B29WORKING OF PLASTICS; WORKING OF SUBSTANCES IN A PLASTIC STATE IN GENERAL
    • B29LINDEXING SCHEME ASSOCIATED WITH SUBCLASS B29C, RELATING TO PARTICULAR ARTICLES
    • B29L2031/00Other particular articles
    • B29L2031/34Electrical apparatus, e.g. sparking plugs or parts thereof
    • B29L2031/3425Printed circuits
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/03Use of materials for the substrate
    • H05K1/0313Organic insulating material
    • H05K1/0353Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement
    • H05K1/0366Organic insulating material consisting of two or more materials, e.g. two or more polymers, polymer + filler, + reinforcement reinforced, e.g. by fibres, fabrics
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/03Conductive materials
    • H05K2201/0332Structure of the conductor
    • H05K2201/0335Layered conductors or foils
    • H05K2201/0355Metal foils
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K2201/00Indexing scheme relating to printed circuits covered by H05K1/00
    • H05K2201/09Shape and layout
    • H05K2201/09209Shape and layout details of conductors
    • H05K2201/0929Conductive planes
    • H05K2201/09309Core having two or more power planes; Capacitive laminate of two power planes
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/46Manufacturing multilayer circuits
    • H05K3/4611Manufacturing multilayer circuits by laminating two or more circuit boards

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  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Chemical & Material Sciences (AREA)
  • Composite Materials (AREA)
  • Mechanical Engineering (AREA)
  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Abstract

A printed circuit board (PCB) has an internal capacitor with at least two conductive foils and one intermediate dielectric sheet, the dielectric sheet including spacer material extending therethrough for uniformly maintaining its thickness and dielectric material developing a uniform dielectric constant therein, the spacer material and dielectric material maintaining the uniform thickness and uniform dielectric constant of the internal capacitor during final lamination of formation of the PCB. The internal capacitor may depend upon borrowed capacitance with the total effective capacitance of the internal capacitor being less than the combined capacitive requirements of devices coupled with the internal capacitor. In one embodiment, at least a portion of the internal capacitor is formed simultaneously with final formation of the PCB by an in situ method. In another embodiment, the internal capacitor is formed with multiple capacitor elements, at least one conductive foils in the internal capacitor forming a portion of two different capacitor elements, the number of dielectric sheets in the internal capacitor equalling the number of capacitor elements, the number of conductive foils in the internal capacitor equalling the number of capacitor elements plus one.

Description

03ό Α6 Β6 五、發明説明() 本發明偽關於一種具有内部電容之電容性印刷電路 板(PCB),其可對插置或黏著在該電輅板上之電子元件, 提供旁路電容之功能。 印刷電路板一般都具有内部之電源層及接地層,這些 層是與電路板表面上之電子元件相連結,其元件例如是插 置在印刷電路板上之積体電路。在印刷電路板之實務上, 一般都需要對印刷電路板内之電葱層與接地靥之間所産生 之電壓波動現象予以補償,特別是對於例如插置在印刷電 路板上之積体電路等敏慼之電子元件而言,當其並聯連結 於電源層與接地曆之時,更須予以補償。 前述之電壓之波動現象,一般是發生於積体電路在開 、鬨狀態之切換之時。其所造成之電壓波動將造成”雜訊” ,此一現象對於許多電氣設備而言,是難以接受的。 解決此一間題之可行方式是可直接連接一電容於該積 体電路及/或是選定一近於電源層與接地磨間之積体電路 加裝一電容。電路板上之表面電容會隨著表面之電子元件 而形成或散佈形成在印刷電路板表面上,且會藉由電路板 上之表面佈線路徑或藉由印刷電路板之貫穿孔,而連結於 各別之元件或是積体電路等電子元件。 此類型之表面電容,通常可以減少或消除前述電壓波 動對元件裝置之影逛。然而,表面或旁路電容並不是對所 有之應用場合有效。例如,該電容可能會對積体電路或其 他装置之響應速度造成影響,因為該電容不只含有電容效 腠,同時亦含有容抗值。關於此點,己知該容抗會因電流 ......--...——--· -S- (請先閱讀背面之注意事項再«寫本頁) .裝, 訂. 線. 烴濟部中央標準局OK工消费合作社印1: Α6 ____Β6__ 五、發明説明() 流經導体(例如耦合於電容、電源層、及接地層之佈線路 徑或連接接頭)而昇高。 再者,積体電路或其他之電子元件是因印刷電路板内 之電壓波動,而造成雜訊輻射能之主要根源。其在不同之 速度或頻率之下對這些元件裝置所産生之不同特性,可以 用一般習知之方式予觀視。因此,該印刷電路板及元件排 列之開傜及相關之電容需求必須予以設計規劃,以確保在 高速及低速之操作狀態下,能具備窿有之雜訊抑制之功能 Ο 前述之印刷電路板之設計,其元件之排列配置對於精 於印刷電路板設計技術者而言,偽為易知者。在使用表面 黏著之技術中,足以理解到使用表面黏著之電容,其是各 個地作實体之連結於積体電路,其將增加製造印刷電路板 之複雜度及製作成本,且又無法確保其可靠度。 為了克服這些限制及其他之目的,在數個先前之專利 案中及提供有電容性之印刷電路板。首先,授予發明人圖 雷克(Turek)之美國專利第4,775,573號專利案,其專利日 為1988年十月四日,掲示有一多層之印刷電路板,其具有 導電層及介電層形成在該電路板之上,以作為插置在電路 板上之電子元件之旁路電容之用。 最近,授予發明人西斯勒(Sisler)之美國專利第5,01 0,641號,專利日為1991年四月三十日,掲示有一製造具 有介電材料層之多層印刷電路板之製造方法,其介電層俗 完金地固定於電源_與接地層之間之電路板内。 (請先wtfaE面之注f項再«寫本頁) —裝· 訂. •線. -4- hi ξϊ r? Φ (pKS ) ^ -3 -JP j (, v 〇〇7 > 經濟部中央標準局δ工消fr-合作社印ίί L〇3o'V:i A6 _B6_ 五、發明説明() 另,還有授予發明人霍爾德(Howard)等人而讓予齊康 公司(ZycorO之美國專利第5,079,069號,專利日1992年一 月七日,掲示一包含有電容薄層於電路板内部之電容性印 刷電路板,以提供插置在電路板上之元件之旁路電容之用 〇 以上這些不同之印刷霄路板所掲示之技術者,乃適合 於其特定預期之用途而己,然而,已發現這些技術仍有必 要予以作進一步之改進,以加強印刷電路板上之雷子元件 之操作特性,以及改良、簡化及/或降低印刷電路板本身 之成本。 因此,本發明之目的邸是為了提供一種電容性之印刷 電路板,其具有内部電容作為一旁路電容元件,其可用來 耦合印刷電路板上電子構件之元件。 更者,本發明之另一目的是為了提供一電容性之印刷 電路板,其具有一内部電容包括至少有兩值導電箔及一中 ψ 間介電層,其中之介電層包括有一隔绝材料,延伸遍佈於 介電層,用以保持導電箔之均勻厚度以及使介電材料可恒 保持一不變之介電常數,該隔絶材料及介電材料之組合使 得印刷電路板在隨後之變形作業時,其内部電容之厚度及 介電常數可以保持一恒定值。 該隔絶材料係接近地及均勻地介於介電材料之間為佳 ,以保持介電層之固定厚度及均一之介電常數。 該内部電容所形成之全部電容量可以是相等於結合後 所需之電容量,苏可以是實質上較小之電容值,但在此境 {請先閱#背面之注意事項再埃寫本頁) -裝. 訂. .線. 〇3υ 蛵濟部中央標芈局I®工消f'合诈社印¾ A6 B6 五、發明説明() 形下,印刷電路板上之電子元件必須由其他之途徑取得所 需之電容量。 本發明之另一相鼷目的乃是以線上作業之方法,在印 刷電路板上之最後形成處理步驟中形成全部或一部份之内 部電容,其印刷電路板之最後形成步驟中,最好是以輾壓 步驟來予以完成為較佳。 本發明之另一相鼷目的,乃是為了形成一具有多電容 元件之内部電容,至少有一位於内部電容中之導電箔構成 兩電容元件之一部份,其内部罨容之介電層之數目乃相等 於其内之電容元件數目,而其内部電容内導電箔之數目則 僳相等於其内之電容數目加一之數目。 本發明之其它目的及優點,將藉由參閲附呈之圈式及 以下之說明,將更為明確,其中: 圖式說明: 圖一傜本發明電容性印刷電路板(PCB)之平面視圓; 圖二像一顯示本發明印刷電路板之部份擴大視圖,其示意 有一例如積体電路之電子元件乃設置在該電路板上, 且經由電路板内之貫穿孔而可與其它之元件及電源相 連結; 圖三乃類似於圖二所示之平面視圖,其示意有一使用表面 黏著技術黏著之電子元件,乃配置在電路板上,且經 由電路板上之表面佈線路徑,而可與其它之電子元件 及電源相連結; 圖四像一印刷電路板之斷面示匾,其顯示有連結孔!佈線 -6- (請先閲讀背面之注意事項再蜞寫本頁) 裝— 訂 線— m *4-» η > r^r 4 烴濟部中央標準局**工消费合作社印纪 A6 _B6_ 五、發明説明() 路徑,可用來連結藕合印刷電路板表面上所示意之轚 子元件至電源及接地層,該電源及接地層係根據本發 明之技術而在印刷電路板内所形成之具有内部電容之 旁路電容組体; 圃五像本發明介電靥之部份擴大斷面視圖,其介電曆像形 成本發明内部霣容之一構成部份; 國六像一依據本發明所所構成之内部旁路霣容組体之斷面 示意圖,其強諝顯示該電容組体之複合電容結構; 圃七傺顳示本發明之内部旁路電容组体内各組件之分解斷 面視圖,其可用以示意本發明之較佳製造方法; 圖八傜類似於圖六之新面示圖,其示意製造相同内部旁路 電容組体之另一製造步驟; 圖九像示意依據本發明所形成之電容性印刷電路板構成组 件之分解圖; 圖十A、十B、十C及十D僳示意本發明中為形成一霣容性 印刷電路板,並同時在該電路板之最後壓層步驟中形 成一旁路電容之處理步驟; 圖十一及十二傜顯示本發明中,為了在電容性印刷電路板 内形成旁路電容組体之另一簧施例步驟。 以下依序對於一使用在一電容性印刷電路板之内部旁路電 容組体作更進一步之說明。特別應注意的是該内部旁路電 容組体之設計,偽為了便利製造及簡化製造,在製造時, 該内部旁路電容最好是以薄層之型式作為一單体為佳。在 (請先閲讀背面之注意事項再填寫本頁) .装. 訂. -線_ -7-03ό Α6 Β6 5. Description of the invention () The present invention is about a capacitive printed circuit board (PCB) with an internal capacitor, which can provide the function of bypassing capacitors for electronic components inserted or adhered to the electric board . Printed circuit boards generally have internal power and ground layers. These layers are connected to electronic components on the surface of the circuit board. The components are, for example, integrated circuits inserted on the printed circuit board. In the practice of the printed circuit board, it is generally necessary to compensate for the voltage fluctuation phenomenon generated between the electric onion layer in the printed circuit board and the ground lute, especially for integrated circuits inserted on the printed circuit board, etc. As far as the electronic components of Minqi are concerned, when they are connected in parallel to the power plane and the ground, they must be compensated. The aforementioned voltage fluctuation phenomenon generally occurs when the integrated circuit is switched between on and off. The voltage fluctuation caused by it will cause "noise", which is unacceptable for many electrical equipment. A feasible way to solve this problem is to directly connect a capacitor to the integrated circuit and / or select an integrated circuit close to the power plane and the ground mill to add a capacitor. The surface capacitance on the circuit board will be formed or spread on the surface of the printed circuit board with the electronic components on the surface, and will be connected to each through the surface wiring path on the circuit board or through the through hole of the printed circuit board Other components or electronic components such as integrated circuits. This type of surface capacitance can usually reduce or eliminate the effects of the aforementioned voltage fluctuations on the device. However, surface or bypass capacitors are not effective for all applications. For example, the capacitor may affect the response speed of the integrated circuit or other devices, because the capacitor contains not only the capacitance effect but also the capacitance value. Regarding this point, I know that the capacitive reactance will be due to the current ...--...——-- · -S- (please read the notes on the back and then «write this page). Install and order. Line. OKI Consumer Industry Cooperative Printed by the Central Standards Bureau of the Ministry of Hydrocarbon Economy 1: Α6 ____ Β6__ 5. Description of the invention () Flows through conductors (such as wiring paths or connection joints coupled to capacitors, power planes, and ground planes) and rises. Furthermore, integrated circuits or other electronic components are the main source of noise radiant energy due to voltage fluctuations in the printed circuit board. The different characteristics of these component devices at different speeds or frequencies can be viewed in a generally known manner. Therefore, the opening of the printed circuit board and the arrangement of components and related capacitance requirements must be designed and planned to ensure that under high-speed and low-speed operating conditions, it can have the function of suppressing all the noise. Ο The aforementioned printed circuit board Design, the arrangement and arrangement of its components are pseudo-knowable to those skilled in printed circuit board design technology. In the technology using surface bonding, it is enough to understand the use of surface-mounted capacitors, which are physically connected to the integrated circuit, which will increase the complexity and cost of manufacturing printed circuit boards, and cannot ensure their reliability degree. To overcome these limitations and other purposes, capacitive printed circuit boards have been provided in several previous patents. First, the US Patent No. 4,775,573 granted to the inventor Turek, whose patent date is October 4, 1988, shows a multi-layer printed circuit board with a conductive layer and a dielectric layer formed on the The circuit board is used as a bypass capacitor for electronic components inserted on the circuit board. Recently, US Patent No. 5,01 0,641 granted to inventor Sisler, dated April 30, 1991, shows a method for manufacturing a multilayer printed circuit board with a dielectric material layer, which The dielectric layer is fixed to the circuit board between the power supply and the ground layer. (Please note f item on the wtfaE page first and then «write this page)-install and order. • line. -4- hi ξϊ r? Φ (pKS) ^ -3 -JP j (, v 〇〇7 > Ministry of Economic Affairs The Central Bureau of Standards δ 工 消 fr-Cooperative Print L〇3o'V: i A6 _B6_ V. Description of the invention () In addition, there are also granted to the inventor Howard and others and given to ZycorO (ZycorO) U.S. Patent No. 5,079,069, patent date January 7, 1992, shows a capacitive printed circuit board containing a thin layer of capacitors inside the circuit board to provide bypass capacitors for components inserted on the circuit board. The technologies described above for the different printed road boards are suitable for their specific intended use. However, it has been found that these technologies still need to be further improved to strengthen the lightning components on the printed circuit board Operating characteristics, and to improve, simplify and / or reduce the cost of the printed circuit board itself. Therefore, the purpose of the present invention is to provide a capacitive printed circuit board with an internal capacitor as a bypass capacitor element, which can be used Coupling of electronic components on the printed circuit board Furthermore, another object of the present invention is to provide a capacitive printed circuit board having an internal capacitor including at least two conductive foils and a dielectric layer between ψ, wherein the dielectric layer includes a The insulating material extends throughout the dielectric layer to maintain a uniform thickness of the conductive foil and to maintain a constant dielectric constant of the dielectric material. The combination of the insulating material and the dielectric material allows the printed circuit board to During the deformation operation, the thickness and dielectric constant of the internal capacitor can be maintained at a constant value. The insulating material is preferably close to and uniformly between the dielectric materials, in order to maintain a fixed thickness of the dielectric layer and a uniform dielectric Electrical constant. The total capacitance formed by the internal capacitor can be equal to the capacitance required after the combination, and Su can be a substantially smaller capacitance value, but in this context {Please read #Notes on the back side. Write this page)-Installed. Ordered. Line. 〇3υ Central Standardization Bureau of the Ministry of Economics and Trademarks I® Gongxiao f'he fraud agency printed ¾ A6 B6 5. Description of invention () Electronic components on the printed circuit board under the shape Must be done by other means Obtain the required capacitance. Another aspect of the present invention is to form all or part of the internal capacitance in the final forming process step of the printed circuit board by the method of online operation. In the forming step, it is better to complete it by rolling step. Another aspect of the present invention is to form an internal capacitor with multiple capacitive elements, at least one conductive foil located in the internal capacitor For a part of two capacitor elements, the number of dielectric layers inside the capacitor is equal to the number of capacitor elements inside, and the number of conductive foils in the internal capacitor is equal to the number of capacitors plus one The other objects and advantages of the present invention will be more clear by referring to the enclosed circle and the following description, among which: Illustrated in the drawings: Figure 1 Plane of the capacitive printed circuit board (PCB) of the present invention Circle of view; Figure 2 shows an enlarged view of a part of the printed circuit board of the present invention, which shows that an electronic component such as an integrated circuit is provided on the circuit board and passes through the circuit The through hole inside can be connected to other components and power supply; Figure 3 is a plan view similar to that shown in Figure 2, which shows an electronic component adhered using surface adhesive technology, which is arranged on the circuit board and passed through the circuit The surface wiring path on the board can be connected to other electronic components and power supplies; Figure 4 is like a cross-sectional plaque on a printed circuit board, which shows a connection hole! Wiring-6- (Please read the precautions on the back before writing this page) Binding — Threading — m * 4- »η > r ^ r 4 Central Bureau of Standards of the Ministry of Hydrocarbon Economy ** Industrial and Consumer Cooperative Society Aki _B6_ V. Description of the invention () The path can be used to connect the buckwheat elements indicated on the surface of the coupled printed circuit board to the power supply and the ground layer, which are formed in the printed circuit board according to the technology of the present invention. A bypass capacitor assembly with internal capacitance; an enlarged cross-sectional view of a portion of the dielectric layer of the invention as shown in FIG. 5, whose dielectric history forms an integral part of the internal capacitance of the invention; The schematic diagram of the cross-section of the internal bypass capacitor assembly formed, which strongly shows the composite capacitor structure of the capacitor assembly; Pu Qiye shows the exploded cross-sectional view of the components in the internal bypass capacitor assembly of the present invention , Which can be used to illustrate the preferred manufacturing method of the present invention; FIG. 8 is similar to the new view of FIG. 6, which illustrates another manufacturing step of manufacturing the same internal bypass capacitor assembly; FIG. Capacitive printed circuit An exploded view of the components; Figures 10A, 10B, 10C, and 10D illustrate the formation of a large capacitive printed circuit board in the present invention, and at the same time, a bypass capacitor is formed in the final lamination step of the circuit board Process steps; Figs. 11 and 12 show the steps of another embodiment of the present invention for forming a bypass capacitor assembly in a capacitive printed circuit board. The following is a further description of an internal bypass capacitor assembly used in a capacitive printed circuit board. Special attention should be paid to the design of the internal bypass capacitor assembly. In order to facilitate manufacturing and simplify manufacturing, the internal bypass capacitor is preferably a thin layer type as a single unit. (Please read the precautions on the back before filling this page). Pack. Order. -Thread_ -7-

經濟部中央標準局員工消费合作社印K A6 _ B6_ 五、發明説明() 内部旁路電容组体内所使用到之導電箔及介電層,可由現 有技術中之材料所形成。然而,其内部旁路電容组体亦可 以是由其它除了薄層技術之外之方式來予以形成,且亦可 對介電層中所使用到之導電箔或介電材料作一改良。 應注意的是,對於一印刷電路板上之元件而言,可能 會須要相當大董之電容數目,因此,在前述之吉康(Zycon )之專利案中,其掲示了分享式之電容之觀念。依據該分 享式之電容觀念,其内部旁路電容组体之组合,可以谋足 電路板表面上電子元件所箱求之電容,甚至可以提供一較 所需要之所有電容董更大之内部旁路電容量。就如前述專 利案所掲示,此種技巧有可能以一間歃之操作方式,以使 得在一特定之時間中,其實際之電容需求僅為所有元件所 需電容量之一部份而已。 雖然本發明可以用此一分享或外借電容觀念之方式, 但是其内部旁路電容組体亦可能實際上可滿足所有元件所 需之電容量。此種可能性確有可能存在,因為該内部旁路 電容組体是一後合之電容結構,此為本發明中之其中一實 施例。由於該霄容之結構蘭係(將詳述於後),其有可能提 供一相當大量之電容元件數,而每一電容元件乃實質上延 伸遍佈於電路板上之各表面區域。因此,在此一情形下其 即有可能實質上增加在印刷電路板上可資利用之電容量。 另一種方法,亦有可能實質上增加其電容性之所有電容量 ,其僳藉由增加介電材料之介電傜數。因此,本發明不僅 是以外借或分享式電容觀念所構成之電容性印刷電 -δ- 一,* m 丄 rm γτ» 十· 1» ·•付 / αχ,π、ΓΓ» . …、. " (請先閲讀背面之注意事項再埃寫本頁) .裝. 訂· 線. 經濟部中央標準局8工消費合作社印S衣 A6 __B6_ 五、發明説明() 同時也是一種電容性之印刷電路板,其總電容大約相同於 或甚至超過設置在印刷電路板上之元件所需總電容量者。 為了進一步使該電容性印刷電路板之製造更為便利, 甚至更符合經濟效益,及更加強本發明之可靠性,本發明 亦發現其可藉由後合數摘旁路電容而得到大電容躉。其效 果與前述之Zycon先前專利案中之印刷電路板有相類似之 效果。 本發明之複合電容效果亦類似於前述Zycon專利案之 電容薄層,其可在一甚為寬竇之元件頻率範圍之中,以得 到較精確之霣壓諝整及消除雜訊,特别是在較低頻率之下 ,其電壓譌整及消除雜訊之效果更相近。例如,在大约40 MHz之頻率下,其僳藉由諝諧連結於複合電容之間存在之 有限表面電容而逹成此一目的。 首謫參閲圖一所示,倭依據本發明而構组而成之一電 容性印刷電路板,其霣路板以樣號10表示之。該印刷電路 板10除了以下將詳述之内部電容之薄麕結構之外,其大致 與一般傳統之構造相似。因此,該印刷電路板10之其他特 性只簡要地予以描述,因其印刷電路板之架構及設計之考 量,對於一精於此一技蕤者而言乃為熟知者。 對於本發明之目的而言,應足以理解其電容性之印刷 電路板10像包括有許多之電子元件12配置在電路板之上。 在習知之印刷電路板技術中,該元件或組件可以被安排在 電路板之箪面或雙面之上,且可以包括有主動元件例如積 体電路、電晶体等。該主動元件甚至可以包括有例如真空 -0 - 4- m «*f ερ! 4» ;'ir ί ο v ς n xr ^ y' f 〇i ; v .-· 4-. ^ _m ......_i ., <請先閲讀背面之注意事項再蜞寫本頁> -裝. 訂. 線. 03〇 A6 B6 五、發明説明() 管或類似之電子組件。該電子元件12亦可以包括有被動元 件例如電容、電阻、電感等。 在印刷電路板之設計中,例如符號10, —般在實務上 是提供有一電源(將在以下詳述之),其是由一電源層及接 地層或導電層形成一薄層於該印刷電路板内。有許多種架 構可被使用來設置該電子元件在印刷霄路板之上,並將這 些元件連結於電源與其它各元件彼此之間。雖然造設計上 之考慮,是超出本發明之一般範画之外,但以下仍列舉兩 個此類之架構如圖二及圖三所示,予以說明如下。 參閲圖二所示,其顯示一主動元件例如一積体電路標 示以14,其乃連結有一被動元件,例如一檫示以16之電容 。這些元件,特別是主動元件或積体電路14係廣被使用之 代表性電子元件,其被安排設置在印刷電路板之上,如圖 一所示。在圖二所示意之架構中,該電子元件係藉由具貫 穿孔或插脚18而使各電子元件彼此間作連結及連结於印刷 電路板内之電源層及接地層。在圖二中,兩個此類之貫穿 孔或插脚18傜示意地為電容而設,而積体電路14僳臑於一 16支插脚之設計,其包括有16個貫穿孔或插腳18,如圖所 示。另外之佈線路徑以符號20予以標示,以便於使印刷電 路板上各種不同之電子元件作連結。 另外之印刷電路板架構像示於圖三之部份斷面示意圖 中,其示意有一主動元件例如虛線所標示之積体電路14’ ,其元件像如圖三所示之電路板底面插置至電路板之另一 面或是頂面上。一被動元件或電容16’亦顯示於圖三中, -10- (牌先《讀背面之注意事項再5T寫本頁) -丨裝‘ 訂 經濟部中央標準局員工消货合作社印纪 太舛從ί!痄;亦ϊΓ ΦΚί印它《並ΓΓΝ:5〇沪J 夂f 01Γ Vr 一 、 五、發明説明() 其係設置在印刷電路板之底面22為佳。在圖三所示之表面 黏著架構中,該主動元件14*及電容16’像設置在表面佈線 路徑或黏著區24上。依據習知之印刷電路板技術中,該黏 著區24可作為元件表面黏著之用,且若在霈要時,可同時 使用表面佈線路徑及貫穿孔或插腳,以提供各元件之間之 相互建結及連結於電源及例如前述之内部電源層及接地層 Ο 參閲圖二及三所示,本發明恃別期望提供能使用一電 容薄層形態之内部電容層,以取代習有使用大量之表面電 容。因此,雖然在印刷電路板内之大部份之表面電容可被 本發明中之電容薄層來取代,但是仍會使用到一些表面霣 容,至少在為了達到低頻諝諧(以下將詳述)時之目的時之 情況。 画四僳圖一中電容性印刷電路板10之剖視國,其示意 一後合之旁路電容或電容性組体26。其像依據本發明所構 成,且在印刷電路板内或在印刷電路板10之内或之上形成 一内部電容元件。該後合之旁路電容26包括有導轚箔28、 30、32及34,其像以導電銅箔所形成者為較佳,其另具有 —介電層36配置在每一相鄰之導電箔之間。該導電箔28、 30、32、及34形成了印刷電路板之電源層及接地層。此 種架構中,特別是電源層及接地層之架構,傜習於此技術 者所熟知,因此對於此方面之進一步討論相信是沒有必要 。再者,該導霄箔28、32偽作為電源層,而導電箔30、34 像作為接地層之用。 經濟部中央標準局員工消费合作社印繁 Ο 3识 Α6 __Β6_ 五、發明説明() 一表面黏箸之電子元件14’,對應參照圖二所示之積 体電路,傜設置在圖四中之電路板表面上,且像藉由各別 之電源引線及接地引線38、40而連結介於導電箔間。該電 源引線38係與導電箔28及32相連結;而在另一導電箔30及 34之相對應處,則形成有孔洞(未示)。相似地,該接地引 線40在該導電箔28與32之内則像通過該孔洞而與導電箔30 及34作電縞合連結。在此連結狀態下,該表面電子元件14 ’即可正確地連結於電源層及接地層。信號佈線路徑42像 可用來連结該元件或使得各元件連結於印刷電路板之其它 必要之電子元件之用。 參閲圖五,本發明像提供有一介電層之形成結構,其 結構包括有區隔材料37A及介電材料37B。在圖五中,其顯 示圖四中之其中一介電層,其上介電層傺以符號36A標示 之。然而,應理解本發明之實施例中所使用之所有介電靥 ,乃具有一相類似之结構及構成之方法。 更特別地是,該標示以符號37A之區隔材料傜以例如 傳統印刷電路板中所使用之玻璃纖雒材霣為較佳。如圖五 所示,其玻璃纖維37A傜均勻地配置且以多方向配置之方 式而遍佈設於介電層上,以在該介電層之内形成一不會被 壓縮之層。其不可壓縮之特性,在壓層之作業時,尤其是 在一印刷電路板之最後壓層步驟中特別重要。在壓層之步 驟中,熱及壓力會被施予至印刷電路板,且在此時之印刷 電路板形成過程中,即藉由該區隔材料37A之作用,而可 保持介電層之均一間隔。 -12- """六π 山 m πη 办你.:„ m : I" ·| 1 1 1 1 (請先閲讀背面之注意事项再塡寫本頁) .裝. 訂· •線· 經濟部中央標準局員工消费合作社印袈 A6 _B6_ 五、發明説明() 同時,該區隔材料37A係緊密地及均一地與介電材料 37A相結合。該介電材料37A可以是環氣基(epoxy)樹脂及 其它材料之混合物,而以具有較高之介電係數之材料為佳 。其材料對於精於此一技術者而言乃為習知者。 再者,該介電材料37B可以是固化或不固化之型態者 。精於印刷轚路板技術者應可理解,其材料可以在壓層操 作之前,仍為未固化之狀態。而在施以熱與壓力於暖層之 步驟時,該材料才變為固化之型態,同時,會緊密地結合 於相鄰之材料層。在此一情形之下,其固化後之介電層36 A卽是緊密地结合於導電箔28及30。 不論如何,該緊密及均一結合之區隔材料37A及介電 層37B,乃形成本發明中一新穎功能,其可保持該介電層 之完全均一之厚度(因為區隔材料37A之緣故),而在同時 ,亦可保持該介電層之恒定介電傜數(因為其介電材料37A 具有較高之介電俗數)。 在這一方面,可理解到本發明除了使用玻璃纖維為一 較佳之匾隔材料及環氣基及介電材料37B之外,亦可使用 其它之區隔材料及介電材料之組合。更者,依據本發明, 其每一介電層包括有一匾隔材料,以保持均一之厚度及介 電材料,使適合於保持介電像數在一適當之程度。 參閲圖六所示,本發明之實施例包括有複合之電容結 構,其以該複合電容之三層介電層作進一步之掲示,其分 別標示36A、36B、36C。圖六中所示之複合電容包括兩内 導電箔30及32形成在兩値不同之電容元件中。甶此,_每一 -13- 一 ·* m 丄 ri,rr* 一 你…y 、· fr· ; ι..-^ / , . , " , 1 """" 1 — {犄先閲讀背面之注意事項再«寫本頁) .裝. .ΤΓ· .線.K A6 _ B6_ printed by the Staff Consumer Cooperative of the Central Bureau of Standards of the Ministry of Economy V. Description of the invention () The conductive foil and dielectric layer used in the internal bypass capacitor group can be formed from materials in the existing technology. However, the internal bypass capacitor assembly can also be formed by other methods than thin-layer technology, and it can also improve the conductive foil or dielectric material used in the dielectric layer. It should be noted that for a component on a printed circuit board, a relatively large number of capacitors may be required. Therefore, in the aforementioned Zycon patent case, it shows the concept of shared capacitors. According to the shared capacitor concept, the combination of its internal bypass capacitor assembly can meet the capacitance demanded by electronic components on the surface of the circuit board, and can even provide an internal bypass that is larger than all the required capacitors. capacitance. As shown in the aforementioned patent case, this technique may be operated in a time-dependent manner so that the actual capacitance requirement is only a part of the required capacitance of all components in a specific time. Although the present invention can use this method of sharing or borrowing the concept of capacitance, its internal bypass capacitor assembly may actually satisfy the required capacitance of all components. This possibility is indeed possible because the internal bypass capacitor assembly is a combined capacitor structure, which is one of the embodiments of the present invention. Due to the structural blue of the Xiaorong (which will be described in detail later), it is possible to provide a considerable number of capacitor elements, and each capacitor element extends substantially over the surface areas of the circuit board. Therefore, in this case, it is possible to substantially increase the available capacitance on the printed circuit board. In another method, it is also possible to increase substantially all the capacitance of the capacitor by increasing the dielectric count of the dielectric material. Therefore, the present invention is not only a capacitive printed electricity -δ-a, * m 丄 rm γτ »ten · 1» · pay / αχ, π, ΓΓ »constructed by lending or sharing capacitive concept. ; (Please read the precautions on the back before writing this page). Packing. Threading. Central Bureau of Standards of the Ministry of Economic Affairs 8 Industrial and Consumer Cooperatives printed S-shirt A6 __B6_ V. Invention description () It is also a capacitive printed circuit The total capacitance of the board is approximately the same as or even exceeds the total capacitance required by the components provided on the printed circuit board. In order to further make the manufacturing of the capacitive printed circuit board more convenient, even more economically beneficial, and to enhance the reliability of the present invention, the present invention also finds that it can obtain a large capacitor by removing the bypass capacitor by post-combination . The effect is similar to the printed circuit board in the aforementioned Zycon previous patent case. The effect of the composite capacitor of the present invention is also similar to the capacitor thin layer of the aforementioned Zycon patent case, which can be in a very wide sinusoidal component frequency range to obtain more accurate pressure suppression and noise elimination, especially in At lower frequencies, the effects of voltage shaping and noise reduction are more similar. For example, at a frequency of approximately 40 MHz, its purpose is achieved by connecting the finite surface capacitance existing between the composite capacitors to the harmonics. Referring to FIG. 1 for the first time, a capacitive printed circuit board constructed in accordance with the present invention is represented by sample number 10 in the circuit board. The printed circuit board 10 is generally similar to the conventional structure except for the thin structure of the internal capacitor which will be described in detail below. Therefore, the other characteristics of the printed circuit board 10 are only briefly described, because the considerations of the structure and design of the printed circuit board are well-known to those skilled in the art. For the purposes of the present invention, it should be sufficient to understand that the capacitive printed circuit board 10 includes many electronic components 12 disposed on the circuit board. In the conventional printed circuit board technology, the component or assembly may be arranged on the surface or both sides of the circuit board, and may include active components such as integrated circuits, transistors, and the like. The active element may even include, for example, vacuum-0-4- m «* f ερ! 4»; 'ir ί ο v ς n xr ^ y' f 〇i; v .- · 4-. ^ _M ... ..._ i., < Please read the precautions on the back before writing this page > -installation. Order. Line. 03〇A6 B6 V. Description of invention () Tube or similar electronic components. The electronic component 12 may also include passive components such as capacitors, resistors, and inductors. In the design of printed circuit boards, for example, symbol 10, in practice, a power supply is provided (which will be described in detail below), which is formed of a thin layer on the printed circuit by a power supply layer and a ground layer or a conductive layer Inside the board. There are many types of architectures that can be used to place the electronic component on the printed road board and connect these components between the power supply and other components. Although the design considerations are beyond the general scope of the present invention, the following two such architectures are shown in Figures 2 and 3, which are explained below. Referring to FIG. 2, it shows an active component such as an integrated circuit labeled 14, which is connected with a passive component, such as a capacitor labeled 16. These components, especially active components or integrated circuits 14 are widely used representative electronic components, which are arranged on a printed circuit board, as shown in FIG. In the architecture illustrated in Fig. 2, the electronic component is connected to each other and connected to the power layer and ground layer in the printed circuit board by having through holes or pins 18. In FIG. 2, two such through holes or pins 18 are schematically provided for the capacitor, and the integrated circuit 14 is designed in a 16-pin design, which includes 16 through holes or pins 18, such as The picture shows. The other wiring paths are marked with the symbol 20 to facilitate the connection of various electronic components on the printed circuit board. The other printed circuit board architecture image is shown in the partial cross-sectional schematic diagram of FIG. 3, which shows an active component such as an integrated circuit 14 'indicated by a dotted line, and its component image is inserted into the bottom surface of the circuit board as shown in FIG. The other side or the top side of the circuit board. A passive component or capacitor 16 'is also shown in Figure 3, -10- (Brand first "Read the notes on the back and then write this page on 5T)-Shuzhang" Ordered by the Ministry of Economic Affairs Central Standards Bureau Employee Consumer Goods Cooperative Yin Jitai From ί! 痄; also ϊΓ ΦΚί printed it "and ΓΓΝ: 5〇 Shanghai J 夂 f 01Γ Vr one, five, description of invention () It is set on the bottom 22 of the printed circuit board is better. In the surface-mount structure shown in FIG. 3, the active element 14 * and the capacitor 16 'are arranged on the surface wiring path or the adhesive area 24. According to the conventional printed circuit board technology, the adhesive area 24 can be used as the surface of the component, and if necessary, the surface wiring path and the through hole or the pin can be used at the same time to provide mutual construction between the components And connected to the power supply and the internal power supply layer and the ground layer such as the foregoing. Referring to FIGS. capacitance. Therefore, although most of the surface capacitance in the printed circuit board can be replaced by the thin layer of capacitors in the present invention, some surface capacitance will still be used, at least in order to achieve low frequency harmonics (more on this below) The purpose of the situation. A cross-sectional view of the capacitive printed circuit board 10 in FIG. 1 is shown, which shows a bypass capacitor or capacitive assembly 26 which is closed afterwards. It is constructed according to the present invention, and an internal capacitive element is formed in the printed circuit board or in or on the printed circuit board 10. The later bypass capacitor 26 includes conductive foils 28, 30, 32 and 34, which are preferably formed of conductive copper foil, and it has a dielectric layer 36 disposed on each adjacent conductive Between foils. The conductive foils 28, 30, 32, and 34 form the power layer and ground layer of the printed circuit board. In this kind of architecture, especially the power layer and ground layer architectures are well known to those skilled in the art, so further discussion in this regard is believed to be unnecessary. Furthermore, the guide foils 28 and 32 are used as power layers, and the conductive foils 30 and 34 are used as ground layers. The Ministry of Economic Affairs, Central Bureau of Standards, Employee and Consumer Cooperative Ind. Ο 3 识 Α6 __Β6_ V. Description of invention () An electronic component 14 'with a sticky surface on it, corresponding to the integrated circuit shown in FIG. 2, and the circuit set in FIG. 4 On the surface of the board, it is connected between the conductive foils by separate power leads and ground leads 38, 40. The power lead 38 is connected to the conductive foils 28 and 32; at the corresponding positions of the other conductive foils 30 and 34, holes (not shown) are formed. Similarly, the ground lead 40 in the conductive foils 28 and 32 is electrically connected to the conductive foils 30 and 34 as if passing through the hole. In this connected state, the surface electronic component 14 'can be correctly connected to the power supply layer and the ground layer. The signal wiring path 42 may be used to connect the component or to connect the components to other necessary electronic components of the printed circuit board. Referring to FIG. 5, the present invention provides a formation structure of a dielectric layer, which includes a partition material 37A and a dielectric material 37B. In FIG. 5, it shows one of the dielectric layers in FIG. 4, and the upper dielectric layer is marked with the symbol 36A. However, it should be understood that all dielectrics used in the embodiments of the present invention have a similar structure and method of construction. More specifically, the partition material marked with the symbol 37A is preferably a glass fiber material used in a conventional printed circuit board, for example. As shown in FIG. 5, the glass fibers 37A are uniformly arranged and arranged in multiple directions on the dielectric layer to form a layer that is not compressed within the dielectric layer. Its incompressible nature is particularly important during lamination operations, especially in the final lamination step of a printed circuit board. In the step of laminating, heat and pressure are applied to the printed circuit board, and during the formation of the printed circuit board at this time, the dielectric layer 37A can maintain the uniformity of the dielectric layer interval. -12- " " " Six π mountain m πη do you .: „m: I " · | 1 1 1 1 (please read the notes on the back before writing this page). Install. Order · Line · Employee Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs, A6 _B6_ V. Description of the invention () At the same time, the partition material 37A is tightly and uniformly combined with the dielectric material 37A. The dielectric material 37A may be a gas-based (Epoxy) a mixture of resin and other materials, preferably a material with a higher dielectric coefficient. The material is known to those skilled in this technology. Furthermore, the dielectric material 37B can It is the type of curing or non-curing. Those skilled in printing road board technology should understand that the material can be in an uncured state before the lamination operation. The step of applying heat and pressure to the warm layer At this time, the material becomes cured, and at the same time, it will be closely bonded to the adjacent material layer. In this case, the cured dielectric layer 36 A is tightly bonded to the conductive foil 28 And 30. In any case, the tightly and uniformly combined partition material 37A and dielectric layer 37B, Forming a novel function of the present invention, it can maintain the completely uniform thickness of the dielectric layer (because of the partition material 37A), and at the same time, it can also maintain a constant dielectric constant of the dielectric layer (because of its The dielectric material 37A has a relatively high dielectric count.) In this respect, it can be understood that the present invention can also be used in addition to using glass fiber as a preferred plaque partition material and annulus-based and dielectric material 37B Combination of other partition materials and dielectric materials. Furthermore, according to the present invention, each dielectric layer includes a plaque partition material to maintain a uniform thickness and dielectric material, making it suitable for maintaining the dielectric image To an appropriate degree. Referring to FIG. 6, an embodiment of the present invention includes a composite capacitor structure, which is further illustrated by the three dielectric layers of the composite capacitor, which are labeled 36A, 36B, and 36C, respectively. The composite capacitor shown in six includes two inner conductive foils 30 and 32 formed in two different capacitance elements. For this, _each-13- one · * m 丄 ri, rr * one you ... y, · fr ·; Ι ..- ^ /,., &Quot;, 1 " " " & qu ot; 1 — (Read the precautions on the back and then «write this page). Install ... ΤΓ ·. 线.

B6 蛵濟部中央標準局員工消^"作钍印¥ 五、發明説明() 電容元件包括介電層36A、36B及36C其中之一。該第一電 容元件包括介電層36A及電源層及接地層28、30,而第二 電容元件包括有介電層36B及接地及電源層30、32。第三 電容元件包括介電層36C及電源層及接地層32、34。 由以上之敘述可知,圖六之複合旁路電容组体26乃包 括所有之三個電容元件。同時,該電容组体26包括有三層 之介電層,其與該電容组体内之電容元件數目為相同。該 電容组体亦包括有四傾導電箔或相等於電容元件數目加一 之數目之導電箔。 以上之敘述乃說明了本發明之持別重要之特性,即其 電容組体乃具有一個或多健之複合導電箔,每一傾導電箔 像位在兩健不同之電容元件中。此一特性可降低霣容組体 之成本,因為該導罨箔在該電容组体中乃為極便宜之部份 。同時,該電容组体之複合結構,乃可使電容組体26之体 積小型化,此可大大地便於製造。 由此上對於複合旁路電容组体26之結構敘述可知,其 可以僅藉由增加電容元件之數目即可大大地增加印刷電路 板10或10’之電容置。 由以上之敘述亦可以得知,本發明之電容組体至少有 三個導電箔及配置在毎一相鄰兩値導電箔間之介電層。更 者,本發明中之電容组体26乃包括有四個或更多之導電箔 ,如圖六所示,其較佳實施例之結構乃具有三痼或更多之 介電層,分別配置在相鄰之兩傾導電箔之間。 再請參閲圖四所示可知,由電容組体26之任一例起算 -14- (請先閲讀背面之注意事項再^寫本頁) 裝. .IT. 線· 尺汴褅m由p阳它杜沒川代f 0υ’、,”门一 、 -03〇^:ί Α6 _Β6_ 五、發明説明() (請先面之注意事項再!^本頁} ,該偶數之導電箔及奇數導電箔,分別為電源層及接地層 ,其係由例如如圖四所示之佈線路徑34及36相隔離者。 該複合電容組体26傜設計為提供在印刷電路板10或10 '之表面所有或實際所需數目元件之電容量。這些元件可 以經由各別之貫穿孔接腳或是藉由圖二及圖三所示型態之 表面佈線路徑,而與電源層及接地層相連結。 若元件所需求之電容量大,該複合電容組体26係可以 如前所述之分享式電容之觀念予以構成為較佳,如此可以 以較少之電容量,來淇足印刷電路板10或10’上之所有元 件來使用。但是,如前所述,該複合之電容組体26俗可供 應電容量至所有之元件。亦即,在電容組体26内之結合後 之電容元件乃可提供充足之電容量,以使每一個各別之電 子元件在作動時,有足夠之電容,以確保其動作之正確性 Ο 雖然該電容組体26係可採用分享式電容之操作方式, 但是其複合電容組体26之電容量亦有可能予以增加。首先 ,其有可能在該複合電容組体26内包括有較多之電容元件 數。另外,每一單位區域中之電容元件之電容值亦有可能 予以增加,例如,在介電層36内使用較高之介電係數之介 電材料。 經濟部中央標準局貝工""-合作社印:- 不論如何,雖然該複合電容組体26係可以分享之方式 之操作,本發明亦有可能將該複合電容組体26增加其總電 容至接近於或甚至相等於在印刷電路板10或10 ’上所有元 件所需之總電容。 ~ 15 I? ffl ( Ρ\τ C ^ W 41;' ( ^ ** ' 經滴部中央標準局8工消#合作社印.¾ A6 _B6_ 五、發明説明() 如前述,每一導電箔係在每一單位區域内,具有足量 之銅,以使之具有足夠之結構強度及提供足夠之電流流通 路徑。更者,每一導電箔像以每一平方呎至少含有約0.5 安士(ounce)之鋦為佳,其厚度約為0.5密爾(mils),而以 約0.6至0.7密爾為更佳。其導電層之厚度亦可以予以增加 ,例如,在特定之應用中,為了滿足電源層及接地層之較 大之電壓值或電流承載能力。每一導電層最好在一平方呎 内包括有一至二安士之銅為較佳,其每一層之銅含量對應 於其厚度大約在1.2至1.4密爾之間。而最好該導電箔係以 大約每一平方呎有一安士之銅,或具有一厚度大約在1.2 至1.4密爾之間厚度為最佳,如此可以使電容薄層26之特 性逹到最好之特性。其在毎一導電箔之銅含量,係以達到 該導電層28及30在複合電容組体26之壓層處理之前,具有 良好結構強度而來決定其最小之含量。 該介電層36之成分及其厚度,係依提供足夠之電容 量而定,而根據分享電容之觀念,另其亦可使介電層36達 到應有之結構強度。 本發明所使用之介電材料之介電常數至少為4以上為 較佳。在現有技藝中所使用之介電材料中,其介電係數從 4-5之材料乃非常普遍。再者,該介電材料亦有可能是一 介電材料之組合型式,例如,由陶磁填充之樹脂,其具有 之介電常數可高至10以上。因此,在本發明較佳賁施例中 所使用之特定介電材料組合体中,其介電材料以具有至少 4以上之介電傜數者為佳,而以大約4-5範圍之較佳俗數 -16- (犄先閲請背面之注意事項再«寫本頁) 裝· 訂. .線- Λ *4m f n\'c \ π’ ^ y f r、、!,. s4^ 、 經濟部中央標準局WK工消費合作社印.k A6 _____B6 五、發明説明() 中,以4.7為最佳。如前所述,其目的是為了得到較高之 電容量。 為了得到較佳之介電傜數,可以藉由織線(woven)成 份及樹脂(resin)成份共同組合之組合体,來逹到所需之 介電僳數及較強固之結構体。該鐡線成分可以包括有高分 子聚合物(polymers),例如聚四氣乙嫌(polytetrafluo-roethylene)(商標名TEFLON及G0RETEX)及環氣基材料 (epoxies)。然而,該織布成分像由玻璃(glass)所形成為 較佳,該玻璃可以是石英類(quartz var iety)之材料,但 以矽砂(silica)為佳。該玻璃係以螺紋型態再以鐵線結合 之,然後以選定之樹脂浸漬或填充而構成一介電薄層。該 樹脂一般是選自具有防火特性之材料,且其可以包括有如 氡酸鹽脂(cyanate esters)、聚亞醒胺(polyimides)等材 料及其它之介電材料。然而,該樹脂像以環氣基(epoxy) 材料為佳,因其在現存技藉中製造此類印刷電路板有其存 在之優點。 該介電層由單一玻璃鐡線層及大約70 %重量之樹脂 所形成時,可以具有一較佳之介電偽數4.7,而在厚度在 大約1.5密爾時亦呈現有一良好之結構硬度。 本發明中之介電層之厚度之選定,不僅是為了達到所 想要之電容量,亦為了可確保電特性上之結構強度,特別 是為了防止複合電容26内各導電箔之短路現象。在導電層 與相鄰之介電層之間之表面,係以一般之技術予以處理, 以加強複合電容26内之黏合度。此種黏合,不僅為了結構 -17- 衣紙讯&度》用中SE«櫺w 4 (2】(、v: 1 (請先閲讀背面之注意事項再填寫本頁) .裝. 訂. 線· 經濟部中央標準局|0:工消^合作社卬4;__ A6 ___B6_ 五、發明説明() 之強度,且亦為了確保正確之電信號之操作。典型上,相 鄰之導電箔之表面俗以鍍上鋅或鋅銅(一種黃銅合金)材料 ,一般是以電鍍之方式,在導電箔之表面上形成粗糙之表 面,此對於精於此一技術者乃為習知者。這些粗糙之表面 是可提供齒狀表面,以加強導電層在各層36内與介電材料 之間之機械性結合。 本發明之另一重點,像在於導電箔28、30、32及34 。根據一般之簧務,每一導電箔之表面上,一般皆具有毛 面或鋸齒狀之表面,以及有另一平滑之表面。該導電箔之 具有齒狀表面之變化童,實質上係大於另一面平滑面之變 化程度。此種導電箔之産品,在市場上有數家廠商可以供 應,包括固得(Gould)電子公司及德州儀器(Texas)公司 皆有銷售。而由銅材料所形成之導電箔産品,則由固得 (Gould)公司以JTC之商標名在市場上銷售,其産品由固 得公司於1989年三月於俄亥俄州在産品型錄88401上發表 。其它由固得公司所行銷之導電箔産品包括有商標名LOW PROFILE ”JTC’ FOIL 及”TC/TC” DOUBLETREATED COPPER FOIL之産品,其分別發表在88406及88405産品型錄中 ,兩者皆由固得公司於1989年三月發表。 在電容組体26内,其導電箔之粗糙表面之變化量,一 般其變化程度係以稍大為佳,因為考慮到該導電箔,例如 對兩餾内導電箔30及32而言,其有可能在導電箔兩表面, 被使用在不同之電容元件。為了確保電容之結構強度,也 就是為了防止短路等,本發明乃提供數値不同之技術,以 *18- (請先W讀背面之注意事項再填寫本頁) 丨裝丨. 訂· 太f!« R 卢褅 Tb 闷!?0 定橒功(広 1 忾 d 0 V “ \ A6 B6 五、發明説明() 克服此一問題。 首先,可以增加該相鄰於導電箔粗糙面之介電層36之 厚度,以確保其與相對導電箔之所有表面部份有足夠之 間隔。另外,可以減少該導電箔之粗糙面上之表面變化量 ,例如,以軋壓或以磨光之方式。一般而言,軋壓操作可 以將導電箔予以軋壓延展,以減少導電箔上粗糙面之表面 變化量。在磨光操作中,部份導電箔材料會由粗糙面上被 磨去,以減少其導電箔之表面變化置。在使用軋壓或是磨 光之技術之時,如果有大量之介電材料被除去,則可能需 要有稍厚之導電箔。 另一種方法,是在該導電箔之粗糙表面上施以鍍層, 例如,以氣化物鍍覆之,其目的是可以將導電箔表面之變 化量予以減少。有蘭於此,其導電箔之兩表面僳先以傳統 之技術作表面之處理為較佳,以確保相鄰層之間(在本發 明中是指介電材料層36)之黏著度。 不論如何,該導電箔之表面上不同之表面變化量之問 題,可以以上述其中一或其它之方式予以消除或是減少。 由以上之說明,相倍對於電容性印刷電路板10或1(Γ 之處理方法,作清楚之描述。以下將對參閲圖七及圖八, 對如何形成複合旁路電容組体26之較佳之方法作一説明。 首先參閲圖t所示,其電容薄層40及42可以先以傳統 之壓層技術予以軋壓處理成型,該電容薄層40乃包括有電 源層28’、接層30’及介電層36A·。另一電容薄層42俗可類 您地包括有電源層32 ’及接地層34 ’以及配置在其間之介電 Ί9- (請先閱讀背面之注意事項再墙寫本K) .裝. 訂· 線.B6 Employee consumption of the Central Bureau of Standards of the Ministry of Economics ^ " made thorium stamps. 5. Description of the invention () The capacitive element includes one of the dielectric layers 36A, 36B and 36C. The first capacitor element includes a dielectric layer 36A and power layers and ground layers 28, 30, and the second capacitor element includes a dielectric layer 36B and ground and power layers 30, 32. The third capacitive element includes a dielectric layer 36C, a power layer, and ground layers 32 and 34. As can be seen from the above description, the composite bypass capacitor assembly 26 of FIG. 6 includes all three capacitor elements. At the same time, the capacitor assembly 26 includes three dielectric layers, which are the same as the number of capacitor elements in the capacitor assembly. The capacitor assembly also includes a four-tilt conductive foil or a number of conductive foils equal to the number of capacitive elements plus one. The above description illustrates the other important characteristic of the present invention, that is, the capacitor assembly has one or more composite conductive foils, and each tilted conductive foil image is located in two different capacitive components. This feature can reduce the cost of the capacitor assembly, because the conductive foil is an extremely cheap part of the capacitor assembly. At the same time, the composite structure of the capacitor assembly can make the volume of the capacitor assembly 26 smaller, which can greatly facilitate manufacturing. From the above description of the structure of the composite bypass capacitor assembly 26, it is possible to greatly increase the capacitance of the printed circuit board 10 or 10 'only by increasing the number of capacitor elements. It can also be seen from the above description that the capacitor assembly of the present invention has at least three conductive foils and a dielectric layer disposed between each adjacent two conductive foils. Furthermore, the capacitor assembly 26 in the present invention includes four or more conductive foils. As shown in FIG. 6, the structure of the preferred embodiment has three dielectric layers or more, which are respectively configured Between two adjacent tilted conductive foils. Please refer to Figure 4 again, it can be seen from any example of the capacitor assembly 26-(please read the precautions on the back and then ^ write this page) installed. .IT. Line · ruler m by pyang It does not have f 0υ ', "door one, -03〇 ^: ί Α6 _Β6_ V. Description of invention () (please pay attention to the precautions first! ^ This page}, the even-numbered conductive foil and odd-numbered conductive The foil is a power layer and a ground layer, respectively, which are separated by, for example, the wiring paths 34 and 36 as shown in FIG. 4. The composite capacitor assembly 26 is designed to be provided on the surface of the printed circuit board 10 or 10 ′ Or the actual required number of components. These components can be connected to the power layer and the ground layer through separate through-hole pins or through the surface wiring paths of the types shown in Figures 2 and 3. The required capacitance of the device is large, and the composite capacitor assembly 26 can be preferably constructed as the concept of the shared capacitor as described above, so that the printed circuit board 10 or 10 can be covered with less capacitance 'All components on the use. However, as mentioned above, the composite capacitor assembly 26 Supply capacitance to all components. That is, the combined capacitance elements in the capacitor assembly 26 can provide sufficient capacitance so that each individual electronic component has sufficient capacitance when it is in operation, to Ensure the correctness of its operation. Although the capacitor group 26 can use the shared capacitor operation method, the capacitance of the composite capacitor group 26 may also be increased. First, it may be in the composite capacitor group The number of capacitive elements is included in 26. In addition, the capacitance value of the capacitive element in each unit area may also be increased, for example, a dielectric material with a higher dielectric coefficient is used in the dielectric layer 36. Beigong " " -Cooperative Seal of the Central Standards Bureau of the Ministry of Economic Affairs:-Anyway, although the composite capacitor assembly 26 can be operated in a shared manner, the present invention may also increase the composite capacitor assembly 26 by its total capacitance Is close to or even equal to the total capacitance required for all components on the printed circuit board 10 or 10 '. ~ 15 I? Ffl (Ρ \ τ C ^ W 41;' (^ ** 'Central Standards Bureau 8 工 消 # 合印 印 .¾ A6 _B6_ V. Description of the invention () As mentioned above, each conductive foil has sufficient copper in each unit area, so that it has sufficient structural strength and provides sufficient current circulation path. In addition, each conductive foil image preferably contains at least about 0.5 ounces per square foot, and its thickness is about 0.5 mils, and more preferably about 0.6 to 0.7 mils. The thickness of the conductive layer can also be increased, for example, in specific applications, in order to meet the larger voltage value or current carrying capacity of the power layer and the ground layer. Each conductive layer preferably includes one to two within one square foot Anshi's copper is preferred. The copper content of each layer corresponds to a thickness of approximately 1.2 to 1.4 mils. Preferably, the conductive foil has about one ounce of copper per square foot, or has a thickness of about 1.2 to 1.4 mils, so that the characteristics of the capacitor thin layer 26 can be optimized The characteristics. The copper content in each conductive foil is such that the conductive layers 28 and 30 have good structural strength before the lamination of the composite capacitor assembly 26 to determine the minimum content. The composition and thickness of the dielectric layer 36 are determined by providing sufficient capacitance. According to the concept of shared capacitance, the dielectric layer 36 can also achieve the required structural strength. The dielectric material used in the present invention preferably has a dielectric constant of at least 4 or more. Among the dielectric materials used in the prior art, materials with a dielectric coefficient of 4-5 are very common. Furthermore, the dielectric material may also be a combined type of dielectric material, for example, a resin filled with ceramics, which has a dielectric constant of up to 10 or more. Therefore, in the specific dielectric material assembly used in the preferred embodiments of the present invention, the dielectric material is preferably one having a dielectric number of at least 4 or more, and preferably in the range of about 4-5 Vulgar number-16- (Please read the precautions on the back and then «write this page) Binding · Ordering ... Line-Λ * 4m fn \ 'c \ π' ^ yfr ,,! ,. s4 ^, printed by WK Industrial and Consumer Cooperatives, Central Bureau of Standards, Ministry of Economic Affairs. k A6 _____B6 V. In the description of invention (), 4.7 is the best. As mentioned earlier, the purpose is to obtain higher capacitance. In order to obtain a better dielectric number, a combination of a woven component and a resin component can be used to achieve the desired dielectric number and a stronger structure. The thread component may include high molecular polymers (polymers), such as polytetrafluo-roethylene (trade names TEFLON and GORETEX) and epoxies. However, it is preferred that the woven fabric component is formed of glass. The glass may be a quartz var iety material, but silica is preferred. The glass is screwed and then bonded with iron wire, and then impregnated or filled with the selected resin to form a thin dielectric layer. The resin is generally selected from materials with fire resistance properties, and it may include materials such as cyanate esters, polyimides, and other dielectric materials. However, the resin image is preferably epoxy-based (epoxy) material, because it has advantages in manufacturing such printed circuit boards in existing technologies. When the dielectric layer is formed of a single glass wire layer and approximately 70% by weight of resin, it can have a preferred dielectric pseudo-number of 4.7, and also exhibits a good structural hardness at a thickness of approximately 1.5 mils. The thickness of the dielectric layer in the present invention is selected not only to achieve the desired capacitance, but also to ensure the structural strength of the electrical characteristics, especially to prevent the short circuit of each conductive foil in the composite capacitor 26. The surface between the conductive layer and the adjacent dielectric layer is treated with general techniques to enhance the adhesion in the composite capacitor 26. This kind of bonding is not only for the purpose of the structure -17-Clothing Paper & Degree "SE« 擂 w 4 (2) (, v: 1 (please read the precautions on the back before filling in this page). Install. Order. Line · Central Bureau of Standards of the Ministry of Economy | 0: Gongxin ^ Cooperative Society 卬 4; __ A6 ___B6_ 5. The strength of the invention description (), and also to ensure the correct operation of the electrical signal. Typically, the surface of the adjacent conductive foil It is common to plate zinc or zinc copper (a brass alloy) material, usually by electroplating, to form a rough surface on the surface of the conductive foil, which is known to those skilled in this technology. These roughness The surface is provided with a toothed surface to enhance the mechanical bonding of the conductive layer within each layer 36 and the dielectric material. Another important point of the present invention is the conductive foils 28, 30, 32 and 34. According to the general Reed, each surface of the conductive foil generally has a rough surface or a saw-tooth surface, and another smooth surface. The change of the toothed surface of the conductive foil is substantially larger than the smooth surface of the other surface The degree of change. Such conductive foil products are available in the market It can be supplied by various manufacturers, including Gould Electronics and Texas Instruments. The conductive foil products formed of copper materials are marketed by Gould under the JTC brand name. The products sold by GOOD were published in the product catalog 88401 in Ohio in March 1989. Other conductive foil products marketed by GOOD include the trade names LOW PROFILE "JTC 'FOIL" and "TC / TC ”DOUBLETREATED COPPER FOIL products, which were published in 88406 and 88405 product catalogs, respectively, both were published by Good Company in March 1989. In the capacitor assembly 26, the amount of change in the rough surface of the conductive foil In general, the degree of change is preferably slightly larger, because considering the conductive foil, for example, for the two inner conductive foils 30 and 32, it may be used in different capacitive elements on both surfaces of the conductive foil. To ensure the structural strength of the capacitor, that is, in order to prevent short circuits, etc., the present invention provides a number of different technologies to * 18- (please read the precautions on the back before filling in this page) 丨 install 丨. Order · Too f! « R Lu Fang Tb boring !? 0 fixed lug function (広 1 忾 d 0 V "\ A6 B6 V. Description of the invention () To overcome this problem. First, the dielectric layer 36 adjacent to the rough surface of the conductive foil can be added The thickness is to ensure that it is sufficiently spaced from all the surface parts of the opposite conductive foil. In addition, the surface change of the rough surface of the conductive foil can be reduced, for example, by rolling or polishing. Generally In other words, the rolling operation can roll the conductive foil to reduce the surface change of the rough surface of the conductive foil. In the polishing operation, part of the conductive foil material will be removed from the rough surface to reduce its conductivity The surface of the foil changes. When rolling or polishing techniques are used, if a large amount of dielectric material is removed, a slightly thicker conductive foil may be required. Another method is to apply a plating layer to the rough surface of the conductive foil, for example, to coat it with a vaporized substance. The purpose is to reduce the amount of change in the surface of the conductive foil. For the blue, the two surfaces of the conductive foil are preferably treated with conventional techniques to ensure the adhesion between adjacent layers (referred to as the dielectric material layer 36 in the present invention). In any case, the problem of different surface variations on the surface of the conductive foil can be eliminated or reduced in one or other of the above ways. Based on the above description, the processing method of the capacitive printed circuit board 10 or 1 (Γ) is clearly described. The following will refer to FIGS. 7 and 8 to compare how to form the composite bypass capacitor assembly 26 A good way to make a description. First of all, as shown in FIG. T, the capacitor thin layers 40 and 42 can be rolled and formed by conventional lamination technology. The capacitor thin layer 40 includes a power layer 28 'and a bonding layer 30 'and dielectric layer 36A. Another capacitor thin layer 42 can be similar to yours, including the power layer 32' and the ground layer 34 'and the dielectric Ί9- disposed between them (please read the precautions on the back before the wall Writing K). Packing. Threading.

經濟部中央標準局爵工消^:合作社^- 五、發明説明() 層36C*。 然後以傳統之技術對該電容薄層40及42予以硬化處理 ,該内部導電箔30’及32’係蝕刻成如圖七中所示之形狀, 以使得所需之貫穿孔以及例如如圖四中所示之符號34、36 、及3δ等路徑之貫穿通過。 然後,將一未硬化之介電材料層36Β*置於該已蝕刻之 導電箔30’及32’之間。然後,再將該含有未硬化之介電層 36Β'之電容薄層40及42之組合体予以軋壓並予以硬化,如 此以形成一完整之複合旁輅電容薄層26’,其示於圈八中 。其導電箔28’及3^可以在以上之複合旁路電容組体26* 壓層處理之後,而在整健電容組体26,結合至一印刷電路 板(如其它圖示中所標示之10或10·)之前,予以作蝕刻之 處理,如圖八所示。 以上已對本發明之一實施例中,如何形成一複合旁路 電容組体或内部電容及電容性印刷電路板之方法及製造作 —詳細說明。 以下將參閲圖九至圖十二所示,對本發明之另一實施 例作一說明如下,其傜示意以本發明之特殊處理步驟來形 成一電容性之印刷電路板,並且同時在該印刷電路板内形 成一内部旁路電容者。參閲國九所示,其構成組件偽以符 號44予以檫示,以形成一如圖一至匾四所標示符號1〇及10 ’之電容性印刷電路板。該組合体44包括有導電箔28,及30 ',分別配置在一介電層32’之正反面上,以形成一電容元 件26’。在圓九之組合体中,重要的是該介電層或落辱32’ -20- (請先閱讀背面之注意事項再蜞寫本頁) 裝-丨 訂 I TV» tv-Ί -V* A6 B6 五、發明説明() 像未經硬化處理或是在傳統之印刷電路板專業術語中被稱 為” B”階段者。另外,例如以符號40’及42’榡示之層,偽 被配置在該導電箔28’及3(Γ之反面上。較佳地,該靥4(Γ 及42’係分別壓層结合於介電之導電箔28’及30’,使得導 電箔可以在其被結合於組合体44之内部作業之前,予以蝕 刻。更佳地,該導電箔2V及30’之形成係作為該印刷電路 板10'之電源層及接地層。依據傅統印刷電路板之實務, 該導電箔或電源層及接地層28’及30’之部份區域,偽予以 蝕刻或予以除去。如此,可以使得在印刷電路板内之貫穿 孔形成時,可以容置例如在圖四中以符號34、36、及38標 示之引線。 另外之導電箔層46及48可以被結合於該層4(Γ及42’之 外部表面上。層40’及42’俗由介電材料所形成,其會在連 同外部之導電箔46、48受軋壓结合於導電箔28’及30’之時 ,被轉換成一完全硬化或稱為”C”等级之介霄層。 在如圖九中所示之構成組件之组合体44中,可以用傳 統之最後壓層步驟中施以熱及壓力,連同包括有導電箔28 ’及30’及介電靥32'之電容元件26’之薄層,而形成例如圖 一至四之符號10或10'標示之印刷電路板。在該最後之壓 層步驟中》該介電層32’偽被軋壓結合於導電箔28’及30* 之兩面,且亦類似於該層40’及42’般,被轉換為完金硬化 或"C”等级之狀態。 本發明之方法,將在圖十Α及十Β中作更進一步之說明 。參閲圖十A所示,首先是形成一初步之_餍5(\其包括 -21- (請先閲讀背面之注意事項再場寫本頁) ·—裝‘ 訂· 經濟部中央標準局S工消費合作社印^ ?1·- Π 户;* tn th p” P f 押现 f τ ·‘ 4*· ' m h、 ,036 A6 B6 烴濟部中央標準局员工消費合作社印β 五、發明説明() 有一具有導電箔28’及46'之完全硬化之介電層40’,其導 電箔係結合在介電層之兩面上。 同時參閲圖十B所示,其導電箔28’之之作用像作為印 刷電路板之電源層,該形成之導電箔28’可予以蝕刻如圖 十B所示,其目的已如前述。 參閲圖十C所示,另一薄層52僳以類似於前述薄層50 之方法來形成。該薄層52包括有另一印刷電路板層42’及 導電箔30’及48’。該導電箔30’係作為一印刷鬣路板之接 地層,且其亦以類似於圖十B中導電箔28’之蝕刻方式予以 蝕刻。 再繼缠參閲圖+ C所示,未硬化之介電層32’像配置在 薄層50及52之間,以使之相結合於相鄰之導電箔之間或是 電源層及接地層28’、30’之間。 將壓層50及52分別結合在未硬化之介電層32'之兩面 ,如圖十C所示,然後以如前所述形成一印刷電路板之傳 統壓層步驟,施以熱及II力於該組合体,而使介電層32’ 及導電箔28’及30’形成該電容元件26’。因此,該最後之 壓層步驟可使未硬化之介電層32’轉變成一完全硬化或稱 為”C”等级之特性。圖十C之構造經前述之最後壓層步驟 處理之後,即形成了一如圖十D所示之完整電容性印刷電 路板10’。 前述之方法中,參照圖九及圖十A至十D所示,亦可以 在最後之壓層步驟中,在印刷電路板内形成另外之電容元 件組体,其步驟乃類似於形成該電容元件26’之處理步驟 -22- (請先閱$面之注$項再蟥窝本頁) .裝. 訂· —線. 本紙張八及適用中囷Ε家標準(CNS>甲4 <格(210 X 297公f > A6 B6 經濟部中央標準局員工;«©:合作社印纪 五、發明説明() 。然而此結構並未顯示在圖示中,只簡單地以符號26及 26’標示者來表示之,該另外之電容元件之形成亦傺在一 印刷電路板之最後壓層步驟中所形成者,且最好是由另一 印刷電路板層(未示)來予以區隔。 本發明之方法,亦試圖提供一將該電容元件形成一複 合旁路電容組体之方法,其複合之旁路霄容,將藉由以下 之說明,及參閲國十一及圖+二所示,予以敘述如下。 參閲圖十一所示,其顯示一分解之組合体54包括有 薄層50’及52’,其類似於如園+ A至十D所示之薄層50及52 。一額外之薄層56係設置在該組合体54之内及薄層50'及5 2’之間。該薄層56包括有一完全硬化之介電層5δ結合於導 電箔60及62之結構。 在前述之組合体中,該導電箔60及62像作為圖十一中 印刷電路板之電源層之用,而導電箔30’及60則像作為印 刷電路板之接地層。所有之導電箔28·、30’、60、及62 可以在有需要時,在分別結合於其介電層之後,予以作蝕 刻之處理。 然後,未硬化之介電層64及66像分別地設置在導電箔 28'、60、30’及62之間。然後對該組合体54予以作加熱及 加壓之處理,其處理方式,偽以傳統技術中,形成一印刷 電路板之最後之壓層步驟予以處理,並同時形成一複合旁 路電容组体64。該組体64包括有三個電容元件,分別由導 電箔28’及60及介電層64、導電箔60及62及介電層58、導 罨箔30’及62及介電層66所構成。該介電層64及66在最g -23- (請先閲讀背面之注意事項再^寫本頁> .裝. 訂. .線. 本紙迺用中國國家桴準(CNS)甲4规格(2】0 X 297公妗)The Ministry of Economic Affairs, Central Bureau of Standards ^: Cooperative Society ^-Fifth, the invention description () layer 36C *. Then, the capacitor thin layers 40 and 42 are hardened by conventional techniques, and the inner conductive foils 30 'and 32' are etched into the shape as shown in FIG. 7 to make the required through holes and, for example, as shown in FIG. The symbols 34, 36, and 3δ shown in the figure pass through. Then, an unhardened dielectric material layer 36B * is placed between the etched conductive foils 30 'and 32'. Then, the assembly of the capacitor thin layers 40 and 42 containing the unhardened dielectric layer 36B 'is rolled and hardened to form a complete composite side capacitor thin layer 26', which is shown in the circle Eight. The conductive foils 28 'and 3 ^ can be combined with the above composite bypass capacitor assembly 26 * after lamination, and after the capacitor assembly 26 is strengthened, it is bonded to a printed circuit board (as indicated by 10 in other illustrations) Or 10 ·) before it is etched, as shown in Figure 8. In the above, in one embodiment of the present invention, how to form a composite bypass capacitor assembly or internal capacitor and capacitive printed circuit board has been described in detail. In the following, referring to FIGS. 9 to 12, another embodiment of the present invention will be described as follows. It shows that a special processing step of the present invention is used to form a capacitive printed circuit board, and the An internal bypass capacitor is formed in the circuit board. As shown in Guo Jiu, its components are pseudo-indicated by the symbol 44 to form a capacitive printed circuit board with symbols 10 and 10 'as shown in symbols 1 to 4 of the plaque. The assembly 44 includes conductive foils 28, and 30 ', which are respectively disposed on the front and back surfaces of a dielectric layer 32' to form a capacitive element 26 '. In the group of Yuanjiu, the important thing is that the dielectric layer or shame 32 '-20- (please read the precautions on the back before writing this page) 装 装-丨 ITV »tv-Ί -V * A6 B6 Fifth, the description of the invention () Like those who have not been hardened or are called the "B" stage in traditional printed circuit board terminology. In addition, for example, the layers indicated by symbols 40 ′ and 42 ′ are pseudo-arranged on the opposite sides of the conductive foils 28 ′ and 3 ′. Preferably, the layers 4 ′ and 42 ′ are respectively laminated and bonded to Dielectric conductive foils 28 'and 30', so that the conductive foil can be etched before it is incorporated in the assembly 44. Preferably, the conductive foils 2V and 30 'are formed as the printed circuit board 10 'power layer and ground layer. According to the practice of Futong printed circuit board, part of the conductive foil or power layer and ground layer 28' and 30 'are pseudo-etched or removed. In this way, it can be printed When the through-holes in the circuit board are formed, for example, the leads marked with symbols 34, 36, and 38 in FIG. 4 can be accommodated. In addition, the conductive foil layers 46 and 48 can be bonded to this layer 4 (Γ and 42 ′ On the outer surface. Layers 40 'and 42' are usually formed of dielectric materials, which will be converted into a fully hardened or fully hardened or conductive foil 46, 48 when combined with conductive foils 28 'and 30' Referred to as the "C" level mezzanine layer. In the group of components shown in Figure 9 In the combined body 44, heat and pressure can be applied in the conventional final lamination step, together with a thin layer of the capacitive element 26 'including the conductive foils 28' and 30 'and the dielectric layer 32', for example, to form Figures 1 to 4 The printed circuit board marked with the symbol 10 or 10 '. In the final lamination step, the dielectric layer 32' is pseudo-rolled and bonded to both sides of the conductive foils 28 'and 30 *, and is also similar to the layer 40 'And 42', it is converted to the state of gold hardening or " C ". The method of the present invention will be further explained in FIGS. 10A and 10B. Referring to FIG. 10A, first Is to form a preliminary _ 餍 5 (\ including -21- (please read the precautions on the back and then write this page) ·-installed 'order · printed by the S Industry and Consumer Cooperative Cooperative of the Central Bureau of Standards of the Ministry of Economy ^? 1 ·- Π household; * tn th p ”P f cash f τ · '4 * ·' mh,, 036 A6 B6 Printed β by the employee consumer cooperative of the Central Bureau of Standards of the Ministry of Hydrocarbon Economy V. Description of invention () There is a conductive foil 28 'and 46 'of the fully hardened dielectric layer 40', the conductive foil is bonded on both sides of the dielectric layer. Also refer to FIG. The foil 28 'functions like a power layer for a printed circuit board, and the formed conductive foil 28' can be etched as shown in FIG. 10B, and its purpose is as described above. Refer to FIG. 10C for another thin layer 52 is formed by a method similar to the aforementioned thin layer 50. The thin layer 52 includes another printed circuit board layer 42 'and conductive foils 30' and 48 '. The conductive foil 30' is used as a printed board Ground layer, and it is also etched in a similar manner to the conductive foil 28 'in Figure 10B. Then refer to Figure + C, the unhardened dielectric layer 32' is arranged in the thin layers 50 and 52 Between the adjacent conductive foils or between the power layer and the ground layer 28 ', 30'. Combine the lamination layers 50 and 52 on both sides of the unhardened dielectric layer 32 'as shown in Figure 10C, and then apply the heat and II force in the conventional lamination step of forming a printed circuit board as described above In the assembly, the dielectric layer 32 'and the conductive foils 28' and 30 'form the capacitor element 26'. Therefore, this final lamination step can transform the uncured dielectric layer 32 'into a fully cured or "C" grade characteristic. After the structure of Fig. 10C is processed by the aforementioned final lamination step, a complete capacitive printed circuit board 10 'as shown in Fig. 10D is formed. In the foregoing method, referring to FIGS. 9 and 10A to 10D, it is also possible to form another capacitor element assembly in the printed circuit board in the final lamination step, the steps are similar to the formation of the capacitor element 26's processing steps -22- (please read the $ face of the note first and then the page of this page). Packing. Ordering --- Line. This paper is eight and applicable to the Chinese standard (CNS > A4 < Grid (210 X 297 public f > A6 B6 Employee of the Central Bureau of Standards of the Ministry of Economic Affairs; «©: Cooperative seal V. Description of invention (). However, this structure is not shown in the figure, only the symbols 26 and 26 ' As indicated by the labeler, the formation of the additional capacitive element is also formed in the final lamination step of a printed circuit board, and is preferably separated by another printed circuit board layer (not shown). The method of the present invention also attempts to provide a method of forming the capacitor element into a composite bypass capacitor assembly. The composite bypass capacity will be described by the following, and refer to the National Eleven and Figure + Two The description is as follows. Refer to FIG. 11 which shows a disassembled assembly 54 packets There are thin layers 50 'and 52', which are similar to the thin layers 50 and 52 as shown in Yuan + A to XD. An additional thin layer 56 is provided in the assembly 54 and the thin layers 50 'and 5 Between 2 '. The thin layer 56 includes a structure in which a completely hardened dielectric layer 5δ is bonded to the conductive foils 60 and 62. In the aforementioned combination, the conductive foils 60 and 62 are used as printed circuit boards in FIG. The power supply layer is used, and the conductive foils 30 'and 60 are used as the ground layer of the printed circuit board. All the conductive foils 28 ·, 30', 60, and 62 can be combined with their dielectrics if necessary. After the layer, it is etched. Then, the unhardened dielectric layers 64 and 66 are respectively disposed between the conductive foils 28 ', 60, 30' and 62. The assembly 54 is then heated and added The processing method of pressing is assumed to be processed in the final layer pressing step of forming a printed circuit board in the conventional technology, and at the same time forming a composite bypass capacitor assembly 64. The assembly 64 includes three capacitor elements, Conductive foils 28 'and 60 and dielectric layer 64, conductive foils 60 and 62 and dielectric layer 58, conductive foil 30 'and 62 and the dielectric layer 66. The dielectric layers 64 and 66 are at the most g -23- (please read the precautions on the back first and then ^ write this page>. Packing. Ordering .. Line. This paper. Use China National Standards (CNS) Grade 4 (2) 0 X 297 Gongju)

經'济部中央標準局KX工消办:合作社印5C A6 ____B6_ 五、發明説明() 之壓層步驟中,轉變為完全硬化或”c”等级。在组体64之 内部,其導電箔,特別是標示60及62者,俗包括有數個電 容元件,以對印刷電路板逹到較大效果及增加其«容量。 參閲圖+二所示,其顯示另一形成一電容性印刷電路 板之分解構成圈,其以符號68樣示之。該组合体68包括有 薄層50’、52’及56’,其類似於園十一中所示之薄層。另 外,該组合体68包括有另一薄層70,其像由介電層76及導 電箔72及74之結合結構所形成。 未硬化之介電材料層乃分別擦示以78、80及82,其像 分別配置在相鄰之導電箔28’、60'; 62’、72;及30’、74 之間。該組合体68之構成部份,亦以傳統之壓層步驟中之 加熱及加壓處理,以形成該印刷電路板,並同時形成一複 合之旁路電容组体84,其旁路電容組体乃包括有五姮電容 元件,分別由相鄰之導電箔及相間之介電層所形成。 在如前述及如圖十一及圈十二所示之本發明方法中可 知,其電容元件傺由壓層或由未硬化介電層轉變為完全硬 化所形成,而其它額外之電容元件則傜在如前所述最後之 壓層步驟中予以壓層處理結合。有關於此,本發明中,其 電容元件之至少其中之一傜由未硬化之介電層轉變為完全 硬化狀態所形成。 已發現該電容性之印刷電路板之設計,係為了提供設 置在電路板上所有或部份電子元件所需之電容置。該電子 元件可以如分別如圖二及三所示,藉由各別之貫穿孔插脚 或表面佈線路徑,而舆電源餍及接地展相逄接。如圈+ — -24- ¾--------.IT------.^ {請先閲讀背面之注意事項再填寫本頁) 士 “ ΓΓ. I·产〆彳,π’ P,一…π 〆.· ......·. ...... 經濟部中央標準局貝工消费合作社印si A6 ____B6_ 五、發明説明() 及圖+二所示,經由複合旁路電容組体,而連結於該電源 層及接地層俗,如此以確保在每一組体中之電容元件之並 聯操作。 因為整個電路板上之電子裝置所需求之實質電容量, 本發明之電容性印刷電路板,像以前述分享式電容之操作 方式為佳,此方式中,其在電容性印刷電路板内全部之電 容元件之電容量,俗少於電路板上所有元件所需之電容量 。然而,如前所述,本發明電容性印刷電路板有能力提供 足夠之電容量,其相等於或大於電路板上元件所需之電容 量。如此可以充許印刷電路板上之所有之元件在同一時候 作動。如前所述,為了增加電容值,可以藉由增加印刷電 路板内之電容元件數目及/或在電容元件中使用較高介電 傜數之介電材料,而獲致較高之電容值。 如前所述,該電容性印刷電路板内之導電箔俗以每一 單位具有足夠之銅含量或導電之材料所構成,以逹到應有 之結構強度或本身之強度,亦可提供足夠之電流流通路徑 。更者,每一導電箔偽以至少毎一平方呎具有約0.5安士 之銅材料所構成,此含量一般之厚度大約為0.5密爾,以 大約0.6-0.7密爾為佳。其導電層之厚度,在特別之應用 場合中,為了要使電源層及接地層能承受較大之電壓或電 流承載能力,可以將導電層之厚度予以增加。較佳地,每 一導電層包括有每一平方呎大約有卜2安士之銅含量,其 含量對應於各別層之厚度約為1.2-2.4密爾。更佳地,該 導電箔俗似大約每一平方呎大約一安士之材料所形成,或 -25- 本紙尺度近用中ΘΕ3家標準(CNS)甲4規格(21() X M7公彳) (請先閲讀背面之注意事項再瑣寫表買) -裝. 訂. 線.The KX Industrial and Consumer Affairs Office of the Central Standards Bureau of the Ministry of Economy: Cooperatives printed 5C A6 ____B6_ V. In the lamination step of the invention description (), it was changed to full hardening or "c" grade. Inside the assembly 64, its conductive foil, especially those marked with 60 and 62, usually includes several capacitors to achieve a greater effect on the printed circuit board and increase its capacity. Referring to Figure +2, it shows another disassembled forming circle forming a capacitive printed circuit board, which is shown by the symbol 68. The assembly 68 includes thin layers 50 ', 52', and 56 ', which are similar to the thin layers shown in Figure 11. In addition, the assembly 68 includes another thin layer 70, which is formed by the combined structure of the dielectric layer 76 and the conductive foils 72 and 74. The unhardened dielectric material layers are shown at 78, 80, and 82, respectively, and their images are disposed between adjacent conductive foils 28 ', 60'; 62 ', 72; and 30', 74, respectively. The components of the assembly 68 are also heated and pressurized in the conventional lamination step to form the printed circuit board, and at the same time form a composite bypass capacitor assembly 84, which bypass capacitor assembly It includes five-bar capacitive elements, which are respectively formed by adjacent conductive foils and interphase dielectric layers. In the method of the present invention as described above and shown in FIGS. 11 and 12, it can be seen that the capacitance element ye is formed by lamination or from an unhardened dielectric layer to complete hardening, while other additional capacitance elements are In the last lamination step described above, lamination treatment is combined. In relation to this, in the present invention, at least one of the capacitor elements is formed from the unhardened dielectric layer to a fully hardened state. It has been found that the design of the capacitive printed circuit board is to provide the capacitance required for all or part of the electronic components placed on the circuit board. The electronic components can be connected as shown in Figures 2 and 3, respectively, through different through-hole pins or surface wiring paths, and power and ground. Ruhuan + — -24- ¾ --------. IT ------. ^ {Please read the precautions on the back before filling this page) 士 "ΓΓ. I · 产 〆 彳, π 'P, one ... π 〆....... ........................................................................................... The invention description () and Figure + 2 are shown by The composite bypass capacitor group is connected to the power layer and the ground layer, so as to ensure the parallel operation of the capacitive elements in each group. Because of the actual capacitance required by the electronic device on the entire circuit board, this The capacitive printed circuit board invented is better like the operation method of the shared capacitor described above. In this method, the capacitance of all the capacitive elements in the capacitive printed circuit board is generally less than that required by all the components on the circuit board. However, as mentioned above, the capacitive printed circuit board of the present invention has the ability to provide sufficient capacitance, which is equal to or greater than the required capacitance of the components on the circuit board. All the components operate at the same time. As mentioned above, in order to increase the capacitance value, you can Add the number of capacitive elements in the printed circuit board and / or use a higher dielectric number of dielectric materials in the capacitive element to obtain a higher capacitance value. As mentioned above, the conductivity in the capacitive printed circuit board The foil is composed of a material with sufficient copper content or conductivity per unit, to achieve the required structural strength or its own strength, and can also provide sufficient current circulation path. Furthermore, each conductive foil is Each square foot is composed of about 0.5 ounces of copper material, and the thickness of this content is generally about 0.5 mil, preferably about 0.6-0.7 mil. The thickness of the conductive layer, in special applications, in order to To make the power layer and ground layer can withstand greater voltage or current carrying capacity, the thickness of the conductive layer can be increased. Preferably, each conductive layer includes a copper content of about 2 ounces per square foot , The content of which corresponds to the thickness of each layer is about 1.2-2.4 mils. More preferably, the conductive foil is formed from a material of about one ounce per square foot, or -25 ΘΕ3 standards (CN S) A4 specifications (21 () X M7) (Please read the precautions on the back before writing the table to buy)-Pack. Order. Thread.

經濟部中央標準局员工消費合忭社印^: A6 _B6__ 五、發明説明() 是以具有大約1.2-2.4密度厚度之材料所形成,以逹到電 容薄層之最佳操作特性。其毎一導電箔内銅之最少含量, 傜決定於其在軋壓結合在電容元件内之前,可在導電層中 達到應有之結構強度為考廉點。 該介電層之成分及厚度選擇偽可逹到所需之電容量, 其乃依據分享式電容之觀念,同時,亦是為了使介電靥在 結合於複合電容組体内之前及之後,皆能逹到應有之結構 強度。 本發明所提供之介電材料,乃具有一至少大約為4之 介電係數,其介電材料在現有之技藝中,具有大約4-5範 圍之介電像數之産品乃廣泛被使用。更者,其有可能組合 該介電材料之組成成分,例如,由陶磁填充之環氣基,其 具有高逹10以上之介電係數。因此,本發明使用一具有至 少約4之介電係數之材料為佳,而以使用在本發明之特定 實施例中,大約4-5範圍之介電係數中,以4.7為最佳。然 而,如前所述,本發明亦希望能得到更高之電容量。 在本發明中,可以藉由織線成份及樹脂成份共同組合 之組合体,來達到所需之介電係數及較強固之結構体。該 織線成分可以包括有高分子聚合物,例如聚四氟乙烯(商 檫名TEFLON及G0RETEX)及環氣基材料。然而,該織布成 分係由玻璃之材料所形成為較佳,該玻璃可以是石英類之 材料,但以矽砂為較佳。該玻璃傜以螺紋型態再以織線結 合之,然後以選定之樹脂浸漬或填充而構成一介電薄層。 該樹脂一般是選自具有防火特性之材料,且其可以包括有 -26- 本紙張尸、度通用中四四家棕準(CKS)甲見(210 X 297二、 (請先閔讀背面之注意事項再<寫本買) •裝. 訂. 線· A6 B6 經濟部中央標準局貝工消费合作社印以 五、發明説明() 如氰酸鹽脂、聚亞醛胺等材料及其它之介電材料之成分。 然而,該樹脂偽以璟氣基材料為佳,因其在現存技蓊中製 造此類印刷電路板作有其優點。 該介電層由單一玻璃織線層及大約70 %重童之樹脂 所形成時,可以具有一較佳之介電像數4.7,而在厚度在 大約1.5密爾時亦呈現有一良好之結構硬度。 介電層之厚度,不僅是為了逹到所想要之電容量,亦 為了可確保電待性上之結構強度,待別是為了防止複合電 容内各導電箔之短路現象。在導電層與相鄰之介電層之間 之表面,僳以一般之技術予以處理,以加強複合電容内之 黏合度。此種黏合,不僅為了結構之強度,旦亦為了確保 正確之電信號之操作。典型上,相鄰之導電箔之表面係以 鍍上鋅或鋅銅(一種黃銅合金)材料,一般是以電鍍之方式 ,在導電箔之表面上形成粗糙之表面,此對於精於此一技 術者乃為習知者。這些粗糙之表面是可提供齒狀表面,以 加強導電層在各層内與介電材料之間之機械性結合。 本發明之另一特點偽在於各導電箔之結構。根據一般 之實務,每一導電箔之表面上,一般皆具有毛面或鋸齒狀 之表面,以及有另一平滑之表面。該導電箔之具有齒狀表 面之變化量,簧質上係大於另一面平滑面之變化程度。此 種導電箔之産品,在市場上有數家廠商可以供應,包括固 得電子公司及德卅儀器公司皆有銷售。而由銅材料所形成 之導電箔産品,則由固得公司以JTC之商標名在市場上銷 售,其産品由固得·公司於19抑年三月於俄亥俄州在里品罕 -27- (精先«讀背面之注意事項再堉寫本頁) --裝. -1T. .線. 本紙張尺度適用中國國家標準(CNS)甲4规格(210 X 297公f ) 經濟部中央標準局员工消费合作社印芡 A6 _____B6_ 五、發明説明() 錄88401上發表。其它由固得公司所行銷之導電箔産品包 括有商檫名”JTC'及”TC/TC”之産品,其分別發表在884 06及88405産品型錄中,兩者皆由固得公司於1989年三 月發表。 在電容組体内,其導電箔之粗糙表面之變化量,一般 其變化程度係以稍大為佳,因為考慮到該導罨箔,例如對 兩傾内導電箔而言,其有可能在導電箔兩表面,被使用在 不同之電容元件。為了確保電容之結構強度,也就是為了 防止短路等,本發明乃提供數個不同之技術,以克服此一 問題。 首先,可以增加該相鄰於導電箔粗糙面之介電層之厚 度,以確保其與相對_導電箔之所有表面部份有足夠之間 隔。另外,可以減少該導電箔之粗糙面上之表面變化量, 例如,以軋壓或以磨光之方式。一般而言,軋壓操作可以 將導電箔予以軋壓延展,以減少導電箔上粗糙面之表面變 化量。在磨光操作中,部份導電箔材料會由粗糙面上被磨 去,以減少其導電箔之表面變化量。在使用軋壓或是磨光 之技術之時,如果有大量之介電材料被除去,刖可能需要 有稍厚之導電箔。 另一種方法,是在該導電箔之粗糙表面上施以鍍層, 例如,以氧化物鍍覆之,其目的是可以將導電箔表面之變 化量予以減少。有關於此,其導電箔之兩表面係先以傳統 之技術作表面之處理為較佳,以確保相鄰層之間(在本發 明中是指介電材料層)之黏著度。 (請先閲讀背面之注意事項再^寫本頁> 丨裝· 訂. 丨線. *28 * A6 B6 五、發明説明() 不論如何,該導電箔之表面上不同之表面變化量之問 題,可以以上述其中一或其它之方式予以消除或是減少。 以上業已對本發明中,如何在一印刷電路板内形成電 容性元件之各種處理方法予以敘述。 除了以上所述本發明之數個實施例之外,其它種種之 修飾及變更,對於精於此一技藝者應可輕易理解。因此, 本發明之範圍僅是由以下之專利範圍予以界定,其亦包括 有本發明中之其它實施例。 (請先閲讀背面之注意Ϋ項再«寫本買) -裝. 訂. 線· 經濟部中央標準局员工消费合作社印'fcPrinted by the Employee Consumption Union of the Central Bureau of Standards of the Ministry of Economic Affairs ^: A6 _B6__ 5. Description of the invention () It is formed of a material with a density of about 1.2-2.4 to achieve the best operating characteristics of thin layers of capacitors. The minimum amount of copper in each conductive foil is determined by its ability to achieve the required structural strength in the conductive layer before being rolled into the capacitor element. The composition and thickness of the dielectric layer can be selected to achieve the required capacitance, which is based on the concept of shared capacitors. At the same time, it is to enable the dielectric layer to be combined before and after being combined in the composite capacitor group. Get the structural strength it deserves. The dielectric material provided by the present invention has a dielectric coefficient of at least about 4. In the existing technology, products with a dielectric image number in the range of about 4-5 are widely used. Furthermore, it is possible to combine the composition of the dielectric material, for example, a ring gas base filled with ceramics, which has a high dielectric constant of 10 or more. Therefore, the present invention preferably uses a material having a dielectric constant of at least about 4. In particular embodiments of the present invention, a dielectric constant of about 4-5, preferably 4.7, is used. However, as mentioned above, the present invention also hopes to obtain higher capacitance. In the present invention, the required dielectric constant and stronger structure can be achieved by the combination of the combination of the thread component and the resin component. The thread component may include high molecular polymers such as polytetrafluoroethylene (trade names TEFLON and GORETEX) and ring gas-based materials. However, the woven fabric component is preferably formed of glass material. The glass may be quartz-like material, but silica sand is preferred. The glass gauze is combined with a thread and then woven, and then impregnated or filled with a selected resin to form a thin dielectric layer. The resin is generally selected from materials with fire resistance properties, and it can include -26- this paper corpse, Duke General Four, Four and Four Brown Standards (CKS), see (210 X 297 II, (Please read the back of the first Matters needing attention again < Writing book to buy) • Packing. Ordering. Line • A6 B6 The Ministry of Economic Affairs Central Standards Bureau Beigong Consumer Cooperatives printed with five. Description of invention () Materials such as cyanate grease, polyaldimine, etc. The composition of electrical materials. However, the resin is preferably based on Jing gas-based materials, because of its advantages in manufacturing such printed circuit boards in existing technologies. The dielectric layer consists of a single glass woven layer and about 70% Chongtong's resin can have a better dielectric image number of 4.7, and it has a good structural hardness when the thickness is about 1.5 mils. The thickness of the dielectric layer is not only for achieving the desired The electrical capacitance is also to ensure the structural strength of the electrical performance, and to prevent the short circuit phenomenon of each conductive foil in the composite capacitor. The surface between the conductive layer and the adjacent dielectric layer is generally Technology to deal with, in order to strengthen the bonding in the composite capacitor This kind of bonding is not only for the strength of the structure, but also to ensure the correct operation of the electrical signal. Typically, the surface of the adjacent conductive foil is coated with zinc or zinc copper (a brass alloy) material, generally A rough surface is formed on the surface of the conductive foil by electroplating, which is known to those skilled in this technology. These rough surfaces can provide a toothed surface to strengthen the conductive layer in each layer and Mechanical bonding between dielectric materials. Another feature of the invention lies in the structure of each conductive foil. According to general practice, the surface of each conductive foil generally has a rough surface or a zigzag surface, and there are Another smooth surface. The conductive foil has a variation of the toothed surface, the spring quality is greater than the change of the smooth surface on the other side. There are several manufacturers of such conductive foil products on the market, including solid Both the electronics company and Dezhou Instrument Company sell it. The conductive foil products formed of copper materials are sold on the market by the company under the JTC brand name, and the products are sold by the company. In March 19th in Ohio in Lipinhan-27- (precise «read the notes on the back and then write this page) --installed. -1T. Thread. This paper scale is applicable to the Chinese National Standard (CNS ) A4 specifications (210 X 297 gf) A6 _____B6_ of the Consumers ’Cooperative of the Central Bureau of Standards of the Ministry of Economic Affairs, A6 _____B6_ V. Description of the invention () published on Record 88401. Other conductive foil products marketed by Good Company include trade names The products of "JTC" and "TC / TC" were published in the product catalogs of 884 06 and 88405, respectively, both of which were published by Good Company in March 1989. The rough surface of the conductive foil in the capacitor assembly The amount of change is generally slightly larger, because considering the conductive foil, for example, for a two-pitch inner conductive foil, it may be used in different capacitive elements on both surfaces of the conductive foil. In order to ensure the structural strength of the capacitor, that is, to prevent short circuits, the present invention provides several different techniques to overcome this problem. First, the thickness of the dielectric layer adjacent to the rough surface of the conductive foil can be increased to ensure sufficient separation from all surface portions of the opposing conductive foil. In addition, the amount of surface change on the rough surface of the conductive foil can be reduced, for example, by rolling or polishing. In general, the rolling operation can roll the conductive foil to reduce the amount of surface change on the rough surface of the conductive foil. In the polishing operation, part of the conductive foil material will be removed from the rough surface to reduce the amount of surface change of the conductive foil. When using rolling or polishing techniques, if a large amount of dielectric material is removed, a slightly thicker conductive foil may be required. Another method is to apply a plating layer to the rough surface of the conductive foil, for example, to coat it with an oxide, the purpose of which is to reduce the amount of change in the surface of the conductive foil. Regarding this, the two surfaces of the conductive foil are preferably treated by conventional techniques to ensure the adhesion between adjacent layers (referred to as dielectric material layers in the present invention). (Please read the precautions on the back first ^ write this page > 丨 installation and ordering. 丨 line. * 28 * A6 B6 Fifth, the description of the invention () No matter what, the problem of different surface changes on the surface of the conductive foil It can be eliminated or reduced in one or other of the above ways. The above has described various processing methods of how to form a capacitive element in a printed circuit board in the present invention. In addition to several implementations of the present invention described above In addition to the examples, various modifications and changes should be easily understood by those skilled in this art. Therefore, the scope of the present invention is only defined by the following patent scope, which also includes other embodiments of the present invention (Please read the note Ϋ on the back first and then «buy to buy)-Pack. Order. Thread · Printed by the Ministry of Economic Affairs Central Standards Bureau Employee Consumer Cooperatives'fc

Claims (1)

A7 A7 經濟部中央標準局具工消^合作杜印*·'- „ ,-. r··1 / t 〇3Ό ί ί Β7 ν ------------------ C7 ____D7_ 六、申請專利範圍 1. 一種具有内部電容之印刷電路板,具有内部電容,以提 供設置在印刷電路板上之複數電子元件所需之電容需求 ,其内部電容包括有兩儐導電箔及一介於其間之介電層 ,其每一導電箔及介電層乃具有一與該印刷電路板相似 之尺寸,以在印刷電路板内形成層之結構,該介電層包 括有一區隔材料,延伸遍佈於介電靥,以保持介電層之 均一厚度,並使介電材料形成有一恒定之介電像數,該 印刷電路板連同該區隔材料及介電層之介電材料隨後施 予加熱及加壓處理,以使印刷電路板内之内部電容之厚 度保持均一並保持介電傜數之恒定者。 2. 依據申請專利範圍第1項所述之具有内部電容之印刷電 路板,其中該區隔材料俗結合於介電材料層,其作用僳 在形成一印刷電路板之最後壓層步驟期間或是在之後, 得以保持介電層之均一厚度及恒定之介電偽數。 3. 依據申請專利範圍第2項所述之具有内部電容之印刷電 路板,其中該區隔材料像以精細分隔之玻璃纖維,均勻 地及多方向性地佈設在介電層中。 4. 依據申請專利範圔第2項所述之具有内部電容之印刷電 路板,其中該介電層具有一大約至少1.5密爾之均一厚 度。 5. 依據申請專利範圍第2項所述之具有内部電容之印刷電 路板,其中該介電層具有一特定之厚度及介電係數,以 提供每一各別之電子裝置所需之電容量,其内部電容之 電容信俗為各電子裝置所需電容量之一比例值,且其可 __-30- 本紐^1遏《]中S®家標準(CKS)甲·}娜(21G X 297找) -- (請先閲讀背面之注意事項再塡寫本頁) 丨裝. 訂· A7 B7 經濟部中央標準局R工消费合作社印*;衣 C7 ___D7_ 六、申請專利範園 由其它内部電容處取得分享之電容,該内部電容之功用 依電子裝置之操作而定,其導電箔具有一最小之電流承 載能力,以使足夠之電流通過,並提供每一各別電子裝 置維持正確操作所需之充足電容置。 6. 依據申請專利範圍第2項所述之具有内部電容之印刷電 路板,其中該介電靥起先像為未硬化狀態,而導電箔像 設置在鄰近於未硬化介電層之兩面上,及介於印刷電路 板各層之間,其導電箔俗以壓層之方式結合於介電層, 該介電層在最後之壓層步驟中硬化,且同時形成該印刷 電路板及内部之電容。 7. 依據申請專利範圍第6項所述之具有内部電容之印刷電 路板,其中導電箔像結合在相鄰之印刷電路板層上,而 導電箔之部份區域像在其結合在印刷電路板内之時,予 以作蝕刻之處理。 8. 依據申請專利範圍第7項所述之具有内部電容之印刷電 路板,其中相鄰之印刷電路板層俗介電靥,其在内部電 容内,進一步包括有額外之導電箔,故由該介電層及至 少一艏導電箔形成複合之電容元件。 9. 依據申請專利範圍第2項所述之具有内部電容之印刷電 路板,其中該内部電容包括有至少三個具有介電層之導 電箔,其介電層包括有一預定介電傈數且配置在每一相 鄰導電箔之間,以形成一多電容元件之結構,其由内部 電容之一側邊起算,第一及第三導電箔偽連結在一齊, 其至少一導電箔俗兩膣電容元件之一部份,且具育一淨 --------------------------^------"------線 <請先閲讀背面之注意事項再埃寫本頁) 本紙張尺度適用中® Θ家標準(CKS)甲4蚬恪(210 X 2<J7 H ) Y} A7 B7 C7 D7 六、申請專利範圍 結裝置,以連結多電容元件之導電箔。 10·依據申請專利範圍第9項所述之具有内部電容之印刷 電路板,其更包括有至少四値具有介電層之導電箔,其 介電層具有一預定之介電僳數,而被設置在毎一相鄰之 導電箔之間,以形成一多電容元件之結構,若由内部電 容之一面起箄,其偶數及奇數之導電箔偽分別連結在一 齊,而在内部電容内之導電層之數目,偽等於其内部電 容内電容元件之數目,而在内部電容内之導電箔之數目 ,則相等於内部電容内之電容元件加一之數目。 Π.依據申請專利範圍第10項所述之具有内部電容之印刷 電路板,其中該内部電容或其内部電容之一部份在其 結合於印刷電路板内之前,係一單一組件之型態。 (請先閲讀背面之注意事項再塡寫本頁) .裝· 訂‘ .線. 經濟部中央標準局員工消費合作杜印.纪 本紙張尺Λ適用中ΕΘ家桴準(CNS)甲4規烙(210 X 297公犛)A7 A7 Central Bureau of Standards, Ministry of Economic Affairs, Ministry of Economic Affairs ^ Cooperation Du Yin * · '-„,-. R ·· 1 / t 〇3Ό ί ί Β7 ν ---------------- -C7 ____D7_ VI. Patent application 1. A printed circuit board with internal capacitors, which has internal capacitors, to provide the capacitance required for a plurality of electronic components placed on the printed circuit board, and the internal capacitors include two conductive Foil and a dielectric layer in between, each of the conductive foil and the dielectric layer has a similar size to the printed circuit board to form a layer structure in the printed circuit board, the dielectric layer includes a partition The material extends all over the dielectric layer to maintain a uniform thickness of the dielectric layer and form a constant dielectric image number of the dielectric material. The printed circuit board together with the partition material and the dielectric material of the dielectric layer then Apply heat and pressure to keep the thickness of the internal capacitor in the printed circuit board uniform and keep the dielectric constant constant. 2. According to the patent application, the printed circuit board with internal capacitor described in item 1 , Where the partition material is commonly combined with the dielectric material Layer, its function is to maintain a uniform thickness of the dielectric layer and a constant dielectric pseudo-number during or after the final lamination step of forming a printed circuit board. 3. According to the item 2 of the patent application scope Printed circuit board with internal capacitance, where the partition material is like finely divided glass fiber, evenly and multi-directionally arranged in the dielectric layer. 4. According to the patent application, paragraph 2 has internal Capacitive printed circuit board, wherein the dielectric layer has a uniform thickness of at least about 1.5 mils. 5. The printed circuit board with internal capacitance according to item 2 of the patent application scope, wherein the dielectric layer has a specific The thickness and permittivity of the capacitor are used to provide the capacitance required by each individual electronic device. The capacitance of the internal capacitor is a proportional value of the capacitance required by each electronic device, and it can be __- 30- This button ^ 1 curbs "] Chinese S® Standard (CKS) A.} Na (21G X 297 to find)-(please read the precautions on the back before writing this page) 丨 Install. Order · A7 B7 Ministry of Economic Affairs Printed by R Industry and Consumer Cooperative of Central Bureau of Standards;衣 C7 ___D7_ Sixth, the patent application garden obtains the shared capacitance from other internal capacitors. The function of this internal capacitor depends on the operation of the electronic device. Its conductive foil has a minimum current carrying capacity to allow sufficient current to pass through. It also provides sufficient capacitance for each individual electronic device to maintain correct operation. 6. According to the patent application, the printed circuit board with internal capacitance as described in item 2 of the patent application, in which the dielectric layer initially appears to be unhardened, The conductive foil image is placed on both sides adjacent to the unhardened dielectric layer and between the layers of the printed circuit board. The conductive foil is usually bonded to the dielectric layer by lamination. The dielectric layer is pressed at the final pressure. It is hardened in the layer step, and the printed circuit board and the internal capacitor are formed at the same time. 7. The printed circuit board with internal capacitance according to item 6 of the patent application scope, in which the conductive foil image is bonded to the adjacent printed circuit board layer, and part of the conductive foil image is bonded to the printed circuit board When it is within, it will be etched. 8. The printed circuit board with an internal capacitor according to item 7 of the scope of the patent application, in which the adjacent printed circuit board has a common dielectric layer, which is included in the internal capacitor and further includes an additional conductive foil, so the The dielectric layer and at least one bow conductive foil form a composite capacitor element. 9. The printed circuit board with an internal capacitor according to item 2 of the patent application scope, wherein the internal capacitor includes at least three conductive foils with a dielectric layer, and the dielectric layer includes a predetermined number of dielectrics and is configured Between each adjacent conductive foil, a multi-capacitor element structure is formed, which is counted from one side of the internal capacitor, the first and third conductive foils are pseudo-connected together, and at least one conductive foil has two capacitors A part of the component, with a clean one -------------------------- ^ ------ " ---- --Line < Please read the precautions on the back before writing this page) The paper size is applicable in the China Θ Home Standard (CKS) A4 Clam (210 X 2 < J7 H) Y} A7 B7 C7 D7 Patent-applied junction device to connect conductive foils of multiple capacitance elements. 10. The printed circuit board with internal capacitance according to item 9 of the scope of the patent application, which further includes at least four conductive foils with a dielectric layer whose dielectric layer has a predetermined dielectric number It is arranged between each adjacent conductive foil to form a multi-capacitor element structure. If it is formed from one side of the internal capacitor, the even and odd conductive foils are pseudo-connected together, and the conductive in the internal capacitor The number of layers is pseudo-equal to the number of capacitive elements in its internal capacitor, and the number of conductive foils in the internal capacitor is equal to the number of capacitive elements in the internal capacitor plus one. Π. A printed circuit board with an internal capacitor according to item 10 of the patent application scope, wherein the internal capacitor or a part of the internal capacitor is a single component type before it is incorporated in the printed circuit board. (Please read the precautions on the back before writing this page). Binding, Ordering, Thread. Employee Consumer Cooperation of the Central Bureau of Standards of the Ministry of Economic Affairs. Du Yin. The paper size of Ji Ji is applicable to the 4th standard of the EΘ Family Standard (CNS). Branding (210 X 297 male yak)
TW081106737A 1992-07-16 1992-08-26 Printed circuit board with internal capacitor TW203677B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/US1992/005957 WO1994002310A1 (en) 1992-07-16 1992-07-16 Printed circuit board with internal capacitor

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TW203677B true TW203677B (en) 1993-04-11

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Application Number Title Priority Date Filing Date
TW081106737A TW203677B (en) 1992-07-16 1992-08-26 Printed circuit board with internal capacitor

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AU (1) AU2392592A (en)
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WO (1) WO1994002310A1 (en)

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Publication number Priority date Publication date Assignee Title
US5796587A (en) * 1996-06-12 1998-08-18 International Business Machines Corporation Printed circut board with embedded decoupling capacitance and method for producing same
DE102006003474B3 (en) * 2006-01-25 2007-07-05 Atmel Germany Gmbh Device for transmitting electromagnetic signals between two functional units, has fields which are completely accessible from outside for producing electrically-conducting connections
SG175763A1 (en) 2009-05-01 2011-12-29 3M Innovative Properties Co Passive electrical article
WO2017154167A1 (en) * 2016-03-10 2017-09-14 三井金属鉱業株式会社 Multilayer laminate plate and production method for multilayered printed wiring board using same

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Publication number Priority date Publication date Assignee Title
JPS6390890A (en) * 1986-10-03 1988-04-21 株式会社 潤工社 Printed board
US5006397A (en) * 1987-02-06 1991-04-09 Key-Tech, Inc. Printed circuit board
US4775573A (en) * 1987-04-03 1988-10-04 West-Tronics, Inc. Multilayer PC board using polymer thick films
US5010641A (en) * 1989-06-30 1991-04-30 Unisys Corp. Method of making multilayer printed circuit board
US5079069A (en) * 1989-08-23 1992-01-07 Zycon Corporation Capacitor laminate for use in capacitive printed circuit boards and methods of manufacture
US5162977A (en) * 1991-08-27 1992-11-10 Storage Technology Corporation Printed circuit board having an integrated decoupling capacitive element

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