TW202422791A - Electronic device - Google Patents
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- TW202422791A TW202422791A TW111143661A TW111143661A TW202422791A TW 202422791 A TW202422791 A TW 202422791A TW 111143661 A TW111143661 A TW 111143661A TW 111143661 A TW111143661 A TW 111143661A TW 202422791 A TW202422791 A TW 202422791A
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Abstract
Description
本揭露涉及一種電子裝置,特別是涉及一種包括具有容置槽的導電墊的電子裝置。The present disclosure relates to an electronic device, and more particularly to an electronic device including a conductive pad having a receiving groove.
近年來,電子裝置中的電子元件逐漸趨向小型化與高密集化,為此發展出多樣化的電子元件封裝技術。然而,在習知技術中,電子裝置中的元件彼此對位相接時,可能會造成位移或公差,而使得接合後裝置的電性與可靠度表現不佳。In recent years, electronic components in electronic devices have gradually become smaller and more dense, and a variety of electronic component packaging technologies have been developed. However, in the prior art, when components in electronic devices are aligned and connected to each other, displacement or tolerance may occur, resulting in poor electrical performance and reliability of the device after bonding.
本揭露的目的之一在於提供一種電子裝置,以解決現有電子裝置所遭遇的問題,透過導電墊的結構設計,可提升元件之間的對位精準度,進而提升電子裝置的可靠度。One of the purposes of the present disclosure is to provide an electronic device to solve the problems encountered by the existing electronic devices. Through the structural design of the conductive pad, the alignment accuracy between components can be improved, thereby improving the reliability of the electronic device.
本揭露的一實施例提供一種電子裝置,電子裝置包括電路結構、接合元件以及電子單元。電路結構包括導電墊,其中導電墊具有容置槽。至少部分的接合元件設置在容置槽中。電子單元透過接合元件電性連接導電墊。其中,容置槽具有底面以及與底面相對的開口,且底面的寬度大於開口的寬度。An embodiment of the present disclosure provides an electronic device, which includes a circuit structure, a bonding element, and an electronic unit. The circuit structure includes a conductive pad, wherein the conductive pad has a receiving groove. At least part of the bonding element is disposed in the receiving groove. The electronic unit is electrically connected to the conductive pad through the bonding element. The receiving groove has a bottom surface and an opening opposite to the bottom surface, and the width of the bottom surface is greater than the width of the opening.
下文結合具體實施例和附圖對本揭露的內容進行詳細描述,須注意的是,為了使讀者能容易瞭解及圖式的簡潔,本揭露中的多張圖式只繪出裝置的一部分,且圖式中的特定元件並非依照實際比例繪圖。此外,圖中各元件的數量及尺寸僅作為示意,並非用來限制本揭露的範圍。The following is a detailed description of the contents of the present disclosure in conjunction with specific embodiments and drawings. It should be noted that, in order to facilitate the reader's understanding and simplify the drawings, the multiple drawings in the present disclosure only depict a portion of the device, and the specific elements in the drawings are not drawn according to the actual scale. In addition, the number and size of each element in the drawing are only for illustration and are not used to limit the scope of the present disclosure.
本揭露通篇說明書與申請專利範圍中會使用某些詞彙來指稱特定元件。本領域技術人員應理解,電子設備製造商可能會以不同的名稱來指稱相同的元件。本文並不意在區分那些功能相同但名稱不同的元件。在下文說明書與申請專利範圍中,「含有」與「包括」等詞為開放式詞語,因此其應被解釋為「含有但不限定為…」之意。當在本說明書中使用術語「包含」、「包括」和/或「具有」時,其指定了所述特徵、區域、步驟、操作和/或元件的存在,但並不排除一個或多個其他特徵、區域、步驟、操作、元件和/或其組合的存在或增加。Certain terms are used throughout the specification and patent application to refer to specific components. It should be understood by those skilled in the art that electronic equipment manufacturers may refer to the same components by different names. This document is not intended to distinguish between components that have the same function but different names. In the following specification and patent application, the words "contain" and "include" are open-ended words, so they should be interpreted as "contains but is not limited to..." When the terms "include", "include" and/or "have" are used in this specification, they specify the presence of the features, regions, steps, operations and/or elements, but do not exclude the presence or addition of one or more other features, regions, steps, operations, elements and/or combinations thereof.
當元件或膜層被稱為在另一個元件或膜層「上」或「連接到」另一個元件或膜層時,它可以直接在此另一元件或膜層上或直接連接到此另一元件或膜層,或者兩者之間存在有***的元件或膜層。相反地,當元件被稱為「直接」在另一個元件或膜層「上」或「直接連接到」另一個元件或膜層時,兩者之間不存在有***的元件或膜層。When an element or a layer is referred to as being "on" or "connected to" another element or layer, it may be directly on or directly connected to the other element or layer, or there may be intervening elements or layers therebetween. Conversely, when an element is referred to as being "directly on" or "directly connected to" another element or layer, there may be no intervening elements or layers therebetween.
本文中所提到的方向用語,例如:「上」、「下」、「前」、「後」、「左」、「右」等,僅是參考附圖的方向。因此,使用的方向用語是用來說明,而並非用來限制本揭露。The directional terms mentioned in this article, such as "up", "down", "front", "back", "left", "right", etc., are only with reference to the directions of the accompanying drawings. Therefore, the directional terms used are used for explanation, and are not used to limit the present disclosure.
術語「大約」、「等於」、「相等」或「相同」、「實質上」或「大致上」一般解釋為在所給定的值或範圍的20%以內,或解釋為在所給定的值或範圍的10%、5%、3%、2%、1%或0.5%以內。The terms "approximately," "equal to," "equal" or "same," "substantially" or "substantially" are generally interpreted as being within 20% of a given value or range, or within 10%, 5%, 3%, 2%, 1% or 0.5% of a given value or range.
說明書與申請專利範圍中所使用的序數例如「第一」、「第二」等之用詞用以修飾元件,其本身並不意含及代表該(或該些)元件有任何之前的序數,也不代表某一元件與另一元件的順序、或是製造方法上的順序,該些序數的使用僅用來使具有某命名的元件得以和另一具有相同命名的元件能作出清楚區分。申請專利範圍與說明書中可不使用相同用詞,據此,說明書中的第一構件在申請專利範圍中可能為第二構件。The ordinal numbers used in the specification and patent application, such as "first", "second", etc., are used to modify the components. They do not imply or represent any previous ordinal number of the component (or components), nor do they represent the order of one component to another component, or the order of the manufacturing method. The use of these ordinal numbers is only used to make a component with a certain name clearly distinguishable from another component with the same name. The patent application and the specification may not use the same terms. Accordingly, the first component in the specification may be the second component in the patent application.
本揭露所述的電子裝置可包括半導體裝置、封裝裝置、顯示裝置、發光裝置、背光裝置、太陽能電池(solar cell)、感測裝置、天線裝置、車用裝置或高頻裝置,但不以此為限。電子裝置可為可彎折或可撓式電子裝置。顯示裝置可為非自發光型顯示裝置或自發光型顯示裝置。天線裝置可為液晶型態的天線裝置或非液晶型態的天線裝置,感測裝置可為感測電容、光線、熱能或超聲波的感測裝置,但不以此為限。電子裝置可例如包括被動元件與主動元件等電子元件,例如電容、電阻、電感、二極體、電晶體等。需注意的是,電子裝置可為前述之任意排列組合,但不以此為限。The electronic devices described in the present disclosure may include semiconductor devices, packaging devices, display devices, light-emitting devices, backlight devices, solar cells, sensing devices, antenna devices, automotive devices or high-frequency devices, but are not limited thereto. The electronic device may be a bendable or flexible electronic device. The display device may be a non-self-luminous display device or a self-luminous display device. The antenna device may be a liquid crystal antenna device or a non-liquid crystal antenna device, and the sensing device may be a sensing device for sensing capacitance, light, heat or ultrasound, but are not limited thereto. The electronic device may, for example, include electronic components such as passive components and active components, such as capacitors, resistors, inductors, diodes, transistors, etc. It should be noted that the electronic device may be any combination of the aforementioned arrangements, but is not limited thereto.
須知悉的是,在不脫離本揭露的精神下,可將數個不同實施例中的特徵進行替換、重組、混合以完成其他實施例。It should be understood that features of several different embodiments may be replaced, reorganized, or mixed to implement other embodiments without departing from the spirit of the present disclosure.
請參考圖1與圖2。圖1為本揭露一實施例的電子裝置的剖面示意圖。圖2為圖1所示導電墊與接合元件的局部放大示意圖。如圖1與圖2所示,本揭露一實施例的電子裝置ED可包括電路結構100、接合元件200以及電子單元300。電路結構100包括導電墊110,其中導電墊110具有容置槽120。具體而言,電路結構100可包括在方向Y上堆疊的至少一層導電層112(例如導電層112a與導電層112b)、至少一層絕緣層114(例如絕緣層114a與絕緣層114b)以及一個或多個導電墊110。導電墊110可設置在最上層的絕緣層114上並電性連接電路結構100中最上層的導電層112,例如設置在絕緣層114b上並電性連接導電層112b,但不以此為限。電路結構100可為重佈線層(redistribution layer,RDL),以使線路重佈,例如可透過金屬佈線製程改變線路接點位置或提升線路扇出(fan out)面積,但不以此為限。在本揭露中,方向Y可為電子裝置ED的法線方向,亦即相反於電子裝置ED的俯視方向,而方向X可平行於水平方向,亦即平行於電子單元300的一表面(例如上表面或下表面),而方向Y垂直於方向X,但不以此為限。Please refer to FIG. 1 and FIG. 2. FIG. 1 is a cross-sectional schematic diagram of an electronic device according to an embodiment of the present disclosure. FIG. 2 is a partially enlarged schematic diagram of the conductive pad and the bonding element shown in FIG. 1. As shown in FIG. 1 and FIG. 2, the electronic device ED according to an embodiment of the present disclosure may include a
在一些實施例中,可在方向Y上依序交替形成圖案化的導電層112a、絕緣層114a、導電層112b及絕緣層114b,再將導電墊110形成在絕緣層114b上或是絕緣層114b的凹槽114G中,以構成電路結構100。絕緣層114中可包括一個或多個連接孔,導電層112a、導電層112b及導電墊110可透過連接孔而電連接,但不以此為限。導電墊110可例如但不限於為凸塊底層金屬(under-bump metallization,UBM)。導電墊110可包括銅、鎳、金、銀、鈦、其他合適的導電材料或上述材料的組合,例如為在導電墊110進行對接時的溫度與壓力(例如200-400°C與1-100MPa)下可產生機械形變的材料,但不以此為限。導電墊110與導電層112可分別為單層結構或多層堆疊結構。導電墊110的材料可相同或不同於導電層112的材料。導電層112可包括鈦、銅、鋁、錫、鎳、金或銀等金屬材料或其他合適的導電材料。絕緣層114可包括有機材料或無機材料。有機材料例如包括聚醯亞胺(polyimide,PI)、感光型聚醯亞胺(photosensitive polyimide,PSPI)、環氧樹脂(epoxy)、Ajinomoto增層膜(Ajinomoto build-up film,ABF)材料或其他合適的材料,無機材料例如包括氧化矽(silicon oxide,SiOx)、氮化矽(silicon nitride,SiNx)或其他合適的材料,但不以此為限。電路結構100還可包括主動元件及/或被動元件,例如二極體、電晶體、電容、電阻、電感、天線單元,並可電性連接於導電層112形成的導線等。電晶體例如包括薄膜電晶體(thin film transistor,TFT),薄膜電晶體可包括閘極、源極、汲極及半導體層,但不以此為限。In some embodiments, a patterned
至少部分的接合元件200設置在導電墊110的容置槽120中,且電子單元300透過接合元件200電性連接導電墊110,從而使電子單元300與電路結構100電性連接。具體而言,電子裝置ED可包括一個或多個接合元件200,接合元件200的其中一個的至少一部分可對應設置在導電墊110的容置槽120中並與導電墊110相接,使得電子單元300可透過接合元件200電性連接導電墊110。接合元件200可例如為柱體(pillar)、凸塊(bump)、焊球(solder ball)或接墊(pad),接合元件200可包括銅、錫、鎳、金、鉛、鋁、其他合適的導電材料或上述材料的組合,但不以此為限。電子單元300可例如為印刷電路板(printed circuit board,PCB)、晶粒(die)、晶片(chip)、積體電路(IC)、二極體、電容、電阻或其他合適的主動元件或被動元件,但不以此為限。At least a portion of the
根據本揭露實施例,導電墊110的容置槽120具有底面122以及與底面122相對的開口124,且底面122的寬度W1大於開口124的寬度W2。本揭露中所指“容置槽的底面的寬度”可表示在方向X上由容置槽的底面的一端量測到另一端所得到的寬度,而所指“容置槽的開口的寬度”可表示在方向X上由容置槽的開口的一端量測到另一端所得到的最小寬度。舉例而言,如圖2所示,容置槽120是形成在導電墊110的上表面110a的凹槽,容置槽120可具有底面122、開口124及側壁126,開口124與底面122相對,且側壁126與底面122相接。其中,可在方向X上由容置槽120的底面122一端量測到另一端以得到寬度W1,且可在方向X上由容置槽120的開口124的一端量測到另一端以得到最小寬度W2。並且,底面122的寬度W1大於開口124的寬度W2(即W1>W2)。透過使接合元件200的至少一部分設置在具有下部寬度W1大於上部寬度W2的容置槽120中,可提升接合元件200與導電墊110之間的對位精準度,減少接合元件200位移,進而提升電子裝置ED的可靠度。According to the disclosed embodiment, the receiving
在如圖2所示的實施例中,容置槽120的深度T1可小於導電墊110的厚度T2(即T1<T2),在一些實施例中,容置槽120的深度T1可小於或等於導電墊110的厚度T2的三分之二,以使容置槽120可容置至少部分的接合元件200,進而提升對位精準度,但不以此為限。其中,可例如在方向Y上由開口124量測到底面122以得到容置槽120的深度T1,且可在方向Y上由導電墊110的上表面110a量測到與上表面相對的下表面110b以得到導電墊110的厚度T2,但不以此為限。In the embodiment shown in FIG. 2 , the depth T1 of the receiving
在一些實施例中,在如圖2所示的剖視圖中,導電墊110的邊緣110e與容置槽120的底面122之間的最短距離為第一距離H1,導電墊100的邊緣110e與容置槽120的開口124之間的最短距離為第二距離H2,且第一距離H1小於第二距離H2(即H1<H2)。也就是說,在方向X上,導電墊110的邊緣110e與底面122鄰近邊緣110e的一端之間具有第一距離H1,且導電墊110的邊緣110e與開口124鄰近邊緣110e的一端之間具有第二距離H2,其中第一距離H1小於第二距離H2。In some embodiments, in the cross-sectional view shown in FIG. 2 , the shortest distance between the
在一些實施例中,如圖2所示,容置槽120的側壁126與底面122之間具有夾角θ,且夾角θ可小於90度。根據一些實施例,夾角θ為容置槽120的側壁126延伸線與底面122延伸線所定義。在一些實施例中,容置槽120的寬度可由底面122往開口124漸減,即側壁126可為斜壁,而底面122的寬度W1為容置槽120的最大寬度,開口124的寬度W2為容置槽120的最小寬度,使得容置槽120可例如具有梯形的剖視形狀,亦即容置槽120的底面122面積大於開口124的面積,但不以此為限。In some embodiments, as shown in FIG2 , there is an angle θ between the
根據如圖2所示導電墊110的結構設計,導電墊110可接觸接合元件200,使得接合元件200可嵌入導電墊110的容置槽120中,即導電墊110的容置槽120的上部(例如開口124處邊緣)可與接合元件200相接觸,以固定接合元件200,從而可提升接合元件200與導電墊110之間的對位精準度。此外,由於導電墊110可接觸接合元件200,使得導電墊110整體的尺寸不需要太大就足以與接合元件200相接,亦即可使導電墊110整體的尺寸減少,例如導電墊110整體的寬度W3可較小,從而可減少導電墊110在結構中所占空間,以使扇出線路的設計可具有更多彈性。另一方面,由於導電墊110的尺寸減少,能夠節省其材料成本。According to the structural design of the
在一些實施例中,如圖1與圖2所示,接合元件200可包括接合部210及導電柱220,導電柱220位在電子單元300與接合部210之間,且容置槽120的深度T1可大於或等於接合部210的厚度T3。其中,可例如在方向Y上由接合部210的上表面(例如接合部210與導電柱220之間的界面I)量測到接合部210最靠近容置槽120的底面122的一端以得到接合部210的厚度T3。接合部210可包括焊料(solder),例如但不限於錫、鎵、鎳、金、銅、鋁、銀、在接合元件200進行對接時的溫度(例如200-400°C)下可熔化的其他材料或上述材料的組合,使得接合部210可填充容置槽120的至少一部分,即一部分的容置槽120可被接合部210所填充(如圖1所示),或者整個容置槽120可被接合部210所填充(如圖3所示)。由於接合部210設置在容置槽120中,使得接合部210的尺寸不需要太大就足以使接合元件200與導電墊110充分相接,亦即可使接合部210的尺寸減少,能夠節省其材料成本。In some embodiments, as shown in FIG. 1 and FIG. 2 , the
導電柱220可包括銅、鎳、金、銀、其他合適的導電材料或上述材料的組合,例如為在接合元件200進行對接時的溫度下不會熔化的材料,但不以此為限。當容置槽120的深度T1大於接合部210的厚度T3時,接合部210與導電柱220之間的界面I可低於容置槽120的上表面110a,使得接合部210設置在容置槽120中,且導電墊110可接觸部分的導電柱220,即容置槽120的上部(例如開口124處邊緣)與導電柱220相接觸,以固定接合元件200。The
請參考圖3,其為本揭露另一實施例的電子裝置的剖面示意圖。如圖3所示,在一些實施例中,接合元件200的接合部210可填充容置槽120至少90%以上的空間。舉例而言,在經過製程(例如但不限於潤濕製程(wetting process))的反應之後,接合元件200的接合部210可完全填滿容置槽120,而使得接合元件200與容置槽120之間不具有空隙,但不以此為限。在如圖3所示的剖面圖中,導電墊110的容置槽120與接合元件200的接合部210的交界處(例如容置槽120與接合部210之間的界面I1)可例如呈弧形,但不以此為限。在一些實施例中,接合元件200的接合部210與導電墊110還可例如但不限於形成金屬間化合物(intermetallic compound,IMC)結構。根據圖3所示實施例,透過部分的接合元件200(例如接合部210)設置在容置槽120中,可增加接合元件200與導電墊110之間的接觸面積,以減少反應後因兩者接觸面積不足而造成接觸不良等風險,或者能夠節省其材料成本,但不以此為限。Please refer to FIG. 3 , which is a cross-sectional schematic diagram of an electronic device according to another embodiment of the present disclosure. As shown in FIG. 3 , in some embodiments, the
根據上述導電墊110的結構與接合元件200包括接合部210及導電柱220的結構,在一些實施例的電子裝置ED的製程中,在將電子單元300透過接合元件200電性連接導電墊110時,即在接合元件200與導電墊110進行對接時,可同時對結構進行加熱與施加壓力,使得接合部210的焊料在製程溫度(例如200-400°C)下由固態熔化為液態,且導電墊110在製程壓力(例如1-100MPa)下產生形變而接觸或箝制住導電柱220。由於在施壓時接合部210呈液態,可提供緩衝的功能以減輕應力。在另一些實施例的電子裝置ED的製程中,在接合元件200與導電墊110進行對接時,可先只對結構施加壓力而不加熱,由於此時接合元件200整體為固態,可對導電墊110施予更大的壓力而使導電墊110產生更大的形變量,在製程管控不傷害結構的情況下,導電墊110可提供更大的箝制力以接觸或箝制住導電柱220。接著,再對結構加熱,使得接合部210的焊料在製程溫度下熔化以填充容置槽120。然而,本揭露實施例的電子裝置ED的製程並不以上述為限。According to the structure of the
請參考圖4。圖4為本揭露導電墊與接合元件的變化實施例的局部剖面示意圖。如圖4所示,在一些實施例中,電子裝置ED還可包括中介層130,其中至少部分的中介層130設置在導電墊110的容置槽120中且與接合元件200相接,例如中介層130可覆蓋容置槽120的底面122及/或側壁126,或者中介層130還可覆蓋導電墊110的部分上表面110a。中介層130可例如為焊料或導電膠,焊料例如包括錫、鎵、銀、在接合元件200進行對接時的溫度下可熔化的其他材料或上述材料的組合,導電膠例如包括異方性導電膜(anisotropic conductive film,ACF),但不以此為限。因此,導電墊110可透過中介層130與接合元件200相接,以進一步提升導電墊110與接合元件200之間的接合強度。Please refer to FIG4. FIG4 is a partial cross-sectional schematic diagram of a modified embodiment of the conductive pad and the bonding element disclosed in the present invention. As shown in FIG4, in some embodiments, the electronic device ED may further include an
本揭露中電子裝置ED的製程可例如為面板級封裝(panel-level package,FOPLP)製程,且可為先重佈線層(RDL-first)或先晶片(chip-first)的製程,但不以此為限。請再參考圖1,圖1所示的電子裝置ED可例如透過先重佈線層的製程所製造,先形成包括重佈線層的電路結構100,接著可例如透過覆晶接合(flip-chip bonding)將電子單元300設置在電路結構100上,但不以此為限。根據圖1所示的實施例,電子裝置ED還可包括保護層400,其中保護層400可圍繞電子單元300及接合元件200,以隔絕水氣、空氣及/或減少電子單元300及接合元件200損傷。本揭露中所指“圍繞”可表示在電子裝置ED的剖視圖中,元件或膜層至少接觸對應的被圍繞元件或膜層的側表面。舉例而言,保護層400可至少接觸電子單元300的側表面及接合元件200的側表面。如圖1所示,保護層400可覆蓋電子單元300的側表面與上表面並覆蓋接觸一部分的電路結構100表面,但不以此為限。在另一些實施例中,電子單元300的上表面沒有被保護層400所覆蓋,例如可透過研磨(grinding)製程使保護層400暴露出電子單元300的上表面。保護層400可例如包括環氧樹脂、陶瓷、環氧樹脂封裝材料(epoxy molding compound,EMC)、其他合適的材料或上述材料的組合,但不以此為限。The process of the electronic device ED in the present disclosure may be, for example, a panel-level package (FOPLP) process, and may be a redistribution layer first (RDL-first) or chip-first process, but is not limited thereto. Referring again to FIG. 1 , the electronic device ED shown in FIG. 1 may be manufactured, for example, by a redistribution layer first process, first forming a
在一些實施例中,如圖1所示,電子裝置ED還可包括另一接合元件500,其中接合元件500與接合元件200分別設置在該電路結構100的相對兩側,即接合元件500可設置在電路結構100相對於電子單元300的一側,且接合元件500電性連接電路結構100。接合元件500可例如為凸塊底層金屬、凸塊、焊球或接墊,接合元件500可包括銅、錫、鎳、金、鉛、其他適合的導電材料或上述材料的組合,但不以此為限。在一些實施例中,電子裝置ED還可包括另一電子單元(圖1中未示出),此另一電子單元與電子單元300分別設置在電路結構100的相對兩側,且此另一電子單元可透過接合元件500電性連接電路結構100,但不以此為限。In some embodiments, as shown in FIG. 1 , the electronic device ED may further include another
下文將繼續詳述本揭露電子裝置與電子裝置的製程的其他實施例,爲了簡化說明,下文中使用相同標號標注相同元件,以下主要針對不同實施例間的差異詳加敘述,且不再贅述相同的特徵。本揭露的各實施例與實施例可以互相組合與變化。Other embodiments of the electronic device and the process of manufacturing the electronic device disclosed in the present disclosure will be described in detail below. To simplify the description, the same reference numerals are used below to mark the same components. The following mainly describes the differences between different embodiments, and does not repeat the same features. The various embodiments and embodiments disclosed in the present disclosure can be combined and varied with each other.
請參考圖5。圖5為本揭露又一實施例的電子裝置的剖面示意圖,其中圖5所示的電子裝置ED可例如透過先晶片的製程所製造,但不以此為限。根據圖5所示的實施例,接合元件200’的態樣可不同於圖1所示實施例的接合元件200的態樣,且至少部分的接合元件200’可設置在導電墊110的容置槽120中,而電子單元300可透過接合元件200’電性連接導電墊110,從而使電子單元300與電路結構100電性連接。但在其他實施例中,接合元件200’的態樣也可相同於圖1所示實施例的接合元件200的態樣,並不以此為限。在一些實施例中,如圖5所示,電子裝置ED還可包括另一電子單元600,電子單元600與電子單元300分別設置在電路結構100的相對兩側,且電子單元600可電性連接電路結構100。電子單元600可例如為印刷電路板、晶粒、晶片、積體電路、二極體、電容、電阻或其他合適的主動元件或被動元件,但不以此為限。電子單元600還可例如包括接合墊610,且電路結構100中的導電層112可電性連接電子單元600的接合墊610,接合墊610可包括鋁、銅、錫、鎳、金、鉛、其他適合的導電材料或上述材料的組合,但不以此為限。此外,如圖5所示,電子裝置ED還可包括保護層410,保護層410圍繞電子單元600,例如保護層410可覆蓋接觸電子單元600的側表面與下表面並覆蓋接觸一部分的電路結構100表面,但不以此為限。在另一些實施例中,電子單元600的下表面沒有被保護層410所覆蓋,例如可透過研磨製程使保護層410暴露出電子單元600的下表面。保護層410可例如包括環氧樹脂、陶瓷、環氧樹脂封裝材料、其他合適的材料或上述材料的組合,但不以此為限。Please refer to FIG5. FIG5 is a cross-sectional schematic diagram of an electronic device according to another embodiment of the present disclosure, wherein the electronic device ED shown in FIG5 can be manufactured, for example, through a chip-first process, but is not limited thereto. According to the embodiment shown in FIG5, the state of the bonding element 200' may be different from the state of the
請參考圖6至圖8。圖6至圖8為本揭露電子裝置的另一實施例的導電墊的部分製程示意圖。為了簡化說明,在圖6至圖8中省略了電路結構100中的導電層,且將電路結構100中的多層絕緣層的整體以絕緣層114表示,電路結構100中的多層絕緣層114與多層導電層112的配置例如可參考圖1,但不以圖1為限。如圖6至圖8所示,本揭露另一實施例的導電墊140的製程可例如包括以下步驟。首先,如圖6所示,可圖案化最上層的絕緣層114以形成一個或多個凹槽114G,然後在絕緣層114上形成種子層(seed layer)140S,再在種子層140S上形成金屬層140M1。例如但不限於可透過電鍍製程形成金屬層140M1,其中種子層140S可有助於金屬層140M的形成或提升附著力。然後,可在金屬層140M1上形成圖案化的光阻PR,其中圖案化的光阻PR例如形成在不對應凹槽114G所在區域的金屬層140M1上,例如凹槽114G可位於相鄰的光阻圖案之間。Please refer to Figures 6 to 8. Figures 6 to 8 are schematic diagrams of a portion of the manufacturing process of a conductive pad of another embodiment of the electronic device disclosed herein. In order to simplify the description, the conductive layer in the
接著,可進行電鍍製程以在圖6所示的金屬層140M1繼續生長金屬材料,形成如圖7所示的金屬層140M2。具體而言,可例如透過調控電鍍液中的添加劑(additive agent),使添加劑更容易吸附在圖6中虛線框所示的端部P且可增加端部P處金屬的生長速率,從而形成如圖7所示的金屬層140M2。然後,如圖8所示,可移除光阻PR,即可得到包括一個或多個導電墊140的電路結構100。根據圖6至圖8所示實施例,種子層140S的材料可例如包括鈦、銅、鉬、鋁、鎳、銀、錫、其他合適的導電材料或上述材料的組合,但不以此為限。金屬層140M1及/或金屬層140M2的材料可例如包括銅、鎳、金、銀、其他合適的導電材料或上述材料的組合,例如為在所形成的導電墊140進行對接時的溫度與壓力(例如200-400°C與1-100MPa)下可產生機械形變的材料,但不以此為限。Next, an electroplating process may be performed to continue growing metal material on the metal layer 140M1 shown in FIG6 to form a metal layer 140M2 as shown in FIG7 . Specifically, the additive in the electroplating solution may be adjusted to make the additive more easily adsorbed on the end P shown in the dotted frame in FIG6 and to increase the growth rate of the metal at the end P, thereby forming the metal layer 140M2 as shown in FIG7 . Then, as shown in FIG8 , the photoresist PR may be removed to obtain a
請參考圖9,圖9為圖8所示導電墊與接合元件相接的局部剖面示意圖。如圖9所示,導電墊140可具有容置槽141,容置槽141具有底面142以及與底面142相對的開口144,且底面142的寬度W4大於開口144的寬度W5(即W4>W5)。其中,可在方向X上由容置槽141的底面142的一端量測到另一端以得到寬度W4,且可在方向X上由容置槽141的開口144的一端量測到另一端以得到最小寬度W5。具體而言,導電墊140可包括突起部146,突起部146環繞開口144,其中突起部146之間的最小距離可為開口144的寬度W5。在一些實施例中,導電墊140的突起部146可接觸接合元件200,使得接合元件200可嵌入導電墊140的容置槽141中,即突起部146可與接合元件200相接觸,以固定接合元件200。舉例而言,接合元件200的接合部210可設置在容置槽141中,且突起部146可接觸接合元件200的導電柱220的一部分,但不以此為限,其中接合元件200的接合部210與導電柱220的細部結構及材料可例如參考前述實施例,於此不再贅述。突起部146接觸接合元件200的一側可具有弧形表面146S,其中弧形表面146S是例如透過如圖6與圖7所示的添加劑吸附在端部P並增加端部P處金屬的生長速率所形成,但不以此為限。根據圖9所示的實施例,導電墊140還可包括延伸部148,延伸部148由突起部146向相反於開口144的方向延伸,其中延伸部148的上表面148a與突起部146的上表面146a之間可具有段差S。即在方向Y上,延伸部148的上表面148a與突起部146的上表面146a之間的最短距離為段差S,其中延伸部148的上表面148a可大致上平行於方向X,但不以此為限。Please refer to FIG. 9, which is a partial cross-sectional schematic diagram of the conductive pad and the joint element shown in FIG. 8. As shown in FIG. 9, the
綜上所述,根據本揭露實施例的電子裝置,透過設置具有下部寬度大於上部寬度的容置槽的導電墊,並使至少部分的接合元件設置在容置槽中,可提升接合元件與導電墊之間的對位精準度,進而提升電子裝置的可靠度。此外,透過導電墊接觸接合元件,可使導電墊有效地電連接接合元件,因此相較於習知技術,本揭露電子裝置中的接合元件與導電墊可以具有較小的尺寸,從而可使扇出線路的設計具有更多彈性及/或能夠節省成本。In summary, according to the electronic device of the embodiment of the present disclosure, by providing a conductive pad having a receiving groove whose lower width is greater than the upper width, and by disposing at least a portion of the bonding element in the receiving groove, the alignment accuracy between the bonding element and the conductive pad can be improved, thereby improving the reliability of the electronic device. In addition, by contacting the bonding element with the conductive pad, the conductive pad can be effectively electrically connected to the bonding element, so that compared with the prior art, the bonding element and the conductive pad in the electronic device disclosed in the present disclosure can have a smaller size, thereby making the design of the fan-out circuit more flexible and/or saving costs.
以上所述僅為本揭露的實施例而已,並不用於限制本揭露,對於本領域的技術人員來說,本揭露可以有各種更改和變化。凡在本揭露的精神和原則之內,所作的任何修改、等同替換、改進等,均應包含在本揭露的保護範圍之內。The above is only an embodiment of the present disclosure and is not intended to limit the present disclosure. For those skilled in the art, the present disclosure may be modified and varied in various ways. Any modification, equivalent substitution, improvement, etc. made within the spirit and principle of the present disclosure shall be included in the protection scope of the present disclosure.
100:電路結構
110,140:導電墊
110a,146a,148a:上表面
110b:下表面
110e:邊緣
112,112a,112b:導電層
114,114a,114b:絕緣層
114G:凹槽
120,141:容置槽
122,142:底面
124,144:開口
126:側壁
130:中介層
140M1,140M2:金屬層
140S:種子層
146:突起部
146S:弧形表面
148:延伸部
200,200’,500:接合元件
210:接合部
220:導電柱
300,600:電子單元
400,410:保護層
610:接合墊
ED:電子裝置
H1:第一距離
H2:第二距離
I,I1:界面
P:端部
PR:光阻
S:段差
T1:深度
T2,T3:厚度
W1,W2,W3,W4,W5:寬度
X,Y:方向
θ:夾角
100: Circuit structure
110,140:
圖1為本揭露一實施例的電子裝置的剖面示意圖。 圖2為圖1所示導電墊與接合元件的局部放大示意圖。 圖3為本揭露另一實施例的電子裝置的剖面示意圖。 圖4為本揭露導電墊與接合元件的變化實施例的局部剖面示意圖。 圖5為本揭露又一實施例的電子裝置的剖面示意圖。 圖6至圖8為本揭露電子裝置的另一實施例的導電墊的部分製程示意圖。 圖9為圖8所示導電墊與接合元件相接的局部剖面示意圖。 FIG. 1 is a schematic cross-sectional view of an electronic device according to an embodiment of the present disclosure. FIG. 2 is a partially enlarged schematic view of the conductive pad and the bonding element shown in FIG. 1. FIG. 3 is a schematic cross-sectional view of an electronic device according to another embodiment of the present disclosure. FIG. 4 is a schematic cross-sectional view of a modified embodiment of the conductive pad and the bonding element of the present disclosure. FIG. 5 is a schematic cross-sectional view of an electronic device according to another embodiment of the present disclosure. FIG. 6 to FIG. 8 are schematic views of a portion of the manufacturing process of the conductive pad of another embodiment of the electronic device of the present disclosure. FIG. 9 is a schematic cross-sectional view of a portion of the conductive pad and the bonding element shown in FIG. 8 connected to each other.
100:電路結構 100: Circuit structure
110:導電墊 110: Conductive pad
112,112a,112b:導電層 112,112a,112b: Conductive layer
114,114a,114b:絕緣層 114,114a,114b: Insulating layer
114G:凹槽 114G: Groove
120:容置槽 120: Storage tank
200,500:接合元件 200,500:Jointing elements
210:接合部 210: Joint
220:導電柱 220: Conductive column
300:電子單元 300: Electronic unit
400:保護層 400: Protective layer
ED:電子裝置 ED: Electronic devices
X,Y:方向 X,Y: direction
Claims (10)
Publications (1)
Publication Number | Publication Date |
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TW202422791A true TW202422791A (en) | 2024-06-01 |
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