TW202422670A - Semiconductor process for reducing micro scratch defect in chemical mechanical polishing - Google Patents

Semiconductor process for reducing micro scratch defect in chemical mechanical polishing Download PDF

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TW202422670A
TW202422670A TW111144344A TW111144344A TW202422670A TW 202422670 A TW202422670 A TW 202422670A TW 111144344 A TW111144344 A TW 111144344A TW 111144344 A TW111144344 A TW 111144344A TW 202422670 A TW202422670 A TW 202422670A
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wafer
chemical mechanical
polishing
mechanical polishing
semiconductor process
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TW111144344A
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TWI832570B (en
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陳銘祥
顏勢錡
施凱僥
簡銘仁
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力晶積成電子製造股份有限公司
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Abstract

A semiconductor process for reducing micro scratch defect in chemical mechanical polishing (CMP) is provided in the present invention, including performing a pre-CMP cleaning step in a cleaning tool, performing a wafer bevel treatment in a bevel treatment device immediately after the pre-CMP cleaning step, wherein the wafer bevel treatment includes cleaning or polishing wafer bevels, and performing a CMP process in a CMP tool immediately after the wafer bevel treatment.

Description

減少化學機械研磨中微刮痕缺陷的半導體製程Semiconductor Process for Reducing Micro-Scratch Defects in Chemical Mechanical Polishing

本發明大體上與一種半導體製程有關,更具體言之,其係關於一種對晶圓的晶邊進行清洗或研磨的半導體製程。The present invention generally relates to a semiconductor process, and more particularly, to a semiconductor process for cleaning or grinding the edge of a wafer.

化學機械研磨(Chemical-Mechanical Polishing, CMP)是半導體元件製造中常用的一種製程,其製程中使用具有研磨性和腐蝕性的研磨液搭配研磨墊來將矽晶圓或其它基底材料表面上不需要或不規則的結構移除,以此達到平坦化之目的。平坦化後的矽晶圓具有平坦的製程面,可使得乾式刻蝕中的圖案成型更加容易,可形成更小的半導體圖案,從而能夠提高元件的集成度。Chemical-Mechanical Polishing (CMP) is a common process used in semiconductor device manufacturing. In the process, abrasive and corrosive polishing fluids are used in combination with polishing pads to remove unnecessary or irregular structures on the surface of silicon wafers or other substrate materials to achieve the purpose of flattening. The flattened silicon wafer has a flat process surface, which makes it easier to form patterns in dry etching, and can form smaller semiconductor patterns, thereby improving the integration of components.

然而,化學機械研磨製程中常會因為製程中堅硬的雜質顆粒的存在而在受研磨的表面上產生微刮痕缺陷,進而影響到後續製程以及最終元件的可靠度。例如研磨前的預清洗步驟不徹底導致雜質顆粒殘留,或是製程中從晶圓的晶邊(bevel)上脫落的矽結晶顆粒等。故此,本領域的一般技術人士仍需要對現有的化學機械研磨製程進行改善,以避免上述問題。However, the chemical mechanical polishing process often produces micro scratch defects on the polished surface due to the presence of hard impurity particles in the process, which in turn affects the reliability of subsequent processes and final components. For example, the pre-cleaning step before polishing is not thorough, resulting in impurity particles remaining, or silicon crystal particles falling off the bevel of the wafer during the process. Therefore, general technicians in this field still need to improve the existing chemical mechanical polishing process to avoid the above problems.

有鑑於上述習知技術會遇到的問題,本發明於此提出了一種新穎的半導體製程,其特點在於在化學機械研磨前的預清洗步驟與研磨步驟之間加入了一道晶邊處理步驟,去除晶邊的雜質顆粒,以避免該些雜質顆粒在後續的研磨製程中刮傷研磨面,形成微刮痕缺陷。In view of the above problems encountered in the prior art, the present invention proposes a novel semiconductor manufacturing process, which is characterized in that a crystal edge treatment step is added between the pre-cleaning step before chemical mechanical polishing and the polishing step to remove impurity particles on the crystal edge to prevent these impurity particles from scratching the polished surface in the subsequent polishing process to form micro-scratch defects.

本發明的目的在於提出一種可減少化學機械研磨中微刮痕缺陷的半導體製程,其步驟包含:在一清洗機台進行研磨前預清洗步驟、在該研磨前預清洗步驟後,立即進入一晶邊處理裝置進行晶邊處理步驟、以及在該晶邊處理步驟後,立即進入一化學機械研磨機台進行晶圓研磨步驟。The purpose of the present invention is to provide a semiconductor process that can reduce micro-scratch defects in chemical mechanical polishing, and the steps include: performing a pre-cleaning step before polishing in a cleaning machine, immediately entering a wafer edge processing device to perform a wafer edge processing step after the pre-cleaning step before polishing, and immediately entering a chemical mechanical polishing machine to perform a wafer polishing step after the wafer edge processing step.

本發明的這類目的與其他目的在閱者讀過下文中以多種圖示與繪圖來描述的較佳實施例之細節說明後應可變得更為明瞭顯見。These and other objects of the present invention will become more apparent after the reader has read the following detailed description of the preferred embodiments described in various figures and drawings.

現在下文將詳細說明本發明的示例性實施例,其會參照附圖示出所描述之特徵以便閱者理解並實現技術效果。閱者將可理解文中之描述僅透過例示之方式來進行,而非意欲要限制本案。本案的各種實施例和實施例中彼此不衝突的各種特徵可以以各種方式來加以組合或重新設置。在不脫離本發明的精神與範疇的情況下,對本案的修改、等同物或改進對於本領域技術人員來說是可以理解的,並且旨在包含在本案的範圍內。Now, the following will describe in detail exemplary embodiments of the present invention, which will refer to the attached drawings to illustrate the described features so that the reader can understand and achieve the technical effects. The reader will understand that the description herein is only by way of example and is not intended to limit the present invention. Various embodiments of the present invention and various features that do not conflict with each other in the embodiments can be combined or reset in various ways. Without departing from the spirit and scope of the present invention, modifications, equivalents or improvements to the present invention are understandable to those skilled in the art and are intended to be included in the scope of the present invention.

如本文中使用的,術語「基底」是指向其上增加後續材料的材料。可以對基底自身進行圖案化。增加在基底的頂部上的材料可以被圖案化或可以保持不被圖案化。此外,基底可以包括廣泛的半導體材料,例如矽、鍺、砷化鎵、磷化銦等。或者,基底可以由諸如玻璃、塑膠或藍寶石晶圓的非導電材料製成。As used herein, the term "substrate" refers to the material onto which subsequent materials are added. The substrate itself may be patterned. The material added on top of the substrate may be patterned or may remain unpatterned. In addition, the substrate may include a wide range of semiconductor materials such as silicon, germanium, gallium arsenide, indium phosphide, etc. Alternatively, the substrate may be made of non-conductive materials such as glass, plastic, or sapphire wafers.

閱者更能了解到,當「包含」與/或「含有」等詞用於本說明書時,其明定了所陳述特徵、區域、整體、步驟、操作、要素以及/或部件的存在,但並不排除一或多個其他的特徵、區域、整體、步驟、操作、要素、部件以及/或其組合的存在或添加的可能性。Readers can further understand that when the words "include" and/or "contain" are used in this specification, they specify the existence of the described features, regions, wholes, steps, operations, elements and/or components, but do not exclude the possibility of the existence or addition of one or more other features, regions, wholes, steps, operations, elements, components and/or combinations thereof.

請參照第1圖,其為本發明製程所使用機台的頂視示意圖。在本發明的半導體製程中,首先進行一研磨前預清洗步驟。該研磨前預清洗步驟係在一清洗機台100中進行,清洗機台100可為濕式清洗機台,不限於槽式或單片式,其採用特定的化學溶液和去離子水對晶圓表面進行無損傷清洗,如RCA濕式清潔、超聲波清洗等。預清洗步驟中所使用的化學溶液視其先前製程而定,如使用SC1、SC2、硫酸雙氧水混合液(SPM)、四甲基氫氧化銨(TMAH)、臭氧去離子水(DIO 3)、稀釋氫氟酸(DHF)、氫氟酸緩衝液(BHF)等,不限於此。該研磨前預清洗步驟可以將先前製程中殘留在晶圓表面上的各種雜質顆粒與污染物去除,如自然氧化層、有機物、金屬離子、犧牲層等,以提供乾淨的製程表面。 Please refer to FIG. 1, which is a top view schematic diagram of the machine used in the process of the present invention. In the semiconductor process of the present invention, a pre-grinding pre-cleaning step is first performed. The pre-grinding pre-cleaning step is performed in a cleaning machine 100. The cleaning machine 100 can be a wet cleaning machine, not limited to a tank type or a single-wafer type. It uses a specific chemical solution and deionized water to clean the wafer surface without damage, such as RCA wet cleaning, ultrasonic cleaning, etc. The chemical solution used in the pre-cleaning step depends on the previous process, such as SC1, SC2, sulfuric acid and hydrogen peroxide mixture (SPM), tetramethylammonium hydroxide (TMAH), ozone deionized water (DIO 3 ), diluted hydrofluoric acid (DHF), hydrofluoric acid buffer (BHF), etc., but not limited to these. The pre-cleaning step before polishing can remove various impurities and contaminants left on the wafer surface in the previous process, such as natural oxide layer, organic matter, metal ions, sacrificial layer, etc., to provide a clean process surface.

仍參照第1圖。在上述研磨前預清洗步驟後,清洗過的晶圓會立刻經由傳送機構傳送到與清洗機台100相連的一晶邊(bevel)處理裝置200進行晶邊處理步驟。此晶邊處理步驟可以清除前述研磨前預清洗步驟中所無法清洗到的晶邊部位上的雜質與缺陷。在本發明實施例中,晶邊處理步驟包含對晶圓的晶邊進行清洗動作,以及/或是對晶圓的晶邊進行研磨動作,以去除位於晶邊部位的雜質或缺陷。須注意此晶邊處理步驟有別於後續所要進行的化學機械研磨(CMP)步驟,其所針對處理的部位為晶圓的晶邊,而非晶圓的表面或製程面。Still refer to Figure 1. After the above-mentioned pre-cleaning step before grinding, the cleaned wafer will be immediately transferred by a transfer mechanism to a bevel processing device 200 connected to the cleaning machine 100 for a bevel processing step. This bevel processing step can remove impurities and defects on the bevel area that cannot be cleaned in the above-mentioned pre-cleaning step before grinding. In the embodiment of the present invention, the bevel processing step includes cleaning the bevel of the wafer and/or grinding the bevel of the wafer to remove impurities or defects located at the bevel area. It should be noted that this bevel processing step is different from the subsequent chemical mechanical polishing (CMP) step, and the area to be processed is the bevel of the wafer, not the surface or process surface of the wafer.

現在請參照第2圖,其為根據本發明實施例中晶邊處理步驟的截面示意圖。在晶邊處理步驟中,晶邊處理裝置200中待處理晶圓10的晶邊部位會被設置在處理機構202的一凹槽203中,晶圓10可透過轉動的方式使其不同的晶邊部位位於凹槽203中。凹槽203中可通入去離子水對晶圓10的晶邊進行沖洗,以去除晶邊處的雜質顆粒。再者,凹槽203中可設置海綿條或是研磨墊204,並搭配通入研磨液來對晶邊進行研磨。實施例中所使用的研磨液可為一般CMP製程中所使用之研磨液,如氧化鋁研磨液、氧化矽研磨液或氧化鈰研磨液等,特別係針對矽材質的研磨液。上述研磨動作可以進一步去除晶邊處的劣質層或脆弱層結構,避免其雜質顆粒在後續的CMP製程中脫落而刮傷研磨面。Please refer to FIG. 2, which is a cross-sectional schematic diagram of the crystal edge processing step in an embodiment of the present invention. In the crystal edge processing step, the crystal edge portion of the wafer 10 to be processed in the crystal edge processing device 200 will be set in a groove 203 of the processing mechanism 202, and the wafer 10 can be rotated so that different crystal edge portions are located in the groove 203. Deionized water can be introduced into the groove 203 to rinse the crystal edge of the wafer 10 to remove impurity particles at the crystal edge. Furthermore, a sponge or a grinding pad 204 can be set in the groove 203, and a grinding liquid can be introduced to grind the crystal edge. The polishing liquid used in the embodiment can be a polishing liquid used in a general CMP process, such as an aluminum oxide polishing liquid, a silicon oxide polishing liquid or a bismuth oxide polishing liquid, etc., especially a polishing liquid for silicon materials. The above-mentioned polishing action can further remove the inferior layer or fragile layer structure at the crystal edge to prevent its impurity particles from falling off and scratching the polishing surface in the subsequent CMP process.

復參照第1圖。在上述晶邊處理步驟後,處理後的晶圓會立刻經由傳送機構傳送到與晶邊處理裝置200相連的一CMP機台300進行晶圓研磨步驟。先前於清洗機台100以及晶邊處理裝置200進行的動作都是對晶圓作CMP製程的預清洗以及預處理動作,此時在CMP機台300中才進行主要的CMP製程。CMP機台300可為任何類型的研磨機台,例如針對氧化矽、淺溝槽隔離結構、鎢、銅等不同材質或製程的機台。CMP製程中會使用研磨液,如氧化鋁研磨液、氧化矽研磨液或氧化鈰研磨液等研磨液,配合研磨墊來將矽晶圓或其它襯底材料表面上不需要或不規則的結構移除,以此達到平坦化之目的。Refer to FIG. 1 again. After the above-mentioned wafer edge processing step, the processed wafer will be immediately transferred to a CMP machine 300 connected to the wafer edge processing device 200 through a transfer mechanism for a wafer polishing step. The operations previously performed in the cleaning machine 100 and the wafer edge processing device 200 are all pre-cleaning and pre-processing operations for the CMP process of the wafer. At this time, the main CMP process is performed in the CMP machine 300. The CMP machine 300 can be any type of polishing machine, such as a machine for different materials or processes such as silicon oxide, shallow trench isolation structure, tungsten, copper, etc. In the CMP process, polishing liquids such as aluminum oxide polishing liquid, silicon oxide polishing liquid or tael oxide polishing liquid are used together with polishing pads to remove unnecessary or irregular structures on the surface of silicon wafers or other substrate materials to achieve the purpose of planarization.

在本發明實施例中,晶邊處理裝置200較佳位於清洗機台100與CMP機台300之間,且連接該兩者。如此,晶圓可以在清洗機台100中完成預清洗步驟後,立即且直接透過傳送機構傳送到晶邊處理裝置200中進行晶邊處理,且在晶邊處理後可立即且直接透過傳送機構傳送到CMP機台300進行CMP製程,如此的設置可以避免額外新增的晶邊處理動作對整體製程的產出有過大的影響。 以上所述僅為本發明之較佳實施例,凡依本發明申請專利範圍所做之均等變化與修飾,皆應屬本發明之涵蓋範圍。 In the embodiment of the present invention, the edge processing device 200 is preferably located between the cleaning machine 100 and the CMP machine 300, and the two are connected. In this way, after the wafer completes the pre-cleaning step in the cleaning machine 100, it can be immediately and directly transferred to the edge processing device 200 through the conveying mechanism for edge processing, and after the edge processing, it can be immediately and directly transferred to the CMP machine 300 through the conveying mechanism for CMP process. Such a setting can avoid the additional edge processing action from having too much impact on the output of the overall process. The above is only a preferred embodiment of the present invention. All equal changes and modifications made according to the scope of the patent application of the present invention should be covered by the present invention.

10:晶圓 100:清洗機台 200:晶邊處理裝置 202:處理機構 203:凹槽 204:海綿條(研磨墊) 300:化學機械研磨(CMP)機台 10: Wafer 100: Cleaning machine 200: Wafer edge processing device 202: Processing mechanism 203: Groove 204: Sponge (polishing pad) 300: Chemical mechanical polishing (CMP) machine

第1圖為本發明製程所使用機台的頂視示意圖;以及 第2圖為根據本發明實施例中晶邊處理步驟的截面示意圖。 須注意本說明書中的所有圖示皆為圖例性質,為了清楚與方便圖示說明之故,圖示中的各部件在尺寸與比例上可能會被誇大或縮小地呈現,一般而言,圖中相同的參考符號會用來標示修改後或不同實施例中對應或類似的元件特徵。 FIG. 1 is a top view schematic diagram of the machine used in the process of the present invention; and FIG. 2 is a cross-sectional schematic diagram of the crystal edge processing step according to an embodiment of the present invention. It should be noted that all the diagrams in this specification are of a legend nature. For the sake of clarity and convenience of illustration, the size and proportion of each component in the diagram may be exaggerated or reduced. Generally speaking, the same reference symbols in the figure will be used to indicate corresponding or similar component features after modification or in different embodiments.

100:清洗機台 100: Cleaning machine

200:晶邊處理裝置 200: Crystal edge processing device

300:化學機械研磨(CMP)機台 300: Chemical Mechanical Polishing (CMP) Machine

Claims (6)

一種減少化學機械研磨中微刮痕缺陷的半導體製程,包含: 在一清洗機台進行研磨前預清洗步驟; 在該研磨前預清洗步驟後,立即進入一晶邊處理裝置進行晶邊處理步驟;以及 在該晶邊處理步驟後,立即進入一化學機械研磨機台進行晶圓研磨步驟。 A semiconductor process for reducing micro-scratch defects in chemical mechanical polishing, comprising: performing a pre-polishing step in a cleaning machine; immediately entering a wafer edge treatment device to perform a wafer edge treatment step after the pre-polishing step; and immediately entering a chemical mechanical polishing machine to perform a wafer polishing step after the wafer edge treatment step. 如申請專利範圍第1項所述之減少化學機械研磨中微刮痕缺陷的半導體製程,其中該晶邊處理步驟包含對晶圓的晶邊進行清洗。A semiconductor process for reducing micro-scratch defects in chemical mechanical polishing as described in claim 1, wherein the crystal edge processing step includes cleaning the crystal edge of the wafer. 如申請專利範圍第2項所述之減少化學機械研磨中微刮痕缺陷的半導體製程,其中使用去離子水對晶圓的晶邊進行清洗。A semiconductor process for reducing micro-scratch defects in chemical mechanical polishing as described in claim 2, wherein deionized water is used to clean the edge of the wafer. 如申請專利範圍第1項所述之減少化學機械研磨中微刮痕缺陷的半導體製程,其中該晶邊處理步驟包含對晶圓的晶邊進行研磨。A semiconductor process for reducing micro-scratch defects in chemical mechanical polishing as described in claim 1, wherein the crystal edge processing step includes polishing the crystal edge of the wafer. 如申請專利範圍第4項所述之減少化學機械研磨中微刮痕缺陷的半導體製程,其中使用研磨液對晶圓的晶邊進行研磨。A semiconductor process for reducing micro-scratch defects in chemical mechanical polishing as described in item 4 of the patent application scope, wherein a polishing liquid is used to polish the edge of the wafer. 如申請專利範圍第1項所述之減少化學機械研磨中微刮痕缺陷的半導體製程,其中該晶邊處理裝置位於該清洗機台與該化學機械研磨機台之間且連接該兩者。A semiconductor process for reducing micro-scratch defects in chemical mechanical polishing as described in item 1 of the patent application scope, wherein the crystal edge processing device is located between the cleaning machine and the chemical mechanical polishing machine and connects the two.
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