TW202245292A - Light emitting device and method of light emitting chip mass transfer - Google Patents

Light emitting device and method of light emitting chip mass transfer Download PDF

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TW202245292A
TW202245292A TW110116758A TW110116758A TW202245292A TW 202245292 A TW202245292 A TW 202245292A TW 110116758 A TW110116758 A TW 110116758A TW 110116758 A TW110116758 A TW 110116758A TW 202245292 A TW202245292 A TW 202245292A
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light
semiconductor layer
substrate
layer
microstructure
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TWI757170B (en
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陳韋潔
李冠誼
曾文賢
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友達光電股份有限公司
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/15—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission
    • H01L27/153—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars
    • H01L27/156—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components having potential barriers, specially adapted for light emission in a repetitive configuration, e.g. LED bars two-dimensional arrays
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0093—Wafer bonding; Removal of the growth substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/005—Processes
    • H01L33/0095—Post-treatment of devices, e.g. annealing, recrystallisation or short-circuit elimination
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L33/02—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies
    • H01L33/20—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor bodies with a particular shape, e.g. curved or truncated substrate
    • H01L33/22—Roughened surfaces, e.g. at the interface between epitaxial layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2933/00—Details relating to devices covered by the group H01L33/00 but not provided for in its subgroups
    • H01L2933/0091—Scattering means in or on the semiconductor body or semiconductor body package

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Abstract

The present disclosure provides a light-emitting device including a substrate and a plurality of light-emitting chip, in which each of the light-emitting chips includes a semiconductor layer. The semiconductor layer includes a first surface with a first surface structure and a microstructure group on the first surface, in which the microstructure group includes a plurality of microstructures, and a second surface of each microstructure has a second surface structure different from the first surface structure of the first surface.

Description

發光裝置和巨量轉移發光晶片的方法Light-emitting device and method for mass transfer of light-emitting wafer

本公開內容是關於發光裝置，且特別是關於具有發光晶片的發光裝置和巨量轉移發光晶片的方法。The present disclosure relates to light emitting devices, and more particularly to light emitting devices having light emitting wafers and methods of mass transferring light emitting wafers.

在發光裝置的發展中，裝置中的發光晶片尺寸逐漸微小化，使得發光晶片可作為發光裝置的獨立單元，從而提高裝置的性能、漸少裝置的能耗等。舉例而言，微發光二極體(micro light emitting diode，micro LED)作為顯示器的像素單元，可增加顯示器的清晰度和對比度、縮短顯示器的反應時間，並節省顯示器的能量消耗。然而，發光晶片的微小化使得發光裝置中需配置大量的發光晶片，且根據發光裝置的不同設計，裝置中的不同區域需配置不同種類的發光晶片。因此，如何提升大量配置發光晶片的效率和精確性，是發光裝置領域的重要開發項目。In the development of light-emitting devices, the size of the light-emitting chip in the device is gradually miniaturized, so that the light-emitting chip can be used as an independent unit of the light-emitting device, thereby improving the performance of the device and reducing the energy consumption of the device. For example, a micro light emitting diode (micro LED) as a pixel unit of a display can increase the definition and contrast of the display, shorten the response time of the display, and save energy consumption of the display. However, the miniaturization of light-emitting chips requires a large number of light-emitting chips in the light-emitting device, and according to different designs of the light-emitting device, different areas of the device need to be equipped with different types of light-emitting chips. Therefore, how to improve the efficiency and accuracy of disposing a large number of light-emitting chips is an important development project in the field of light-emitting devices.

根據本公開一實施例提供一種發光裝置，包括基板和位於基板上的複數個發光晶片，其中各個發光晶片包括半導體層。半導體層包括具有第一表面結構的第一表面和位於第一表面上的微結構組，其中微結構組包括複數個微結構，且微結構的第二表面具有第二表面結構不同於第一表面的第一表面結構。According to an embodiment of the present disclosure, a light emitting device is provided, which includes a substrate and a plurality of light emitting chips located on the substrate, wherein each light emitting chip includes a semiconductor layer. The semiconductor layer includes a first surface with a first surface structure and a microstructure group located on the first surface, wherein the microstructure group includes a plurality of microstructures, and the second surface of the microstructure has a second surface structure different from the first surface the first surface structure.

在本公開一些實施例中，第一表面結構的側壁和第一表面之間的底角不同於第二表面結構的側壁和第二表面之間的底角。In some embodiments of the present disclosure, the bottom angle between the sidewall of the first surface structure and the first surface is different from the bottom angle between the sidewall of the second surface structure and the second surface.

在本公開一些實施例中，第一表面結構平行於第一表面的截面形狀不同於第二表面結構平行於第二表面的截面形狀。In some embodiments of the present disclosure, the cross-sectional shape of the first surface structure parallel to the first surface is different from the cross-sectional shape of the second surface structure parallel to the second surface.

在本公開一些實施例中，微結構的寬度介於1微米至5微米間。In some embodiments of the present disclosure, the width of the microstructure is between 1 micron and 5 microns.

在本公開一些實施例中，微結構的高度介於1微米至3微米間。In some embodiments of the present disclosure, the height of the microstructures is between 1 micron and 3 microns.

在本公開一些實施例中，微結構之中相鄰兩者之間的中心距離介於1微米至10微米間。In some embodiments of the present disclosure, the center-to-center distance between two adjacent microstructures is between 1 micron and 10 microns.

在本公開一些實施例中，微結構之中相鄰兩者之間的間隙介於0.5微米至5微米間。In some embodiments of the present disclosure, the gap between two adjacent microstructures is between 0.5 microns and 5 microns.

在本公開一些實施例中，微結構垂直於第一表面的截面形狀是方形、矩形、梯形或半球形。In some embodiments of the present disclosure, the cross-sectional shape of the microstructure perpendicular to the first surface is square, rectangular, trapezoidal or hemispherical.

在本公開一些實施例中，微結構組在第一方向上和不同於第一方向的第二方向上具有至少兩個微結構。In some embodiments of the present disclosure, the group of microstructures has at least two microstructures in a first direction and a second direction different from the first direction.

在本公開一些實施例中，基板包括第一襯墊層，各個發光晶片包括第二襯墊層，第一襯墊層和第二襯墊層藉由焊料層電性連接。In some embodiments of the present disclosure, the substrate includes a first pad layer, each light emitting chip includes a second pad layer, and the first pad layer and the second pad layer are electrically connected by a solder layer.

在本公開一些實施例中，發光晶片之中相鄰兩者包括不同波長的發光材料。In some embodiments of the present disclosure, adjacent two of the light-emitting chips include light-emitting materials with different wavelengths.

在本公開一些實施例中，基板包括薄膜電晶體陣列。In some embodiments of the present disclosure, the substrate includes a thin film transistor array.

根據本公開一實施例提供一種巨量轉移發光晶片的方法，包括在第一基板上形成複數個發光晶片，其中各個發光晶片包括具有第一表面的半導體層，第一表面接觸第一基板且第一表面和第一基板之間的介面平坦。方法包括將發光晶片的第二表面黏附於相對於第一表面的第二基板上、使用光源照射半導體層和第一基板之間的介面以使發光晶片脫離第一基板，以及在半導體層的第一表面上形成具有複數個微結構的微結構組。According to an embodiment of the present disclosure, there is provided a method for mass transfer of light-emitting chips, including forming a plurality of light-emitting chips on a first substrate, wherein each light-emitting chip includes a semiconductor layer having a first surface, the first surface contacts the first substrate and the second surface contacts the first substrate. The interface between the first surface and the first substrate is flat. The method includes adhering a second surface of the light-emitting wafer on a second substrate opposite to the first surface, using a light source to irradiate an interface between the semiconductor layer and the first substrate to detach the light-emitting wafer from the first substrate, and A microstructure group having a plurality of microstructures is formed on a surface.

在本公開一些實施例中，形成微結構組包括濺鍍半導體材料於半導體層的第一表面上，以及共晶融合半導體材料和半導體層，其中第一表面上的半導體材料具有微結構的輪廓。In some embodiments of the present disclosure, forming the microstructure group includes sputtering a semiconductor material on the first surface of the semiconductor layer, and eutectically fusing the semiconductor material and the semiconductor layer, wherein the semiconductor material on the first surface has a profile of the microstructure.

在本公開一些實施例中，形成微結構組包括沉積半導體材料於具有對應微結構的複數個凹槽的模板中、將半導體層設置於模板上以使半導體層的第一表面接觸凹槽中的半導體材料、共晶融合半導體材料和半導體層，以及移除模板。In some embodiments of the present disclosure, forming the microstructure group includes depositing a semiconductor material in a template having a plurality of grooves corresponding to the microstructure, disposing the semiconductor layer on the template so that the first surface of the semiconductor layer contacts the grooves. Semiconductor materials, eutectic fusion of semiconductor materials and semiconductor layers, and removal of templates.

在本公開一些實施例中，形成微結構組包括沉積半導體材料於承載基板的黏附層上且黏附層上的半導體材料具有微結構的輪廓、將承載基板設置於半導體層上方以使半導體材料接觸半導體層的第一表面、移除承載基板和黏附層，以及共晶融合該半導體材料和該半導體層。In some embodiments of the present disclosure, forming the microstructure group includes depositing a semiconductor material on the adhesive layer of the carrier substrate, and the semiconductor material on the adhesive layer has a profile of the microstructure, disposing the carrier substrate on the semiconductor layer so that the semiconductor material contacts the semiconductor layer. layer, removing the carrier substrate and adhesion layer, and eutectic fusing the semiconductor material and the semiconductor layer.

在本公開一些實施例中，移除承載基板和黏附層包括加熱黏附層。In some embodiments of the present disclosure, removing the carrier substrate and the adhesive layer includes heating the adhesive layer.

在本公開一些實施例中，移除承載基板和黏附層包括使用紫外線照射黏附層。In some embodiments of the present disclosure, removing the carrier substrate and the adhesive layer includes irradiating the adhesive layer with ultraviolet light.

在本公開一些實施例中，形成微結構組包括形成圍繞發光晶片的光阻層且光阻層具有上表面高於半導體層的第一表面、圖案化光阻層的上表面，以及藉由光阻層蝕刻半導體層的第一表面。In some embodiments of the present disclosure, forming the microstructure group includes forming a photoresist layer surrounding the light-emitting wafer, and the photoresist layer has an upper surface higher than the first surface of the semiconductor layer, patterning the upper surface of the photoresist layer, and The resistance layer etches the first surface of the semiconductor layer.

在本公開一些實施例中，照射介面的光源包括能量介於600mJ/cm 2至700mJ/cm 2的雷射光。 In some embodiments of the present disclosure, the light source for illuminating the interface includes laser light with energy ranging from 600 mJ/cm 2 to 700 mJ/cm 2 .

為了實現提及主題的不同特徵，以下公開內容提供了許多不同的實施例或示例。以下描述組件、數值、配置等的具體示例以簡化本公開。當然，這些僅僅是示例，而不是限制性的。例如，當諸如層、膜、區域或基板的元件被稱為在另一元件「上」或「連接到」另一元件時，其可以直接在另一元件上或與另一元件連接，或者也可以存在中間元件。相反地，當元件被稱為「直接在另一元件上」或「直接連接到」另一元件時，不存在中間元件。如本文所使用的，「連接」可以指物理及/或電性連接。再者，「電性連接」或「耦合」可以在兩元件間存在其它元件。The following disclosure presents many different embodiments or examples in order to achieve the different features of the mentioned subject matter. Specific examples of components, values, configurations, etc. are described below to simplify the present disclosure. Of course, these are examples only, not limiting. For example, when an element such as a layer, film, region, or substrate is referred to as being "on" or "connected to" another element, it can be directly on or connected to the other element, or also Intermediate elements may be present. In contrast, when an element is referred to as being "directly on" or "directly connected to" another element, there are no intervening elements present. As used herein, "connected" may refer to physical and/or electrical connection. Furthermore, "electrically connected" or "coupled" may have other elements between the two elements.

本文使用的「約」、「近似」或「實質上」包括所述值和在本領域普通技術人員確定的特定值的可接受偏差範圍內的平均值，考慮到所討論的測量和與測量相關的誤差的特定數值(即，測量系統的限制)。例如，「約」可以表示在所述值的一個或多個標準偏差內，或±30％、±20％、±10％、±5％內。再者，本文使用的「約」、「近似」或「實質上」可依光學性質、蝕刻性質或其它性質，來選擇較可接受的偏差範圍或標準偏差，而可不用一個標準偏差適用全部性質。As used herein, "about," "approximately," or "substantially" includes stated values and averages within acceptable deviations from a particular value as determined by one of ordinary skill in the art, taking into account the measurements in question and the measurements associated with them. The specific value of the error (ie, the limit of the measurement system). For example, "about" can mean within one or more standard deviations, or within ±30%, ±20%, ±10%, ±5% of the stated value. Furthermore, the terms "about", "approximately" or "substantially" used herein can choose a more acceptable deviation range or standard deviation according to optical properties, etching properties or other properties, and it is not necessary to use one standard deviation to apply to all properties .

除非另有定義，本文使用的所有術語(包括技術和科學術語)具有與本發明所屬領域的普通技術人員通常理解的相同的含義。進一步理解的是，諸如在通常使用的字典中定義的那些術語應當解釋為具有與它們在相關技術和本發明的上下文中一致的含義，並且將不解釋為理想化的或過度正式的意義，除非本文中明確地這樣定義。Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by one of ordinary skill in the art to which this invention belongs. It is further understood that terms such as those defined in commonly used dictionaries should be interpreted to have their meaning consistent with the relevant art and in the context of the present invention, and will not be interpreted in an idealized or overly formal sense unless It is expressly defined as such herein.

本公開內容提供一種發光裝置以及巨量轉移發光晶片的方法。發光晶片經由巨量轉移的方法形成於發光裝置中，使得發光晶片可精準且快速地形成於發光裝置中的指定區域，而且發光晶片的半導體層的表面具有適合的微結構組以均勻化發光晶片發出的光線。因此，經由本公開的方法形成的發光晶片可提升發光裝置的良率和光學表現。The disclosure provides a light emitting device and a method for mass transferring a light emitting wafer. The light-emitting chip is formed in the light-emitting device through the method of mass transfer, so that the light-emitting chip can be precisely and quickly formed in the designated area of the light-emitting device, and the surface of the semiconductor layer of the light-emitting chip has a suitable microstructure group to uniformize the light-emitting chip emitted light. Therefore, the light-emitting wafer formed by the method of the present disclosure can improve the yield and optical performance of the light-emitting device.

依據本公開的一些實施例，第1A圖繪示發光裝置10的立體配置圖。發光裝置10包括基板100以及位於基板100上的多個發光晶片200(發光晶片200a、發光晶片200b和發光晶片200c)，其中各個發光晶片200包括半導體層210。應理解的是，儘管在第1A圖中的發光裝置10具有三個發光晶片200，具有其他數量的發光晶片200的發光裝置10亦在本公開的範圍內。另外，發光裝置10的一些元件未在第1A圖至第1C圖中示出以簡化圖式，在其他實施例中的發光裝置10可包括額外的元件。According to some embodiments of the present disclosure, FIG. 1A shows a three-dimensional configuration diagram of a light emitting device 10 . The light emitting device 10 includes a substrate 100 and a plurality of light emitting chips 200 (light emitting chip 200 a , light emitting chip 200 b , and light emitting chip 200 c ) located on the substrate 100 , wherein each light emitting chip 200 includes a semiconductor layer 210 . It should be understood that although the light emitting device 10 in FIG. 1A has three light emitting chips 200 , light emitting devices 10 with other numbers of light emitting chips 200 are also within the scope of the present disclosure. In addition, some elements of the light emitting device 10 are not shown in FIGS. 1A to 1C to simplify the drawings, and the light emitting device 10 in other embodiments may include additional elements.

參考第1A圖，半導體層210的上表面212上包括微結構組300，其中上表面212相對於半導體層210面向基板100的表面。具體而言，半導體層210具有從上表面212突起的微結構310，並由多個微結構310組成上表面212上的微結構組300。由於半導體層210的上表面212具有微結構組300，使得發光晶片200發出的光線從上表面212離開半導體層210時，光線可經過微結構組300的散射，從而增加發光晶片200的光線均勻性、改善發光裝置10的光學表現。Referring to FIG. 1A , the upper surface 212 of the semiconductor layer 210 includes the microstructure group 300 , wherein the upper surface 212 faces the surface of the substrate 100 relative to the semiconductor layer 210 . Specifically, the semiconductor layer 210 has microstructures 310 protruding from the upper surface 212 , and the microstructure group 300 on the upper surface 212 is composed of a plurality of microstructures 310 . Since the upper surface 212 of the semiconductor layer 210 has the microstructure group 300, when the light emitted by the light emitting chip 200 leaves the semiconductor layer 210 from the upper surface 212, the light can be scattered by the microstructure group 300, thereby increasing the light uniformity of the light emitting chip 200 , Improve the optical performance of the light emitting device 10 .

在一些實施例中，發光晶片200可藉由合適的方式連接基板100，使得多個發光晶片200可同時形成於基板100上。依據本公開的一些實施例，第1B圖繪示第1A圖中的發光裝置10沿著截線A-A′的截面圖。參考第1B圖，基板100可包括第一襯墊層102，發光晶片200可包括第二襯墊層202(例如p型襯墊和n型襯墊)，其中第一襯墊層102和第二襯墊層202藉由焊料層電性連接。舉例而言，基板100可包括用以控制其上方的發光晶片200的薄膜電晶體(thin film transistor，TFT)陣列，發光晶片200可以是微發光二極體(micro light emitting diode，Micro LED)，而發光晶片200藉由第一襯墊層102和第二襯墊層202電性連接至基板100。由於發光晶片200整體可藉由焊料層連接於基板100上，使得多個發光晶片200可先在基板100以外的基板(例如承載基板)上形成或儲存，並在後續的製程中(例如巨量轉移製程)可轉移至基板100上。因此，多個發光晶片200可根據發光裝置10的設計而具有特定的排列圖案。In some embodiments, the light emitting chip 200 can be connected to the substrate 100 in a suitable way, so that multiple light emitting chips 200 can be formed on the substrate 100 at the same time. According to some embodiments of the present disclosure, FIG. 1B shows a cross-sectional view of the light emitting device 10 in FIG. 1A along the section line A-A′. Referring to FIG. 1B, the substrate 100 may include a first pad layer 102, and the light-emitting wafer 200 may include a second pad layer 202 (such as a p-type pad and an n-type pad), wherein the first pad layer 102 and the second pad layer The pad layer 202 is electrically connected by the solder layer. For example, the substrate 100 may include a thin film transistor (thin film transistor, TFT) array for controlling the light emitting chip 200 above it, and the light emitting chip 200 may be a micro light emitting diode (micro light emitting diode, Micro LED), The light emitting chip 200 is electrically connected to the substrate 100 through the first pad layer 102 and the second pad layer 202 . Since the entire light-emitting chip 200 can be connected to the substrate 100 through a solder layer, multiple light-emitting chips 200 can be formed or stored on a substrate other than the substrate 100 (such as a carrier substrate) first, and then processed in a subsequent process (such as a mass transfer process) can be transferred onto the substrate 100. Therefore, the plurality of light emitting chips 200 may have a specific arrangement pattern according to the design of the light emitting device 10 .

在一些實施例中，基板100上可包括發出多種光線的發光晶片200，從而增加發光裝置10的應用性。具體而言，相鄰的發光晶片200可包括不同波長的發光材料，使得發光裝置10可散發混合不同波長的光線。舉例而言，在第1A圖中的發光晶片200a可具有發出紅色光線的發光材料，發光晶片200b可具有發出綠色光線的發光材料，而發光晶片200c可具有發出藍色光線的發光材料。由於發光裝置10可包括多種發光晶片200，使得發光裝置10可以應用於例如全彩顯示器的顯示裝置中。In some embodiments, the substrate 100 may include a light-emitting chip 200 that emits various types of light, thereby increasing the applicability of the light-emitting device 10 . Specifically, adjacent light-emitting chips 200 may include light-emitting materials with different wavelengths, so that the light-emitting device 10 may emit and mix lights of different wavelengths. For example, the light-emitting chip 200a in FIG. 1A may have a light-emitting material that emits red light, the light-emitting chip 200b may have a light-emitting material that emits green light, and the light-emitting chip 200c may have a light-emitting material that emits blue light. Since the light emitting device 10 may include various light emitting chips 200 , the light emitting device 10 may be applied in a display device such as a full-color display.

在一些實施例中，發光晶片200的半導體層210可具有合適的材料，從而增加發光晶片200的發光效率。舉例而言，半導體層210的材料可以是氮化鎵，使得發光晶片200可具有高亮度、低能耗、壽命長等優勢。在一些實施例中，半導體層210的微結構310可具有合適的材料，從而多個微結構310可以牢固地形成於半導體層210的上表面212上。舉例而言，微結構310和半導體層210可具有相同的半導體材料，使得微結構310和半導體層210之間可良好地結合，從而增加微結構310在上表面212上的穩定性。In some embodiments, the semiconductor layer 210 of the light emitting chip 200 may have a suitable material, so as to increase the luminous efficiency of the light emitting chip 200 . For example, the material of the semiconductor layer 210 can be gallium nitride, so that the light-emitting chip 200 can have advantages such as high brightness, low energy consumption, and long lifespan. In some embodiments, the microstructures 310 of the semiconductor layer 210 may have suitable materials, so that a plurality of microstructures 310 may be firmly formed on the upper surface 212 of the semiconductor layer 210 . For example, the microstructure 310 and the semiconductor layer 210 can have the same semiconductor material, so that the microstructure 310 and the semiconductor layer 210 can be well bonded, thereby increasing the stability of the microstructure 310 on the upper surface 212 .

在一些實施例中，半導體層210的微結構310可以具有合適的尺寸，用以均勻化發光晶片200發出的光線。參考第1B圖至第1C圖，第1B圖繪示第1A圖中的發光裝置10沿著截線A-A′的截面圖，且第1C圖繪示第1A圖中的發光晶片200a的局部俯視圖。如第1B圖至第1C圖所示，微結構310可具有寬度D和高度H，使得微結構310可均勻化發光晶片200的光線。舉例而言，微結構310的寬度D可介於1微米至5微米間，微結構310的高度H可介於1微米至3微米間。In some embodiments, the microstructure 310 of the semiconductor layer 210 may have a suitable size for uniformizing the light emitted by the light emitting chip 200 . Referring to FIG. 1B to FIG. 1C, FIG. 1B shows a cross-sectional view of the light-emitting device 10 in FIG. 1A along the section line A-A', and FIG. 1C shows a partial top view of the light-emitting chip 200a in FIG. 1A. As shown in FIG. 1B to FIG. 1C , the microstructure 310 can have a width D and a height H, so that the microstructure 310 can uniform the light of the light emitting chip 200 . For example, the width D of the microstructure 310 may be between 1 micron and 5 microns, and the height H of the microstructure 310 may be between 1 micron and 3 microns.

在一些實施例中，半導體層210的微結構310可以具有合適的排列方式，用以均勻化發光晶片200發出的光線。參考第1C圖，微結構310之中相鄰兩者之間可具有合適的中心距離S，且微結構310之中相鄰兩者之間可具有間隙F，使得微結構310可均勻化發光晶片200的光線。舉例而言，相鄰的微結構310之間的中心距離S可介於1微米至10微米間，相鄰的微結構310之間的間隙F可介於0.5微米至5微米間。In some embodiments, the microstructures 310 of the semiconductor layer 210 may have a proper arrangement for uniformizing the light emitted by the light emitting chip 200 . Referring to FIG. 1C, there may be an appropriate center distance S between adjacent two microstructures 310, and there may be a gap F between adjacent two microstructures 310, so that the microstructure 310 can homogenize the light-emitting wafer 200 rays. For example, the center distance S between adjacent microstructures 310 may be between 1 micron and 10 microns, and the gap F between adjacent microstructures 310 may be between 0.5 micron and 5 microns.

在一些實施例中，半導體層210的微結構310可以具有合適的形狀，用以均勻化發光晶片200發出的光線。具體而言，微結構310可具有連續的平滑側壁或是漸變斜率的倒角，使得微結構310可均勻地分散發光晶片200的光線。例如，在垂直於半導體層210的上表面212的方向上，微結構310具有的截面形狀可以是方形、矩形、梯形或半圓形。在一些實施例中，半導體層210的微結構310可以具有合適的數量，用以均勻化發光晶片200發出的光線。舉例而言，如第1A圖和第1C圖所示，微結構組300在第一方向D1上和不同於第一方向D1的第二方向D2上可具有至少兩個微結構310，從而提供半導體層210足夠的微結構310以均勻化發光晶片200的光線。In some embodiments, the microstructure 310 of the semiconductor layer 210 may have a suitable shape for uniformizing the light emitted by the light emitting chip 200 . Specifically, the microstructure 310 can have a continuous smooth sidewall or a chamfer with a gradual slope, so that the microstructure 310 can evenly disperse the light from the light emitting chip 200 . For example, in a direction perpendicular to the upper surface 212 of the semiconductor layer 210, the microstructure 310 may have a cross-sectional shape of a square, a rectangle, a trapezoid, or a semicircle. In some embodiments, the microstructures 310 of the semiconductor layer 210 may have an appropriate amount for uniformizing the light emitted by the light emitting wafer 200 . For example, as shown in FIG. 1A and FIG. 1C, the microstructure group 300 may have at least two microstructures 310 in a first direction D1 and a second direction D2 different from the first direction D1, thereby providing a semiconductor The layer 210 has enough microstructures 310 to homogenize the light from the light emitting wafer 200 .

在一些實施例中，半導體層210和微結構310可具有不同的表面結構。依據本公開的一些實施例，第2A圖繪示第1B圖中發光晶片200的半導體層210的上表面212的放大截面圖，第2B圖繪示半導體層210的上表面212的放大俯視圖，第3A圖繪示第1B圖中發光晶片200的微結構310的上表面312的放大截面圖，且第3B圖繪示微結構310的上表面312的放大俯視圖。參考第2A圖至第3B圖，半導體層210的上表面212上具有第一表面結構214，微結構310的上表面312具有第二表面結構314，其中第二表面結構314不同於第一表面結構214。In some embodiments, the semiconductor layer 210 and the microstructure 310 may have different surface structures. According to some embodiments of the present disclosure, FIG. 2A shows an enlarged cross-sectional view of the upper surface 212 of the semiconductor layer 210 of the light-emitting wafer 200 in FIG. 1B , and FIG. 2B shows an enlarged top view of the upper surface 212 of the semiconductor layer 210 . 3A shows an enlarged cross-sectional view of the upper surface 312 of the microstructure 310 of the light-emitting chip 200 in FIG. 1B , and FIG. 3B shows an enlarged top view of the upper surface 312 of the microstructure 310 . 2A to 3B, the upper surface 212 of the semiconductor layer 210 has a first surface structure 214, and the upper surface 312 of the microstructure 310 has a second surface structure 314, wherein the second surface structure 314 is different from the first surface structure 214.

在一些實施例中，如第2A圖和第3A圖所示，第一表面結構214的側壁和上表面212之間可具有底角θ1，第二表面結構314的側壁和上表面312之間可具有底角θ2，其中底角θ1不同於底角θ2。舉例而言，第一表面結構214的側壁和上表面212之間的底角θ1可以介於40度至45度之間，而第二表面結構314的側壁和上表面312之間的底角θ2可以介於50度至55度之間。在一些實施例中，第一表面結構214平行於半導體層210的上表面212的截面形狀可以不同於第二表面結構314平行於微結構310的上表面312的截面形狀。舉例而言，如第2B圖和第3B圖所示，第一表面結構214平行於上表面212的截面形狀可以大致上是三角形，而第二表面結構314平行於上表面312的截面形狀可以大致上是六角形。換而言之，第一表面結構214可以是三角錐狀的突起結構，而第二表面結構314可以是六角錐狀的突起結構。In some embodiments, as shown in FIG. 2A and FIG. 3A, there may be a bottom angle θ1 between the sidewall of the first surface structure 214 and the upper surface 212, and there may be a bottom angle θ1 between the sidewall of the second surface structure 314 and the upper surface 312. has a base angle θ2, wherein the base angle θ1 is different from the base angle θ2. For example, the bottom angle θ1 between the sidewall of the first surface structure 214 and the upper surface 212 can be between 40 degrees and 45 degrees, and the bottom angle θ2 between the sidewall of the second surface structure 314 and the upper surface 312 It can be between 50 degrees and 55 degrees. In some embodiments, the cross-sectional shape of the first surface structure 214 parallel to the upper surface 212 of the semiconductor layer 210 may be different from the cross-sectional shape of the second surface structure 314 parallel to the upper surface 312 of the microstructure 310 . For example, as shown in FIG. 2B and FIG. 3B, the cross-sectional shape of the first surface structure 214 parallel to the upper surface 212 may be substantially triangular, while the cross-sectional shape of the second surface structure 314 parallel to the upper surface 312 may be substantially The top is hexagonal. In other words, the first surface structure 214 may be a triangular pyramid-shaped protrusion structure, and the second surface structure 314 may be a hexagonal pyramid-shaped protrusion structure.

依據本公開的一些實施例，第4圖至第7圖、第8A圖至第8C圖、第9A圖至第9D圖、第10A圖至第10E圖和第11A圖至第11D圖分別繪示發光晶片巨量轉移製程的各個階段的截面圖。發光裝置中的發光晶片可事先形成，並經由巨量轉移製程轉移至具有電路的基板上以形成發光裝置。因此，發光裝置中的發光晶片可自由排列，從而增加發光裝置的設計多樣性和應用性。應理解的是，第4圖至第11D圖繪示的製程步驟僅作為示例，本領域技術人員可在所繪示的製程之前、之中及之後增加額外的步驟，或者可替換、減少或移動所繪示的製程步驟。According to some embodiments of the present disclosure, Figures 4 to 7, Figures 8A to 8C, Figures 9A to 9D, Figures 10A to 10E, and Figures 11A to 11D respectively illustrate Cross-sectional views of the various stages of the mass transfer process for light-emitting wafers. The light-emitting chip in the light-emitting device can be formed in advance, and transferred to the substrate with the circuit through mass transfer process to form the light-emitting device. Therefore, the light-emitting chips in the light-emitting device can be arranged freely, thereby increasing the design diversity and applicability of the light-emitting device. It should be understood that the process steps depicted in FIGS. 4 to 11D are merely examples, and those skilled in the art may add additional steps before, during, and after the depicted processes, or may replace, subtract, or move The process steps shown.

參考第4圖，在第一基板1000上形成多個發光晶片200(例如第1A圖所示的發光晶片200a、200b和200c)。第一基板1000上的發光晶片200包括半導體層210，其中半導體層210具有接觸第一基板1000的第一表面216，且發光晶片200具有相對於第一表面216的第二表面218暴露在外。換而言之，發光晶片200具有接觸第一基板1000的第一表面216和相對於第一表面216的第二表面218。如第4圖所示，發光晶片200形成於第一基板1000上時，半導體層210的第一表面216和第一基板1000之間的介面是平坦的。舉例而言，第一基板1000可以是具有平坦上表面的藍寶石基板，使得半導體層210形成於第一基板1000上時可具有平坦的第一表面216。Referring to FIG. 4, a plurality of light emitting chips 200 (eg, light emitting chips 200a, 200b, and 200c shown in FIG. 1A) are formed on a first substrate 1000. Referring to FIG. The light emitting chip 200 on the first substrate 1000 includes a semiconductor layer 210 , wherein the semiconductor layer 210 has a first surface 216 contacting the first substrate 1000 , and the light emitting chip 200 has a second surface 218 exposed to the first surface 216 . In other words, the light emitting chip 200 has a first surface 216 contacting the first substrate 1000 and a second surface 218 opposite to the first surface 216 . As shown in FIG. 4 , when the light emitting chip 200 is formed on the first substrate 1000 , the interface between the first surface 216 of the semiconductor layer 210 and the first substrate 1000 is flat. For example, the first substrate 1000 may be a sapphire substrate with a flat upper surface, so that the semiconductor layer 210 may have a flat first surface 216 when formed on the first substrate 1000 .

參考第5圖，將發光晶片200的第二表面218黏附於第二基板1010上。具體而言，將第一基板1000移動至包括黏附層1012的第二基板1010上方，使得發光晶片200的第二表面218面向第二基板1010上的黏附層1012。接著加壓於第一基板1000上，使得發光晶片200的第二表面218接觸黏附層1012並可藉由黏附層1012黏附於第二基板1010上。在一些實施例中，如第5圖所示，發光晶片200的第二表面218可具有襯墊層(例如第1B圖所示的第二襯墊層202)，使得發光晶片200的第二表面218不整體接觸黏附層1012。Referring to FIG. 5 , the second surface 218 of the light emitting chip 200 is adhered on the second substrate 1010 . Specifically, the first substrate 1000 is moved over the second substrate 1010 including the adhesive layer 1012 such that the second surface 218 of the light emitting chip 200 faces the adhesive layer 1012 on the second substrate 1010 . Then press on the first substrate 1000 so that the second surface 218 of the light emitting chip 200 contacts the adhesive layer 1012 and can be adhered to the second substrate 1010 by the adhesive layer 1012 . In some embodiments, as shown in FIG. 5, the second surface 218 of the light-emitting wafer 200 may have a backing layer (such as the second backing layer 202 shown in FIG. 1B), so that the second surface of the light-emitting wafer 200 218 does not entirely contact the adhesive layer 1012 .

參考第6圖至第7圖，使用光源1014照射半導體層210和第一基板1000之間的介面，使得發光晶片200脫離第一基板1000。具體而言，當使用合適的光源1014照射半導體層210時，半導體層210中的半導體材料(例如氮化鎵)可產生分解反應並產生氣體，從而增加半導體層210和第一基板1000之間的縫隙的氣壓。因此，使用光源1014照射半導體層210和第一基板1000之間的介面(例如第一表面216)促使發光晶片200脫離第一基板1000。換而言之，發光晶片200從第一基板1000轉移至第二基板1010上。舉例而言，可使用波長為266nm的雷射光源1014照射半導體層210和第一基板1000之間的介面，使得半導體層210從第一基板1000轉移至第二基板1010。由於半導體層210和第一基板1000之間的介面平坦，半導體層210產生少量的氣體即足以促使發光晶片200脫離第一基板1000。因此，平坦的介面可增加發光晶片200轉移至第二基板1010的轉移率。另一方面，良好的轉移率允許使用較低能量的光源1014照射半導體層210，從而減少對半導體層210的損傷。舉例而言，照射半導體層210和第一基板1000之間的介面的光源1014可包括能量介於600mJ/cm 2至700mJ/cm 2之間的雷射光，且發光晶片200的轉移率可介於95%至100%之間。 Referring to FIGS. 6 to 7 , the light source 1014 is used to illuminate the interface between the semiconductor layer 210 and the first substrate 1000 so that the light emitting chip 200 is detached from the first substrate 1000 . Specifically, when a suitable light source 1014 is used to irradiate the semiconductor layer 210, the semiconductor material (such as gallium nitride) in the semiconductor layer 210 can undergo a decomposition reaction and generate gas, thereby increasing the distance between the semiconductor layer 210 and the first substrate 1000. Air pressure in the gap. Therefore, using the light source 1014 to irradiate the interface (eg, the first surface 216 ) between the semiconductor layer 210 and the first substrate 1000 causes the light emitting chip 200 to detach from the first substrate 1000 . In other words, the light emitting chip 200 is transferred from the first substrate 1000 to the second substrate 1010 . For example, a laser light source 1014 with a wavelength of 266 nm can be used to irradiate the interface between the semiconductor layer 210 and the first substrate 1000 , so that the semiconductor layer 210 is transferred from the first substrate 1000 to the second substrate 1010 . Since the interface between the semiconductor layer 210 and the first substrate 1000 is flat, a small amount of gas generated by the semiconductor layer 210 is enough to cause the light emitting chip 200 to detach from the first substrate 1000 . Therefore, the flat interface can increase the transfer rate of the light emitting chip 200 to the second substrate 1010 . On the other hand, a good transfer rate allows the semiconductor layer 210 to be irradiated with a lower energy light source 1014 , thereby reducing damage to the semiconductor layer 210 . For example, the light source 1014 for illuminating the interface between the semiconductor layer 210 and the first substrate 1000 may include laser light with an energy between 600 mJ/cm 2 and 700 mJ/cm 2 , and the transfer rate of the light emitting chip 200 may be between Between 95% and 100%.

如第7圖所示，將發光晶片200轉移至第二基板1010後，半導體層210的平坦的第一表面216暴露在外。因此，在後續的製程中，可以在第一表面216上形成上述具有多個微結構的微結構組(例如第1B圖中的微結構組300)，使得發光晶片200具有可均勻化光線的半導體層210。以下將配合第8A圖至第11D圖描述本公開形成微結構組的實施例，然而應理解的是，第8A圖至第11D圖繪示的製程步驟僅作為示例，本領域技術人員可在所繪示的製程之前、之中及之後增加額外的步驟，或者可替換、減少或移動所繪示的製程步驟。As shown in FIG. 7 , after the light-emitting wafer 200 is transferred to the second substrate 1010 , the flat first surface 216 of the semiconductor layer 210 is exposed. Therefore, in the subsequent manufacturing process, the above-mentioned microstructure group (such as the microstructure group 300 in FIG. 1B ) with multiple microstructures can be formed on the first surface 216, so that the light-emitting wafer 200 has a semiconductor that can homogenize light. Layer 210. The following will describe an embodiment of forming a microstructure group according to the present disclosure in conjunction with FIG. 8A to FIG. 11D . However, it should be understood that the process steps shown in FIG. 8A to FIG. Additional steps may be added before, during, and after the depicted process, or depicted process steps may be substituted, subtracted, or moved.

依據本公開的一些實施例，第8A圖至第8C圖繪示發光晶片巨量轉移製程的各個階段的截面圖，其中第8A圖所示的發光晶片200可以是第7圖中第二基板1010的黏附層1012上的發光晶片200。參考第8A圖，濺鍍半導體材料1020於半導體層210的第一表面216上，使得第一表面216上的半導體材料410具有上述微結構(例如第1B圖中的微結構310)的輪廓。舉例而言，如第8A圖所示，使用能量源1022(例如離子源)濺鍍遮罩1024上方的半導體材料1020，其中遮罩1024具有對應於微結構輪廓的孔洞。半導體材料1020穿過遮罩1024的孔洞並抵達遮罩1024的另一側的半導體層210，從而沉積於半導體層210的第一表面216上。因此，半導體材料1020可形成第一表面216上的半導體材料410，且半導體材料410具有微結構的輪廓。According to some embodiments of the present disclosure, FIG. 8A to FIG. 8C show cross-sectional views of various stages of the light-emitting wafer mass transfer process, wherein the light-emitting wafer 200 shown in FIG. 8A may be the second substrate 1010 in FIG. 7 The light-emitting wafer 200 on the adhesive layer 1012. Referring to FIG. 8A, the semiconductor material 1020 is sputtered on the first surface 216 of the semiconductor layer 210, so that the semiconductor material 410 on the first surface 216 has the profile of the aforementioned microstructure (such as the microstructure 310 in FIG. 1B). For example, as shown in FIG. 8A, an energy source 1022, such as an ion source, is used to sputter semiconductor material 1020 over a mask 1024 having holes corresponding to the microstructure profile. The semiconductor material 1020 passes through the hole of the mask 1024 and reaches the semiconductor layer 210 on the other side of the mask 1024 , so as to be deposited on the first surface 216 of the semiconductor layer 210 . Accordingly, the semiconductor material 1020 may form the semiconductor material 410 on the first surface 216, and the semiconductor material 410 has a microstructure profile.

參考第8B圖至第8C圖，共晶融合半導體材料410和半導體層210，從而形成半導體層210上的微結構組300。具體而言，針對半導體材料410和半導體層210進行包括加熱步驟和加壓步驟的共晶融合製程1100，使得半導體材料410和半導體層210的第一表面216產生共晶反應而進一步彼此貼合。因此，半導體層210的第一表面216上的半導體材料410形成多個穩固的微結構310，且多個微結構310組成微結構組300。Referring to FIGS. 8B to 8C , the semiconductor material 410 and the semiconductor layer 210 are eutectically fused to form the microstructure group 300 on the semiconductor layer 210 . Specifically, a eutectic fusion process 1100 including a heating step and a pressing step is performed on the semiconductor material 410 and the semiconductor layer 210 , so that the semiconductor material 410 and the first surface 216 of the semiconductor layer 210 undergo a eutectic reaction and further adhere to each other. Therefore, the semiconductor material 410 on the first surface 216 of the semiconductor layer 210 forms a plurality of stable microstructures 310 , and the plurality of microstructures 310 constitute the microstructure group 300 .

在一些實施例中，共晶融合製程1100可提供合適的溫度和壓力，使得半導體材料410和半導體層210的材料可成長為穩固的共晶型態。舉例而言，共晶融合製程1100的溫度可介於950˚C至1100˚C之間，且共晶融合製程1100的壓力可介於650torr至750torr之間，使得半導體材料410和半導體層210經過約30分鐘的共晶融合製程1100後可形成穩固的微結構310。在一些實施例中，半導體層210和微結構310經過不同次數的加熱製程，使得半導體層210和微結構310具有不同的表面結構。舉例而言，半導體層210形成於第一基板1000上時(如第4圖所示的製程中)經過第一次加熱製程，並在共晶融合製程1100中經過第二次加熱製程，使得半導體層210的第一表面216具有第一表面結構(例如第2A圖所示的第一表面結構214)。相對地，微結構310在共晶融合製程1100中經過一次加熱製程，使得微結構310的表面具有不同於第一表面結構的第二表面結構(例如第3A圖所示的第二表面結構314)。In some embodiments, the eutectic fusion process 1100 can provide suitable temperature and pressure, so that the materials of the semiconductor material 410 and the semiconductor layer 210 can grow into a stable eutectic state. For example, the temperature of the eutectic fusion process 1100 may be between 950°C and 1100°C, and the pressure of the eutectic fusion process 1100 may be between 650torr and 750torr, so that the semiconductor material 410 and the semiconductor layer 210 pass through A stable microstructure 310 can be formed after about 30 minutes of eutectic fusion process 1100 . In some embodiments, the semiconductor layer 210 and the microstructure 310 undergo different times of heating processes, so that the semiconductor layer 210 and the microstructure 310 have different surface structures. For example, when the semiconductor layer 210 is formed on the first substrate 1000 (in the process shown in FIG. The first surface 216 of the layer 210 has a first surface structure (eg, the first surface structure 214 shown in FIG. 2A ). In contrast, the microstructure 310 undergoes a heating process in the eutectic fusion process 1100, so that the surface of the microstructure 310 has a second surface structure different from the first surface structure (such as the second surface structure 314 shown in FIG. 3A) .

依據本公開的一些實施例，第9A圖至第9D圖繪示發光晶片巨量轉移製程的各個階段的截面圖，其中第9B圖所示的發光晶片200可以是第7圖中第二基板1010的黏附層1012上的發光晶片200。參考第9A圖，沉積半導體材料410於模板1030中。模板1030具有對應上述微結構(例如第1B圖中的微結構310)的多個凹槽，使得沉積於模板1030中的半導體材料410具有微結構的輪廓。在一些實施例中，半導體材料410填滿模板1030中的凹槽並且經過平坦化，使得半導體材料410暴露在外的表面和模板1030的上表面齊平，從而在後續製程中可提供具有平坦接合面的半導體材料410。According to some embodiments of the present disclosure, FIG. 9A to FIG. 9D show cross-sectional views of various stages of the light-emitting wafer mass transfer process, wherein the light-emitting wafer 200 shown in FIG. 9B may be the second substrate 1010 in FIG. 7 The light-emitting wafer 200 on the adhesive layer 1012. Referring to FIG. 9A , semiconductor material 410 is deposited in template 1030 . The template 1030 has a plurality of grooves corresponding to the aforementioned microstructures (such as the microstructure 310 in FIG. 1B ), so that the semiconductor material 410 deposited in the template 1030 has the profile of the microstructures. In some embodiments, the semiconductor material 410 fills the groove in the template 1030 and is planarized, so that the exposed surface of the semiconductor material 410 is flush with the upper surface of the template 1030, so that a flat bonding surface can be provided in subsequent processes. The semiconductor material 410.

參考第9B圖，將半導體層210設置於模板1030上方，使半導體層210的平坦的第一表面216接觸半導體材料410。具體而言，移動第二基板1010至模板1030上方，使得藉由黏附層1012固定於第二基板1010上的發光晶片200位於模板1030上方。如第9B圖所示，發光晶片200的半導體層210的第一表面216面向模板1030。接著使半導體層210的第一表面216接觸模板1030的凹槽中的半導體材料410，從而形成半導體層210和半導體材料410之間的介面。Referring to FIG. 9B , the semiconductor layer 210 is disposed over the template 1030 such that the flat first surface 216 of the semiconductor layer 210 contacts the semiconductor material 410 . Specifically, the second substrate 1010 is moved above the template 1030 so that the light-emitting chip 200 fixed on the second substrate 1010 by the adhesive layer 1012 is located above the template 1030 . As shown in FIG. 9B , the first surface 216 of the semiconductor layer 210 of the light emitting wafer 200 faces the template 1030 . The first surface 216 of the semiconductor layer 210 is then brought into contact with the semiconductor material 410 in the recess of the template 1030 , thereby forming an interface between the semiconductor layer 210 and the semiconductor material 410 .

參考第9C圖至第9D圖，共晶融合半導體材料410和半導體層210，並且移除模板1030，從而形成半導體層210上的微結構組300。具體而言，針對半導體材料410和半導體層210進行類似第8B圖所示的共晶融合製程1100，使得半導體材料410和半導體層210的第一表面216產生共晶反應而進一步彼此貼合。因此，移除模板1030後，半導體層210的第一表面216上的半導體材料410形成多個穩固的微結構310，且多個微結構310組成微結構組300。Referring to FIGS. 9C to 9D , the semiconductor material 410 and the semiconductor layer 210 are eutectically fused, and the template 1030 is removed, thereby forming the microstructure group 300 on the semiconductor layer 210 . Specifically, a eutectic fusion process 1100 similar to that shown in FIG. 8B is performed on the semiconductor material 410 and the semiconductor layer 210 , so that the semiconductor material 410 and the first surface 216 of the semiconductor layer 210 undergo a eutectic reaction to further adhere to each other. Therefore, after the template 1030 is removed, the semiconductor material 410 on the first surface 216 of the semiconductor layer 210 forms a plurality of stable microstructures 310 , and the plurality of microstructures 310 constitute the microstructure group 300 .

依據本公開的一些實施例，第10A圖至第10E圖繪示發光晶片巨量轉移製程的各個階段的截面圖，其中第10B圖所示的發光晶片200可以是第7圖中第二基板1010的黏附層1012上的發光晶片200。參考第10A圖，沉積半導體材料410於承載基板1040上。具體而言，承載基板1040上包括黏附層1042，可用以接收沉積於其上的半導體材料410。半導體材料410穿過遮罩1044沉積於承載基板1040的黏附層1042上，其中遮罩1044具有對應於上述微結構(例如第1B圖中的微結構310)的多個孔洞。因此，黏附層1042上的半導體材料410可具有微結構的輪廓。According to some embodiments of the present disclosure, FIG. 10A to FIG. 10E illustrate cross-sectional views of various stages of the light-emitting wafer mass transfer process, wherein the light-emitting wafer 200 shown in FIG. 10B may be the second substrate 1010 in FIG. 7 The light-emitting wafer 200 on the adhesive layer 1012. Referring to FIG. 10A , a semiconductor material 410 is deposited on a carrier substrate 1040 . Specifically, the carrier substrate 1040 includes an adhesive layer 1042 for receiving the semiconductor material 410 deposited thereon. The semiconductor material 410 is deposited on the adhesive layer 1042 of the carrier substrate 1040 through the mask 1044, wherein the mask 1044 has a plurality of holes corresponding to the aforementioned microstructure (eg, the microstructure 310 in FIG. 1B). Accordingly, the semiconductor material 410 on the adhesion layer 1042 may have a microstructure profile.

參考第10B圖，將承載基板1040設置於半導體層210上方，使半導體層210的平坦的第一表面216接觸半導體材料410。具體而言，移動承載基板1040至第二基板1010上方，使得藉由黏附層1042固定於承載基板1040上的半導體材料410面向第二基板1010上的半導體層210。接著使半導體層210的第一表面216接觸黏附層1042上的半導體材料410，從而形成半導體層210和半導體材料410之間的介面。Referring to FIG. 10B , the carrier substrate 1040 is disposed above the semiconductor layer 210 such that the flat first surface 216 of the semiconductor layer 210 contacts the semiconductor material 410 . Specifically, the carrier substrate 1040 is moved above the second substrate 1010 so that the semiconductor material 410 fixed on the carrier substrate 1040 by the adhesive layer 1042 faces the semiconductor layer 210 on the second substrate 1010 . The first surface 216 of the semiconductor layer 210 is then brought into contact with the semiconductor material 410 on the adhesion layer 1042 , thereby forming an interface between the semiconductor layer 210 and the semiconductor material 410 .

參考第10C圖，移除承載基板1040和黏附層1042，使得半導體材料410設置於半導體層210的第一表面216上。具體而言，可施加特定的加工製程1200而使得黏附層1042失去黏性，從而分離黏附層1042和半導體材料410。因此，移除承載基板1040和黏附層1042後，具有微結構輪廓的半導體材料410保留於半導體層210的第一表面216上。在一些實施例中，移除承載基板1040和黏附層1042的加工製程1200包括加熱黏附層1042，使得黏附層1042失去黏性。舉例而言，可使用約90˚C至150˚C的溫度加熱黏附層1042，從而移除承載基板1040和黏附層1042。在一些其他的實施例中，移除承載基板1040和黏附層1042的加工製程1200包括使用紫外線照射黏附層1042，使得黏附層1042失去黏性。舉例而言，可使用能量約500mJ/cm 2至1000mJ/cm 2的紫外線照射黏附層1042，從而移除承載基板1040和黏附層1042。 Referring to FIG. 10C , the carrier substrate 1040 and the adhesive layer 1042 are removed such that the semiconductor material 410 is disposed on the first surface 216 of the semiconductor layer 210 . Specifically, a specific process 1200 may be applied to make the adhesive layer 1042 lose its viscosity, thereby separating the adhesive layer 1042 from the semiconductor material 410 . Therefore, after removing the carrier substrate 1040 and the adhesive layer 1042 , the semiconductor material 410 with the microstructure profile remains on the first surface 216 of the semiconductor layer 210 . In some embodiments, the process 1200 of removing the carrier substrate 1040 and the adhesive layer 1042 includes heating the adhesive layer 1042 such that the adhesive layer 1042 loses its adhesiveness. For example, the adhesive layer 1042 may be heated using a temperature of about 90°C to 150°C, thereby removing the carrier substrate 1040 and the adhesive layer 1042 . In some other embodiments, the process 1200 of removing the carrier substrate 1040 and the adhesive layer 1042 includes irradiating the adhesive layer 1042 with ultraviolet rays, so that the adhesive layer 1042 loses its adhesiveness. For example, the adhesive layer 1042 may be irradiated with ultraviolet light having an energy of about 500 mJ/cm 2 to 1000 mJ/cm 2 , so as to remove the carrier substrate 1040 and the adhesive layer 1042 .

參考第10D圖至第10E圖，共晶融合半導體材料410和半導體層210，從而形成半導體層210上的微結構組300。具體而言，針對半導體材料410和半導體層210進行類似第8B圖所示的共晶融合製程1100，使得半導體材料410和半導體層210的第一表面216產生共晶反應而進一步彼此貼合。因此，半導體層210的第一表面216上的半導體材料410形成多個穩固的微結構310，且多個微結構310組成微結構組300。Referring to FIGS. 10D to 10E , the semiconductor material 410 and the semiconductor layer 210 are eutectically fused to form the microstructure group 300 on the semiconductor layer 210 . Specifically, a eutectic fusion process 1100 similar to that shown in FIG. 8B is performed on the semiconductor material 410 and the semiconductor layer 210 , so that the semiconductor material 410 and the first surface 216 of the semiconductor layer 210 undergo a eutectic reaction to further adhere to each other. Therefore, the semiconductor material 410 on the first surface 216 of the semiconductor layer 210 forms a plurality of stable microstructures 310 , and the plurality of microstructures 310 constitute the microstructure group 300 .

依據本公開的一些實施例，第11A圖至第11D圖繪示發光晶片巨量轉移製程的各個階段的截面圖，其中第11A圖所示的發光晶片200可以是第7圖中第二基板1010的黏附層1012上的發光晶片200。參考第11A圖，形成圍繞發光晶片200的光阻層1050。具體而言，光阻層1050覆蓋發光晶片200的側壁，且光阻層1050的上表面1052高於發光晶片200的半導體層210的第一表面216。由於光阻層1050的上表面1052和半導體層210的第一表面216之間具有間距，從而在後續的製程中圖案化光阻層1050時，可避免圖案化製程影響半導體層210。According to some embodiments of the present disclosure, FIG. 11A to FIG. 11D show cross-sectional views of various stages of the light-emitting wafer mass transfer process, wherein the light-emitting wafer 200 shown in FIG. 11A may be the second substrate 1010 in FIG. 7 The light-emitting wafer 200 on the adhesive layer 1012. Referring to FIG. 11A, a photoresist layer 1050 surrounding the light emitting chip 200 is formed. Specifically, the photoresist layer 1050 covers the sidewall of the light emitting chip 200 , and the upper surface 1052 of the photoresist layer 1050 is higher than the first surface 216 of the semiconductor layer 210 of the light emitting chip 200 . Since there is a distance between the upper surface 1052 of the photoresist layer 1050 and the first surface 216 of the semiconductor layer 210 , when the photoresist layer 1050 is patterned in subsequent processes, the semiconductor layer 210 can be prevented from being affected by the patterning process.

參考第11B圖，圖案化光阻層1050的上表面1052。具體而言，將光阻層1050的上表面1052暴露於紫外光源和遮罩1054之下，並藉由顯影製程移除部分的光阻層1050，使得遮罩1054的圖案轉移至光阻層1050的上表面1052上。在光阻層1050為正型(positive type)的實施例中，遮罩1054具有對應於上述微結構(例如第1B圖中的微結構310)之間的間隙的多個孔洞，使得光阻層1050經過曝光和顯影製程之後，光阻層1050的剩餘部分可對應於將形成的微結構。Referring to FIG. 11B, the upper surface 1052 of the photoresist layer 1050 is patterned. Specifically, the upper surface 1052 of the photoresist layer 1050 is exposed to the ultraviolet light source and the mask 1054, and part of the photoresist layer 1050 is removed by a developing process, so that the pattern of the mask 1054 is transferred to the photoresist layer 1050. on the upper surface 1052 of the In an embodiment in which the photoresist layer 1050 is a positive type, the mask 1054 has a plurality of holes corresponding to the gaps between the aforementioned microstructures (such as the microstructure 310 in FIG. 1B ), such that the photoresist layer After the exposure and development processes of the photoresist layer 1050 are performed, the remaining portion of the photoresist layer 1050 may correspond to the microstructure to be formed.

參考第11C圖至第11D圖，藉由光阻層1050蝕刻半導體層210的第一表面216，從而形成半導體層210上的微結構組300。具體而言，可將光阻層1050作為半導體層210的遮罩，並使用選擇性蝕刻製程蝕刻半導體層210的第一表面216，從而將光阻層1050的圖案轉移至半導體層210。半導體層210的第一表面216上形成多個微結構310後，可停止選擇性蝕刻製程並移除光阻層1050。因此，經過蝕刻的半導體層210的第一表面216具有多個微結構310組成的微結構組300，從而形成可均勻化光線的發光晶片200。Referring to FIG. 11C to FIG. 11D , the first surface 216 of the semiconductor layer 210 is etched through the photoresist layer 1050 to form the microstructure group 300 on the semiconductor layer 210 . Specifically, the photoresist layer 1050 can be used as a mask of the semiconductor layer 210 , and the first surface 216 of the semiconductor layer 210 can be etched using a selective etching process, so as to transfer the pattern of the photoresist layer 1050 to the semiconductor layer 210 . After the plurality of microstructures 310 are formed on the first surface 216 of the semiconductor layer 210, the selective etching process can be stopped and the photoresist layer 1050 can be removed. Therefore, the etched first surface 216 of the semiconductor layer 210 has a microstructure group 300 composed of a plurality of microstructures 310 , so as to form a light-emitting chip 200 that can homogenize light.

根據本公開上述實施例，發光裝置包括基板和基板上的多個發光晶片，其中發光晶片包括在表面上具有微結構組的半導體層。更具體而言，微結構組中的多個微結構具有表面結構不同於半導體層具有的表面結構。半導體層表面上的微結構組可分散穿過半導體層的表面的光線，從而均勻化發光晶片發出的光線。因此，本公開提供的發光裝置可增加發光晶片發出的光線均勻性，從而增加發光裝置的光學表現。According to the above-described embodiments of the present disclosure, a light emitting device includes a substrate and a plurality of light emitting wafers on the substrate, wherein the light emitting wafer includes a semiconductor layer having a microstructure group on a surface. More specifically, the plurality of microstructures in the group of microstructures have a surface structure different from that of the semiconductor layer. The group of microstructures on the surface of the semiconductor layer can disperse the light passing through the surface of the semiconductor layer, so as to homogenize the light emitted by the light-emitting wafer. Therefore, the light-emitting device provided by the present disclosure can increase the uniformity of the light emitted by the light-emitting chip, thereby increasing the optical performance of the light-emitting device.

根據本公開上述實施例，巨量轉移發光晶片的方法包括轉移具有平坦半導體層表面的發光晶片，以及在其平坦表面上形成微結構組。由於轉移時的半導體層具有平坦表面，使得發光晶片巨量轉移時的轉移率增加並降低所需轉移能量。因此，本公開提供的巨量轉移發光晶片的方法增加發光晶片形成於發光裝置中的精確性，從而增加發光裝置的良率和製程效率。According to the above-described embodiments of the present disclosure, the method for mass transferring a light-emitting wafer includes transferring a light-emitting wafer having a flat surface of a semiconductor layer, and forming a microstructure group on the flat surface. Since the semiconductor layer during transfer has a flat surface, the transfer rate during mass transfer of the light-emitting wafer is increased and the required transfer energy is reduced. Therefore, the method for mass transfer of light-emitting wafers provided by the present disclosure increases the accuracy of forming the light-emitting wafers in the light-emitting device, thereby increasing the yield and process efficiency of the light-emitting device.

前面概述一些實施例的特徵，使得本領域技術人員可更好地理解本公開的觀點。本領域技術人員應該理解，他們可以容易地使用本公開作為設計或修改其他製程和結構的基礎，以實現相同的目的和/或實現與本文介紹之實施例相同的優點。本領域技術人員還應該理解，這樣的等同構造不脫離本公開的精神和範圍，並且在不脫離本公開的精神和範圍的情況下，可以進行各種改變、替換和變更。The foregoing outlines features of some embodiments so that those skilled in the art may better understand the aspects of the present disclosure. Those skilled in the art should appreciate that they may readily use the present disclosure as a basis for designing or modifying other processes and structures for carrying out the same purposes and/or achieving the same advantages as the embodiments described herein. Those skilled in the art should also understand that such equivalent constructions do not depart from the spirit and scope of the present disclosure, and that they can make various changes, substitutions and alterations without departing from the spirit and scope of the present disclosure.

10:發光裝置 100:基板 102:第一襯墊層 200:發光晶片 202:第二襯墊層 210:半導體層 212:上表面 214:第一表面結構 216:第一表面 218:第二表面 300:微結構組 310:微結構 312:上表面 314:第二表面結構 410:半導體材料 1000:第一基板 1010:第二基板 1012:黏附層 1014:光源 1020:半導體材料 1022:能量源 1024:遮罩 1030:模板 1040:承載基板 1042:黏附層 1044:遮罩 1050:光阻層 1052:上表面 1054:遮罩 1100:共晶融合製程 1200:加工製程 A-A′:截線 D:寬度 F:間隙 H:高度 S:中心距離 10: Lighting device 100: Substrate 102: The first backing layer 200: light emitting chip 202: second cushion layer 210: semiconductor layer 212: upper surface 214: First surface structure 216: first surface 218: second surface 300: microstructure group 310: Microstructure 312: upper surface 314:Second surface structure 410: Semiconductor materials 1000: first substrate 1010: second substrate 1012: Adhesion layer 1014: light source 1020: Semiconductor materials 1022: energy source 1024: mask 1030: template 1040: carrying substrate 1042: Adhesion layer 1044: mask 1050: photoresist layer 1052: upper surface 1054: mask 1100: Eutectic fusion process 1200: Processing process A-A': Intersection D: width F: Clearance H: height S: center distance

當結合附圖閱讀時，從以下詳細描述中可以最好地理解本公開的各方面。應注意，根據工業中的標準方法，各種特徵未按比例繪製。實際上，為了清楚地討論，可任意增加或減少各種特徵的尺寸。 第1A圖依據本公開的一些實施例繪示發光裝置的立體配置圖。 第1B圖繪示第1A圖中的發光裝置沿著截線A-A′的截面圖。 第1C圖繪示第1A圖中的發光晶片的俯視圖。 第2A圖和第3A圖依據本公開的一些實施例繪示發光晶片的表面的放大截面圖。 第2B圖繪示和第3B圖依據本公開的一些實施例繪示發光晶片的表面的放大俯視圖。 第4圖至第7圖依據本公開的一些實施例繪示發光晶片巨量轉移製程的各個階段的截面圖。 第8A圖至第8C圖依據本公開的一些實施例繪示發光晶片巨量轉移製程的各個階段的截面圖。 第9A圖至第9D圖依據本公開的一些其他實施例繪示發光晶片巨量轉移製程的各個階段的截面圖。 第10A圖至第10E圖依據本公開的一些其他實施例繪示發光晶片巨量轉移製程的各個階段的截面圖。 第11A圖至第11D圖依據本公開的一些其他實施例繪示發光晶片巨量轉移製程的各個階段的截面圖。 Aspects of the disclosure are best understood from the following detailed description when read with the accompanying figures. It should be noted that, according to the standard practice in the industry, various features are not drawn to scale. In fact, the dimensions of the various features may be arbitrarily increased or decreased for clarity of discussion. FIG. 1A shows a three-dimensional configuration diagram of a light emitting device according to some embodiments of the present disclosure. FIG. 1B shows a cross-sectional view of the light emitting device in FIG. 1A along the section line A-A'. FIG. 1C shows a top view of the light-emitting chip in FIG. 1A. Figures 2A and 3A illustrate enlarged cross-sectional views of the surface of a light-emitting wafer according to some embodiments of the present disclosure. FIG. 2B and FIG. 3B illustrate enlarged top views of the surface of a light-emitting wafer according to some embodiments of the present disclosure. 4 to 7 illustrate cross-sectional views of various stages of a light-emitting wafer mass transfer process according to some embodiments of the present disclosure. FIGS. 8A to 8C illustrate cross-sectional views of various stages of a light-emitting wafer mass transfer process according to some embodiments of the present disclosure. FIG. 9A to FIG. 9D illustrate cross-sectional views of various stages of the mass transfer process of light-emitting wafers according to some other embodiments of the present disclosure. FIG. 10A to FIG. 10E illustrate cross-sectional views of various stages of a light-emitting wafer mass transfer process according to some other embodiments of the present disclosure. FIG. 11A to FIG. 11D illustrate cross-sectional views of various stages of a light-emitting wafer mass transfer process according to some other embodiments of the present disclosure.

國內寄存資訊(請依寄存機構、日期、號碼順序註記) 無 國外寄存資訊(請依寄存國家、機構、日期、號碼順序註記) 無 Domestic deposit information (please note in order of depositor, date, and number) none Overseas storage information (please note in order of storage country, institution, date, and number) none

10:發光裝置 10: Lighting device

100:基板 100: Substrate

102:第一襯墊層 102: The first backing layer

200:發光晶片 200: light emitting chip

202:第二襯墊層 202: second cushion layer

210:半導體層 210: semiconductor layer

212:上表面 212: upper surface

300:微結構組 300: microstructure group

310:微結構 310: Microstructure

312:上表面 312: upper surface

H:高度 H: height

Claims (20)

一種發光裝置，包括： 一基板；以及 複數個發光晶片，位於該基板上，其中各該發光晶片包括一半導體層，包括： 一第一表面，具有一第一表面結構；以及 一微結構組，位於該第一表面上，其中該微結構組包括複數個微結構，且該些微結構的一第二表面具有一第二表面結構不同於該第一表面的該第一表面結構。 A lighting device comprising: a substrate; and A plurality of light-emitting chips are located on the substrate, wherein each light-emitting chip includes a semiconductor layer, including: a first surface having a first surface structure; and A group of microstructures located on the first surface, wherein the group of microstructures includes a plurality of microstructures, and a second surface of the microstructures has a second surface structure different from the first surface structure of the first surface . 如請求項1所述之發光裝置，其中該第一表面結構的側壁和該第一表面之間的底角不同於該第二表面結構的側壁和該第二表面之間的底角。The light-emitting device according to claim 1, wherein a bottom angle between the sidewall of the first surface structure and the first surface is different from a bottom angle between the sidewall of the second surface structure and the second surface. 如請求項1所述之發光裝置，其中該第一表面結構平行於該第一表面的一截面形狀不同於該第二表面結構平行於該第二表面的一截面形狀。The light-emitting device according to claim 1, wherein a cross-sectional shape of the first surface structure parallel to the first surface is different from a cross-sectional shape of the second surface structure parallel to the second surface. 如請求項1所述之發光裝置，其中該些微結構的寬度介於1微米至5微米間。The light-emitting device according to claim 1, wherein the width of the microstructures is between 1 micron and 5 microns. 如請求項1所述之發光裝置，其中該些微結構的高度介於1微米至3微米間。The light-emitting device according to claim 1, wherein the height of the microstructures is between 1 micron and 3 microns. 如請求項1所述之發光裝置，其中該些微結構之中相鄰兩者之間的中心距離介於1微米至10微米間。The light-emitting device according to claim 1, wherein the center-to-center distance between adjacent two of the microstructures is between 1 micron and 10 microns. 如請求項1所述之發光裝置，其中該些微結構之中相鄰兩者之間的間隙介於0.5微米至5微米間。The light-emitting device according to claim 1, wherein the gap between adjacent two of the microstructures is between 0.5 microns and 5 microns. 如請求項1所述之發光裝置，其中該些微結構垂直於該第一表面的截面形狀是方形、矩形、梯形或半球形。The light-emitting device according to claim 1, wherein the cross-sectional shape of the microstructure perpendicular to the first surface is square, rectangular, trapezoidal or hemispherical. 如請求項1所述之發光裝置，其中該微結構組在一第一方向上和不同於該第一方向的第二方向上具有至少兩個該些微結構。The light-emitting device according to claim 1, wherein the group of microstructures has at least two microstructures in a first direction and a second direction different from the first direction. 如請求項1所述之發光裝置，其中該基板包括一第一襯墊層，各該發光晶片包括一第二襯墊層，該第一襯墊層和該第二襯墊層藉由一焊料層電性連接。The light-emitting device as claimed in claim 1, wherein the substrate includes a first pad layer, each of the light-emitting chips includes a second pad layer, and the first pad layer and the second pad layer are connected by a solder layer electrical connections. 如請求項1所述之發光裝置，其中該些發光晶片之中相鄰兩者包括不同波長的發光材料。The light-emitting device according to claim 1, wherein adjacent two of the light-emitting chips include light-emitting materials with different wavelengths. 如請求項1所述之發光裝置，其中該基板包括薄膜電晶體陣列。The light emitting device as claimed in claim 1, wherein the substrate comprises a thin film transistor array. 一種巨量轉移發光晶片的方法，包括： 在一第一基板上形成複數個發光晶片，其中各該發光晶片包括具有一第一表面的一半導體層，該第一表面接觸該第一基板且該第一表面和該第一基板之間的一介面是平坦的； 將各該發光晶片的一第二表面黏附於一第二基板上，該第二表面相對於該第一表面； 使用一光源照射該半導體層和該第一基板之間的該介面，使該發光晶片脫離該第一基板；以及 在該半導體層的該第一表面上形成具有複數個微結構的一微結構組。 A method for mass transfer of light-emitting wafers, comprising: A plurality of light-emitting chips are formed on a first substrate, wherein each of the light-emitting chips includes a semiconductor layer having a first surface, the first surface contacts the first substrate and the gap between the first surface and the first substrate an interface is flat; a second surface of each of the light-emitting chips is adhered to a second substrate, the second surface is opposite to the first surface; using a light source to irradiate the interface between the semiconductor layer and the first substrate to detach the light emitting chip from the first substrate; and A microstructure group with a plurality of microstructures is formed on the first surface of the semiconductor layer. 如請求項13所述之方法，其中形成該微結構組包括： 濺鍍一半導體材料於該半導體層的該第一表面上，其中該第一表面上的該半導體材料具有該些微結構的輪廓；以及 共晶融合該半導體材料和該半導體層。 The method according to claim 13, wherein forming the microstructure group comprises: sputtering a semiconductor material on the first surface of the semiconductor layer, wherein the semiconductor material on the first surface has the microstructure profile; and The eutectic fuses the semiconductor material and the semiconductor layer. 如請求項13所述之方法，其中形成該微結構組包括： 沉積一半導體材料於一模板中，其中該模板具有對應該些微結構的複數個凹槽； 將該半導體層設置於該模板上，使該半導體層的該第一表面接觸該些凹槽中的該半導體材料； 共晶融合該半導體材料和該半導體層；以及 移除該模板。 The method according to claim 13, wherein forming the microstructure group comprises: depositing a semiconductor material in a template, wherein the template has a plurality of grooves corresponding to the microstructure; disposing the semiconductor layer on the template such that the first surface of the semiconductor layer contacts the semiconductor material in the grooves; eutectically fusing the semiconductor material and the semiconductor layer; and Remove this template. 如請求項13所述之方法，其中形成該微結構組包括： 沉積一半導體材料於一承載基板的一黏附層上，其中該黏附層上的該半導體材料具有該些微結構的輪廓； 將該承載基板設置於該半導體層上方，使該半導體材料接觸該半導體層的該第一表面； 移除該承載基板和該黏附層；以及 共晶融合該半導體材料和該半導體層。 The method according to claim 13, wherein forming the microstructure group comprises: depositing a semiconductor material on an adhesive layer of a carrier substrate, wherein the semiconductor material on the adhesive layer has the profile of the microstructure; placing the carrier substrate over the semiconductor layer so that the semiconductor material contacts the first surface of the semiconductor layer; removing the carrier substrate and the adhesive layer; and The eutectic fuses the semiconductor material and the semiconductor layer. 如請求項16所述之方法，其中移除該承載基板和該黏附層包括加熱該黏附層。The method of claim 16, wherein removing the carrier substrate and the adhesive layer comprises heating the adhesive layer. 如請求項16所述之方法，其中移除該承載基板和該黏附層包括使用紫外線照射該黏附層。The method according to claim 16, wherein removing the carrier substrate and the adhesive layer comprises irradiating the adhesive layer with ultraviolet rays. 如請求項13所述之方法，其中形成該微結構組包括： 形成圍繞該些發光晶片的一光阻層，該光阻層具有一上表面高於該半導體層的該第一表面； 圖案化該光阻層的該上表面；以及 藉由該光阻層蝕刻該半導體層的該第一表面。 The method according to claim 13, wherein forming the microstructure group comprises: forming a photoresist layer surrounding the light emitting chips, the photoresist layer has an upper surface higher than the first surface of the semiconductor layer; patterning the upper surface of the photoresist layer; and The first surface of the semiconductor layer is etched through the photoresist layer. 如請求項13所述之方法，其中照射該介面的該光源包括能量介於600mJ/cm 2至700mJ/cm 2的雷射光。 The method according to claim 13, wherein the light source irradiating the interface comprises laser light with an energy of 600mJ/cm 2 to 700mJ/cm 2 .
TW110116758A 2021-05-10 2021-05-10 Light emitting device and method of light emitting chip mass transfer TWI757170B (en)

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