TW202141294A - Tsn-compatible end controller and network system containing same - Google Patents

Tsn-compatible end controller and network system containing same Download PDF

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TW202141294A
TW202141294A TW110107773A TW110107773A TW202141294A TW 202141294 A TW202141294 A TW 202141294A TW 110107773 A TW110107773 A TW 110107773A TW 110107773 A TW110107773 A TW 110107773A TW 202141294 A TW202141294 A TW 202141294A
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tsn
shared memory
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峠田達雄
蔵田光彥
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日商英特費司股份有限公司
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    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/167—Interprocessor communication using a common memory, e.g. mailbox
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/163—Interprocessor communication
    • G06F15/173—Interprocessor communication using an interconnection network, e.g. matrix, shuffle, pyramid, star, snowflake
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/16—Combinations of two or more digital computers each having at least an arithmetic unit, a program unit and a register, e.g. for a simultaneous processing of several programs
    • G06F15/177—Initialisation or configuration control
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L12/00—Data switching networks
    • H04L12/28—Data switching networks characterised by path configuration, e.g. LAN [Local Area Networks] or WAN [Wide Area Networks]
    • H04L12/44—Star or tree networks

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Abstract

A shared memory for sharing data between external terminals such as multiple PCs and servers, when implemented via Ethernet (registered trademark) connection, is subject to restrictions on the startup order of the external terminals. Meanwhile, access and data update times are not guaranteed. Therefore, an exclusive network for the shared memory is required. The shared memory 6 is mounted on the TSN switch 4 that can be connected to the TSN network whose access time is guaranteed. As a result, it is possible to realize the shared memory 6 for Ethernet (registered trademark) connection, in which times for accessing to the shared memory 6 and updating data are guaranteed, security is ensured by way of a filtering function, and the starting order of the external terminals 11 is not restricted.

Description

相容於時效性網路的終端控制器以及具備此者之網絡系統Terminal controller compatible with time-sensitive network and network system equipped with it

本發明係關於一種搭載共享記憶體的相容於時效性網路的終端控制器以及具備此者之網絡系統。The present invention relates to a terminal controller equipped with a shared memory and compatible with a time-sensitive network and a network system equipped with such a terminal controller.

複數個個人電腦(PC)、伺服器等機器之間共享資料用的共享記憶體，可用作由各機器進行讀/寫的硬體記憶體。將接收的資料封包存放在這種記憶體的記憶體資源中時，為了有效活用記憶體資源，已知可透過交換對封包進行分類。(例如參考專利文獻1)Shared memory used to share data between multiple personal computers (PCs) and servers can be used as hardware memory for reading/writing by each machine. When storing the received data packets in the memory resources of this kind of memory, in order to effectively utilize the memory resources, it is known that the packets can be classified through exchange. (For example, refer to Patent Document 1)

專利文獻1：日本專利公開公報第2008-42915號Patent Document 1: Japanese Patent Publication No. 2008-42915

[發明欲解決的課題][The problem to be solved by the invention]

一般來說，為了在複數個機器間共享資料而設置機器共享記憶體的情況下，PC、伺服器等的啟動順序有其規則，如果啟動順序不適切，就無法使用共享記憶體。此外，網路，尤其是以連接乙太網路(註冊商標)實踐共享記憶體的情況下，對共享記憶體的存取、資料的更新等的時間無法保證，共享記憶體專用的網路有其必要性。Generally speaking, when setting up shared memory for machines to share data among multiple machines, the startup sequence of PCs, servers, etc. has its own rules. If the startup sequence is inappropriate, shared memory cannot be used. In addition, the network, especially when the shared memory is connected to an Ethernet network (registered trademark), cannot guarantee the time of access to the shared memory, data update, etc., and there is a dedicated network for shared memory. Its necessity.

本發明目的在於提供相容於時效性網路的終端控制器及具備此之網路系統，解決了上述問題，在搭載了可從外部存取的共享記憶體的控制器中安裝TSN (Time Sensitive Networking;時效性網路) 轉接器，藉此確保同步，並可確保其實時性，完成不需PC、伺服器等啟動順序限制的共享記憶體，同時也完成了安全性、可靠度均可確保的共享記憶體。 [解決課題的手段]The purpose of the present invention is to provide a terminal controller compatible with a time-sensitive network and a network system with the same, which solves the above-mentioned problems and installs TSN (Time Sensitive Networking; Time-sensitive network) adapter, to ensure synchronization, and to ensure its real-time performance, complete the shared memory without PC, server and other startup sequence restrictions, but also complete the security and reliability Secure shared memory. [Means to solve the problem]

本發明為一種相容於TSN的終端控制器，包括： 一相容於TSN (時效性網路)的埠； 一PHY裝置，連接至該埠，相互變換類比信號與數位信號； 一共享記憶體，為由外部透過該埠可共通存取的記憶體區域； 一TSN轉接器，連接至該PHY裝置； 以及 一CPU核心，控制該TSN轉接器，且控制對該共享記憶體的存取； 其特徵在於，該TSN轉接器與CPU核心搭載於FPGA上。The present invention is a terminal controller compatible with TSN, including: A port compatible with TSN (Time-sensitive Network); A PHY device, connected to the port, to mutually convert analog signals and digital signals; A shared memory is a memory area that can be accessed from the outside through the port; A TSN adapter connected to the PHY device; and A CPU core, controlling the TSN adapter, and controlling access to the shared memory; It is characterized in that the TSN adapter and CPU core are mounted on the FPGA.

此外，本發明為一種網路系統，包括上述相容於TSN的終端控制器、以及透過網路與該相容於TSN的終端控制器相連的外部終端，其特徵在於，該CPU核心控制該TSN轉接器，使其根據從外部終端傳送來的封包的表頭部的資訊來過濾對共享記憶體的存取與否，並藉由該過濾，使得對該共享記憶體的存取可獲確認時，根據該封包的資料部的前端部分的識別資訊，允許對該共享記憶體進行存取。In addition, the present invention is a network system including the above-mentioned TSN-compatible terminal controller and an external terminal connected to the TSN-compatible terminal controller via a network, wherein the CPU core controls the TSN The adapter allows it to filter the access to the shared memory based on the information in the header of the packet sent from the external terminal, and through the filtering, the access to the shared memory can be confirmed At this time, access to the shared memory is allowed based on the identification information of the front end of the data part of the packet.

此外，本發明為一種網路系統，包括上述相容於TSN的終端控制器、以及透過冗餘連接用的主要及從屬網路與該相容於TSN的終端控制器相連的外部終端，其特徵在於，該CPU核心控制該TSN轉接器，使其於主要網路發生異常時切換至從屬網路。 [發明效果]In addition, the present invention is a network system that includes the above-mentioned TSN-compatible terminal controller, and external terminals connected to the TSN-compatible terminal controller through a main and subordinate network for redundant connection. It is that the CPU core controls the TSN adapter to switch to the subordinate network when the main network is abnormal. [Effects of the invention]

根據本發明的相容於時效性網路的終端控制器，對於連接到例如乙太網路(註冊商標)的共享記憶體的存取、資料的更新等的時間可獲確保，而不需限制外部PC、伺服器等的啟動順序。此外，根據本發明的網路系統透過過濾功能確保安全性，可在設定的時間內取得外部裝置、感測器等的數位/類比信號輸入值，並控制數位/類比信號輸出。此外，根據本發明的網路系統透過支援冗餘連接(redundant connection)，即使在網路斷線時仍可繼續傳送而不漏失資料。According to the terminal controller compatible with the time-sensitive network of the present invention, the time for access to shared memory connected to, for example, Ethernet (registered trademark), data update, etc. can be secured without limitation The startup sequence of external PCs, servers, etc. In addition, the network system according to the present invention ensures security through the filtering function, can obtain the digital/analog signal input value of external devices, sensors, etc. within a set time, and control the digital/analog signal output. In addition, the network system according to the present invention supports redundant connections, and can continue to transmit without losing data even when the network is disconnected.

以下參照圖式針對關於本發明一實施例之相容於TSN的終端控制器及設置此者之網路系統加以說明。圖1顯示關於一實施例之一相容於TSN的終端控制器1，包括相容於TSN (Time Sensitive Networking;時效性網路)的埠2、類比信號及數位信號互相變換的PHY (埠實體層) 裝置3、TSN轉接器4、CPU (處理器) 核心5、以及共享記憶體6。TSN轉接器4與CPU核心5搭載於FPGA7。埠2連接至網路，例如乙太網路(註冊商標)。PHY裝置3連接至埠2，TSN轉接器4連接至PHY裝置3，CPU核心5連接至TSN轉接器4。共享記憶體6具有可透過網路而從外部共同存取的記憶體區域。The following describes a TSN-compatible terminal controller and a network system for setting it in accordance with an embodiment of the present invention with reference to the drawings. Fig. 1 shows a terminal controller 1 compatible with TSN for an embodiment, including a port 2 compatible with TSN (Time Sensitive Networking), a PHY (port entity) that converts analog signals and digital signals. Layer) device 3, TSN adapter 4, CPU (processor) core 5, and shared memory 6. The TSN adapter 4 and the CPU core 5 are mounted on the FPGA7. Port 2 is connected to a network, such as Ethernet (registered trademark). PHY device 3 is connected to port 2, TSN adapter 4 is connected to PHY device 3, and CPU core 5 is connected to TSN adapter 4. The shared memory 6 has a memory area that can be commonly accessed from the outside through the network.

TSN轉接器4為一種相容於TSN 的功能轉接器，定義了在系統間透過乙太網路傳送資料的協議。TSN具備有在網路全體中使時間同步的時間同步功能、可實時傳送資料(存取時間確保)的功能、排程(對時)的功能、閘道控制功能、以及中斷功能（IEEE802．1AS-Rev、IEEE802．1Qav、IEEE802．1Qbv、IEEE802．1Qbu、IEEE802．3br）。根據TSN協議控制TSN轉接器4，並將用以存取共享記憶體6的程式存放在FPGA7 (CPU核心5) 中。The TSN adapter 4 is a functional adapter compatible with TSN, which defines a protocol for transmitting data between systems through an Ethernet network. TSN has a time synchronization function that synchronizes time in the entire network, a function that can transmit data in real time (access time assurance), a scheduling (time synchronization) function, a gateway control function, and an interrupt function (IEEE802.1AS) -Rev, IEEE802.1Qav, IEEE802.1Qbv, IEEE802.1Qbu, IEEE802.3br). The TSN adapter 4 is controlled according to the TSN protocol, and the program for accessing the shared memory 6 is stored in FPGA7 (CPU core 5).

藉由在搭載有可從外部存取的共享記憶體6的相容於TSN的終端控制器1中搭載此種TSN轉接器4，即可實現無須對PC、伺服器等外部終端的啟動順序加以限制的共享記憶體6，保障同步性、並確保實時性。換言之，可保障對連接乙太網路(註冊商標)的共享記憶體6的存取、資料的更新等的時間，無須對外部的PC、伺服器等的啟動順序加以限制。By installing this TSN adapter 4 in a TSN-compatible terminal controller 1 equipped with a shared memory 6 that can be accessed from the outside, it is possible to realize the startup sequence without the need for external terminals such as PCs and servers. The restricted shared memory 6 guarantees synchronization and ensures real-time performance. In other words, the time of access to the shared memory 6 connected to the Ethernet (registered trademark), data update, etc., can be guaranteed without restricting the startup sequence of external PCs, servers, etc.

圖2顯示相容於TSN的終端控制器1與外部終端11的連接。外部終端11由個人電腦PC (A)、 PC (B)、伺服器(C)、伺服器(D)等構成，透過乙太網路12連接到相容於TSN的終端控制器1的埠2。在這樣的網路構成下，對於共享記憶體6的存取、資料的更新等的時間等可獲保障，亦可透過過濾功能確保安全性。因此，共享記憶體6沒有外部終端11啟動順序的問題(限制)。FIG. 2 shows the connection of the terminal controller 1 compatible with the TSN and the external terminal 11. The external terminal 11 is composed of a personal computer PC (A), PC (B), server (C), server (D), etc., and is connected to port 2 of the terminal controller 1 compatible with TSN via Ethernet 12 . Under such a network configuration, the time for access to the shared memory 6, data update, etc. can be guaranteed, and security can also be ensured through the filtering function. Therefore, the shared memory 6 does not have the problem (limitation) of the startup sequence of the external terminal 11.

此外，搭載於TSN轉接器4的共享記憶體6使得時間同步、實時資料傳送、線路冗餘連接可以TSN技術為之。 搭載於TSN轉接器4的共享記憶體6 不須依附OS (作業系統)，可從Linux (註冊商標)、Windows (視窗)、微電腦(microcomputer)等簡單存取。相容於TSN的PC、不相容於TSN的PC都可以連接到TSN轉接器4。PC與TSN轉接器4間的高精確度實時控制只可用於相容於TSN的PC (例如Apollo Lake等)。透過從PC僅能連接至TSN轉接器4的共享記憶體6的設定，可以遮斷一般性的通訊，藉以強化安全性。In addition, the shared memory 6 mounted on the TSN adapter 4 enables time synchronization, real-time data transmission, and line redundancy connection to be implemented by TSN technology. The shared memory 6 mounted on the TSN adapter 4 does not need to be attached to the OS (operating system), and can be easily accessed from Linux (registered trademark), Windows (windows), microcomputers, etc. Both PCs compatible with TSN and PCs not compatible with TSN can be connected to the TSN adapter 4. The high-precision real-time control between the PC and the TSN adapter 4 can only be used for PCs compatible with TSN (such as Apollo Lake, etc.). By setting the shared memory 6 of the TSN adapter 4 that can only be connected from a PC, general communication can be blocked, thereby enhancing security.

圖3顯示相容於TSN的終端控制器1的共享記憶體6的記憶體區域設定。此處顯示使用VLAN (Virtual LAN; 虛擬區域網路)的存取權設定例。每一記憶體區域可設定為唯讀(RO)、唯寫(WO)、讀寫雙可(W/R)、禁讀寫(WI)四種形式。FIG. 3 shows the memory area setting of the shared memory 6 of the terminal controller 1 compatible with TSN. An example of setting access rights using VLAN (Virtual LAN; Virtual Local Area Network) is shown here. Each memory area can be set to four forms: read only (RO), write only (WO), dual read and write (W/R), and read and write prohibited (WI).

圖4顯示從外部終端11傳送資料至相容於TSN的終端控制器1的共享記憶體6的動作。關於從作為外部終端11的PC（A）、PC（B）、PC（C）、PC（D）所傳送的封包21~24、31~34，透過從TSN轉接器4的時間同步下的各機器的存取時機與轉接器的閘道設定時間控制，即使有其它資料傳送中，也可以保障時間間隔，對共享記憶體6做實時的資料傳送。FIG. 4 shows the operation of transferring data from the external terminal 11 to the shared memory 6 of the terminal controller 1 compatible with TSN. Regarding packets 21~24, 31~34 transmitted from PC (A), PC (B), PC (C), and PC (D) as the external terminal 11, through the time synchronization from the TSN adapter 4 The access timing of each machine and the gateway setting time of the adapter are controlled. Even if other data is being transmitted, the time interval can be guaranteed and the shared memory 6 can be transmitted in real time.

圖5為說明對共享記憶體6存取時的TSN轉接器4的過濾動作圖。過濾為(1)利用封包40的表頭部 (header) 41的資訊進行的過濾功能、以及(2)利用利用封包40的資料部 (data) 42的前端部分43的資訊進行的過濾功能，對共享記憶體6的存取進行限制（IEEE802．1Qci）。藉此，從得到許可的連接端僅可對共享記憶體6存取允許存取的封包40。FIG. 5 is a diagram illustrating the filtering operation of the TSN adapter 4 when accessing the shared memory 6. The filtering is (1) the filtering function using the information in the header 41 of the packet 40, and (2) the filtering function using the information in the front-end part 43 of the data portion (data) 42 of the packet 40, Access to shared memory 6 is restricted (IEEE802.1Qci). In this way, only the packet 40 for which access is permitted can be accessed from the connected end that is permitted to the shared memory 6.

(1)的過濾係為確保實時性而對封包40的表頭部41的資訊進行過濾，可確認連接端並進行傳送。此處使用MAC位址、優先序(priority)、計數值(count number)、VLAN等。TSN轉接器4的VLAN認證MAC位址的連接許可/禁止，當MAC位址未獲認證時，不能連接到VLAN (群組)。(2) 的過濾係在 (1)的過濾中一旦確認了對所搭載的共享記憶體6的存取，則藉由檢視資料部 42的前端部分43 是否有預定格式的資料來進行過濾。The filtering of (1) filters the information in the header 41 of the packet 40 in order to ensure real-time performance, and can confirm the connection end and send it. The MAC address, priority, count number, VLAN, etc. are used here. The VLAN authentication MAC address connection permission/prohibition of the TSN adapter 4, when the MAC address is not authenticated, it cannot be connected to the VLAN (group). The filtering of (2) is performed in the filtering of (1), once the access to the mounted shared memory 6 is confirmed, the filtering is performed by checking whether the front-end part 43 of the data section 42 has data in a predetermined format.

過濾係透過CPU核心5控制TSN轉接器4而進行。換言之，CPU核心5係使TSN轉接器4根據從外部終端11傳送來的封包40的表頭部41的資訊來過濾共享記憶體6的存取與否，並藉由過濾，使得對共享記憶體6的存取可獲確認時，根據封包40的資料部 42的前端部分43的識別資訊，允許對共享記憶體6進行存取。The filtering is performed by controlling the TSN adapter 4 through the CPU core 5. In other words, the CPU core 5 makes the TSN adapter 4 filter the access to the shared memory 6 based on the information in the header 41 of the packet 40 sent from the external terminal 11, and through filtering, makes the shared memory 6 When the access to the memory 6 can be confirmed, the shared memory 6 is allowed to be accessed based on the identification information of the front end 43 of the data portion 42 of the packet 40.

圖6(a)(b)顯示相容於TSN的終端控制器1與外部終端11冗餘連接的網路系統中發生阻礙前後的網路切換。相容於TSN的終端控制器1和圖1所示者相同，省略掉埠2等圖示(以下，相同)。此處，相容於TSN的終端控制器1與外部終端11透過冗餘連接用的主要網路51 (實線所示)以及從屬網路52 (虛線所示)相連。相容於TSN的終端控制器1的CPU核心5在主要網路51發生異常時會切換至從屬網路52，以控制TSN轉接器4。在本實施例中，使TSN轉接控制器13, 14介於主要網路51與從屬網路52間。TSN轉接控制器13, 14的功能可以比TSN轉接器4少 (不具有和共享記憶體的IO的功能)，若內存ASIC (為控制器)，搭載於FPGA，有時間同步、排程(scheduling)、冗餘連接的功能即可。Fig. 6(a)(b) shows the network switching before and after the obstruction occurs in the network system in which the terminal controller 1 compatible with the TSN and the external terminal 11 are redundantly connected. The terminal controller 1 compatible with TSN is the same as that shown in FIG. Here, the terminal controller 1 compatible with TSN and the external terminal 11 are connected via a main network 51 (shown by a solid line) and a slave network 52 (shown by a broken line) for redundant connection. The CPU core 5 of the terminal controller 1 compatible with TSN will switch to the slave network 52 to control the TSN adapter 4 when the main network 51 is abnormal. In this embodiment, the TSN transfer controllers 13, 14 are interposed between the main network 51 and the subordinate network 52. The functions of the TSN adapter controller 13, 14 can be less than the TSN adapter 4 (it does not have the function of sharing memory with IO). If the memory ASIC (controller) is mounted on the FPGA, it has time synchronization and scheduling. (scheduling), redundant connection function.

故障發生時網路切換係透過操作TSN轉接器4以及TSN轉接控制器13和14來執行。在請求項中，包含此二者併稱為TSN轉接器。在經由圖6(a)所示狀態的TSN轉接控制器13的主要網路51發生故障的狀況下，TSN轉接器會切換網路，改經由圖6(b)所示狀態的TSN轉接控制器14，故障發生前為從屬的網路成為主要網路51。如此一來，因為利用TSN技術，在冗餘連接的主要網路發生異常的情況下，可不漏失封包，切換至從屬網路。因此，可建構出一種系統（IEEE802．1CB），在相容於線路冗餘連接15的網路斷線時，發生故障時，可不漏失封包，繼續轉送資料。When a fault occurs, the network switching is performed by operating the TSN switch 4 and the TSN switch controllers 13 and 14. In the request item, these two are included and called the TSN adapter. When the main network 51 of the TSN transfer controller 13 through the state shown in Figure 6(a) fails, the TSN adapter will switch the network and switch to the TSN transfer through the state shown in Figure 6(b). The controller 14 is connected, and the subordinate network before the fault occurs becomes the main network 51. In this way, because of the use of TSN technology, in the case of an abnormality in the main network of the redundant connection, the packet can be switched to the subordinate network without missing packets. Therefore, a system (IEEE802.1CB) can be constructed that can continue to transmit data without missing packets when a failure occurs when the network compatible with the redundant connection 15 of the line is disconnected.

此處說明切換主要與從屬網路的具體例。通常，來自發信單元的封包及其複製封包分別經由主要及從屬網路傳送，如果來自主要網路的封包正常的話，送信目的地端會原封不動接收，而廢棄來自從屬網路的複製封包。當送信目的地端無法接收來自主要網路的封包時，則接收經由從屬網路接收的封包。另外，當送信目的地端檢查出來自主要網路的封包有異常時，接收來自從屬網路的複製封包，繼續轉送資料。Here is a specific example of switching between main and subordinate networks. Usually, the packet from the sending unit and its duplicate packet are sent via the primary and secondary network respectively. If the packet from the primary network is normal, the destination will receive it intact, and the duplicate packet from the secondary network will be discarded. When the sending destination cannot receive the packet from the main network, it will receive the packet received via the subordinate network. In addition, when the sending destination detects an abnormality in the packet from the main network, it receives the copied packet from the subordinate network and continues to forward the data.

圖7顯示使用上述相容於TSN的終端控制器1以取得數位/類比信號(DI/AD輸入功能)的構成。此處，取得數位/類比信號的裝置，感測器16，連接到相容於TSN的終端控制器1 (實際上是透過埠連接，以下亦同)。相容於TSN的終端控制器1透過網路12連接到外部終端11。相容於TSN的終端控制器1以設定的時間間隔取得來自裝置，感測器16的數位/類比信號，寫入共享記憶體6中，外部終端11存取共享記憶體6，可取得數位/類比信號的輸入值。FIG. 7 shows the configuration of using the above-mentioned terminal controller 1 compatible with TSN to obtain digital/analog signals (DI/AD input function). Here, the device that obtains the digital/analog signal, the sensor 16, is connected to the terminal controller 1 compatible with TSN (actually, it is connected through a port, the same applies below). The terminal controller 1 compatible with TSN is connected to an external terminal 11 through a network 12. The TSN-compatible terminal controller 1 obtains the digital/analog signal from the device and the sensor 16 at a set time interval, writes it into the shared memory 6, and the external terminal 11 accesses the shared memory 6, which can obtain the digital/analog signal. The input value of the analog signal.

藉由上述構成，可以活化經由乙太網路(註冊商標)可實時存取共享記憶體6的優點，利用TSN轉接器4的共享記憶體6實踐數位/類比信號的控制電路，可實現可時間同步/實時/優先度設定/線路冗餘連接的乙太網路(註冊商標)連接的IO。此外，可設定數位/類比信號的傳送延遲(DELAY)與抖動(jitter)。又，因為冗餘連接線路，即使在故障發生時亦可以設定的時間間隔取得數位/類比信號。With the above configuration, the advantages of real-time access to the shared memory 6 via the Ethernet (registered trademark) can be activated, and the shared memory 6 of the TSN adapter 4 can be used to implement the digital/analog signal control circuit. Time synchronization/real-time/priority setting/line redundant connection Ethernet (registered trademark) connection IO. In addition, the transmission delay (DELAY) and jitter (jitter) of the digital/analog signal can be set. In addition, because of the redundant connection lines, even when a failure occurs, the digital/analog signal can be obtained at a set time interval.

圖8顯示相容於TSN的終端控制器1與外部終端11的線路冗餘連接15的網路系統中用以取得數位/類比信號的構成。此係如圖6所示，取得數位/類比信號的裝置，感測器16，連接至以線路冗餘連接15與外部終端11連接的相容於TSN的終端控制器1。透過以這種方式冗餘連接線路，即使故障發生時，外部終端11經由相容於TSN的終端控制器1，仍可以設定的時間間隔取得來自裝置，感測器16的數位/類比信號輸入值。FIG. 8 shows a configuration for obtaining digital/analog signals in a network system that is compatible with the TSN-compatible terminal controller 1 and the external terminal 11 in a redundant line connection 15. This is as shown in FIG. 6, a device for obtaining a digital/analog signal, the sensor 16, is connected to a TSN-compatible terminal controller 1 connected to an external terminal 11 via a redundant line connection 15. By redundantly connecting the lines in this way, even when a failure occurs, the external terminal 11 can still obtain the digital/analog signal input value from the device and the sensor 16 at a set time interval through the TSN-compatible terminal controller 1 .

圖9顯示連接到相容於TSN的終端控制器1的裝置，機器17的數位/類比(DO/DA輸出功能)控制用的構成。透過此構成，使用相容於TSN的終端控制器1的共享記憶體6的IO控制數位/類比控制，可用以從外部終端11對裝置17實時地進行數位/類比控制。Fig. 9 shows a device connected to the terminal controller 1 compatible with TSN, and a configuration for digital/analog (DO/DA output function) control of the machine 17. With this configuration, the IO control digital/analog control using the shared memory 6 of the terminal controller 1 compatible with TSN can be used to perform real-time digital/analog control of the device 17 from the external terminal 11.

圖10顯示用以對相容於TSN的終端控制器1與外部終端11做線路冗餘連接15的網路系統中的裝置，機器17，進行數位/類比控制的構成。透過此構成，使用相容於TSN的終端控制器1的共享記憶體6的IO控制數位/類比控制，可用以從外部終端11對裝置17實時地進行數位/類比控制。又，因冗餘連接線路，在故障發生時也可繼續控制。FIG. 10 shows the configuration of a device, a machine 17, for performing digital/analog control in a network system for making redundant connections 15 between the terminal controller 1 compatible with the TSN and the external terminal 11. With this configuration, the IO control digital/analog control using the shared memory 6 of the terminal controller 1 compatible with TSN can be used to perform real-time digital/analog control of the device 17 from the external terminal 11. In addition, due to the redundant connection lines, the control can be continued even when a failure occurs.

圖11顯示使用相容於TSN的終端控制器1以進行裝置，機器17的數位/類比同步控制的構成。從相容於TSN的終端控制器1輸出同步控制用的同步信號(PPS)。透過此構成，除了輸出數位控制與類比控制信號，可從外部終端11輸出使用相容於TSN的終端控制器1的共享記憶體6的控制同步信號(PPS)，可使裝置，機器17的控制同步。FIG. 11 shows the configuration of the digital/analog synchronous control of the device 17 using the terminal controller 1 compatible with TSN to perform the device. A synchronization signal (PPS) for synchronization control is output from the terminal controller 1 compatible with TSN. Through this structure, in addition to outputting digital control and analog control signals, it is possible to output a control synchronization signal (PPS) from the external terminal 11 using the shared memory 6 of the terminal controller 1 compatible with TSN, enabling the control of the device and the machine 17 Synchronize.

本發明不限於上述實施型態，可以有種種變形。The present invention is not limited to the above-mentioned embodiments, and various modifications are possible.

1:相容於TSN的終端控制器 2:埠 3:PHY裝置 4:TSN轉接器 5:CPU核心 6:共享記憶體 7:FPGA 11:外部終端 12:網路 13，14:TSN轉接控制器 15:線路冗餘連接 16:裝置，感測器 17:裝置，機器 21~24、31~34:封包 40:封包 41:表頭部 42:資料部 43:前端部分 51:主要網路 52:從屬網路1: Terminal controller compatible with TSN 2: port 3: PHY device 4: TSN adapter 5: CPU core 6: Shared memory 7: FPGA 11: External terminal 12: Internet 13, 14: TSN transfer controller 15: Line redundant connection 16: device, sensor 17: Device, machine 21~24, 31~34: packet 40: Packet 41: table head 42: Data Department 43: front end 51: main network 52: slave network

圖1為關於本發明一實施例之相容於TSN的終端控制器的方塊圖。 圖2為顯示與上述相容於TSN的終端控制器的外部終端的連接示意圖。 圖3為上述相容於TSN的終端控制器的共享記憶體的共享區域設定示意圖。 圖4為從外部終端傳送資料至上述相容於TSN的終端控制器的共享記憶體的動作示意圖。 圖5為使得從外部終端存取上述相容於TSN的終端控制器的共享記憶體變得可行的TSN轉接器的過濾說明圖。 圖6(a)(b)為上述相容於TSN的終端控制器與外部終端冗餘連接的網路系統中發生阻礙時的動作說明圖。 圖7為使用上述相容於TSN的終端控制器以取得數位/類比信號的構成示意圖。 圖8為上述相容於TSN的終端控制器與外部終端冗餘連接的網路系統中用以取得數位/類比信號的構成示意圖。 圖9為使用上述相容於TSN的終端控制器，以進行裝置的數位/類比控制的構成示意圖。 圖10為用以對上述相容於TSN的終端控制器與外部終端冗餘連接的網路系統中的裝置進行數位/類比控制的構成示意圖。 圖11為使用上述相容於TSN的終端控制器，以進行裝置的數位/類比同步控制的構成示意圖。FIG. 1 is a block diagram of a TSN compatible terminal controller related to an embodiment of the present invention. FIG. 2 is a schematic diagram showing the connection of the external terminal of the above-mentioned terminal controller compatible with the TSN. FIG. 3 is a schematic diagram of the shared area setting of the shared memory of the terminal controller compatible with the TSN. 4 is a schematic diagram of the operation of transmitting data from an external terminal to the shared memory of the above-mentioned TSN compatible terminal controller. FIG. 5 is a filtering explanatory diagram of the TSN switch that makes it possible to access the shared memory of the TSN compatible terminal controller from an external terminal. Fig. 6(a)(b) is an operation explanatory diagram when obstruction occurs in the network system in which the TSN-compliant terminal controller and the external terminal are redundantly connected. FIG. 7 is a schematic diagram of the structure of using the above-mentioned terminal controller compatible with TSN to obtain a digital/analog signal. FIG. 8 is a schematic diagram of the above-mentioned network system in which the TSN compatible terminal controller and the external terminal are redundantly connected to obtain the digital/analog signal. FIG. 9 is a schematic diagram of the configuration of using the above-mentioned terminal controller compatible with TSN to perform digital/analog control of the device. FIG. 10 is a schematic diagram of a structure for performing digital/analog control of devices in a network system in which a TSN-compatible terminal controller and an external terminal are redundantly connected. FIG. 11 is a schematic diagram of the configuration of using the above-mentioned terminal controller compatible with TSN to perform digital/analog synchronization control of the device.

1:相容於TSN的終端控制器1: Terminal controller compatible with TSN

2:埠2: port

3:PHY裝置3: PHY device

4:TSN轉接器4: TSN adapter

5:CPU核心5: CPU core

6:共享記憶體6: Shared memory

7:FPGA7: FPGA

11:外部終端11: External terminal

12:網路12: Internet

Claims (3)

一種相容於TSN的終端控制器，包括： 一相容於TSN (時效性網路)的埠； 一PHY裝置，連接至該埠，相互變換類比信號與數位信號； 一共享記憶體，為由外部透過該埠可共通存取的記憶體區域； 一TSN轉接器，連接至該PHY裝置； 以及 一CPU核心，控制該TSN轉接器，且控制對該共享記憶體的存取； 其特徵在於，該TSN轉接器與CPU核心搭載於FPGA上。A terminal controller compatible with TSN, including: A port compatible with TSN (Time-sensitive Network); A PHY device, connected to the port, to mutually convert analog signals and digital signals; A shared memory is a memory area that can be accessed from the outside through the port; A TSN adapter connected to the PHY device; and A CPU core, controlling the TSN adapter, and controlling access to the shared memory; It is characterized in that the TSN adapter and CPU core are mounted on the FPGA. 一種網路系統，包括如請求項1所記載的相容於TSN的終端控制器、以及透過網路與該相容於TSN的終端控制器相連的外部終端， 其特徵在於，該CPU核心控制該TSN轉接器，使其根據從外部終端傳送來的封包的表頭部的資訊來過濾對共享記憶體的存取與否，並藉由該過濾，使得對該共享記憶體的存取可獲確認時，根據該封包的資料部的前端部分的識別資訊，允許對該共享記憶體進行存取。A network system includes a TSN-compatible terminal controller as described in claim 1, and an external terminal connected to the TSN-compatible terminal controller via a network, It is characterized in that the CPU core controls the TSN adapter to filter the access to the shared memory according to the information in the header of the packet sent from the external terminal, and through the filter, the When the access to the shared memory can be confirmed, the shared memory is allowed to be accessed based on the identification information of the front end of the data portion of the packet. 一種網路系統，包括如請求項1所記載的相容於TSN的終端控制器、以及透過冗餘連接用的主要及從屬網路與該相容於TSN的終端控制器相連的外部終端， 其特徵在於，該CPU核心控制該TSN轉接器，使其於主要網路發生異常時切換至從屬網路。A network system includes a TSN-compatible terminal controller as described in claim 1, and an external terminal connected to the TSN-compatible terminal controller through a main and subordinate network for redundant connection, It is characterized in that the CPU core controls the TSN adapter to switch to the subordinate network when the main network is abnormal.
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