TW202110278A - Quasi-resonant dimming control system and method - Google Patents
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- H—ELECTRICITY
- H02—GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
- H02M—APPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
- H02M3/00—Conversion of dc power input into dc power output
- H02M3/02—Conversion of dc power input into dc power output without intermediate conversion into ac
- H02M3/04—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters
- H02M3/10—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
- H02M3/145—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
- H02M3/155—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only
- H02M3/156—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators
- H02M3/158—Conversion of dc power input into dc power output without intermediate conversion into ac by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only with automatic control of output voltage or current, e.g. switching regulators including plural semiconductor devices as final control devices for a single load
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- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02B—CLIMATE CHANGE MITIGATION TECHNOLOGIES RELATED TO BUILDINGS, e.g. HOUSING, HOUSE APPLIANCES OR RELATED END-USER APPLICATIONS
- Y02B70/00—Technologies for an efficient end-user side electric power management and consumption
- Y02B70/10—Technologies improving the efficiency by using switched-mode power supplies [SMPS], i.e. efficient power electronics conversion e.g. power factor correction or reduction of losses in power supplies or efficient standby modes
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Abstract
Description
本發明涉及開關電源領域,更具體地涉及一種准諧振調光控制系統和方法。 The invention relates to the field of switching power supplies, and more particularly to a quasi-resonant dimming control system and method.
隨著開關電源技術的發展,准諧振(Quasi-Resonant,QR)調光控制技術被廣泛利用。准諧振控制利用了寄生器件,其核心就是一個由金屬氧化物半導體場效應電晶體(Quasi-Resonant,MOSFET)寄生電容Cds和電感L1組成的LC諧振腔。每次MOSFET關斷後,控制晶片通過過零檢測(Zero Voltage Sense,ZVS)引腳感測MOSFET的汲極端的電壓,當主電感L1消磁結束時,ZVS引腳下降到低位準。主電感L1消磁結束後和電容Cds進入自由諧振狀態時,系統會在MOSFET汲極諧振電壓波形的谷底中打開新的開關週期,這樣系統的開關損耗和電磁干擾(Electromagnetic Interference,EMI)可以大大降低。由主電感L1和寄生電容Cds構成的諧振週期相對於開關週期而言較小,所以系統近似於工作在臨界導通模式,利用此可以簡化很多計算。 With the development of switching power supply technology, Quasi-Resonant (QR) dimming control technology is widely used. Quasi-resonant control uses parasitic devices, and its core is an LC resonant cavity composed of Quasi-Resonant (MOSFET) parasitic capacitance Cds and inductance L1. Every time the MOSFET is turned off, the control chip senses the voltage of the drain terminal of the MOSFET through the Zero Voltage Sense (ZVS) pin. When the demagnetization of the main inductor L1 ends, the ZVS pin drops to a low level. After the demagnetization of the main inductor L1 and the capacitor Cds enter the free resonance state, the system will open a new switching cycle in the valley bottom of the MOSFET drain resonance voltage waveform, so that the switching loss and electromagnetic interference (EMI) of the system can be greatly reduced . The resonant period formed by the main inductance L1 and the parasitic capacitance Cds is relatively small compared to the switching period, so the system is approximately working in critical conduction mode, which can simplify many calculations.
根據本公開的實施例,提供了一種准諧振調光控制系統,包括:准諧振開關變換單元,包括MOS管和電感,用於利用由所述MOS管的寄生電容和所述電感形成的LC諧振腔來對負載進行准諧振調光控制;退磁回饋單元,用於提供表徵所述MOS管的汲極電壓的退磁回饋信號;開關控制單元,用於基於所述退磁回饋信號確定谷底感測信號的數量,並且當所述谷底感測信號的數量等於當前鎖定的谷底數量時控制所述MOS管的導通。 According to an embodiment of the present disclosure, there is provided a quasi-resonant dimming control system, including: a quasi-resonant switch conversion unit, including a MOS tube and an inductor, for utilizing the LC resonance formed by the parasitic capacitance of the MOS tube and the inductor Cavities to perform quasi-resonant dimming control of the load; a demagnetization feedback unit for providing a demagnetization feedback signal that characterizes the drain voltage of the MOS tube; a switch control unit for determining the valley sensing signal based on the demagnetization feedback signal When the number of valley sensing signals is equal to the number of valley bottoms currently locked, the MOS tube is controlled to be turned on.
在一個實施例中,開關控制單元包括:退磁感測模組,用於接收所述退磁回饋信號,並回應於所述退磁回饋信號降為零而生成所述谷底感測信號;谷底鎖定控制模組,用於確定從退磁感測模組接收的所述谷底感測信號的數量和所述當前鎖定的谷底數量,並且在所述谷底感測信號的數量等於所述當前鎖定的谷底數量時生成用於控制所述MOS管的導通的退磁信號;峰值取樣模組,用於對表徵所述准諧振開關變換單元的負載電流的輸出回饋信號進行取樣以生成輸出取樣信號;類比調光控制模組,用於輸出用於類比調光的類比調光控制信號;誤差放大器模組,用於通過將所述輸出取樣信號作為反相輸入並將所述類比調光控制信號作為正相輸入,生成誤差放大信號;輸出回饋放大器模組,用於對所述輸出回饋信號進行放大以生成經放大的輸出回饋信號;脈寬調變(Pulse Width Modulation,PWM)比較器模組,用於將所述經放大的輸出回饋信號作為同相輸入並將經補償的誤差放大信號作為反相輸入,來生成用於控制所述MOS管的關斷的輸出信號;開關鎖存器模組,用於基於所述PWM比較器模組的輸出信號和所述谷底鎖定控制模組生成的退磁信號生成驅動控制信號;驅動模組,用於基於所述驅動控制信號生成用於控制所述MOS管的導通與關斷的Gate信號。 In one embodiment, the switch control unit includes: a demagnetization sensing module for receiving the demagnetization feedback signal, and generating the valley sensing signal in response to the demagnetization feedback signal falling to zero; valley lock control mode Group, used to determine the number of valley sensing signals received from the demagnetization sensing module and the number of valley bottoms currently locked, and generated when the number of valley sensing signals is equal to the number of valley bottoms currently locked A demagnetization signal for controlling the conduction of the MOS tube; a peak sampling module for sampling the output feedback signal representing the load current of the quasi-resonant switch conversion unit to generate an output sampling signal; analog dimming control module , Used to output an analog dimming control signal for analog dimming; an error amplifier module, used to generate an error by taking the output sampling signal as an inverting input and the analog dimming control signal as a positive input Amplified signal; output feedback amplifier module, used to amplify the output feedback signal to generate an amplified output feedback signal; pulse width modulation (Pulse Width Modulation, PWM) comparator module, used to The amplified output feedback signal is used as a non-inverting input and the compensated error amplified signal is used as an inverting input to generate an output signal used to control the turn-off of the MOS tube; a switch latch module is used to generate an output signal based on the PWM The output signal of the comparator module and the demagnetization signal generated by the valley lock control module generate a drive control signal; the drive module is used to generate a control signal for controlling the on and off of the MOS transistor based on the drive control signal Gate signal.
在一個實施例中,模擬調光包括高頻PWM轉模擬調光。 In one embodiment, the analog dimming includes high-frequency PWM to analog dimming.
在一個實施例中,模擬調光包括直流DC模擬調光。 In one embodiment, the analog dimming includes direct current DC analog dimming.
在一個實施例中,谷底鎖定控制模組還用於:根據所述經補償的誤差放大信號確定上鉗頻和下鉗頻;基於系統的工作頻率和所述上鉗頻和所述下鉗頻來確定所述當前鎖定的谷底數量。 In an embodiment, the valley lock control module is further used to: determine the upper clamp frequency and the lower clamp frequency according to the compensated error amplification signal; based on the operating frequency of the system and the upper clamp frequency and the lower clamp frequency To determine the number of valleys currently locked.
在一個實施例中,谷底鎖定控制模組還用於:通過當所述檢測到的工作頻率高於所述上鉗頻時將所需谷底數量加1並且當將檢測到的工作頻率低於所述下鉗頻時將所需谷底數量減1,來確定所述當前鎖定的谷底數量。 In one embodiment, the valley lock control module is also used to: add 1 to the required valley number when the detected operating frequency is higher than the upper clamp frequency, and when the detected operating frequency is lower than the upper clamp frequency. When the frequency is clamped down, the required number of valleys is reduced by 1 to determine the number of valleys currently locked.
在一個實施例中,開關控制單元還包括:PWM調光控制模組,被配置為基於低頻PWM調光控制信號控制對所述誤差放大器模組輸出的所述誤差放大信號的補償。 In one embodiment, the switch control unit further includes: a PWM dimming control module configured to control compensation for the error amplification signal output by the error amplifier module based on a low-frequency PWM dimming control signal.
在一個實施例中,當所述低頻PWM調光控制信號為工作因數(Duty cycle)信號時,所述谷底鎖定控制模組還用於:基於所述類比調光控制信號確定所述當前鎖定的谷底數量。 In an embodiment, when the low-frequency PWM dimming control signal is a duty cycle signal, the valley lock control module is further configured to: determine the currently locked-in signal based on the analog dimming control signal The number of valleys.
在一個實施例中,當低頻PWM調光控制信號為低電平時,所述開關控制單元被配置為強制關斷所述MOS管。 In one embodiment, when the low-frequency PWM dimming control signal is at a low level, the switch control unit is configured to forcibly turn off the MOS transistor.
在一個實施例中,准諧振開關變換單元是准諧振Buck架構變換器。 In one embodiment, the quasi-resonant switching conversion unit is a quasi-resonant Buck architecture converter.
在一個實施例中,准諧振開關變換單元是准諧振Boost架構變換器。 In one embodiment, the quasi-resonant switching conversion unit is a quasi-resonant Boost architecture converter.
在一個實施例中,准諧振開關變換單元是准諧振Fly-Back架構變換器。 In one embodiment, the quasi-resonant switching conversion unit is a quasi-resonant Fly-Back architecture converter.
在一個實施例中,輸出回饋信號是與所述MOS管的源極端串聯的電阻的電壓。 In an embodiment, the output feedback signal is the voltage of a resistor connected in series with the source terminal of the MOS tube.
在一個實施例中,經補償的誤差放大信號是通過在所述誤差放大器模組的輸出端外接補償電容獲得的。 In one embodiment, the compensated error amplification signal is obtained by connecting a compensation capacitor to the output terminal of the error amplifier module.
在一個實施例中,開關控制單元被集成在晶片上。 In one embodiment, the switch control unit is integrated on the wafer.
根據本公開的實施例,提供了一種准諧振調光控制方法,包括:接收表徵准諧振開關變換單元的MOS管的汲極電壓的退磁回饋信號;基於所述退磁回饋信號確定谷底感測信號的數量;確定當前鎖定的谷底數量;當所述谷底感測信號的數量等於所述當前鎖定的谷底數量時導通所述MOS管。 According to an embodiment of the present disclosure, a quasi-resonant dimming control method is provided, which includes: receiving a demagnetization feedback signal that characterizes the drain voltage of a MOS tube of a quasi-resonant switch conversion unit; and determining the bottom sensing signal based on the demagnetization feedback signal Quantity; determine the number of valley bottoms currently locked; turn on the MOS tube when the number of the valley bottom sensing signals is equal to the number of valley bottoms currently locked.
在一個實施例中,基於所述退磁回饋信號確定所述谷底感測信號的數量包括:回應於所述退磁回饋信號降為零而生成所述谷底感測信號。 In one embodiment, determining the quantity of the valley sensing signal based on the demagnetization feedback signal includes generating the valley sensing signal in response to the demagnetization feedback signal falling to zero.
在一個實施例中,當進行模擬調光時,確定所述當前鎖定的谷底數量包括:確定所述准諧振開關變換單元的工作頻率;基於所確定的工作頻率和預置的上鉗頻和下鉗頻確定當前鎖定的谷底數量。 In one embodiment, when performing analog dimming, determining the number of valleys currently locked includes: determining the operating frequency of the quasi-resonant switch conversion unit; based on the determined operating frequency and preset upper and lower clamp frequencies The frequency clamp determines the number of valleys currently locked.
在一個實施例中,基於所確定的工作頻率和預置的上鉗頻和下鉗頻確定當前鎖定的谷底數量包括:通過當所確定的工作頻率高於所述上鉗頻時將所需谷底數量加1並且當所確定的工作頻率低於所述下鉗頻時將所需谷底數量減1,來確定所述當前鎖定的谷底數量。 In an embodiment, determining the number of valleys currently locked based on the determined operating frequency and the preset upper and lower clamp frequencies includes: determining the required valley when the determined operating frequency is higher than the upper clamp frequency. The number is increased by 1 and when the determined operating frequency is lower than the lower clamp frequency, the required valley number is reduced by 1 to determine the currently locked valley number.
在一個實施例中,當進行包括模擬調光和PWM調光的組合調光時,確定所述當前鎖定的谷底數量包括:當感測到所述PWM調光的調光信號為工作因數(duty cycle)信號時,基於所述類比調光的調光亮度來確定所述當前鎖定的谷底數量。 In one embodiment, when performing combined dimming including analog dimming and PWM dimming, determining the number of valleys currently locked includes: when it is sensed that the dimming signal of the PWM dimming is a duty factor (duty factor). cycle) signal, the number of valleys currently locked is determined based on the dimming brightness of the analog dimming.
在一個實施例中,模擬調光包括高頻PWM轉模擬調光或DC模擬調光。 In one embodiment, the analog dimming includes high-frequency PWM to analog dimming or DC analog dimming.
在一個實施例中,當進行包括所述模擬調光和所述PWM調光的組合調光時,所述方法還包括:當檢測到所述PWM調光的調光信號為低位準時,強制關斷所述MOS管。 In an embodiment, when performing combined dimming including the analog dimming and the PWM dimming, the method further includes: when it is detected that the dimming signal of the PWM dimming is at a low level, forcibly turning off Turn off the MOS tube.
在一個實施例中,准諧振開關變換單元是准諧振Buck架構變換器。 In one embodiment, the quasi-resonant switching conversion unit is a quasi-resonant Buck architecture converter.
在一個實施例中,准諧振開關變換單元是准諧振Boost架構變換器。 In one embodiment, the quasi-resonant switching conversion unit is a quasi-resonant Boost architecture converter.
在一個實施例中,准諧振開關變換單元是准諧振Fly-Back架構變換器。 In one embodiment, the quasi-resonant switching conversion unit is a quasi-resonant Fly-Back architecture converter.
根據本申請提供的上述實施例,在調光的准諧振系統中加入谷底鎖定的技術,可以解決頻率來回波動的問題,從而保證調光時LED電流穩定,防止閃燈現象的出現,提高效率。 According to the above-mentioned embodiments provided in this application, the valley locking technology is added to the dimming quasi-resonant system to solve the problem of frequency fluctuations, thereby ensuring stable LED current during dimming, preventing flashing, and improving efficiency.
102、302、802‧‧‧BUCK架構准諧振開關變換單元 102, 302, 802‧‧‧BUCK structure quasi-resonant switching unit
104、304‧‧‧退磁回饋單元 104, 304‧‧‧Demagnetization feedback unit
106、306‧‧‧開關控制單元 106, 306‧‧‧switch control unit
L1‧‧‧主電感 L1‧‧‧Main inductor
C1‧‧‧輸出電容 C1‧‧‧Output Capacitor
D1‧‧‧續流二極體 D1‧‧‧Freewheeling diode
M1‧‧‧MOS管 M1‧‧‧MOS tube
C2、Cds‧‧‧電容 C2, Cds‧‧‧Capacitor
R1、R2、R3‧‧‧電阻 R1, R2, R3‧‧‧Resistor
1061、3061‧‧‧退磁感測模組 1061, 3061‧‧‧Demagnetization sensor module
3062‧‧‧谷底鎖定控制模組 3062‧‧‧Bottom lock control module
Vcomp‧‧‧輸出信號 Vcomp‧‧‧Output signal
ILED‧‧‧負載電流 ILED‧‧‧Load current
DEM‧‧‧退磁信號 DEM‧‧‧Demagnetization signal
Acc_eff、Dec_eff‧‧‧信號 Acc_eff, Dec_eff‧‧‧signal
VCS、ZVS、Gate‧‧‧引腳 VCS, ZVS, Gate‧‧‧Pin
1062、3063‧‧‧峰值採樣模組 1062, 3063‧‧‧Peak Sampling Module
1063、3064‧‧‧誤差放大器 1063, 3064‧‧‧Error amplifier
1064、3065‧‧‧PWM比較器 1064, 3065‧‧‧PWM comparator
1065、3066‧‧‧開關鎖存器 1065、3066‧‧‧Switch latch
1066、3067‧‧‧Gate驅動器 1066, 3067‧‧‧Gate drive
1067、3069‧‧‧輸出回饋(CS)放大器 1067, 3069‧‧‧Output feedback (CS) amplifier
SR‧‧‧觸發器 SR‧‧‧Flip-Flop
Vref‧‧‧基準參考信號 Vref‧‧‧Reference reference signal
VCS‧‧‧回饋電壓 V CS ‧‧‧Feedback voltage
3068‧‧‧高頻PWM調光控制模組 3068‧‧‧High frequency PWM dimming control module
Vds‧‧‧汲極電壓 Vds‧‧‧Drain voltage
DIM_ref‧‧‧類比調光控制信號 DIM_ref‧‧‧Analog dimming control signal
HPWM‧‧‧高頻PWM調光控制信號 HPWM‧‧‧High frequency PWM dimming control signal
CS‧‧‧輸出回饋 CS‧‧‧Output feedback
Valley‧‧‧谷底檢測信號 Valley‧‧‧Valley bottom detection signal
402、404、406、408、602、604、606、1402、1404、1406、1408‧‧‧方框
Fup‧‧‧表示用於增加穀底個數的上鉗頻 Fup‧‧‧ represents the upper clamp frequency used to increase the number of valleys
Fdown‧‧‧表示用於減小穀底個數的下鉗頻 Fdown‧‧‧ represents the lower clamp frequency used to reduce the number of valleys
Fup_max‧‧‧為增加穀底個數的最大切換頻率 Fup_max‧‧‧Maximum switching frequency to increase the number of valleys
Fdown_min‧‧‧為減小穀底個數的最小切換頻率。 Fdown_min‧‧‧ is the minimum switching frequency to reduce the number of valley bottoms.
100‧‧‧傳統QR buck系統典型控制示意圖 100‧‧‧Typical control diagram of traditional QR buck system
300‧‧‧帶有谷底鎖定技術的模擬調光准諧振buck系統 300‧‧‧Analog dimming quasi-resonant buck system with valley lock technology
S‧‧‧RS觸發器置位端 S‧‧‧RS trigger set terminal
R‧‧‧RS觸發器復位端 R‧‧‧RS flip-flop reset terminal
Q‧‧‧RS觸發器輸出端 Q‧‧‧RS trigger output
Vin‧‧‧輸入電壓 Vin‧‧‧Input voltage
Comp‧‧‧誤差放大器輸出補償 Comp‧‧‧Error amplifier output compensation
從下面結合附圖對本申請的具體實施方式的描述中可以更好地理解本申請,其中: This application can be better understood from the following description of the specific implementations of the application in conjunction with the accompanying drawings, in which:
第1圖示出了典型的BUCK架構准諧振調光控制系統的示意圖。 Figure 1 shows a schematic diagram of a typical BUCK architecture quasi-resonant dimming control system.
第2圖示出了第1圖所示的典型的BUCK架構准諧振調光控制系統的開關控制單元的時序圖。 Figure 2 shows a timing diagram of the switch control unit of the typical BUCK architecture quasi-resonant dimming control system shown in Figure 1.
第3圖示出了根據本公開實施例的利用谷底鎖定的BUCK架構准諧振類比調光控制系統的示意圖。 Figure 3 shows a schematic diagram of a BUCK architecture quasi-resonant analog dimming control system using valley locking according to an embodiment of the present disclosure.
第4圖示出了根據本公開實施例的用於第3圖所示的谷底鎖定控制模組的操作流程圖。 Fig. 4 shows an operation flowchart for the valley lock control module shown in Fig. 3 according to an embodiment of the present disclosure.
第5圖示出了上鉗頻與下鉗頻與誤差放大器的補償輸出電壓Vcomp關係的示意圖。 Figure 5 shows a schematic diagram of the relationship between the upper and lower clamp frequencies and the compensation output voltage Vcomp of the error amplifier.
第6圖示出了根據本公開實施例的在類比調光的情況下谷底鎖定控制模組確定當前鎖定的谷底數量的流程圖。 Figure 6 shows a flow chart of the valley lock control module determining the number of valleys currently locked in the case of analog dimming according to an embodiment of the present disclosure.
第7圖示出了根據本公開實施例的准諧振系統在類比調光時工作的時序圖。 Fig. 7 shows a timing diagram of the quasi-resonant system according to an embodiment of the present disclosure working in analog dimming.
第8圖示出了根據本公開實施例的具有模擬調光和PWM調光的Buck架構准諧振組合調光控制系統的示意圖。 Figure 8 shows a schematic diagram of a Buck architecture quasi-resonant combined dimming control system with analog dimming and PWM dimming according to an embodiment of the present disclosure.
第9圖示出了根據本公開實施例的具有模擬調光和PWM調光的准諧振系統的時序圖。 Figure 9 shows a timing diagram of a quasi-resonant system with analog dimming and PWM dimming according to an embodiment of the present disclosure.
第10圖示出了根據本發明實施例的具有模擬調光和PWM調光的Fly-Back架構准諧振組合調光控制系統的示例。 Figure 10 shows an example of a Fly-Back architecture quasi-resonant combined dimming control system with analog dimming and PWM dimming according to an embodiment of the present invention.
第11圖示出了示出了根據本發明實施例的具有模擬調光和PWM調光的Boost架構准諧振組合調光控制系統的示例。 Figure 11 shows an example of a Boost architecture quasi-resonant combined dimming control system with analog dimming and PWM dimming according to an embodiment of the present invention.
第12圖示出了根據本公開實施例的谷底鎖定方案的實現示意圖。 Figure 12 shows a schematic diagram of the realization of the valley bottom locking solution according to an embodiment of the present disclosure.
第13圖示出了第12圖所示的谷底鎖定模組的實現框圖。 Figure 13 shows the implementation block diagram of the valley lock module shown in Figure 12.
第14圖示出了根據本公開實施例的一種准諧振調光控制方法的框圖。 Figure 14 shows a block diagram of a quasi-resonant dimming control method according to an embodiment of the present disclosure.
下面將詳細描述本發明的各個方面的特徵和示例性實施例。在下面的詳細描述中,提出了許多具體細節,以便提供對本申請的全面理解。但是,對於本領域技術人員來說很明顯的是,本發明可以在不需要這些具體細節中的一些細節的情況下實施。下面對實施例的描述僅僅是為了通過示出本申請的示例來提供對本發明的更好的理解。本發明決不限於下面所提出的任何具體配置,而是在不脫離本申請的精神的前提下覆蓋了元素、部件和演算法的任何修改、替換和改進。在附圖和下面的描述中,沒有示出公知的結構和技術,以便避免對本申請造成不必要的模糊。 The features and exemplary embodiments of various aspects of the present invention will be described in detail below. In the following detailed description, many specific details are proposed in order to provide a comprehensive understanding of this application. However, it is obvious to those skilled in the art that the present invention can be implemented without some of these specific details. The following description of the embodiments is only to provide a better understanding of the present invention by showing examples of the present application. The present invention is by no means limited to any specific configuration proposed below, but covers any modification, replacement and improvement of elements, components and algorithms without departing from the spirit of the application. In the drawings and the following description, well-known structures and technologies are not shown in order to avoid unnecessary obscurity of the application.
第1圖示出了典型的BUCK架構准諧振調光控制系統的示意圖。如第1圖所示,該系統包括:BUCK架構准諧振開關變換單元102、退磁回饋單元104、以及開關控制單元106。BUCK架構准諧振開關變換電路102可以包括主電感L1、輸出電容C1、續流二極體D1、MOS管M1,並且被配置為通過控制MOS管M1的導通與關斷向負載提供期望的電壓或電流輸出,例如,以便控制對發光二極體(Light Emitting Diode,LED)負載的調光。退磁回饋單元104可以包括電容C2以及分壓電阻R1和R2。退磁回饋電單元104通過電容C2兩端的電壓不能突變的特性得到MOS管M1汲極(Drain)端的電壓,利用電阻R1和R2進行分壓產生較低的退磁回饋電壓通過ZVS引腳後由開關控制單元106進行感測。
Figure 1 shows a schematic diagram of a typical BUCK architecture quasi-resonant dimming control system. As shown in FIG. 1, the system includes: a BUCK architecture quasi-resonant
開關控制單元106可以包括退磁感測模組1061、峰值取樣模組1062、誤差放大器(EA)1063、PWM比較器1064、開關鎖存器1065、Gate驅動器1066、以及輸出回饋(CS)放大器1067。
The
退磁感測模組1061的輸入端接收退磁回饋信號通過ZVS引腳,其輸出端連接到開關鎖存器1065。在一個實施例中,開關鎖存器1065是SR觸發器,退磁感測模組1061的輸出端連接到SR觸發器的S
端。峰值取樣模組1062的輸入端接收輸出回饋信號通過VCS引腳,其輸出端連接到誤差放大器(EA)1063的反相輸入端,其中峰值取樣模組1062到誤差放大器(EA)1063的反相輸入端的連接基於退磁感測模組1061輸出的退磁信號以及Gate驅動器1066輸出的Gate信號。誤差放大器(EA)1063的正相輸入端接基準參考信號Vref,並且誤差放大器(EA)1063的輸出端接PWM比較器1064的反相輸入端,其中,誤差放大器(EA)1063的輸出端還外接電容來對輸出信號進行補償。PWM比較器1064的正相輸入端接CS放大器1067,其中CS放大器1067的輸入端經由VCS引腳接收輸出回饋信號。PWM比較器1064的輸出端接開關鎖存器1065。例如,PWM比較器1064的輸出端連接到例如SR觸發器的R端。開關鎖存器1065的輸出端(例如,SR觸發器的Q端)接Gate驅動器1066的輸入端,Gate驅動器1066輸出Gate信號On或Off的驅動信號以控制MOS管M1的導通的與關斷。
The input terminal of the
具體地,流經負載(例如,LED)的電流在MOS管M1導通時通過與MOS管M1的源極端串聯的電阻R3產生輸出回饋電壓VCS,該輸出回饋電壓Vcs被輸入到峰值取樣模組1062以得到與流經負載的輸出電流相關的輸出取樣信號,該輸出取樣信號被輸入到誤差放大器1063並與誤差放大器1063另一輸入端的固定基準參考電壓Vref進行運算後產生輸出信號Vcomp,該輸出信號Vcomp通過外接電容被補償並通過PWM比較器1064與輸出回饋放大器1067的輸出進行比較,其中,輸出回饋(CS)放大器1067被配置為對輸出回饋電壓Vcs進行放大。PWM比較器1064的輸出信號被輸入到開關鎖存器1065以控制MOS管M1的關斷。當MOS管M1關斷時,開關控制單元106的退磁感測模組1061基於退磁回饋信號ZVS產生退磁信號,該退磁信號被輸入至開關鎖存器1065以控制MOS管M1的導通。該系統通過控制MOS管M1的導通與關斷來控制輸出的峰值電流,從而實現對輸出電流的調節。
Specifically, the current flowing through the load (for example, LED) generates the output feedback voltage V CS through the resistor R3 connected in series with the source terminal of the MOS transistor M1 when the MOS transistor M1 is turned on, and the output feedback voltage Vcs is input to the
如第1圖所示,開關控制單元106可以被集成在控制晶
片上。該控制晶片可以包括ZVS引腳,用於檢測表徵MOS管Drain端的電壓的退磁回饋信號;VCS引腳,用於檢測回饋流經負載的輸出電流的輸出回饋信號;Gate引腳,用於輸出Gate驅動器輸出的驅動信號;以及COMP引腳,用於連接外部電容以向EA 1063的輸出提供補償。
As shown in Figure 1, the
第2圖示出了第1圖所示的典型的BUCK架構准諧振調光控制系統的開關控制單元的時序圖。如第2圖所示,在Gate Off的階段,隨著MOS管M1的汲極電壓Vds的下降,ZVS信號也跟隨下降,當ZVS信號降到零時,產生退磁(dem)信號,退磁信號控制Gate的打開,Gate打開後輸出回饋電壓VCS電壓上升,當升高到閉環控制的CS峰值後Gate信號再次關閉。 Figure 2 shows a timing diagram of the switch control unit of the typical BUCK architecture quasi-resonant dimming control system shown in Figure 1. As shown in Figure 2, in the Gate Off stage, as the drain voltage Vds of the MOS transistor M1 drops, the ZVS signal also drops. When the ZVS signal drops to zero, a demagnetization (dem) signal is generated, which is controlled by the demagnetization signal. When the gate is turned on, the output feedback voltage VCS voltage rises after the gate is turned on, and the gate signal turns off again when it rises to the CS peak value of the closed-loop control.
在調光的應用中隨著負載的降低,晶片的工作頻率逐漸增高,導致系統的工作效率降低。有些系統中會在降低負載的同時加入降頻曲線,隨著負載的降低,降低上鉗頻的工作頻率,但此時Gate不是在谷底打開,同時可能存在頻率的劇烈變化,導致調光的過程中出現LED燈的閃爍。 In dimming applications, as the load decreases, the operating frequency of the chip gradually increases, resulting in a decrease in the operating efficiency of the system. In some systems, a frequency reduction curve is added while reducing the load. As the load is reduced, the operating frequency of the upper clamp frequency is reduced, but at this time the Gate is not opened at the bottom, and there may be drastic changes in frequency, leading to the process of dimming The flickering of the LED light appears in the.
鑒於上述問題,本申請提供了一種利用谷底鎖定的准諧振調光控制系統和方法。在調光的准諧振系統中加入谷底鎖定的技術,可以解決頻率來回波動的問題,從而保證調光時LED電流穩定,防止閃燈現象的出現,提高效率。 In view of the above problems, the present application provides a quasi-resonant dimming control system and method using valley locking. Adding valley lock technology to the dimming quasi-resonant system can solve the problem of frequency fluctuations, so as to ensure the stability of the LED current during dimming, prevent the occurrence of flashing, and improve efficiency.
第3圖示出了根據本公開實施例的利用穀底鎖定的BUCK架構准諧振類比調光控制系統的示意圖。如第3圖所示,該系統包括:BUCK架構准諧振開關變換單元302、退磁回饋單元304、以及開關控制單元306。BUCK架構准諧振開關變換電路302以及退磁回饋電路304可以與第1圖所示的BUCK架構准諧振開關變換電路102以及退磁回饋單元104具有類似的結構和功能,在此不再贅述。圖中Vin為輸入電壓信號,Comp為誤差放大器輸出補償,S端為D觸發器的置位端,用於輸入打開gate的信號。R端為D觸發器的復位端,用於輸入關閉gate的信
號。Q端為D觸發器的輸出端。
Figure 3 shows a schematic diagram of a BUCK architecture quasi-resonant analog dimming control system using valley locking according to an embodiment of the present disclosure. As shown in FIG. 3, the system includes: a BUCK architecture quasi-resonant
在一個實施例中,開關控制單元306可以包括退磁感測模組3061、谷底鎖定控制模組3062、峰值取樣模組3063、誤差放大器(EA)3064、PWM比較器3065、開關鎖存器3066、Gate驅動器3067以及輸出回饋(CS)放大器3069。在一個實施例中,開關控制單元還可以包括高頻PWM調光控制模組3068。
In one embodiment, the
退磁感測模組3061可以通過ZVS引腳接收退磁回饋信號,並且可以被配置為回應於接收到的退磁回饋信號透過ZVS引腳降為零而生成谷底檢測信號,並將所生成的谷底檢測信號提供給谷底鎖定控制模組3062。谷底鎖定控制模組3062還接收誤差放大器(EA)3064的輸出以獲得誤差放大器(EA)3064的經補償的輸出信號Vcomp,並且被配置為基於從退磁感測模組3061接收到的谷底檢測信號和從誤差放大器(EA)3064接收到的經補償的輸出信號Vcomp生成控制MOS管M1的導通的退磁信號。
The
峰值取樣模組3063通過VCS引腳接收輸出回饋信號,並且被配置為基於接收到的輸出回饋信號透過VCS引腳生成輸出取樣信號,並將生成的輸出取樣信號提供到誤差放大器(EA)3064的反相輸入端,其中峰值取樣模組3063的輸出端到誤差放大器(EA)3064的反相輸入端的連接基於谷底鎖定控制模組3062輸出的退磁信號和/或Gate驅動器3067輸出的Gate信號。
The
誤差放大器(EA)3064的正相輸入端接收用於模擬調光的類比調光控制信號DIM_ref。在一個實施例中,模擬調光可以包括高頻PWM轉模擬調光或直流DC模擬調光。在高頻PWM調光的實施例中,類比調光控制信號DIM_ref可以是由例如高頻PWM調光控制模組3068基於接收到的基準參考信號Vref和高頻PWM調光控制信號HPWM生成的。在DC調光的實施例中,類比調光控制信號DIM_ref可以是DC調光控制信號。儘管第3圖僅示出了高頻PWM模擬調光的示例,但是應該理解,
誤差放大器的正相輸入端可以直接接收DC調光控制信號。
The non-inverting input terminal of the error amplifier (EA) 3064 receives the analog dimming control signal DIM_ref for analog dimming. In one embodiment, the analog dimming may include high-frequency PWM to analog dimming or direct current DC analog dimming. In the embodiment of high-frequency PWM dimming, the analog dimming control signal DIM_ref may be generated by, for example, the high-frequency PWM
誤差放大器(EA)3064的輸出端接PWM比較器1065的反相輸入端,其中,誤差放大器(EA)3064的輸出端還外接電容來對輸出信號進行補償以產生經補償的輸出信號Vcomp。PWM比較器3065的正相輸入端接CS放大器3069,其中CS放大器3069的輸入端透過VCS引腳接收輸出回饋信號。PWM比較器3065的輸出端接開關鎖存器3066以向其提供控制MOS管M1的關斷的信號。開關鎖存器3066的輸出端接Gate驅動器3067的輸入端。Gate驅動器3067基於開關鎖存器3066的輸出產生Gate信號On或Off的驅動信號以控制MOS管M1的導通與關斷。
The output terminal of the error amplifier (EA) 3064 is connected to the inverting input terminal of the
在一個實施例中,開關鎖存器3066可以是SR觸發器,其中,S端接谷底鎖定控制模組3062的輸出端,R端接PWM比較器3065的輸出端,Q端接驅動器3067的輸入端。
In one embodiment, the
如第3圖所示,開關控制單元306可以被集成在控制晶片上。該控制晶片可以包括ZVS引腳,用於感測表徵MOS管Drain端的電壓的退磁回饋電壓;VCS引腳,用於感測回饋流經負載的輸出電流的輸出回饋電壓;Gate引腳,用於輸出Gate驅動器輸出的驅動信號。在一個實施例中,該控制晶片還可以包括HPWM引腳,用於提供高頻調光信號輸入HPWM以通過調節工作因素來改變誤差放大器的參考電壓。在一個實施例中,該控制晶片還可以包括DC引腳,用於提供DC調光信號輸入。
As shown in Figure 3, the
在一個實施例中,可以去除用於連接外部電容以向誤差放大器EA提供補償的COMP引腳,誤差放大器EA的補償電容被優化到晶片的內部,以利於節約系統成本。 In one embodiment, the COMP pin used to connect an external capacitor to provide compensation to the error amplifier EA can be removed, and the compensation capacitor of the error amplifier EA is optimized to the inside of the chip to help save system costs.
與第1圖所示的實施例相比,第3圖所示的實施例中加了用於谷底鎖定控制的谷底鎖定控制模組3062。下面將對第3圖所示的谷底鎖定控制模組3062的操作進行詳細描述。
Compared with the embodiment shown in Fig. 1, the embodiment shown in Fig. 3 adds a valley
第4圖示出了根據本公開實施例的用於谷底鎖定控制模
組3062的操作的流程圖。谷底鎖定控制模組3062可以被配置為執行第4圖所示的如下操作:在方框402中,從退磁感測模組3061接收谷底檢測信號,其中谷底檢測信號是退磁感測模組3061回應於退磁回饋信號通過ZVS引腳降為零而生成的;在方框404中,對接收到的谷底感測信號的數量進行計數;在方框406中,確定當前鎖定的谷底數量;在方框408中,將接收到谷底感測信號的數量與當前鎖定的谷底數量進行比較,並且當谷底感測信號的數量等於當前鎖定的谷底數量時生成用於控制MOS管M1的導通的退磁信號。
Figure 4 shows a control mode for valley lock according to an embodiment of the present disclosure
A flowchart of the operation of
在如第3圖所示的模擬調光的實施例中,谷底控制模組可以利用誤差放大器(EA)3064的經補償的輸出電壓Vcomp以及上下鉗頻來確定當前鎖定的谷底數量。第5圖示出了上鉗頻與下鉗頻與誤差放大器的經補償的輸出電壓Vcomp關係的示意圖,其中,Fup表示用於增加谷底個數的上鉗頻、Fdown表示用於減小谷底個數的下鉗頻。Fup_max為增加谷底個數的最大切換頻率。Fup_min為增加谷底個數的最小切換頻率。Fdown_max為減小谷底個數的最大切換頻率,Fdown_min為減小谷底個數的最小切換頻率。 In the embodiment of analog dimming shown in Figure 3, the valley control module can use the compensated output voltage Vcomp of the error amplifier (EA) 3064 and the upper and lower clamps to determine the number of valleys currently locked. Figure 5 shows a schematic diagram of the relationship between the upper clamp frequency and the lower clamp frequency and the compensated output voltage Vcomp of the error amplifier, where Fup represents the upper clamp frequency used to increase the number of valleys, and Fdown represents the relationship used to reduce the valley bottoms. Number of lower clamp frequencies. Fup_max is the maximum switching frequency that increases the number of valleys. Fup_min is the minimum switching frequency to increase the number of valleys. Fdown_max is the maximum switching frequency to reduce the number of valleys, and Fdown_min is the minimum switching frequency to reduce the number of valleys.
在第3圖所示的HPWM轉模擬調光的實施例中,隨著高頻PWM的工作因素降低,誤差放大器(EA)3064的高頻PWM調光控制電壓DIM_ref也逐漸下降,此時退磁的時間逐漸縮小導致系統的工作頻率逐漸升高,當工作頻率升高到如第5圖所示的Fup曲線時,控制器可以通過增加谷底的個數來實現降低工作頻率的目的,在增加谷底後晶片的工作頻率會在Fup的頻率和Fdown的頻率之間,直至再次降低負載工作頻率大於Fup時會再次增加谷底的個數。如此時增加高頻PWM信號的工作因素(duty cycle),負載增加,工作頻率下降,當工作頻率下降到低於Fdown時通過減小谷底的個數,提高晶片的工作頻率。確定谷底個數後谷底個數資訊會被鎖存,每個開關週期都會按照當前鎖存狀態進行谷底個數的精確控制。 In the embodiment of HPWM to analog dimming shown in Figure 3, as the working factor of high-frequency PWM decreases, the high-frequency PWM dimming control voltage DIM_ref of the error amplifier (EA) 3064 also gradually decreases. At this time, the demagnetization The gradual reduction in time leads to a gradual increase in the operating frequency of the system. When the operating frequency rises to the Fup curve as shown in Figure 5, the controller can reduce the operating frequency by increasing the number of valleys. After increasing the valleys The operating frequency of the chip will be between the frequency of Fup and the frequency of Fdown, until the load is reduced again and the operating frequency is greater than Fup, the number of valleys will be increased again. At this time, the duty cycle of the high-frequency PWM signal is increased, the load is increased, and the working frequency is decreased. When the working frequency drops below Fdown, the working frequency of the chip is increased by reducing the number of valleys. After determining the number of valley bottoms, the valley number information will be latched, and each switching cycle will accurately control the number of valley bottoms according to the current latch state.
為保證在Vin波動時谷底為鎖定狀態不會出現切換點時谷底的來回切換,Fup和Fdown曲線之間需留足夠的裕量,同時根據不同的Vcomp電壓調節上鉗頻和下鉗頻的大小。 In order to ensure that the valley bottom is locked when Vin fluctuates, there will be no back-and-forth switching of the valley bottom at the switching point, sufficient margin should be left between the Fup and Fdown curves, and the upper and lower clamp frequencies should be adjusted according to different Vcomp voltages. .
第6圖示出了根據本公開實施例的在類比調光的情況下谷底鎖定控制模組確定當前鎖定的谷底數量的流程圖。在方框602中,根據從EA 3064接收到的經補償的輸出信號Vcomp確定上鉗頻和下鉗頻。在方框604中,感測系統的工作頻率。在方框606中,基於感測到的工作頻率和上下鉗頻來確定當前鎖定的谷底數量。具體地,通過當檢測到的工作頻率高於上鉗頻時將所需谷底數量加1,當感測到的工作頻率低於下鉗頻時將所需谷底數量減1,來確定鎖定的谷底數量。
Figure 6 shows a flow chart of the valley lock control module determining the number of valleys currently locked in the case of analog dimming according to an embodiment of the present disclosure. In
第7圖示出了根據本公開實施例的准諧振系統在類比調光時工作的時序圖。在一個實施例中,模擬調光可以是HPWM轉模擬調光。在另一實施例中,模擬調光可以是DC模擬調光。如第7圖所示,進行調光時,類比調光控制電壓DIM_ref跟隨下降,同時負載(例如,LED)電流ILED也跟隨進行相應的下降,退磁回饋電流ZCS的谷底個數隨著電流的降低逐漸增多,例如,從1谷底逐漸增加到7谷底,並最終在負載電流ILED很低的情況下穩定在7谷底。圖中valley信號為谷底感測信號,當所產生谷底檢測信號的個數和鎖存的谷底個數一致時,產生退磁信號以控制gate的開啟。 Fig. 7 shows a timing diagram of the quasi-resonant system according to an embodiment of the present disclosure working in analog dimming. In one embodiment, the analog dimming may be HPWM to analog dimming. In another embodiment, the analog dimming may be DC analog dimming. As shown in Figure 7, when dimming is performed, the analog dimming control voltage DIM_ref decreases, and the load (for example, LED) current I LED also decreases accordingly. The valley number of the demagnetization feedback current ZCS increases with the current The decrease gradually increases, for example, from 1 valley to 7 valleys, and finally stabilizes at 7 valleys when the load current I LED is very low. The valley signal in the figure is a valley sensing signal. When the number of valley detection signals generated is consistent with the number of latch valleys, a demagnetization signal is generated to control the opening of the gate.
第8圖示出了根據本公開實施例的具有模擬調光和PWM調光的BUCK架構准諧振組合調光控制系統的示意圖。第8圖所示的系統具有與第3圖類似的結構,其中相似的元件執行與圖3所示元件類似的操作,在此不再贅述。 Figure 8 shows a schematic diagram of a BUCK architecture quasi-resonant combined dimming control system with analog dimming and PWM dimming according to an embodiment of the present disclosure. The system shown in Fig. 8 has a structure similar to that shown in Fig. 3, in which similar elements perform similar operations to the elements shown in Fig. 3, which will not be repeated here.
特別地,第8圖所示的系統的相對第3圖增加了PWM調光控制模組以進行低頻的PWM調光。在一個實施例中,PWM調光控制模組可以通過PWM引腳被集成在晶片內。PWM調光控制模組通過產生低頻PWM調光控制信號來對誤差放大器的輸出電壓Vcomp進行控制。 在一個實施例中,PWM調光控制模組可以被配置為通過低頻PWM調光控制信號控制與誤差放大器所連接的補償電容串聯的開關元件的導通與關斷。為了防止PWM調光過程中由於谷底的切換導致負載電流ILED的波動,在進行PWM調光的過程中可以根據類比調光控制信號DIM_ref的大小鎖定谷底的個數,同時為了防止調光過程中電流的過沖問題,每次啟動時加入軟啟動控制,從而維持每個週期PWM高位準開始階段電流的緩變。對於組合調光的應用(例如,包括高頻PWM轉模擬調光或DC模擬調光以及PWM調光的組合調光),當系統感測到低頻PWM信號後即進行谷底個數判斷,並在一定範圍內保持谷底個數穩定。 In particular, the system shown in Figure 8 has a PWM dimming control module added to the system shown in Figure 3 to perform low-frequency PWM dimming. In one embodiment, the PWM dimming control module can be integrated in the chip through the PWM pin. The PWM dimming control module controls the output voltage Vcomp of the error amplifier by generating a low-frequency PWM dimming control signal. In one embodiment, the PWM dimming control module may be configured to control the on and off of the switching element connected in series with the compensation capacitor connected to the error amplifier through the low-frequency PWM dimming control signal. In order to prevent the load current I LED from fluctuating due to valley switching during PWM dimming, the number of valleys can be locked according to the magnitude of the analog dimming control signal DIM_ref during the PWM dimming process. At the same time, to prevent the dimming process For the current overshoot problem, a soft start control is added every time it is started, so as to maintain the gradual change of the current at the beginning of each cycle of the PWM high level. For combined dimming applications (for example, including high-frequency PWM to analog dimming or combined dimming of DC analog dimming and PWM dimming), when the system senses the low-frequency PWM signal, it will judge the number of valleys, and then Keep the number of valleys stable within a certain range.
第9圖示出了根據本公開實施例的具有模擬調光和PWM調光的准諧振系統的時序圖。當進行PWM調光時,例如,當接收到工作因素信號時,控制器根據當前的類比調光控制電壓DIM_ref確定當前鎖存的谷底個數,例如,2個。當低頻PWM信號為高位準時,退磁回饋信號ZCS每次過零後產生谷底感測信號(即,valley信號),當產生例如2個谷底感測信號後,產生退磁信號,退磁信號控制Gate的開啟。在整個PWM高位準的週期內谷底的個數被鎖定在2谷底,從而保證每個PWM高電平的時間內負載電流ILED固定,從而可以避免由於ILED的波動導致的調光LED閃爍問題。在PWM低位準階段,使Gate被強制關閉,此時負載電流ILED也會下降到零。最終通過不同的PWM工作因素,實現對負載ILED的PWM調光功能。 Figure 9 shows a timing diagram of a quasi-resonant system with analog dimming and PWM dimming according to an embodiment of the present disclosure. When PWM dimming is performed, for example, when a working factor signal is received, the controller determines the number of valleys currently latched, for example, 2 according to the current analog dimming control voltage DIM_ref. When the low-frequency PWM signal is at a high level, the demagnetization feedback signal ZCS generates a valley sensing signal (ie, valley signal) every time it crosses zero. When, for example, two valley sensing signals are generated, a demagnetization signal is generated, and the demagnetization signal controls the opening of the gate. . The number of valleys in the entire PWM high-level cycle is locked at 2 valleys, so as to ensure that the load current I LED is fixed during each PWM high-level period, thereby avoiding the dimming LED flicker problem caused by the fluctuation of ILED. In the low-level phase of the PWM, the Gate is forced to close, and the load current I LED will also drop to zero at this time. Finally, through different PWM working factors, the PWM dimming function of the load I LED is realized.
在一個實施例中,根據上文所述的准諧振調光控制系統中的BUCK架構准諧振開關變換單元可以被替換為Fly-Back架構或Boost架構准諧振開光變換單元。例如,第3圖和第8圖所示的BUCK架構准諧振開關變換單元302和802可以被替換為利用LC諧振腔控制MOS管的導通關斷的Fly-Back架構或Boost架構准諧振開光變換單元。例如,第10圖示出了根據本發明實施例的具有模擬調光和PWM調光的Fly-Back架構准諧振組合調光控制系統的一個示例;第11圖示出了示出了根據本發明
實施例的具有模擬調光和PWM調光的Boost架構准諧振組合調光控制系統的一個示例。
In one embodiment, the BUCK architecture quasi-resonant switching conversion unit in the quasi-resonant dimming control system described above can be replaced with a Fly-Back architecture or a Boost architecture quasi-resonant switching conversion unit. For example, the BUCK architecture quasi-resonant
應該理解,本發明實施例提供的BUCK架構、Fly-Back架構和Boost架構的准諧振開關變換單元的具體電路結構僅僅為了舉例說明,其可以替換為可利用本文提供的谷底鎖定方案的其他電路結構。 It should be understood that the specific circuit structures of the quasi-resonant switch conversion unit of the BUCK architecture, the Fly-Back architecture and the Boost architecture provided by the embodiments of the present invention are only for illustrative purposes, and they can be replaced with other circuit structures that can utilize the valley locking solution provided herein. .
第12圖示出了根據本公開實施例的谷底鎖定方案的實現示意圖。在一個實施例中,該方法可以由開關控制單元的谷底鎖定控制模組實現,例如,由第3圖或第8圖所示的谷底鎖定控制模組實現。 Figure 12 shows a schematic diagram of the realization of the valley bottom locking solution according to an embodiment of the present disclosure. In one embodiment, the method can be implemented by the valley lock control module of the switch control unit, for example, by the valley lock control module shown in Figure 3 or Figure 8.
如第12圖所示,在不存在低頻PWM調光的情況下,由電壓電流轉換模組先將功率放大器的補償輸出電壓Vcomp進行電壓電流轉換,轉換後通過電流精度控制電路,從而保證上下鉗頻判斷的精度。頻率比較器模組的作用是感測Gate的頻率,即感測系統的工作頻率,並和如第5圖所示的上下鉗頻的曲線進行比較,當前週期Gate的頻率大於此時的上鉗頻時產生F_up信號,Gate頻率小於此時的下嵌頻時產生F_down信號,谷底鎖定模組根據F_up以及F_down的個數確定此時所需鎖定的谷底個數。當即時感測到谷底檢測信號valley後,谷底鎖定模組會根據當前鎖定的谷底個數的多少確定何時輸出Gate信號。當PWM調光介入後,晶片開啟固定谷底選擇,谷底鎖定模組依據類比調光控制信號DIM_ref的大小選擇固定的谷底,不再受計時器產生的上下鉗頻的曲線控制。 As shown in Figure 12, in the absence of low-frequency PWM dimming, the voltage-current conversion module first converts the compensation output voltage Vcomp of the power amplifier into voltage-to-current conversion, and then passes the current accuracy control circuit after conversion to ensure the upper and lower clamps The accuracy of frequency judgment. The function of the frequency comparator module is to sense the frequency of the gate, that is, the operating frequency of the sensing system, and compare it with the upper and lower clamp frequency curve as shown in Figure 5. The frequency of the current cycle Gate is greater than the upper clamp at this time The F_up signal is generated when the frequency is low, and the F_down signal is generated when the gate frequency is lower than the embedded frequency at this time. The valley lock module determines the number of valleys to be locked at this time according to the number of F_up and F_down. When the valley detection signal valley is sensed in real time, the valley lock module will determine when to output the Gate signal according to the number of valleys currently locked. When PWM dimming is involved, the chip opens the fixed valley selection, and the valley locking module selects the fixed valley according to the magnitude of the analog dimming control signal DIM_ref, and is no longer controlled by the upper and lower frequency clamp curves generated by the timer.
第13圖示出了第12圖所示的谷底鎖定模組的實現框圖。谷底鎖定模組通過計數器1對F_up信號進行計數,當其滿足條件時,例如,當F_up信號的計數值等於計數器1內預置的個數時,輸出谷底加1信號,即Acc_eff信號;通過計數器2對F_down信號進行計數,當其滿足條件時,例如,當F_down信號的計數值等於計數器2內預置的個數時,輸出谷底減1信號,即,Dec_eff信號;Acc_eff信號和Dec_eff信號被輸入至例如雙向計數器,從而在無Acc_eff信號和Dec_eff信號產生時雙向計數器鎖定當前的谷底個數(表示為B)。當PWM調光的低頻PWM
調光信號介入時,谷底選擇器會開始工作,根據此時的類比調光控制信號DIM_ref選擇固定的谷底個數(表示為D)。資料選擇器基於是否接收到用於PWM調光低頻PWM調光信號來選擇鎖定谷底個數(表示為C)。具體地,當未感測到低頻PWM調光信號時,資料選擇器選擇的鎖定谷底個數C=B,當感測到低頻PWM調光信號時,資料選擇器所選擇的谷底個數C=D。在如第8圖所示的系統中當ZVS引腳感測到過零信號後谷底感測信號(即,valley信號)便會產生脈衝,通過谷底計數器進行即時計數後產生Q1與鎖存谷底個數C進行對比,當資料對比器判斷這二者一致時產生Gate_on信號來控制gate的開啟,達到谷底鎖定的目的。需要注意的是,上述谷底個數B、C、D、Q1可以採用任何適當的形式,例如,二進位。
Figure 13 shows the implementation block diagram of the valley lock module shown in Figure 12. The valley lock module counts the F_up signal through the
第14圖示出了根據本公開實施例的一種准諧振調光控制方法的框圖。該方法可以由准諧振調光控制系統的開關控制單元執行,例如,第3圖所示的開關控制306或第8圖所示的開光控制單元806。具體地,該方法包括:在方框1402處,接收表徵准諧振開關變換單元的MOS管的汲極電壓的退磁回饋信號;在方框1404處,基於所述退磁回饋信號確定谷底檢測信號的數量;在方框1406處,確定當前鎖定的谷底數量;在方框1408處,當所述谷底感測信號的數量等於所述當前鎖定的谷底數量時導通MOS管。
Figure 14 shows a block diagram of a quasi-resonant dimming control method according to an embodiment of the present disclosure. This method may be executed by the switch control unit of the quasi-resonant dimming control system, for example, the
在一個實施例中,基於退磁回饋信號確定谷底感測信號的數量可以包括:回應於退磁回饋信號降為零而生成谷底感測信號。 In one embodiment, determining the number of valley sensing signals based on the demagnetization feedback signal may include generating valley sensing signals in response to the demagnetization feedback signal falling to zero.
在一個實施例中,模擬調光時通過預置的上下鉗頻以及COMP的工作電壓確定工作是的谷底個數並鎖定工作狀態。例如,當進行模擬調光時,確定所述准諧振開關變換單元的工作頻率,基於所確定的工作頻率和預置的上鉗頻和下鉗頻確定當前鎖定的谷底個數。其中,基於所確定的工作頻率和預置的上鉗頻和下鉗頻確定當前鎖定的谷底個數可以包括:通過當所確定的工作頻率高於上鉗頻時將所需谷底數量加1並且當所 確定的工作頻率低於下鉗頻時將所需谷底數量減1,來確定當前鎖定的谷底數量。 In one embodiment, during analog dimming, the preset upper and lower clamp frequencies and the working voltage of COMP are used to determine the number of valleys in the work and lock the work state. For example, when performing analog dimming, the operating frequency of the quasi-resonant switch conversion unit is determined, and the number of valleys currently locked is determined based on the determined operating frequency and the preset upper and lower clamp frequencies. Wherein, determining the number of valleys currently locked based on the determined operating frequency and the preset upper and lower clamp frequencies may include: adding 1 to the required number of valleys when the determined operating frequency is higher than the upper clamp frequency, and Where When the determined operating frequency is lower than the lower clamp frequency, the number of valleys required is reduced by 1 to determine the number of valleys currently locked.
在一個實施例中,當進行包括模擬調光和PWM調光的組合調光時,確定當前鎖定的谷底數量可以包括:當檢測到PWM調光的低頻PWM調光信號為高位準時,基於類比調光的調光亮度來確定固定的鎖定谷底個數,例如,根據此時的類比調光控制信號DIM_ref選擇固定的鎖定谷底個數。在一個實施例中,當檢測到PWM調光的低頻PWM調光信號為低電平時,強制關斷MOS管。 In one embodiment, when performing combined dimming including analog dimming and PWM dimming, determining the number of valleys currently locked may include: when it is detected that the low-frequency PWM dimming signal of PWM dimming is at a high level, based on analog dimming The dimming brightness of the light determines the fixed number of locked valleys. For example, the fixed number of locked valleys is selected according to the analog dimming control signal DIM_ref at this time. In one embodiment, when it is detected that the low-frequency PWM dimming signal of PWM dimming is low, the MOS tube is forcibly turned off.
根據本申請提供的上述實施例,在調光的准諧振系統中加入谷底鎖定的技術,可以解決頻率來回波動的問題,從而保證調光時LED電流穩定,防止閃燈現象的出現,提高效率。 According to the above-mentioned embodiments provided in this application, the valley locking technology is added to the dimming quasi-resonant system to solve the problem of frequency fluctuations, thereby ensuring stable LED current during dimming, preventing flashing, and improving efficiency.
上文中提到了“一個實施例”、“另一實施例”、“又一實施例”,然而應理解,在各個實施例中提及的特徵並不一定只能應用於該實施例,而是可能用於其他實施例。一個實施例中的特徵可以應用於另一實施例,或者可以被包括在另一實施例中。 “One embodiment”, “another embodiment”, and “another embodiment” are mentioned above. However, it should be understood that the features mentioned in each embodiment are not necessarily only applicable to this embodiment, but May be used in other embodiments. Features in one embodiment may be applied to another embodiment, or may be included in another embodiment.
應理解,上文中提到的器件和電路的數位下標也是為了敘述和引用的方便,並不存在次序上的先後關係。 It should be understood that the digital subscripts of the devices and circuits mentioned above are also for convenience of description and reference, and there is no sequence relationship.
以上參考本實用新型的具體實施例對本發明進行了描述,但本領域技術人員應能理解,上述實施例均是示例性而非限制性的。在不同實施例中出現的不同技術特徵可以進行組合,以取得有益效果。本領域技術人員在研究附圖、說明書及權利要求書的基礎上,應能理解並實現所揭示的實施例的其他變化的實施例。權利要求中的任何附圖標記均不應被理解為對保護範圍的限制。權利要求中出現的多個部分的功能可以由一個單獨的硬體或軟體模組來實現。某些技術特徵出現在不同的從屬權利要求中並不意味著不能將這些技術特徵進行組合以取得有益效果。 The present invention has been described above with reference to the specific embodiments of the present utility model, but those skilled in the art should understand that the above-mentioned embodiments are all exemplary rather than restrictive. Different technical features appearing in different embodiments can be combined to achieve beneficial effects. Those skilled in the art should be able to understand and implement other modified embodiments of the disclosed embodiments on the basis of studying the drawings, the description, and the claims. Any reference signs in the claims should not be construed as limiting the scope of protection. The functions of multiple parts appearing in the claims can be realized by a single hardware or software module. The appearance of certain technical features in different dependent claims does not mean that these technical features cannot be combined to achieve beneficial effects.
304‧‧‧退磁回饋單元 304‧‧‧Demagnetization feedback unit
306‧‧‧開關控制單元 306‧‧‧Switch control unit
L1‧‧‧主電感 L1‧‧‧Main inductor
C1‧‧‧輸出電容 C1‧‧‧Output Capacitor
D1‧‧‧續流二極體 D1‧‧‧Freewheeling diode
3061‧‧‧退磁感測模組 3061‧‧‧Demagnetization Sensing Module
3062‧‧‧谷底鎖定控制模組 3062‧‧‧Bottom lock control module
EA‧‧‧誤差放大器 EA‧‧‧Error amplifier
Valley‧‧‧谷底檢測信號 Valley‧‧‧Valley bottom detection signal
DEM‧‧‧退磁信號 DEM‧‧‧Demagnetization signal
CS‧‧‧輸出回饋 CS‧‧‧Output feedback
3063‧‧‧峰值採樣模組 3063‧‧‧Peak Sampling Module
3064‧‧‧誤差放大器 3064‧‧‧Error amplifier
3065‧‧‧PWM比較器 3065‧‧‧PWM Comparator
3066‧‧‧閉關鎖存器 3066‧‧‧Closed latch
3067‧‧‧Gate驅動器 3067‧‧‧Gate Drive
3069‧‧‧輸出回饋(CS)放大器 3069‧‧‧Output Feedback (CS) Amplifier
Vref‧‧‧基準參考信號 Vref‧‧‧Reference reference signal
VCS、ZVS、Gate‧‧‧引腳 VCS, ZVS, Gate‧‧‧Pin
3068‧‧‧高頻PWM調光控制模組 3068‧‧‧High frequency PWM dimming control module
Vds‧‧‧汲極電壓 Vds‧‧‧Drain voltage
DIM_ref‧‧‧類比調光控制信號 DIM_ref‧‧‧Analog dimming control signal
HPWM‧‧‧高頻PWM調光控制信號 HPWM‧‧‧High frequency PWM dimming control signal
100‧‧‧傳統QR buck系統典型控制示意圖 100‧‧‧Typical control diagram of traditional QR buck system
300‧‧‧帶有谷底鎖定技術的模擬調光准諧振buck系統 300‧‧‧Analog dimming quasi-resonant buck system with valley lock technology
S‧‧‧RS觸發器置位端 S‧‧‧RS trigger set terminal
R‧‧‧RS觸發器復位端 R‧‧‧RS flip-flop reset terminal
Q‧‧‧RS觸發器輸出端 Q‧‧‧RS trigger output
Vin‧‧‧輸入電壓 Vin‧‧‧Input voltage
Comp‧‧‧誤差放大器輸出補償 Comp‧‧‧Error amplifier output compensation
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