TW202110027A - Buck boost charger configuration with reverse boost mode - Google Patents

Abstract

The present embodiments are directed to methods and apparatuses for operating a battery charger in computing systems having certain system load requirements, battery configurations and external device power supply support. According to some aspects, the present embodiments provide methods and apparatuses for providing a reverse boost mode of operation when the battery charger is providing system power from a battery, such as when an adapter is not connected. The reverse boost mode of operation according to embodiments provides a regulated output voltage, thereby allowing a load such as a CPU to operate at maximum performance, even when the battery has discharged below a threshold discharge level.

Description

具反向升壓模式之升降壓充電器結構Buck-boost charger structure with reverse boost mode

本發明實施例一般而言係關於行動及計算裝置且更特定而言係關於一種用於此等裝置之蓄電池充電器應用，其在一僅蓄電池模式期間管理及/或延後系統停機條件以便最佳化系統效能。The embodiments of the present invention relate generally to mobile and computing devices and more specifically to a battery charger application for these devices that manages and/or delays system shutdown conditions during a battery-only mode to maximize Optimize system performance.

蓄電池充電器，特定而言用於行動計算裝置之蓄電池充電器負責執行或支援各種操作條件及應用。舉例而言，習用行動計算裝置(諸如，膝上型或筆記型電腦)包含用於一電力配接器之一***式埠。當該配接器***至此埠中時，蓄電池充電器負責使用由行動計算裝置之製造商指定之配接器電壓來對蓄電池充電。同樣地，當無配接器***至專用埠中時，蓄電池充電器負責允許行動計算裝置使用儲存於蓄電池中之能量來操作，且當蓄電池位準變得太低時進一步支援停機或近乎停機條件。儘管某些習用方法對於支援此等停機條件係可接受的，但仍存在進一步改良機會。Battery chargers, specifically battery chargers for mobile computing devices, are responsible for performing or supporting various operating conditions and applications. For example, conventional mobile computing devices (such as laptops or notebooks) include a plug-in port for a power adapter. When the adapter is plugged into this port, the battery charger is responsible for charging the battery with the adapter voltage specified by the manufacturer of the mobile computing device. Similarly, when no adapter is plugged into the dedicated port, the battery charger is responsible for allowing the mobile computing device to operate using the energy stored in the battery, and further supporting shutdown or near shutdown conditions when the battery level becomes too low. Although some conventional methods are acceptable to support these shutdown conditions, there are still opportunities for further improvement.

在一或多項實施例中，方法及設備允許當蓄電池放電低於蓄電池容量之一臨限位準時，將一僅蓄電池操作模式自一理想二極體模式轉變為一反向升壓模式。除了其他態樣，此亦可防止系統停機問題且延長一最大CPU效能週期。In one or more embodiments, the method and device allow a battery-only operation mode to be converted from an ideal diode mode to a reverse boost mode when the battery discharge is lower than a threshold level of the battery capacity. Among other things, this can also prevent system downtime and extend a maximum CPU performance cycle.

相關申請案之交叉參考Cross reference of related applications

本申請案係2019年6月25日提出申請之美國非臨時專利申請案第16/452,414號之一部分接續申請案，該申請案主張2018年8月21日提出申請之美國臨時專利申請案第62/720,650號之優先權。本申請案亦主張2019年4月23日提出申請之美國臨時專利申請案第62/837,649號之優先權，所有此等申請案之內容係以全文引用的方式併入本文中。This application is a partial continuation application of the U.S. Non-Provisional Patent Application No. 16/452,414 filed on June 25, 2019. The application claims that the U.S. Provisional Patent Application No. 62 filed on August 21, 2018 /720,650 priority. This application also claims the priority of U.S. Provisional Patent Application No. 62/837,649 filed on April 23, 2019, and the contents of all such applications are incorporated herein by reference in their entirety.

現在將參考圖式詳細地闡述本發明實施例，該等圖式係作為該等實施例之說明性實例而提供以便使得熟習此項技術者能夠實踐實施例以及對於熟習此項技術者顯而易見的替代方案。顯著地，下文各圖及實例並不意味著將本發明之範疇限於一單個實施例，而是其他實施例藉助於互換所闡述或所圖解說明元件中之某些或全部元件而成為可能。此外，在可使用已知組件來部分或完全地實施本發明實施例之某些元件之情形下，將闡述對本發明之一理解所必需之此等已知組件中之僅彼等部分，且將省略對此等已知組件中之其他部分之詳細闡述以便不模糊本發明。闡述為在軟體中實施之實施例不應限於此，而是可包含在硬體或軟體與硬體之組合中實施之實施例且反之亦然，如對熟習此項技術者而言將係顯而易見的，除非本文中另外規定。在本說明書中，展示一單一組件之一實施例不應視為具限制性；而是，除非本文中另外明確說明，否則本發明意欲涵蓋包含複數個相同組件之其他實施例，且反之亦然。此外，申請人並不意欲將說明書或申請專利範圍中之任何術語歸於一不常見或特殊含義，除非如此明確陳述。此外，本發明實施例囊括本文中以圖解說明方式提及的已知組件之目前及將來已知的等效物。The embodiments of the present invention will now be described in detail with reference to the drawings, which are provided as illustrative examples of the embodiments in order to enable those skilled in the art to practice the embodiments and alternatives that are obvious to those skilled in the art Program. Obviously, the following figures and examples are not meant to limit the scope of the present invention to a single embodiment, but other embodiments are possible by interchange of some or all of the elements described or illustrated. In addition, in the case where known components can be used to partially or completely implement certain elements of the embodiments of the present invention, only those known components that are necessary for one of the understanding of the present invention will be explained, and Detailed descriptions of other parts of these known components are omitted so as not to obscure the present invention. The embodiments described as being implemented in software should not be limited to this, but may include embodiments implemented in hardware or a combination of software and hardware and vice versa, as it will be obvious to those familiar with the art , Unless otherwise specified in this article. In this specification, an embodiment showing a single component should not be regarded as limiting; rather, unless expressly stated otherwise herein, the present invention is intended to cover other embodiments including a plurality of the same components, and vice versa . In addition, the applicant does not intend to attribute any term in the specification or the scope of the patent application to an unusual or special meaning, unless it is clearly stated as such. In addition, the embodiments of the present invention include current and future equivalents of the known components mentioned in this text by way of illustration.

如以上所陳述，根據某些態樣，本發明實施例係關於用於操作具有某些系統負載要求、蓄電池結構及外部裝置電力供應支援之計算系統中一蓄電池充電器之方法及設備。根據進一步態樣，本發明實施例提供用於當蓄電池充電器正自一蓄電池提供系統電力時(諸如，當不連接一配接器時)提供一反向升壓操作模式之方法及設備。根據實施例之反向升壓操作模式提供一經調節輸出電壓，藉此允許一負載(諸如一CPU)甚至當蓄電池已放電低於一臨限放電位準時以最大效能操作。As stated above, according to some aspects, the embodiments of the present invention relate to a method and apparatus for operating a battery charger in a computing system with certain system load requirements, battery structure, and external device power supply support. According to a further aspect, embodiments of the present invention provide a method and apparatus for providing a reverse boost mode of operation when the battery charger is providing system power from a battery (such as when an adapter is not connected). The reverse boost operation mode according to the embodiment provides a regulated output voltage, thereby allowing a load (such as a CPU) to operate at maximum efficiency even when the battery has been discharged below a threshold discharge level.

圖1係圖解說明併入本發明之一實例系統100之態樣之一方塊圖。系統100可係一計算裝置，諸如一筆記型電腦(例如，MacBook、Ultrabook等)，膝上型電腦、板式或平板電腦(iPad、Surface等)等，一充電寶(power bank)、一通用串列匯流排類型C(USB-C)介面平臺，或使用具有對供電軌敏感之一蓄電池之任何系統。在此等及其他實施例中，系統100包含一負載116，該負載可包含運行一習用作業系統(諸如，Windows、Android或Apple iOS)之一CPU 124，且可係來自Intel、AMD或其他製造商之一x86處理器，以及由Freescale、Qualcomm、DSPs、GPUs等製作之其他處理器。負載116可進一步包含用於將一經調節電壓自充電器102之輸出VSYS/VOUT供應至CPU 124之一核心電壓調節器122。系統100可包含諸如固態及其他磁碟驅動器、記憶體、周邊設備、顯示器、使用者介面組件等諸多其他未展示組件，應是顯而易見的。根據某些態樣，其中本發明實施例可發現特別有用應用之一系統100具有可超過諸如USB-A之技術之電力限制，舉例而言高於60 watts之操作電力需要。然而，本發明不限於此等系統中之應用。FIG. 1 is a block diagram illustrating an aspect of a system 100 incorporated in an example of the present invention. The system 100 may be a computing device, such as a notebook computer (for example, MacBook, Ultrabook, etc.), laptop computer, tablet or tablet computer (iPad, Surface, etc.), etc., a power bank (power bank), and a universal string Serial bus type C (USB-C) interface platform, or use any system with a battery that is sensitive to the power rail. In these and other embodiments, the system 100 includes a load 116, which may include a CPU 124 running a conventional operating system (such as Windows, Android, or Apple iOS), and may be from Intel, AMD, or other manufacturers. One of the manufacturers of x86 processors, and other processors made by Freescale, Qualcomm, DSPs, GPUs, etc. The load 116 may further include a core voltage regulator 122 for supplying a regulated voltage from the output VSYS/VOUT of the charger 102 to the CPU 124. The system 100 may include many other unshown components such as solid-state and other disk drives, memory, peripheral devices, displays, user interface components, etc., it should be obvious. According to certain aspects, one of the applications in which the embodiments of the present invention can be found to be particularly useful, the system 100 has a power limit that can exceed the power limit of technologies such as USB-A, for example, an operating power requirement higher than 60 watts. However, the present invention is not limited to applications in these systems.

如所展示，系統100包含一蓄電池104及一蓄電池充電器102。在實施例中，充電器102係一升降壓窄輸出電壓DC(NVDC)充電器(亦即，DC-DC轉換器)。根據某些一般態樣，在系統100之正常操作期間，當一電力配接器***至埠106中時，蓄電池充電器102經組態以對蓄電池104充電。較佳地，除了對蓄電池104充電之外，蓄電池充電器102亦進一步經調適以將來自配接器之電力轉換為適合於供應至包含負載116之系統100之組件的一電壓(例如，在一降壓模式、一升壓模式或一升降壓模式中，如此項技術中已知)。根據某些其他一般態樣，當一電力配接器不***至埠106中時，蓄電池充電器102經組態以管理自蓄電池104至負載116及/或連接至埠106之一周邊裝置之電力的供應(例如，在一降壓模式、一升壓模式或一升降壓模式中，如此項技術中已知)。下文將提供根據本發明實施例之蓄電池充電器102之進一步細節。As shown, the system 100 includes a battery 104 and a battery charger 102. In the embodiment, the charger 102 is a buck-boost narrow output voltage DC (NVDC) charger (ie, a DC-DC converter). According to some general aspects, during normal operation of the system 100, when a power adapter is inserted into the port 106, the battery charger 102 is configured to charge the battery 104. Preferably, in addition to charging the battery 104, the battery charger 102 is further adapted to convert the power from the adapter into a voltage suitable for supply to the components of the system 100 including the load 116 (e.g., a In a buck mode, a boost mode, or a buck-boost mode, as known in the art). According to some other general aspects, when a power adapter is not plugged into the port 106, the battery charger 102 is configured to manage power from the battery 104 to the load 116 and/or a peripheral device connected to the port 106 (For example, in a buck mode, a boost mode, or a buck-boost mode, as known in the art). The following will provide further details of the battery charger 102 according to an embodiment of the present invention.

在筆記型電腦(例如Ultrabook)及系統100之其他實施例中，蓄電池104可係一可再充電1S/2S/3S/4S(亦即，1電池、2電池、3電池或4電池堆)鋰離子 (Li-ion)蓄電池。在此等及其他實施例中，埠106可係一USB埠，諸如一USB Type C(USB-C)埠或一USB 電力遞送(USB PD)埠。儘管在圖1中未展示，但亦可提供埠106與充電器102之間的開關用於將來自連接至埠106之一配接器之電力可控制地耦合至充電器102，或另一選擇係將系統電力提供至充電器102及/或埠106。此等開關亦可包含或由主動裝置(諸如，背對背式FET(未展示))來實施。In other embodiments of a notebook computer (such as an Ultrabook) and the system 100, the battery 104 can be a rechargeable 1S/2S/3S/4S (ie, 1 battery, 2 batteries, 3 batteries, or 4 battery stacks) lithium Li-ion battery. In these and other embodiments, the port 106 may be a USB port, such as a USB Type C (USB-C) port or a USB power delivery (USB PD) port. Although not shown in FIG. 1, a switch between the port 106 and the charger 102 can also be provided for controllably coupling power from an adapter connected to the port 106 to the charger 102, or another option The system power is provided to the charger 102 and/or the port 106. These switches may also include or be implemented by active devices, such as back-to-back FETs (not shown).

如進一步所展示，其中本發明實施例可發現有用應用之實例系統100包含一嵌入式控制器(EC)112。EC 112包含用於控制充電器102之某些操作的功能性，且通常負責管理系統100的電力結構(例如，取決於一電力配接器是連接還是不連接至埠106，如由耦合至埠106(未展示)之一埠控制器所偵測及報告)、接收來自燃料計114的蓄電池104狀態，且負責將蓄電池電荷位準及其他操作控制資訊傳遞至充電器102及CPU 124(例如經由SMbus或I2C介面)，如依據下文說明將變得更加顯而易見。As further shown, the example system 100 in which the embodiments of the present invention can find useful applications includes an embedded controller (EC) 112. The EC 112 includes functionality for controlling certain operations of the charger 102, and is generally responsible for managing the power structure of the system 100 (for example, depending on whether a power adapter is connected or not connected to the port 106, such as by coupling to the port 106). 106 (not shown) detected and reported by a port controller), receives the battery 104 status from the fuel gauge 114, and is responsible for transmitting the battery charge level and other operation control information to the charger 102 and the CPU 124 (for example, via SMbus or I2C interface), as described below will become more obvious.

根據某些態樣，本發明申請人認識到：困擾習用蓄電池充電器(諸如圖1中所展示之彼蓄電池充電器)，及/或併入有電壓調節器或轉換器之配接器的各種問題。According to certain aspects, the applicant of the present invention recognizes that: various types of adapters that bother conventional battery chargers (such as the battery charger shown in FIG. 1) and/or incorporate voltage regulators or converters problem.

舉例而言，參考圖1，充電器102可經組態以在標準蓄電池充電器應用中於一「僅蓄電池」模式中操作，例如當一配接器不***至埠106中時。在此時間期間，充電器102藉由致使自蓄電池104汲取電流(例如使用一「理想二極體」模式，如熟習此項技術者已知)來將蓄電池電壓提供至VSYS/VOUT。亦在此時間期間，燃料計114不斷地監測蓄電池電壓且將蓄電池電荷資訊發送至EC 112。For example, referring to FIG. 1, the charger 102 can be configured to operate in a "battery only" mode in standard battery charger applications, such as when an adapter is not plugged into the port 106. During this time, the charger 102 provides the battery voltage to VSYS/VOUT by causing it to draw current from the battery 104 (for example, using an "ideal diode" mode, as known to those skilled in the art). Also during this time, the fuel meter 114 continuously monitors the battery voltage and sends the battery charge information to the EC 112.

圖2提供圖解說明在此一「僅蓄電池」模式中之系統操作的兩個圖表。頂部圖表202圖解說明隨時間而變的蓄電池電壓(由曲線222所展示)，而底部圖表204圖解說明隨相同時間而變的蓄電池放電電流(由曲線224所展示)。如可看見，蓄電池放電電流(由曲線224所展示)基於負載116之操作要求而隨時間變化，但絕不超過一最大放電電流位準226(例如，如由CPU 124或核心VR 122所限制)。同時，充電器102負責將電力自蓄電池104(例如使用熟習此項技術者已知之一「理想二極體」模式)提供至輸出節點VOUT/VSYS。同時，在此習用情境下，核心VR 122操作以將一經調節電壓自節點VOUT/VSYS提供至CPU 124。Figure 2 provides two diagrams illustrating the operation of the system in this "battery only" mode. The top graph 202 illustrates the battery voltage as a function of time (shown by curve 222), and the bottom graph 204 illustrates the battery discharge current as a function of time (shown by the curve 224). As can be seen, the battery discharge current (shown by the curve 224) varies with time based on the operating requirements of the load 116, but never exceeds a maximum discharge current level 226 (for example, as limited by the CPU 124 or the core VR 122) . At the same time, the charger 102 is responsible for supplying power from the storage battery 104 (for example, using an "ideal diode" mode known to those skilled in the art) to the output node VOUT/VSYS. At the same time, in this conventional scenario, the core VR 122 operates to provide a regulated voltage from the node VOUT/VSYS to the CPU 124.

同時，參考圖1，由曲線222所展示之蓄電池電壓係由燃料計114不斷地監測，且此資訊被提供至EC 112。在某些實施方案中，EC 112基於用於實施蓄電池102之蓄電池電池之數目來判定蓄電池102之一最大及最小容量。舉例而言，在一兩電池(例如2S)蓄電池箱中，最大蓄電池電壓係2×4.2 V=8.4 V，且最小蓄電池電壓係2×3 V=6V。在此一實例中，一30%經充電蓄電池位準係稍微高於6 V。Meanwhile, referring to FIG. 1, the battery voltage shown by the curve 222 is continuously monitored by the fuel gauge 114, and this information is provided to the EC 112. In some embodiments, the EC 112 determines one of the maximum and minimum capacities of the battery 102 based on the number of battery cells used to implement the battery 102. For example, in a two-cell (such as 2S) battery box, the maximum battery voltage is 2×4.2 V=8.4 V, and the minimum battery voltage is 2×3 V=6V. In this example, a 30% charged battery level is slightly higher than 6V.

如時間206處所展示，當蓄電池放電下降至約蓄電池容量(如由燃料計114所監測)之30%時，此資訊被提供至EC 112且傳遞至CPU 124。此時，CPU 124必須將系統負載電流自一最大位準226限制至一經減少位準228以防止即將來臨的系統停機。如圖2中進一步所展示，若在一後續時間208處蓄電池在不自一配接器或別處補充電力之情況下繼續放電，則蓄電池電壓將達到一最小電荷位準(例如在一2S實例中約5 V，如以上所闡述)，在那時CPU 124及/或EC 112將別無選擇只能將系統停機(例如，經由一電源開啟重置(POR))。As shown at time 206, when the battery discharge drops to approximately 30% of the battery capacity (as monitored by the fuel gauge 114), this information is provided to the EC 112 and passed to the CPU 124. At this time, the CPU 124 must limit the system load current from a maximum level 226 to a reduced level 228 to prevent an impending system shutdown. As further shown in Figure 2, if the battery continues to discharge at a subsequent time 208 without replenishing power from an adapter or elsewhere, the battery voltage will reach a minimum charge level (for example, in a 2S example) About 5 V, as explained above), at that time the CPU 124 and/or EC 112 will have no choice but to shut down the system (for example, via a power-on reset (POR)).

根據某些態樣，申請人認識到在如以上所闡述之時間206與時間208之間的週期期間延後或消除CPU 124之經減少效能將係有利的。舉例而言，在遊戲膝上型筆記本及其他應用中，若CPU效能被限制，則彼等系統可在對於玩家/使用者不可接受之低蓄電池位準處艱難地運行遊戲。類似問題亦可適用於網頁內容開發者及/或視訊編輯者。此外，甚至在時間206與時間208之間的週期期間，當在一習用「理想二極體」模式中操作時，負載116僅接收由曲線222指示之逐漸降低的蓄電池電壓。如此，負載116易受「負載***」(例如，當除CPU 124之外的另一裝置連接至系統100時)或可致使蓄電池放電電流形成峰值之其他事件的影響。此等事件可致使由負載116所見之系統電壓下降至低於經指定最小蓄電池電壓(例如，由於由理想二極體之經增加汲極-源極電流及汲極-源極電阻導致之電壓降)。According to certain aspects, the applicant recognizes that it would be advantageous to delay or eliminate the reduced performance of the CPU 124 during the period between time 206 and time 208 as described above. For example, in gaming laptops and other applications, if CPU performance is limited, their systems can struggle to run games at low battery levels that are unacceptable for players/users. Similar issues can also apply to web content developers and/or video editors. Furthermore, even during the period between time 206 and time 208, when operating in a conventional "ideal diode" mode, load 116 only receives the gradually decreasing battery voltage indicated by curve 222. As such, the load 116 is susceptible to "load insertion" (for example, when another device other than the CPU 124 is connected to the system 100) or other events that can cause the battery discharge current to peak. These events can cause the system voltage seen by the load 116 to drop below the specified minimum battery voltage (for example, due to the voltage drop caused by the increased drain-source current and drain-source resistance of an ideal diode ).

根據此等及其他態樣，實施例藉由提供一反向升壓模式(與習用「理想二極體」模式對比)以允許CPU 124甚至當蓄電池位準已跌落至低於一特定電荷位準時繼續在全效能處且以一經調節電壓操作來解決此等及其他問題。儘管根據實施例之反向升壓操作模式可使得有必要以比習用方法更快方式將系統完全停機，但此權衡在諸多情景(諸如以上所闡述之彼等)中係期望的。According to these and other aspects, the embodiment provides a reverse boost mode (compared to the conventional "ideal diode" mode) to allow the CPU 124 even when the battery level has fallen below a specific charge level Continue to operate at full performance and with a regulated voltage to solve these and other problems. Although the reverse boost mode of operation according to the embodiment may make it necessary to shut down the system completely in a faster manner than conventional methods, this trade-off is desirable in many scenarios, such as those set forth above.

圖3圖解說明根據本發明之一反向升壓模式之實例態樣。類似於圖2，頂部圖表302圖解說明隨時間變化之蓄電池電壓(由曲線322所展示)，而底部圖表304圖解說明隨相同時間變化之蓄電池放電電流(由曲線324所展示)。如可看見，蓄電池放電電流(由曲線324所展示)基於負載116之操作要求隨時間而變化，但絕不超過一最大放電電流位準326(例如，如由CPU 124或核心VR 122所限制，如以上所闡述)。不同於圖2中所展示之習用操作，如可在圖3中看見，當在時間306處蓄電池放電低於蓄電池容量之約30%時，啟用根據實施例之反向升壓模式。因此，在無任何CPU效能限制之情況且以一經調節電壓(如與僅蓄電池電壓相反)防止系統停機達直至時間308之一經延長週期，儘管以比習用方法更快地使蓄電池放電至一最小位準為代價，如由曲線322之區段322-A所指示。如在下文將更詳細地所闡述，在根據實施例之一反向升壓模式之一項實例中，以某一方式控制一或多個蓄電池控制電晶體(例如FET)及一對旁路電晶體(FET)以將系統電壓調節至任何值處且在無CPU效能之任何限制之情況下防止系統停機。Fig. 3 illustrates an example aspect of a reverse boost mode according to the present invention. Similar to FIG. 2, the top graph 302 illustrates the battery voltage as a function of time (shown by curve 322), and the bottom graph 304 illustrates the battery discharge current as a function of time (shown by the curve 324). As can be seen, the battery discharge current (shown by the curve 324) varies with time based on the operating requirements of the load 116, but never exceeds a maximum discharge current level 326 (e.g., as limited by the CPU 124 or the core VR 122, As explained above). Different from the conventional operation shown in FIG. 2, as can be seen in FIG. 3, when the battery discharge is less than about 30% of the battery capacity at time 306, the reverse boost mode according to the embodiment is activated. Therefore, in the absence of any CPU performance limitation and with an adjusted voltage (as opposed to only the battery voltage), the system is prevented from shutting down for an extended period of time 308, although the battery is discharged to a minimum level faster than the conventional method Quasi is the cost, as indicated by section 322-A of curve 322. As will be explained in more detail below, in an example of the reverse boost mode according to one of the embodiments, one or more battery control transistors (such as FET) and a pair of bypass circuits are controlled in a certain way. The crystal (FET) adjusts the system voltage to any value and prevents the system from shutting down without any limitation of CPU performance.

圖4係一示意性方塊圖，其以使用一積體電路402之一蓄電池充電器架構(諸如圖1中展示之彼架構)來圖解說明本發明之一詳細實施方案之一項實例。儘管待在下文更詳細地闡述之所圖解說明實例充電器102係一升降壓充電器，但本發明實施例不限於此實例，且可包含諸如降壓及/或升壓充電器等其他類型之充電器。4 is a schematic block diagram illustrating an example of a detailed implementation of the present invention using a battery charger architecture (such as the architecture shown in FIG. 1) using an integrated circuit 402. Although the illustrated example charger 102 to be described in more detail below is a buck-boost charger, the embodiment of the present invention is not limited to this example, and may include other types such as buck and/or boost chargers. charger.

此等實施例中之實例充電器102包含電力開關電晶體，該等電力開關電晶體包含一場效應電晶體(FET)Q1 402，該FET Q1使其汲極耦合至節點404且使其源極耦合一中間節點406。另一FET Q2使其汲極耦合至節點406且使其源極耦合至一參考(例如GND)。實例充電器102進一步包含：一FET Q4 407，其使其汲極耦合至一節點412且使其源極耦合至一中間節點405；及一FET Q5 408，其使其汲極耦合至節點405且使其源極耦合至GND。熟習此項技術者可瞭解，FET Q1 402、Q2 403、Q4 407及Q5 408係耦合成一升降壓結構，更特定而言一H橋式升降壓結構。在其他實施例中，亦可使用此項技術中之任何其他類型之升降壓結構。The example charger 102 in these embodiments includes power switching transistors including a field-effect transistor (FET) Q1 402 that has its drain coupled to node 404 and its source coupled An intermediate node 406. The other FET Q2 has its drain coupled to node 406 and its source coupled to a reference (eg GND). The example charger 102 further includes: a FET Q4 407 with its drain coupled to a node 412 and its source coupled to an intermediate node 405; and a FET Q5 408 with its drain coupled to the node 405 and Make its source coupled to GND. Those familiar with this technology can understand that FETs Q1 402, Q2 403, Q4 407, and Q5 408 are coupled into a buck-boost structure, more specifically, an H-bridge buck-boost structure. In other embodiments, any other types of buck-boost structures in this technology can also be used.

另外，充電器102包含：一FET Q6 416，其使其汲極耦合至節點404且使其源極耦合一中間節點420；及一FET Q7 418，其使其源極耦合至節點420且使其汲極耦合至一輸出節點410。如以上所提及，FET Q6 416及Q7 418可實施背對背式旁路FET，其提供一額外控制以允許將電力自配接器傳送至負載。其他實例亦可包含一單個旁路FET。旁路FET之此配置導致具有一共同源極415(亦被稱為一旁路源極)之一結構。FET Q6 416之閘極及FET Q7 418之閘極亦被耦合在一起，且可被稱為一旁路閘極417。旁路源極415及旁路閘極417兩者經耦合至IC 402，以便允許IC 402控制旁路FET之操作。充電器102包含經耦合於節點406與節點405之間之一電感器L1。如所展示，輸出節點410將一系統電壓VSYS提供至一系統負載416，諸如一CPU(未展示)。In addition, the charger 102 includes: a FET Q6 416 with its drain coupled to the node 404 and its source coupled with an intermediate node 420; and a FET Q7 418 with its source coupled to the node 420 and its source coupled to an intermediate node 420 The drain is coupled to an output node 410. As mentioned above, FETs Q6 416 and Q7 418 can implement back-to-back bypass FETs, which provide an additional control to allow power to be transferred from the adapter to the load. Other examples may also include a single bypass FET. This configuration of the bypass FET results in a structure with a common source 415 (also referred to as a bypass source). The gate of FET Q6 416 and the gate of FET Q7 418 are also coupled together, and can be referred to as a bypass gate 417. Both the bypass source 415 and the bypass gate 417 are coupled to the IC 402 to allow the IC 402 to control the operation of the bypass FET. The charger 102 includes an inductor L1 coupled between the node 406 and the node 405. As shown, the output node 410 provides a system voltage VSYS to a system load 416, such as a CPU (not shown).

此實例中，充電器102進一步包含一對蓄電池控制電晶體FET Q3 414(例如NGATE)及FET Q8 426(例如BGATE)。NGATE FET Q3 414使其汲極耦合至節點410且使其源極耦合至節點412。BGATE FET Q8 426使其汲極耦合至節點412，且經由電阻器R2 427使其源極耦合至蓄電池104。如以上所提及，FET Q3 414及Q8 426可實施蓄電池控制電晶體。FET Q3 414及Q8 426之閘極經耦合至IC 402以用於控制可再充電蓄電池104之充電及放電。舉例而言，當不連接電力配接器時，FET Q3 414及Q8 426可被接通以允許將來自蓄電池104之電力經由節點410提供至系統負載。當連接電力配接器時，FET Q3 414可接通，且可以一線性方式控制FET Q8 426以控制可再充電蓄電池104之充電，如熟習此項技術者已知。In this example, the charger 102 further includes a pair of battery control transistors FET Q3 414 (such as NGATE) and FET Q8 426 (such as BGATE). NGATE FET Q3 414 has its drain coupled to node 410 and its source coupled to node 412. BGATE FET Q8 426 has its drain coupled to node 412 and its source coupled to battery 104 via resistor R2 427. As mentioned above, FETs Q3 414 and Q8 426 can implement battery control transistors. The gates of the FETs Q3 414 and Q8 426 are coupled to the IC 402 for controlling the charging and discharging of the rechargeable battery 104. For example, when the power adapter is not connected, FETs Q3 414 and Q8 426 can be turned on to allow power from the battery 104 to be provided to the system load via the node 410. When the power adapter is connected, the FET Q3 414 can be turned on, and the FET Q8 426 can be controlled in a linear manner to control the charging of the rechargeable battery 104, as known to those skilled in the art.

FET Q1 402、Q2 403、Q4 407、Q5 408、Q3 414、Q6 416、Q7 418及Q8 426經展示為使用N通道MOSFET來實施，儘管預期其他類型之開關裝置，諸如P通道裝置、其他類似形式(例如，FET、MOS裝置等)、雙極接面電晶體(BJT)及諸如此類，絕緣閘極雙極電晶體(IGBT)及諸如此類等。FETs Q1 402, Q2 403, Q4 407, Q5 408, Q3 414, Q6 416, Q7 418, and Q8 426 are shown to be implemented using N-channel MOSFETs, although other types of switching devices are expected, such as P-channel devices, and other similar forms (For example, FET, MOS device, etc.), bipolar junction transistor (BJT) and the like, insulated gate bipolar transistor (IGBT) and the like.

如所展示，根據本發明實施例之IC 402包含正常模式模組422及一反向升壓模式模組424，該正常模式模組及該反向升壓模式模組在一正常模式期間及在一反向升壓模式期間經由至其閘極之輸出連接分別控制電晶體Q1 402、Q2 403、Q4 407、Q5 408、Q3 414、Q6 416及Q7 418之操作。出於圖解說明之簡便性，模組422及424被單獨展示但可包含共同電路，該共同電路包含亦由模組共用以便藉由IC 202控制系統100之其他操作的電路。另外及有關地，儘管本說明將聚焦於IC 402在一僅蓄電池模式中操作，諸如在一配接器不被連接至埠106時，但顯而易見的應係IC 402可包含用於在其他模式中操作的額外模組及/或功能性，諸如當一電力配接器被連接至埠106且對蓄電池104充電時。為了本發明實施例之清晰，此處將省略此額外功能性及/或電路之細節。As shown, the IC 402 according to an embodiment of the present invention includes a normal mode module 422 and a reverse boost mode module 424, the normal mode module and the reverse boost mode module during a normal mode and during a normal mode During a reverse boost mode, the operation of transistors Q1 402, Q2 403, Q4 407, Q5 408, Q3 414, Q6 416, and Q7 418 are respectively controlled via output connections to their gates. For simplicity of illustration, the modules 422 and 424 are shown separately but may include a common circuit including circuits that are also shared by the modules to control other operations of the system 100 by the IC 202. Additionally and relatedly, although this description will focus on IC 402 operating in a battery-only mode, such as when an adapter is not connected to port 106, it is obvious that IC 402 may be included for use in other modes Additional modules and/or functionality for operation, such as when a power adapter is connected to the port 106 and the battery 104 is charged. For the clarity of the embodiments of the present invention, details of this additional functionality and/or circuit will be omitted here.

正常模式模組422在一降壓或一升壓模式或一升降壓模式中操作FET Q1 402、Q2 403、Q4 407、Q5 408及Q3 414以將輸出電壓VSYS調節至穩定系統匯流排電壓之一窄DC範圍。在此模式中，將旁路FET Q6 416及Q7 418關閉且維持於一關閉狀態中，同時接通NGATE FET Q3 414。模組422可當自配接器、蓄電池或兩者之一組合提供系統電力時(例如，在僅連接蓄電池104之情形下，在僅一配接器連接至埠106，或兩者之一組合之情形下)操作。因此，在實施例中，模組422經組態以在各種電力及負載條件(諸如2、3或4電池之鋰離子蓄電池之蓄電池104結構、具有3.2 V至23.4 V之一範圍之輸入電壓及具有2.4 V至18.304 V之一範圍之系統輸出電壓VSYS)中操作。The normal mode module 422 operates the FETs Q1 402, Q2 403, Q4 407, Q5 408 and Q3 414 in a buck or a boost mode or a buck-boost mode to adjust the output voltage VSYS to one of the stable system bus voltages Narrow DC range. In this mode, the bypass FETs Q6 416 and Q7 418 are turned off and maintained in an off state, and the NGATE FET Q3 414 is turned on at the same time. The module 422 can provide system power from an adapter, a battery, or a combination of the two (for example, when only the battery 104 is connected, when only one adapter is connected to the port 106, or a combination of the two Under the circumstances) operation. Therefore, in the embodiment, the module 422 is configured to operate under various power and load conditions (such as the battery 104 structure of a lithium-ion battery with 2, 3 or 4 cells, an input voltage ranging from 3.2 V to 23.4 V, and Operate in a system output voltage (VSYS) with a range of 2.4 V to 18.304 V.

更特定而言，在一僅蓄電池模式(例如，如藉由EC 112傳遞至IC 402)中，模組422最初操作以關閉 FET Q1 402、Q2 403、Q4 407、Q5 408，關閉旁路FET Q6 416及Q7 418，且接通NGATE FET Q3 414及BGATE FET Q8 426以便實施其中將來自蓄電池104之電力直接提供至節點410之一習用「理想二極體」模式。各種已知技術可用於實施模組422以執行此「理想二極體」模式操作(例如將NGATE FET Q3 414及BGATE FET Q8 426維持於一實質上ON狀態中)，且因此為了本發明之清晰，此處將省略其進一步細節。在此模式期間，模組422不提供任何電壓調節，且因此將來自蓄電池104之電壓提供至節點410。然而，顯而易見的應係，此電壓減小自蓄電池104汲取之電流乘以電阻R2 427及NGATE FET Q3 414及BGATE FET Q9 426之汲極-源極電阻。此外，如圖2及圖3中所展示，此蓄電池電壓將因蓄電池放電而隨時間減小。More specifically, in a battery-only mode (for example, as passed to IC 402 by EC 112), module 422 initially operates to turn off FETs Q1 402, Q2 403, Q4 407, Q5 408, and turn off bypass FET Q6 416 and Q7 418, and turn on NGATE FET Q3 414 and BGATE FET Q8 426 to implement a conventional "ideal diode" mode in which power from the battery 104 is directly supplied to the node 410. Various known techniques can be used to implement the module 422 to perform this "ideal diode" mode operation (such as maintaining NGATE FET Q3 414 and BGATE FET Q8 426 in a substantially ON state), and therefore for the clarity of the present invention , Further details will be omitted here. During this mode, the module 422 does not provide any voltage regulation, and therefore provides the voltage from the battery 104 to the node 410. However, the obvious response is that this voltage reduces the current drawn from the battery 104 multiplied by the resistance R2 427 and the drain-source resistance of the NGATE FET Q3 414 and BGATE FET Q9 426. In addition, as shown in Figures 2 and 3, the battery voltage will decrease over time due to battery discharge.

根據本發明實施例之態樣，然而，當由IC 402接收一「反向升壓啟用」信號(例如當違反一預界定蓄電池電荷位準，諸如30%最大蓄電池電荷，如由燃料計114所偵測時，自EC 112)時，停用正常模式模組422，且啟動反向升壓模式模組424。在此模式期間，模組424關閉NGATE FET Q3 414(例如將NGATE FET維持於一OFF狀態中)，接通旁路FET Q6 416及Q7 418，且在一反向升壓開關模式中操作FET Q1 402、Q2 403、Q4 407及Q5 408以便經由輸出節點410將一經調節電壓提供至負載。熟習此項技術者理解如何使用開關電晶體(諸如Q1 402、Q2 403、Q4 407及Q5 408)及控制信號(諸如經脈寬調變(PWM)信號)來實施一升壓操作模式以便提供一經調節輸出電壓，且因此為了本發明之清晰此處將省略其進一步細節。According to the aspect of the embodiment of the present invention, however, when a "reverse boost enable" signal is received by the IC 402 (for example, when a predetermined battery charge level is violated, such as 30% of the maximum battery charge, as indicated by the fuel gauge 114 When detecting, from EC 112), the normal mode module 422 is disabled, and the reverse boost mode module 424 is activated. During this mode, the module 424 turns off the NGATE FET Q3 414 (for example, maintains the NGATE FET in an OFF state), turns on the bypass FETs Q6 416 and Q7 418, and operates the FET Q1 in a reverse boost switching mode 402, Q2 403, Q4 407, and Q5 408 so as to provide a regulated voltage to the load via the output node 410. Those familiar with this technology understand how to use switching transistors (such as Q1 402, Q2 403, Q4 407, and Q5 408) and control signals (such as pulse width modulation (PWM) signals) to implement a boost operation mode to provide a regulated The output voltage, and therefore further details will be omitted here for clarity of the invention.

圖5係圖解說明可由一充電器102(諸如根據實施例之圖4中所展示之彼充電器)實施之一實例反向升壓模式方法之一流程圖。FIG. 5 illustrates a flowchart of an example reverse boost mode method that can be implemented by a charger 102 (such as the other charger shown in FIG. 4 according to an embodiment).

為圖解說明，圖5在方塊502中展示充電器102在一正常僅蓄電池模式中操作。舉例而言，此可係回應於IC 402自EC 112 (例如經由I2C、SMBus等)接收一配接器不連接至埠106之一指示。在圖4之實例中，該正常僅蓄電池模式可包含正常模式模組422關閉FET Q1 402、Q2 403、Q4 407及Q5 408，關閉旁路FET Q6 416及Q7 418且接通FET Q3 414及Q8 426以啟用一「理想二極體」模式以便將電壓自蓄電池104提供至輸出節點410。To illustrate, FIG. 5 shows in block 502 that the charger 102 is operating in a normal battery-only mode. For example, this may be in response to the IC 402 receiving an instruction from the EC 112 (for example, via I2C, SMBus, etc.) that an adapter is not connected to the port 106. In the example of FIG. 4, the normal battery-only mode may include the normal mode module 422 turning off FETs Q1 402, Q2 403, Q4 407, and Q5 408, turning off bypass FETs Q6 416 and Q7 418, and turning on FETs Q3 414 and Q8. 426 to enable an "ideal diode" mode to provide voltage from the battery 104 to the output node 410.

方塊504指示EC 112不斷地監測來自燃料計114之資訊。在方塊中，EC 112比較來自燃料計114之資訊以(舉例而言)基於實施蓄電池104之電池的數目判定蓄電池104是否已放電下降至一預判定位準，諸如最大蓄電池電荷之30%。Block 504 instructs the EC 112 to continuously monitor the information from the fuel gauge 114. In the block, the EC 112 compares the information from the fuel gauge 114 to determine whether the battery 104 has been discharged to a predetermined level, such as 30% of the maximum battery charge, based on the number of batteries implementing the battery 104, for example.

若EC 112判定在方塊506中已達到臨限放電位準，則EC 112可藉由發信號啟用反向升壓來請求充電器102自一正常僅蓄電池模式轉變為反向升壓模式。EC 112可藉由經由SMBus將某些值寫入至暫存器(舉例而言，充電器102之一或多個控制暫存器之一或多個位元)來進行此操作。EC 112亦可執行某些操作以指導充電器102將VSYS調節至某一目標電壓(例如經由SMbus)。在其他實施例中，充電器102獨立地判定該目標電壓(例如藉由使用與配接器電壓位準有關之資訊)。If the EC 112 determines that the threshold discharge level has been reached in block 506, the EC 112 may request the charger 102 to switch from a normal battery-only mode to a reverse boost mode by signaling to enable reverse boost. The EC 112 can perform this operation by writing certain values to a register (for example, one or more bits of one or more control registers of the charger 102) via SMBus. The EC 112 may also perform certain operations to instruct the charger 102 to adjust the VSYS to a certain target voltage (for example, via SMbus). In other embodiments, the charger 102 independently determines the target voltage (for example, by using information related to the voltage level of the adapter).

回應於在方塊506中請求反向升壓模式之指示，在方塊508中開始充電器102之充電器102反向升壓模式操作。此方塊包含停用正常模式模組422之操作且啟用反向升壓模組424之操作。在此模式期間，模組424關閉FET Q3 414，接通旁路FET Q6 416及Q7 418，且在一反向升壓開關模式中操作FET Q1 402、Q2 403、Q4 407及Q5 408以便經由輸出節點410將對應於目標電壓且高於蓄電池電壓之一經調節電壓提供至負載。為執行此電壓調節，模組424可使用回饋電路(未展示)來監測輸出節點410處之電壓且使用熟習此項技術者已知的技術來產生至Q1 402、Q2 403、Q4 407、Q5 408之PWM開關信號。In response to the instruction to request the reverse boost mode in block 506, the charger 102 reverse boost mode operation of the charger 102 is started in block 508. This block includes disabling the operation of the normal mode module 422 and enabling the operation of the reverse boost module 424. During this mode, the module 424 turns off the FET Q3 414, turns on the bypass FETs Q6 416 and Q7 418, and operates the FETs Q1 402, Q2 403, Q4 407 and Q5 408 in a reverse boost switching mode to pass the output The node 410 provides a regulated voltage corresponding to the target voltage and higher than the battery voltage to the load. To perform this voltage regulation, the module 424 can use a feedback circuit (not shown) to monitor the voltage at the output node 410 and use a technique known to those skilled in the art to generate Q1 402, Q2 403, Q4 407, Q5 408 The PWM switching signal.

應注意，本發明實施例之反向升壓模式可由客戶設定後不管且因此不需要監測及保護系統或蓄電池之額外負擔處理。It should be noted that the reverse boost mode of the embodiment of the present invention can be set and ignored by the customer and therefore does not require the monitoring and protection system or the extra burden of the battery.

儘管已參考本發明之較佳實施例特別闡述了本發明實施例，但對於熟習此項技術者而言容易顯而易見的應係，可在不背離本發明之精神及範疇之情況下在形式及細節上做出改變和修改。意欲使隨附申請專利範圍囊括此等改變及修改。Although the embodiments of the present invention have been specifically described with reference to the preferred embodiments of the present invention, it is easily obvious to those skilled in the art that the forms and details can be changed without departing from the spirit and scope of the present invention. Make changes and modifications on the It is intended that the scope of the attached patent application encompasses these changes and modifications.

100:實例系統/系統 102:充電器/蓄電池充電器/實例充電器 104:蓄電池/可再充電蓄電池 106:埠 112:嵌入式控制器 114:燃料計 116:負載 122:核心電壓調節器 124:CPU 202:頂部圖表 204:底部圖表 206:時間 208:時間/後續時間 222:曲線 224:曲線 228:經減少位準 302:頂部圖表 304:底部圖表 306:時間 308:時間 322:曲線 322-A:區段 324:曲線 326:最大放電電流位準 402:積體電路/場效應電晶體/電晶體 403:場效應電晶體/電晶體/開關電晶體 404:節點 405:中間節點/節點 406:中間節點/節點 407:場效應電晶體/電晶體/開關電晶體 408:場效應電晶體/電晶體/開關電晶體 410:輸出節點/節點 412:節點 414:蓄電池控制電晶體場效應電晶體 415:NGATE場效應電晶體/場效應電晶體/電晶體 416:場效應電晶體/系統負載/電晶體/旁路場效應電晶體 417:旁路閘極 418:場效應電晶體/電晶體/旁路場效應電晶體 420:中間節點/節點 422:正常模式模組/模組 424:反向升壓模式模組/模組/反向升壓模組 426:蓄電池控制電晶體場效應電晶體/ BGATE場效應電晶體/場效應電晶體 427:電阻器/電阻 502:方塊 504:方塊 506:方塊 508:方塊 Q1:場效應電晶體/電晶體/開關電晶體 Q2:場效應電晶體/電晶體/開關電晶體 Q3:蓄電池控制電晶體場效應電晶體/ NGATE場效應電晶體/場效應電晶體/電晶體 Q4:場效應電晶體/電晶體/開關電晶體 Q5:場效應電晶體/電晶體/開關電晶體 Q6:場效應電晶體/電晶體/旁路場效應電晶體 Q7:場效應電晶體/電晶體/旁路場效應電晶體 Q8:場效應電晶體/ BGATE場效應電晶體 R2:電阻器/電阻100: example system/system 102: Charger/Battery Charger/Example Charger 104: battery/rechargeable battery 106: Port 112: Embedded Controller 114: Fuel Gauge 116: load 122: core voltage regulator 124: CPU 202: Top chart 204: bottom chart 206: time 208: time/follow-up time 222: Curve 224: Curve 228: Reduced level 302: Top chart 304: bottom chart 306: time 308: time 322: Curve 322-A: Section 324: Curve 326: Maximum discharge current level 402: Integrated Circuit/Field Effect Transistor/Transistor 403: Field Effect Transistor/Transistor/Switching Transistor 404: Node 405: Intermediate node/node 406: Intermediate Node/Node 407: Field Effect Transistor/Transistor/Switching Transistor 408: Field Effect Transistor/Transistor/Switching Transistor 410: output node/node 412: Node 414: Battery Control Transistor Field Effect Transistor 415: NGATE field effect transistor/field effect transistor/transistor 416: Field Effect Transistor/System Load/Transistor/Bypass Field Effect Transistor 417: Bypass Gate 418: Field Effect Transistor/Transistor/Bypass Field Effect Transistor 420: Intermediate node/node 422: Normal mode module/module 424: Reverse boost mode module/module/reverse boost module 426: Battery Control Transistor Field Effect Transistor/BGATE Field Effect Transistor/Field Effect Transistor 427: resistor/resistor 502: Block 504: Block 506: Block 508: Cube Q1: Field Effect Transistor/Transistor/Switching Transistor Q2: Field Effect Transistor/Transistor/Switching Transistor Q3: Battery Control Transistor Field Effect Transistor/NGATE Field Effect Transistor/Field Effect Transistor/Transistor Q4: Field Effect Transistor/Transistor/Switching Transistor Q5: Field Effect Transistor/Transistor/Switching Transistor Q6: Field Effect Transistor/Transistor/Bypass Field Effect Transistor Q7: Field Effect Transistor/Transistor/Bypass Field Effect Transistor Q8: Field Effect Transistor / BGATE Field Effect Transistor R2: resistor/resistance

在結合附圖審閱特定實施例之以下說明後，本發明之此等及其他態樣及特徵對於熟習此項技術者而言將變得顯而易見。These and other aspects and features of the present invention will become apparent to those skilled in the art after reviewing the following description of specific embodiments in conjunction with the accompanying drawings.

圖1係圖解說明其中本發明可發現有用應用之一實例裝置或系統之一方塊圖。Figure 1 illustrates a block diagram of an example device or system in which the present invention can find useful applications.

圖2係圖解說明標準蓄電池充電器應用中之某些問題之一圖式。Figure 2 is a diagram illustrating some of the problems in the application of standard battery chargers.

圖3係圖解說明根據本發明之一反向升壓模式之實例態樣之一圖式。Fig. 3 is a diagram illustrating an example aspect of a reverse boost mode according to the present invention.

圖4係圖解說明在包含一積體電路之一蓄電池充電器架構中本發明實施例之一實例實施方案之一示意圖。4 is a schematic diagram illustrating an example implementation of an embodiment of the present invention in a battery charger architecture including an integrated circuit.

圖5係圖解說明根據實施例之一實例方法之一流程圖。Figure 5 illustrates a flow chart of an example method according to the embodiment.

100:實例系統/系統 100: example system/system

102:充電器/蓄電池充電器/實例充電器 102: Charger/Battery Charger/Example Charger

104:蓄電池/可再充電蓄電池 104: battery/rechargeable battery

106:埠 106: Port

112:嵌入式控制器 112: Embedded Controller

114:燃料計 114: Fuel Gauge

116:負載 116: load

122:核心電壓調節器 122: core voltage regulator

124:CPU 124: CPU

Claims (15)

一種用於當一蓄電池用於將電力提供至一負載時在一僅蓄電池模式中操作一蓄電池充電器之方法，該方法包括： 接收該僅蓄電池模式之一第一指示； 回應於該第一指示，致使經由一對蓄電池控制電晶體將來自該蓄電池之一電壓提供至該負載； 接收該蓄電池已放電低於一臨限位準之一第二指示；及 回應於該第二指示，致使使用經耦合成一升降壓結構之不同於該對蓄電池控制電晶體之複數個開關電晶體及至少一對旁路電晶體來將一經調節電壓自該蓄電池提供至該負載。A method for operating a battery charger in a battery-only mode when a battery is used to provide power to a load, the method comprising: Receiving a first indication of one of the battery-only modes; In response to the first instruction, cause a voltage from the battery to be supplied to the load via a pair of battery control transistors; Receive a second indication that the battery has been discharged below a threshold level; and In response to the second instruction, a plurality of switching transistors different from the pair of battery control transistors and at least a pair of bypass transistors coupled into a buck-boost structure are used to provide a regulated voltage from the battery to the load . 如請求項1之方法，其中致使將該經調節電壓提供至該負載包含在一反向升壓模式中操作該蓄電池充電器。The method of claim 1, wherein causing the regulated voltage to be provided to the load includes operating the battery charger in a reverse boost mode. 如請求項2之方法，其中該反向升壓模式包括將該對蓄電池控制電晶體之一NGATE FET維持於一OFF狀態中，且將該對旁路電晶體維持於一ON狀態中。The method of claim 2, wherein the reverse boost mode includes maintaining one of the pair of battery control transistors NGATE FET in an OFF state, and maintaining the pair of bypass transistors in an ON state. 如請求項1之方法，其中致使將來自該蓄電池之該電壓提供至該負載包含在一理想二極體模式中操作該蓄電池充電器。The method of claim 1, wherein causing the voltage from the battery to be provided to the load includes operating the battery charger in an ideal diode mode. 如請求項4之方法，其中該理想模式包括將該對蓄電池控制電晶體維持於一ON狀態中，且將該對旁路電晶體維持於一OFF狀態中。The method of claim 4, wherein the ideal mode includes maintaining the pair of battery control transistors in an ON state, and maintaining the pair of bypass transistors in an OFF state. 如請求項1之方法，其中接收該等第一及第二指示包含自一外部實體接收信號。Such as the method of claim 1, wherein receiving the first and second instructions includes receiving a signal from an external entity. 如請求項6之方法，其中該外部實體包括一嵌入式控制器。Such as the method of claim 6, wherein the external entity includes an embedded controller. 一種當一蓄電池用於將電力提供至一負載時具有一僅蓄電池模式之蓄電池充電器，其包括： 一正常模式模組，其經組態以致使經由一對蓄電池控制電晶體將來自該蓄電池之一電壓提供至該負載；及 一反向升壓模組，其經組態以回應於該蓄電池已放電低於一臨限位準之一指示，致使使用經耦合成一升降壓結構之不同於該對蓄電池控制電晶體之複數個開關電晶體及至少一對旁路電晶體來將一經調節電壓自該蓄電池提供至該負載。A battery charger with a battery-only mode when a battery is used to provide power to a load, which includes: A normal mode module configured to provide a voltage from the battery to the load via a pair of battery control transistors; and A reverse boost module configured to respond to an indication that the battery has been discharged below a threshold level, resulting in the use of a plurality of battery control transistors that are coupled into a buck-boost structure and are different from the pair of battery control transistors Switching transistors and at least a pair of bypass transistors provide a regulated voltage from the battery to the load. 如請求項8之蓄電池充電器，其中該反向升壓模組經組態以致使藉由在一反向升壓模式中操作該蓄電池充電器來將該經調節電壓提供至該負載。Such as the battery charger of claim 8, wherein the reverse boost module is configured to cause the regulated voltage to be provided to the load by operating the battery charger in a reverse boost mode. 如請求項9之蓄電池充電器，其中該反向升壓模式包括將該對蓄電池控制電晶體之一NGATE FET維持於一OFF狀態中，且將該對旁路電晶體維持於一ON狀態中。Such as the battery charger of claim 9, wherein the reverse boost mode includes maintaining one of the pair of battery control transistors NGATE FET in an OFF state, and maintaining the pair of bypass transistors in an ON state. 如請求項9之蓄電池充電器，其中該反向升壓模式包括使用經脈寬調變控制信號來控制開關。Such as the battery charger of claim 9, wherein the reverse boost mode includes using a pulse width modulation control signal to control the switch. 如請求項8之蓄電池充電器，其中該正常模式模組經組態以致使藉由在一理想二極體模式中操作該蓄電池充電器來將來自該蓄電池之該電壓提供至該負載。Such as the battery charger of claim 8, wherein the normal mode module is configured to cause the voltage from the battery to be supplied to the load by operating the battery charger in an ideal diode mode. 如請求項12之蓄電池充電器，其中該理想模式包括將該對蓄電池控制電晶體維持於一ON狀態中，且將該對旁路電晶體維持於一OFF狀態中。Such as the battery charger of claim 12, wherein the ideal mode includes maintaining the pair of battery control transistors in an ON state and maintaining the pair of bypass transistors in an OFF state. 如請求項8之蓄電池充電器，其中該指示係接收自一外部實體。Such as the battery charger of claim 8, wherein the instruction is received from an external entity. 如請求項14之蓄電池充電器，其中該外部實體包括一嵌入式控制器。Such as the battery charger of claim 14, wherein the external entity includes an embedded controller.

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