TW202022938A - Slotting method for suppressing defects capable of preventing cracks generated by dividing a wafer from exceeding a metamorphic region and avoiding grain defects - Google Patents
Slotting method for suppressing defects capable of preventing cracks generated by dividing a wafer from exceeding a metamorphic region and avoiding grain defects Download PDFInfo
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本發明係關於晶圓切割之前置加工方法，特別關於分割晶圓進而導致分割處產生裂紋，該切割裂紋導致的積體電路壞損，透過低功率雷射連續加工產生加工凹槽來限制切割裂紋範圍。 The present invention relates to a pre-processing method for wafer dicing, and in particular to splitting the wafer and causing cracks at the dicing site. The integrated circuit damage caused by the dicing cracks. The continuous processing of low-power lasers generates processing grooves to limit cutting. Crack range.
在完成半導體元件加工後，接續將半導體晶圓之表面形成格子狀之晶圓分割預定線劃分出多個複數區域，再將各區域沿著晶圓分割預定線做出分割，藉此製造各別之半導體元件。 After the semiconductor device is processed, the surface of the semiconductor wafer is successively formed into a grid-shaped wafer dividing line to divide into a plurality of areas, and then each area is divided along the wafer dividing line to make each The semiconductor components.
在近年來的製程，由於製品傾向微型化，一般由雷射加工方式來分割晶粒，將表面各區域沿著晶圓分割預定線做出分割，使晶粒從晶圓中分割出來。 In recent years, due to the tendency of miniaturization of products, the dies are generally divided by laser processing, and each area on the surface is divided along the predetermined line of wafer dividing, so that the dies are divided from the wafer.
以下關於晶圓切割之文獻，多個專利如下： The following documents on wafer cutting, multiple patents are as follows:
US 61/267,194揭示一種雷射剝離系統及方法，其可用於藉由以下方式來提供整體式雷射剝離並使裂紋最小：減小一或多個光束點在一或多個維度上之大小以減小羽煙壓力(plume pressure)、同時維持足夠之能量以達成分離。藉由照射具有各種形狀及呈各種圖案之照射區，該等雷射剝離系統及方法可更有效地利用雷射能、減少在層分離時之裂紋並提高生產率。本文所述之某些雷射剝離系統及方法藉由照射使雷射剝離區(lift off zone；LOZ)延伸超出照射區之非鄰接照射區來分離各個材料層。本文所述 之其他雷射剝離系統及方法藉由對照射區進行成型及藉由以能避免工件被不均勻曝光之方式控制各照射區之交疊來分離各個材料層。根據至少一實施例，一種雷射剝離系統及方法可用於在一半導體晶圓之一基板上提供對一或多個磊晶層之整體式剝離。 US 61/267,194 discloses a laser stripping system and method, which can be used to provide integral laser stripping and minimize cracks by reducing the size of one or more beam spots in one or more dimensions to Reduce plume pressure while maintaining enough energy to achieve separation. By irradiating irradiated areas with various shapes and patterns, these laser stripping systems and methods can more effectively use laser energy, reduce cracks during layer separation, and improve productivity. Certain laser lift-off systems and methods described herein separate individual material layers by irradiating the lift off zone (LOZ) to extend the laser lift off zone (LOZ) beyond the non-adjacent irradiation zone of the irradiation zone. As described in this article Other laser stripping systems and methods separate each material layer by shaping the irradiation area and by controlling the overlap of each irradiation area in a way that prevents the workpiece from being unevenly exposed. According to at least one embodiment, a laser lift-off system and method can be used to provide integrated lift-off of one or more epitaxial layers on a substrate of a semiconductor wafer.
JP2013-193200揭示一種即使在晶圓的背面貼附有具絕緣性之補強片的情況下，也可實施內部加工的晶圓之加工方法。解決手段為將在表面以複數條分割預定線形成格子狀同時在藉由複數條分割預定線所劃分的複數個區域中形成有裝置之晶圓，沿著分割預定線分割成一個個裝置的晶圓之加工方法，其包含，在晶圓表面貼附保護構件的保護構件貼附步驟、磨削晶圓的背面以形成預定厚度的背面磨削步驟、從晶圓的背面側將對晶圓具有穿透性之波長的雷射光線在內部定位聚光點以沿著分割預定線進行照射，進而沿著分割預定線在晶圓內部形成改質層的改質層形成步驟、在晶圓的背面裝設具備絕緣機能之補強片的補強片裝設步驟、加熱補強片以使補強片固化之補強片加熱步驟、將切割膠帶貼附在裝設於晶圓之背面之已固化的補強片上，並將切割膠帶的外周部裝設於環狀框架上的晶圓支撐步驟，以及賦予晶圓外力而將晶圓分割成一個個裝置，同時沿著一個個裝置讓補強片斷裂的分割步驟。 JP2013-193200 discloses a method for processing a wafer that can be internally processed even when an insulating reinforcing sheet is attached to the back of the wafer. The solution is to form a grid on the surface with a plurality of predetermined dividing lines while forming a wafer with devices formed in a plurality of regions divided by the plurality of predetermined dividing lines, and divide the wafers into individual devices along the predetermined dividing lines. The round processing method includes a protective member attaching step of attaching a protective member to the surface of a wafer, a back grinding step of grinding the back of the wafer to form a predetermined thickness, and a back surface of the wafer from the back side of the wafer. The laser light of the penetrating wavelength is positioned inside the condensing point to be irradiated along the planned dividing line, and then forming the reforming layer inside the wafer along the planned dividing line. Reinforcement sheet installation step for installing a reinforcement sheet with insulation function, a reinforcement sheet heating step for heating the reinforcement sheet to solidify the reinforcement sheet, attaching dicing tape to the cured reinforcement sheet installed on the back of the wafer, and The wafer support step of mounting the outer peripheral portion of the dicing tape on the ring frame, and the dividing step of applying external force to the wafer to divide the wafer into individual devices, while breaking the reinforcing sheet along the individual devices.
TW I603391揭示一種半導體晶片之雷射切割方法，其其包括有以下步驟：步驟一，提供一半導體晶片，該半導體晶片具有包括：設有複數個電路元件之一正面、以及一背面，並將該半導體晶片加以翻轉使該背面朝上且該正面朝下；步驟二，於一膠帶基材膜上塗佈有一膠層，並將該半導體晶片之該正面貼附於該膠層上，並對該膠層加熱使該膠層填充 於該膠帶基材膜與該半導體晶片間之空隙中；以及，步驟三，藉由一雷射切割器於該半導體晶片之該背面且位於各別之該電路元件之間所預設之一雷射切割道上進行雷射全切穿切割，以形成複數個具有該電路元件之晶粒。 TW I603391 discloses a laser cutting method for semiconductor wafers, which includes the following steps: step one, providing a semiconductor wafer having a front surface and a back surface provided with a plurality of circuit elements, and The semiconductor chip is turned over so that the back side faces up and the front side faces down; step two, apply an adhesive layer on a tape base film, and attach the front side of the semiconductor chip to the adhesive layer, and The glue layer is heated to fill the glue layer In the gap between the tape base film and the semiconductor chip; and, in step three, a laser is preset on the back of the semiconductor chip and located between the respective circuit elements by a laser cutter The laser full cut through cutting is performed on the shot cutting path to form a plurality of dies with the circuit element.
然而，此業內人士一般所知，在半導體元件製造過程中是依據在矽等基板之表面之積層有絕緣膜與功能膜之功能層，而複數之IC、LSI等元件構成矩陣狀之半導體晶圓；且，半導體晶圓是由稱作切割道之分割預定線而將上述元件劃分，藉由沿著該切割道進行分割而製造出個別之半導體元件。在雷射加工於元件劃分時，該晶圓之切割道上，必然產生裂紋於切割道兩側，且半導體之多層結構，易使各層質密度不一，進而使雷射加工產生之熱應力產生之裂紋更加嚴重。 However, it is generally known in the industry that the semiconductor device manufacturing process is based on the functional layer of insulating film and functional film laminated on the surface of a silicon substrate, and a plurality of IC, LSI and other components constitute a matrix-shaped semiconductor wafer ; And, the semiconductor wafer is divided by a predetermined dividing line called a dicing lane to divide the above-mentioned components, and individual semiconductor components are manufactured by dividing along the dicing lane. When laser processing is used to divide components, cracks will inevitably occur on both sides of the dicing path on the wafer, and the multilayer structure of semiconductors is likely to cause the density of each layer to be different, which will cause thermal stress generated by laser processing. The cracks are more serious.
請參閱第1a圖所示，一晶圓(10)具有一第一積體電路結構(14)及一第二積體電路結構(15)等積體電路成品，在晶圓(10)表面上定義一晶圓分割線(11)；由雷射加工該晶圓分割線(11)後如第1b圖呈現(此圖為加工至基板上之積層)，於該晶圓分割線(11)兩側產生不規則裂紋，而該些不規則裂紋鄰近第一積體電路結構(14)及第二積體電路結構(15)等積體電路成品；當以第一積體電路結構(14)及第二積體電路結構(15)為製品元件時，容易產生電性連結不穩定現象，而在晶圓(10)表面呈現如第1c圖所示之不規則裂紋。 Please refer to Figure 1a, a wafer (10) has a first integrated circuit structure (14) and a second integrated circuit structure (15) and other integrated circuit products, on the surface of the wafer (10) Define a wafer dicing line (11); the wafer dicing line (11) is processed by a laser, as shown in Figure 1b (this figure is the build-up layer processed on the substrate), and the wafer dicing line (11) Irregular cracks are generated on the side, and these irregular cracks are adjacent to the first integrated circuit structure (14) and the second integrated circuit structure (15) and other integrated circuit products; when the first integrated circuit structure (14) and When the second integrated circuit structure (15) is a product component, the electrical connection is likely to be unstable, and the surface of the wafer (10) shows irregular cracks as shown in Figure 1c.
因此，為解決以上問題，本發明之主要目的係在提供一種抑制缺陷的開槽方式，以改善上述問題。 Therefore, in order to solve the above problems, the main purpose of the present invention is to provide a slotting method that suppresses defects so as to improve the above problems.
有鑑於以上問題本發明係提供一種抑制缺陷的開槽方式，係 以連續加工凹槽來使雷射加工產生之裂紋限制在範圍內。 In view of the above problems, the present invention provides a slotting method that suppresses defects. Continuously process grooves to limit the cracks generated by laser processing within the range.
因此，本發明之主要目的係在提供一種抑制缺陷的開槽方式，藉由連續加工凹槽產生之分隔，達成晶圓加工良率提高之目的。 Therefore, the main purpose of the present invention is to provide a grooving method that suppresses defects, and achieves the purpose of improving the wafer processing yield by continuously processing the grooves generated by the separation.
本發明之再一目的係在提供一種抑制缺陷的開槽方式，經由加工凹槽產生雷射加工熱影響區，進一步先行釋放雷射加工產生之熱應力裂紋。 Another object of the present invention is to provide a grooving method that suppresses defects, generates laser processing heat-affected zones through processing grooves, and further releases thermal stress cracks generated by laser processing in advance.
本發明之再一目的係在提供一種抑制缺陷的開槽方式，利用多次雷射加工來產生連接之加工凹槽，可避免多層結構產生熱應力殘留。 Another object of the present invention is to provide a grooving method for suppressing defects, which uses multiple laser processing to generate connected processing grooves, which can avoid residual thermal stress in the multilayer structure.
本發明之再一目的係在提供一種抑制缺陷的開槽方式，選擇性使用在積體電路密度高的區域，可提升良率及減少成本。 Another object of the present invention is to provide a slotting method that suppresses defects, which can be selectively used in areas with high integrated circuit density, which can improve yield and reduce costs.
為達成上述目的，本發明所使用的主要技術手段是採用以下技術方案來實現的。本發明為一種抑制缺陷的開槽方式，其係為晶圓分割流程，其包括；步驟1：由一晶圓之一晶圓分割線一側定義一第一加工線；步驟2：以一低功率雷射在該第一加工線之一加工位置實行雷射加工，雷射加工在該加工位置產生一加工凹槽及一雷射加工熱影響區，接續以該低功率雷射在該加工位置之不同深度再實行雷射加工，直至該加工凹槽深度符合預定；步驟3：接著以該低功率雷射依序在該第一加工線之複數接續加工位置實行雷射加工，直至該第一加工線完成加工；步驟4：再由加工切斷該晶圓分割線。 In order to achieve the above objective, the main technical means used in the present invention are achieved by the following technical solutions. The present invention is a grooving method for suppressing defects, which is a wafer dicing process, which includes: Step 1: Define a first processing line from one side of a wafer dicing line of a wafer; Step 2: Use a low The power laser performs laser processing at a processing position of the first processing line, and the laser processing produces a processing groove and a laser processing heat-affected zone at the processing position, and then the low-power laser is applied to the processing position Laser processing is performed at different depths until the processing groove depth meets the predetermined; Step 3: Then the low-power laser is used to sequentially perform laser processing at the multiple consecutive processing positions of the first processing line until the first processing line The processing line completes the processing; Step 4: The wafer dividing line is then cut off by processing.
本發明的目的及解決其技術問題還可採用以下技術措施步驟進一步實現。 The purpose of the present invention and the solution of its technical problems can be further achieved by adopting the following technical measures.
前述的方法，其中步驟1同時，該晶圓之一晶圓分割線另一 側定義一第二加工線。 In the foregoing method, in step 1, at the same time, one of the wafers and the other The side defines a second processing line.
前述的方法，其中步驟3之後，以該低功率雷射在該第二加工線之一加工位置實行雷射加工，雷射加工在該加工位置產生一加工凹槽及一雷射加工熱影響區，接續以該低功率雷射在該加工位置再實行雷射加工，直至該加工凹槽深度符合預定。
In the foregoing method, after
前述的方法，接著以該低功率雷射依序在該第二加工線之複數接續加工位置實行雷射加工，直至該第二加工線完成加工。 In the foregoing method, the low-power laser is then used to sequentially perform laser processing on the plurality of consecutive processing positions of the second processing line until the second processing line completes processing.
前述的方法，其中部份該雷射加工熱影響區由該低功率雷射在該加工位置之接續實行雷射加工過程中氣化。 In the aforementioned method, a part of the heat-affected zone of the laser processing is vaporized by the low-power laser during the subsequent laser processing of the processing position.
前述的方法，其中步驟4之加工切斷該晶圓分割線係指由高功率雷射快速切斷該晶圓分割線。 In the foregoing method, the processing and cutting of the wafer dicing line in step 4 refers to the rapid cutting of the wafer dicing line by a high-power laser.
前述的方法，其中步驟4之加工切斷該晶圓分割線係指鑽石切割設備快速切斷該晶圓分割線。 In the foregoing method, the processing and cutting of the wafer dicing line in step 4 means that the diamond cutting equipment quickly cuts the wafer dicing line.
前述的方法，其中該加工位置與該些接續加工位置，各位置間無重疊。 In the aforementioned method, there is no overlap between the processing position and the consecutive processing positions.
前述的方法，其中該加工位置與該些接續加工位置產生之各加工凹槽間為相互重疊。 In the aforementioned method, the processing position and the processing grooves generated by the consecutive processing positions overlap each other.
前述的方法，其中該低功率雷射可同時發射三發。 In the aforementioned method, the low-power laser can emit three shots simultaneously.
相較於習知技術，本發明具有功效在於：(1)以連續加工凹槽產生之分隔，達成晶圓加工良率提高之目的；(2)經由加工凹槽產生雷射加工熱影響區，進一步先行釋放雷射加工產生之熱應力裂紋；(3)選擇性使用在積體電路密度高的區域，可提升良率及減少成本。 Compared with the conventional technology, the present invention has the following effects: (1) The separation produced by the continuous processing grooves is used to achieve the purpose of improving the wafer processing yield; (2) The laser processing heat-affected zone is generated by processing the grooves, Further release the thermal stress cracks caused by laser processing in advance; (3) Selective use in areas with high integrated circuit density can increase yield and reduce costs.
10‧‧‧晶圓 10‧‧‧ Wafer
11‧‧‧晶圓分割線 11‧‧‧Wafer dividing line
12‧‧‧第一加工線 12‧‧‧The first processing line
121‧‧‧加工位置 121‧‧‧Processing position
121`‧‧‧加工位置 121`‧‧‧Processing position
122‧‧‧加工凹槽 122‧‧‧Machining groove
122’‧‧‧加工凹槽 122’‧‧‧Machining groove
123‧‧‧雷射加工熱影響區 123‧‧‧Heat Affected Zone of Laser Processing
13‧‧‧第二加工線 13‧‧‧Second processing line
131‧‧‧加工位置 131‧‧‧Processing position
131`‧‧‧加工位置 131`‧‧‧Processing position
132‧‧‧加工凹槽 132‧‧‧Machining groove
133‧‧‧雷射加工熱影響區 133‧‧‧Heat Affected Zone of Laser Processing
14‧‧‧第一積體電路結構 14‧‧‧The first integrated circuit structure
15‧‧‧第二積體電路結構 15‧‧‧Second integrated circuit structure
21‧‧‧步驟1 21‧‧‧Step 1
21a‧‧‧步驟1a 21a‧‧‧Step 1a
22‧‧‧步驟2 22‧‧‧Step 2
23‧‧‧步驟3
23‧‧‧
23a‧‧‧步驟3a 23a‧‧‧Step 3a
23b‧‧‧步驟3b 23b‧‧‧Step 3b
24‧‧‧步驟4 24‧‧‧Step 4
第1a圖：為先前技術之晶圓俯視圖。 Figure 1a: It is a top view of a wafer of the prior art.
第1b圖：為先前技術之晶圓切割後之剖面圖。 Figure 1b: is a cross-sectional view of the prior art wafer after dicing.
第1c圖：為先前技術之晶圓切割後之俯視圖。 Figure 1c: It is a top view of the prior art wafer after dicing.
第2a圖：為本發明第一實施型態之晶圓之第一俯視圖。 Figure 2a: is the first top view of the wafer in the first embodiment of the present invention.
第2b圖：為本發明第一實施型態之第一加工線與加工位置之示意圖。 Figure 2b: is a schematic diagram of the first processing line and processing position of the first embodiment of the present invention.
第2c圖：為本發明第一實施型態之第一加工線之加工凹槽示意圖。 Figure 2c: is a schematic diagram of the processing groove of the first processing line of the first embodiment of the present invention.
第2d圖：為本發明第一實施型態之第一加工線之加工凹槽與雷射加工熱影響區示意圖。 Figure 2d: is a schematic diagram of the processing groove and the laser processing heat-affected zone of the first processing line of the first embodiment of the present invention.
第2e圖：為本發明第一實施型態之第一加工線之加工凹槽未完全斷裂示意圖。 Figure 2e: is a schematic view of the processing groove of the first processing line of the first embodiment of the present invention not being completely broken.
第3a圖：為本發明最佳實施型態之第一加工線之加工凹槽之第一剖面圖。 Figure 3a: is the first cross-sectional view of the processing groove of the first processing line of the best embodiment of the present invention.
第3b圖：為本發明最佳實施型態之第一加工線之加工凹槽之第二剖面圖。 Figure 3b: is the second cross-sectional view of the processing groove of the first processing line of the best embodiment of the present invention.
第3c圖：為本發明最佳實施型態之第一加工線之加工凹槽之第三剖面圖。 Figure 3c: is the third cross-sectional view of the processing groove of the first processing line of the best embodiment of the present invention.
第3d圖：為本發明最佳實施型態之雷射加工後之晶圓分割線之第一剖面圖。 Figure 3d: is the first cross-sectional view of the wafer dicing line after laser processing in the preferred embodiment of the present invention.
第3e圖：為本發明最佳實施型態之雷射加工後之晶圓分割線 之第二剖面圖。 Figure 3e: Wafer dicing line after laser processing in the best embodiment of the invention The second cross-sectional view.
第4a圖：為本發明第二實施型態之晶圓之第二俯視圖。 Figure 4a: is a second top view of the wafer in the second embodiment of the present invention.
第4b圖：為本發明第二實施型態之第二加工線與加工位置之示意圖。 Figure 4b: is a schematic diagram of the second processing line and processing position of the second embodiment of the present invention.
第4c圖：為本發明第二實施型態之第二加工線之加工凹槽示意圖。 Fig. 4c is a schematic diagram of the processing groove of the second processing line of the second embodiment of the present invention.
第4d圖：為本發明第二實施型態之第二加工線之加工凹槽與雷射加工熱影響區示意圖。 Figure 4d: is a schematic diagram of the processing groove and the laser processing heat-affected zone of the second processing line of the second embodiment of the present invention.
第4e圖：為本發明第二實施型態之雷射加工後之晶圓分割線之第三剖面圖。 Figure 4e: is a third cross-sectional view of the wafer dividing line after laser processing in the second embodiment of the present invention.
第5a圖：為本發明第一實施型態之流程圖。 Figure 5a: is a flowchart of the first embodiment of the present invention.
第5b圖：為本發明第二實施型態之流程圖。 Figure 5b: is a flowchart of the second embodiment of the present invention.
為了讓本發明之目的、特徵與功效更明顯易懂，以下特別列舉本發明之第一實施型態： In order to make the purpose, features and effects of the present invention more comprehensible, the following specifically lists the first embodiment of the present invention:
首先，參考第5a圖所示之流程圖，其由步驟1(21)、步驟2(22)、步驟3(23)與步驟4(24)所構成。 First, refer to the flowchart shown in Figure 5a, which consists of step 1 (21), step 2 (22), step 3 (23), and step 4 (24).
其中，見第2a及5a圖所示，該步驟1(21)係為由一晶圓(10)之一晶圓分割線(11)一側定義一第一加工線(12) Among them, as shown in Figures 2a and 5a, this step 1 (21) is to define a first processing line (12) from one side of a wafer (10) and a wafer dividing line (11)
通俗解釋，晶圓(10)是指矽半導體積體電路製作所用的矽晶片，在本案圖中晶圓(10)呈現者為矽晶片上之積層，實務上也可包含矽晶片部份；另，晶圓分割線(11)係指將加工於晶圓(10)之規劃線， 藉由沿著晶圓分割線(11)產生切割道進行分割而製造出個別之半導體元件；其，該第一加工線(12)是與晶圓分割線(11)平行線段，並提供加工位置(121)定位之用。 In layman's terms, wafer (10) refers to the silicon chip used in the production of silicon semiconductor integrated circuits. In this case, wafer (10) is presented as a build-up on the silicon chip. In practice, it can also include the silicon chip part; , The wafer dividing line (11) refers to the planning line that will be processed on the wafer (10), Individual semiconductor components are manufactured by dividing the dicing line along the wafer dividing line (11); the first processing line (12) is a line segment parallel to the wafer dividing line (11), and the processing position is provided (121) For positioning purposes.
其中，見第2b、3a及5a圖所示，該步驟2(22)係以一低功率雷射在該第一加工線(12)之一加工位置(121)實行雷射加工，雷射加工在該加工位置(121)產生一加工凹槽(122)及一雷射加工熱影響區(123)，接續以該低功率雷射在該加工位置(121)之不同深度再實行雷射加工，直至該加工凹槽(122)深度符合預定。 Among them, as shown in Figures 2b, 3a and 5a, this step 2 (22) is to use a low-power laser to perform laser processing at one of the processing positions (121) of the first processing line (12). A processing groove (122) and a laser processing heat-affected zone (123) are generated at the processing position (121), and then the low-power laser is used for laser processing at different depths of the processing position (121), Until the depth of the processing groove (122) meets the predetermined.
一般來說，首先必須解釋『雷射加工』，雷射加工是利用雷射光的高強度、高平行度的特徵以聚焦鏡等光學裝置將之聚為功率密度達103~109瓦/平方公分的光點後，在工件的表面產生局部的加熱熔化、氣化等熱效應而達到加工的目的。由於從光能轉換成熱能的時間非常短，加上功率密度相當高，在單位時間、單位面積內提供極高的光能，使得材料的表面在瞬間內便可獲得大量的熱能。此種使材料表面升溫的速度一般可達每秒數千度，在雷射加工的過程極容易發生『液體/氣體』或『固體/氣體』的混合模式；其，低功率雷射係指超高速及較低能量之脈衝雷射(Pulsed Laser)，譬如皮秒雷射等，相對較高能量的雷射加工常因熱能改變材料及無法達成細緻化加工，一個理想的工業級皮秒雷射源應該產生10~50μJ範圍之脈衝能量及大約1MHz的重複頻率(repetition rate)，較佳者可利用爆發模式(burst mode)達成數個皮秒脈衝可以顯著改進剝除率和微加工質量，爆發模式(burst mode)定義是指利用奈秒時間區間內迅速連續發生脈衝，相對在一個較長的間隔時間(例如奈秒時間)將不會產生增加去除率的同樣效果， 而本案例舉為連續三發；該加工位置(121)係指低功率雷射對焦施以加工之平面位置，可見第2b圖所示該加工位置(121)與接續加工位置(121`)，各位置間無重疊；而，加工凹槽(122)係為雷射加工於晶圓(10)在該加工位置(121)產生者，其可見第3a圖呈現，其作用為減少加工切斷該晶圓分割線(11)時裂紋衍生超過加工凹槽(122)，以避免半導體元件受到影響；該雷射加工熱影響區(123)係為雷射加工於晶圓(10)在該加工位置(121)周遭產生者，其本質為因加工凹槽(122)氣化擠壓周圍，導致加工凹槽(122)周遭呈現龜裂之區域。 Generally speaking, "laser processing" must be explained first. Laser processing uses the high-intensity and high parallelism of laser light to converge it to a power density of 103~109 watts/cm² by focusing lens and other optical devices. After the light spot, local heating, melting, vaporization and other thermal effects are generated on the surface of the workpiece to achieve the purpose of processing. Because the time to convert light energy into heat energy is very short, and the power density is quite high, it provides extremely high light energy per unit time and unit area, so that the surface of the material can obtain a large amount of heat energy in an instant. The speed of heating the surface of the material can generally reach thousands of degrees per second, and the mixed mode of "liquid/gas" or "solid/gas" is prone to occur in the process of laser processing; the low-power laser means super High-speed and low-energy Pulsed Lasers, such as picosecond lasers. Relatively high-energy laser processing often changes materials due to thermal energy and cannot achieve detailed processing. An ideal industrial-grade picosecond laser The source should generate pulse energy in the range of 10~50μJ and a repetition rate of about 1MHz. The better one can use the burst mode to achieve several picosecond pulses, which can significantly improve the stripping rate and the quality of micro-processing. The definition of burst mode refers to the rapid and continuous generation of pulses in the nanosecond time interval. Compared with a longer interval time (such as nanosecond time), the same effect of increasing the removal rate will not be produced. In this case, there are three consecutive shots; the processing position (121) refers to the plane position where the low-power laser focus is processed. It can be seen that the processing position (121) and the continuous processing position (121`) shown in Figure 2b, There is no overlap between the positions; and the processing groove (122) is produced by the laser processing on the wafer (10) at the processing position (121), which can be seen in Figure 3a, and its function is to reduce the processing and cutting of the When the wafer dicing line (11), cracks derive beyond the processing groove (122) to prevent semiconductor components from being affected; the laser processing heat affected zone (123) is laser processing on the wafer (10) at the processing position (121) The surrounding area is essentially due to the gasification and extrusion of the processed groove (122), resulting in a cracked area around the processed groove (122).
呈上，接續以該低功率雷射在該加工位置(121)之不同深度再實行雷射加工，直至該加工凹槽(122)深度符合預定；其中可先參閱第3a、3b及3c圖，可見部份該雷射加工熱影響區(123)由該低功率雷射在該加工位置(131)之接續實行雷射加工過程中氣化。 As shown above, continue to perform laser processing at different depths of the processing position (121) with the low-power laser until the depth of the processing groove (122) meets the preset; among them, please refer to Figures 3a, 3b and 3c. It can be seen that part of the laser processing heat-affected zone (123) is vaporized by the low-power laser during the subsequent laser processing of the processing position (131).
其中，見第2c、2d及5a圖所示，該步驟3(23)係接著以該低功率雷射依序在該第一加工線(12)之複數接續加工位置(121,121`)實行雷射加工，直至該第一加工線(12)完成加工。 Among them, as shown in Figures 2c, 2d, and 5a, the step 3 (23) is followed by the low-power laser in sequence at the multiple consecutive processing positions (121, 121`) of the first processing line (12). Processing until the first processing line (12) completes processing.
大體情況，依序在該第一加工線(12)之複數接續加工位置(121,121`)實行與步驟2(22)相同之雷射加工達成直至該加工凹槽(122)深度符合預定；其中，見第2c圖呈現該加工位置(121)與該些接續加工位置(121)產生之各加工凹槽(122)間為相互重疊(底部殘餘的雷射加工熱影響區(123)也相互重疊，可參考第2d圖)；當該第一加工線(12)之加工位置(121,121`)皆完成加工，可見如第2c圖表示之加工凹槽(122)；另，可再參考第2e圖呈現加工凹槽(122)與加工凹槽(122’)實質上未完 全接合，因此可能雷射加工能量及加工材料等因數，影響各加工凹槽(122,122’)間的接合狀態。 Generally speaking, the same laser processing as in step 2 (22) is carried out at the multiple consecutive processing positions (121, 121`) of the first processing line (12) in order until the depth of the processing groove (122) meets the predetermined; Figure 2c shows that the processing position (121) and the processing grooves (122) generated by the consecutive processing positions (121) overlap each other (the remaining laser processing heat affected zone (123) at the bottom also overlaps each other, Refer to Figure 2d); when the processing positions (121, 121`) of the first processing line (12) are all processed, you can see the processing groove (122) shown in Figure 2c; in addition, you can refer to Figure 2e again Machining groove (122) and processing groove (122') are essentially unfinished Fully bonded, so that factors such as laser processing energy and processing materials may affect the bonding state between the processed grooves (122, 122').
最後，見第3e及5a圖所示，該步驟4(24)係再由加工切斷該晶圓分割線(11)。 Finally, as shown in Figures 3e and 5a, the step 4 (24) is to cut the wafer dividing line (11) by processing.
具體而言，加工切斷該晶圓(10)分割線係指由高功率雷射快速切斷該晶圓分割線(11)；或，加工切斷該晶圓(10)分割線係指鑽石切割設備快速切斷該晶圓分割線(11)。 Specifically, processing and cutting the wafer (10) division line refers to the rapid cutting of the wafer division line (11) by a high-power laser; or, processing and cutting the wafer (10) division line refers to diamond The cutting device quickly cuts the wafer dividing line (11).
以下就以本發明一種抑制缺陷的開槽方式之第一實施型態為例，針對本發明的實施過程做一詳細的說明如下所示。 Hereinafter, taking the first embodiment of a slotting method for suppressing defects of the present invention as an example, a detailed description of the implementation process of the present invention is as follows.
先參閱第2a圖所示，首先確定切割一晶圓(10)所需之一晶圓分割線(11)所在；再，參考第2a、2b圖所示，在第一積體電路結構(14)與晶圓分割線(11)間定義一第一加工線(12)，而晶圓分割線(11)與第一加工線(12)之間為加工可損失區域。 First, referring to Figure 2a, first determine the location of a wafer dividing line (11) required for cutting a wafer (10); then, referring to Figures 2a and 2b, in the first integrated circuit structure (14) A first processing line (12) is defined between the wafer dividing line (11) and the wafer dividing line (11) and the first processing line (12) is a processing lossable area.
接著，由於晶圓(10)係由多層結構所構成，當掃描定位該第一加工線(12)之一加工位置(121)完成後，雷射打穿該晶圓(10)也可連續多發雷射來製作該加工凹槽(122)，而雷射加工目前建議為皮秒雷射，利用15皮秒(ps,picosecond)以下之雷射脈寬短，光能越不會向周遭擴散，減少對加工區外的干擾，而連續多發雷射之間時間差在數十個皮秒(ps,picosecond)至數十個納秒(ns,nanoseconds)間；先參考第3a圖表示，由雷射加工於晶圓(10)之該加工位置(121)上，開始產生一加工凹槽(122)及周遭的雷射加工熱影響區(123)，此時雷射加工於第一積體電路結構(14)上方位置；跟著，參考第3b圖表示，由雷射加工於晶圓(10)之加工凹槽 (122)持續雷射加工，使加工凹槽(122)及周遭的雷射加工熱影響區(123)延續往下延伸，同時部份該雷射加工熱影響區(123)由該低功率雷射在該加工位置(131)之接續實行雷射加工過程中氣化；又，參考第3c圖表示，由雷射加工於晶圓(10)之加工凹槽(122)持續雷射加工，使加工凹槽(122)及周遭殘餘的雷射加工熱影響區(123)延伸致晶圓另一表面；實務上來說，當掃描定位加工凹槽(122)完成後，雷射加工中，該晶圓(10)係由平台(XY TABLE)帶動，然而平台帶動的速度(1m/s)相對雷射加工的速度(ns等級)，對雷射加工並無影響。 Then, since the wafer (10) is composed of a multi-layer structure, after scanning and positioning one of the processing positions (121) of the first processing line (12), the laser can penetrate the wafer (10) continuously. Laser is used to make the processing groove (122), and the laser processing is currently recommended as picosecond laser. Using the laser pulse width below 15 picoseconds (ps, picosecond), the light energy will not diffuse to the surroundings. Reduce the interference to the outside of the processing area, and the time difference between consecutive multiple lasers is between tens of picoseconds (ps, picosecond) to tens of nanoseconds (ns, nanoseconds); first refer to Figure 3a, which is represented by the laser Processed on the processing position (121) of the wafer (10), a processing groove (122) and the surrounding laser processing heat-affected zone (123) begin to be generated. At this time, the laser processing is in the first integrated circuit structure (14)Upper position; follow, refer to Figure 3b, which is processed by laser in the processing groove of wafer (10) (122) Continuous laser processing, so that the processing groove (122) and the surrounding laser processing heat-affected zone (123) continue to extend downward, and part of the laser processing heat-affected zone (123) is controlled by the low-power laser It vaporizes during laser processing at the processing position (131). In addition, referring to Figure 3c, the processing groove (122) of the wafer (10) is processed by the laser to continue laser processing, so that The processing groove (122) and the remaining laser processing heat-affected zone (123) around it extend to the other surface of the wafer; in practice, when the processing groove (122) is scanned and positioned, the laser processing The circle (10) is driven by the platform (XY TABLE), but the speed of the platform (1m/s) is relative to the speed of laser processing (ns level), which has no effect on laser processing.
從第2c圖表示，雷射沿著該第一加工線(12)之一端開始至另一端結束，依序在該第一加工線(12)之複數接續加工位置(121,121`)執行雷射加工達成直至該加工凹槽(122)深度符合預定，如第2c圖呈現該加工位置(121)與該些接續加工位置(121)產生之各加工凹槽(122)間為相互重疊，又見第2d圖底部殘餘的雷射加工熱影響區(123)也相互重疊；該些第一隔離孔(1211)呈現於第2d圖所示，而加工凹槽(122)及周遭的雷射加工熱影響區(123)剖面狀態如第3c圖。 As shown in Figure 2c, the laser starts from one end of the first processing line (12) to the other end, and executes the laser processing in the multiple consecutive processing positions (121, 121`) of the first processing line (12) in sequence Achieve until the depth of the processing groove (122) meets the preset, as shown in Figure 2c, the processing position (121) and the processing grooves (122) generated by the consecutive processing positions (121) overlap each other. See also The remaining laser processing heat-affected zones (123) at the bottom of Figure 2d also overlap each other; the first isolation holes (1211) appear as shown in Figure 2d, and the processing grooves (122) and the surrounding laser processing heat affect The section state of area (123) is shown in Figure 3c.
最後，見第3e及5a圖所示，由高功率雷射快速切斷加工切斷該晶圓分割線(11)。 Finally, as shown in Figures 3e and 5a, the wafer dicing line (11) is cut by a high-power laser rapid cutting process.
由以上已完成本發明之抑制缺陷的開槽方式之第一實施型態，最後可以參閱第3d圖，雷射沿著該晶圓分割線(11)之一端開始至另一端結束，切割該晶圓(10)，可見雷射加工之該晶圓分割線(11)產生裂紋與第一積體電路結構(14)間由加工凹槽(122)及周遭的殘餘雷射加工熱影響區(123)隔離開，此時第一積體電路結構(14)良率必然提高；亦 能如第3e圖表示，另一晶圓分割線(11)位於第二積體電路結構(15)另一側，此時第二積體電路結構(15)另一側無其他半導體元件，可見雷射加工之另一晶圓分割線(11)產生裂紋與第二積體電路結構(15)間由加工凹槽(122)及周遭的殘餘雷射加工熱影響區(123)隔離開。 From the above, the first embodiment of the grooving method for suppressing defects of the present invention has been completed. Finally, referring to Figure 3d, the laser starts from one end to the other end of the wafer dividing line (11) to cut the wafer Circle (10), it can be seen that there is a crack in the wafer dividing line (11) of the laser processing and the first integrated circuit structure (14) by the processing groove (122) and the surrounding residual laser processing heat-affected zone (123) ) Isolation, at this time the first integrated circuit structure (14) yield rate will definitely increase; also As shown in Fig. 3e, another wafer dividing line (11) is located on the other side of the second integrated circuit structure (15). At this time, there are no other semiconductor components on the other side of the second integrated circuit structure (15). Another wafer split line (11) produced by laser processing is separated from the second integrated circuit structure (15) by the processing groove (122) and the surrounding residual laser processing heat affected zone (123).
如第4a、4b、4c、4d、4e及5b圖所示，為本發明一種抑制缺陷的開槽方式之第二實施型態；在第一實施型態與第2a、2b、2c、2d、3a、3b、3c、3d、3e及5b圖中已說明的特徵與第4a、4b、4c、4d、4e及5b圖相同者，於第4a、4b、4c、4d、4e及5b圖的符號標示或省略不再贅述。第二實施型態與第一實施型態的主要方法差異在於第二實施型態之第5b圖與第一實施型態之第5a圖比較增加步驟1a(21a)、步驟3a(23a)及步驟3b(23b)。 As shown in Figures 4a, 4b, 4c, 4d, 4e, and 5b, it is the second embodiment of a slotting method for suppressing defects of the present invention; in the first embodiment and the second embodiment of 2a, 2b, 2c, 2d, The features described in figures 3a, 3b, 3c, 3d, 3e and 5b are the same as those in figures 4a, 4b, 4c, 4d, 4e and 5b, and the symbols in figures 4a, 4b, 4c, 4d, 4e and 5b The mark or omission will not be repeated. The main method difference between the second embodiment and the first embodiment is that step 1a (21a), step 3a (23a) and step are added in comparison between Figure 5b of the second embodiment and Figure 5a of the first embodiment. 3b(23b).
首先，參考第5b圖所示之流程圖，其由步驟1(21)、步驟1a(21a)、步驟2(22)、步驟3(23)、步驟3a(23a)、步驟3b(23b)及步驟4(24)所構成。 First, refer to the flowchart shown in Figure 5b, which consists of step 1(21), step 1a(21a), step 2(22), step 3(23), step 3a(23a), step 3b(23b) and Step 4 (24) constitutes.
其中，見第4a及5b圖所示，該步驟1(21)係為由一晶圓(10)之一晶圓分割線(11)一側定義一第一加工線(12)；同時，實行步驟1a(21a)係為該晶圓(10)之一晶圓分割線(11)另一側定義一第二加工線(13)。 Among them, as shown in Figures 4a and 5b, this step 1 (21) is to define a first processing line (12) from one side of a wafer (10) and a wafer dividing line (11); at the same time, perform Step 1a (21a) is to define a second processing line (13) for the other side of a wafer dividing line (11) of the wafer (10).
其，該第二加工線(13)是與晶圓分割線(11)平行線段，並提供加工位置(131)定位之用。 Wherein, the second processing line (13) is a line segment parallel to the wafer dividing line (11) and is used for positioning the processing position (131).
其中，見第2b、3a及5b圖所示，該步驟2(22)係以一低功率雷射在該第一加工線(12)之一加工位置(121)實行雷射加工，雷射加工在該加工位置(121)產生一加工凹槽(122)及一雷射加工熱影響區(123)，接續以該低功率雷射在該加工位置(121)之不同深度再實行雷射 加工，直至該加工凹槽(122)深度符合預定；接著，見第2c、2d及5a圖所示，該步驟3(23)係接著以該低功率雷射依序在該第一加工線(12)之複數接續加工位置(121,121`)實行雷射加工，直至該第一加工線(12)完成加工。 Among them, as shown in Figures 2b, 3a and 5b, this step 2 (22) is to use a low-power laser to perform laser processing at one of the processing positions (121) of the first processing line (12). A processing groove (122) and a laser processing heat-affected zone (123) are generated at the processing position (121), and then the low-power laser is used to perform laser at different depths of the processing position (121) Process until the depth of the processed groove (122) meets the preset; then, as shown in Figures 2c, 2d, and 5a, step 3 (23) is followed by the low-power laser in the first processing line ( 12) Laser processing is carried out at the multiple consecutive processing positions (121, 121`) until the first processing line (12) is completed.
再，見第3a、4b及5b圖所示，該步驟3a(23a)係以該低功率雷射在該第二加工線(13)之一加工位置(131)實行雷射加工，雷射加工在該加工位置(131)產生一加工凹槽(132)及一雷射加工熱影響區(133)，接續以該低功率雷射在該加工位置(131)再實行雷射加工，直至該加工凹槽(132)深度符合預定；接著，見第4c、4d及5b圖所示，該步驟3b(23b)係接著以該低功率雷射依序在該第二加工線(13)之複數接續加工位置(131)實行雷射加工，直至該第二加工線(13)完成加工。 Again, referring to Figures 3a, 4b and 5b, the step 3a (23a) is to use the low-power laser to perform laser processing at one of the processing positions (131) of the second processing line (13). A processing groove (132) and a laser processing heat-affected zone (133) are generated at the processing position (131), and then the low-power laser is used to perform laser processing at the processing position (131) until the processing The depth of the groove (132) meets the predetermined; then, as shown in Figures 4c, 4d, and 5b, the step 3b (23b) is followed by the low-power laser in sequence on the second processing line (13). The processing position (131) performs laser processing until the second processing line (13) completes processing.
最後，見第4e及5b圖所示，由高功率雷射快速切斷加工切斷該晶圓分割線(11)。 Finally, as shown in Figures 4e and 5b, the wafer dicing line (11) is cut by a high-power laser rapid cutting process.
因此本發明之功效有別於一般開槽方法，此於半導切割當中實屬首創，符合發明專利要件，爰依法俱文提出申請。 Therefore, the effect of the present invention is different from the general grooving method. It is the first in semi-conducted cutting, and it meets the requirements of the invention patent.
惟，需再次重申，以上所述者僅為本發明之較佳實施型態，舉凡應用本發明說明書、申請專利範圍或圖式所為之等效變化，仍屬本發明所保護之技術範疇，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 However, it needs to be reiterated that the above are only the preferred implementation forms of the present invention. Any equivalent changes made by applying the specification, scope of patent application, or drawings of the present invention still belong to the technical scope protected by the present invention. Therefore, The protection scope of the present invention shall be subject to those defined by the attached patent application scope.
10‧‧‧晶圓 10‧‧‧ Wafer
11‧‧‧晶圓分割線 11‧‧‧Wafer dividing line
122‧‧‧加工凹槽 122‧‧‧Machining groove
123‧‧‧雷射加工熱影響區 123‧‧‧Heat Affected Zone of Laser Processing
14‧‧‧第一積體電路結構 14‧‧‧The first integrated circuit structure
15‧‧‧第二積體電路結構 15‧‧‧Second integrated circuit structure
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