TW201913241A - Alignment error compensation module, alignment error compensation calculating system, and lithography device subjecting the alignment machine to alignment correction compensation by utilizing the mis-alignment compensation parameter - Google Patents

Alignment error compensation module, alignment error compensation calculating system, and lithography device subjecting the alignment machine to alignment correction compensation by utilizing the mis-alignment compensation parameter Download PDF

Info

Publication number
TW201913241A
TW201913241A TW106131011A TW106131011A TW201913241A TW 201913241 A TW201913241 A TW 201913241A TW 106131011 A TW106131011 A TW 106131011A TW 106131011 A TW106131011 A TW 106131011A TW 201913241 A TW201913241 A TW 201913241A
Authority
TW
Taiwan
Prior art keywords
alignment
compensation
parameter
error
correction
Prior art date
Application number
TW106131011A
Other languages
Chinese (zh)
Inventor
王楨坤
Original Assignee
王楨坤
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 王楨坤 filed Critical 王楨坤
Priority to TW106131011A priority Critical patent/TW201913241A/en
Publication of TW201913241A publication Critical patent/TW201913241A/en

Links

Landscapes

  • Exposure And Positioning Against Photoresist Photosensitive Materials (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

This invention provides an alignment error compensation calculating system mainly used for a compensation parameter calculating process when an alignment machine proceeds the alignment correction of a semiconductor substrate. In addition to an alignment error value generated by a plurality of alignment symbols of the semiconductor substrate, at least one correction compensation error value generated by a user-defined location not generated by an alignment symbol of the semiconductor substrate is added. Meanwhile, a compensation parameter is calculated by utilizing the alignment error value and the at least one correction compensation error value to obtain a mis-alignment compensation parameter, and the alignment machine is subjected to alignment correction compensation by utilizing the mis-alignment compensation parameter, so that a better alignment compensation effect can be achieved. In addition, this invention further provides an alignment error compensation module for generating the mis-alignment compensation parameter and a lithography device including the alignment error compensation calculating system.

Description

對準誤差補償模組、對準誤差補償計算系統及微影裝置Alignment error compensation module, alignment error compensation calculation system and lithography device

本發明是有關於一種補償模組、補償系統及微影裝置,特別是指一種用於半導體製程的對準誤差補償模組、對準誤差補償計算系統及含有該對準誤差補償計算系統的微影裝置。The invention relates to a compensation module, a compensation system and a lithography device, in particular to an alignment error compensation module for a semiconductor process, an alignment error compensation calculation system and a micro system including the alignment error compensation calculation system. Shadow device.

半導體元件是利用在晶圓上以半導體製程技術反覆的定義而形成。在如此高度積層化的製程過程中,若其中一積層的定位偏移時,則後續各積層可能也會受到影響逐漸偏移,使得半導體元件層間的電性無法連結而失效或短路,因此,控制每一個製程的精密度及穩定性以準確的控制層與層間的疊對(overlay),則是在製程管理中相對重要的因素。Semiconductor components are formed using a definition that is repeated on a wafer by semiconductor process technology. In such a highly laminating process, if the positioning of one of the layers is shifted, the subsequent layers may be affected to be gradually shifted, so that the electrical properties between the layers of the semiconductor elements are not connected and fail or short-circuit. Therefore, control The precision and stability of each process to accurately control the overlay between layers and layers is a relatively important factor in process management.

而為了控制層間的疊對精準性,一般對準機台都會設置對準感測器,用於曝光前先偵測晶圓上特定區域的對準符號,進行對準的動作,之後,再利用當層對前層的對準符號所產生的疊對誤差值(mis-alignment)的結果運算,得到該對準機台的疊對補償參數值(mis-alignment/overlay compensation parameter),因此,之後若是該晶圓進行重工(rework)流程,會利用該疊對補償參數值校正該對準機台,以確保曝光過程當層的圖案可精確的與前層的圖案進行對準。In order to control the accuracy of stacking between layers, an alignment sensor is generally provided for the alignment machine, and the alignment symbol of a specific area on the wafer is detected before exposure, and the alignment action is performed, and then reused. When the layer operates on the result of the mis-alignment generated by the alignment symbols of the front layer, the mis-alignment/overlay compensation parameter of the alignment machine is obtained, and thus, If the wafer is subjected to a rework process, the alignment table is used to correct the alignment machine to ensure that the pattern of the layer can be accurately aligned with the pattern of the front layer during the exposure process.

但是,目前一般疊對補償值(mis-alignment/overlay compensation parameter)的計算都是利用事先定義於該半導基材上的對準符號,利用當層對前層的對位符號所產生的疊對誤差值(mis-alignment)的結果運算而得。然而,該等補償方式對非存在於該等對位符號的對位偏移位置,例如,當對位偏移是因為製程過程的應力(stress)影響而導致的前、後層對位偏移,而該偏移位置並非是對位符號的所在區域,導致當系統利用該等對位符號進行補值參數計算時並不會同時考量該位置的偏移,因此,縱使當系統對該半導體基材進行微影前的對準補償,最終仍會有特定位置無法滿足的對準偏移問題產生。另外,根據製程步驟特徵的影響,此特定位置可能是在每一片晶圓(by-wafer)或在每一個光罩定義曝光區(by-field)重覆出現。However, the current calculation of the mis-alignment/overlay compensation parameter is performed by using an alignment symbol defined in advance on the semiconductor substrate, using a stack generated by the alignment of the layer to the front layer. The result of the error-missing is calculated. However, the compensation modes are opposite to the alignment offset positions of the alignment symbols, for example, when the alignment offset is due to the stress of the process, the front and back alignment offsets And the offset position is not the region where the alignment symbol is located, so that when the system uses the alignment symbols to perform the complement parameter calculation, the offset of the position is not considered at the same time, and thus, even when the system is The alignment compensation of the material before lithography will eventually result in an alignment offset problem that cannot be satisfied at a specific position. In addition, depending on the characteristics of the process steps, this particular location may occur repeatedly on each wafer (by-wafer) or in each of the mask defined by-fields.

因此,如何提供一種可更廣泛使用的對準誤差補償方法,以確保曝光過程當層的圖案可精確的與前層的圖案進行對準,而更符合元件對準需求,或者提昇對準的精度,則是本發明之重點。Therefore, how to provide a more widely used alignment error compensation method to ensure that the pattern of the layer can be precisely aligned with the pattern of the front layer during the exposure process, more in line with the component alignment requirements, or improve the alignment accuracy. It is the focus of the present invention.

因此,本發明之目的,即在提供一種用於控制一對準機台對一半導體基材的對準校正的對準誤差補償計算系統。Accordingly, it is an object of the present invention to provide an alignment error compensation calculation system for controlling alignment correction of an alignment machine to a semiconductor substrate.

於是本發明的對準誤差補償計算系統,包含:一接收儲存單元,及一補值參數計算單元。Therefore, the alignment error compensation calculation system of the present invention comprises: a receiving storage unit, and a supplementary parameter calculating unit.

該接收儲存單元是接收並儲存取自該半導體基材的多個對位符號所產生的對準誤差值,及該半導體基材上至少一非由該等對位符號產生的修正補償誤差值。The receiving storage unit is an alignment error value generated by receiving and storing a plurality of alignment symbols taken from the semiconductor substrate, and at least one correction compensation error value on the semiconductor substrate that is not generated by the alignment symbols.

該補值參數計算單元是利用儲存於該接收儲存單元的該等對準誤差值及該至少一基材上特定點的修正補償誤差值進行補償參數計算,而得到一修正偏移補償參數。The compensation parameter calculation unit calculates the compensation parameter by using the alignment error value stored in the receiving storage unit and the correction compensation error value of the specific point on the at least one substrate to obtain a modified offset compensation parameter.

此外,本發明之另一目的,即在提供一種可控制對準誤差的微影裝置。Furthermore, it is another object of the present invention to provide a lithography apparatus that can control alignment errors.

於是,本發明該微影裝置包含: 一微影單元,及一對準誤差補償計算系統。Thus, the lithography apparatus of the present invention comprises: a lithography unit, and an alignment error compensation calculation system.

該微影單元是用於對一表面塗佈感光性材料的半導體基材進行微影製程。The lithography unit is for performing a lithography process on a semiconductor substrate coated with a photosensitive material on a surface.

對準誤差補償計算系統包括一接收儲存單元及一補值參數計算單元。The alignment error compensation calculation system includes a receiving storage unit and a supplementary parameter calculating unit.

該接收儲存單元是接收並儲存取自該半導體基材的多個對位符號的對準誤差值,及該半導體基材上至少一非由該等對位符號產生的修正補償誤差值。The receiving storage unit is an alignment error value for receiving and storing a plurality of alignment symbols from the semiconductor substrate, and at least one correction compensation error value on the semiconductor substrate that is not generated by the alignment symbols.

該補值參數計算單元可用於輸入一使用者定義的特定點,及由該特定點產生的修正補償誤差值,或是預設的對位偏移值,並與一半導體基材的多個對準符號所產生的對準誤差值整合進行補償參數計算,而輸出一用以對一對準機台進行對準校正的修正偏移補償參數。The complement parameter calculation unit may be configured to input a user-defined specific point, and a corrected compensation error value generated by the specific point, or a preset alignment offset value, and a plurality of pairs of a semiconductor substrate The alignment error values generated by the quasi-symbols are integrated to perform compensation parameter calculations, and a modified offset compensation parameter for alignment correction of an alignment machine is output.

另外,本案的又一目的,在於提供一種用於得到一對準機台的對準校正補償參數的對準誤差補償模組。In addition, another object of the present invention is to provide an alignment error compensation module for obtaining an alignment correction compensation parameter of an alignment machine.

該對準誤差補償模組用於輸入一使用者定義的特定點,及由該特定點產生的修正補償誤差值,或是預設的對位偏移值,並與一半導體基材的多個對準符號所產生的對準誤差值整合進行補償參數計算,而輸出一用以對一對準機台進行對準校正的修正偏移補償參數。The alignment error compensation module is configured to input a user-defined specific point, and a correction compensation error value generated by the specific point, or a preset alignment offset value, and a plurality of semiconductor substrates The alignment error values generated by the alignment symbols are integrated to perform compensation parameter calculations, and a modified offset compensation parameter for alignment correction of an alignment machine is output.

本發明之功效:同時利用取自該半導體基材的多個對位符號產生的對準誤差值及非由該半導體基材的對位符號所產生至少一修正補償誤差值進行補償參數計算,而得到用於對該對準機台進行對準校正補償的修正偏移補償參數,而可得到更佳的對準效果。The invention has the effect of simultaneously calculating the compensation parameter by using an alignment error value generated from a plurality of alignment symbols of the semiconductor substrate and at least one correction compensation error value generated by the alignment symbol of the semiconductor substrate, and A corrected offset compensation parameter for alignment correction compensation of the alignment machine is obtained, and a better alignment effect can be obtained.

參閱圖1,本發明微影裝置的一實施例包含一微影單元2及一對準誤差補償計算系統3。Referring to FIG. 1, an embodiment of a lithography apparatus of the present invention includes a lithography unit 2 and an alignment error compensation calculation system 3.

該微影單元2是一般的步進機(stepper)、掃描機(scanner),用於對一表面塗佈感光性材料之半導體基材進行曝光、顯影,以於該半導體基材上形成預定圖案。The lithography unit 2 is a general stepper and a scanner for exposing and developing a semiconductor substrate coated with a photosensitive material to form a predetermined pattern on the semiconductor substrate. .

該半導體基材可以是液晶面板、顯示器,或是半導體晶圓等不同用途的基板。且該半導體基材具有多個對準符號,該等對準符號可以是原始即存在該半導體基材表面的對位符號(alignment marks),或是與經由一後製程形成於該半導體晶圓的其中一積層表面的疊對符號(overlay marks)。The semiconductor substrate may be a liquid crystal panel, a display, or a substrate for different uses such as a semiconductor wafer. And the semiconductor substrate has a plurality of alignment symbols, which may be original alignment marks present on the surface of the semiconductor substrate, or formed on the semiconductor wafer via a post process. One of the overlay marks of the surface of the laminate.

該對準誤差補償計算系統3是指在該半導體基材的微影製程過程中,可對該微影單元2進行對準校正,以確保後續形成於該半導體基材當層的圖案可精確並符合元件需求的與前層的圖案進行對準,而提昇元件對準的精度。The alignment error compensation calculation system 3 refers to performing alignment correction on the lithography unit 2 during the lithography process of the semiconductor substrate to ensure that the pattern formed later on the semiconductor substrate can be accurately Align with the pattern of the front layer in accordance with the component requirements, and improve the accuracy of component alignment.

詳細的說,該對準誤差補償計算系統3包括一接收儲存單元31及一對準誤差補償模組32。In detail, the alignment error compensation calculation system 3 includes a receiving storage unit 31 and an alignment error compensation module 32.

該接收儲存單元31可為一般的定址或定位設備,例如步進機(stepper)、掃描機(scanner);或是對準誤差量測機台,例如繞射式疊對(diffraction-based overlay,DBO)或影像疊對(image-based overlay,IBO)所具有的儲存元件,可用於接收並儲存取自該半導體基材的該等對準符號所產生的對準誤差值,及至少一非由該等對準符號產生的修正補償誤差值。The receiving storage unit 31 can be a general addressing or positioning device, such as a stepper, a scanner, or an alignment error measuring machine, such as a diffraction-based overlay. DBO) or image-based overlay (IBO) having storage elements for receiving and storing alignment error values generated by the alignment symbols from the semiconductor substrate, and at least one The correction compensation error value produced by the alignment symbols.

該等對準符號所產生的對準誤差值可以是由取自於該半導體基材上多個當層對前層的對準符號經計算後所得到,或是該半導體基材對準曝光完成後,將該等對準符號的座標量測值與對應的標準記號的預設座標值比對後而得。The alignment error value generated by the alignment symbols may be obtained by calculating a plurality of alignment marks of the front layer from the semiconductor substrate, or the semiconductor substrate is aligned and exposed. Then, the coordinate measurement values of the alignment symbols are compared with the preset coordinate values of the corresponding standard symbols.

該至少一修正補償誤差值則是指由非預設於該半導體基材上的該等對準符號位置的至少一特定點所產生,該特定點可視前次對準偏移的量測結果或補償需求而選擇設定為一點或多點。The at least one correction compensation error value is generated by at least one specific point that is not preset on the semiconductor substrate, and the specific point may be a measurement result of the previous alignment offset or Set the compensation to one or more points to compensate for the demand.

於一些實施例中,該至少一特定點是經由使用者藉由對準偏移的量測結果或補償需求自行定義而得。In some embodiments, the at least one specific point is defined by the user by the measurement result or the compensation requirement of the alignment offset.

該對準誤差補償模組32用於輸入使用者定義的至少一特定點,及由該至少一特定點產生的修正補償誤差值或是預設的對位偏移值,並將由該至少一特定點產生的修正補償誤差值或是預設的對位偏移值與一半導體基材的多個對準符號所產生的對準誤差值整合進行補償參數計算後,而得到一可輸出對一對準機台進行對準校正的修正偏移補償參數。The alignment error compensation module 32 is configured to input at least one specific point defined by the user, and a correction compensation error value generated by the at least one specific point or a preset alignment offset value, and the at least one specific The corrected compensation error value generated by the point or the preset alignment offset value is integrated with the alignment error value generated by the plurality of alignment symbols of a semiconductor substrate to calculate the compensation parameter, thereby obtaining an output pair The calibration machine performs the correction offset compensation parameter of the alignment correction.

詳細的說,該對準誤差補償模組32包括一補值參數計算單元321,及一偏移誤差補償單元322。In detail, the alignment error compensation module 32 includes a complement parameter calculation unit 321 and an offset error compensation unit 322.

該補值參數計算單元321可利用接收該接收儲存單元31的該等對準誤差值及該至少一修正補償誤差值進行補償參數計算,而得到一用於該微影單元2對該半導體基材進行對準校正的修正偏移補償參數。The compensation parameter calculation unit 321 can perform compensation parameter calculation by using the alignment error value of the receiving storage unit 31 and the at least one correction compensation error value to obtain a semiconductor substrate for the lithography unit 2 Correct offset compensation parameters for alignment correction.

該偏移誤差補償單元322則可將該修正偏移補償參數輸入至該微影單元2(對準機台)進行對準校正。The offset error compensation unit 322 can then input the modified offset compensation parameter to the lithography unit 2 (alignment machine) for alignment correction.

以下說明以該特定點為一點為例說明。該特定點之修正補償誤差值可以是將經由前次製程的半導體基材經實際切片量測後而得,例如將製程得到的半導體晶片經切片後,於TEM(電子穿透式顯微鏡)切面實際劑量測得到的偏移點/位置,或是經電性量測後實際得到的偏移點/位置;或是可由使用者自行定義於該半導體基材的一特定點。而該修正補償誤差值,則是該特定點經量測後而得的偏移誤差值,或是由其它對位記號(如疊對標誌)已量測的偏移量模擬計算出該特定點的偏移誤差值,再與TEM量測而得的偏移值或電性量測而得的疊對偏移值(electrical overlay shift)計算而來。The following description takes this specific point as an example for illustration. The correction compensation error value of the specific point may be obtained by measuring the semiconductor substrate through the previous process through actual slicing, for example, after the semiconductor wafer obtained by the process is sliced, the TEM (electron penetrating microscope) is actually cut. The offset point/position obtained by the dose measurement, or the offset point/position actually obtained after the electrical measurement; or can be defined by the user at a specific point of the semiconductor substrate. The correction compensation error value is an offset error value obtained after the specific point is measured, or the offset is measured by other alignment marks (such as the overlap flag) to calculate the specific point. The offset error value is calculated from the offset value obtained by the TEM measurement or the electrical overlay shift obtained by the electrical measurement.

於一些實施例中,該特定點也可以是該半導體基材於製程過程中的應力集中區或是形成於該半導體基材上之預設圖案的缺陷區。In some embodiments, the specific point may also be a stress concentration region of the semiconductor substrate during the process or a defect region of a predetermined pattern formed on the semiconductor substrate.

要說明的是,該等對準誤差值或該修正補償誤差值可以是極座標(r,θ)或直角座標(x,y)的量測或計算結果,由於誤差值的量測及計算方式為本技術領域者所習知,故於此不再多加贅述。本發明實施例是以直角座標為例做說明,但不限於此。It should be noted that the alignment error value or the correction compensation error value may be a measurement or calculation result of a polar coordinate (r, θ) or a rectangular coordinate (x, y), because the error value is measured and calculated. It is known to those skilled in the art, and thus will not be further described herein. The embodiment of the present invention is described by taking a rectangular coordinate as an example, but is not limited thereto.

該補值參數計算單元321可以是前述步進機(stepper)、掃描機(scanner),或是對準誤差量測機台內建的運算系統、獨立的電腦系統或者是對準誤差量測機台,包括一個內建或外接的計算器。該計算器可接收該接收儲存單元31的該等對準誤差值及該修正補償誤差值並利用該等對準誤差值及該修正補償誤差值進行補償參數計算,而得到一修正偏移補償參數。由於該修正偏移補償參數的計算與本技術習知的對準誤差補償參數計算方式相同,且該對準誤差補償參數值的計算方法為本技術領域者周知,因此,不再多加說明。The complement parameter calculation unit 321 may be a stepper, a scanner, or an operation system built in the alignment error measuring machine, an independent computer system, or an alignment error measuring machine. The station includes a built-in or external calculator. The calculator can receive the alignment error value of the receiving storage unit 31 and the correction compensation error value, and perform compensation parameter calculation using the alignment error value and the correction compensation error value to obtain a modified offset compensation parameter. . Since the calculation of the correction offset compensation parameter is the same as the calculation method of the alignment error compensation parameter of the prior art, and the calculation method of the alignment error compensation parameter value is well known to those skilled in the art, it will not be further explained.

要說明的是,儲存於該接收儲存單元31的該修正補償誤差值可以是經由該特定點量測得到的偏移值,或是經由該特定點量測得到的偏移值與該等對準誤差值的差值(以修正補償偏移值表示)。因此,該補值參數計算單元321可以是直接利用該等對準誤差值與該修正補償偏移值進行補償參數計算;或是先輸入該特定點量測得到的偏移值至該補值參數計算單元321後,再經由該補償參數計算單元321將該特定點量測得到的偏移值扣除該等對準誤差值而得到該修正補償偏移值後,再將該修正補償偏移值與該等對準誤差值共同進行補償參數計算,而得到該修正偏移補償參數。It should be noted that the correction compensation error value stored in the receiving storage unit 31 may be an offset value measured through the specific point, or an offset value measured through the specific point and the alignment. The difference in error value (expressed as the corrected offset value). Therefore, the complement parameter calculation unit 321 may directly calculate the compensation parameter by using the alignment error value and the correction compensation offset value; or input the offset value measured by the specific point to the complement parameter. After the calculation unit 321 , the compensation parameter calculation unit 321 subtracts the offset value obtained by the specific point measurement to obtain the correction compensation offset value, and then the correction compensation offset value is The alignment error values are jointly calculated for the compensation parameters to obtain the corrected offset compensation parameters.

此外,要說明的是,該補值參數計算單元321也可以是先利用儲存於該接收儲存單元31的該等對準誤差值進行補償參數計算產生一第一補償參數,及利用該修正補償誤差值進行補償參數計算產生一第二補償參數後,再利用該第一補償參數及第二補償參進行補償參數計算,同樣也可得到該修正偏移補償參數。In addition, it is to be noted that the compensation parameter calculation unit 321 may first generate a first compensation parameter by using the alignment error values stored in the receiving storage unit 31 to generate a first compensation parameter, and use the correction compensation error. After the value is compensated and the second compensation parameter is generated, the first compensation parameter and the second compensation parameter are used to calculate the compensation parameter, and the corrected offset compensation parameter is also obtained.

最後則可經由該偏移誤差補償單元322將該修正偏移補償參數輸出至該微影單元2進行對準補償。Finally, the corrected offset compensation parameter can be output to the lithography unit 2 via the offset error compensation unit 322 for alignment compensation.

於一些實施例中,該偏移誤差補償單元322可以是前述步進機(stepper)、掃描機(scanner),或是對準誤差量測機台內建或是獨立的電腦系統,用以將該修正偏移補償參數輸入至該微影單元2(對準機台),以利用該修正偏移補償參數作為該微影單元2對該半導體基材的對準補償。In some embodiments, the offset error compensation unit 322 can be a stepper, a scanner, or a built-in or independent computer system for the alignment error measurement machine. The modified offset compensation parameter is input to the lithography unit 2 (alignment machine) to utilize the corrected offset compensation parameter as alignment compensation for the semiconductor substrate by the lithography unit 2.

續配合參閱圖1,茲以下列步驟說明利用本發明該對準誤差補償計算系統3對該微影單元2(對準機台)進行對準補償校正,而於一半導體基材上形成圖案化光阻層的流程。With continued reference to FIG. 1, the alignment compensation compensation system 3 of the present invention performs alignment compensation correction on the lithography unit 2 (alignment machine) in the following steps to form a pattern on a semiconductor substrate. The flow of the photoresist layer.

首先,將一個具有至少兩個對準符號,且表面塗佈一層感光性材料層的半導體基材載入該微影單元2中,在此,該微影單元2以曝光機台說明。First, a semiconductor substrate having at least two alignment marks and a surface coated with a layer of photosensitive material is loaded into the lithography unit 2, where the lithography unit 2 is described by an exposure machine.

將該曝光機台2與該半導體基材進行對準,利用該曝光機台2取得該半導體基材的該等對準符號所產生的對準誤差值(x1 、y1 ),並於該半導體基材由使用者定義一與該等對準符號不同的特定點,得到由該特定點所產生的修正補償誤差值(x2 、y2 )。再將該修正補償誤差值(x2 、y2 )扣除該對準誤差值(x1 、y1 ),而得到一修正補償偏移值(x3 、y3 ),其中該(x1 、y1 )、(x2 、y2 )即為X、Y方向的誤差值。將該修正補償誤差值(x1 、y1 )與該修正補償偏移值(x3 、y3 )儲存於該接收儲存單元31。Aligning the exposure machine 2 with the semiconductor substrate, and obtaining an alignment error value (x 1 , y 1 ) generated by the alignment symbols of the semiconductor substrate by the exposure machine 2, and The semiconductor substrate defines a specific point different from the alignment symbols by the user, and obtains a correction compensation error value (x 2 , y 2 ) generated by the specific point. Then, the correction compensation error value (x 2 , y 2 ) is deducted from the alignment error value (x 1 , y 1 ) to obtain a corrected compensation offset value (x 3 , y 3 ), where the (x 1 , y 1 ), (x 2 , y 2 ) are the error values in the X and Y directions. The correction compensation error value (x 1 , y 1 ) and the correction compensation offset value (x 3 , y 3 ) are stored in the reception storage unit 31.

接著,輸入該對準誤差值(x1 、y1 )及修正補償偏移值(x3 、y3 )至該補值參數計算單元321,並利用該對準誤差值(x1 、y1 )及修正補償偏移值(x3 、y3 )計算而得一修正偏移補償參數。Next, the alignment error value (x 1 , y 1 ) and the corrected compensation offset value (x 3 , y 3 ) are input to the complement parameter calculation unit 321, and the alignment error value (x 1 , y 1 is utilized) And correcting the offset value (x 3 , y 3 ) to obtain a modified offset compensation parameter.

最後,將計算而得的修正偏移補償參數輸入至該偏移誤差補償單元322,再經由該偏移誤差補償單元322輸出該修正偏移補償參數至對該曝光機台2,做為具有該等原始對準誤差值的半導體基材的對準補償值,以用來校正該曝光機台2對該半導體基材的對準較正。Finally, the calculated corrected offset compensation parameter is input to the offset error compensation unit 322, and the corrected offset compensation parameter is output to the exposure machine 2 via the offset error compensation unit 322 as The alignment compensation value of the semiconductor substrate of the original alignment error value is used to correct the alignment of the exposure substrate 2 to the semiconductor substrate.

最後,利用該經修正偏移補償參數對準校正後的曝光機台2對該半導體基材進行對準後曝光、顯影,即可於該半導體基材上形成一圖案化感光層。Finally, the semiconductor substrate is aligned and exposed by the exposure machine 2 with the corrected offset compensation parameter alignment correction to form a patterned photosensitive layer on the semiconductor substrate.

綜上所述,本發明藉由對半導體基材進行對準補償參數計算時,除了利用習知形成於該半導體基材上的對準符號所得到的對準誤差值之外,還同時利用至少一個非屬於該等對位符號之特定點所產生的修正補償誤差值共同作為對準補償參數計算的基準,因此,最終得到的補償參數為一包含該特定點之偏移誤差的修正偏移補償參數,而可避免習知對準補償參數因為僅考量該等對準符號的對準誤差,而使得對該半導體基材其它偏移點的補償失真的缺點,而可得到更佳的對準補償效果,故確實能達成本發明之目的。In summary, the present invention utilizes at least the alignment error value obtained by using the alignment symbols formed on the semiconductor substrate by using the alignment compensation parameter calculation of the semiconductor substrate. A correction compensation error value generated by a specific point that does not belong to the alignment symbols is used as a reference for the calculation of the alignment compensation parameter. Therefore, the final compensation parameter is a modified offset compensation including the offset error of the specific point. Parameters, while avoiding the conventional alignment compensation parameters, because only the alignment errors of the alignment symbols are considered, so that the distortion of the other offset points of the semiconductor substrate is distorted, and better alignment compensation can be obtained. The effect is indeed achieved by the object of the present invention.

惟以上所述者,僅為本發明之較佳實施例而已,當不能以此限定本發明實施之範圍,凡是依本發明申請專利範圍及專利說明書內容所作之簡單的等效變化與修飾,皆仍屬本發明專利涵蓋之範圍內。The above is only the preferred embodiment of the present invention, and the scope of the present invention is not limited thereto, and the simple equivalent changes and modifications made by the scope of the patent application and the patent specification of the present invention are It is still within the scope of the invention patent.

2‧‧‧微影單元2‧‧‧ lithography unit

32‧‧‧對準誤差補償模組32‧‧‧Alignment error compensation module

3‧‧‧對準誤差補償計算系統3‧‧‧Alignment error compensation calculation system

321‧‧‧補值參數計算單元321‧‧‧Complementary parameter calculation unit

31‧‧‧接收儲存單元31‧‧‧ Receiving storage unit

322‧‧‧偏移誤差補償單元 322‧‧‧Offset error compensation unit

本發明之其他的特徵及功效,將於參照圖式的實施方式中清楚地呈現,其中: 圖1是一方塊示意圖,說明本發明該微影裝置的實施例。Other features and advantages of the present invention will be apparent from the following description of the embodiments of the invention, wherein: Figure 1 is a block diagram illustrating an embodiment of the lithographic apparatus of the present invention.

Claims (14)

一種對準誤差補償計算系統,用於控制一對準機台對一半導體基材的對準校正,包含: 一接收儲存單元,接收並儲存取自該半導體基材的多個對準符號所產生的對準誤差值,及該半導體基材上至少一非由該等對準符號產生的修正補償誤差值;及 一補值參數計算單元,利用儲存於該接收儲存單元的該等對準誤差值及該至少一修正補償誤差值進行補償參數計算,而得到一修正偏移補償參數。An alignment error compensation calculation system for controlling alignment correction of a semiconductor substrate to an alignment machine includes: receiving a storage unit, receiving and storing a plurality of alignment symbols taken from the semiconductor substrate An alignment error value, and at least one corrected compensation error value of the semiconductor substrate that is not generated by the alignment symbols; and a supplemental parameter calculation unit that utilizes the alignment error values stored in the receiving storage unit And calculating the compensation parameter by the at least one correction compensation error value to obtain a modified offset compensation parameter. 如請求項第1項所述的對準誤差補償計算系統,還包含,一偏移誤差補償單元,利用該修正偏移補償參數對該對準機台進行對準校正補償。The alignment error compensation calculation system of claim 1, further comprising an offset error compensation unit that performs alignment correction compensation on the alignment machine by using the modified offset compensation parameter. 如請求項第1項所述的對準誤差補償計算系統,其中,該至少一修正補償誤差值是由使用者定義的至少一特定點所產生。The alignment error compensation calculation system of claim 1, wherein the at least one correction compensation error value is generated by at least one specific point defined by a user. 如請求項第3項所述的對準誤差補償計算系統,其中,其中,該對準誤差值是取自該半導體基材上多個當層對前層的對準符號經計算後得到的對準誤差值,或是半導體基材經前次對準曝光完成後,將多個對準符號的座標量測值與對應的標準記號的預設座標值比對後而得。The alignment error compensation calculation system of claim 3, wherein the alignment error value is obtained by calculating a plurality of alignment symbols of the front layer from the semiconductor substrate. The quasi-error value, or the semiconductor substrate after the previous alignment exposure is completed, the coordinate measurement values of the plurality of alignment symbols are compared with the preset coordinate values of the corresponding standard symbols. 如請求項第3項所述的對準誤差補償計算系統,其中,該至少一修正補償誤差值是經由該至少一特定點量測得到的偏移值,或是由該至少一特定點與該等對準誤差值經由模擬計算而得的修正補償偏移值。The alignment error compensation calculation system of claim 3, wherein the at least one correction compensation error value is an offset value measured by the at least one specific point, or by the at least one specific point and the The correction compensation offset value obtained by analog calculation of the alignment error value. 如請求項第1項所述的對準誤差補償計算系統,其中,該補值參數計算單元是利用儲存於該接收儲存單元的該等對準誤差值產生一第一補償參數,及利用該至少一修正補償誤差值產生一第二補償參數,再利用該第一補償參數及第二補償參進行補償參數計算,而得到一修正偏移補償參數。The alignment error compensation calculation system of claim 1, wherein the complement parameter calculation unit generates a first compensation parameter by using the alignment error values stored in the receiving storage unit, and utilizes the at least A modified compensation error value generates a second compensation parameter, and the first compensation parameter and the second compensation parameter are used to perform compensation parameter calculation, thereby obtaining a modified offset compensation parameter. 一種微影裝置,包含:一微影單元,及一對準誤差補償計算系統,該微影單元用於對一表面塗佈感光性材料的半導體基材進行微影製程,該對準誤差補償計算系統包括: 一接收儲存單元,取得並儲存該半導體基材的多個對準符號所產生的對準誤差值,及至少一非由該等對準符號所產生的修正補償誤差值;及 一補值參數計算單元,將該等對準誤差值及修正補償誤差值共同進行補償計算,而得到一修正偏移補償參數。A lithography apparatus comprising: a lithography unit, and an alignment error compensation calculation system, wherein the lithography unit is configured to perform a lithography process on a semiconductor substrate coated with a photosensitive material, the alignment error compensation calculation The system includes: a receiving storage unit, obtaining and storing an alignment error value generated by the plurality of alignment symbols of the semiconductor substrate, and at least one correction compensation error value not generated by the alignment symbols; The value parameter calculation unit performs compensation calculation together with the alignment error value and the correction compensation error value to obtain a modified offset compensation parameter. 如請求項第7項所述的微影裝置,還包含一虛擬偏移誤差補償單元,利用該修正偏移補償參數對該微影單元進行對準校正補償The lithography apparatus according to claim 7, further comprising a virtual offset error compensation unit, wherein the calibrated offset compensation parameter is used for alignment correction compensation of the lithography unit 如請求項第7項所述的微影裝置,其中,該至少一修正補償誤差值是由使用者定義的至少一特定點所產生。The lithography apparatus of claim 7, wherein the at least one correction compensation error value is generated by at least one specific point defined by a user. 如請求項第9項所述的微影裝置,其中,該對準誤差值是取自該半導體基材上多個當層對前層的對準符號經計算後得到的對準誤差值,或是半導體基材經前次對準曝光完成後,將多個對準符號的座標量測值與對應的標準記號的預設座標值比對後而得。The lithography apparatus of claim 9, wherein the alignment error value is an alignment error value obtained by calculating a plurality of alignment marks of the front layer on the semiconductor substrate, or After the semiconductor substrate is finished by the previous alignment exposure, the coordinate measurement values of the plurality of alignment symbols are compared with the preset coordinate values of the corresponding standard symbols. 如請求項第9項所述的微影裝置,其中,該至少一修正補償誤差值是經由該至少一特定點量測得到的偏移值,或是由該至少一特定點與該等對準誤差值經由模擬計算而得的修正補償偏移值。The lithography apparatus of claim 9, wherein the at least one correction compensation error value is an offset value measured by the at least one specific point, or is aligned with the at least one specific point The error value is corrected by the analog compensation offset value. 如請求項第7項所述的對準誤差補償計算系統,其中,該補值參數計算單元是利用儲存於該接收儲存單元的該等對準誤差值產生一第一補償參數,及該至少一修正補償誤差值一第二補償參數,再利用該第一補償參數及第二補償參進行補償參數計算,而得到一修正偏移補償參數。The alignment error compensation calculation system of claim 7, wherein the complement parameter calculation unit generates a first compensation parameter by using the alignment error values stored in the receiving storage unit, and the at least one Correcting the compensation error value to the second compensation parameter, and then using the first compensation parameter and the second compensation parameter to perform compensation parameter calculation, and obtaining a modified offset compensation parameter. 一種對準誤差補償模組,用於輸入使用者定義的至少一特定點,及輸入使用者定義的該至少一特定點產生的修正補償誤差值或是預設的對位偏移值,並將由該特定點產生的修正補償誤差值或是預設的對位偏移值與一半導體基材的多個對準符號所產生的對準誤差值整合進行補償參數計算後,而得到一可輸出對一對準機台進行對準校正的修正偏移補償參數An alignment error compensation module, configured to input at least one specific point defined by a user, and input a correction compensation error value generated by the user-defined at least one specific point or a preset alignment offset value, and The correction compensation error value generated by the specific point or the preset alignment offset value is integrated with the alignment error value generated by the plurality of alignment symbols of the semiconductor substrate to calculate the compensation parameter, thereby obtaining an output pair. A modified offset compensation parameter for alignment correction of the alignment machine 如請求項第13項所述的對準誤差補償模組,其中,該至少一修正補償誤差值是經由該至少一特定點量測得到的偏移值,或是由該至少一特定點與該等對準誤差值經由模擬計算而得的修正補償偏移值。The alignment error compensation module of claim 13, wherein the at least one correction compensation error value is an offset value measured by the at least one specific point, or by the at least one specific point and the The correction compensation offset value obtained by analog calculation of the alignment error value.
TW106131011A 2017-09-11 2017-09-11 Alignment error compensation module, alignment error compensation calculating system, and lithography device subjecting the alignment machine to alignment correction compensation by utilizing the mis-alignment compensation parameter TW201913241A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
TW106131011A TW201913241A (en) 2017-09-11 2017-09-11 Alignment error compensation module, alignment error compensation calculating system, and lithography device subjecting the alignment machine to alignment correction compensation by utilizing the mis-alignment compensation parameter

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
TW106131011A TW201913241A (en) 2017-09-11 2017-09-11 Alignment error compensation module, alignment error compensation calculating system, and lithography device subjecting the alignment machine to alignment correction compensation by utilizing the mis-alignment compensation parameter

Publications (1)

Publication Number Publication Date
TW201913241A true TW201913241A (en) 2019-04-01

Family

ID=66991914

Family Applications (1)

Application Number Title Priority Date Filing Date
TW106131011A TW201913241A (en) 2017-09-11 2017-09-11 Alignment error compensation module, alignment error compensation calculating system, and lithography device subjecting the alignment machine to alignment correction compensation by utilizing the mis-alignment compensation parameter

Country Status (1)

Country Link
TW (1) TW201913241A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI724827B (en) * 2019-04-19 2021-04-11 日商日立全球先端科技股份有限公司 Defect observation device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI724827B (en) * 2019-04-19 2021-04-11 日商日立全球先端科技股份有限公司 Defect observation device

Similar Documents

Publication Publication Date Title
US7886254B2 (en) Method for amending layout patterns
US9005882B2 (en) Reticle defect correction by second exposure
CN103869638B (en) A kind of lithography alignment method penetrating wafer
TW201520702A (en) Misalignment error compensation method, system, and patterning method
JP2014053495A (en) Pattern formation method and pattern formation device
TW201913241A (en) Alignment error compensation module, alignment error compensation calculating system, and lithography device subjecting the alignment machine to alignment correction compensation by utilizing the mis-alignment compensation parameter
US6309944B1 (en) Overlay matching method which eliminates alignment induced errors and optimizes lens matching
JPH09166416A (en) Method and device for measuring amount of relative position deviation of reticle pattern
TW201730681A (en) Error analysis method for lithography process and lithography system capable of analyzing an alignment error degree of a semiconductor substrate and a heat error degree of a lens
US9733567B2 (en) Reticle transmittance measurement method, and projection exposure method using the same
JP2009283600A (en) Exposure aligning method, exposure aligning program, and exposure device
JP2002057103A (en) Exposure method for manufacturing semiconductor device
JP2010103438A (en) Patterning method, exposure system, program and device manufacturing method
JP3168590B2 (en) Reduction projection exposure method
TWI606315B (en) Alignment error compensation system and lithography system
JP2007220937A (en) Overlapping drawing method of substrate
US9753373B2 (en) Lithography system and semiconductor processing process
JP2006128186A (en) Superposition inspection system
CN112099316A (en) Correction method and system of optical proximity correction model
TWI795798B (en) Alignment error compensation method and system thereof
WO2022142364A1 (en) Method and apparatus for correcting placement error of mask
JP6381180B2 (en) Exposure apparatus, information management apparatus, exposure system, and device manufacturing method
US20090191473A1 (en) Photomask manufacturing method, photomask manufacturing system, and device manufacturing method
US20240111214A1 (en) Novel interface definition for lithographic apparatus
JP7265827B2 (en) Exposure system and article manufacturing method