TW201911977A - Upper electrode element, reaction chamber and semiconductor processing device - Google Patents
Upper electrode element, reaction chamber and semiconductor processing device Download PDFInfo
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- TW201911977A TW201911977A TW107112447A TW107112447A TW201911977A TW 201911977 A TW201911977 A TW 201911977A TW 107112447 A TW107112447 A TW 107112447A TW 107112447 A TW107112447 A TW 107112447A TW 201911977 A TW201911977 A TW 201911977A
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32009—Arrangements for generation of plasma specially adapted for examination or treatment of objects, e.g. plasma sources
- H01J37/32082—Radio frequency generated discharge
- H01J37/321—Radio frequency generated discharge the radio frequency energy being inductively coupled to the plasma
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32458—Vessel
- H01J37/32477—Vessel characterised by the means for protecting vessels or internal parts, e.g. coatings
- H01J37/32504—Means for preventing sputtering of the vessel
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
- H01J37/32568—Relative arrangement or disposition of electrodes; moving means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32532—Electrodes
- H01J37/32577—Electrical connecting means
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
- H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
- H01J37/32—Gas-filled discharge tubes
- H01J37/32431—Constructional details of the reactor
- H01J37/32798—Further details of plasma apparatus not provided for in groups H01J37/3244 - H01J37/32788; special provisions for cleaning or maintenance of the apparatus
- H01J37/32853—Hygiene
- H01J37/32871—Means for trapping or directing unwanted particles
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Abstract
Description
本發明涉及半導體製造技術領域，具體地，涉及一種上電極組件、反應腔室及半導體加工裝置。The invention relates to the technical field of semiconductor manufacturing, and in particular, to an upper electrode assembly, a reaction chamber, and a semiconductor processing device.
在半導體製造製程中，電感耦合電漿（ICP，Inductive Coupled Plasma）發生裝置可以在較低的工作氣壓下獲得高密度的電漿，而且結構簡單，造價低，因此廣泛應用於電漿蝕刻（IC）、物理氣相沉積（PVD）、電漿化學氣相沉積（CVD）、微電子機械系統（MEMS）和發光二極體（LED）等製程中。In the semiconductor manufacturing process, an inductive coupled plasma (ICP) generator can obtain high-density plasma at a lower working pressure, and has a simple structure and low cost, so it is widely used in plasma etching (IC). ), Physical vapor deposition (PVD), plasma chemical vapor deposition (CVD), microelectromechanical systems (MEMS), and light emitting diodes (LEDs).
在進行製程的過程中，為了提高產品的品質，在實施沉積製程之前，首先要對晶片進行預清洗（Preclean），以去除晶片表面的氧化物等雜質。一般的預清洗腔室的基本原理是：將通入清洗腔室內的諸如氬氣、氦氣或氫氣等的清洗氣體激發形成電漿，對晶片進行化學反應和物理轟擊，從而可以去除晶片表面的雜質。During the manufacturing process, in order to improve the quality of the product, before implementing the deposition process, the wafer must first be precleaned to remove impurities such as oxides on the surface of the wafer. The basic principle of a general pre-cleaning chamber is: the cleaning gas such as argon, helium or hydrogen that is passed into the cleaning chamber is excited to form a plasma, and the wafer is chemically reacted and physically bombarded, so that the wafer surface can be removed. Impurities.
第1圖為現有的一種預清洗腔室的剖視圖。請參閱第1圖，預清洗腔室包括腔體1，在該腔體1的頂部設置有介電質襯筒2，且在該介電質襯筒2的周圍環繞設置有射頻線圈3，該射頻線圈3通過上匹配器4與上射頻電源5電連接，上射頻電源5用於向射頻線圈3載入射頻功率，由射頻線圈3產生的電磁場能夠通過介電質襯筒2饋入至腔體1中，以激發腔體1中的製程氣體形成電漿。並且，在腔體1中還設置有基座6，用於承載晶片7。並且，基座6通過下匹配器8和下射頻電源9電連接，下射頻電源9用於向基座6載入射頻負偏壓，以吸引電漿蝕刻襯底表面。FIG. 1 is a cross-sectional view of a conventional pre-cleaning chamber. Referring to FIG. 1, the pre-cleaning chamber includes a cavity 1, a dielectric liner 2 is disposed on the top of the cavity 1, and a radio frequency coil 3 is arranged around the dielectric liner 2. The radio frequency coil 3 is electrically connected to the upper radio frequency power supply 5 through the upper matcher 4, and the upper radio frequency power supply 5 is used to load radio frequency power to the radio frequency coil 3. The electromagnetic field generated by the radio frequency coil 3 can be fed into the cavity through the dielectric liner 2. In the body 1, a plasma is formed by exciting the process gas in the cavity 1. In addition, a base 6 is further provided in the cavity 1 for carrying the wafer 7. In addition, the base 6 is electrically connected to the lower RF power source 9 through the lower matcher 8. The lower RF power source 9 is used to load a negative RF bias voltage to the base 6 to attract the plasma to etch the substrate surface.
如第2圖所示，上述射頻線圈3的輸入端用作功率饋入點與上匹配器4電連接，上述射頻線圈3的輸出端接地。這會存在以下問題：由於高頻的駐波效應，射頻線圈3的每一匝的電位分佈存在較大的差異，而且射頻線圈3的不同匝之間的電位也存在較大的差異，這種差異會造成由射頻線圈3產生的電磁場在反應腔室內分佈不均勻，從而造成電漿的分佈均勻性較低，進而影響製程均勻性。As shown in FIG. 2, the input end of the radio frequency coil 3 is used as a power feed point to be electrically connected to the upper matcher 4, and the output end of the radio frequency coil 3 is grounded. This has the following problems: due to the high-frequency standing wave effect, there is a large difference in the potential distribution of each turn of the RF coil 3, and there is also a large difference in the potential between different turns of the RF coil 3, this difference It will cause the electromagnetic field generated by the RF coil 3 to be unevenly distributed in the reaction chamber, resulting in a lower uniformity of the plasma distribution and further affecting the uniformity of the process.
本發明旨在至少解決先前技術中存在的技術問題之一，提出了一種上電極元件及反應腔室，其可以減小線圈上存在的電位分佈差異，從而可以提高電漿的分佈均勻性，進而可以提高製程均勻性。The present invention aims to solve at least one of the technical problems in the prior art, and proposes an upper electrode element and a reaction chamber, which can reduce the difference in potential distribution existing on the coil, thereby improving the uniformity of the plasma distribution, and further Can improve process uniformity.
為實現本發明的目的而提供一種上電極元件，包括線圈，該線圈中設置有n個功率饋入點，其中，n為大於等於1的整數；並且該線圈中設置有n+1個接地端點，該功率饋入點和該接地端點的排布關係遵循以下規律：對於每一該功率饋入點而言，沿線圈的纏繞方向在該功率饋入點的上游和下游分別設置有一個接地端點，該功率饋入點和其上游接地端點之間的線圈構成第一線圈分部，該功率饋入點和其下游接地端點之間的線圈構成第二線圈分部，該第一線圈分部和第二線圈分部並聯在該功率饋入點和地之間。In order to achieve the purpose of the present invention, an upper electrode element is provided, which includes a coil, and n power feeding points are provided in the coil, where n is an integer greater than or equal to 1; and n + 1 ground terminals are provided in the coil. Point, the arrangement relationship between the power feed point and the ground terminal follows the following rule: for each of the power feed points, one is provided upstream and downstream of the power feed point along the winding direction of the coil, respectively The ground terminal, the coil between the power feed point and its upstream ground terminal constitutes a first coil section, and the coil between the power feed point and its downstream ground terminal constitutes a second coil section, the first A coil section and a second coil section are connected in parallel between the power feeding point and the ground.
其中，該線圈為多匝柱狀螺旋立體線圈。The coil is a multi-turn cylindrical spiral solid coil.
其中，對於每一該功率饋入點來說，該第一線圈分部和第二線圈分部二者其一的長度與二者之和的總長度的比值的取值範圍在0.5/5.5~2.5/5.5之間；進一步，該第一線圈分部和第二線圈分部二者其一的長度與二者之和的總長度的比值的取值範圍在0.7/5.5~1.5/5.5之間；更進一步地，該第一線圈分部和第二線圈分部二者其一的長度與二者之和的總長度的比值的取值範圍在0.9/5.5~1.1/5.5之間。例如，該第一線圈分部和第二線圈分部二者其一的長度與二者之和的總長度的比值為2.5/5.5、2.0/5.5、1.8/5.5、1.5/5.5、1.4/5.5、1.3/5.5、1.2/5.5、1.1/5.5、1.05/5.5、1.02/5.5、1/5.5、0.97/5.5、0.95/5.5、0.9/5.5、0.8/5.5、0.7/5.5、0.6/5.5或者0.5/5.5。For each of the power feeding points, the ratio of the length of one of the first coil section and the second coil section to the total length of the two is in the range of 0.5 / 5.5 ~ 2.5 / 5.5; further, the ratio of the length of one of the first coil section and the second coil section to the total length of the sum of the two ranges from 0.7 / 5.5 to 1.5 / 5.5 Further, the ratio of the length of one of the first coil section and the second coil section to the total length of the sum of the two ranges from 0.9 / 5.5 to 1.1 / 5.5. For example, the ratio of the length of one of the first coil section and the second coil section to the total length of the two is 2.5 / 5.5, 2.0 / 5.5, 1.8 / 5.5, 1.5 / 5.5, 1.4 / 5.5 , 1.3 / 5.5, 1.2 / 5.5, 1.1 / 5.5, 1.05 / 5.5, 1.02 / 5.5, 1 / 5.5, 0.97 / 5.5, 0.95 / 5.5, 0.9 / 5.5, 0.8 / 5.5, 0.7 / 5.5, 0.6 / 5.5 or 0.5 /5.5.
其中，該線圈為單匝線圈。The coil is a single-turn coil.
其中，對於每一該功率饋入點而言，其上游接地端點和下游接地端點中的至少一個通過阻抗配置裝置接地，通過設定不同的該阻抗配置裝置的阻抗大小，來使兩個該第一線圈分部和第二線圈分部的電流方向相同或相反。For each of the power feed-in points, at least one of the upstream ground terminal and the downstream ground terminal is grounded through an impedance configuration device, and by setting different impedance sizes of the impedance configuration device, two The current directions of the first coil section and the second coil section are the same or opposite.
其中，該阻抗匹配裝置包括可調電容，該可調電容的容值範圍為0~2000pF。Wherein, the impedance matching device includes an adjustable capacitor, and a capacitance value of the adjustable capacitor ranges from 0 to 2000 pF.
其中，該上電極元件還包括匹配器和功率源，該功率源經由該匹配器而與該功率饋入點電連接；並且，該阻抗配置裝置和該匹配器整合於同一個殼體中或者分別設置在不同的殼體中。The upper electrode element further includes a matcher and a power source, and the power source is electrically connected to the power feeding point via the matcher; and the impedance configuration device and the matcher are integrated in the same housing or separately Set in different shells.
其中，該上電極組件還包括介電質襯筒，該線圈環繞該介電質襯筒而設置在該介電質襯筒的週邊。The upper electrode assembly further includes a dielectric liner, and the coil is disposed around the dielectric liner and is disposed around the dielectric liner.
作為另一個方面，本發明還提供一種反應腔室，其包括前述任意一方案所述的上電極組件，該上電極組件還包括介電質襯筒，該線圈環繞該介電質襯筒而設置在該介電質襯筒的週邊；該反應腔室還包括法拉第遮罩件，該法拉第遮罩件環繞設置在該介電質襯筒的內側，並且該法拉第遮罩件包括導電環體，在該導電環體上形成有開縫；該開縫包括第一子開縫，該第一子開縫沿該導電環體的圓周方向設置，且與該導電環體的軸線之間形成夾角，用以通過增加電磁場在該導電環體的圓周方向上的電場分量的耦合效率，來增加該電磁場的總耦合效率。As another aspect, the present invention further provides a reaction chamber including the upper electrode assembly according to any one of the preceding schemes, the upper electrode assembly further comprising a dielectric liner, and the coil is disposed around the dielectric liner. At the periphery of the dielectric liner; the reaction chamber further includes a Faraday shield, the Faraday shield is arranged around the inside of the dielectric liner, and the Faraday shield includes a conductive ring body. A slit is formed on the conductive ring body; the slit includes a first sub slit, the first sub slit is arranged along the circumferential direction of the conductive ring body, and an angle is formed with the axis of the conductive ring body, and The total coupling efficiency of the electromagnetic field is increased by increasing the coupling efficiency of the electric field component of the electromagnetic field in the circumferential direction of the conductive ring body.
其中，該法拉第遮罩件的上端面高於該介電質襯筒的上端面；該法拉第遮罩件的下端面低於該介電質襯筒的下端面。The upper end face of the Faraday shield is higher than the upper end face of the dielectric liner; the lower end face of the Faraday shield is lower than the lower end face of the dielectric liner.
其中，該反應腔室為預清洗腔室。The reaction chamber is a pre-cleaning chamber.
作為再一個方面，本發明還提供一種半導體加工裝置，其包括前述任意一方案所述的反應腔室。As yet another aspect, the present invention also provides a semiconductor processing apparatus including the reaction chamber according to any one of the preceding aspects.
本發明具有以下有益效果： 本發明提供的上電極元件，其將功率饋入點設置在線圈的除端點之外的位置處，且該線圈的端點接地，以將線圈自該功率饋入點形成相互並聯的複數線圈分部，使得線圈的整體阻抗降低，相應地，線圈的整體電壓也降低，從而可以減小線圈上的電位分佈差異，提高電漿的分佈均勻性，進而提高製程均勻性。進一步地，在上電極元件包括介電質襯筒的情況下，由於線圈的整體電壓被降低，因而可以減少電漿中的離子對介電質襯筒的轟擊，從而減少了反應腔室內的顆粒污染。The present invention has the following beneficial effects: The upper electrode element provided by the present invention sets the power feeding point at a position other than the end point of the coil, and the end point of the coil is grounded to feed the coil from the power. Dots form multiple coil sections in parallel with each other, which reduces the overall impedance of the coil. Correspondingly, the overall voltage of the coil is also reduced, which can reduce the potential distribution difference on the coil, improve the uniformity of the plasma distribution, and improve the uniformity of the process. Sex. Further, in the case where the upper electrode element includes a dielectric liner, since the overall voltage of the coil is reduced, it is possible to reduce the bombardment of the dielectric liner by the ions in the plasma, thereby reducing particles in the reaction chamber. Pollution.
本發明提供的反應腔室及半導體加工裝置，其通過採用本發明提供的上述上電極元件，可以提高電漿的分佈均勻性，從而可以提高製程均勻性。By adopting the above-mentioned upper electrode element provided by the present invention, the reaction chamber and the semiconductor processing apparatus provided by the present invention can improve the uniformity of the plasma distribution, thereby improving the uniformity of the process.
為使本領域的技術人員更好地理解本發明的技術方案，下面結合附圖來對本發明提供的上電極元件、反應腔室及半導體加工裝置進行詳細描述。In order to enable those skilled in the art to better understand the technical solutions of the present invention, the upper electrode element, the reaction chamber, and the semiconductor processing device provided by the present invention will be described in detail below with reference to the accompanying drawings.
請參閱第3A圖，本實施例提供的上電極元件包括線圈10，在該線圈10上設置有功率饋入點103，其位於線圈10的除端點（第一端101和第二端102）之外的位置處。並且，線圈10的端點接地，由此，上述線圈10自功率饋入點103形成相互並聯的複數線圈分部。射頻電源12通過匹配器11與上述功率饋入點103電連接，用於通過該功率饋入點103向線圈10載入射頻功率。Referring to FIG. 3A, the upper electrode element provided in this embodiment includes a coil 10, and a power feeding point 103 is provided on the coil 10, which is located at the dividing end of the coil 10 (the first end 101 and the second end 102) Outside the location. In addition, since the end point of the coil 10 is grounded, the coil 10 forms a plurality of coil sections in parallel with each other from the power feeding point 103. The radio frequency power source 12 is electrically connected to the above-mentioned power feeding point 103 through the matcher 11, and is used to load radio frequency power into the coil 10 through the power feeding point 103.
如第3B圖所示，在本實施例中，上電極組件還包括介電質襯筒22，線圈10上的射頻能量通過該介電質襯筒22饋入反應腔室中。該介電質襯筒22呈環狀結構，且線圈10為多匝柱狀螺旋立體線圈，並環繞在該介電質襯筒22周圍。在本實施例中，功率饋入點103為一個，且位於線圈10的除第一端101與第二端102之外的某一指定位置處，以使該線圈10自該功率饋入點103形成兩個線圈分部，具體為（參照第3A圖）：第一線圈分部104和第二線圈分部105。其中，第一線圈分部104位於功率饋入點103的上方；第二線圈分部105位於功率饋入點103的下方。As shown in FIG. 3B, in this embodiment, the upper electrode assembly further includes a dielectric liner 22, and radio frequency energy on the coil 10 is fed into the reaction chamber through the dielectric liner 22. The dielectric liner 22 has a ring structure, and the coil 10 is a multi-turn cylindrical spiral three-dimensional coil, and surrounds the dielectric liner 22. In this embodiment, there is one power feeding point 103 and it is located at a specified position of the coil 10 except for the first end 101 and the second end 102, so that the coil 10 starts from the power feeding point 103 Two coil sections are formed, specifically (refer to FIG. 3A): a first coil section 104 and a second coil section 105. The first coil section 104 is located above the power feeding point 103; the second coil section 105 is located below the power feeding point 103.
通過將線圈10分成相互並聯的兩個線圈分部，使得線圈10的整體阻抗降低，相應地，線圈10的整體電壓也降低，從而可以減小線圈上的電位分佈差異，例如，可以減小每線圈分部中的每匝上的電位分佈差異以及不同匝之間的電位差異，從而可以提高由線圈10產生的電磁場在反應腔室內的分佈均勻性，進而可以提高電漿的分佈均勻性，提高製程均勻性。進一步地，在上電極元件包括介電質襯筒22的情況下，由於線圈10的整體電壓被降低，因而可以減少電漿中的離子對介電質襯筒22的轟擊，從而減少反應腔室內的顆粒污染。By dividing the coil 10 into two coil sections that are connected in parallel, the overall impedance of the coil 10 is reduced, and accordingly, the overall voltage of the coil 10 is also reduced, thereby reducing the difference in potential distribution on the coil. The potential distribution difference on each turn in the coil section and the potential difference between different turns can improve the distribution uniformity of the electromagnetic field generated by the coil 10 in the reaction chamber, thereby improving the uniformity of the plasma distribution and Process uniformity. Further, in the case where the upper electrode element includes the dielectric liner 22, since the overall voltage of the coil 10 is reduced, it is possible to reduce the bombardment of the dielectric liner 22 by the ions in the plasma, thereby reducing the reaction chamber. Particle pollution.
在實際應用中，可以通過改變功率饋入點103在線圈10上的位置，來調節由線圈10產生的電磁場在反應腔室內的分佈情況。可以通過設定第二線圈分部105的不同長度，來改變功率饋入點103在線圈10上的位置，較佳的，線圈10的總匝數為5.5，而第二線圈分部105的長度（單位為匝）與線圈10的總長度（單位為匝）的比值的取值範圍在0.9/5.5~1.1/5.5之間。採用上述範圍內的比值，可以獲得較好的電磁場分佈均勻性。In practical applications, the distribution of the electromagnetic field generated by the coil 10 in the reaction chamber can be adjusted by changing the position of the power feed-in point 103 on the coil 10. The position of the power feeding point 103 on the coil 10 can be changed by setting different lengths of the second coil section 105. Preferably, the total number of turns of the coil 10 is 5.5, and the length of the second coil section 105 ( The unit of turns) and the total length of the coil 10 (units of turns) range from 0.9 / 5.5 to 1.1 / 5.5. By adopting the ratio in the above range, a better uniformity of the electromagnetic field distribution can be obtained.
下面為採用先前技術中的線圈和本發明實施例中的線圈進行蝕刻製程，以及採用本發明實施例中的不同功率饋入點的位置的線圈進行蝕刻製程的對比試驗。在該對比試驗中，線圈10的總匝數為5.5。The following is a comparative test of the etching process using the coil in the prior art and the coil in the embodiment of the present invention, and the coil using the positions of different power feeding points in the embodiment of the present invention. In this comparative test, the total number of turns of the coil 10 was 5.5.
採用先前技術中的線圈進行蝕刻製程獲得的晶片蝕刻深度分佈如第4A圖所示，在晶片表面上，蝕刻深度等高線呈梯度式偏心分佈，從而蝕刻均勻性較低，一般為3%左右，沒有達到製程要求（2%）。另外，蝕刻深度等高線呈梯度式偏心分佈可能會引起晶片表面損傷的問題。The etching depth distribution of the wafer obtained by the etching process using the coil in the prior art is shown in FIG. 4A. On the wafer surface, the contour depth of the etching depth is eccentrically distributed in a gradient manner, so that the etching uniformity is low, generally about 3%. Meet process requirements (2%). In addition, the gradient depth eccentric distribution of the contours of the etching depth may cause the problem of wafer surface damage.
採用本發明實施例中的線圈10，且使第二線圈分部105的長度與線圈10的總長度的比值為1.15/5.5，採用該功率饋入點103位置的線圈10進行蝕刻製程獲得的晶片蝕刻深度分佈如第4B圖所示，蝕刻深度等高線仍然呈梯度式偏心分佈，蝕刻均勻性較低，而且可能會引起晶片表面損傷的問題。The coil 10 in the embodiment of the present invention is adopted, and the ratio of the length of the second coil sub-section 105 to the total length of the coil 10 is 1.15 / 5.5, and the wafer obtained by the etching process of the coil 10 at the power feed point 103 is used. The etching depth distribution is shown in FIG. 4B. The contour depth of the etching depth is still a gradient eccentric distribution, the etching uniformity is low, and the problem of wafer surface damage may be caused.
採用本發明實施例中的線圈10，且使第二線圈分部105的長度與線圈10的總長度的比值為1.1/5.5或1.05/5.5，採用這兩種該功率饋入點103位置的線圈10進行蝕刻製程獲得的晶片蝕刻深度分佈如第4C圖和第4D圖所示，蝕刻深度等高線趨於同心分佈，蝕刻均勻性有所提高（可達到2%），從而可以滿足製程要求，而且可以避免晶片表面損傷。The coil 10 in the embodiment of the present invention is adopted, and the ratio of the length of the second coil sub-section 105 to the total length of the coil 10 is 1.1 / 5.5 or 1.05 / 5.5. These two kinds of coils at the position of the power feed-in point 103 are used. 10The etching depth distribution of the wafer obtained by the etching process is shown in Figures 4C and 4D. The contours of the etching depth tend to be concentric and the etching uniformity is improved (up to 2%), which can meet the requirements of the process and can Avoid damage to the wafer surface.
採用本發明實施例中的線圈10，且使第二線圈分部105的長度與線圈10的總長度的比值為1/5.5，採用這該功率饋入點103位置的線圈10進行蝕刻製程獲得的晶片蝕刻深度分佈如第4E圖所示，蝕刻深度等高線的同心分佈情況優於第4C圖和第4D圖所示。The coil 10 in the embodiment of the present invention is used, and the ratio of the length of the second coil sub-section 105 to the total length of the coil 10 is 1 / 5.5. The wafer etching depth distribution is shown in FIG. 4E, and the concentric distribution of the etching depth contour is better than that shown in FIGS. 4C and 4D.
另外，在本實施例中，如第3A圖所示，線圈10的第一端101通過阻抗配置裝置13接地，而第二端102直接接地。通過設定阻抗配置裝置13的阻抗大小，來使第一線圈分部104和第二線圈分部105的電流方向相同或相反。具體來說，第一線圈分部104的下端接地，上端為功率饋入點103，由此第一線圈分部104中的電流自功率饋入點103向接地的下端流動。若使阻抗配置裝置13的阻抗足夠大，則第二線圈分部105中的電流自第二線圈分部105的連接阻抗配置裝置13的上端（即第一端101）朝向功率饋入點103流動，由此，第一線圈分部104和第二線圈分部105的電流方向相同。反之，若使阻抗配置裝置13的阻抗足夠小，則第二線圈分部105中的電流自功率饋入點103朝向第二線圈分部105的與阻抗配置裝置13連接的上端流動，由此，第一線圈分部104和第二線圈分部105的電流方向相反。因此，通過設定阻抗配置裝置13的阻抗大小，例如，使之足夠大或者足夠小，能夠改變第二線圈分部105中的電流方向。In addition, in this embodiment, as shown in FIG. 3A, the first end 101 of the coil 10 is grounded through the impedance configuration device 13, and the second end 102 is directly grounded. By setting the impedance size of the impedance arrangement device 13, the current directions of the first coil section 104 and the second coil section 105 are the same or opposite. Specifically, the lower end of the first coil sub-section 104 is grounded, and the upper end is the power feeding point 103, so that the current in the first coil sub-section 104 flows from the power feeding point 103 to the lower end of the ground. If the impedance of the impedance arrangement device 13 is made sufficiently large, the current in the second coil sub-section 105 flows from the upper end (ie, the first end 101) of the connection impedance arrangement device 13 of the second coil sub-section 105 toward the power feeding point 103. Therefore, the current directions of the first coil section 104 and the second coil section 105 are the same. Conversely, if the impedance of the impedance arrangement device 13 is made sufficiently small, the current in the second coil section 105 flows from the power feeding point 103 toward the upper end of the second coil section 105 that is connected to the impedance arrangement device 13, thereby, The current directions of the first coil section 104 and the second coil section 105 are opposite. Therefore, the direction of the current in the second coil section 105 can be changed by setting the magnitude of the impedance of the impedance arrangement device 13 to be sufficiently large or small, for example.
若第一線圈分部104和第二線圈分部105的電流方向相反，則分別由第一線圈分部104和第二線圈分部105產生的兩個電磁場相互抵消，這會對在二者之間存在的磁場強度差異進行補償，從而進一步提高了由上述兩個電磁場形成的疊加磁場的分佈均勻性。但是，上述兩個電磁場的相互抵消會減小疊加磁場的磁場強度，從而減小了電漿密度，因此，該方式適用於對電漿密度要求不高的製程。而對於對電漿密度要求較高的製程，則可以使第一線圈分部104和第二線圈分部105的電流方向相同，以提高電漿密度。If the current directions of the first coil sub-section 104 and the second coil sub-section 105 are opposite, the two electromagnetic fields generated by the first coil sub-section 104 and the second coil sub-section 105, respectively, will cancel each other out. The existing magnetic field strength difference is compensated, thereby further improving the distribution uniformity of the superimposed magnetic field formed by the two electromagnetic fields. However, the cancellation of the two electromagnetic fields mentioned above will reduce the magnetic field strength of the superimposed magnetic field, thereby reducing the plasma density. Therefore, this method is suitable for processes that do not require high plasma density. For processes with higher plasma density requirements, the current direction of the first coil section 104 and the second coil section 105 can be made the same to increase the plasma density.
上述阻抗配置裝置13可以包括可調電容。在進行製程之前，可以根據具體需要設置可調電容的大小，以獲得所需的阻抗值，從而提高了阻抗調節的靈活性。上述可調電容的可調範圍在0~2000pF，例如，0pF，20pF，50pF，100pF，200pF，300pF，500pF，800pF，900pF，1000pF，1200pF，1500pF，2000pF等。The above-mentioned impedance configuration device 13 may include an adjustable capacitor. Before the manufacturing process, the size of the adjustable capacitor can be set according to specific needs to obtain the required impedance value, thereby improving the flexibility of impedance adjustment. The adjustable range of the above-mentioned adjustable capacitor is 0 ~ 2000pF, for example, 0pF, 20pF, 50pF, 100pF, 200pF, 300pF, 500pF, 800pF, 900pF, 1000pF, 1200pF, 1500pF, 2000pF, etc.
另外，上述阻抗配置裝置13在起到決定電流方向的基礎上，還可以通過選擇合適的阻抗大小，來使匹配器11更容易實現阻抗匹配。例如，當線圈10的總匝數為5.5，第二線圈分部105的長度與線圈10的總長度的比值為1.1/5.5、1.05/5.5或者1/5.5時，上述可調電容的電容值可以在200~500pF的範圍內設定，200pF，250pF，300pF， 350pF，400pF，450pF，500pF等，較佳為350pF。In addition, in addition to determining the direction of the current, the impedance configuration device 13 described above can also make the matcher 11 easier to achieve impedance matching by selecting an appropriate impedance size. For example, when the total number of turns of the coil 10 is 5.5, and the ratio of the length of the second coil section 105 to the total length of the coil 10 is 1.1 / 5.5, 1.05 / 5.5, or 1 / 5.5, the capacitance value of the adjustable capacitor may be Set within the range of 200 ~ 500pF, 200pF, 250pF, 300pF, 350pF, 400pF, 450pF, 500pF, etc., preferably 350pF.
在實際應用中，上述阻抗配置裝置13和匹配器111可以整合於同一個殼體，也可以分別設置在不同的殼體中。可以理解，二者整合在同一個殼體中，可以減小裝置的佔用空間。In practical applications, the above-mentioned impedance configuration device 13 and the matcher 111 may be integrated in the same casing, or may be separately disposed in different casings. It can be understood that the two are integrated in the same casing, which can reduce the space occupied by the device.
需要說明的是，在本實施例中，線圈10的第一端101通過阻抗配置裝置13接地，而第二端102直接接地，但是本發明並不侷限於此，在實際應用中，也可以使線圈10的第一端101直接接地，而第二端102通過阻抗配置裝置13接地；或者，也可以分別為線圈10的第一端101和第二端102配置阻抗配置裝置13，且使阻抗配置裝置13接地；或者，還可以使線圈10的第一端101和第二端102均直接接地。It should be noted that, in this embodiment, the first end 101 of the coil 10 is grounded through the impedance configuration device 13 and the second end 102 is directly grounded. However, the present invention is not limited to this. In practical applications, the The first end 101 of the coil 10 is directly grounded, and the second end 102 is grounded through the impedance configuration device 13; or, the impedance configuration device 13 may be configured for the first end 101 and the second end 102 of the coil 10, respectively, and the impedance configuration The device 13 is grounded; alternatively, both the first end 101 and the second end 102 of the coil 10 may be directly grounded.
還需要說明的是，在本實施例中，線圈10為多匝柱狀螺旋立體線圈，即，該線圈10以螺旋線方式沿軸線方向延伸形成輪廓為柱體的立體結構，但是，本發明並不侷限於此，在實際應用中，線圈10也可以為單匝線圈。無論是單匝線圈還是多匝線圈，構成該線圈的導線沿垂直於該導線的軸向的方向進行剖切所得到的截面的形狀不受限制，例如，為梯形、矩形、正方形、圓形、橢圓形等。It should also be noted that, in this embodiment, the coil 10 is a multi-turn cylindrical spiral three-dimensional coil, that is, the coil 10 extends in a spiral manner in the axial direction to form a three-dimensional structure with a contour as a cylinder. Not limited to this, in practical applications, the coil 10 may also be a single-turn coil. Regardless of whether it is a single-turn coil or a multi-turn coil, the shape of the cross section obtained by cutting the wire constituting the coil in a direction perpendicular to the axial direction of the wire is not limited, for example, trapezoidal, rectangular, square, circular, Oval and so on.
進一步需要說明的是，在本實施例中，功率饋入點的數量為一個，但是本發明並不侷限於此，在實際應用中，功率饋入點的數量還可以為複數，且不同的功率饋入點位於線圈的除端點之外的不同位置，並且在相鄰的兩個功率饋入點之間設置有接地端點，即，在該線圈上，對應於每一功率饋入點，在其上游端和下游端均設置有接地端點，使得對於每一功率饋入點均設置有並聯在該功率饋入點和地之間的兩個線圈分部，這樣，在該線圈中，線圈分部的數量為功率饋入點數量的兩倍。例如，功率饋入點103為n個，線圈分部的數量為2n個，接地端點的數量為n+1個，其中，n為大於等於1的整數。功率饋入點和接地端點的排布關係遵循以下規律：對於每一功率饋入點而言，沿線圈的纏繞方向在該功率饋入點的上游和下游分別設置有一個接地端點，該功率饋入點和其上游接地端點之間的線圈構成對應於該功率饋入點的第一線圈分部，該功率饋入點和其下游接地端點之間的線圈構成對應於該功率饋入點的第二線圈分部，該第一線圈分部和第二線圈分部並聯在該功率饋入點和地之間。It should be further noted that, in this embodiment, the number of power feed-in points is one, but the present invention is not limited to this. In practical applications, the number of power feed-in points may also be a complex number and different powers. The feeding points are located at different positions of the coil except the end points, and a ground terminal is provided between two adjacent power feeding points, that is, on the coil, corresponding to each power feeding point, The upstream and downstream ends are provided with grounding terminals, so that for each power feeding point, two coil branches are connected in parallel between the power feeding point and the ground. In this way, in the coil, The number of coil sections is twice the number of power feed-in points. For example, the number of power feed-in points 103 is n, the number of coil sections is 2n, and the number of ground terminals is n + 1, where n is an integer greater than or equal to 1. The arrangement relationship between the power feed point and the ground terminal follows the following rules: For each power feed point, a ground terminal is provided upstream and downstream of the power feed point along the winding direction of the coil. The coil configuration between the power feed point and its upstream ground terminal corresponds to the first coil section of the power feed point, and the coil configuration between the power feed point and its downstream ground terminal corresponds to the power feed The second coil section of the entry point, the first coil section and the second coil section are connected in parallel between the power feeding point and the ground.
例如第5圖就示出了具有兩個功率饋入點的一種上電極組件的結構圖。如第5圖所示，本實施例提供的上電極元件包括線圈10，在該線圈10上設置有第一功率饋入點1031和第二功率饋入點1032，其位於線圈10的除上端點101和下端點1022之外的位置處，且上端點101定義為第一端點，下端點1022定義為第二端點，線圈10的纏繞方向為自上向下。其中，第一射頻電源121通過第一匹配器111與第一功率饋入點1031電連接，第二射頻電源122通過第二匹配器112與第二功率饋入點1032電連接，用於通過第一功率饋入點1031和第二功率饋入點1032向線圈10載入射頻功率。對應於第一功率饋入點1031，沿該線圈10的纏繞方向在第一功率饋入點1031的上游和下游分別設置有接地端點101和1021，該功率饋入點1031和其上游接地端點101之間的那一段線圈構成第一線圈分部，該功率饋入點1031和其下游接地端點1021之間的那一段線圈構成第二線圈分部，該第一線圈分部和第二線圈分部並聯在該功率饋入點1031和地之間。對應於第二功率饋入點1032，沿該線圈10的纏繞方向在第二功率饋入點1032的上游和下游分別設置有接地端點1021和1022，該功率饋入點1032和其上游接地端點1021之間的那一段線圈構成第一線圈分部，該功率饋入點1032和其下游接地端點1022之間的那一段線圈構成第二線圈分部，該第一線圈分部和第二線圈分部並聯在該功率饋入點1032和地之間。For example, FIG. 5 shows a structural diagram of an upper electrode assembly having two power feeding points. As shown in FIG. 5, the upper electrode element provided in this embodiment includes a coil 10, and a first power feeding point 1031 and a second power feeding point 1032 are provided on the coil 10, which are located at a dividing end of the coil 10. 101 and the lower end point 1022, the upper end point 101 is defined as the first end point, the lower end point 1022 is defined as the second end point, and the winding direction of the coil 10 is from top to bottom. The first radio frequency power source 121 is electrically connected to the first power feed point 1031 through the first matcher 111, and the second radio frequency power source 122 is electrically connected to the second power feed point 1032 through the second matcher 112, and is used to pass the first A power feeding point 1031 and a second power feeding point 1032 load radio frequency power into the coil 10. Corresponding to the first power feed point 1031, grounding terminals 101 and 1021 are respectively provided upstream and downstream of the first power feed point 1031 along the winding direction of the coil 10. The power feed point 1031 and its upstream ground end The section of coils between points 101 constitutes the first coil section, and the section of coils between the power feed-in point 1031 and its downstream ground terminal 1021 constitutes the second coil section, the first coil section and the second coil section The coil branch is connected in parallel between this power feed-in point 1031 and ground. Corresponding to the second power feed point 1032, grounding terminals 1021 and 1022 are respectively provided upstream and downstream of the second power feed point 1032 along the winding direction of the coil 10. The power feed point 1032 and its upstream ground terminal The section of coil between points 1021 constitutes a first coil section, and the section of coil between the power feed point 1032 and its downstream ground terminal 1022 constitutes a second coil section, the first coil section and the second coil section The coil branch is connected in parallel between this power feed-in point 1032 and ground.
在第5圖所示的上電極元件中，每一功率饋入點及其所對應的兩個接地端點、第一線圈分部和第二線圈分部以及相應的阻抗配置裝置構成一個上電極單元元件，每一上電極單元元件均類同於前面結合第3A圖和第3B圖所描述的實施例中的上電極元件，各上電極單元元件的結構、配置、參數選擇及由此帶來的相應效果均類似於前述第3A圖至第4E圖所示實施例，例如，每一功率饋入點所對應的第一線圈分部和第二線圈分部的匝數關係所產生的效果類似於前述第3A圖至第4E圖所示實施例，即，對於每一功率饋入點來說，第一線圈分部和第二線圈分部二者其一的長度與二者之和的總長度的比值的取值範圍較佳在0.5/5.5~2.5/5.5之間。進一步較佳地，第一線圈分部和第二線圈分部二者其一的長度與二者之和的總長度的比值的取值範圍可在0.7/5.5~1.5/5.5之間。進一步較佳地，第一線圈分部和第二線圈分部二者其一的長度與二者之和的總長度的比值的取值範圍可在0.9/5.5~1.1/5.5之間。例如，可以將第一線圈分部和第二線圈分部二者其一的長度與二者之和的總長度的比值設定為2.5/5.5、2.0/5.5、1.8/5.5、1.5/5.5、1.4/5.5、1.3/5.5、1.2/5.5、1.1/5.5、1.05/5.5、1.02/5.5、1/5.5、0.97/5.5、0.95/5.5、0.9/5.5、0.8/5.5、0.7/5.5、0.6/5.5或者0.5/5.5，以獲得較好的電磁場分佈均勻性。In the upper electrode element shown in FIG. 5, each power feeding point and its corresponding two ground terminals, the first coil section and the second coil section, and the corresponding impedance configuration device constitute an upper electrode. Unit element, each upper electrode unit element is similar to the upper electrode element in the embodiment described above in conjunction with FIG. 3A and FIG. 3B, and the structure, configuration, parameter selection of each upper electrode unit element and the resulting Corresponding effects are similar to the embodiments shown in FIGS. 3A to 4E. For example, the relationship between the number of turns of the first coil section and the second coil section corresponding to each power feed-in point is similar. In the foregoing embodiments shown in FIGS. 3A to 4E, that is, for each power feeding point, the total length of one of the first coil section and the second coil section and the sum of the two The range of the ratio of degrees is preferably between 0.5 / 5.5 and 2.5 / 5.5. Further preferably, the ratio of the length of one of the first coil section and the second coil section to the total length of the sum of the two can be between 0.7 / 5.5 and 1.5 / 5.5. Further preferably, the ratio of the length of one of the first coil section and the second coil section to the total length of the sum of the two can be in the range of 0.9 / 5.5 to 1.1 / 5.5. For example, the ratio of the length of one of the first coil section and the second coil section to the total length of the two can be set to 2.5 / 5.5, 2.0 / 5.5, 1.8 / 5.5, 1.5 / 5.5, 1.4 /5.5, 1.3 / 5.5, 1.2 / 5.5, 1.1 / 5.5, 1.05 / 5.5, 1.02 / 5.5, 1 / 5.5, 0.97 / 5.5, 0.95 / 5.5, 0.9 / 5.5, 0.8 / 5.5, 0.7 / 5.5, 0.6 / 5.5 Or 0.5 / 5.5 to obtain better uniformity of the electromagnetic field distribution.
可以理解的是，當功率饋入點的數量為兩個以上時，相鄰兩個功率饋入點之間設置有一個接地端點，即，這兩個功率饋入點共用一個接地端點。事實上，在兩個功率饋入點之間可以設置複數接地端子，由於這些接地端子等電位，因此將這些接地端子視為一個接地端點。對於線圈端點附近的接地端點，也做上述理解，在此不再贅述。It can be understood that when there are more than two power feeding points, a ground terminal is provided between two adjacent power feeding points, that is, the two power feeding points share one ground terminal. In fact, multiple ground terminals can be placed between two power feed-in points. Since these ground terminals are equipotential, these ground terminals are considered as a ground terminal. The above-mentioned understanding is also made about the ground terminal near the coil terminal, and it will not be repeated here.
進一步可以理解的是，線圈被分割為2倍於功率饋入點數量的線圈分部，這樣，線圈的整體電壓降低，從而可以減小線圈上的電位分佈差異，並且更加細化地調節該線圈產生的電磁場在反應腔室內的分佈均勻性，從而可以進一步提高電漿的分佈均勻性。另外，對於複數功率饋入點，每功率饋入點需要配備一套匹配器和射頻電源。It can be further understood that the coil is divided into coil sections that are twice the number of power feed-in points. In this way, the overall voltage of the coil is reduced, thereby reducing the potential distribution difference on the coil and adjusting the coil more finely. The uniformity of the generated electromagnetic field in the reaction chamber can further improve the uniformity of the plasma distribution. In addition, for complex power feed points, each power feed point needs to be equipped with a set of matchers and RF power.
此外，還需要說明的是，儘管前述實施例中以包含有介電質襯筒的上電極元件對本發明進行了詳細說明，但是本發明並不侷限於此。在實際應用中，在不影響製程品質的情況下，也可以不設置用來將線圈上的射頻能量饋入反應腔室中的介電質襯筒，而是將線圈直接設置在反應腔室內，例如，在線圈為消耗型線圈（線圈本身即為濺鍍靶材，或者線圈的材質與濺鍍靶材一致）的情況下。In addition, it should be noted that although the present invention has been described in detail with the upper electrode element including a dielectric liner in the foregoing embodiment, the present invention is not limited thereto. In practical applications, without affecting the quality of the process, a dielectric liner for feeding RF energy from the coil into the reaction chamber may not be provided, but the coil may be directly disposed in the reaction chamber. For example, when the coil is a consumable coil (the coil itself is a sputtering target, or the material of the coil is the same as the sputtering target).
作為另一個技術方案，如第6圖所示，本發明還提供一種反應腔室21，其包括本發明上述實施例提供的上電極元件。該上電極組件包括介電質襯筒22和環繞在該介電質襯筒22周圍的線圈10，其中，介電質襯筒22設置在反應腔室21的側壁211中；射頻電源12通過匹配器11與線圈10上的上述功率饋入點103電連接，用於通過該功率饋入點103向線圈10載入射頻功率。射頻能量通過介電質襯筒22饋入反應腔室21中。並且，在反應腔室21中還設置有基座24，該基座24通過基座匹配器25與基座射頻電源26電連接，基座射頻電源26用於向基座24載入負偏壓，以吸引電漿蝕刻晶片表面。As another technical solution, as shown in FIG. 6, the present invention further provides a reaction chamber 21 including the upper electrode element provided by the foregoing embodiment of the present invention. The upper electrode assembly includes a dielectric liner 22 and a coil 10 surrounding the dielectric liner 22, wherein the dielectric liner 22 is disposed in a side wall 211 of the reaction chamber 21; The device 11 is electrically connected to the power feed point 103 on the coil 10, and is configured to load the radio frequency power into the coil 10 through the power feed point 103. Radio frequency energy is fed into the reaction chamber 21 through a dielectric liner 22. In addition, a base 24 is also provided in the reaction chamber 21. The base 24 is electrically connected to the base RF power source 26 through the base matching unit 25. The base RF power source 26 is used to load a negative bias voltage to the base 24. To attract the plasma to etch the wafer surface.
在本實施例中，反應腔室21還包括法拉第遮罩件23，該法拉第遮罩件23環繞設置在介電質襯筒22的內側，用於保護介電質襯筒22不被電漿蝕刻，同時避免自晶片表面濺鍍出來的殘留物附著在介電質襯筒22的內壁上，從而可以提高介電質襯筒22的能量耦合效率，減少反應腔室21內的顆粒污染。並且，法拉第遮罩件23包括導電環體，在該導電環體上形成有開縫，以避免法拉第遮罩件23產生渦流損耗和發熱。In this embodiment, the reaction chamber 21 further includes a Faraday shield 23, which is arranged around the inside of the dielectric liner 22 to protect the dielectric liner 22 from being etched by the plasma. At the same time, the residue sputtered from the surface of the wafer is prevented from adhering to the inner wall of the dielectric liner 22, so that the energy coupling efficiency of the dielectric liner 22 can be improved, and the particle pollution in the reaction chamber 21 can be reduced. In addition, the Faraday shield 23 includes a conductive ring body, and a slit is formed in the conductive ring body to prevent the Faraday shield 23 from generating eddy current loss and heat generation.
借助上述法拉第遮罩件23的電磁遮罩效應，可以進一步減小線圈10中存在的電位差異，而且可以對電磁場的分佈產生二次分佈影響，從而可以進一步提高電漿的分佈均勻性，提高製程均勻性。另外，借助法拉第遮罩件23的物理阻擋作用，可以有效防止金屬沉積在介電質襯筒22的內壁上，從而可以避免磁場耦合效率降低。With the electromagnetic shielding effect of the Faraday shielding member 23 described above, the potential difference existing in the coil 10 can be further reduced, and the secondary distribution effect on the electromagnetic field distribution can be further improved, thereby further improving the uniformity of the plasma distribution and the manufacturing process. Uniformity. In addition, by virtue of the physical blocking effect of the Faraday shield 23, metal can be effectively prevented from being deposited on the inner wall of the dielectric liner 22, so that the coupling efficiency of the magnetic field can be prevented from being lowered.
在本實施例中，如第7圖所示，上述開縫包括第一子開縫232和第二子開縫231，其中，第一子開縫232沿上述導電環體的圓周方向設置，且與該導電環體的軸線之間形成夾角，用以通過增加電磁場在導電環體的圓周方向上的電場分量的耦合效率，來增加該電磁場的總耦合效率。該第一子開縫232與該導電環體的軸線之間所形成的夾角為90°。上述第一子開縫232為複數，且沿上述導電環體的圓周方向均勻分佈。第二子開縫231沿導電環體的軸向設置，且該第二子開縫231為複數，且沿上述導電環體的圓周方向均勻分佈。In this embodiment, as shown in FIG. 7, the slit includes a first sub slit 232 and a second sub slit 231, wherein the first sub slit 232 is disposed along a circumferential direction of the conductive ring body, and An included angle is formed with the axis of the conductive ring body to increase the total coupling efficiency of the electromagnetic field by increasing the coupling efficiency of the electric field component of the electromagnetic field in the circumferential direction of the conductive ring body. An included angle formed between the first sub slit 232 and an axis of the conductive ring body is 90 °. The first sub slits 232 are plural and are evenly distributed along the circumferential direction of the conductive ring body. The second sub slits 231 are provided along the axial direction of the conductive ring body, and the second sub slits 231 are plural and are evenly distributed along the circumferential direction of the conductive ring body.
由線圈10產生的電磁場可以劃分為導電環體的軸向上的磁場分量和導電環體的圓周方向上的電場分量。導電環體的軸向上的磁場分量能夠通過上述第二子開縫231饋入反應腔室21內，同時，導電環體的圓周方向上的電場分量通過上述第一子開縫232饋入反應腔室21內，從而增加了電磁場的總耦合效率。The electromagnetic field generated by the coil 10 can be divided into a magnetic field component in the axial direction of the conductive ring body and an electric field component in the circumferential direction of the conductive ring body. The magnetic field component in the axial direction of the conductive ring body can be fed into the reaction chamber 21 through the second sub-slit 231, and the electric field component in the circumferential direction of the conductive ring body is fed into the reaction chamber through the first sub-slot 232. Chamber 21, thereby increasing the overall coupling efficiency of the electromagnetic field.
需要說明的是，在實際應用中，也可以僅設置上述第一子開縫232，且該第一子開縫232相對於導電環體的軸線傾斜，較佳的，第一子開縫232與導電環體的軸線之間形成夾角較佳為45°。這樣，導電環體的軸向上的磁場分量在該第一子開縫232的傾斜方向上的子分量能夠通過第一子開縫232饋入反應腔室21內，同時導電環體的圓周方向上的電場分量在該第一子開縫232的傾斜方向上的子分量能夠通過第一子開縫232饋入反應腔室21內。It should be noted that, in practical applications, only the first sub-slot 232 may be provided, and the first sub-slot 232 is inclined with respect to the axis of the conductive ring body. Preferably, the first sub-slot 232 and The angle formed between the axes of the conductive ring bodies is preferably 45 °. In this way, the sub-components of the magnetic field component in the axial direction of the conductive ring body in the oblique direction of the first sub-slot 232 can be fed into the reaction chamber 21 through the first sub-slot 232, while the conductive ring body is in the circumferential direction. The sub-component of the electric field component in the oblique direction of the first sub-slot 232 can be fed into the reaction chamber 21 through the first sub-slot 232.
在實際應用中，上述法拉第遮罩件23可以接地，或者也可以電位懸浮。並且，法拉第遮罩件23可以為單層的筒狀結構；也可以為兩個直徑不同的筒狀結構嵌套在一起而形成的2層或更多層的筒狀結構。In practical applications, the above-mentioned Faraday shield 23 may be grounded, or the potential may be suspended. In addition, the Faraday shield 23 may be a single-layered tubular structure; it may also be a two- or more-layered tubular structure formed by nesting two tubular structures with different diameters.
較佳的，法拉第遮罩件23的上端面高於介電質襯筒22的上端面；法拉第遮罩件23的下端面低於介電質襯筒22的下端面，以保證法拉第遮罩件23完全覆蓋介電質襯筒22的內表面。另外，可以在法拉第遮罩件23的內表面做熔射等的粗化處理，以防止附著在法拉第遮罩件23的內表面上的顆粒脫落，污染晶片表面。Preferably, the upper end face of the Faraday shield member 23 is higher than the upper end face of the dielectric liner 22; the lower end face of the Faraday shield member 23 is lower than the lower end face of the dielectric liner 22 to ensure the Faraday shield member 23 completely covers the inner surface of the dielectric liner 22. In addition, the inner surface of the Faraday mask 23 may be subjected to roughening treatment such as spraying to prevent particles attached to the inner surface of the Faraday mask 23 from falling off and contaminating the surface of the wafer.
在實際應用中，反應腔室可以為預清洗腔室。In practical applications, the reaction chamber may be a pre-cleaning chamber.
較佳的，對於含氫的預清洗製程，預清洗腔室中的上射頻電源28可以採用較低的頻率（13.56MHz以下），例如2MHz，這可以使氫原子的激發和離化程度減緩，從而減少氫原子與晶片表面反應釋放出的熱量，從而可以實現低溫預清洗製程。Preferably, for a hydrogen-containing pre-cleaning process, the upper RF power source 28 in the pre-cleaning chamber may use a lower frequency (below 13.56 MHz), for example, 2 MHz, which can slow the excitation and ionization of hydrogen atoms. Therefore, the heat released from the reaction between the hydrogen atoms and the wafer surface can be reduced, so that a low-temperature pre-cleaning process can be realized.
綜上所述，本發明實施例提供的反應腔室，其通過採用本發明上述實施例提供的上電極元件，可以提高電漿的分佈均勻性，從而可以提高製程均勻性。In summary, the reaction chamber provided by the embodiment of the present invention can improve the uniformity of the plasma distribution by using the upper electrode element provided by the above-mentioned embodiment of the present invention, thereby improving the uniformity of the manufacturing process.
作為再一個技術方案，本發明還提供一種半導體加工裝置，其包括前述實施例所述的反應腔室。本發明提供的半導體加工裝置通過採用本發明提供的上述反應腔室，可以提高電漿的分佈均勻性，從而可以提高製程均勻性。As yet another technical solution, the present invention further provides a semiconductor processing apparatus including the reaction chamber described in the foregoing embodiment. By adopting the above-mentioned reaction chamber provided by the present invention, the semiconductor processing device provided by the present invention can improve the uniformity of the plasma distribution, thereby improving the process uniformity.
可以理解的是，以上實施方式僅僅是為了說明本發明的原理而採用的範例性實施方式，然而本發明並不侷限於此。對於本領域內的普通技術人員而言，在不脫離本發明的精神和實質的情況下，可以做出各種變型和改進，這些變型和改進也視為本發明的保護範圍。It can be understood that the above implementations are merely exemplary implementations adopted to explain the principle of the present invention, but the present invention is not limited thereto. For those of ordinary skill in the art, various variations and improvements can be made without departing from the spirit and essence of the present invention, and these variations and improvements are also considered as the protection scope of the present invention.
1‧‧‧腔體1‧‧‧ cavity
2、22‧‧‧介電質襯筒2, 22‧‧‧ Dielectric Liner
3‧‧‧射頻線圈3‧‧‧ RF coil
4‧‧‧上匹配器4‧‧‧Up Matcher
5‧‧‧上射頻電源5‧‧‧ on RF power
6‧‧‧基座6‧‧‧ base
7‧‧‧晶片7‧‧‧Chip
8‧‧‧下匹配器8‧‧‧ Down Matcher
9‧‧‧下射頻電源9‧‧‧ under RF power
10‧‧‧線圈10‧‧‧ Coil
11‧‧‧匹配器11‧‧‧ Matcher
12‧‧‧射頻電源12‧‧‧ RF Power
13‧‧‧阻抗配置裝置13‧‧‧ impedance configuration device
21‧‧‧反應腔室21‧‧‧ reaction chamber
23‧‧‧法拉第遮罩件23‧‧‧ Faraday Mask
24‧‧‧基座24‧‧‧ base
25‧‧‧基座匹配器25‧‧‧ Base Matcher
26‧‧‧基座射頻電源26‧‧‧Base RF Power
101‧‧‧第一端、上端點101‧‧‧ first end, upper end
102‧‧‧第二端102‧‧‧ the second end
103‧‧‧功率饋入點103‧‧‧Power feed point
104‧‧‧第一線圈分部104‧‧‧First coil branch
105‧‧‧第二線圈分部105‧‧‧Second Coil Division
111‧‧‧第一匹配器111‧‧‧First Matcher
112‧‧‧第二匹配器112‧‧‧Second Matcher
122‧‧‧第二射頻電源122‧‧‧Second RF Power Supply
121‧‧‧第一射頻電源121‧‧‧First RF Power Supply
211‧‧‧側壁211‧‧‧ sidewall
231‧‧‧第二子開縫231‧‧‧Second child slit
232‧‧‧第一子開縫232‧‧‧First child slit
1021‧‧‧接地端點1021‧‧‧ Ground terminal
1022‧‧‧下端點1022‧‧‧ lower endpoint
1031‧‧‧第一功率饋入點1031‧‧‧First power feed point
1032‧‧‧第二功率饋入點1032‧‧‧Second power feed point
第1圖為現有的一種預清洗腔室的剖視圖； 第2圖為射頻線圈的功率饋入點的位置示意圖； 第3A圖為本發明實施例提供的上電極元件的一種結構圖； 第3B圖為本發明實施例提供的上電極元件的另一種結構圖； 第4A圖為採用先前技術中的線圈進行蝕刻製程獲得的晶片蝕刻深度分佈圖； 第4B圖為採用本發明實施例中的一種線圈進行蝕刻製程獲得的晶片蝕刻深度分佈圖； 第4C圖為採用本發明實施例中的另一種線圈進行蝕刻製程獲得的晶片蝕刻深度分佈圖； 第4D圖為採用本發明實施例中的又一種線圈進行蝕刻製程獲得的晶片蝕刻深度分佈圖； 第4E圖為採用本發明實施例中的再一種線圈進行蝕刻製程獲得的晶片蝕刻深度分佈圖； 第5圖為本發明實施例提供的具有兩個功率饋入點的上電極元件的結構圖； 第6圖為本發明實施例提供的反應腔室的剖視圖； 第7圖為本發明實施例採用的法拉第遮罩件的結構圖。FIG. 1 is a cross-sectional view of a conventional pre-cleaning chamber; FIG. 2 is a schematic diagram of a position of a power feeding point of a radio frequency coil; FIG. 3A is a structural diagram of an upper electrode element according to an embodiment of the present invention; FIG. 4A is another structural diagram of the upper electrode element provided in the embodiment of the present invention; FIG. 4A is a wafer etching depth distribution diagram obtained by using the coil in the prior art for the etching process; FIG. 4B is a coil using an embodiment of the present invention Wafer etching depth distribution map obtained by performing the etching process; FIG. 4C is a wafer etching depth distribution map obtained by using another coil in the embodiment of the present invention to perform the etching process; FIG. 4D is a further coil used in the embodiment of the present invention Wafer etch depth distribution map obtained by performing the etching process; FIG. 4E is a wafer etch depth distribution map obtained by using another coil in the embodiment of the present invention to perform the etch process; FIG. 5 is an embodiment of the present invention with two powers Structural diagram of the upper electrode element at the feeding point; FIG. 6 is a cross-sectional view of a reaction chamber provided by an embodiment of the present invention; FIG. 7 is a FIG Faraday shield member structure employed in the next embodiment.
Claims (15)
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| CN109712859B (en) * | 2017-10-25 | 2021-06-08 | 北京北方华创微电子装备有限公司 | Chamber |
| CN110536533A (en) * | 2018-06-07 | 2019-12-03 | 北京北方华创微电子装备有限公司 | Upper electrode system, plasma chamber and method of generating plasma |
| CN110660635B (en) * | 2018-06-29 | 2022-08-16 | 北京北方华创微电子装备有限公司 | Process chamber and semiconductor processing equipment |
| CN114446761B (en) * | 2022-01-26 | 2024-06-21 | 北京北方华创微电子装备有限公司 | Semiconductor processing equipment |
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| US5540824A (en) * | 1994-07-18 | 1996-07-30 | Applied Materials | Plasma reactor with multi-section RF coil and isolated conducting lid |
| US5710486A (en) * | 1995-05-08 | 1998-01-20 | Applied Materials, Inc. | Inductively and multi-capacitively coupled plasma reactor |
| TW327236B (en) * | 1996-03-12 | 1998-02-21 | Varian Associates | Inductively coupled plasma reactor with faraday-sputter shield |
| US6353206B1 (en) * | 1996-05-30 | 2002-03-05 | Applied Materials, Inc. | Plasma system with a balanced source |
| JP2002237486A (en) * | 2001-02-08 | 2002-08-23 | Tokyo Electron Ltd | Apparatus and method of plasma treatment |
| US20040182319A1 (en) * | 2003-03-18 | 2004-09-23 | Harqkyun Kim | Inductively coupled plasma generation system with a parallel antenna array having evenly distributed power input and ground nodes |
| KR100777151B1 (en) * | 2006-03-21 | 2007-11-16 | 주식회사 디엠에스 | Hybrid coupled plasma reactor with icp and ccp functions |
| US9137884B2 (en) * | 2006-11-29 | 2015-09-15 | Lam Research Corporation | Apparatus and method for plasma processing |
| CN101582322B (en) * | 2008-05-12 | 2012-06-06 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Inductance coupling coil and plasma processing device adopting same |
| JP5800532B2 (en) * | 2011-03-03 | 2015-10-28 | 東京エレクトロン株式会社 | Plasma processing apparatus and plasma processing method |
| US9293353B2 (en) * | 2011-04-28 | 2016-03-22 | Lam Research Corporation | Faraday shield having plasma density decoupling structure between TCP coil zones |
| CN103014745B (en) * | 2011-09-28 | 2015-07-08 | 北京北方微电子基地设备工艺研究中心有限责任公司 | Plasma pre-cleaning device |
| JP6285052B2 (en) * | 2015-02-02 | 2018-02-28 | 株式会社日立国際電気 | Semiconductor device manufacturing method, program, and substrate processing apparatus |
| CN107256822B (en) * | 2017-07-27 | 2019-08-23 | 北京北方华创微电子装备有限公司 | Top electrode assembly and reaction chamber |
| CN207338296U (en) * | 2017-07-27 | 2018-05-08 | 北京北方华创微电子装备有限公司 | Top electrode assembly, reaction chamber and semiconductor processing equipment |
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