TW201825384A - Memory device - Google Patents
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- TW201825384A TW201825384A TW106128447A TW106128447A TW201825384A TW 201825384 A TW201825384 A TW 201825384A TW 106128447 A TW106128447 A TW 106128447A TW 106128447 A TW106128447 A TW 106128447A TW 201825384 A TW201825384 A TW 201825384A
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Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/10—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a repetitive configuration
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/788—Field effect transistors with field effect produced by an insulated gate with floating gate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/792—Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors
-
- H—ELECTRICITY
- H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
- H10B—ELECTRONIC MEMORY DEVICES
- H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
- H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
Landscapes
- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Ceramic Engineering (AREA)
- Semiconductor Memories (AREA)
Abstract
Description
本發明關於記憶組件。 本案係基於2016年8月22日於日本申請之特願2016-162048號主張優先權，並將其內容援用於此。The invention relates to a memory component. This case is based on the priority of 2016-162048, which was filed on August 22, 2016 in Japan, and its contents are hereby incorporated.
背景技術 作為非揮發性記憶體，已知有快閃記憶體。快閃記憶體具有浮閘，於浮閘內儲存電荷。快閃記憶體利用電荷是否保持於浮閘內來記錄資料，且利用檢測其進行資料的讀取。Background Art As a non-volatile memory, a flash memory is known. The flash memory has a floating gate that stores charge in the floating gate. The flash memory records data using whether the charge remains in the floating gate, and uses the detection to read the data.
伴隨行動裝置的小型化，要求快閃記憶體小型化、低耗電等，從而對可實現此等要求之方法進行研究。例如於專利文獻1中記載有於浮閘使用奈米點之記憶組件。藉由使用奈米點，實現元件小型化及動作電壓的減低。於專利文獻3中記載有一種記憶組件，其於浮閘使用富勒烯或團簇，且於電荷儲存時富勒烯或團簇形成二聚體。 又，於非專利文獻1中記載有使用奈米碳管之記憶組件，於非專利文獻2中記載有使用奈米複合材料之記憶組件。 又，作為次世代之記憶組件而受到期待的組件，已知有於活性層(通道層)使用有機半導體之有機記憶體(例如參照專利文獻4、專利文獻5)。With the miniaturization of mobile devices, miniaturization of flash memory, low power consumption, and the like are required, and methods for realizing such requirements are studied. For example, Patent Document 1 describes a memory module in which a nano-point is used for a floating gate. By using a nano point, the device is miniaturized and the operating voltage is reduced. Patent Document 3 describes a memory module in which fullerenes or clusters are used in a floating gate, and fullerenes or clusters form a dimer at the time of charge storage. Further, Non-Patent Document 1 discloses a memory module using a carbon nanotube, and Non-Patent Document 2 discloses a memory module using a nano composite material. In addition, an organic memory using an organic semiconductor in an active layer (channel layer) is known as a component that is expected to be a next-generation memory module (see, for example, Patent Document 4 and Patent Document 5).
先行技術文獻 專利文獻 [專利文獻1]日本特開2007-73961號公報 [專利文獻2]日本專利第5493139號公報 [專利文獻3]日本特開2015-128192號公報 [專利文獻4]日本特開2008-166710號公報 [專利文獻5]日本特開2009-538525號公報Japanese Patent Laid-Open Publication No. JP-A No. Hei. No. Hei. No. Hei. No. Hei. No. Hei. Publication No. 2008-166710 [Patent Document 5] Japanese Laid-Open Patent Publication No. 2009-538525
非專利文獻 [非專利文獻1]M.F.Mabrook et al.,Materials Science and Engineering B,159-160(2009)14-17. [非專利文獻2]A.Zubair et al.,Microelectronic Engineering,99(2012)62-66.Non-Patent Document [Non-Patent Document 1] MF Mabrook et al., Materials Science and Engineering B, 159-160 (2009) 14-17. [Non-Patent Document 2] A. Zubair et al., Microelectronic Engineering, 99 (2012) ) 62-66.
發明概要 發明欲解決之課題 然而，專利文獻1及非專利文獻1、2所記載之記憶組件之遲滯寬度較窄。因此，有因資料寫入、改寫時所施加之電壓小幅波動以致應記錄的資料被改寫之情形。即，專利文獻1記載之記憶組件之資料可靠性不能說是充分。又，縱使能沒有錯誤地保存了資料，亦需精密地控制施加電壓。Disclosure of the Invention Problems to be Solved by the Invention However, the memory modules described in Patent Document 1 and Non-Patent Documents 1 and 2 have a narrow hysteresis width. Therefore, there is a case where the voltage applied when the data is written or rewritten is slightly fluctuated so that the recorded data is rewritten. In other words, the reliability of the data of the memory module described in Patent Document 1 cannot be said to be sufficient. Moreover, even if the data can be stored without error, it is necessary to precisely control the applied voltage.
再者，奈米點之粒子彼此容易凝聚，若凝聚則物性發生變化。因此，閾值、電子保持時間等記憶組件特性會產生不均。Furthermore, the particles of the nano-dots are easily condensed with each other, and if they are condensed, the physical properties change. Therefore, the characteristics of the memory components such as the threshold value and the electronic holding time may be uneven.
本發明為鑑於上述情事而完成者，其目的在於提供一種利用奈米團簇的記憶組件。The present invention has been made in view of the above circumstances, and an object thereof is to provide a memory module using nano clusters.
用以解決課題之手段 本發明人等發現，藉由於電荷保持層(浮閘)使用奈米團簇，改變構成奈米團簇之原子數(以下稱為團簇尺寸)，可改變遲滯寬度。 即，為解決上述問題，本發明採用以下手段。Means for Solving the Problem The present inventors have found that the hysteresis width can be changed by changing the number of atoms constituting the nano-clusters (hereinafter referred to as the cluster size) by using the nano-clusters in the charge-holding layer (floating gate). That is, in order to solve the above problems, the present invention employs the following means.
(1)第1實施形態之記憶組件依序具備半導體部、第1絕緣層、電荷保持層、第2絕緣層及電極，前述電荷保持層主要包含特定原子數的奈米團簇。(1) The memory module of the first embodiment includes a semiconductor portion, a first insulating layer, a charge holding layer, a second insulating layer, and an electrode, and the charge holding layer mainly contains a nano cluster having a specific atomic number.
(2)如上述態樣之記憶組件，其中前述奈米團簇可離散配置。(2) The memory module according to the above aspect, wherein the aforementioned nano clusters are discretely arranged.
(3)如上述態樣之記憶組件，其中前述電荷保持層所含奈米團簇之中，特定原子數的奈米團簇可為5%以上。(3) The memory module according to the above aspect, wherein among the nano clusters contained in the charge holding layer, the nano clusters having a specific atomic number may be 5% or more.
(4)如上述態樣之記憶組件，其中前述奈米團簇可為金屬、合金、金屬氧化物、半導體、陶瓷或其等複合物之奈米團簇。(4) The memory module according to the above aspect, wherein the nano-clusters may be nano-clusters of a metal, an alloy, a metal oxide, a semiconductor, a ceramic or the like.
(5)如上述態樣之記憶組件，其中前述奈米團簇之構成單元可包含選自於由Au、Ag、Pt、Pd、Ti、Al、Ta、Mo及W所構成群組中之一種以上元素。(5) The memory module according to the above aspect, wherein the constituent unit of the nano cluster may include one selected from the group consisting of Au, Ag, Pt, Pd, Ti, Al, Ta, Mo, and W. The above elements.
(6)如上述態樣之記憶組件，其中前述奈米團簇可為以M@Si表示之內包金屬離子的團簇。(6) The memory module according to the above aspect, wherein the nano cluster is a cluster of metal ions enclosed by M@Si.
(7)如上述態樣之記憶組件，其中前述奈米團簇可為Ta與Si之複合奈米團簇、Ti與Si之複合奈米團簇、Ru與Si之複合奈米團簇、Lu與Si之複合奈米團簇、Mo與Si之複合奈米團簇、W與Si之複合奈米團簇中之任一者。(7) The memory component according to the above aspect, wherein the nano cluster is a composite nano-cluster of Ta and Si, a composite nano-clustered layer of Ti and Si, a composite nano-cluster of Ru and Si, Lu Any of the composite nano-clusters with Si, the composite nano-clusters of Mo and Si, and the composite nano-clusters of W and Si.
(8)如上述態樣之記憶組件，其中前述奈米團簇可於表面具有有機配位基。(8) The memory module according to the above aspect, wherein the aforementioned nano clusters have an organic ligand on the surface.
(9)如上述態樣之記憶組件，其中前述有機配位基可於前述奈米團簇表面形成有單分子膜。(9) The memory module according to the above aspect, wherein the organic ligand is formed with a monomolecular film on the surface of the nano-clusters.
(10)如上述態樣之記憶組件，其中前述有機配位基可為具有以化學式RnX表示之結構的構造。其中於化學式中，R為烷基、烯丙基、炔基、芳基、烯基、矽基、芳烷基或烷氧矽基，X為硫、硒、磷、氮，n為自然數。(10) The memory module according to the above aspect, wherein the aforementioned organic ligand may be a structure having a structure represented by a chemical formula RnX. Wherein in the formula, R is an alkyl group, an allyl group, an alkynyl group, an aryl group, an alkenyl group, a decyl group, an aralkyl group or an alkoxy group, X is sulfur, selenium, phosphorus, nitrogen, and n is a natural number.
(11)如上述態樣之記憶組件，其中具有前述有機配位基之奈米團簇可為Au25 (SR)18 、Au38 (SR)24 、Au144 (SR)60 中之任一者。(11) The memory module according to the above aspect, wherein the nano cluster having the aforementioned organic ligand may be any one of Au 25 (SR) 18 , Au 38 (SR) 24 , and Au 144 (SR) 60 .
(12)如上述態樣之記憶組件，其中前述電荷保持層可為具有層狀排列之奈米團簇膜的構造。(12) The memory module according to the above aspect, wherein the charge retention layer may be a structure having a layered arrangement of a nano-clay film.
(13)如上述態樣之記憶組件，其中前述第2絕緣層可包含氟樹脂。(13) The memory module according to the above aspect, wherein the second insulating layer may contain a fluororesin.
(14)如上述態樣之記憶組件，其中前述第2絕緣層之吸水率可為未達0.02%，氧透過係數可為未達2.0×10-9 cm3 ·cm/cm2 ·s·cmHg。(14) The memory module according to the above aspect, wherein the water absorption rate of the second insulating layer may be less than 0.02%, and the oxygen permeability coefficient may be less than 2.0 × 10 -9 cm 3 · cm / cm 2 · s · cmHg .
(15)如上述態樣之記憶組件，其中前述電荷保持層中之奈米團簇之面密度可為1×1012 個/cm2 ~3×1014 個/cm2 。(15) The memory module according to the above aspect, wherein the surface density of the nano-clusters in the charge holding layer may be 1 × 10 12 /cm 2 to 3 × 10 14 /cm 2 .
(16)如上述態樣之記憶組件，其中前述電荷保持層可具有前述奈米團簇引致之離散的電子位準。(16) The memory module according to the above aspect, wherein the charge retention layer may have a discrete electronic level caused by the aforementioned nano cluster.
發明效果 可提供利用奈米團簇之記憶組件。Effect of the Invention A memory module using a nano cluster can be provided.
用以實施發明之形態 以下，說明本發明之一態樣之構造，視需要使用圖式。以下說明所使用之圖式，有為了方便容易理解特徵而將成為特徵之部分放大顯示之情形，各構成要件之尺寸比率等不一定與實際相同。於以下說明中例示之材料、尺寸等僅為一例，本發明不限定於此等例示，可於不改變其主旨之範圍內適當變更後實施。例如於發揮本發明效果之範圍內亦可具有其他層。MODE FOR CARRYING OUT THE INVENTION Hereinafter, a configuration of one aspect of the present invention will be described, and a drawing will be used as needed. In the following description, the drawings used are enlarged in order to facilitate the understanding of the features, and the dimensional ratios and the like of the respective constituent elements are not necessarily the same as the actual ones. The materials, dimensions, and the like described in the following description are merely examples, and the present invention is not limited to the examples, and may be appropriately modified without departing from the scope of the invention. For example, other layers may be provided within the scope of exerting the effects of the present invention.
圖1為第1實施形態之記憶組件10之剖面示意圖。 圖1所示之記憶組件10依序具備半導體部1、第1絕緣層2、電荷保持層3、第2絕緣層4及電極5。又，圖1所示之記憶組件10在與電極5相反側之面具有對向電極6。 再者，所謂「依序具備」之構造不限於半導體部、第1絕緣層、電荷保持層、第2絕緣層及電極以哪個垂直剖面(圖1中上下分割之剖面)依序具備之構造之情形，意指以發揮各構成要件之功能之方式之「實質上依序具備」。Fig. 1 is a schematic cross-sectional view showing the memory module 10 of the first embodiment. The memory module 10 shown in FIG. 1 includes a semiconductor portion 1, a first insulating layer 2, a charge holding layer 3, a second insulating layer 4, and an electrode 5 in this order. Further, the memory module 10 shown in FIG. 1 has a counter electrode 6 on the surface opposite to the electrode 5. In addition, the structure of "sequentially provided" is not limited to the structure in which the semiconductor portion, the first insulating layer, the charge holding layer, the second insulating layer, and the electrode are vertically arranged (the upper and lower divided sections in FIG. 1) are sequentially provided. The situation means "substantially in order" in a manner that exerts the functions of the constituent elements.
記憶組件10為於由第1絕緣層2及第2絕緣層4夾持之電荷保持層3內儲存電荷(電子或電洞)之記憶元件。藉由電極5與對向電極6之間之電位差經由第1絕緣層2從半導體部1授受電荷。The memory module 10 is a memory element that stores electric charges (electrons or holes) in the charge holding layer 3 sandwiched between the first insulating layer 2 and the second insulating layer 4. The electric charge is received from the semiconductor portion 1 via the first insulating layer 2 by the potential difference between the electrode 5 and the counter electrode 6.
構成半導體部1之材料可使用周知之無機半導體或有機半導體。例如作為無機半導體，可使用矽、多晶矽等。又，作為有機半導體，可使用並五苯、聚噻吩、紅熒烯、四硫富瓦烯等。半導體部1之電阻率宜為1~2Ωcm左右。 再者於本說明書中，本發明之記憶組件指特別是有機記憶體，即構成半導體部之主要材料為有機半導體之情形，不管其他構成要件(第1絕緣層、第2絕緣層、電荷保持層、電極)是否包含有機材料。A well-known inorganic semiconductor or organic semiconductor can be used as the material constituting the semiconductor portion 1. For example, as the inorganic semiconductor, tantalum, polycrystalline germanium or the like can be used. Further, as the organic semiconductor, pentacene, polythiophene, rubrene, tetrathiafulvalene or the like can be used. The resistivity of the semiconductor portion 1 is preferably about 1 to 2 Ωcm. In the present specification, the memory component of the present invention refers to, in particular, an organic memory, that is, a case where the main material constituting the semiconductor portion is an organic semiconductor, regardless of other constituent elements (first insulating layer, second insulating layer, and charge holding layer). , electrode) Whether it contains organic materials.
第1絕緣層2為隔開半導體部1與電荷保持層3之絕緣層。第1絕緣層2為電性上電荷從半導體部1到達電荷保持層3時之隧道位障。在電極5與對向電極6之電位差大於可通過隧道位障時，電荷可到達電荷保持層3，在電極5與對向電極6之電位差不大於可通過隧道位障時，電荷無法到達電荷保持層3。The first insulating layer 2 is an insulating layer that separates the semiconductor portion 1 from the charge holding layer 3. The first insulating layer 2 is a tunnel barrier when the electric charge is electrically received from the semiconductor portion 1 to the charge holding layer 3. When the potential difference between the electrode 5 and the counter electrode 6 is greater than the passable through the tunnel, the charge can reach the charge holding layer 3. When the potential difference between the electrode 5 and the counter electrode 6 is not greater than the tunnel barrier, the charge cannot reach the charge retention. Layer 3.
構成第1絕緣層(隧道位障層)2之材料可使用周知之絕緣性之無機材料或有機材料。例如作為無機材料，可使用氧化矽等。又，作為有機材料可使用聚乙烯醇(PVA)等高分子材料、脂肪酸鹽之LB膜或自組織化膜，作為有機無機複合材料可使用經以多面體寡聚矽倍半氧烷(組成式：RSiO1.5；R=烷基)或烷基修飾後之氧化物奈米粒子等。第1絕緣層2之厚度宜為5nm~50nm、較佳為10nm~30nm。若厚度過薄，無法充分獲得作為絕緣膜之功能，若厚度過厚，雖然絕緣性變高、儲存電荷較難逃逸，但有必要擴大用以通過隧道位障之電位差。 奈米團簇於其表面具有有機配位基時，可以如下方式設計記憶組件，即配置於奈米團簇與半導體部之間之有機配位基作為構成第1絕緣層(隧道位障層)的元件；此時亦可另外設置第1絕緣層(隧道位障層)。As the material constituting the first insulating layer (tunnel barrier layer) 2, a well-known insulating inorganic material or organic material can be used. For example, as the inorganic material, cerium oxide or the like can be used. Further, as the organic material, a polymer material such as polyvinyl alcohol (PVA) or a LB film or a self-assembled film of a fatty acid salt can be used, and as the organic-inorganic composite material, a polyhedral oligomeric sesquioxanes can be used (composition formula: RSiO1.5; R = alkyl) or an alkyl nanoparticle after alkyl modification. The thickness of the first insulating layer 2 is preferably 5 nm to 50 nm, preferably 10 nm to 30 nm. If the thickness is too thin, the function as an insulating film cannot be sufficiently obtained. If the thickness is too thick, although the insulating property is high and the stored charge is hard to escape, it is necessary to expand the potential difference for passing through the tunnel barrier. When the nano cluster has an organic ligand on its surface, the memory component can be designed in such a manner that an organic ligand disposed between the nano cluster and the semiconductor portion serves as a first insulating layer (tunnel barrier layer). The component may be additionally provided with a first insulating layer (tunnel barrier layer).
電荷保持層3為保持電荷、儲存資料的部分。電荷保持層3包含奈米團簇30。包含於電荷保持層3之奈米團簇30主要存在特定原子數的奈米團簇。 電荷保持層3可為僅由奈米團簇構成，亦可為於絕緣材料中分散配置有奈米團簇之構造、或由奈米團簇與附著於其表面之有機配位基構成之構造。The charge holding layer 3 is a portion that holds charges and stores data. The charge retention layer 3 contains nanoclusters 30. The nano clusters 30 contained in the charge holding layer 3 mainly have a nano cluster of a specific atomic number. The charge holding layer 3 may be composed only of a nano cluster, or may have a structure in which a nano cluster is dispersed or disposed in an insulating material, or a structure in which a nano cluster and an organic ligand attached to the surface thereof are formed.
奈米團簇30較原子分子大、較塊狀之固體小。因此，藉由將奈米團簇30用於記憶組件10之電荷保持層3，可使記憶組件10微細化。The nano-cluster 30 is smaller than the atomic molecule and smaller than the block-like solid. Therefore, by using the nano clusters 30 for the charge holding layer 3 of the memory module 10, the memory module 10 can be made fine.
又，奈米團簇30為數個~數千個原子或分子集合而成之超微粒子。 因此，包含奈米團簇30之電荷保持層3之電子位準成為離散的。在注入於電荷保持層3之電荷為電子之情形，從離散的電子位準之能階較低的部分開始順序填滿，在注入於電荷保持層3之電荷為電洞之情形，從離散的電子位準之能階較高的部分開始順序填滿。因此，在電子位準之離散度相當大時，可按照能階分為有電子或電洞、或無電子或電洞之狀態。即，表示記憶組件10之多值化之可能性。Further, the nano clusters 30 are ultrafine particles in which a plurality of thousands or thousands of atoms or molecules are aggregated. Therefore, the electron level of the charge holding layer 3 including the nano clusters 30 becomes discrete. In the case where the charge injected into the charge holding layer 3 is an electron, the filling is sequentially performed from the lower energy level of the discrete electron level, and the charge injected into the charge holding layer 3 is a hole, from the discrete The higher energy level of the electronic level begins to fill up in sequence. Therefore, when the degree of dispersion of the electronic level is relatively large, it can be classified into an electron or a hole, or a state without an electron or a hole according to the energy level. That is, it indicates the possibility of multi-valued memory component 10.
包含於電荷保持層3之奈米團簇30主要包含特定原子數的奈米團簇。奈米團簇30會因為1個原子的增減而性質大為變化。因為，電荷保持層3主要包含原子數相同的奈米團簇30，藉此使電荷保持特性穩定化。The nanoclusters 30 contained in the charge holding layer 3 mainly contain nanoclusters of a specific atomic number. The nano clusters 30 are greatly changed in nature due to the increase and decrease of one atom. Since the charge holding layer 3 mainly contains the nano clusters 30 having the same number of atoms, the charge retention characteristics are stabilized.
此處，所謂「主要」指將奈米團簇之原子數設為橫軸、個數(信號強度)設為縱軸時，可以看到波峰。波峰產生的原子數為特定的原子數。產生的波峰之數量不限於一個。又，奈米團簇的原子數會影響奈米團簇的尺寸。因此，「特定原子數的奈米團簇」亦可換言之為「團簇尺寸相同的奈米團簇」。Here, "mainly" means that when the number of atoms of the nano cluster is set to the horizontal axis and the number (signal intensity) is the vertical axis, the peak can be seen. The number of atoms produced by a peak is a specific number of atoms. The number of peaks generated is not limited to one. Also, the number of atoms in the nanoclusters affects the size of the nanoclusters. Therefore, "nano clusters of a specific atomic number" can also be referred to as "nano clusters having the same cluster size".
可利用薄層層析儀、高效液相層析儀(HPLC)等測定製作電荷保持層3所使用之奈米團簇分散液，來確認奈米團簇30的波峰。The nanocluster dispersion liquid used for the charge-holding layer 3 can be measured by a thin layer chromatography instrument or a high performance liquid chromatography (HPLC) to confirm the peak of the nanocluster 30.
例如，根據HPLC的測定結果，信號強度最強的部分為波峰(以下稱為第1波峰)。又，將相對於第1波峰的強度為0.9倍的強度設為閾值，超過此閾值之部分亦為波峰。即，有存在複數個波峰之情形。For example, according to the measurement result of HPLC, the portion where the signal intensity is the strongest is a peak (hereinafter referred to as a first peak). Further, the intensity which is 0.9 times the intensity of the first peak is set as a threshold value, and the portion exceeding the threshold value is also a peak. That is, there are cases where there are a plurality of peaks.
電荷保持層3包含的奈米團簇30較好的是特定原子數的奈米團簇的比率為全體奈米團簇的5%以上、更佳為10%以上、最佳為20%以上。The nanoclusters 30 included in the charge holding layer 3 preferably have a ratio of nanoclusters having a specific number of atoms of 5% or more, more preferably 10% or more, and most preferably 20% or more of the entire nanoclusters.
使以磁控濺鍍法生成之中性原子及原子離子於氣相中凝聚而獲得特定原子數的奈米團簇。藉由於氣相中凝結來控制構成奈米團簇的原子數。例如，於專利文獻2中記載有使中性原子及原子離子於氣相中凝聚之具體方法。且亦可將以上述方法獲得之奈米團簇以管柱層析法或再結晶法等進行分離，進一步提高特定原子數的奈米團簇於全體奈米團簇30內所占的比率。A neutral cluster in which a neutral atom and an atomic ion are generated by magnetron sputtering in a gas phase to obtain a specific atomic number is obtained. The number of atoms constituting the nanoclusters is controlled by condensation in the gas phase. For example, Patent Document 2 describes a specific method of aggregating a neutral atom and an atomic ion in a gas phase. Further, the nanoclusters obtained by the above method may be separated by column chromatography or recrystallization, and the ratio of the nano-clusters having a specific atomic number to the entire nano-clusters 30 may be further increased.
於此，所謂特定原子數的奈米團簇於全體內為5%以上，以奈米團簇的個數而言足夠多。例如，若製作電荷保持層3時所使用的濃度1重量%的奈米團簇分散液為100g，則分散液所含的奈米團簇的重量為1g。其中的5%(50mg)為特定原子數的奈米團簇。由1mol的物質中所包含的原子為6.02×1023 個(亞佛加厥數)，特定原子數的奈米團簇之數量為6.02×1018 ~6.02×1019 個左右。Here, the number of nano-clusters having a specific atomic number is 5% or more in the whole, and is sufficiently large in the number of nano-clusters. For example, when the concentration of 1% by weight of the nano-cluster dispersion used in the production of the charge-holding layer 3 is 100 g, the weight of the nano-clusters contained in the dispersion is 1 g. Among them, 5% (50 mg) is a nano cluster of a specific atomic number. The number of atoms contained in 1 mol of the substance is 6.02 × 10 23 (Afocal twist), and the number of nano clusters of a specific atomic number is 6.02 × 10 18 - 6.02 × 10 19 or so.
構成奈米團簇30的原子數不做特別限定。經實驗確認，若構成奈米團簇30的原子數、即團簇尺寸變大，記憶組件10之C-V(電容-電壓)特性中之遲滯寬度變大。The number of atoms constituting the nano-clusters 30 is not particularly limited. It has been experimentally confirmed that the hysteresis width in the C-V (capacitance-voltage) characteristic of the memory module 10 becomes large as the number of atoms constituting the nano-clusters 30, that is, the cluster size becomes large.
只要可保持電子，可使用各種奈米團簇30。例如，可使用金屬、合金、金屬氧化物、半導體、陶瓷或其等複合物之奈米團簇。具體而言，可形成由單一金屬元素構成之金屬奈米團簇、構成元素由複數個金屬元素構成之合金奈米團簇、於構成元素中包含矽之半導體奈米團簇等。Various nanoclusters 30 can be used as long as the electrons can be held. For example, a nano-cluster of a composite of a metal, an alloy, a metal oxide, a semiconductor, a ceramic, or the like can be used. Specifically, a metal nano cluster composed of a single metal element, an alloy nano cluster in which the constituent element is composed of a plurality of metal elements, a semiconductor nano cluster including germanium in the constituent element, and the like can be formed.
奈米團簇30之構成單元宜包含選自於由Au、Ag、Pt、Pd、Ti、Al、Ta、Mo及W所構成群組中之一種以上元素。具有導電性之奈米團簇原則上可藉由濺鍍於氣相中生成奈米團簇。其等中，包含此等元素的奈米團簇容易生成，且經實驗確認亦生成。The constituent unit of the nano-cluster 30 preferably contains one or more elements selected from the group consisting of Au, Ag, Pt, Pd, Ti, Al, Ta, Mo, and W. Conductive nanoclusters can in principle be formed by sputtering in the gas phase to form nanoclusters. Among them, nano clusters containing these elements are easily generated and confirmed by experiments.
又，奈米團簇30宜於表面具有有機配位基。且較佳為有機配位基於奈米團簇30的表面形成單分子膜，被覆奈米團簇30的表面。藉由於奈米團簇30的表面存在有機配位基，可避免奈米團簇30彼此的凝聚。 在奈米團簇30於表面具有有機配位基之記憶組件中，有機配位基之中配置於半導體部1與奈米團簇30之間的有機配位基的部分構成第1絕緣層2，且配置於電極5與奈米團簇30之間的有機配位基的部分構成第2絕緣層4。因此，在奈米團簇30於表面具有有機配位基之記憶組件中，存在有第1絕緣層2僅由該有機配位基構成之情形、與第1絕緣層2具備由該有機配位基構成之層及由其他絕緣材料構成之層之情形，且存在有第2絕緣層4僅由該有機配位基構成之情形、與第2絕緣層4具備由該有機配位基構成之層及由其他絕緣材料構成之層之情形。Further, the nanoclusters 30 preferably have an organic ligand on the surface. Preferably, the organic coordination forms a monomolecular film on the surface of the nanoclusters 30 to coat the surface of the nanoclusters 30. By the presence of an organic ligand on the surface of the nanocluster 30, aggregation of the nanoclusters 30 with each other can be avoided. In the memory module in which the nano clusters 30 have an organic ligand on the surface, a portion of the organic ligand which is disposed between the semiconductor portion 1 and the nano-cluster 30 constitutes the first insulating layer 2 The portion of the organic ligand disposed between the electrode 5 and the nano-cluster 30 constitutes the second insulating layer 4. Therefore, in the memory module in which the nano clusters 30 have an organic ligand on the surface, the first insulating layer 2 is composed only of the organic ligand, and the first insulating layer 2 is provided with the organic coordination. In the case of a layer composed of a base layer and a layer composed of another insulating material, the second insulating layer 4 may be composed only of the organic ligand, and the second insulating layer 4 may be provided with a layer composed of the organic ligand. And the case of a layer composed of other insulating materials.
有機配位基宜具有以化學式RnX表示之結構。於化學式中，R為烷基、烯丙基、炔基或芳基，X為硫、硒、磷、氮，n為自然數。作為具體例，可列舉：烷硫醇、芳硫醇、烷硒醇、芳硒醇、三芳基膦等。The organic ligand preferably has a structure represented by the chemical formula RnX. In the chemical formula, R is an alkyl group, an allyl group, an alkynyl group or an aryl group, X is sulfur, selenium, phosphorus, nitrogen, and n is a natural number. Specific examples thereof include an alkanethiol, an aryl mercaptan, an alkyl selenol, an aryl selenol, and a triarylphosphine.
作為具有有機配位基之奈米團簇，例如可列舉：Au25 (SR)18 、Au38 (SR)24 、Au144 (SR)60 、Au28 (SR)20 、Au30 (SR)18 、Au36 (SR)14 、Au44 (SR)28 、Au52 (SR)32 、Au55 (SR)31 、Au92 (SR)44 、Au102 (SR)44 、Au104 (SR)45 、Au130 (SR)50 、Au187 (SR)68 、Au226 (SR)76 、Au253 (SR)90 、Au329 (SR)84 、Au356 (SR)112 、Au520 (SR)130 等。其中，R為以C12 H25 表示之烷基、S為硫。Examples of the nanoclusters having an organic ligand include Au 25 (SR) 18 , Au 38 (SR) 24 , Au 144 (SR) 60 , Au 28 (SR) 20 , and Au 30 (SR) 18 . , Au 36 (SR) 14 , Au 44 (SR) 28 , Au 52 (SR) 32 , Au 55 (SR) 31 , Au 92 (SR) 44 , Au 102 (SR) 44 , Au 104 (SR) 45 , Au 130 (SR) 50 , Au 187 (SR) 68 , Au 226 (SR) 76 , Au 253 (SR) 90 , Au 329 (SR) 84 , Au 356 (SR) 112 , Au 520 (SR) 130 , etc. Wherein R is an alkyl group represented by C 12 H 25 and S is sulfur.
又，本實施形態之記憶組件10所使用之奈米團簇30，其特徵在於具有以M@Si表示之內包金屬離子的團簇。其中，M表示金屬離子，@表示內包金屬離子。於該等奈米團簇之中，特別具有特徵者為Ta與Si之複合奈米團簇、Ti與Si之複合奈米團簇、Ru與Si之複合奈米團簇、Lu與Si之複合奈米團簇、Mo與Si之複合奈米團簇、W與Si之複合奈米團簇。具體的奈米團簇30之例，有TaSi16 、TiSi16 等。Further, the nano-clusters 30 used in the memory module 10 of the present embodiment are characterized in that they have clusters of metal ions enclosed by M@Si. Wherein M represents a metal ion and @ represents an inclusive metal ion. Among these nano-clusters, special features are nano-clusters of Ta and Si, composite nano-clusters of Ti and Si, composite nano-clusters of Ru and Si, and composites of Lu and Si. Nano-clusters, composite nano-clusters of Mo and Si, and composite nano-clusters of W and Si. Examples of specific nanoclusters 30 include TaSi 16 and TiSi 16 .
構成此等複合奈米團簇之中性原子或原子離子，離子化傾向高於Ag、難以於液相中凝聚。因此，於液相中凝聚而生成奈米團簇之方法無法生成此等中性原子或原子離子。即，如專利文獻2所記載，首次使用於氣相中凝聚而獲得奈米團簇之方法製作。因此，並不知道將TaSi16 、TiSi16 等複合奈米團簇用於電荷保持層3的例子。The intermediate atoms or atomic ions constituting the composite nano-clusters have a higher ionization tendency than Ag and are difficult to aggregate in the liquid phase. Therefore, a method of agglomerating in a liquid phase to form a nano-cluster cannot generate such a neutral atom or an atomic ion. That is, as described in Patent Document 2, it is produced for the first time by a method of agglomerating in a gas phase to obtain a nano-cluster. Therefore, an example in which a composite nano-cluster such as TaSi 16 or TiSi 16 is used for the charge-holding layer 3 is not known.
電荷保持層3中之奈米團簇30宜層狀排列、構成奈米團簇膜。若奈米團簇30層狀排列，各個記憶組件10的電荷保持特性的偏差變小。於圖1圖示排列一層電荷保持層3的奈米團簇之例，但亦可如圖2所示記憶組件11般積層複數層的奈米團簇30。The nanoclusters 30 in the charge holding layer 3 are preferably arranged in a layered manner to constitute a nano-cluster film. If the nano clusters 30 are arranged in layers, the variation in the charge retention characteristics of the respective memory modules 10 becomes small. 1 shows an example of arranging a layer of nano-clusters of a charge-retaining layer 3, but a plurality of layers of nano-clusters 30 may be laminated as shown in FIG.
電荷保持層3中之奈米團簇30之面密度宜為1×1012 個/cm2 ~3×1014 個/cm2 。其原因為，藉由最密地填充奈米團簇，可減低各元件的偏差。The areal density of the nanoclusters 30 in the charge holding layer 3 is preferably from 1 × 10 12 /cm 2 to 3 × 10 14 /cm 2 . The reason for this is that the deviation of each element can be reduced by filling the nano-clusters most densely.
第2絕緣層4為阻斷儲存於電荷保持層3之電子流到電極5的絕緣層。The second insulating layer 4 is an insulating layer that blocks electrons stored in the charge holding layer 3 from flowing to the electrode 5.
用於第2絕緣層4的材料只要具有絕緣性，可為無機材料亦可為有機材料。例如使用有機材料時宜包含氟樹脂。作為氟樹脂之具體例，可列舉日本旭硝子股份有限公司製之CYTOP(註冊商標)。氟樹脂具有撥水性，可避免第2絕緣層4含有水。The material used for the second insulating layer 4 may be an inorganic material or an organic material as long as it has insulating properties. For example, when an organic material is used, a fluororesin is preferably contained. Specific examples of the fluororesin include CYTOP (registered trademark) manufactured by Asahi Glass Co., Ltd., Japan. The fluororesin has water repellency, and the second insulating layer 4 can be prevented from containing water.
若第2絕緣層4吸附水，則水分子與電荷保持層3之電子反應而產生氫氧化物離子。即，儲存於電荷保持層3之電子被水分子消耗。若儲存於電荷保持層3之電子被消耗，記憶組件10所保持之資料將改寫。第2絕緣層4之具體的吸水率宜為未達0.02%。When the second insulating layer 4 adsorbs water, the water molecules react with the electrons of the charge holding layer 3 to generate hydroxide ions. That is, the electrons stored in the charge holding layer 3 are consumed by the water molecules. If the electrons stored in the charge holding layer 3 are consumed, the data held by the memory unit 10 will be rewritten. The specific water absorption of the second insulating layer 4 is preferably less than 0.02%.
又，第2絕緣層4之氧透過係數宜未達2×10-9 cm3 ·cm/cm2 ·s·cmHg。其原因為，使可能與電荷授受相關的氧減低以使電荷保持量穩定化，且可減低電荷保持層因氧化而發生化學變化。為了使組件功能穩定化，氧透過係數為重要。Further, the oxygen permeability coefficient of the second insulating layer 4 is preferably less than 2 × 10 -9 cm 3 · cm / cm 2 · s · cmHg. The reason for this is that oxygen which may be related to charge transfer is reduced to stabilize the charge retention amount, and chemical change of the charge retention layer due to oxidation can be reduced. In order to stabilize the function of the module, the oxygen permeability coefficient is important.
且第2絕緣層4之介電常數不宜過大。若介電常數太大，有必要使寫入、消去電荷保持層之電壓大小不必要地增大，從而電荷施加變困難。因此，作為第2絕緣層4之介電常數之一例宜為4.0以下。Further, the dielectric constant of the second insulating layer 4 is not excessively large. If the dielectric constant is too large, it is necessary to make the voltage of the write and erase charge holding layers unnecessarily large, and the charge application becomes difficult. Therefore, it is preferable that one example of the dielectric constant of the second insulating layer 4 is 4.0 or less.
又，第2絕緣層4之玻璃轉移溫度不宜過低。若玻璃轉移溫度太低，有因組件利用環境的溫度的不同而穩定動作受損之情形。因為，作為第2絕緣層4之玻璃轉移溫度之一例，宜為80℃以上。Further, the glass transition temperature of the second insulating layer 4 should not be too low. If the glass transition temperature is too low, there is a case where the stable operation is impaired due to the difference in the temperature of the component utilization environment. The glass transition temperature of the second insulating layer 4 is preferably 80 ° C or higher.
電極5及對向電極6可使用周知之電極材料，只要具有導電性即可，並無特別限制。例如可將電極5設為金電極，對向電極6設為鋁電極。且若可於半導體部1與電荷保持層3之間產生電位差，亦可使對向電極6接地。A well-known electrode material can be used for the electrode 5 and the counter electrode 6, and it is not particularly limited as long as it has conductivity. For example, the electrode 5 can be a gold electrode and the counter electrode 6 can be an aluminum electrode. Further, if a potential difference can be generated between the semiconductor portion 1 and the charge holding layer 3, the counter electrode 6 can be grounded.
再者，記憶組件10中之電極構造並不限於圖1及圖2的構造。圖3所示者為本實施形態之記憶組件之另一例。例如，亦可為如圖3(a)所示之構造的記憶組件12，其將電極5分割成複數個，設置有對應各個奈米團簇30之電極5a。又，例如亦可為如圖3(b)所示設置有源極電極7與汲極電極8之MOSFET構造的記憶組件13。 又，亦可為如圖4所示的記憶組件14，其奈米團簇30於表面具有有機配位基31，第1絕緣層2僅由該有機配位基構成、第2絕緣層4亦僅由該有機配位基構成、電荷保持層3則由奈米團簇30與附著於其表面之有機配位基31構成。於上述記憶組件14中，可以說係基於第1絕緣層2、電荷保持層3、第2絕緣層4各層的功能，將具有有機配位基31之奈米團簇30所構成的層假設性地分配給各第1絕緣層2、電荷保持層3、第2絕緣層4，但作為記憶組件的動作原理與圖1~圖3所顯示的記憶組件相同。Furthermore, the electrode structure in the memory module 10 is not limited to the configuration of FIGS. 1 and 2. Fig. 3 shows another example of the memory module of the embodiment. For example, it may be a memory module 12 having a structure as shown in FIG. 3(a), which divides the electrode 5 into a plurality of electrodes 5a corresponding to the respective nanoclusters 30. Further, for example, a memory module 13 having a MOSFET structure in which the source electrode 7 and the drain electrode 8 are provided as shown in FIG. 3(b) may be used. Further, the memory module 14 shown in FIG. 4 may have a nano-cluster 30 having an organic ligand 31 on the surface, the first insulating layer 2 being composed only of the organic ligand, and the second insulating layer 4 also The charge-retaining layer 3 is composed only of the organic ligand, and is composed of a nano-cluster 30 and an organic ligand 31 attached to the surface thereof. In the memory module 14, it can be said that the layer composed of the nano-clusters 30 having the organic ligand 31 is assumed based on the functions of the respective layers of the first insulating layer 2, the charge holding layer 3, and the second insulating layer 4. The grounding is assigned to each of the first insulating layer 2, the charge holding layer 3, and the second insulating layer 4. However, the operation principle of the memory module is the same as that of the memory modules shown in FIGS. 1 to 3.
本發明之記憶組件，若基於其動作原理可以稱為以奈米團簇作為浮閘的浮閘記憶體。 藉由檢測有無儲存於奈米團簇之電荷、例如檢測流過圖3(b)中所示源極電極6-汲極電極7的電流的大小的不同，而成為讀取構造，從而可與快閃記憶體相同地進行資料寫入、讀取。The memory component of the present invention can be referred to as a floating gate memory using a nano cluster as a floating gate based on its principle of operation. By detecting the presence or absence of the charge stored in the nano cluster, for example, detecting the difference in the magnitude of the current flowing through the source electrode 6-drain electrode 7 shown in FIG. 3(b), it becomes a reading structure, thereby enabling The flash memory writes and reads data in the same manner.
圖18顯示用以說明其動作原理之概念的C-V曲線、及本發明之記憶組件之剖面示意圖。 圖18之C-V曲線為半導體部1由p型半導體構成之情形。 二個實線曲線分別表示閘極電壓Vgate掃描10V→-10V之情形之C-V曲線(L1 )、及閘極電壓Vgate掃描-10V→10V之情形之C-V曲線(L2 )。 另一方面，虛線曲線表示於奈米團簇無電荷、電性中性之情形之C-V曲線(L0 )。Fig. 18 is a cross-sectional view showing the CV curve for explaining the concept of the principle of operation and the memory module of the present invention. The CV curve of Fig. 18 is a case where the semiconductor portion 1 is composed of a p-type semiconductor. The two solid line curves respectively indicate the CV curve (L 1 ) in the case where the gate voltage Vgate scans 10V → -10V, and the CV curve (L 2 ) in the case where the gate voltage Vgate scans -10V → 10V. On the other hand, the dashed curve indicates the CV curve (L 0 ) in the case where the nanoclusters are uncharged and electrically neutral.
閘極電壓Vgate掃描10V→-10V之情形之C-V曲線(L1 )與於奈米團簇無電荷、電性中性之情形之C-V曲線(L0 )相比較，於儲存區域中從C-V曲線(L1 )朝負電壓側位移表示從奈米團簇釋放電子、即朝奈米團簇注入電洞。 另一方面，閘極電壓Vgate掃描-10V→10V之情形之C-V曲線(L2 )與於奈米團簇無電荷、電性中性之情形之C-V曲線(L0 )相比較，於反轉區域中從C-V曲線(L1 )朝正電壓側位移表示朝奈米團簇注入電子。 於奈米團簇無電荷時不會出現此種遲滯。此遲滯越大，越可穩定地儲存電荷，記憶特性較高。The CV curve (L 1 ) of the case where the gate voltage Vgate scans 10V → -10V is compared with the CV curve (L 0 ) of the case where the nano cluster is uncharged and electrically neutral, and the CV curve is in the storage region. The displacement of (L 1 ) toward the negative voltage side indicates that electrons are released from the nano-clusters, that is, holes are injected into the nano-clusters. On the other hand, the CV curve (L 2 ) of the case where the gate voltage Vgate scans -10V → 10V is compared with the CV curve (L 0 ) of the case where the nano cluster is uncharged and electrically neutral, and is reversed. Displacement from the CV curve (L 1 ) toward the positive voltage side in the region indicates that electrons are injected into the nano cluster. This hysteresis does not occur when there is no charge in the nanoclusters. The larger the hysteresis, the more stable the charge is stored and the memory characteristics are higher.
若根據本發明記憶組件的構造，電荷朝奈米團簇的注入(穿隧)可推測有根據其厚度的不同等(根據有效的隧道位障的厚度)，經由第1絕緣膜進行之情形與經由第2絕緣膜進行之情形。According to the configuration of the memory module of the present invention, the injection (tunneling) of charge into the nano-clusters can be presumed to be based on the thickness of the tunnel (according to the thickness of the effective tunnel barrier), and the case of passing through the first insulating film The case is performed via the second insulating film.
不用說本發明之記憶組件亦可具備支撐基板。支撐基板例如於圖1所示記憶組件中，可具備於半導體部1與對向電極6之間、或對向電極6之不具備半導體部1之側。 作為支撐基板可使用周知之無機材料或有機材料。 作為無機材料之支撐基板，例如可列舉：玻璃、塑膠、石英、金屬箔、非摻雜矽及高濃度摻雜矽、氧化銦錫(ITO)等透明電極材料等。 作為有機材料之支撐基板，例如可列舉：聚對苯二甲酸乙二酯(PET)、聚醯亞胺(PI)等合成樹脂或聚縮醛(POM)等工程塑膠、纖維素等天然高分子等硬式或可撓式材料。Needless to say, the memory module of the present invention may also be provided with a support substrate. For example, in the memory module shown in FIG. 1, the support substrate may be provided between the semiconductor portion 1 and the counter electrode 6, or on the side of the counter electrode 6 that does not include the semiconductor portion 1. As the support substrate, a well-known inorganic material or organic material can be used. Examples of the support substrate for the inorganic material include glass, plastic, quartz, metal foil, non-doped germanium, and a transparent electrode material such as high-concentration doped germanium or indium tin oxide (ITO). Examples of the support substrate for the organic material include synthetic resins such as polyethylene terephthalate (PET) and polyimine (PI), engineering plastics such as polyacetal (POM), and natural polymers such as cellulose. Hard or flexible materials.
作為本發明記憶組件之一例，構成為有機記憶體時，可使用於有機EL開發出之溼式製程、可列印製程等製造技術。As an example of the memory module of the present invention, when it is configured as an organic memory, it can be used in a manufacturing process such as a wet process or a printable process developed by organic EL.
圖5顯示作為本發明記憶組件之有機記憶體之一例。 有機記憶體100具備：支撐基板110、分開配置於支撐基板110上之對向電極106、以覆蓋對向電極106之方式形成之由有機半導體構成之半導體部101、由附著於奈米團簇130表面之有機配位基131之一部分構成之第1絕緣層102、由複數個奈米團簇130與附著於其表面之有機配位基131之一部分構成之電荷保持層103、具備由附著於奈米團簇130表面之有機配位基131之一部分構成之層104B與和其不同之絕緣層104A之第2絕緣層104、及電極105。Fig. 5 shows an example of an organic memory as a memory component of the present invention. The organic memory 100 includes a support substrate 110, a counter electrode 106 that is separately disposed on the support substrate 110, a semiconductor portion 101 made of an organic semiconductor formed to cover the counter electrode 106, and is attached to the nano-clusters 130. A first insulating layer 102 composed of a part of the organic ligand 131 on the surface, and a charge holding layer 103 composed of a plurality of nanoclusters 130 and a portion of the organic ligand 131 adhered to the surface thereof, and having a charge holding layer 103 A layer 104B composed of a portion of the organic ligand 131 on the surface of the rice cluster 130 is different from the second insulating layer 104 of the insulating layer 104A and the electrode 105.
支撐基板110例如亦可使用具有柔軟性之聚對苯二甲酸乙二酯(PET)等。 作為由有機半導體構成之半導體部101，例如亦可使用並五苯、聚噻吩等。 作為構成第2絕緣層104之絕緣層104A，例如亦可使用氟樹脂等。 再者，於圖5所示之有機記憶體10中雖然第1絕緣層102由附著於奈米團簇130表面之有機配位基131之一部分構成，但除此之外例如亦可具備由氟樹脂等構成之絕緣層。As the support substrate 110, for example, flexible polyethylene terephthalate (PET) or the like can be used. As the semiconductor portion 101 made of an organic semiconductor, for example, pentacene or polythiophene can also be used. As the insulating layer 104A constituting the second insulating layer 104, for example, a fluororesin or the like can be used. Further, in the organic memory 10 shown in FIG. 5, the first insulating layer 102 is formed of a part of the organic ligand 131 attached to the surface of the nano-clusters 130, but may be provided with fluorine, for example. An insulating layer made of a resin or the like.
基於圖1說明記憶組件10之製造方法之一例。 首先，於半導體(半導體部1)之一面成膜對向電極6。對向電極6可以濺鍍等周知方法成膜。然後，於半導體部1之形成有對向電極6之面之相反側面形成第1絕緣層2。在半導體部1為無機材料時，第1絕緣層2亦可將半導體部1之一面進行熱氧化而獲得。An example of a method of manufacturing the memory module 10 will be described based on Fig. 1 . First, the counter electrode 6 is formed on one surface of the semiconductor (semiconductor portion 1). The counter electrode 6 can be formed into a film by a known method such as sputtering. Then, the first insulating layer 2 is formed on the opposite side surface of the surface of the semiconductor portion 1 on which the counter electrode 6 is formed. When the semiconductor portion 1 is an inorganic material, the first insulating layer 2 can also be obtained by thermally oxidizing one surface of the semiconductor portion 1.
然後，於第1絕緣層2上形成包含奈米團簇30之電荷保持層3。首先，主要於氣相中製作特定原子數的奈米團簇。Then, a charge holding layer 3 containing the nano-clusters 30 is formed on the first insulating layer 2. First, a nano cluster of a specific atomic number is produced mainly in the gas phase.
具體而言，可使用專利文獻2記載之奈米團簇生成裝置製作。以該裝置生成之奈米團簇為以極高精度控制團簇尺寸(奈米團簇的原子數)者。所謂「高精度」表示顯示選自於氣相中生成之奈米團簇之質譜圖之波峰的代表性波峰的團簇尺寸的奈米團簇之比率，占全體生成之奈米團簇的5%以上。Specifically, it can be produced using the nano-cluster generation device described in Patent Document 2. The nano clusters generated by the device are those which control the cluster size (the number of atoms of the nano cluster) with extremely high precision. The term "high-precision" means a ratio of nanoclusters showing a cluster size of a representative peak selected from a peak of a mass spectrum generated in a gas phase, which is 5 of the total generated nano cluster. %the above.
受到有機配位基保護的特定原子數的奈米團簇，例如可使用化學還原法獲得。於金屬前驅物(例如氯化金酸HAuCl4 )之水溶液中添加包含相轉移試劑(例如四辛基溴化銨；(C8 H17 )4 NBr)之甲苯容器，使金屬前驅物移動(相轉移)至甲苯溶液後，添加保護配位基 (例如烷硫醇；Cn H2n+1 SH)。於該混合溶液中添加還原試劑(例如硼氫化鈉；NaBH4 )，還原前驅物且於保護配位基存在下自組織化。藉由調節保護配位基的濃度，可改變生成之奈米團簇之尺寸。所生成之有機保護奈米團簇，藉由液相層析法、再結晶法等可分離成特定金屬原子數之有機保護奈米團簇。Nanoclusters of a specific atomic number protected by an organic ligand can be obtained, for example, by chemical reduction. Adding a toluene container containing a phase transfer reagent (for example, tetraoctyl ammonium bromide; (C 8 H 17 ) 4 NBr) to an aqueous solution of a metal precursor (for example, HAuCl 4 chloride) to move the metal precursor (phase) After transfer) to the toluene solution, a protective ligand (for example, an alkanethiol; C n H 2n+1 SH) is added. A reducing reagent (for example, sodium borohydride; NaBH 4 ) is added to the mixed solution to reduce the precursor and self-organize in the presence of a protective ligand. The size of the resulting nanoclusters can be varied by adjusting the concentration of the protecting ligand. The organic protected nano-clusters thus formed can be separated into organic protected nano-clusters of a specific metal atom number by liquid chromatography, recrystallization, or the like.
生成之奈米團簇之種類無特別限制。只要以氣相凝聚者即可，例如可生成構成元素由單一金屬元素構成之金屬奈米團簇、構成元素由複數個金屬元素構成之合金奈米團簇、於構成元素中包含矽之半導體奈米團簇等。更具體而言，作為金屬奈米團簇可生成Pt、Au、Ag、Cu、Cr、Ti、Fe等奈米團簇，作為合金奈米團簇可生成CoPt、FePt等奈米團簇，作為半導體團簇可生成Si、TaSi、TiSi、RuSi、WSi、MoSi等。半導體團簇包含以M@Si表示之內包金屬離子的團簇。The type of the generated nano cluster is not particularly limited. As long as it is agglomerated in a gas phase, for example, a metal nano-cluster having a constituent element composed of a single metal element, an alloy nano-cluster having a constituent element composed of a plurality of metal elements, and a semiconductor nano-layer containing ruthenium in the constituent element can be produced. Rice clusters, etc. More specifically, nano-clusters such as Pt, Au, Ag, Cu, Cr, Ti, and Fe can be formed as metal nanoclusters, and nano-clusters such as CoPt and FePt can be formed as alloy nano-clusters. The semiconductor cluster can form Si, TaSi, TiSi, RuSi, WSi, MoSi, and the like. The semiconductor cluster contains clusters of metal ions enclosed by M@Si.
於先前在液相表面或液相中使中性原子或原子離子凝聚之方法，若並非離子化傾向較小(容易還原)、容易凝聚之元素，則無法生成奈米團簇。因此，無法生成TaSi、TiSi、RuSi、WSi、MoSi等以M@Si表示的奈米團簇種類。又若溫度、攪拌條件、添加物量等不同，奈米團簇尺寸的分布會變廣、無法有效率地獲得團簇尺寸相同的奈米團簇。In the conventional method of aggregating a neutral atom or an atomic ion on a liquid phase surface or a liquid phase, if it is not an element having a small ionization tendency (easily reduced) and is easily aggregated, a nano cluster cannot be formed. Therefore, it is impossible to form a nano cluster type represented by M@Si such as TaSi, TiSi, RuSi, WSi, or MoSi. Further, if the temperature, the stirring condition, the amount of the additive, and the like are different, the distribution of the size of the nano-clusters becomes wide, and the nano-clusters having the same cluster size cannot be efficiently obtained.
又，於專利文獻2記載的方法中，於固體基板上捕集氣相的奈米團簇。若朝固體基板上蒸鍍奈米團簇，則從固體基板剝離奈米團簇、進行回收亦極為困難。因此，為提高奈米團簇的回收率，亦可於分散介質(液相)中捕集於氣相中生成的奈米團簇。Further, in the method described in Patent Document 2, a nano-clustered gas phase cluster is trapped on a solid substrate. When the nano-clusters are vapor-deposited on the solid substrate, it is extremely difficult to remove the nano-clusters from the solid substrate and recover them. Therefore, in order to increase the recovery rate of the nano-clusters, the nano-clusters formed in the gas phase can also be trapped in the dispersion medium (liquid phase).
以液相捕集奈米團簇時，宜使奈米團簇入射的分散介質流動。奈米團簇以高頻率入射分散介質。因此，若不使分散介質流動，有入射至分散介質的奈米團簇於液面或液中相互凝聚之情形。藉由使奈米團簇入射的分散介質流動，可抑制於分散介質表面及分散介質中奈米團簇濃度局部地變高，提高奈米團簇的分散性。When the nano clusters are trapped in the liquid phase, the dispersion medium on which the nano clusters are incident is preferably flowed. The nano clusters are incident on the dispersion medium at a high frequency. Therefore, if the dispersion medium is not allowed to flow, the nano-clusters which are incident on the dispersion medium are agglomerated in the liquid surface or in the liquid. By flowing the dispersion medium on which the nano-clusters are incident, it is possible to suppress the local concentration of the nano-clusters locally on the surface of the dispersion medium and the dispersion medium, and to improve the dispersibility of the nano-clusters.
於以液相捕集奈米團簇時，奈米團簇彼此最容易凝聚在分散液的表面。其原因為，奈米團簇入射時在液面受到阻力，奈米團簇的速度一度因分散液表面降低。When the nano clusters are trapped in the liquid phase, the nano clusters are most likely to condense on the surface of the dispersion. The reason is that when the nano-cluster is incident, the liquid surface is subjected to resistance, and the velocity of the nano-cluster is once lowered due to the surface of the dispersion.
因此，於以液相捕集奈米團簇時，宜以分散介質表面之奈米團簇密度成為凝聚界限以下之方式使分散介質流動。 所謂凝聚界限指奈米團簇彼此於分散介質表面不接觸的密度。例如若奈米團簇的尺寸為直徑1nm，則奈米團簇於1cm2 中存在1014 個以上，奈米團簇彼此會接觸。雖然若奈米團簇彼此接觸，並非馬上凝聚，但奈米團簇尺寸為直徑1nm時，分散介質表面中之奈米團簇密度宜為1014 個/cm2 以下。Therefore, when the nano-clusters are collected in the liquid phase, the dispersion medium should be flowed so that the density of the nano-clusters on the surface of the dispersion medium becomes equal to or lower than the aggregation limit. The condensation limit refers to the density at which the nano-clusters are not in contact with each other on the surface of the dispersion medium. For example, if the size of the nano-cluster is 1 nm in diameter, there are more than 10 14 nano-clusters in 1 cm 2 , and the nano-clusters are in contact with each other. Although the nano-cluster clusters are in contact with each other and do not agglomerate immediately, when the nano-cluster size is 1 nm in diameter, the density of the nano-clusters in the surface of the dispersion medium is preferably 10 14 /cm 2 or less.
奈米團簇的入射通量亦會對分散介質表面的奈米團簇密度帶來大的影響。所謂入射通量指於一秒內入射至1cm2 的奈米團簇粒子數。若入射通量較快，宜使流動速度增快，入射通量較慢時則沒有必要那樣提高攪拌速度。無論哪一種情形，藉由以分散介質表面之奈米團簇密度成為凝聚界限以下之方式使分散介質流動，可進一步抑制奈米團簇彼此的凝聚。The incident flux of the nanoclusters also has a large effect on the density of the nanoclusters on the surface of the dispersion medium. The incident flux refers to the number of nano cluster particles incident on 1 cm 2 in one second. If the incident flux is faster, it is better to increase the flow rate. When the incident flux is slower, it is not necessary to increase the stirring speed. In either case, by causing the dispersion medium to flow so that the nano-cluster density on the surface of the dispersion medium becomes equal to or lower than the aggregation limit, aggregation of the nano-clusters can be further suppressed.
更具體而言，例如若欲於1小時內收集10mg的奈米團簇，則朝12cm2 的分散液面積(奈米團簇入射面的面積以直徑40mm計算)以6nmol(=3.3×1015 個)/sec入射奈米團簇。分散介質靜止時的入射量為2.8×1014 個/sec·cm2 ，此時若為10cm/sec以上的流動速度，可使分散介質表面的奈米團簇密度成為1014 個以下。若考量奈米團簇入射通量現狀的極限值，宜使奈米團簇分散液的表面速度為20cm/sec以上、較佳為100cm/sec以上。More specifically, for example, if 10 mg of nanoclusters are to be collected within 1 hour, the area of the dispersion toward 12 cm 2 (the area of the incident surface of the nanoclusters is 40 mm in diameter) is 6 nmol (=3.3×10 15 ). / sec incident nano clusters. When the dispersion medium is at rest, the incident amount is 2.8 × 10 14 /sec·cm 2 , and in this case, if the flow rate is 10 cm/sec or more, the density of the nano-clusters on the surface of the dispersion medium can be 10 14 or less. When considering the limit value of the current incident flux of the nano-clusters, the surface velocity of the nano-cluster dispersion is preferably 20 cm/sec or more, preferably 100 cm/sec or more.
使奈米團簇入射的分散介質流動的方法並無特別限制。例如可使用攪拌器、旋轉體等。The method of flowing the dispersion medium on which the nano clusters are incident is not particularly limited. For example, a stirrer, a rotating body, or the like can be used.
供入射奈米團簇的分散介質，宜使用由鏈狀醚、環狀醚、鏈狀矽氧烷、環狀矽氧烷、腈類、鹵代烷類、醇類、醯胺類、亞碸類及苯衍生物所構成群組中之任一者。此等分散介質經實驗確認即使將使奈米團簇分散後之分散液放置長時間，奈米團簇亦不會再度凝聚。即，可穩定地保持於奈米團簇分散液的狀態。For the dispersion medium for incident nano-clusters, it is preferred to use chain ethers, cyclic ethers, chain oxiranes, cyclic oxiranes, nitriles, halogenated alkanes, alcohols, guanamines, anthraquinones and Any of the groups of benzene derivatives. These dispersion media have been experimentally confirmed that even if the dispersion in which the nano-clusters are dispersed is left for a long period of time, the nano-clusters are not re-agglomerated. That is, it can be stably maintained in the state of the nano-cluster dispersion.
作為此等分散介質之具體例，例如可列舉：作為鏈狀醚之聚乙二醇、聚丙二醇、甲氧基聚乙二醇；作為鏈狀矽氧烷之聚二甲基矽氧烷、聚甲基苯基矽氧烷；作為環狀矽氧烷之六甲基環三矽氧烷、十甲基環六矽氧烷；作為環狀醚之四氫呋喃、冠醚；作為腈類之乙腈、苯甲腈；作為鹵代烷類之氯仿、二氯甲烷；作為醇類之甲醇、乙醇；作為苯衍生物之甲苯、二氯苯。Specific examples of such a dispersion medium include, for example, polyethylene glycol, polypropylene glycol, methoxypolyethylene glycol as a chain ether, polydimethyl siloxane as a chain siloxane, and poly Methylphenyl fluorene oxide; hexamethylcyclotrioxane as a cyclic siloxane, decamethylcyclohexaoxane; tetrahydrofuran as a cyclic ether; crown ether; acetonitrile and benzene as nitriles Formonitrile; chloroform as a halogenated alkane; dichloromethane; methanol and ethanol as an alcohol; toluene or dichlorobenzene as a benzene derivative.
在於氣相中生成奈米團簇之步驟與於液相中捕集奈米團簇之步驟之間，宜具有確認已於氣相中生成奈米團簇之檢測步驟。藉由於檢測步驟中確認已於氣相中生成特定的奈米團簇，可確認於液相中沒有原子或分子凝聚而生成奈米團簇。於液相中原子或分子凝聚時，奈米團簇尺寸分散、主要難以獲得特定原子數的奈米團簇。Between the step of generating a nano-cluster in the gas phase and the step of trapping the nano-clusters in the liquid phase, it is preferred to have a detection step of confirming that a nano-cluster has been formed in the gas phase. By confirming that a specific nano-cluster was formed in the gas phase in the detection step, it was confirmed that no atom or molecule was aggregated in the liquid phase to form a nano-cluster. When atoms or molecules are aggregated in the liquid phase, the size of the nano clusters is dispersed, and it is difficult to obtain a nano cluster of a specific atomic number.
是否於氣相中生成特定的奈米團簇，例如可藉由在氣相中生成的奈米團簇到達分散液的過程中設置探測板而確認。例如使用Ta及Si作為構成奈米團簇的元素時，在適當地生成奈米團簇時探測板會著色，另一方面未適當地生成奈米團簇時於探測板表面形成透明的膜。Whether or not a specific nanocluster is formed in the gas phase can be confirmed, for example, by providing a probe plate in the process of reaching a dispersion of the nanoclusters generated in the gas phase. For example, when Ta and Si are used as the elements constituting the nano-cluster, the probe plate is colored when the nano-clusters are appropriately formed, and a transparent film is formed on the surface of the probe plate when the nano-clusters are not properly formed.
接著，使用獲得之特定原子數的奈米團簇30形成電荷保持層3。電荷保持層3可使用Langmuir-Blodgett(LB)法或旋轉塗佈等塗佈法而製作。 於第1絕緣層2上塗佈上述奈米團簇分散液，去除溶劑後，可容易形成由奈米團簇分散膜構成的電荷保持層3。在使用特定原子數的奈米團簇的比率為全體奈米團簇5%以上的奈米團簇分散液時，構成所獲得的奈米團簇分散膜的特定原子數的奈米團簇的比率為全體奈米團簇5%以上。塗佈可使用噴塗法、分配器塗佈法、旋轉塗佈法、刮刀塗佈法、噴墨塗佈法、網版印刷法、平版印刷法、模具塗佈法等。Next, the charge holding layer 3 is formed using the nano clusters 30 of the specific atom number obtained. The charge holding layer 3 can be produced by a coating method such as Langmuir-Blodgett (LB) method or spin coating. The nano-clay dispersion liquid is applied onto the first insulating layer 2, and after the solvent is removed, the charge-holding layer 3 composed of a nano-clustered dispersion film can be easily formed. When a ratio of nanoclusters having a specific atomic number is used as a nano-cluster dispersion of 5% or more of the entire nano-cluster, the nano-clusters of the specific atomic number of the obtained nano-cluster dispersed film are formed. The ratio is more than 5% of the total nano cluster. For the coating, a spray coating method, a dispenser coating method, a spin coating method, a knife coating method, an inkjet coating method, a screen printing method, a lithography method, a die coating method, or the like can be used.
首先就LB法進行說明。LB法為將於水面上展開的奈米團簇30轉印於基體上的方法。圖6為用以就LB法進行說明的示意圖。First, the LB method will be explained. The LB method is a method in which a nano cluster 30 to be unfolded on a water surface is transferred onto a substrate. Fig. 6 is a schematic view for explaining the LB method.
LB法具有將於溶劑中分散有奈米團簇30之分散液滴下於水槽T內的液面之滴下步驟、藉由使溶劑揮發而形成由奈米團簇30構成之單層膜31之單膜形成步驟、及將單層膜31轉移至暫時支撐體33上之轉移步驟。以下就各步驟具體地進行說明。The LB method has a step of dropping a liquid surface in which a dispersed droplet of the nano-clusters 30 is dispersed in a solvent in a solvent T, and a single film of a single-layer film 31 composed of a nano-clusters 30 by volatilizing a solvent. The forming step and the transfer step of transferring the single layer film 31 onto the temporary support 33. The respective steps will be specifically described below.
首先，如圖6(a)所示，將主要包含以上述方法獲得之特定原子數的奈米團簇30之分散液散開於貯存於水槽內之水W上(滴下步驟)。於是，作為分散介質的溶劑揮發且奈米團簇30散開於水之液面上。First, as shown in Fig. 6 (a), a dispersion mainly containing the nano-clusters 30 of the specific atomic number obtained by the above method is dispersed on the water W stored in the water tank (dropping step). Then, the solvent as a dispersion medium volatilizes and the nanoclusters 30 are scattered on the liquid surface of the water.
接著，如圖6(b)所示，將間隔壁32於水W之液面上從水槽T的外周向中央靠近。於是，散開於水W液面上的奈米團簇30被間隔壁32推擠，集中於水槽T的中央部。然後，集中於中央的奈米團簇30受到間隔壁32的壓力，自發性地形成以最密堆疊排列整齊的單層膜31(單層膜形成步驟)。可根據間隔壁32表面張力的變化來判斷已形成單層膜31。Next, as shown in FIG. 6(b), the partition wall 32 is brought closer to the center from the outer periphery of the water tank T on the liquid surface of the water W. Then, the nano-clusters 30 scattered on the surface of the water W are pushed by the partition walls 32 and concentrated on the central portion of the water tank T. Then, the central clusters 30 concentrated in the center are subjected to the pressure of the partition walls 32, and spontaneously form a single layer film 31 which is aligned in the most densely packed order (single layer film forming step). It is judged that the single layer film 31 has been formed in accordance with the change in the surface tension of the partition wall 32.
然後，將以聚二甲基矽氧烷(PDMS)等材質製成的暫時支撐體(轉印用微印模)33，以水面與印模面成水平之方式靠近所獲得的單層膜31的表面，將單層膜31轉印於暫時支撐體33表面(轉移步驟)。Then, a temporary support (transfer micro-imprint) 33 made of a material such as polydimethyl siloxane (PDMS) is brought close to the obtained single-layer film 31 so that the water surface and the stamp surface are horizontal. The surface of the single layer film 31 is transferred onto the surface of the temporary support 33 (transfer step).
最後，如圖6(c)及(d)所示，從暫時支撐體33將單層膜31轉印於第1絕緣層2上。轉印可使用微接觸印刷法。於微接觸印刷法中，利用包含奈米團簇30的單層膜31與第1絕緣層2的電荷的不同而進行吸附。然後，形成於第1絕緣層2上的單層膜31作為電荷保持層3而起作用。 於圖6所示LB法中，將單層膜31轉移至暫時支撐體33上後，將暫時支撐體33上的單層膜31轉印於第1絕緣層2上，但亦可不使用暫時支撐體33而直接將單層膜31轉印於第1絕緣層2上。Finally, as shown in FIGS. 6(c) and 6(d), the single layer film 31 is transferred from the temporary support 33 to the first insulating layer 2. The transfer can be performed using a microcontact printing method. In the microcontact printing method, adsorption is performed by using a difference between the charge of the single layer film 31 including the nano clusters 30 and the first insulating layer 2. Then, the single layer film 31 formed on the first insulating layer 2 functions as the charge holding layer 3. In the LB method shown in FIG. 6, after the single layer film 31 is transferred onto the temporary support 33, the single layer film 31 on the temporary support 33 is transferred onto the first insulating layer 2, but the temporary support may not be used. The single layer film 31 is directly transferred onto the first insulating layer 2 by the body 33.
接著，就旋轉塗佈法進行說明。旋轉塗佈法與周知的塗佈法相同。使用旋轉塗佈法時難以獲得奈米團簇30之單層膜，如圖2所示電荷保持層3成為積層複數層奈米團簇30者。Next, the spin coating method will be described. The spin coating method is the same as the well-known coating method. When the spin coating method is used, it is difficult to obtain a single layer film of the nano-clusters 30, and as shown in FIG. 2, the charge-holding layer 3 becomes a laminated plurality of nano-clusters 30.
於製成之電荷保持層3上依序積層第2絕緣層4及電極5，獲得記憶組件10。第2絕緣層4係以旋轉塗佈等周知的塗佈法將氟系溶劑塗附於電荷保持層3上，去除溶劑而獲得。電極5可以濺鍍或金屬蒸鍍容器(Knudsen Cell)等周知的方法成膜。The second insulating layer 4 and the electrode 5 are sequentially laminated on the formed charge holding layer 3 to obtain the memory module 10. The second insulating layer 4 is obtained by applying a fluorine-based solvent to the charge holding layer 3 by a known coating method such as spin coating, and removing the solvent. The electrode 5 can be formed into a film by a known method such as sputtering or a metal vapor deposition container (Knudsen Cell).
製造有機記憶體作為本發明之記憶組件時，亦可使用於有機EL開發出之溼式製程、可列印製程等製造技術。 例如，由並五苯或聚噻吩等有機半導體構成之半導體部可使用於有機EL開發出之溼式製程、可列印製程或蒸鍍法形成於支撐基板上。When the organic memory is manufactured as the memory component of the present invention, it can also be used in a manufacturing process such as a wet process or a printable process developed by the organic EL. For example, a semiconductor portion composed of an organic semiconductor such as pentacene or polythiophene can be formed on a support substrate by a wet process, a print process, or a vapor deposition method developed for organic EL.
如上所述，若根據本實施形態之記憶組件，藉由奈米團簇形成電荷保持層，從而C-V(電容-電壓)特性中之遲滯寬度變大。又，此遲滯寬度可藉由改變奈米團簇尺寸(構成奈米團簇的原子數)而進行控制。As described above, according to the memory module of the present embodiment, the charge holding layer is formed by the nano cluster, and the hysteresis width in the C-V (capacitance-voltage) characteristic is increased. Moreover, the hysteresis width can be controlled by changing the size of the nano-clusters (the number of atoms constituting the nano-clusters).
又，藉由於記憶組件的電荷保持層使用集合有數個~數千個原子或分子之超微粒子的奈米團簇，可使記憶組件微細化。Further, since the charge holding layer of the memory element uses a nano cluster in which a plurality of ultrafine particles of several to several thousand atoms or molecules are collected, the memory component can be made fine.
進而，本實施形態之記憶組件藉由電荷保持層具有離散的電子位準而有記憶組件多值化的可能。Further, in the memory module of the present embodiment, the charge retention layer has a discrete electronic level and the memory component may be multi-valued.
實施例 以下藉由實施例更明確地說明本發明之效果。本發明不限定於以下實施例，可於不變更其主旨之範圍內適當地進行變更後實施。EXAMPLES Hereinafter, the effects of the present invention will be more specifically explained by way of examples. The present invention is not limited to the following embodiments, and may be appropriately modified and implemented without departing from the spirit and scope of the invention.
(實施例1) 首先，製作以Au25 (SR)18 表示之奈米團簇(附有機配位基之奈米團簇)。其中，R為C12 H25 。具體而言，此奈米團簇以如下程序製作。(Example 1) First, a nano cluster represented by Au 25 (SR) 18 (nano cluster with an organic ligand) was produced. Wherein R is C 12 H 25 . Specifically, this nano cluster is produced by the following procedure.
於氯化金酸(HAuCl4 )之水溶液中添加加入有相轉移試劑(四辛基溴化銨；(C8 H17 )4 NBr)之甲苯溶液，進行攪拌。藉由進行攪拌使AuCl4 -相轉移至甲苯中。藉由分液漏斗將甲苯溶液分離，在其中加入十二烷基硫醇(C12 H25 SH)。 於該混合液中加入還原劑(硼氫化鈉；NaBH4 )之水溶液，製成硫醇保護Au奈米團簇(Aun (SR)m )。使用再沈澱法去除未反應之烷硫醇及副產物後，藉由再結晶化法獲得Au25 (SR)18 。以紫外光可見光吸收光譜法鑑定出的Au25 (SR)18 奈米團簇之純度為95%以上。A toluene solution containing a phase transfer reagent (tetraoctyl ammonium bromide; (C 8 H 17 ) 4 NBr) was added to an aqueous solution of gold chloride acid (HAuCl 4 ), followed by stirring. The AuCl 4 - phase was transferred to toluene by stirring. The toluene solution was separated by a separatory funnel to which dodecyl mercaptan (C 12 H 25 SH) was added. An aqueous solution of a reducing agent (sodium borohydride; NaBH 4 ) was added to the mixture to prepare a thiol-protected Au nano cluster (Au n (SR) m ). After the unreacted alkanethiol and by-products were removed by a reprecipitation method, Au 25 (SR) 18 was obtained by a recrystallization method. The purity of the Au 25 (SR) 18 nm cluster identified by ultraviolet visible light absorption spectroscopy was 95% or more.
使用如此獲得的奈米團簇製作電荷保持層。電荷保持層設置於半導體部的第1絕緣層上。半導體部設為0.5mm厚的矽，第1絕緣層設為20nm的氧化矽。在半導體部之設有電荷保持層的面的相反側設有鋁層作為對向電極。A charge retention layer was produced using the nano clusters thus obtained. The charge holding layer is provided on the first insulating layer of the semiconductor portion. The semiconductor portion was made of ruthenium having a thickness of 0.5 mm, and the first insulating layer was made of ruthenium oxide of 20 nm. An aluminum layer is provided as a counter electrode on the opposite side of the surface of the semiconductor portion on which the charge holding layer is provided.
電荷保持層使用LB法製作。電荷保持層為於厚度方向排列有1層奈米團簇的單層膜。電荷保持層的厚度為4.5nm。電荷保持層的厚度係利用穿透式電子顯微鏡實際測量Au奈米團簇核心部的直徑，求出理論上的保護分子(烷硫醇)的長度，由此等和算出電荷保持層之厚度。於奈米團簇的分散上使用氯仿，以上述程序製作電荷保持層。理論上的保護分子的長度係根據周知文獻而求得。The charge retention layer was produced using the LB method. The charge holding layer is a single layer film in which one layer of nanoclusters are arranged in the thickness direction. The thickness of the charge holding layer was 4.5 nm. The thickness of the charge holding layer was measured by a transmission electron microscope to actually measure the diameter of the core portion of the Au nanoclusters, and the length of the theoretical protective molecule (alkanol) was determined, thereby calculating the thickness of the charge holding layer. A charge-holding layer was produced by the above procedure using chloroform on the dispersion of nano-clusters. The length of the theoretical protective molecule is determined according to well-known literature.
然後，於獲得之電荷保持層上設置第2絕緣層。第2絕緣層係旋轉塗佈旭硝子股份有限公司製的CYTOP(註冊商標)、進行加熱而獲得。CYTOP(註冊商標)的吸水率為0.01%以下、介電常數為2.0~2.1(100Hz~1MHz、室溫)、氧透過係數為8.34×10-10 cm3 ·cm/cm2 ·s·cmHg、玻璃轉移溫度為108℃。第2絕緣層的厚度為150nm。 最後於第2絕緣層上成膜金作為電極，製成記憶組件。Then, a second insulating layer is provided on the obtained charge holding layer. The second insulating layer was obtained by spin-coating CYTOP (registered trademark) manufactured by Asahi Glass Co., Ltd. and heating. CYTOP (registered trademark) has a water absorption rate of 0.01% or less, a dielectric constant of 2.0 to 2.1 (100 Hz to 1 MHz, room temperature), and an oxygen permeability coefficient of 8.34 × 10 -10 cm 3 ·cm/cm 2 ·s·cmHg. The glass transition temperature was 108 °C. The thickness of the second insulating layer was 150 nm. Finally, gold was formed as an electrode on the second insulating layer to form a memory module.
使用製成的記憶組件進行表示記憶組件的記憶特性的C-V(電容-電壓)評價。A C-V (capacitance-voltage) evaluation indicating the memory characteristics of the memory component was performed using the fabricated memory component.
測定器使用Nagase Techno Engineering股份有限公司製(Graii-LOGOS01S-4)的四點探針裝置與Agilent Technologies股份有限公司製(B1500A)的半導體分析儀。As the measuring instrument, a four-point probe device manufactured by Nagase Techno Engineering Co., Ltd. (Graii-LOGOS01S-4) and a semiconductor analyzer manufactured by Agilent Technologies, Inc. (B1500A) were used.
測定環境於真空(~2×10-3 Pa)下、室溫下進行。測定條件如下。 試料尺寸：5mm×5mm 4個位置(Au電極3φ) 頻率：1kHz~1MHz 振幅：AC100mV 掃描範圍：-10V~+10V 掃描速度：每0.1V、各點0.1V/2secThe measurement environment was carried out under vacuum (~2×10 -3 Pa) at room temperature. The measurement conditions are as follows. Sample size: 5mm × 5mm 4 positions (Au electrode 3φ) Frequency: 1kHz~1MHz Amplitude: AC100mV Scanning range: -10V~+10V Scanning speed: 0.1V/2sec per 0.1V, each point
(實施例2) 實施例2除了將奈米團簇設為Au38 (SR)24 以外，與實施例1相同地製作記憶組件。對獲得的記憶組件進行C-V評價。於電荷保持層中，特定團簇尺寸之奈米團簇(Au38)於全體奈米團簇中所占的比率為95%以上，電荷保持層之厚度為4.7nm。(Example 2) A memory module was produced in the same manner as in Example 1 except that the nano cluster was changed to Au 38 (SR) 24 . A CV evaluation was performed on the obtained memory component. In the charge-holding layer, the ratio of the nano-clusters (Au38) of a specific cluster size to the entire nano-cluster is 95% or more, and the thickness of the charge-holding layer is 4.7 nm.
(實施例3) 實施例3除了將奈米團簇設為Au144 (SR)60 以外，與實施例1相同地製作記憶組件。對獲得的記憶組件進行C-V評價。 於電荷保持層中，特定團簇尺寸之奈米團簇(Au144 )於全體奈米團簇中所占的比率為95%以上，電荷保持層之厚度為5.1nm。(Example 3) A memory module was produced in the same manner as in Example 1 except that the nano cluster was changed to Au 144 (SR) 60 . A CV evaluation was performed on the obtained memory component. In the charge holding layer, the ratio of the nano cluster of the specific cluster size (Au 144 ) to the entire nano cluster was 95% or more, and the thickness of the charge holding layer was 5.1 nm.
(比較例1) 比較例1除了於電荷保持層不使用奈米團簇而使用粒子尺寸為直徑3nm左右的奈米粒子(AuDT)以外，與實施例1相同地製作記憶組件。對獲得的記憶組件進行C-V評價。(Comparative Example 1) A memory module was produced in the same manner as in Example 1 except that a nanoparticle having a particle size of about 3 nm was used in the charge-holding layer without using a nano-cluster. The obtained memory component was subjected to C-V evaluation.
圖7顯示實施例1~3及比較例1之記憶組件之C-V特性的結果。圖7(a)為實施例1之結果、圖7(b)為實施例2之結果、圖7(c)為實施例3之結果、圖7(d)為比較例1之結果。縱軸為電容，橫軸為施加電壓。實施例1之記憶組件之遲滯寬度Vth為0.35V、實施例2之記憶組件之遲滯寬度Vth為1.7V、實施例3之記憶組件之遲滯寬度Vth為0.62V、比較例1之記憶組件之遲滯寬度Vth為0.18V。Fig. 7 shows the results of the C-V characteristics of the memory modules of Examples 1 to 3 and Comparative Example 1. 7(a) shows the results of Example 1, FIG. 7(b) shows the results of Example 2, FIG. 7(c) shows the results of Example 3, and FIG. 7(d) shows the results of Comparative Example 1. The vertical axis is the capacitance and the horizontal axis is the applied voltage. The hysteresis width Vth of the memory module of the first embodiment is 0.35 V, the hysteresis width Vth of the memory module of the second embodiment is 1.7 V, and the hysteresis width Vth of the memory module of the third embodiment is 0.62 V, and the hysteresis of the memory component of the comparative example 1 is The width Vth is 0.18V.
如圖7(d)所示，使用奈米粒子時之遲滯寬度較窄。因此，有因資料寫入、改寫時所施加之電壓小幅波動，而應記錄的資料被改寫之情形。相對於此，藉由於電荷保持層使用奈米團簇，可擴大遲滯寬度。As shown in Fig. 7(d), the hysteresis width is narrow when the nanoparticles are used. Therefore, there is a case where the voltage applied when the data is written or rewritten is slightly fluctuated, and the data to be recorded is rewritten. On the other hand, since the charge holding layer uses a nano cluster, the hysteresis width can be increased.
且若如圖7(a)~(c)所示，改變構成奈米團簇的原子數(奈米團簇尺寸)，可控制遲滯寬度。Further, as shown in Figs. 7(a) to (c), the hysteresis width can be controlled by changing the number of atoms (nano cluster size) constituting the nano cluster.
又，亦進行實施例1~3及比較例1之記憶組件之溫度依存性評價。溫度依存性於80K~350K下進行。圖8顯示實施例1~3及比較例1之記憶組件之溫度依存性評價結果。縱軸為遲滯寬度。Further, the temperature dependence evaluation of the memory modules of Examples 1 to 3 and Comparative Example 1 was also performed. The temperature dependence is carried out at 80K~350K. Fig. 8 shows the results of temperature dependence evaluation of the memory modules of Examples 1 to 3 and Comparative Example 1. The vertical axis is the hysteresis width.
如圖8所示，經確認於高溫下可獲得更寬的遲滯寬度。即，促進電子的注入。As shown in Fig. 8, it was confirmed that a wider hysteresis width was obtained at a high temperature. That is, it promotes the injection of electrons.
又，圖9為將實施例2的曲線圖進行加工而得之曲線圖。於圖9中，虛線表示之曲線圖與圖7(b)相同。如圖7(b)及(c)所示，實施例2及實施例3的曲線圖顯示多階段的遲滯行為。因此，如圖9所示可將曲線圖區分為三個。即，可將作為載體之電子之注入/釋出分為三個階段，表示「0~2」二階段多值化的可能性。Further, Fig. 9 is a graph obtained by processing the graph of the second embodiment. In Fig. 9, the graph indicated by the broken line is the same as Fig. 7(b). As shown in FIGS. 7(b) and (c), the graphs of Example 2 and Example 3 show multi-stage hysteresis behavior. Therefore, the graph can be divided into three as shown in FIG. That is, the injection/release of electrons as a carrier can be divided into three stages, indicating the possibility of "0~2" two-stage multi-valued.
(實施例4) 實施例4將奈米團簇設為TaSi16 。 首先，於氣相中生成TaSi16 奈米團簇。將於氣相中生成的奈米團簇入射至貯存於貯留容器中之分散介質(聚乙二醇二甲醚)，得到奈米團簇之分散液。將分散液移至經氬氣取代的手套箱，利用再結晶法去除分散介質且分離出TaSi16 奈米團簇。經分離出的TaSi16 於全體奈米團簇中所占的比率為50%以上(從元素分析及HPLC結果)。(Example 4) In Example 4, the nano cluster was set to TaSi 16 . First, TaSi 16 nanoclusters are formed in the gas phase. The nano clusters generated in the gas phase are incident on a dispersion medium (polyethylene glycol dimethyl ether) stored in a storage container to obtain a dispersion of nano clusters. The dispersion was transferred to an argon-substituted glove box, the dispersion medium was removed by recrystallization, and TaSi 16 nanoclusters were separated. The ratio of the isolated TaSi 16 to the entire nano-cluster was 50% or more (from elemental analysis and HPLC results).
以下，說明算出TaSi16 於全體奈米團簇中所占比率的方法。 圖10為於氣相中生成之奈米團簇之質譜圖。從質譜圖可確認於氣相中生成之奈米團簇為TaSi16 + 。Hereinafter, a method of calculating the ratio of TaSi 16 in the entire nano-cluster will be described. Figure 10 is a mass spectrum of nanoclusters generated in the gas phase. From the mass spectrum, it was confirmed that the nano cluster formed in the gas phase was TaSi 16 + .
圖11為TaSi之奈米團簇分散液之高效液相層析圖(HPLC)。橫軸為供給管柱的溶液量，縱軸為吸光度。使用以惰性甲基取代末端且經封端之聚乙二醇二甲醚(PEG、分子量250左右、沸點250℃以上)作為分散介質，生成TaSin - 、TaSin + 及TaSin (0) 作為奈米團簇。Figure 11 is a high performance liquid chromatogram (HPLC) of a nano-clustered dispersion of TaSi. The horizontal axis represents the amount of solution supplied to the column, and the vertical axis represents the absorbance. TaSi n - , TaSi n + and TaSi n (0) are formed by using a terminally substituted polyethylene glycol dimethyl ether (PEG, molecular weight of about 250, boiling point of 250 ° C or more) as a dispersion medium. Nano clusters.
於HPLC中，一面從分析管柱的一側供給溶液，一面利用設置於管柱另一側的分光光度計測定吸光度。於分析上使用尺寸排除管柱。分析管柱內為多孔質的構造，根據奈米團簇尺寸的不同進入分析管柱內的速度不同。尺寸較小的奈米團簇相較尺寸較大的奈米團簇，由於一面於多孔質的構造內部迂迴一面朝行進方向前進，故行進速度較慢。因此，於供給至分析管柱內之供給量較少之階段，確認到尺寸較大(質量較大)的奈米團簇。之後，隨著溶液供給量的增加，奈米團簇尺寸變小(質量變小)。In HPLC, the solution was supplied from one side of the analysis column, and the absorbance was measured with a spectrophotometer provided on the other side of the column. Use the size exclusion column for analysis. The analysis of the inside of the column is a porous structure, and the velocity entering the analysis column is different depending on the size of the nano-cluster. The smaller-sized nanoclusters are slower in traveling speed than the larger-sized nanoclusters because they travel in the traveling direction while retracting inside the porous structure. Therefore, a nano-cluster having a large size (large mass) was confirmed at a stage where the supply amount to the analysis column was small. Thereafter, as the supply amount of the solution increases, the size of the nano cluster becomes smaller (the mass becomes smaller).
即，圖11所示HPLC圖譜表示分散液中所含全體奈米團簇的存在比率。橫軸表示溶出體積即團簇尺寸，縱軸表示吸光度即團簇的存在量。從曲線圖來看，可於橫軸8.5mL(溶劑的供給速度0.5mL/分時從供給溶劑起17分鐘後)確認到最大波峰。That is, the HPLC chart shown in Fig. 11 indicates the existence ratio of the entire nano-clusters contained in the dispersion. The horizontal axis represents the elution volume, that is, the cluster size, and the vertical axis represents the absorbance, that is, the amount of the cluster present. From the graph, the maximum peak was confirmed at 8.5 mL on the horizontal axis (the solvent supply rate was 0.5 mL/min, 17 minutes after the supply of the solvent).
接著，亦確認相對於奈米團簇分散液之代表波峰的分離成分的質譜圖。圖12為將奈米團簇分散液經管柱純化而得之試料之質譜圖，(a)為質譜圖之全體圖像，(b)為將部分波峰放大後之放大圖。圖12(a)及(b)之質譜圖使用圖11中之8.5mL部分的試料進行測量。橫軸為質量數除以電荷之m/z值，縱軸為檢測強度。Next, the mass spectrum of the separated component with respect to the representative peak of the nano-cluster dispersion was also confirmed. Fig. 12 is a mass spectrum of a sample obtained by purifying a nano-cluster dispersion through a column, (a) is an entire image of a mass spectrum, and (b) is an enlarged view of a partial peak. The mass spectra of Figures 12(a) and (b) were measured using the 8.5 mL portion of the sample of Figure 11. The horizontal axis is the mass number divided by the m/z value of the charge, and the vertical axis is the detection intensity.
如圖12(a)及(b)所示，由質量分析結果可知，生成有TaSi13 - (m/z≒545a.m.u.)、TaSi14 - (m/z≒574a.m.u.)、TaSi15 - (m/z≒602a.m.u.)、TaSi16 - (m/z≒630a.m.u.)。此等認為是TaSi16 + 之解離產物。即，顯示表示代表波峰的奈米團簇為TaSi16 + ，於分散液中包含作為主成分的TaSi16 + 。另一方面，未觀測到尺寸或組成不同的Sin - 等。即，從圖10、圖12(a)及(b)可確認，氣相的奈米團簇無凝聚地分散於分散介質中。As shown in Fig. 12 (a) and (b), it is known from mass spectrometry that TaSi 13 - (m/z ≒ 545a.mu), TaSi 14 - (m/z ≒ 574a.mu), TaSi 15 - (m/z≒602a.mu), TaSi 16 - (m/z≒630a.mu). These are considered to be dissociation products of TaSi 16 + . That is, displaying a representation of nano clusters is representative of the peak + TaSi 16, comprising as a main component in the dispersion TaSi 16 +. On the other hand, Si n - or the like having a different size or composition was not observed. That is, it can be confirmed from FIGS. 10 and 12 (a) and (b) that the nano-clusters in the gas phase are dispersed in the dispersion medium without aggregation.
接著，算出經確認的特定團簇尺寸的奈米團簇(TaSi16 + )於全體奈米團簇中所占的比率。算出按照以下程序進行。Next, the ratio of the confirmed cluster size of the specific cluster size (TaSi 16 + ) to the entire nano cluster was calculated. The calculation is performed according to the following procedure.
首先，確認測定單一成分物質(分子量固定一個)的物質時之HPLC結果。 圖13為單一成分之聚苯乙烯之HPLC。此時獲得之波峰之半高寬為0.63mL、峰值為8.28mL。聚苯乙烯使用分子量相同者作為標準物質，以於層析圖中具有某程度的寬度之波峰曲線之形式被檢測出。First, the HPLC result when a substance of a single component (one molecule having a fixed molecular weight) was measured was confirmed. Figure 13 is an HPLC of a single component polystyrene. The half-height of the peak obtained at this time was 0.63 mL and the peak value was 8.28 mL. Polystyrene is used as a standard substance with the same molecular weight, and is detected in the form of a peak curve having a certain width in the chromatogram.
即，於圖11所示TaSi奈米團簇分散液之HPLC中，應該以單一的TaSi16 亦具有某程度的寬度之波峰曲線之形式被檢測出。因此，以波峰頂點為中心，以半高寬0.63mL的波峰曲線擬合圖11所示HPLC。圖11中之虛線為擬合結果。換言之，TaSi之奈米團簇分散液之HPLC中之虛線部為起因於TaSi16 產生的波峰。因此，虛線部的面積相對於實線部的面積之面積率可換算為經確認的特定團簇尺寸之奈米團簇(TaSi16 + )於全體奈米團簇中所占的比率。That is, in the HPLC of the TaSi nano cluster dispersion shown in Fig. 11, it should be detected in the form of a peak curve in which a single TaSi 16 also has a certain width. Therefore, the HPLC shown in Fig. 11 was fitted with a peak curve having a full width at half maximum of 0.63 mL centering on the peak of the peak. The dotted line in Fig. 11 is the fitting result. In other words, the dotted line in the HPLC of the TaSi nano-cluster dispersion is a peak due to TaSi 16 generation. Therefore, the area ratio of the area of the broken line portion to the area of the solid line portion can be converted into the ratio of the confirmed nano cluster (TaSi 16 + ) of the specific cluster size to the entire nano cluster.
由上述程序換算的結果為，經確認的特定團簇尺寸之奈米團簇(TaSi16 + )於全體奈米團簇中所占的比率為57.2%。 如上所述，可獲得經分散有構成奈米團簇之元素由TaSi構成之奈米團簇之奈米團簇分散液。又，獲得之奈米團簇分散液為穩定的，且即使將分散液靜置6個月左右後亦確認沒有奈米團簇的沈降。即，可知該奈米團簇分散液均勻地分散特定尺寸的奈米團簇。As a result of conversion by the above procedure, the ratio of the confirmed cluster size of the specific cluster size (TaSi 16 + ) to the entire nano cluster was 57.2%. As described above, a nano-cluster dispersion in which nano-clusters composed of TaSi elements constituting the nano-clusters are dispersed can be obtained. Further, the obtained nano-cluster dispersion was stable, and it was confirmed that there was no sedimentation of the nano-clusters even after the dispersion was allowed to stand for about 6 months. That is, it is understood that the nano-cluster dispersion uniformly disperses nano-clusters of a specific size.
將獲得之分散體分散於四氫呋喃(THF)，藉由旋轉塗佈法製作奈米團簇之多層膜。以轉數3,000rpm旋轉塗佈奈米團簇之THF分散液(10mg/mL)。旋轉塗佈使用旋轉塗佈機(裝置：Aiden公司製、型號SC2005)。藉由旋轉塗佈獲得之電荷保持層之厚度為60nm。事先以掃描式顯微鏡使用截面圖像測定旋轉塗佈條件與膜厚的關係，而求出電荷保持層之厚度。其他條件與實施例1相同。對獲得的記憶組件進行C-V評價。The obtained dispersion was dispersed in tetrahydrofuran (THF), and a multilayer film of nano-clusters was produced by a spin coating method. The nano-clustered THF dispersion (10 mg/mL) was spin-coated at 3,000 rpm. A spin coater (device: manufactured by Aiden Co., model SC2005) was used for spin coating. The thickness of the charge holding layer obtained by spin coating was 60 nm. The thickness of the charge holding layer was determined by measuring the relationship between the spin coating conditions and the film thickness using a cross-sectional image by a scanning microscope. Other conditions are the same as in the first embodiment. The obtained memory component was subjected to C-V evaluation.
(實施例5) 實施例5除了將奈米團簇設為TiSi16 以外，與實施例4相同地製作記憶組件。藉由旋轉塗佈獲得之電荷保持層之厚度為60nm。對獲得的記憶組件進行C-V評價。(Example 5) A memory module was produced in the same manner as in Example 4 except that the nano cluster was made of TiSi 16 . The thickness of the charge holding layer obtained by spin coating was 60 nm. A CV evaluation was performed on the obtained memory component.
圖14顯示實施例4之記憶組件之C-V特性之結果，圖15顯示實施例5之記憶組件之C-V特性之結果。縱軸為電容，橫軸為施加電壓。實施例4之記憶組件之遲滯寬度Vth為1.19V、實施例5之記憶組件之遲滯寬度Vth為3.12V。14 shows the results of the C-V characteristics of the memory module of Example 4, and FIG. 15 shows the results of the C-V characteristics of the memory module of Example 5. The vertical axis is the capacitance and the horizontal axis is the applied voltage. The hysteresis width Vth of the memory module of the fourth embodiment is 1.19 V, and the hysteresis width Vth of the memory module of the fifth embodiment is 3.12 V.
於奈米團簇使用TaSi16 及TiSi16 之情形亦可獲得作為C-V特性之遲滯曲線。即，於奈米團簇使用TaSi16 及TiSi16 之情形亦作為記憶組件而起作用。此等奈米團簇為可於氣相中生成且初次製作，尚未有人提出使用此等奈米團簇的記憶組件。又，藉由使用此等奈米團簇，可改變遲滯曲線的中心電位。A hysteresis curve as a CV characteristic can also be obtained in the case where TaSi 16 and TiSi 16 are used for the nano cluster. That is, the case where TaSi 16 and TiSi 16 are used in the nano cluster also functions as a memory component. These nano-clusters are produced in the gas phase and are produced for the first time. No memory components have been proposed for the use of such nano-clusters. Also, by using these nanoclusters, the center potential of the hysteresis curve can be changed.
針對C-V特性，調查對電荷保持層厚度的依存性。 圖16(a)及(b)與實施例2相同，分別為以單層以下的附有機配位基之奈米團簇Au38 (SR)24 構成電荷保持層的記憶組件之C-V特性，以及以2~3層奈米團簇Au38 (SR)24 構成電荷保持層的記憶組件之C-V特性。 各記憶組件與實施例1相同方法製作。 LB法中之表面壓力分別為10mN/m、25mN/m。The dependence on the thickness of the charge retention layer was investigated for the CV characteristics. 16(a) and (b) are the CV characteristics of the memory element constituting the charge retention layer by the nano-clustered Au 38 (SR) 24 having an organic ligand having a single layer or less, as in the second embodiment, and The CV characteristics of the memory component of the charge retention layer are formed by 2 to 3 layers of nano cluster Au 38 (SR) 24 . Each memory module was produced in the same manner as in Example 1. The surface pressure in the LB method is 10 mN/m and 25 mN/m, respectively.
由圖16(a)及(b)之C-V曲線可知，各自的遲滯寬度Vth為0.21V、3.48V。 如此，藉由奈米團簇層的多層化，可增大遲滯寬度。認為奈米團簇層的多層化對增加電荷儲存量有幫助，可增大遲滯寬度。雖然根據有機配位基種類等的不同，不能說增加層數單純地與增大遲滯寬度相關，但藉由奈米團簇層的多層化(或電荷保持層的厚度)的不同，已確認可控制遲滯寬度即記憶特性。 再者，奈米團簇層的多層化亦可藉由旋轉塗佈法等其他方法進行。As can be seen from the C-V curves of Figs. 16(a) and (b), the respective hysteresis widths Vth are 0.21 V and 3.48 V. Thus, by multi-layering the nano-cluster layer, the hysteresis width can be increased. It is believed that the multilayering of the nano-cluster layer is helpful for increasing the charge storage amount and increasing the hysteresis width. Although it is not said that the increase of the number of layers is simply related to the increase of the hysteresis width, depending on the type of the organic ligand, etc., it is confirmed that it is controllable by the multilayering of the nano-cluster layer (or the thickness of the charge-holding layer). The hysteresis width is the memory characteristic. Further, the multilayering of the nano-cluster layer can also be carried out by other methods such as spin coating.
針對C-V特性，調查對有機配位基種類的依存性。 圖17(a)與實施例1相同，為附有機配位基之奈米團簇Au25 (SR)18 (R為C12 H25 )構成電荷保持層的記憶組件之C-V特性，圖17(b)為附有與圖17(a)不同種類有機配位基之奈米團簇Au25 (SR)18 (R為C2 H4 Ph)構成電荷保持層的記憶組件之C-V特性。 各記憶組件與實施例1相同方法製作。For the CV characteristics, the dependence on the type of organic ligands was investigated. Fig. 17 (a) is the same as the first embodiment, and is a CV characteristic of a memory component constituting a charge retention layer of a nano cluster of Au 25 (SR) 18 (R is C 12 H 25 ) with an organic ligand, Fig. 17 ( b) CV characteristics of a memory module constituting a charge retention layer with a nano cluster Au 25 (SR) 18 (R is C 2 H 4 Ph) having an organic ligand different from that of Fig. 17 (a). Each memory module was produced in the same manner as in Example 1.
由圖17(a)及(b)之C-V曲線可知，各自的遲滯寬度Vth為0.13V、0.61V。 如此，藉由有機配位基的取代可增大遲滯寬度。遲滯寬度的增大與促進電子注入相關，可進行低電壓驅動。確認根據有機配位基的種類的不同，可控制遲滯寬度即記憶特性。As can be seen from the C-V curves of Figs. 17(a) and (b), the respective hysteresis widths Vth are 0.13 V and 0.61 V. Thus, the hysteresis width can be increased by substitution of an organic ligand. The increase in the hysteresis width is related to the promotion of electron injection and can be driven at a low voltage. It was confirmed that the hysteresis width, that is, the memory characteristics, can be controlled depending on the kind of the organic ligand.
1‧‧‧半導體部
2‧‧‧第1絕緣層
3‧‧‧電荷保持層
4‧‧‧第2絕緣層
5‧‧‧電極
5a‧‧‧電極
6‧‧‧對向電極
7‧‧‧源極電極
8‧‧‧汲極電極
10‧‧‧記憶組件
11‧‧‧記憶組件
12‧‧‧記憶組件
13‧‧‧記憶組件
14‧‧‧記憶組件
30‧‧‧奈米團簇
31‧‧‧有機配位基(單層膜)
32‧‧‧間隔壁
33‧‧‧暫時支撐體
100‧‧‧有機記憶體
101‧‧‧半導體部
102‧‧‧第1絕緣層
103‧‧‧電荷保持層
104‧‧‧第2絕緣層
104A‧‧‧絕緣層
104B‧‧‧由有機配位基之一部分構成之層
105‧‧‧電極
106‧‧‧對向電極
110‧‧‧支撐基板
130‧‧‧奈米團簇
131‧‧‧有機配位基
T‧‧‧水槽
W‧‧‧水1‧‧‧Semiconductor Department
2‧‧‧1st insulation layer
3‧‧‧ Charge retention layer
4‧‧‧2nd insulation layer
5‧‧‧Electrode
5a‧‧‧electrode
6‧‧‧ opposite electrode
7‧‧‧Source electrode
8‧‧‧汲electrode
10‧‧‧ memory components
11‧‧‧Memory components
12‧‧‧ memory components
13‧‧‧Memory components
14‧‧‧ memory components
30‧‧‧Nemi clusters
31‧‧‧Organic ligands (single layer film)
32‧‧‧ partition wall
33‧‧‧ temporary support
100‧‧‧ organic memory
101‧‧‧Semiconductor Department
102‧‧‧1st insulation layer
103‧‧‧ Charge retention layer
104‧‧‧2nd insulation layer
104A‧‧‧Insulation
104B‧‧‧layer consisting of one part of an organic ligand
105‧‧‧Electrode
106‧‧‧ opposite electrode
110‧‧‧Support substrate
130‧‧‧Nemi clusters
131‧‧‧Organic ligands
T‧‧‧Sink
W‧‧‧Water
圖1為第1實施形態之記憶組件之剖面示意圖。 圖2為第1實施形態之記憶組件另一例之剖面示意圖。 圖3(a)~(b)為第1實施形態之記憶組件另一例之剖面示意圖。 圖4為第1實施形態之記憶組件另一例之剖面示意圖。 圖5為第1實施形態之記憶組件另一例之有機記憶體之剖面示意圖。 圖6(a)~(d)為用以說明LB法之示意圖。 圖7(a)~(d)顯示實施例1~3及比較例1之記憶組件之C-V特性的結果。 圖8顯示實施例1~3及比較例1之記憶組件之溫度依存性評價結果。 圖9為將實施例2的曲線圖進行加工而得之曲線圖。 圖10為以奈米團簇生成方法生成構成元素由Ta及Si構成之奈米團簇所獲得的氣相中之奈米團簇之質譜圖。 圖11為經分散有構成元素由Ta及Si構成之奈米團簇的奈米團簇分散液之高效液相層析圖。 圖12(a)~(b)為使用本發明之一態樣之奈米團簇分散液製造方法製成之奈米團簇分散液經管柱純化而得的試料之質譜圖，(a)為質譜圖之全體圖像，(b)為將部分波峰放大後之放大圖。 圖13為單一成分之聚苯乙烯之高效液相層析圖。 圖14所示者為實施例4之記憶組件之C-V特性結果。 圖15所示者為實施例5之記憶組件之C-V特性結果。 圖16(a)為以單層以下Au38 (SR)24 構成電荷保持層之記憶組件之C-V特性，圖16(b)為以2~3層奈米團簇Au38 (SR)24 構成電荷保持層之記憶組件之C-V特性。 圖17(a)為Au25 (SR)18 (R為C12 H25 )構成電荷保持層之記憶組件之C-V特性，圖17(b)為Au25 (SR)18 (R為C2 H4 Ph)構成電荷保持層之記憶組件之C-V特性。 圖18顯示用以說明動作原理之概念的C-V曲線、及本發明之記憶組件之剖面示意圖。Fig. 1 is a schematic cross-sectional view showing a memory module of a first embodiment. Fig. 2 is a schematic cross-sectional view showing another example of the memory module of the first embodiment. 3(a) to 3(b) are schematic cross-sectional views showing another example of the memory module of the first embodiment. Fig. 4 is a schematic cross-sectional view showing another example of the memory module of the first embodiment. Fig. 5 is a schematic cross-sectional view showing an organic memory of another example of the memory module of the first embodiment. 6(a) to (d) are schematic views for explaining the LB method. 7(a) to (d) show the results of the CV characteristics of the memory modules of Examples 1 to 3 and Comparative Example 1. Fig. 8 shows the results of temperature dependence evaluation of the memory modules of Examples 1 to 3 and Comparative Example 1. Fig. 9 is a graph obtained by processing the graph of the second embodiment. Fig. 10 is a mass spectrum of a nano-cluster in a gas phase obtained by generating a nano-cluster composed of Ta and Si as a constituent element by a nano cluster formation method. Fig. 11 is a high performance liquid chromatogram of a nanoclay dispersion in which a nano cluster composed of Ta and Si is dispersed. 12(a) to (b) are mass spectra of a sample obtained by purifying a nano-cluster dispersion prepared by a method for producing a nano-cluster dispersion of the present invention by a column, (a) The entire image of the mass spectrum, (b) is an enlarged view of a part of the peaks. Figure 13 is a high performance liquid chromatogram of a single component polystyrene. Figure 14 shows the results of the CV characteristics of the memory module of the fourth embodiment. Figure 15 shows the results of the CV characteristics of the memory module of the fifth embodiment. Fig. 16(a) shows the CV characteristics of a memory module in which a charge holding layer is formed of Au 38 (SR) 24 or less, and Fig. 16 (b) shows a charge of 2 to 3 layers of nano cluster Au 38 (SR) 24 . Maintain the CV characteristics of the memory components of the layer. Fig. 17(a) shows the CV characteristics of the memory component constituting the charge retention layer of Au 25 (SR) 18 (R is C 12 H 25 ), and Fig. 17(b) is Au 25 (SR) 18 (R is C 2 H 4 Ph) CV characteristics of the memory component constituting the charge retention layer. Fig. 18 is a cross-sectional view showing the CV curve for explaining the concept of the principle of operation and the memory module of the present invention.
Claims (16)
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