TW201730934A - Method for producing semiconductor element and method for producing solar cell - Google Patents

Method for producing semiconductor element and method for producing solar cell Download PDF

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TW201730934A
TW201730934A TW105140179A TW105140179A TW201730934A TW 201730934 A TW201730934 A TW 201730934A TW 105140179 A TW105140179 A TW 105140179A TW 105140179 A TW105140179 A TW 105140179A TW 201730934 A TW201730934 A TW 201730934A
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type impurity
impurity diffusion
semiconductor substrate
conductivity type
layer
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TWI700733B (en
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Yoshihiro Ikegami
Sachio Inaba
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Toray Industries
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    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/223—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a gaseous phase
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/22—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities
    • H01L21/225—Diffusion of impurity materials, e.g. doping materials, electrode materials, into or out of a semiconductor body, or between semiconductor regions; Interactions between two or more impurities; Redistribution of impurities using diffusion into or out of a solid from or into a solid phase, e.g. a doped oxide layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/04—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices
    • H01L31/06—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers
    • H01L31/068—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof adapted as photovoltaic [PV] conversion devices characterised by potential barriers the potential barriers being only of the PN homojunction type, e.g. bulk silicon PN homojunction solar cells or thin film polycrystalline silicon PN homojunction solar cells
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00—Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/18—Processes or apparatus specially adapted for the manufacture or treatment of these devices or of parts thereof
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/547—Monocrystalline silicon PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

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  • Condensed Matter Physics & Semiconductors (AREA)
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Abstract

A method for producing a semiconductor element using a plurality of semiconductor substrates, which is characterized by comprising the steps (a)-(c) described below and by arranging a pair of semiconductor substrates so that surfaces, on which impurity diffusing composition films of a first conductivity type are formed, face each other in the steps (b) and (c). (a) a step for forming an impurity diffusing composition film of a first conductivity type on one surface of each semiconductor substrate by applying an impurity diffusing composition of the first conductivity type thereto (b) a step for forming impurity diffusion layers of the first conductivity type by heating the semiconductor substrates, on which the impurity diffusing composition films of the first conductivity type have been respectively formed, thereby diffusing an impurity of the first conductivity type into the semiconductor substrates (c) a step for forming impurity diffusion layers of a second conductivity type by heating the semiconductor substrates in an atmosphere having a gas that contains an impurity of the second conductivity type, thereby diffusing the impurity of the second conductivity type into the other surface of each semiconductor substrate Consequently, the present invention provides a method for producing a semiconductor element and a method for producing a solar cell, which are capable of efficiently producing a semiconductor element and a solar cell by reducing the number of steps.

Description

半導體元件的製造方法及太陽電池的製造方法Method for manufacturing semiconductor device and method for manufacturing solar cell

本發明是有關於一種半導體基元件的製造方法及太陽電池的製造方法。The present invention relates to a method of fabricating a semiconductor-based device and a method of manufacturing a solar cell.

現有的太陽電池中，已知可自兩面受光的兩面受光型太陽電池。關於兩面受光型太陽電池，已提出了設置於牆壁等上而兩面受光的類型、或於背面側具備具有反射功能的背板而設置於屋頂等結構體上來兩面受光的類型者。（例如參照專利文獻1）。Among the existing solar cells, a double-sided light-receiving solar cell that can receive light from both sides is known. In the case of a double-sided light-receiving type solar cell, a type which is provided on a wall or the like and received light on both sides, or a type in which a backing plate having a reflecting function is provided on the back side and is provided on a structure such as a roof to receive light on both sides has been proposed. (For example, refer to Patent Document 1).

為了於太陽電池中使用的半導體基板上擴散p型及n型的雜質而形成雜質擴散層，採用分別利用不同的步驟來進行p型雜質擴散層及n型雜質擴散層的方法。但是此種方法中存在步驟數增多的問題。In order to form an impurity diffusion layer by diffusing p-type and n-type impurities on a semiconductor substrate used in a solar cell, a method of performing a p-type impurity diffusion layer and an n-type impurity diffusion layer by different steps is employed. However, there are problems in the number of steps in this method.

與此相對，作為更簡便的方法，提出了如下方法：於半導體基板上賦予包含受體元素的p型雜質擴散組成物，進行熱處理而形成p型雜質擴散層後，利用p型雜質擴散組成物的熱處理物的一部分作為遮罩層來形成n型雜質擴散層（例如參照專利文獻2）。 現有技術文獻 專利文獻On the other hand, as a more simple method, a p-type impurity diffusion composition containing an acceptor element is applied to a semiconductor substrate, and a p-type impurity diffusion layer is formed by heat treatment, and then a p-type impurity diffusion composition is used. A part of the heat-treated material is used as a mask layer to form an n-type impurity diffusion layer (see, for example, Patent Document 2). Prior art literature

專利文獻1：日本專利特開2012-195489號公報 專利文獻2：日本專利特開2015-115487號公報Patent Document 1: Japanese Laid-Open Patent Publication No. 2012-195489. Patent Document 2: Japanese Patent Laid-Open No. 2015-115487

[發明所欲解決的課題] 然而，專利文獻2中記載的方法中存在如下問題：半導體基板中，產生所謂向外擴散（out diffusion），即，在與作為目標的部位不同的部位亦擴散p型雜質。[Problems to be Solved by the Invention] However, in the method described in Patent Document 2, there is a problem in that a semiconductor substrate has a so-called out diffusion, that is, a portion that is different from a target portion is also diffused. Type impurities.

本發明是基於所述情況而形成，目的在於抑制擴散時的向外擴散，進而減少半導體元件的製造步驟中的步驟數。 [解決課題的手段]The present invention has been made in view of the above circumstances, and has an object of suppressing outward diffusion at the time of diffusion and further reducing the number of steps in the manufacturing steps of a semiconductor element. [Means for solving the problem]

本發明者發現，向外擴散的原因在於：當對p型雜質擴散組成物進行熱處理時，雜質擴散至空氣中；從而完成本發明。The inventors have found that the reason for the outward diffusion is that when the p-type impurity diffusion composition is subjected to heat treatment, the impurities are diffused into the air; thereby completing the present invention.

即，本發明為一種半導體元件的製造方法，其為使用多個半導體基板的半導體元件的製造方法，其特徵在於：包括下述（a）～（c）的步驟，且於（b）及（c）的步驟中，將兩片一組的半導體基板，以各自的形成有第一導電型雜質擴散組成物膜的面成為彼此相對的方式來配置。 （a）於各半導體基板的其中一面塗佈第一導電型雜質擴散組成物，形成第一導電型雜質擴散組成物膜的步驟。 （b）對形成有所述第一導電型雜質擴散組成物膜的半導體基板進行加熱，於所述半導體基板上擴散所述第一導電型雜質，形成第一導電型雜質擴散層的步驟。 （c）於含有包含第二導電型雜質的氣體的環境下對所述半導體基板進行加熱，於所述半導體基板的另一面上擴散第二導電型雜質，形成第二導電型雜質擴散層的步驟。 [發明的效果]That is, the present invention is a method of manufacturing a semiconductor device, which is a method of manufacturing a semiconductor device using a plurality of semiconductor substrates, comprising the following steps (a) to (c), and (b) and (b) In the step c), the two sets of the semiconductor substrates are disposed such that the surfaces on which the first conductive type impurity diffusion composition film is formed face each other. (a) A step of forming a first conductivity type impurity diffusion composition film by applying a first conductivity type impurity diffusion composition to one surface of each semiconductor substrate. (b) a step of heating the semiconductor substrate on which the first conductivity type impurity diffusion composition film is formed, and diffusing the first conductivity type impurity on the semiconductor substrate to form a first conductivity type impurity diffusion layer. (c) a step of heating the semiconductor substrate in an atmosphere containing a gas containing a second conductivity type impurity, and diffusing a second conductivity type impurity on the other surface of the semiconductor substrate to form a second conductivity type impurity diffusion layer . [Effects of the Invention]

依據本發明，可抑制擴散時的向外擴散，進而可減少半導體元件的製造步驟中的步驟數。According to the present invention, outward diffusion at the time of diffusion can be suppressed, and the number of steps in the manufacturing steps of the semiconductor element can be reduced.

以下，基於較佳的實施方式，參照圖式來對本發明進行說明。此外，以下的實施方式為例示，本發明並不限定於該些方式。Hereinafter, the present invention will be described with reference to the drawings based on preferred embodiments. In addition, the following embodiment is an illustration, and this invention is not limited to these.

＜半導體元件的製造方法＞ 本發明的半導體元件的製造方法為使用多個半導體基板的半導體元件的製造方法，其包括下述（a）～（c）的步驟，且於（b）及（c）的步驟中，將兩片一組的半導體基板，以各自的形成有第一導電型雜質擴散組成物膜的面成為彼此相對的方式來配置。 （a）於各半導體基板的其中一面塗佈第一導電型雜質擴散組成物，形成第一導電型雜質擴散組成物膜的步驟。 （b）對形成有所述第一導電型雜質擴散組成物膜的半導體基板進行加熱，於所述半導體基板上擴散所述第一導電型雜質，形成第一導電型雜質擴散層的步驟。 （c）於含有包含第二導電型雜質的氣體的環境下對所述半導體基板進行加熱，於所述半導體基板的另一面上擴散第二導電型雜質，形成第二導電型雜質擴散層的步驟。<Manufacturing Method of Semiconductor Element> The method of manufacturing a semiconductor element of the present invention is a method of manufacturing a semiconductor element using a plurality of semiconductor substrates, which includes the following steps (a) to (c), and (b) and (c) In the step of the above, the semiconductor substrates of the two sets are arranged such that the surfaces on which the first conductive type impurity diffusion composition film is formed face each other. (a) A step of forming a first conductivity type impurity diffusion composition film by applying a first conductivity type impurity diffusion composition to one surface of each semiconductor substrate. (b) a step of heating the semiconductor substrate on which the first conductivity type impurity diffusion composition film is formed, and diffusing the first conductivity type impurity on the semiconductor substrate to form a first conductivity type impurity diffusion layer. (c) a step of heating the semiconductor substrate in an atmosphere containing a gas containing a second conductivity type impurity, and diffusing a second conductivity type impurity on the other surface of the semiconductor substrate to form a second conductivity type impurity diffusion layer .

（（a）步驟） 如圖1（i）所示，於半導體基板1的其中一面塗佈第一導電型雜質擴散組成物，形成第一導電型雜質擴散組成物膜2。(Step (a)) As shown in FIG. 1(i), the first conductivity type impurity diffusion composition is applied to one surface of the semiconductor substrate 1 to form the first conductivity type impurity diffusion composition film 2.

第一導電型雜質擴散組成物的塗佈方法並無特別限制，可使用半導體基板中使用的眾所周知的塗佈方法。例如可使用：網版印刷法、凹版印刷法等印刷法，旋轉塗佈法、刷毛塗佈、噴射法、刮刀片法、輥塗佈法、噴墨法等。The coating method of the first conductivity type impurity diffusion composition is not particularly limited, and a well-known coating method used in a semiconductor substrate can be used. For example, a printing method such as a screen printing method or a gravure printing method, a spin coating method, a brush coating method, a spray method, a doctor blade method, a roll coating method, an inkjet method, or the like can be used.

圖1（i）中，已對在半導體基板1的其中一面的整個面上塗佈第一導電型雜質擴散組成物的態樣進行了說明，但亦可部分性地塗佈第一導電型雜質擴散組成物。In the case of the first conductive type impurity diffusion composition applied to the entire surface of one surface of the semiconductor substrate 1, the first conductive type impurity is partially coated. Diffusion composition.

於半導體基板1的其中一面形成第一導電型雜質擴散組成物膜2後，亦可設置將第一導電型雜質擴散組成物膜2中的溶劑的至少一部分去除的乾燥步驟。乾燥步驟中，例如亦可藉由在100℃～300℃下進行加熱處理，而使溶劑的至少一部分揮發。After the first conductive type impurity diffusion composition film 2 is formed on one surface of the semiconductor substrate 1, a drying step of removing at least a part of the solvent in the first conductive type impurity diffusion composition film 2 may be provided. In the drying step, for example, at least a part of the solvent may be volatilized by heat treatment at 100 ° C to 300 ° C.

半導體基板1並無特別限制，例如可列舉：雜質濃度為1015 atoms/cm3 ～1016 atoms/cm3 的n型單晶矽、多晶矽，以及混合有如鍺、碳等之類的其他元素的結晶矽基板。另外，亦可使用p型結晶矽或矽以外的半導體。The semiconductor substrate 1 is not particularly limited, and examples thereof include n-type single crystal germanium having an impurity concentration of 10 15 atoms/cm 3 to 10 16 atoms/cm 3 , polycrystalline germanium, and other elements such as germanium, carbon, and the like. Crystalline ruthenium substrate. Further, a p-type crystal germanium or a semiconductor other than germanium may also be used.

半導體基板1較佳為厚度為50 μm～300 μm、外形為一邊100 mm～250 mm的大致四邊形。另外，為了去除切片損壞（slice damage）或自然氧化膜，較佳為利用氫氟酸溶液或鹼溶液等預先對表面進行蝕刻。The semiconductor substrate 1 is preferably a substantially quadrangular shape having a thickness of 50 μm to 300 μm and an outer shape of 100 mm to 250 mm. Further, in order to remove slice damage or a natural oxide film, it is preferred to etch the surface in advance using a hydrofluoric acid solution or an alkali solution or the like.

進而，較佳為使用鹼性的溶液對半導體基板的兩面進行蝕刻，預先於兩面形成稱為紋理結構的微細的凹凸結構。紋理結構例如可藉由使矽基板浸漬於包含氫氧化鉀及異丙醇（isopropanol，IPA）的約80℃左右的液體中而形成。Further, it is preferable to etch both surfaces of the semiconductor substrate using an alkaline solution, and to form a fine uneven structure called a texture structure on both surfaces in advance. The texture structure can be formed, for example, by immersing the ruthenium substrate in a liquid containing about 60 ° C of potassium hydroxide and isopropanol (IPA).

第一導電型雜質擴散組成物並無特別限制，可使用包含作為p型雜質成分的第13族元素的化合物或作為n型雜質成分的第15族元素的化合物來作為雜質擴散成分的公知者。The first conductivity type impurity diffusion composition is not particularly limited, and a compound containing a compound of a Group 13 element which is a p-type impurity component or a compound of a Group 15 element which is an n-type impurity component can be used as a known impurity diffusion component.

第13族元素較佳為硼、鋁及鎵，特佳為硼。第13族元素的化合物例如可列舉：三氧化二硼、硼酸（boric acid）、硼酸酯（boric acid ester）、硼酸（boronic acid）、硼酸酯（boronic acid ester）、Al2 O3 、三氯化鎵等，包含一種以上的該些化合物。The Group 13 element is preferably boron, aluminum and gallium, and particularly preferably boron. Examples of the compound of the Group 13 element include diboron trioxide, boric acid, boric acid ester, boronic acid, boronic acid ester, and Al 2 O 3 . Gallium trichloride or the like contains one or more of these compounds.

第15族元素較佳為磷、砷、銻及鉍，特佳為磷。第15族元素的化合物例如可列舉：五氧化二磷、磷酸、多磷酸、磷酸甲酯、磷酸二甲酯、磷酸三甲酯、磷酸乙酯、磷酸二乙酯、磷酸三乙酯、磷酸丙酯、磷酸二丙酯、磷酸三丙酯、磷酸丁酯、磷酸二丁酯、磷酸三丁酯、磷酸苯酯、磷酸二苯酯、磷酸三苯酯等磷酸酯，或亞磷酸甲酯、亞磷酸二甲酯、亞磷酸三甲酯、亞磷酸乙酯、亞磷酸二乙酯、亞磷酸三乙酯、亞磷酸丙酯、亞磷酸二丙酯、亞磷酸三丙酯、亞磷酸丁酯、亞磷酸二丁酯、亞磷酸三丁酯、亞磷酸苯酯、亞磷酸二苯酯、亞磷酸三苯酯等亞磷酸酯，Bi2 O3 、Sb(OCH2 CH3 )3 、SbCl3 、As(OC4 H9 )3 等，包含一種以上的該些化合物。The Group 15 element is preferably phosphorus, arsenic, antimony and bismuth, and particularly preferably phosphorus. Examples of the compound of the Group 15 element include phosphorus pentoxide, phosphoric acid, polyphosphoric acid, methyl phosphate, dimethyl phosphate, trimethyl phosphate, ethyl phosphate, diethyl phosphate, triethyl phosphate, and phosphoric acid phosphate. Phosphate esters such as esters, dipropyl phosphate, tripropyl phosphate, butyl phosphate, dibutyl phosphate, tributyl phosphate, phenyl phosphate, diphenyl phosphate, triphenyl phosphate, or methyl phosphite, Dimethyl phosphate, trimethyl phosphite, ethyl phosphite, diethyl phosphite, triethyl phosphite, propyl phosphite, dipropyl phosphite, tripropyl phosphite, butyl phosphite, Phosphite such as dibutyl phosphite, tributyl phosphite, phenyl phosphite, diphenyl phosphite, triphenyl phosphite, Bi 2 O 3 , Sb(OCH 2 CH 3 ) 3 , SbCl 3 , As(OC 4 H 9 ) 3 or the like, contains one or more of these compounds.

另外，第一導電型雜質擴散組成物亦可包含黏合劑樹脂、溶劑、界面活性劑等。Further, the first conductive type impurity-diffusing composition may further contain a binder resin, a solvent, a surfactant, and the like.

黏合劑樹脂例如可適當選擇：聚乙烯醇；聚丙烯醯胺樹脂；聚乙烯基醯胺樹脂；聚乙烯基吡咯啶酮樹脂；聚環氧乙烷樹脂；聚碸樹脂；丙烯醯胺烷基碸樹脂；纖維素醚、羧基甲基纖維素、羥基乙基纖維素、乙基纖維素等纖維素衍生物；明膠、明膠衍生物；澱粉、澱粉衍生物；海藻酸鈉化合物；三仙膠（xanthan）；瓜爾膠（guar gum）、瓜爾膠衍生物；硬葡聚糖（scleroglucan）、硬葡聚糖衍生物；黃蓍膠（tragacanth）、黃蓍膠衍生物；糊精（dextrin）、糊精衍生物；(甲基)丙烯酸樹脂；(甲基)丙烯酸烷基酯樹脂、(甲基)丙烯酸二甲基胺基乙酯樹脂等(甲基)丙烯酸酯樹脂；丁二烯樹脂；苯乙烯樹脂；丁醛樹脂；該些的共聚物；矽氧烷樹脂等。該些樹脂是單獨使用一種或者將兩種以上組合使用。此處，所謂(甲基)丙烯酸是指丙烯酸或者甲基丙烯酸，所謂(甲基)丙烯酸酯是指丙烯酸酯或者甲基丙烯酸酯。The binder resin can be suitably selected, for example, from polyvinyl alcohol; polypropylene decylamine resin; polyvinyl decylamine resin; polyvinylpyrrolidone resin; polyethylene oxide resin; polyfluorene resin; Resin; cellulose derivatives such as cellulose ether, carboxymethyl cellulose, hydroxyethyl cellulose, ethyl cellulose; gelatin, gelatin derivatives; starch, starch derivatives; sodium alginate compounds; Guar gum, guar gum derivatives; scleroglucan, scleroglucan derivatives; tragacanth, xanthine derivatives; dextrin, Dextrin derivative; (meth)acrylic resin; (meth)acrylic acid alkyl ester resin, (meth)acrylic acid dimethylaminoethyl acrylate resin (meth) acrylate resin; butadiene resin; benzene Vinyl resin; butyral resin; copolymers of such; oxirane resins and the like. These resins are used singly or in combination of two or more. Here, the term "(meth)acrylic acid means acrylic acid or methacrylic acid, and the term "(meth)acrylate" means acrylate or methacrylate.

溶劑例如可列舉：丙酮、甲基乙基酮、甲基-正丙基酮、甲基異丙基酮、甲基-正丁基酮、甲基異丁基酮、甲基-正戊基酮、甲基-正己基酮、二乙基酮、二丙基酮、二異丁基酮、三甲基壬酮、環己酮、環戊酮、甲基環己酮、2,4-戊二酮、丙酮基丙酮等酮溶劑； 二***、甲基***、甲基-正丙醚、二異丙醚、四氫呋喃、甲基四氫呋喃、二噁烷、二甲基二噁烷、乙二醇二甲醚、乙二醇二***、乙二醇二-正丙醚、乙二醇二丁醚、二乙二醇單丁醚、二乙二醇二甲醚、二乙二醇二***、二乙二醇甲基***、二乙二醇甲基-正丙醚、二乙二醇甲基-正丁醚、二乙二醇二-正丙醚、二乙二醇二-正丁醚、二乙二醇甲基-正己醚、三乙二醇二甲醚、三乙二醇二***、三乙二醇甲基***、三乙二醇甲基-正丁醚、三乙二醇二-正丁醚、三乙二醇甲基-正己醚、四乙二醇二甲醚、四乙二醇二***、四乙二醇甲基***、四乙二醇甲基-正丁醚、四乙二醇二-正丁醚、四乙二醇甲基-正己醚、四乙二醇二-正丁醚、丙二醇二甲醚、丙二醇二***、丙二醇二-正丙醚、丙二醇二丁醚、二丙二醇二甲醚、二丙二醇二***、二丙二醇甲基***、二丙二醇甲基-正丁醚、二丙二醇二-正丙醚、二丙二醇二-正丁醚、二丙二醇甲基-正己醚、三丙二醇二甲醚、三丙二醇二***、三丙二醇甲基***、三丙二醇甲基-正丁醚、三丙二醇二-正丁醚、三丙二醇甲基-正己醚、四丙二醇二甲醚、四丙二醇二***、四丙二醇甲基***、四丙二醇甲基-正丁醚、四丙二醇二-正丁醚、四丙二醇甲基-正己醚、四丙二醇二-正丁醚等醚溶劑； 乙酸甲酯、乙酸乙酯、乙酸正丙酯、乙酸異丙酯、乙酸正丁酯、乙酸異丁酯、乙酸第二丁酯、乙酸正戊酯、乙酸第二戊酯、乙酸3-甲氧基丁酯、乙酸甲基戊酯、乙酸2-乙基丁酯、乙酸2-乙基己酯、乙酸2-(2-丁氧基乙氧基)乙酯、乙酸苄酯、乙酸環己酯、乙酸甲基環己酯、乙酸壬酯、乙醯乙酸甲酯、乙醯乙酸乙酯、乙酸二乙二醇甲醚、乙酸二乙二醇單***、乙酸二丙二醇甲醚、乙酸二丙二醇***、二乙酸二醇、乙酸甲氧基三乙二醇、丙酸乙酯、丙酸正丁酯、丙酸異戊酯、乙二酸二乙酯、乙二酸二-正丁酯、乳酸甲酯、乳酸乙酯、乳酸正丁酯、乳酸正戊酯、乙二醇甲醚丙酸酯、乙二醇***丙酸酯、乙二醇甲醚乙酸酯、乙二醇***乙酸酯、丙二醇甲醚乙酸酯、丙二醇***乙酸酯、丙二醇丙醚乙酸酯、γ-丁內酯、γ-戊內酯等酯溶劑； 乙腈、N-甲基吡咯啶酮、N-乙基吡咯啶酮、N-丙基吡咯啶酮、N-丁基吡咯啶酮、N-己基吡咯啶酮、N-環己基吡咯啶酮、N,N-二甲基甲醯胺、N,N-二甲基乙醯胺、二甲基亞碸等非質子性極性溶劑； 甲醇、乙醇、正丙醇、異丙醇、正丁醇、異丁醇、第二丁醇、第三丁醇、正戊醇、異戊醇、2-甲基丁醇、第二戊醇、第三戊醇、3-甲氧基丁醇、3-甲氧基-3-甲基丁醇、正己醇、2-甲基戊醇、第二己醇、2-乙基丁醇、第二庚醇、正辛醇、2-乙基己醇、第二辛醇、正壬醇、正癸醇、第二-十一烷基醇、三甲基壬醇、第二-十四烷基醇、第二-十七烷基醇、苯酚、環己醇、甲基環己醇、苄基醇、異冰片基環己醇、乙二醇、1,2-丙二醇、1,3-丁二醇、二乙二醇、二丙二醇、三乙二醇、三丙二醇等醇溶劑； 乙二醇單甲醚、乙二醇單***（溶纖劑）、乙二醇單苯醚、二乙二醇單甲醚、二乙二醇單***、二乙二醇單-正丁醚、二乙二醇單-正己醚、乙氧基三甘醇、四乙二醇單-正丁醚、丙二醇單甲醚、二丙二醇單甲醚、二丙二醇單***、三丙二醇單甲醚等二醇單醚溶劑； α-萜品烯（α-terpinene）、α-萜品醇（α-terpineol）、月桂油烯（myrcene）、別羅勒烯（alloocimene）、檸檬烯（limonene）、二戊烯、α-蒎烯（α-pinene）、β-蒎烯、萜品醇、香旱芹酮（carvone）、羅勒烯（ocimene）、水芹烯（phellandrene）等萜烯（terpene）溶劑； 異冰片基環己醇、異冰片基苯酚、1-異丙基-4-甲基-雙環[2.2.2]辛-5-烯-2,3-二羧酸酐、對薄荷基苯酚、以及水。該些溶劑是單獨使用一種或者將2種以上組合使用。Examples of the solvent include acetone, methyl ethyl ketone, methyl-n-propyl ketone, methyl isopropyl ketone, methyl-n-butyl ketone, methyl isobutyl ketone, and methyl-n-pentanone. , methyl-n-hexyl ketone, diethyl ketone, dipropyl ketone, diisobutyl ketone, trimethyl fluorenone, cyclohexanone, cyclopentanone, methylcyclohexanone, 2,4-pentane Ketone solvent such as ketone or acetone acetone; diethyl ether, methyl ethyl ether, methyl-n-propyl ether, diisopropyl ether, tetrahydrofuran, methyltetrahydrofuran, dioxane, dimethyl dioxane, ethylene glycol Ether, ethylene glycol diethyl ether, ethylene glycol di-n-propyl ether, ethylene glycol dibutyl ether, diethylene glycol monobutyl ether, diethylene glycol dimethyl ether, diethylene glycol diethyl ether, diethylene Alcohol methyl ether, diethylene glycol methyl-n-propyl ether, diethylene glycol methyl-n-butyl ether, diethylene glycol di-n-propyl ether, diethylene glycol di-n-butyl ether, diethylene Alcohol methyl-n-hexyl ether, triethylene glycol dimethyl ether, triethylene glycol diethyl ether, triethylene glycol methyl ether, triethylene glycol methyl-n-butyl ether, triethylene glycol di-n-butyl ether , triethylene glycol methyl-n-hexyl ether, tetraethylene glycol dimethyl ether, tetraethylene Alcohol diethyl ether, tetraethylene glycol methyl ether, tetraethylene glycol methyl-n-butyl ether, tetraethylene glycol di-n-butyl ether, tetraethylene glycol methyl-n-hexyl ether, tetraethylene glycol di-positive Butyl ether, propylene glycol dimethyl ether, propylene glycol diethyl ether, propylene glycol di-n-propyl ether, propylene glycol dibutyl ether, dipropylene glycol dimethyl ether, dipropylene glycol diethyl ether, dipropylene glycol methyl ether, dipropylene glycol methyl-n-butyl ether, Dipropylene glycol di-n-propyl ether, dipropylene glycol di-n-butyl ether, dipropylene glycol methyl-n-hexyl ether, tripropylene glycol dimethyl ether, tripropylene glycol diethyl ether, tripropylene glycol methyl ether, tripropylene glycol methyl-n-butyl ether, Tripropylene glycol di-n-butyl ether, tripropylene glycol methyl-n-hexyl ether, tetrapropylene glycol dimethyl ether, tetrapropylene glycol diethyl ether, tetrapropylene glycol methyl ether, tetrapropylene glycol methyl-n-butyl ether, tetrapropylene glycol di-n-butyl ether, Ether solvent such as tetrapropylene glycol methyl-n-hexyl ether or tetrapropylene glycol di-n-butyl ether; methyl acetate, ethyl acetate, n-propyl acetate, isopropyl acetate, n-butyl acetate, isobutyl acetate, acetic acid second Butyl ester, n-amyl acetate, second amyl acetate, 3-methoxybutyl acetate, Methyl amyl acetate, 2-ethylbutyl acetate, 2-ethylhexyl acetate, 2-(2-butoxyethoxy)ethyl acetate, benzyl acetate, cyclohexyl acetate, methyl acetate Cyclohexyl ester, decyl acetate, methyl acetate, ethyl acetate, ethylene glycol diethylene glycol methyl ether, diethylene glycol monoethyl ether, dipropylene glycol methyl ether, dipropylene glycol diethyl ether, diacetic acid Alcohol, methoxytriethylene glycol acetate, ethyl propionate, n-butyl propionate, isoamyl propionate, diethyl oxalate, di-n-butyl oxalate, methyl lactate, lactate B Ester, n-butyl lactate, n-amyl lactate, ethylene glycol methyl ether propionate, ethylene glycol ethyl ether propionate, ethylene glycol methyl ether acetate, ethylene glycol ethyl ether acetate, propylene glycol methyl ether Ester ester solvents such as acid ester, propylene glycol diethyl ether acetate, propylene glycol propyl ether acetate, γ-butyrolactone, γ-valerolactone; acetonitrile, N-methylpyrrolidone, N-ethylpyrrolidone, N -propylpyrrolidone, N-butylpyrrolidone, N-hexylpyrrolidone, N-cyclohexylpyrrolidone, N,N-dimethylformamide, N,N-dimethylacetamidine Amine, dimethyl hydrazine, etc. Sexual polar solvent; methanol, ethanol, n-propanol, isopropanol, n-butanol, isobutanol, second butanol, tert-butanol, n-pentanol, isoamyl alcohol, 2-methylbutanol, Dipentanol, third pentanol, 3-methoxybutanol, 3-methoxy-3-methylbutanol, n-hexanol, 2-methylpentanol, second hexanol, 2-ethyl butyl Alcohol, second heptanol, n-octanol, 2-ethylhexanol, second octanol, n-nonanol, n-nonanol, second-undecyl alcohol, trimethyl decyl alcohol, second-ten Tetraalkyl alcohol, second-heptadecyl alcohol, phenol, cyclohexanol, methylcyclohexanol, benzyl alcohol, isobornyl cyclohexanol, ethylene glycol, 1,2-propanediol, 1,3 - an alcohol solvent such as butylene glycol, diethylene glycol, dipropylene glycol, triethylene glycol or tripropylene glycol; ethylene glycol monomethyl ether, ethylene glycol monoethyl ether (cellosolve), ethylene glycol monophenyl ether, two Ethylene glycol monomethyl ether, diethylene glycol monoethyl ether, diethylene glycol mono-n-butyl ether, diethylene glycol mono-n-hexyl ether, ethoxy triethylene glycol, tetraethylene glycol mono-n-butyl ether, Glycols such as propylene glycol monomethyl ether, dipropylene glycol monomethyl ether, dipropylene glycol monoethyl ether, tripropylene glycol monomethyl ether Solvent; α-terpinene, α-terpineol, myrcene, allophymene, limonene, dipentene, α-蒎Terpene solvent such as α-pinene, β-pinene, terpineol, carvone, ocimene, and phellandrene; isobornylcyclohexanol , isobornyl phenol, 1-isopropyl-4-methyl-bicyclo[2.2.2] oct-5-ene-2,3-dicarboxylic anhydride, p-menthyl phenol, and water. These solvents may be used alone or in combination of two or more.

界面活性劑是為了提高塗佈時的塗佈膜的均勻性而添加。The surfactant is added in order to improve the uniformity of the coating film at the time of coating.

界面活性劑例如可列舉：1,1,2,2-四氟辛基(1,1,2,2-四氟丙基)醚、1,1,2,2-四氟辛基己醚、八乙二醇二(1,1,2,2-四氟丁基)醚、六乙二醇(1,1,2,2,3,3-六氟戊基)醚、八丙二醇二(1,1,2,2-四氟丁基)醚、六丙二醇二(1,1,2,2,3,3-六氟戊基)醚、全氟十二烷基磺酸鈉、1,1,2,2,8,8,9,9,10,10-十二氟十二烷、1,1,2,2,3,3-六氟癸烷、N-[3-(全氟辛烷磺醯胺)丙基]-N,N'-二甲基-N-羧基亞甲基銨甜菜鹼、全氟烷基磺醯胺丙基三甲基銨鹽、全氟烷基-N-乙基磺醯基甘胺酸鹽、磷酸雙(N-全氟辛基磺醯基-N-乙基胺基乙基)酯、單全氟烷基乙基磷酸酯等包含在末端、主鏈及側鏈的至少任一部位具有氟烷基或氟伸烷基的化合物的氟系界面活性劑。The surfactant may, for example, be 1,1,2,2-tetrafluorooctyl (1,1,2,2-tetrafluoropropyl)ether, 1,1,2,2-tetrafluorooctyl hexyl ether, Octaethylene glycol di(1,1,2,2-tetrafluorobutyl)ether, hexaethylene glycol (1,1,2,2,3,3-hexafluoropentyl)ether, octapropylene glycol di(1) , 1,2,2-tetrafluorobutyl)ether, hexapropylene glycol bis(1,1,2,2,3,3-hexafluoropentyl)ether, sodium perfluorododecylsulfonate, 1,1 , 2,2,8,8,9,9,10,10-dodecafluorododecane, 1,1,2,2,3,3-hexafluorodecane, N-[3-(perfluorooctyl Alkylsulfonamide)propyl]-N,N'-dimethyl-N-carboxymethyleneammonium betaine, perfluoroalkylsulfonamidopropyltrimethylammonium salt, perfluoroalkyl-N- Ethylsulfonylglycine, bis(N-perfluorooctylsulfonyl-N-ethylaminoethyl) phosphate, monoperfluoroalkylethyl phosphate, etc. And a fluorine-based surfactant having a compound of a fluoroalkyl group or a fluoroalkyl group in at least any part of the side chain.

另外，市售品中，氟系界面活性劑可列舉：「美佳法（Megafac）（註冊商標）」F142D、「美佳法（Megafac）」F172、「美佳法（Megafac）」F173、「美佳法（Megafac）」F183、「美佳法（Megafac）」F444、「美佳法（Megafac）」F475、「美佳法（Megafac）」F477（以上，大日本油墨化學工業（股）製造），「艾福拓（Eftop）（註冊商標）」EF301、「艾福拓（Eftop）」303、「艾福拓（Eftop）」352（新秋田化成（股）製造），弗拉德（Fluorad）FC-430、弗拉德（Fluorad）FC-431（住友3M（股）製造），「阿薩佳（Asahi Guard）」（註冊商標）AG710、沙福隆（Surflon）S-382、沙福隆（Surflon）SC-101、沙福隆（Surflon）SC-102、沙福隆（Surflon）SC-103、沙福隆（Surflon）SC-104、沙福隆（Surflon）SC-105、沙福隆（Surflon）SC-106（旭硝子（股）製造），BM-1000、BM-1100（裕商（股）製造），NBX-15、FTX-218、DFX-218（尼歐斯（Neos）（股）製造）等。Further, among commercially available products, examples of the fluorine-based surfactant include "Megafac (registered trademark)" F142D, "Megafac" F172, "Megafac" F173, and "Megafa" ( Megafac) "F183, "Megafac" F444, "Megafac" F475, "Megafac" F477 (above, manufactured by Dainippon Ink Chemical Industry Co., Ltd.), "Ai Fu Tuo ( Eftop) (registered trademark) EF301, "Eftop" 303, "Eftop" 352 (made by New Akita Chemicals Co., Ltd.), Fluorad FC-430, Fula Fluorad FC-431 (manufactured by Sumitomo 3M), "Asahi Guard" (registered trademark) AG710, Surflon S-382, Surflon SC-101 , Surflon SC-102, Surflon SC-103, Surflon SC-104, Surflon SC-105, Surflon SC-106 (Asahi Glass Co., Ltd.), BM-1000, BM-1100 (made by Yushang Co., Ltd.), NBX-15, FTX-218, DFX-218 Niou Si (Neos) (shares)) and the like.

另外，矽酮系界面活性劑的市售品可列舉：SH28PA、SH7PA、SH21PA、SH30PA、ST94PA（均為東麗・道康寧・矽酮（Toray Dow Corning Silicone）（股）製造），BYK067A、BYK310、BYK322、BYK331、BYK333、BYK355（日本畢克化學（BYK-Chemie Japan）（股）製造）等。Further, commercially available products of an anthrone-based surfactant include SH28PA, SH7PA, SH21PA, SH30PA, and ST94PA (all manufactured by Toray Dow Corning Silicone), BYK067A, BYK310, and BYK322, BYK331, BYK333, BYK355 (made by BYK-Chemie Japan Co., Ltd.).

（（b）步驟） 如圖1（ii）所示，將於其中一面形成有第一導電型雜質擴散組成物膜2的半導體基板3，以兩片一組，使各自的形成有第一導電型雜質擴散組成物膜2的面彼此相對而配置於擴散板4上。(Step (b)) As shown in Fig. 1 (ii), the semiconductor substrate 3 on which the first conductivity type impurity diffusion composition film 2 is formed is formed in two pieces so that the respective first conductive layers are formed. The surfaces of the type impurity diffusion composition film 2 are disposed to face each other on the diffusion plate 4.

擴散板4具有用以配置半導體基板的槽。對於擴散板的槽的尺寸或間距等並無特別限制。擴散板亦可相對於水平方向而傾斜。擴散板的材質若為可耐受擴散溫度者，則並無特別限制，較佳為石英。The diffusion plate 4 has a groove for arranging a semiconductor substrate. There is no particular limitation on the size or spacing of the grooves of the diffusion plate. The diffuser plate can also be inclined with respect to the horizontal direction. The material of the diffusion plate is not particularly limited as long as it can withstand diffusion temperature, and is preferably quartz.

接著，如圖1（iii）所示，利用擴散爐16對配置有半導體基板3的擴散板4進行加熱，於半導體基板1上擴散第一導電型雜質，形成第一導電型雜質擴散層5。Next, as shown in FIG. 1 (iii), the diffusion plate 4 on which the semiconductor substrate 3 is placed is heated by the diffusion furnace 16, and the first conductivity type impurity is diffused on the semiconductor substrate 1 to form the first conductivity type impurity diffusion layer 5.

此時，由於兩片一組的半導體基板為所述的配置，故而即便雜質自雜質擴散組成物膜2中擴散至空氣中，其亦難以到達半導體基板的與形成有第一導電型雜質擴散組成物膜2的面相反側的面。因此，可抑制所謂向外擴散，即，雜質亦擴散至半導體基板中與作為目標的部位不同的部位。At this time, since the two-piece semiconductor substrate is in the above-described arrangement, even if impurities are diffused into the air from the impurity-diffusing composition film 2, it is difficult to reach the semiconductor substrate and the first conductive type impurity is formed to diffuse. The surface on the opposite side of the surface of the film 2. Therefore, it is possible to suppress the so-called outward diffusion, that is, the impurities are also diffused to a portion of the semiconductor substrate which is different from the target portion.

形成第一導電型雜質擴散層5時的加熱處理溫度及時間能夠以獲得雜質擴散濃度、擴散深度等所需的擴散特性的方式來適當設定。例如，可於800℃以上、1200℃以下進行1分鐘～120分鐘的加熱擴散。The heat treatment temperature and time when the first conductivity type impurity diffusion layer 5 is formed can be appropriately set so as to obtain the diffusion characteristics required for the impurity diffusion concentration, the diffusion depth, and the like. For example, heat diffusion can be performed at 800 ° C or more and 1200 ° C or less for 1 minute to 120 minutes.

用以形成第一導電型雜質擴散層5的加熱處理中的氣體環境並無特別限制，較佳為氮、氧、氬、氦、氙、氖、氪等的混合氣體環境，更佳為氮與氧的混合氣體，特佳為氧的含有率為5體積%以下的氮與氧的混合氣體。藉由在混合氣體中存在氧的環境下擴散第一導電型雜質，可更抑制向外擴散，因此較佳。The gas atmosphere in the heat treatment for forming the first conductive type impurity diffusion layer 5 is not particularly limited, and is preferably a mixed gas atmosphere of nitrogen, oxygen, argon, helium, neon, krypton, xenon, etc., more preferably nitrogen and The mixed gas of oxygen is particularly preferably a mixed gas of nitrogen and oxygen having a content of oxygen of 5% by volume or less. It is preferable to diffuse the first conductive type impurity in an environment in which oxygen is present in the mixed gas, thereby further suppressing outward diffusion.

兩片一組的半導體基板的形成有第一導電型雜質擴散組成物膜2的面間的距離（W1）並無特別限制，較佳為5 mm以下，更佳為1 mm以下。The distance (W1) between the surfaces of the first-conductivity-type impurity-diffusion composition film 2 in which the two-piece semiconductor substrate is formed is not particularly limited, but is preferably 5 mm or less, and more preferably 1 mm or less.

例如，如圖2所示，亦可於擴散板4的一個槽中設置兩片一組的半導體基板，特佳為其形成有第一導電型雜質擴散組成物膜2的面間的距離（W1）為0 mm，即其間隔實質上為0 mm（實質上接觸）。兩片一組的半導體基板的各自的形成有第一導電型雜質擴散組成物膜2的面間的距離（W1）越短，存在向外擴散越得到抑制的傾向，因此較佳。For example, as shown in FIG. 2, a two-piece semiconductor substrate may be provided in one groove of the diffusion plate 4, particularly preferably the distance between the faces of the first conductivity type impurity diffusion composition film 2 (W1). ) is 0 mm, ie its spacing is essentially 0 mm (substantial contact). The shorter the distance (W1) between the faces of the first conductive type impurity-diffused composition film 2 in which the two sets of the semiconductor substrates are formed, the more the outward diffusion tends to be suppressed, which is preferable.

對於半導體基板的相鄰的組中的與形成有所述第一導電型雜質擴散組成物膜的面相反側的面間的距離（W2）並無特別限制，較佳為1 mm～5 mm，更佳為1 mm～3 mm。The distance (W2) between the surfaces on the opposite side to the surface on which the first conductivity type impurity diffusion composition film is formed in the adjacent group of the semiconductor substrate is not particularly limited, and is preferably 1 mm to 5 mm. More preferably 1 mm to 3 mm.

所述多組的兩片一組的半導體基板的各組中的形成有所述第一導電型雜質擴散組成物膜的面間的距離（W1）、以及相鄰的組中的與形成有所述第一導電型雜質擴散組成物膜的面相反側的面間的距離（W2）較佳為（W1）＜（W2）。藉由預先以所述方式進行，則於自（b）步驟後繼續進行（c）步驟的情況下，可於不改變擴散板上的半導體基板的配置的情況下，於半導體基板的另一面上擴散第二導電型的雜質擴散。The distance (W1) between the faces of the first conductive type impurity diffusion composition film formed in each of the plurality of sets of the two-piece semiconductor substrates, and the formation and formation in the adjacent groups The distance (W2) between the surfaces on the opposite side of the surface of the first conductivity type impurity-diffusing composition film is preferably (W1) < (W2). By performing the above-described manner in advance, in the case where the step (c) is continued from the step (b), the other side of the semiconductor substrate can be formed without changing the arrangement of the semiconductor substrate on the diffusion plate. The diffusion of the impurity of the second conductivity type is diffused.

另外，於（b）步驟之前，例如藉由於擴散時的加熱處理溫度以下的溫度且包含氧的環境下，對其中一面形成有第一導電型雜質擴散組成物膜的半導體基板3進行加熱處理，而較佳為將第一導電型雜質擴散組成物膜2中的黏合劑樹脂等有機成分的至少一部分預先去除。藉由將第一導電型雜質擴散組成物膜2中的黏合劑樹脂等有機成分的至少一部分預先去除，可提高半導體基板上的第一導電型雜質擴散組成物膜中的雜質成分的濃度，容易提高第一導電型雜質的擴散性。Further, before the step (b), for example, the semiconductor substrate 3 having the first conductivity type impurity diffusion composition film formed thereon is subjected to heat treatment in an environment containing oxygen at a temperature equal to or lower than the heat treatment temperature at the time of diffusion, Preferably, at least a part of the organic component such as the binder resin in the first conductive type impurity-diffusing composition film 2 is removed in advance. By removing at least a part of the organic component such as the binder resin in the first-conductivity-type impurity-diffusion composition film 2, the concentration of the impurity component in the first conductivity-type impurity-diffusion composition film on the semiconductor substrate can be improved, and the concentration is easy. The diffusibility of the first conductivity type impurity is improved.

（b）步驟的氣體環境並無特別限制，較佳為氮、氧、氬、氦、氙、氖、氪等的混合氣體環境，更佳為包含氧的混合氣體。藉由在包含氧的環境下進行，則第一導電型雜質擴散組成物膜中的黏合劑樹脂等有機成分的熱分解變得容易，因此較佳。The gas atmosphere of the step (b) is not particularly limited, and is preferably a mixed gas atmosphere of nitrogen, oxygen, argon, helium, neon, krypton, xenon, etc., more preferably a mixed gas containing oxygen. When it is carried out in an atmosphere containing oxygen, thermal decomposition of an organic component such as a binder resin in the first conductivity-type impurity-diffusing composition film is easy, and therefore it is preferable.

氣體環境中的氧的含量並無特別限制，較佳為20體積%以下，更佳為5體積%以下。The content of oxygen in the gas atmosphere is not particularly limited, but is preferably 20% by volume or less, more preferably 5% by volume or less.

（（c）步驟） （c）步驟中的擴散板上的半導體基板的配置與（b）步驟中所說明的配置相同。即，將兩片一組的半導體基板以各自的形成有第一導電型雜質擴散組成物膜的面成為彼此相對的方式來配置。((c) Step) The arrangement of the semiconductor substrate on the diffusion plate in the step (c) is the same as that described in the step (b). In other words, the two sets of the semiconductor substrates are arranged such that the surfaces on which the first conductive type impurity diffusion composition film is formed face each other.

對於兩片一組的半導體基板的形成有第一導電型雜質擴散組成物膜2的面間的距離（W1）並無特別限制，較佳為5 mm以下，更佳為1 mm以下。The distance (W1) between the surfaces of the first-conductivity-type impurity-diffusion composition film 2 in which the two-piece semiconductor substrate is formed is not particularly limited, but is preferably 5 mm or less, and more preferably 1 mm or less.

例如，如圖2所示，亦可於擴散板4的一個槽中設置兩片一組的半導體基板，特佳為其形成有第一導電型雜質擴散組成物膜2的面間的距離（W1）為0 mm，即其間隔實質上為0 mm（實質上接觸）。兩片一組的半導體基板的各自的形成有第一導電型雜質擴散組成物膜2的面間的距離（W1）越短，存在向外擴散越得到抑制的傾向，因此較佳。For example, as shown in FIG. 2, a two-piece semiconductor substrate may be provided in one groove of the diffusion plate 4, particularly preferably the distance between the faces of the first conductivity type impurity diffusion composition film 2 (W1). ) is 0 mm, ie its spacing is essentially 0 mm (substantial contact). The shorter the distance (W1) between the faces of the first conductive type impurity-diffused composition film 2 in which the two sets of the semiconductor substrates are formed, the more the outward diffusion tends to be suppressed, which is preferable.

對於半導體基板的相鄰的組中的與形成有所述第一導電型雜質擴散組成物膜的面相反側的面間的距離（W2）並無特別限制，較佳為1 mm～5 mm，更佳為1 mm～3 mm。The distance (W2) between the surfaces on the opposite side to the surface on which the first conductivity type impurity diffusion composition film is formed in the adjacent group of the semiconductor substrate is not particularly limited, and is preferably 1 mm to 5 mm. More preferably 1 mm to 3 mm.

所述多組的兩片一組的半導體基板的各組中的形成有所述第一導電型雜質擴散組成物膜的面間的距離（W1）、以及相鄰的組中的與形成有所述第一導電型雜質擴散組成物膜的面相反側的面間的距離（W2）較佳為（W1）＜（W2）。藉由預先以所述方式進行，則於自（b）步驟後繼續進行（c）步驟的情況下，可於不改變擴散板上的半導體基板的配置的情況下，於半導體基板的另一面上擴散第二導電型雜質擴散。The distance (W1) between the faces of the first conductive type impurity diffusion composition film formed in each of the plurality of sets of the two-piece semiconductor substrates, and the formation and formation in the adjacent groups The distance (W2) between the surfaces on the opposite side of the surface of the first conductivity type impurity-diffusing composition film is preferably (W1) < (W2). By performing the above-described manner in advance, in the case where the step (c) is continued from the step (b), the other side of the semiconductor substrate can be formed without changing the arrangement of the semiconductor substrate on the diffusion plate. The diffusion of the second conductivity type impurity is diffused.

於（c）步驟中，一邊流通包含第二導電型雜質的氣體，一邊對半導體基板進行加熱，形成第二導電型雜質擴散層。In the step (c), the semiconductor substrate is heated while flowing a gas containing the second conductivity type impurity to form a second conductivity type impurity diffusion layer.

作為包含第二導電型雜質的氣體，於p型的情況下可列舉POCl3 氣體，於n型的情況下可列舉BBr3 、BCl3 等氣體。例如POCl3 氣體可藉由在POCl3 溶液中使N2 氣或氮/氧混合氣體起泡、或對POCl3 溶液進行加熱而獲得。Examples of the gas containing the second conductivity type impurity include POCl 3 gas in the case of p type, and gases such as BBr 3 and BCl 3 in the case of n type. POCl 3 gas may be, for example, by N 2 gas or POCl 3 solution to a nitrogen / oxygen mixed gas bubbling, or POCl 3 was obtained by heating.

加熱溫度較佳為750℃～1050℃，更佳為800℃～1000℃。The heating temperature is preferably from 750 ° C to 1050 ° C, more preferably from 800 ° C to 1000 ° C.

氣體環境並無特別限制，較佳為氮、氧、氬、氦、氙、氖、氪等的混合氣體環境，更佳為氮與氧的混合氣體，特佳為氧的含有率為5體積%以下的氮與氧的混合氣體。The gas atmosphere is not particularly limited, and is preferably a mixed gas atmosphere of nitrogen, oxygen, argon, helium, neon, krypton, xenon, etc., more preferably a mixed gas of nitrogen and oxygen, and particularly preferably an oxygen content of 5 vol%. The following mixed gas of nitrogen and oxygen.

另外，就可縮短氣體環境的變更的步驟時間的方面而言，較佳為在與（b）步驟相同的氣體環境下進行（c）步驟。特佳為（b）步驟中的氣體環境中的氮與氧的比率、和（c）步驟中的氣體環境中的氮與氧的比率相同。該情況下的較佳比率以體積比計為氧：氮=1：99～5：95。Further, in terms of the step time for shortening the change of the gas atmosphere, it is preferred to carry out the step (c) in the same gas atmosphere as the step (b). It is particularly preferred that the ratio of nitrogen to oxygen in the gaseous environment in the step (b) is the same as the ratio of nitrogen to oxygen in the gaseous environment in the step (c). The preferred ratio in this case is oxygen: nitrogen = 1:99 to 5:95 in terms of volume ratio.

如圖1（iii）所示，（b）步驟之後，於第一導電型雜質擴散層5的上部殘留有第一導電型雜質擴散組成物膜的熱處理物層6。較佳為將其作為對於包含第二導電型雜質的氣體的遮罩，來進行（c）步驟。藉由如上所述，可抑制第二導電型雜質於第一導電型雜質擴散層5中的混入。As shown in Fig. 1 (iii), after the step (b), the heat-treated material layer 6 of the first-conductivity-type impurity-diffusion composition film remains on the upper portion of the first-conductivity-type impurity diffusion layer 5. Preferably, the step (c) is carried out as a mask for a gas containing a second conductivity type impurity. By the above, the incorporation of the second conductivity type impurity into the first conductivity type impurity diffusion layer 5 can be suppressed.

（b）步驟與（c）步驟的哪一者先進行均可，另外，（c）步驟亦可與（b）步驟同時進行。於使用第一導電型雜質擴散組成物膜的熱處理物層作為遮罩的情況下，較佳為於（b）步驟之後進行（c）步驟。(b) Which of the steps (c) and (c) may be performed first, and the step (c) may be performed simultaneously with the step (b). In the case where the heat treatment layer of the first conductivity type impurity diffusion composition film is used as a mask, it is preferred to carry out the step (c) after the step (b).

進而，更佳為於（b）步驟之後連續進行（c）步驟。例如，於（b）步驟之後，較佳為不將擴散板自煅燒爐中取出，而直接轉移至（c）步驟。所謂於（b）步驟之後連續進行（c）步驟，是指於（b）步驟之後繼續進行（c）步驟。Further, it is more preferred to carry out the step (c) continuously after the step (b). For example, after step (b), it is preferred not to remove the diffuser from the calciner and transfer directly to step (c). The continuous (c) step after the step (b) means that the step (c) is continued after the step (b).

所述（c）步驟中的形成第二導電型雜質擴散層時的加熱溫度較佳為較所述（b）步驟中的形成第一導電型雜質擴散層時的加熱溫度而言低50℃～200℃的溫度。藉由將（c）步驟中的形成第二導電型雜質擴散層時的加熱溫度，設為較（b）步驟中的形成第一導電型雜質擴散層時的加熱溫度而言低50℃～200℃的溫度，則於在（b）步驟之後連續進行（c）步驟的情況下，可使加熱對於（b）步驟中形成的第一導電型雜質擴散層的影響成為最小限度，因此容易控制第一導電型雜質擴散。The heating temperature at the time of forming the second conductivity type impurity diffusion layer in the step (c) is preferably 50 ° C lower than the heating temperature at the time of forming the first conductivity type impurity diffusion layer in the step (b). 200 ° C temperature. The heating temperature at the time of forming the second conductivity type impurity diffusion layer in the step (c) is set to be 50 ° C to 200 lower than the heating temperature at the time of forming the first conductivity type impurity diffusion layer in the step (b). When the temperature of °C is continuously performed in the step (c) after the step (b), the influence of the heating on the first conductive type impurity diffusion layer formed in the step (b) can be minimized, so that it is easy to control the temperature. A conductive impurity diffuses.

（c）步驟中，與利用包含p型雜質的氣體進行擴散時相比，利用包含n型雜質的氣體進行擴散時的加熱溫度可為低溫，因此較佳為第一導電型為p型，第二導電型為n型。In the step (c), the heating temperature at the time of diffusion by the gas containing the n-type impurity may be lower than that when the gas is diffused by the gas containing the p-type impurity, so that the first conductivity type is preferably p-type, The two conductivity types are n-type.

另外，本發明的半導體元件的製造方法較佳為包括下述（d）步驟。 （d）於包含氧的環境下使半導體基板表面氧化的步驟。Further, the method for producing a semiconductor device of the present invention preferably includes the following step (d). (d) a step of oxidizing the surface of the semiconductor substrate in an atmosphere containing oxygen.

（（d）步驟） 較佳為包括於包含氧的環境下使半導體基板表面氧化的步驟。 對於進行（d）步驟的時機並無特別限制，可於（b）步驟之後或（c）步驟之後進行（d）步驟。更佳為於（c）步驟之後連續進行。藉由如上所述，可將由於向外融合而產生的本來不應擴散的部位的擴散層（污染層）去除。所謂於（c）步驟之後連續進行，是指於（c）步驟之後繼續進行（d）步驟。(Step (d)) It is preferred to include a step of oxidizing the surface of the semiconductor substrate in an environment containing oxygen. There is no particular limitation on the timing at which the step (d) is carried out, and the step (d) may be carried out after the step (b) or after the step (c). More preferably, it is continuously carried out after the step (c). By as described above, the diffusion layer (contamination layer) of the portion which should not be diffused due to the outward fusion can be removed. The continuous operation after the step (c) means that the step (d) is continued after the step (c).

氣體環境若為包含氧的環境，則並無特別限制，可設為氮、氬、氦、氙、氖、氪等與氧的混合氣體環境。較佳為氮與氧的混合氣體，更佳為氧的含有率為20體積%以上的氮與氧的混合氣體，特佳為僅為氧。氧的含有率越多，越可提高氧化速度。The gas atmosphere is not particularly limited as long as it contains oxygen, and may be a mixed gas atmosphere of oxygen, such as nitrogen, argon, helium, neon, krypton or xenon. It is preferably a mixed gas of nitrogen and oxygen, more preferably a mixed gas of nitrogen and oxygen having a content of oxygen of 20% by volume or more, and particularly preferably only oxygen. The more the oxygen content is, the higher the oxidation rate can be.

於該些步驟之後，可使用公知的方法來製造半導體元件。對其方法並無特別限制，例如可列舉如下所述的方法作為一例。After these steps, a semiconductor device can be fabricated using a known method. The method is not particularly limited, and examples thereof include the following methods.

於半導體基板的兩面形成抗反射層或者鈍化層。該些層中可分別使用公知的材料。該些層可為單層，亦可為多層。例如有將氧化矽層、氧化鋁層、SiNx層、非晶矽層積層而成者。該些層可利用電漿化學氣相沈積（Chemical Vapor Deposition，CVD）法、原子層沈積（Atomic Layer Deposition，ALD）法等蒸鍍法、或者塗佈法來形成。An antireflection layer or a passivation layer is formed on both sides of the semiconductor substrate. Known materials can be used in each of these layers. The layers may be a single layer or a plurality of layers. For example, a ruthenium oxide layer, an aluminum oxide layer, a SiNx layer, and an amorphous ruthenium layer are laminated. These layers can be formed by a vapor deposition method such as a chemical vapor deposition (CVD) method or an atomic layer deposition (ALD) method, or a coating method.

另外，亦可形成能夠兼為抗反射層與鈍化層的層。所述層例如可列舉利用電漿CVD法來形成的氮化物層。Further, a layer which can also serve as an antireflection layer and a passivation layer can also be formed. The layer is, for example, a nitride layer formed by a plasma CVD method.

於抗反射層與半導體基板之間，可進而存在氧化矽、氧化鋁等表面保護層。另外，亦可部分性地改變抗反射層的組成。A surface protective layer such as ruthenium oxide or aluminum oxide may be further present between the antireflection layer and the semiconductor substrate. In addition, the composition of the antireflection layer can also be partially changed.

抗反射層亦可形成於受光面及背面的整個面或者一部分區域。於雜質擴散層的上部，亦可於抗反射層上設置接觸孔。藉由如上所述，可使繼而形成的電極與雜質擴散層電性連接。對於設置接觸孔的方法並無限制，較佳為蝕刻。蝕刻中，可根據抗反射層的材質來使用適當者，可列舉氟化銨等為例。The antireflection layer may be formed on the entire surface or a part of the light receiving surface and the back surface. In the upper portion of the impurity diffusion layer, a contact hole may be provided on the anti-reflection layer. By the above, the subsequently formed electrode can be electrically connected to the impurity diffusion layer. There is no limitation on the method of providing the contact hole, and etching is preferred. In the etching, it may be appropriately used depending on the material of the antireflection layer, and examples thereof include ammonium fluoride and the like.

於適當的情況下，亦可利用經火法（fire through method）。經火法是於抗反射層上形成電極後，藉由煅燒過程中的玻璃粒子的熔融，一邊使抗反射層分解一邊使電極與半導體基板黏接的方法，亦稱為煅燒貫通。於此種情況下，適合用於抗反射層的材料為氮化矽。A fire through method may also be utilized where appropriate. The fire method is a method in which an electrode is formed on an antireflection layer, and the electrode is bonded to the semiconductor substrate while decomposing the antireflection layer by melting the glass particles during the firing, which is also referred to as calcination. In this case, a material suitable for the antireflection layer is tantalum nitride.

繼而，於半導體基板的兩面分別形成電極。電極的形成中，可無特別限制地使用通常所用的方法。Then, electrodes are formed on both sides of the semiconductor substrate. In the formation of the electrode, the usual method can be used without particular limitation.

於利用經火法的情況下，例如使用包含金屬粒子及玻璃粒子的表面電極用金屬膏。以成為所需形狀的方式將所述金屬膏賦予至形成有雜質擴散層的區域上，藉由進行熱處理而使金屬粒子貫通抗反射層或鈍化層，可於雜質擴散層上的電極形成區域形成表面電極。表面電極用金屬膏例如可使用該技術領域中常用的銀膏等。In the case of using the fire method, for example, a metal paste for a surface electrode containing metal particles and glass particles is used. The metal paste is applied to a region where the impurity diffusion layer is formed in a desired shape, and the metal particles are passed through the antireflection layer or the passivation layer by heat treatment to form an electrode formation region on the impurity diffusion layer. Surface electrode. As the metal paste for the surface electrode, for example, a silver paste or the like which is commonly used in the art can be used.

＜太陽電池元件的製造方法＞ 本發明的太陽電池的製造方法包括如下步驟：於所述步驟中獲得的形成有第一導電型雜質擴散層及第二導電型雜質擴散層的半導體基板的各雜質擴散層上形成電極。<Manufacturing Method of Solar Cell Element> The manufacturing method of the solar cell of the present invention includes the following steps: each impurity of the semiconductor substrate on which the first conductive type impurity diffusion layer and the second conductive type impurity diffusion layer are formed in the step An electrode is formed on the diffusion layer.

圖3（i）~圖（vii）是將示意性表示本實施方式的兩面受光型太陽電池元件的製造方法的一例的步驟圖表示為剖面圖者。但，該步驟圖對於本發明並無任何限制。(i) to (vii) of FIG. 3 are schematic cross-sectional views showing an example of a method of manufacturing the double-sided light-receiving solar cell element of the present embodiment. However, the step chart does not impose any limitation on the present invention.

使用圖3（i）~圖（vii），對半導體基板中使用n型半導體基板、第一導電型中使用p型、第二導電型中使用n型時的例子進行說明。3(i) to (vii), an example in which an n-type semiconductor substrate is used for a semiconductor substrate, a p-type is used for the first conductivity type, and an n-type is used for the second conductivity type will be described.

首先，如圖3（i）所示，準備具有50 μm～300 μm左右的厚度的n型半導體基板7。該n型半導體基板7是將利用柴可斯基（Czochralski，CZ）法、浮動帶域（Floating Zone，FZ）法、限邊膜生長（Edge Defined Film Growth，EFG）法、鑄造法等來形成的單晶或多晶的矽鑄錠等進行切片而獲得，例如含有1×1015 atoms/cm3 ～1×1019 atoms/cm3 左右的磷等n型雜質。First, as shown in FIG. 3(i), an n-type semiconductor substrate 7 having a thickness of about 50 μm to 300 μm is prepared. The n-type semiconductor substrate 7 is formed by a Czochralski (CZ) method, a floating zone (FZ) method, an edge defined film growth (EFG) method, a casting method, or the like. The single crystal or polycrystalline bismuth ingot or the like is obtained by slicing, and for example, an n-type impurity such as phosphorus of about 1 × 10 15 atoms/cm 3 to 1 × 10 19 atoms/cm 3 is contained.

n型半導體基板7較佳為利用鹼水溶液進行洗滌。藉由利用鹼水溶液進行洗滌，可將存在於n型半導體基板7的表面的有機物、顆粒等去除，鈍化效果進一步提高。The n-type semiconductor substrate 7 is preferably washed with an aqueous alkali solution. By washing with an aqueous alkali solution, organic substances, particles, and the like existing on the surface of the n-type semiconductor substrate 7 can be removed, and the passivation effect can be further improved.

利用鹼水溶液的洗滌的方法可例示通常已知的滾環擴增（Rolling Circle Amplification，RCA）洗滌等。例如，於氨水-過氧化氫水的混合溶液中浸漬n型半導體基板7，於60℃～80℃下進行處理，藉此可去除有機物及顆粒而進行洗滌。洗滌時間較佳為10秒～10分鐘，更佳為30秒～5分鐘。A method of washing with an aqueous alkali solution can be exemplified by a generally known Rolling Circle Amplification (RCA) washing or the like. For example, the n-type semiconductor substrate 7 is immersed in a mixed solution of ammonia water-hydrogen peroxide water, and treated at 60 to 80 ° C, whereby organic matter and particles can be removed and washed. The washing time is preferably from 10 seconds to 10 minutes, more preferably from 30 seconds to 5 minutes.

n型半導體基板7較佳為藉由鹼蝕刻等，於兩面形成例如棱錐（pyramid）結構之類的紋理結構（未圖示）。藉此，抑制太陽光的反射。The n-type semiconductor substrate 7 is preferably formed with a texture structure (not shown) such as a pyramid structure on both surfaces by alkali etching or the like. Thereby, the reflection of sunlight is suppressed.

繼而，如圖3（ii）所示，將p型雜質擴散組成物塗佈於其中一面，形成p型雜質擴散組成物膜8。繼而，如圖3（iii）所示，於擴散板4上，將半導體基板7以各自的形成有p型雜質擴散組成物膜8的面成為彼此相對的方式來配置。Then, as shown in FIG. 3(ii), a p-type impurity diffusion composition is applied to one surface thereof to form a p-type impurity diffusion composition film 8. Then, as shown in FIG. 3(iii), the semiconductor substrate 7 is placed on the diffusion plate 4 so that the surfaces on which the p-type impurity diffusion composition film 8 is formed are opposed to each other.

接著，進行熱擴散而形成p型雜質擴散層9。此時，p型雜質擴散組成物膜8藉由用以進行熱擴散的熱處理而成為熱處理物10。熱處理溫度較佳為設為800℃～1200℃。Next, thermal diffusion is performed to form the p-type impurity diffusion layer 9. At this time, the p-type impurity diffusion composition film 8 becomes the heat-treated product 10 by heat treatment for performing thermal diffusion. The heat treatment temperature is preferably set to 800 ° C to 1200 ° C.

繼而，如圖3（iv）所示，一邊於POCl3 溶液中使N2 氣或氮/氧混合氣體起泡，一邊將n型半導體基板7加熱至750℃～950℃，一併形成磷矽酸鹽玻璃層11與n型雜質擴散層12。p型雜質擴散組成物膜的熱處理物10成為遮罩層，磷於形成有p型雜質擴散層9的背面的擴散得到抑制。然後，藉由在包含氧的環境下將半導體基板氧化而使污染層氧化。關於經氧化的污染層，由於p型雜質擴散組成物膜的熱處理物10以及磷矽酸鹽玻璃層11一體化，故而未記載。Then, as shown in FIG. 3(iv), while the N 2 gas or the nitrogen/oxygen mixed gas is bubbled in the POCl 3 solution, the n-type semiconductor substrate 7 is heated to 750 ° C to 950 ° C to form a phosphonium The acid salt glass layer 11 and the n-type impurity diffusion layer 12. The heat-treated product 10 of the p-type impurity-diffusing composition film serves as a mask layer, and diffusion of phosphorus on the back surface on which the p-type impurity diffusion layer 9 is formed is suppressed. Then, the contaminated layer is oxidized by oxidizing the semiconductor substrate in an atmosphere containing oxygen. The oxidized contaminated layer is not described because the heat-treated product 10 and the phosphonium silicate glass layer 11 of the p-type impurity-diffusing composition film are integrated.

繼而，如圖3（v）所示，將p型雜質擴散組成物膜的熱處理物10以及磷矽酸鹽玻璃層11去除。用以去除的方法例如可列舉浸漬於氫氟酸等蝕刻液中的方法。Then, as shown in FIG. 3(v), the heat-treated product 10 and the phosphonium phosphate glass layer 11 of the p-type impurity diffusion composition film are removed. The method to be removed is, for example, a method of immersing in an etching solution such as hydrofluoric acid.

繼而，如圖3（vi）所示，於受光面及背面分別形成抗反射層兼鈍化層13。抗反射層兼鈍化層13如上所述，可列舉氮化矽層、氧化鈦層、氧化矽層、氧化鋁層等作為特佳的例子。Then, as shown in FIG. 3(vi), an antireflection layer and a passivation layer 13 are formed on the light receiving surface and the back surface, respectively. As described above, the antireflection layer and the passivation layer 13 are particularly preferable examples of a tantalum nitride layer, a titanium oxide layer, a hafnium oxide layer, and an aluminum oxide layer.

該實施方式中，抗反射層兼鈍化層13形成於受光面及背面的一部分區域。In this embodiment, the antireflection layer and passivation layer 13 is formed on a part of the light receiving surface and the back surface.

然後，如圖3（vii）所示，對於受光面及背面，分別於抗反射層兼鈍化層13不存在的部分形成p電極14及n電極15。電極可於賦予電極形成用膏後進行加熱處理而形成。Then, as shown in FIG. 3(vii), the p-electrode 14 and the n-electrode 15 are formed on the light-receiving surface and the back surface, respectively, in a portion where the anti-reflection layer and the passivation layer 13 are not present. The electrode can be formed by applying a paste for electrode formation and then performing heat treatment.

圖3（i）~圖（vii）中例示如下方法：於n型半導體基板上的抗反射層兼鈍化層13上預先設置缺損部，於其上形成p電極14及n電極15。但是，於抗反射層兼鈍化層13形成於整個面上的情況下，藉由使用包含具有經火性的玻璃粒子者作為電極形成用膏，可於煅燒後貫通抗反射層兼鈍化層，獲得雜質擴散層與電極的歐姆接觸（ohmic contact）。以所述方式，可獲得太陽電池元件。3(i) to (vii), a method is described in which a defect portion is provided in advance on the anti-reflection layer/passivation layer 13 on the n-type semiconductor substrate, and the p electrode 14 and the n electrode 15 are formed thereon. However, when the antireflection layer and the passivation layer 13 are formed on the entire surface, by using a glass paste containing flammability as a paste for electrode formation, it is possible to pass through the antireflection layer and the passivation layer after firing. An ohmic contact of the impurity diffusion layer with the electrode. In the manner described, solar cell components are available.

＜太陽電池＞ 本發明的太陽電池是利用所述的太陽電池元件的製造方法而獲得。藉此，本發明的太陽電池中，半導體基板的於不需要區域的雜質擴散層的形成得到抑制，實現電池性能的提高。<Solar Cell> The solar cell of the present invention is obtained by the above-described method for producing a solar cell element. As a result, in the solar cell of the present invention, the formation of the impurity diffusion layer in the unnecessary region of the semiconductor substrate is suppressed, and the battery performance is improved.

太陽電池元件亦可於電極上配置標記線等配線材料，經由該配線材料而連接多個太陽電池元件，來構成太陽電池模組。進而，太陽電池模組亦可利用密封材加以密封來構成。 實施例In the solar cell element, a wiring material such as a marking line may be disposed on the electrode, and a plurality of solar cell elements may be connected via the wiring material to constitute a solar cell module. Further, the solar cell module can also be formed by sealing with a sealing material. Example

以下，列舉實施例，對於本發明進一步進行具體說明，本發明並不限定於該些實施例。Hereinafter, the present invention will be specifically described by way of examples, and the present invention is not limited to the examples.

（實施例1） 於500 mL的三口燒瓶中加入20.8 g的聚乙烯醇（和光純藥製造，聚合度為500）、144 g的水，一邊攪拌一邊升溫至80℃，攪拌1小時後，加入231.6 g的丙二醇單甲醚（KH尼歐特克（KH Neochem）（股）製造）及3.6 g的三氧化二硼，於80℃下攪拌1小時。冷卻至40℃後，添加0.12 g的氟系界面活性劑美佳法（Megafac）F477（大日本油墨化學工業（股）製造），攪拌30分鐘而製作p型雜質擴散組成物。(Example 1) 20.8 g of polyvinyl alcohol (manufactured by Wako Pure Chemical Industries, Ltd., polymerization degree: 500) and 144 g of water were placed in a 500 mL three-necked flask, and the mixture was heated to 80 ° C while stirring, and stirred for 1 hour, and then added. 231.6 g of propylene glycol monomethyl ether (KH Neochem (manufactured by KH Neochem)) and 3.6 g of boron trioxide were stirred at 80 ° C for 1 hour. After cooling to 40 ° C, 0.12 g of a fluorine-based surfactant, Megafac F477 (manufactured by Dainippon Ink Chemicals Co., Ltd.), was added, and the mixture was stirred for 30 minutes to prepare a p-type impurity-diffusing composition.

繼而，於對兩個表面實施了紋理加工的n型半導體基板的其中一面，藉由旋轉塗佈而整面塗佈p型雜質擴散組成物，於150℃下乾燥1分鐘，製作於其中一面形成有p型雜質擴散組成物膜的半導體基板。Then, on one surface of the n-type semiconductor substrate on which both surfaces were textured, the p-type impurity diffusion composition was applied over the entire surface by spin coating, and dried at 150 ° C for 1 minute to form one side. A semiconductor substrate having a p-type impurity diffusion composition film.

接著，如圖1（ii）所示，將於其中一面形成有p型雜質擴散組成物膜的半導體基板配置於擴散板上。兩片一組的半導體基板的各自的形成有p型雜質擴散組成物膜的面間的距離以及未形成p型雜質擴散組成物膜的面間的距離均為3 mm。Next, as shown in FIG. 1(ii), a semiconductor substrate on which a p-type impurity diffusion composition film is formed is disposed on a diffusion plate. The distance between the surfaces of the two-piece semiconductor substrate on which the p-type impurity diffusion composition film was formed and the distance between the surfaces on which the p-type impurity diffusion composition film was not formed were both 3 mm.

繼而，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的擴散爐（光洋熱力系統（Koyo Thermo Systems）（股），206A-M100）中，於設定為700℃的狀態下加入擴散板。然後，以15℃/min升溫至950℃，於950℃下進行30分鐘熱處理而形成p型雜質擴散層。Then, in a diffusion furnace (Koyo Thermo Systems, 206A-M100) having a flow of O 2 : 0.2 L/min and N 2 : 9.8 L/min, it was added at 700 ° C. Diffuser plate. Then, the temperature was raised to 950 ° C at 15 ° C / min, and heat treatment was performed at 950 ° C for 30 minutes to form a p-type impurity diffusion layer.

繼而，以10℃/min降溫至830℃。於830℃下，於流通O2 ：0.2 L/min、N2 ：9.8 L/min、以及於POCl3 中起泡的N2 ：1.5 L/min的擴散爐中進行5分鐘處理。然後，使於POCl3 中起泡的N2 停止流通，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的氣體中，於相同溫度下進行12分鐘熱處理，於形成有p型雜質擴散組成物膜的區域以外形成n型雜質擴散層。然後，以10℃/min降溫至700℃，自擴散爐中取出n型半導體基板。Then, the temperature was lowered to 830 ° C at 10 ° C / min. The treatment was carried out at 830 ° C for 5 minutes in a diffusion furnace having a flow of O 2 : 0.2 L/min, N 2 : 9.8 L/min, and N 2 : 1.5 L/min which was foamed in POCl 3 . Then, N 2 which foamed in POCl 3 was stopped, and heat treatment was carried out for 12 minutes at the same temperature in a gas having O 2 : 0.2 L/min and N 2 : 9.8 L/min to form a p-type. An n-type impurity diffusion layer is formed outside the region of the impurity diffusion composition film. Then, the temperature was lowered to 700 ° C at 10 ° C / min, and the n-type semiconductor substrate was taken out from the diffusion furnace.

繼而，利用氫氟酸，將殘存於n型半導體基板的表面的玻璃層（p型雜質擴散組成物的熱處理物10以及磷矽酸鹽玻璃層11）去除。p型雜質擴散層區域的薄片電阻的平均值為65 Ω/□，在形成有p型雜質擴散組成物膜的面的相反面上形成的n型雜質擴散層區域的薄片電阻的平均值為55 Ω/□。Then, the glass layer (the heat-treated product 10 of the p-type impurity diffusion composition and the phosphosilicate glass layer 11) remaining on the surface of the n-type semiconductor substrate is removed by hydrofluoric acid. The average sheet resistance of the p-type impurity diffusion layer region is 65 Ω/□, and the average sheet resistance of the n-type impurity diffusion layer region formed on the opposite surface of the surface on which the p-type impurity diffusion composition film is formed is 55. Ω/□.

（p型雜質擴散層形成時的向外擴散的評價） 使用二次離子質譜儀（Secondary Ion Mass Spectrometer，SIMS，凱梅卡（Cameca）公司，IMS-7F），來測定實施例1中製作的半導體基板的n型雜質擴散層中的n型半導體基板表層的硼元素的濃度。一次離子中使用Cs+ 。n型半導體基板表層的硼濃度為7×1017 atoms/cm3 以下，硼對n型半導體基板表層的污染得到抑制。(Evaluation of Outward Diffusion at the Time of Formation of P-Type Impurity Diffusion Layer) The secondary ion mass spectrometer (SIMS, Cameca, IMS-7F) was used to measure the preparation produced in Example 1. The concentration of boron element in the surface layer of the n-type semiconductor substrate in the n-type impurity diffusion layer of the semiconductor substrate. Use Cs + in one ion. The boron concentration in the surface layer of the n-type semiconductor substrate is 7 × 10 17 atoms/cm 3 or less, and contamination of the surface layer of the n-type semiconductor substrate by boron is suppressed.

（實施例2） 於對兩個表面實施了紋理加工的n型半導體基板的其中一面，藉由旋轉塗佈而整面塗佈與實施例1相同的p型雜質擴散組成物，於150℃下乾燥1分鐘，製作於其中一面形成有p型雜質擴散組成物膜的半導體基板。(Example 2) The same p-type impurity diffusion composition as in Example 1 was applied to one surface of an n-type semiconductor substrate on which both surfaces were textured, at 150 ° C by spin coating. After drying for 1 minute, a semiconductor substrate on which a p-type impurity diffusion composition film was formed was formed.

接著，如圖2所示，將於其中一面形成有p型雜質擴散組成物膜的半導體基板配置於擴散板上。兩片一組的半導體基板的各自的形成有p型雜質擴散組成物膜的面間的距離為0 mm，未形成p型雜質擴散組成物膜的面間的距離為3 mm。Next, as shown in FIG. 2, a semiconductor substrate on which a p-type impurity diffusion composition film is formed is disposed on a diffusion plate. The distance between the faces of the two-piece semiconductor substrate on which the p-type impurity diffusion composition film was formed was 0 mm, and the distance between the faces on which the p-type impurity diffusion composition film was not formed was 3 mm.

繼而，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的擴散爐（光洋熱力系統（Koyo Thermo Systems）（股），206A-M100）中，於設定為700℃的狀態下加入擴散板。然後，以15℃/min升溫至950℃，於950℃下進行30分鐘熱處理而形成p型雜質擴散層。Then, in a diffusion furnace (Koyo Thermo Systems, 206A-M100) having a flow of O 2 : 0.2 L/min and N 2 : 9.8 L/min, it was added at 700 ° C. Diffuser plate. Then, the temperature was raised to 950 ° C at 15 ° C / min, and heat treatment was performed at 950 ° C for 30 minutes to form a p-type impurity diffusion layer.

繼而，以10℃/min降溫至830℃。於830℃下，於流通O2 ：0.2 L/min、N2 ：9.8 L/min、以及於POCl3 中起泡的N2 ：1.5 L/min的擴散爐中，進行5分鐘處理。然後，使於POCl3 中起泡的N2 停止流通，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的氣體中，於相同溫度下進行12分鐘熱處理，於形成有p型雜質擴散組成物膜的區域以外形成n型雜質擴散層。然後，以10℃/min降溫至700℃，自擴散爐中取出n型半導體基板。Then, the temperature was lowered to 830 ° C at 10 ° C / min. The treatment was carried out at 830 ° C for 5 minutes in a diffusion furnace having a flow of O 2 : 0.2 L/min, N 2 : 9.8 L/min, and N 2 : 1.5 L/min which was foamed in POCl 3 . Then, N 2 which foamed in POCl 3 was stopped, and heat treatment was carried out for 12 minutes at the same temperature in a gas having O 2 : 0.2 L/min and N 2 : 9.8 L/min to form a p-type. An n-type impurity diffusion layer is formed outside the region of the impurity diffusion composition film. Then, the temperature was lowered to 700 ° C at 10 ° C / min, and the n-type semiconductor substrate was taken out from the diffusion furnace.

接著，利用氫氟酸，將殘存於n型半導體基板的表面的玻璃層（p型雜質擴散組成物的熱處理物10及磷矽酸鹽玻璃層11）去除。p型雜質擴散層區域的薄片電阻的平均值為67 Ω/□，在形成有p型雜質擴散組成物膜的面的相反面上形成的n型雜質擴散層區域的薄片電阻的平均值為56 Ω/□。Next, the glass layer (the heat-treated product 10 of the p-type impurity diffusion composition and the phosphosilicate glass layer 11) remaining on the surface of the n-type semiconductor substrate is removed by hydrofluoric acid. The average value of the sheet resistance of the p-type impurity diffusion layer region was 67 Ω/□, and the average sheet resistance of the n-type impurity diffusion layer region formed on the opposite surface of the surface on which the p-type impurity diffusion composition film was formed was 56. Ω/□.

（p型雜質擴散層形成時的向外擴散的評價） 使用SIMS（二次離子質譜儀，凱梅卡（Cameca）公司，IMS-7F），來測定實施例2中製作的半導體基板的n型雜質擴散層中的n型半導體基板表層的硼元素的濃度。一次離子中使用Cs+ 。n型半導體基板表層的硼濃度為6×1016 atoms/cm3 以下，硼對n型半導體基板表層的污染得到抑制。(Evaluation of Outward Diffusion at the Time of Formation of P-Type Impurity Diffusion Layer) The n-type of the semiconductor substrate fabricated in Example 2 was measured using SIMS (Secondary Ion Mass Spectrometer, Cameca, IMS-7F). The concentration of boron element in the surface layer of the n-type semiconductor substrate in the impurity diffusion layer. Use Cs + in one ion. The boron concentration in the surface layer of the n-type semiconductor substrate is 6 × 10 16 atoms/cm 3 or less, and contamination of the surface layer of the n-type semiconductor substrate by boron is suppressed.

（實施例3） 於對兩個表面實施了紋理加工的n型半導體基板的其中一面，藉由旋轉塗佈而整面塗佈與實施例1相同的p型雜質擴散組成物，於150℃下乾燥1分鐘，製作於其中一面形成有p型雜質擴散組成物膜的半導體基板。(Example 3) The same p-type impurity diffusion composition as that of Example 1 was applied to one surface of an n-type semiconductor substrate on which both surfaces were textured, at 150 ° C by spin coating. After drying for 1 minute, a semiconductor substrate on which a p-type impurity diffusion composition film was formed was formed.

接著，如圖2所示，將於其中一面形成有p型雜質擴散組成物膜的半導體基板配置於擴散板上。兩片一組的半導體基板的各自的形成有p型雜質擴散組成物膜的面間的距離為0 mm，未形成p型雜質擴散組成物膜的面間的距離為3 mm。Next, as shown in FIG. 2, a semiconductor substrate on which a p-type impurity diffusion composition film is formed is disposed on a diffusion plate. The distance between the faces of the two-piece semiconductor substrate on which the p-type impurity diffusion composition film was formed was 0 mm, and the distance between the faces on which the p-type impurity diffusion composition film was not formed was 3 mm.

繼而，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的擴散爐（光洋熱力系統（Koyo Thermo Systems）（股），206A-M100）中，於設定為700℃的狀態下加入擴散板。然後，以15℃/min升溫至950℃，於950℃下進行30分鐘熱處理而形成p型雜質擴散層。Then, in a diffusion furnace (Koyo Thermo Systems, 206A-M100) having a flow of O 2 : 0.2 L/min and N 2 : 9.8 L/min, it was added at 700 ° C. Diffuser plate. Then, the temperature was raised to 950 ° C at 15 ° C / min, and heat treatment was performed at 950 ° C for 30 minutes to form a p-type impurity diffusion layer.

繼而，以10℃/min降溫至830℃。於830℃下，於流通O2 ：0.2 L/min、N2 ：9.8 L/min、以及於POCl3 中起泡的N2 ：1.5 L/min的擴散爐中，進行5分鐘處理。然後，使於POCl3 中起泡的N2 停止流通，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的氣體中，於相同溫度下進行12分鐘熱處理，於形成有p型雜質擴散組成物膜的區域以外形成n型雜質擴散層。Then, the temperature was lowered to 830 ° C at 10 ° C / min. The treatment was carried out at 830 ° C for 5 minutes in a diffusion furnace having a flow of O 2 : 0.2 L/min, N 2 : 9.8 L/min, and N 2 : 1.5 L/min which was foamed in POCl 3 . Then, N 2 which foamed in POCl 3 was stopped, and heat treatment was carried out for 12 minutes at the same temperature in a gas having O 2 : 0.2 L/min and N 2 : 9.8 L/min to form a p-type. An n-type impurity diffusion layer is formed outside the region of the impurity diffusion composition film.

繼而，以10℃/min升溫至900℃。於900℃下，於流通O2 ：5 L/min的氣體中，於相同溫度下進行20分鐘熱處理，使半導體基板表面氧化。Then, the temperature was raised to 900 ° C at 10 ° C / min. The surface of the semiconductor substrate was oxidized at 900 ° C in a gas having a flow of O 2 : 5 L/min at the same temperature for 20 minutes.

然後，以10℃/min降溫至700℃，自擴散爐中取出n型半導體基板。Then, the temperature was lowered to 700 ° C at 10 ° C / min, and the n-type semiconductor substrate was taken out from the diffusion furnace.

接著，利用氫氟酸，將殘存於n型半導體基板的表面的玻璃層（p型雜質擴散組成物的熱處理物10及磷矽酸鹽玻璃層11）去除。p型雜質擴散層區域的薄片電阻的平均值為60 Ω/□，在形成有p型雜質擴散組成物膜的面的相反面上形成的n型雜質擴散層區域的薄片電阻的平均值為51 Ω/□。Next, the glass layer (the heat-treated product 10 of the p-type impurity diffusion composition and the phosphosilicate glass layer 11) remaining on the surface of the n-type semiconductor substrate is removed by hydrofluoric acid. The average value of the sheet resistance of the p-type impurity diffusion layer region is 60 Ω/□, and the average value of the sheet resistance of the n-type impurity diffusion layer region formed on the opposite surface of the surface on which the p-type impurity diffusion composition film is formed is 51. Ω/□.

（p型雜質擴散層形成時的向外擴散的評價） 使用SIMS（二次離子質譜儀，凱梅卡（Cameca）公司，IMS-7F），來測定實施例3中製作的半導體基板的n型雜質擴散層中的n型半導體基板表層的硼元素的濃度。一次離子中使用Cs+ 。n型半導體基板表層的硼濃度為5×1015 atoms/cm3 以下，硼對n型半導體基板表層的污染得到抑制。(Evaluation of Outward Diffusion at the Time of Formation of P-Type Impurity Diffusion Layer) The n-type of the semiconductor substrate fabricated in Example 3 was measured using SIMS (Secondary Ion Mass Spectrometer, Cameca, IMS-7F). The concentration of boron element in the surface layer of the n-type semiconductor substrate in the impurity diffusion layer. Use Cs + in one ion. The boron concentration in the surface layer of the n-type semiconductor substrate is 5 × 10 15 atoms/cm 3 or less, and contamination of the surface layer of the n-type semiconductor substrate by boron is suppressed.

（實施例4） 於對兩個表面實施了紋理加工的n型半導體基板的其中一面，藉由旋轉塗佈而整面塗佈與實施例1相同的p型雜質擴散組成物，於150℃下乾燥1分鐘，製作於其中一面形成有p型雜質擴散組成物膜的半導體基板。(Example 4) The same p-type impurity diffusion composition as in Example 1 was applied to one surface of an n-type semiconductor substrate on which both surfaces were textured, and the same p-type impurity diffusion composition as in Example 1 was applied by spin coating at 150 ° C. After drying for 1 minute, a semiconductor substrate on which a p-type impurity diffusion composition film was formed was formed.

接著，如圖2所示，將於其中一面形成有p型雜質擴散組成物膜的半導體基板配置於擴散板上。兩片一組的半導體基板的各自的形成有p型雜質擴散組成物膜的面間的距離為0 mm，未形成p型雜質擴散組成物膜的面間的距離為3 mm。Next, as shown in FIG. 2, a semiconductor substrate on which a p-type impurity diffusion composition film is formed is disposed on a diffusion plate. The distance between the faces of the two-piece semiconductor substrate on which the p-type impurity diffusion composition film was formed was 0 mm, and the distance between the faces on which the p-type impurity diffusion composition film was not formed was 3 mm.

繼而，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的擴散爐（光洋熱力系統（Koyo Thermo Systems）（股），206A-M100）中，於設定為700℃的狀態下加入擴散板。然後，以15℃/min升溫至950℃，於950℃下進行30分鐘熱處理而形成p型雜質擴散層。Then, in a diffusion furnace (Koyo Thermo Systems, 206A-M100) having a flow of O 2 : 0.2 L/min and N 2 : 9.8 L/min, it was added at 700 ° C. Diffuser plate. Then, the temperature was raised to 950 ° C at 15 ° C / min, and heat treatment was performed at 950 ° C for 30 minutes to form a p-type impurity diffusion layer.

繼而，以10℃/min降溫至900℃。於900℃下，於流通O2 ：5 L/min的氣體中，於相同溫度下進行20分鐘熱處理，使半導體基板表面氧化。Then, the temperature was lowered to 900 ° C at 10 ° C / min. The surface of the semiconductor substrate was oxidized at 900 ° C in a gas having a flow of O 2 : 5 L/min at the same temperature for 20 minutes.

繼而，以10℃/min降溫至830℃。於830℃下，於流通O2 ：0.2 L/min、N2 ：9.8 L/min、以及於POCl3 中起泡的N2 ：1.5 L/min的擴散爐中，進行5分鐘處理。然後，使於POCl3 中起泡的N2 停止流通，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的氣體中，於相同溫度下進行12分鐘熱處理，於形成有p型雜質擴散組成物膜的區域以外形成n型雜質擴散層。然後，以10℃/min降溫至700℃，自擴散爐中取出n型半導體基板。Then, the temperature was lowered to 830 ° C at 10 ° C / min. The treatment was carried out at 830 ° C for 5 minutes in a diffusion furnace having a flow of O 2 : 0.2 L/min, N 2 : 9.8 L/min, and N 2 : 1.5 L/min which was foamed in POCl 3 . Then, N 2 which foamed in POCl 3 was stopped, and heat treatment was carried out for 12 minutes at the same temperature in a gas having O 2 : 0.2 L/min and N 2 : 9.8 L/min to form a p-type. An n-type impurity diffusion layer is formed outside the region of the impurity diffusion composition film. Then, the temperature was lowered to 700 ° C at 10 ° C / min, and the n-type semiconductor substrate was taken out from the diffusion furnace.

接著，利用氫氟酸，將殘存於n型半導體基板的表面的玻璃層（p型雜質擴散組成物的熱處理物10及磷矽酸鹽玻璃層11）去除。p型雜質擴散層區域的薄片電阻的平均值為62 Ω/□，在形成有p型雜質擴散組成物膜的面的相反面上形成的n型雜質擴散層區域的薄片電阻的平均值為61 Ω/□。Next, the glass layer (the heat-treated product 10 of the p-type impurity diffusion composition and the phosphosilicate glass layer 11) remaining on the surface of the n-type semiconductor substrate is removed by hydrofluoric acid. The average sheet resistance of the p-type impurity diffusion layer region is 62 Ω/□, and the average sheet resistance of the n-type impurity diffusion layer region formed on the opposite surface of the surface on which the p-type impurity diffusion composition film is formed is 61. Ω/□.

（p型雜質擴散層形成時的向外擴散的評價） 使用SIMS（二次離子質譜儀，凱梅卡（Cameca）公司，IMS-7F），來測定實施例4中製作的半導體基板的n型雜質擴散層中的n型半導體基板表層的硼元素的濃度。一次離子中使用Cs+ 。n型半導體基板表層的硼濃度為2×1016 atoms/cm3 以下，硼對n型半導體基板表層的污染得到抑制。(Evaluation of Outward Diffusion at the Time of Formation of P-Type Impurity Diffusion Layer) The n-type of the semiconductor substrate fabricated in Example 4 was measured using SIMS (Secondary Ion Mass Spectrometer, Cameca, IMS-7F). The concentration of boron element in the surface layer of the n-type semiconductor substrate in the impurity diffusion layer. Use Cs + in one ion. The boron concentration in the surface layer of the n-type semiconductor substrate is 2 × 10 16 atoms/cm 3 or less, and contamination of the surface layer of the n-type semiconductor substrate by boron is suppressed.

（實施例5） 於對兩個表面實施了紋理加工的n型半導體基板的其中一面，藉由旋轉塗佈而整面塗佈與實施例1相同的p型雜質擴散組成物，於150℃下乾燥1分鐘，製作於其中一面形成有p型雜質擴散組成物膜的半導體基板。(Example 5) The same p-type impurity diffusion composition as in Example 1 was applied to one surface of an n-type semiconductor substrate on which both surfaces were textured, and the same p-type impurity diffusion composition as in Example 1 was applied by spin coating at 150 ° C. After drying for 1 minute, a semiconductor substrate on which a p-type impurity diffusion composition film was formed was formed.

接著，如圖2所示，將於其中一面形成有p型雜質擴散組成物膜的半導體基板配置於擴散板上。兩片一組的半導體基板的各自的形成有p型雜質擴散組成物膜的面間的距離為0 mm，未形成p型雜質擴散組成物膜的面間的距離為3 mm。Next, as shown in FIG. 2, a semiconductor substrate on which a p-type impurity diffusion composition film is formed is disposed on a diffusion plate. The distance between the faces of the two-piece semiconductor substrate on which the p-type impurity diffusion composition film was formed was 0 mm, and the distance between the faces on which the p-type impurity diffusion composition film was not formed was 3 mm.

繼而，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的擴散爐（光洋熱力系統（Koyo Thermo Systems）（股），206A-M100）中，於設定為700℃的狀態下加入擴散板。Then, in a diffusion furnace (Koyo Thermo Systems, 206A-M100) having a flow of O 2 : 0.2 L/min and N 2 : 9.8 L/min, it was added at 700 ° C. Diffuser plate.

繼而，以15℃/min升溫至900℃。於900℃下，於流通O2 ：5 L/min的氣體中，於相同溫度下進行20分鐘熱處理，使半導體基板表面氧化。Then, the temperature was raised to 900 ° C at 15 ° C / min. The surface of the semiconductor substrate was oxidized at 900 ° C in a gas having a flow of O 2 : 5 L/min at the same temperature for 20 minutes.

繼而，以15℃/min升溫至950℃，於950℃下進行30分鐘熱處理而形成p型雜質擴散層。Then, the temperature was raised to 950 ° C at 15 ° C / min, and heat treatment was performed at 950 ° C for 30 minutes to form a p-type impurity diffusion layer.

繼而，以10℃/min降溫至830℃。於830℃下，於流通O2 ：0.2 L/min、N2 ：9.8 L/min、以及於POCl3 中起泡的N2 ：1.5 L/min的擴散爐中，進行5分鐘處理。然後，使於POCl3 中起泡的N2 停止流通，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的氣體中，於相同溫度下進行12分鐘熱處理，於形成有p型雜質擴散組成物膜的區域以外形成n型雜質擴散層。然後，以10℃/min降溫至700℃，自擴散爐中取出n型半導體基板。Then, the temperature was lowered to 830 ° C at 10 ° C / min. The treatment was carried out at 830 ° C for 5 minutes in a diffusion furnace having a flow of O 2 : 0.2 L/min, N 2 : 9.8 L/min, and N 2 : 1.5 L/min which was foamed in POCl 3 . Then, N 2 which foamed in POCl 3 was stopped, and heat treatment was carried out for 12 minutes at the same temperature in a gas having O 2 : 0.2 L/min and N 2 : 9.8 L/min to form a p-type. An n-type impurity diffusion layer is formed outside the region of the impurity diffusion composition film. Then, the temperature was lowered to 700 ° C at 10 ° C / min, and the n-type semiconductor substrate was taken out from the diffusion furnace.

接著，利用氫氟酸，將殘存於n型半導體基板的表面的玻璃層（p型雜質擴散組成物的熱處理物10及磷矽酸鹽玻璃層11）去除。p型雜質擴散層區域的薄片電阻的平均值為64 Ω/□，在形成有p型雜質擴散組成物膜的面的相反面上形成的n型雜質擴散層區域的薄片電阻的平均值為65 Ω/□。Next, the glass layer (the heat-treated product 10 of the p-type impurity diffusion composition and the phosphosilicate glass layer 11) remaining on the surface of the n-type semiconductor substrate is removed by hydrofluoric acid. The average sheet resistance of the p-type impurity diffusion layer region is 64 Ω/□, and the average sheet resistance of the n-type impurity diffusion layer region formed on the opposite surface of the surface on which the p-type impurity diffusion composition film is formed is 65. Ω/□.

（p型雜質擴散層形成時的向外擴散的評價） 使用SIMS（二次離子質譜儀，凱梅卡（Cameca）公司，IMS-7F），來測定實施例5中製作的半導體基板的n型雜質擴散層中的n型半導體基板表層的硼元素的濃度。一次離子中使用Cs+ 。n型半導體基板表層的硼濃度為4×1016 atoms/cm3 以下，硼對n型半導體基板表層的污染得到抑制。(Evaluation of Outward Diffusion at the Time of Formation of P-Type Impurity Diffusion Layer) The n-type of the semiconductor substrate fabricated in Example 5 was measured using SIMS (Secondary Ion Mass Spectrometer, Cameca, IMS-7F). The concentration of boron element in the surface layer of the n-type semiconductor substrate in the impurity diffusion layer. Use Cs + in one ion. The boron concentration in the surface layer of the n-type semiconductor substrate is 4 × 10 16 atoms/cm 3 or less, and contamination of the surface layer of the n-type semiconductor substrate by boron is suppressed.

（比較例1） 於對兩個表面實施了紋理加工的n型半導體基板的其中一面，藉由旋轉塗佈而整面塗佈與實施例1相同的p型雜質擴散組成物，於150℃下乾燥1分鐘，製作於其中一面形成有p型雜質擴散組成物膜的半導體基板。(Comparative Example 1) The same p-type impurity diffusion composition as in Example 1 was applied to one surface of an n-type semiconductor substrate on which both surfaces were textured, at 150 ° C by spin coating. After drying for 1 minute, a semiconductor substrate on which a p-type impurity diffusion composition film was formed was formed.

接著，如圖4所示，將於其中一面形成有p型雜質擴散組成物膜的半導體基板，以各自的形成有p型雜質擴散組成物膜的面的朝向一致的方式來配置於擴散板上。各半導體基板的距離均為3 mm。Next, as shown in FIG. 4, the semiconductor substrate on which the p-type impurity diffusion composition film is formed is disposed on the diffusion plate such that the faces of the surfaces on which the p-type impurity diffusion composition film is formed are aligned. . The distance between each semiconductor substrate was 3 mm.

繼而，於流通O2 ：0.2 L/min、N2 ：9.8 L/min的擴散爐（光洋熱力系統（Koyo Thermo Systems）（股），206A-M100）中，於設定為700℃的狀態下加入擴散板。然後，以15℃/min升溫至950℃，於950℃下進行30分鐘熱處理而形成p型雜質擴散層。Then, in a diffusion furnace (Koyo Thermo Systems, 206A-M100) having a flow of O 2 : 0.2 L/min and N 2 : 9.8 L/min, it was added at 700 ° C. Diffuser plate. Then, the temperature was raised to 950 ° C at 15 ° C / min, and heat treatment was performed at 950 ° C for 30 minutes to form a p-type impurity diffusion layer.

繼而，以10℃/min降溫至830℃。於830℃下，於流通O2 ：0.2 L/min、N2 ：9.8 L/min、以及於POCl3 中起泡的N2 ：1.5 L/min的擴散爐中，進行5分鐘處理。然後，使於POCl3 中起泡的N2 停止流通，於O2 ：0.2 L/min、N2 ：9.8 L/min的氣體中，於相同溫度下進行12分鐘熱處理，於形成有p型雜質擴散組成物膜的區域以外形成n型雜質擴散層。然後，以10℃/min降溫至700℃，自擴散爐中取出n型半導體基板。Then, the temperature was lowered to 830 ° C at 10 ° C / min. The treatment was carried out at 830 ° C for 5 minutes in a diffusion furnace having a flow of O 2 : 0.2 L/min, N 2 : 9.8 L/min, and N 2 : 1.5 L/min which was foamed in POCl 3 . Then, N 2 which foamed in POCl 3 was stopped, and heat treatment was performed for 12 minutes at the same temperature in a gas of O 2 : 0.2 L/min and N 2 : 9.8 L/min to form a p-type impurity. An n-type impurity diffusion layer is formed outside the region of the diffusion composition film. Then, the temperature was lowered to 700 ° C at 10 ° C / min, and the n-type semiconductor substrate was taken out from the diffusion furnace.

接著，利用氫氟酸，將殘存於n型半導體基板的表面的玻璃層（p型雜質擴散組成物的熱處理物10及磷矽酸鹽玻璃層11）去除。p型雜質擴散層區域的薄片電阻的平均值為66 Ω/□，在形成有p型雜質擴散組成物膜的面的相反面上形成的n型雜質擴散層區域的薄片電阻的平均值為56 Ω/□。Next, the glass layer (the heat-treated product 10 of the p-type impurity diffusion composition and the phosphosilicate glass layer 11) remaining on the surface of the n-type semiconductor substrate is removed by hydrofluoric acid. The average value of the sheet resistance of the p-type impurity diffusion layer region was 66 Ω/□, and the average sheet resistance of the n-type impurity diffusion layer region formed on the opposite surface of the surface on which the p-type impurity diffusion composition film was formed was 56. Ω/□.

（p型雜質擴散層形成時的向外擴散的評價） 使用SIMS（二次離子質譜儀，凱梅卡（Cameca）公司，IMS-7F），來測定比較例1中製作的半導體基板的n型雜質擴散層中的n型半導體基板表層的硼元素的濃度。一次離子中使用Cs+ 。n型半導體基板表層的硼濃度為1020 atoms/cm3 ，硼污染了n型半導體基板表層。(Evaluation of Outward Diffusion at the Time of Formation of P-Type Impurity Diffusion Layer) The n-type of the semiconductor substrate produced in Comparative Example 1 was measured using SIMS (Secondary Ion Mass Spectrometer, Cameca, IMS-7F). The concentration of boron element in the surface layer of the n-type semiconductor substrate in the impurity diffusion layer. Use Cs + in one ion. The boron concentration of the surface layer of the n-type semiconductor substrate is 10 20 atoms/cm 3 , and boron contaminates the surface layer of the n-type semiconductor substrate.

1‧‧‧半導體基板
2‧‧‧第一導電型雜質擴散組成物膜
3‧‧‧於其中一面形成有第一導電型雜質擴散組成物膜的半導體基板
4‧‧‧擴散板
5‧‧‧第一導電型雜質擴散層
6‧‧‧第一導電型雜質擴散組成物膜的熱處理物層
7‧‧‧n型半導體基板
8‧‧‧p型雜質擴散組成物膜
9‧‧‧p型雜質擴散層
10‧‧‧p型雜質擴散組成物膜的熱處理物
11‧‧‧磷矽酸鹽玻璃層
12‧‧‧n型雜質擴散層
13‧‧‧抗反射層兼鈍化層
14‧‧‧p電極
15‧‧‧n電極
16‧‧‧擴散爐1‧‧‧Semiconductor substrate
2‧‧‧First Conductive Impurity Diffusion Composition Film
3‧‧‧Semiconductor substrate having a first conductivity type impurity diffusion composition film formed on one side thereof
4‧‧‧Diffuser
5‧‧‧First Conductive Impurity Diffusion Layer
6‧‧‧ Heat-treated layer of the first conductivity type impurity diffusion composition film
7‧‧‧n type semiconductor substrate
8‧‧‧p type impurity diffusion composition film
9‧‧‧p type impurity diffusion layer
10‧‧‧ Heat treatment of p-type impurity diffusion composition film
11‧‧‧phosphonate glass layer
12‧‧‧n type impurity diffusion layer
13‧‧‧Anti-reflective layer and passivation layer
14‧‧‧p electrode
15‧‧‧n electrode
16‧‧‧Diffusion furnace

圖1（i）~圖1（iii）是表示本發明的半導體元件的製造方法的一例的步驟剖面圖。 圖2是表示形成第一導電型雜質擴散層時的半導體基板的配置的一例的剖面圖。 圖3（i）~圖3（vii）是表示本發明的太陽電池的製造方法的一例的步驟剖面圖。 圖4是表示比較例1中的擴散板上的半導體基板的配置的剖面圖。1(i) to 1(iii) are cross-sectional views showing the steps of an example of a method of manufacturing a semiconductor device of the present invention. 2 is a cross-sectional view showing an example of an arrangement of a semiconductor substrate when a first conductivity type impurity diffusion layer is formed. 3(i) to 3(vii) are cross-sectional views showing the steps of an example of a method of manufacturing a solar cell of the present invention. 4 is a cross-sectional view showing the arrangement of a semiconductor substrate on a diffusion plate in Comparative Example 1.

1‧‧‧半導體基板 1‧‧‧Semiconductor substrate

2‧‧‧第一導電型雜質擴散組成物膜 2‧‧‧First Conductive Impurity Diffusion Composition Film

3‧‧‧於其中一面形成有第一導電型雜質擴散組成物膜的半導體基板 3‧‧‧Semiconductor substrate having a first conductivity type impurity diffusion composition film formed on one side thereof

4‧‧‧擴散板 4‧‧‧Diffuser

5‧‧‧第一導電型雜質擴散層 5‧‧‧First Conductive Impurity Diffusion Layer

6‧‧‧第一導電型雜質擴散組成物膜的熱處理物層 6‧‧‧ Heat-treated layer of the first conductivity type impurity diffusion composition film

16‧‧‧擴散爐 16‧‧‧Diffusion furnace

Claims (12)

一種半導體元件的製造方法，其為使用多個半導體基板的半導體元件的製造方法，其特徵在於：包括下述（a）～（c）的步驟，且於（b）及（c）的步驟中，將兩片一組的半導體基板，以各自的形成有第一導電型雜質擴散組成物膜的面成為彼此相對的方式來配置， （a）於各半導體基板的其中一面塗佈第一導電型雜質擴散組成物，形成第一導電型雜質擴散組成物膜的步驟； （b）對形成有所述第一導電型雜質擴散組成物膜的半導體基板進行加熱，於所述半導體基板上擴散所述第一導電型雜質，形成第一導電型雜質擴散層的步驟；以及 （c）於含有包含第二導電型雜質的氣體的環境下對所述半導體基板進行加熱，於所述半導體基板的另一面上擴散第二導電型雜質，形成第二導電型雜質擴散層的步驟。A method of manufacturing a semiconductor device, which is a method of manufacturing a semiconductor device using a plurality of semiconductor substrates, comprising the steps (a) to (c) below, and in the steps (b) and (c) The two-piece semiconductor substrate is disposed such that the surfaces on which the first conductivity-type impurity diffusion composition film is formed face each other, and (a) the first conductivity type is applied to one surface of each semiconductor substrate. a step of forming a first conductivity type impurity diffusion composition film by the impurity diffusion composition; (b) heating the semiconductor substrate on which the first conductivity type impurity diffusion composition film is formed, and diffusing the semiconductor substrate a first conductivity type impurity to form a first conductivity type impurity diffusion layer; and (c) heating the semiconductor substrate in an environment containing a gas containing the second conductivity type impurity on the other side of the semiconductor substrate The step of diffusing the second conductivity type impurity to form the second conductivity type impurity diffusion layer. 如申請專利範圍第1項所述的半導體元件的製造方法，其中所述（c）的步驟是於所述（b）的步驟之後，將所述第一導電型雜質擴散組成物膜的熱處理物作為遮罩來進行。The method of manufacturing a semiconductor device according to claim 1, wherein the step (c) is a heat treatment of diffusing the first conductivity type impurity diffusion composition film after the step (b) It is carried out as a mask. 如申請專利範圍第1項或第2項所述的半導體元件的製造方法，其中所述（c）的步驟是於所述（b）的步驟之後連續進行。The method of manufacturing a semiconductor device according to the first or second aspect of the invention, wherein the step (c) is performed continuously after the step (b). 如申請專利範圍第1項至第3項中任一項所述的半導體元件的製造方法，其中所述（c）步驟中的形成第二導電型雜質擴散層時的加熱溫度為較所述（b）步驟中的形成第一導電型雜質擴散層時的加熱溫度而言低50℃～200℃的溫度。The method for producing a semiconductor device according to any one of the items 1 to 3, wherein the heating temperature at the time of forming the second conductivity type impurity diffusion layer in the step (c) is higher than b) The temperature at which the first conductivity type impurity diffusion layer is formed in the step is 50 ° C to 200 ° C lower. 如申請專利範圍第1項至第4項中任一項所述的半導體元件的製造方法，其更包括（d）於包含氧的環境下使半導體基板表面氧化的步驟。The method for producing a semiconductor device according to any one of claims 1 to 4, further comprising (d) a step of oxidizing a surface of the semiconductor substrate in an atmosphere containing oxygen. 如申請專利範圍第5項所述的半導體元件的製造方法，其中所述（d）步驟是於所述（c）步驟之後連續進行。The method of manufacturing a semiconductor device according to claim 5, wherein the step (d) is continuously performed after the step (c). 如申請專利範圍第1項至第6項中任一項所述的半導體元件的製造方法，其為使用多組的所述兩片一組的半導體基板的半導體元件的製造方法， 其中於所述（b）及（c）的步驟中， 所述多組的兩片一組的半導體基板的各組中的形成有所述第一導電型雜質擴散組成物膜的面間的距離（W1）、以及相鄰的組中的與形成有所述第一導電型雜質擴散組成物膜的面相反側的面間的距離（W2）滿足（W1）＜（W2）。The method of manufacturing a semiconductor device according to any one of claims 1 to 6, which is a method of manufacturing a semiconductor device using a plurality of sets of the two-piece semiconductor substrate, wherein In the steps (b) and (c), the distance (W1) between the faces of the first conductivity type impurity diffusion composition film formed in each of the plurality of sets of the semiconductor substrates of the plurality of sets, And the distance (W2) between the surfaces on the opposite side to the surface on which the film of the first conductivity type impurity diffusion composition is formed in the adjacent group satisfies (W1) < (W2). 如申請專利範圍第1項至第7項中任一項所述的半導體元件的製造方法，其中於所述（b）及（c）步驟中的多個半導體基板的配置中，所述兩片一組的半導體基板的形成有所述第一導電型雜質擴散組成物膜的面間的距離為0 mm。The method of manufacturing a semiconductor device according to any one of claims 1 to 7, wherein in the arrangement of the plurality of semiconductor substrates in the steps (b) and (c), the two sheets The distance between the faces of the film of the first conductivity type impurity diffusion composition on the semiconductor substrate of one set is 0 mm. 如申請專利範圍第1項至第8項中任一項所述的半導體元件的製造方法，其中所述（b）步驟是於包含氧的環境下進行。The method for producing a semiconductor device according to any one of claims 1 to 8, wherein the step (b) is carried out in an atmosphere containing oxygen. 如申請專利範圍第1項至第9項中任一項所述的半導體元件的製造方法，其中所述（b）步驟中的氣體環境中的氮與氧的比率、和所述（c）步驟中的氣體環境中的氮與氧的比率相同。The method for producing a semiconductor device according to any one of the items 1 to 9, wherein the ratio of nitrogen to oxygen in the gas atmosphere in the step (b), and the step (c) The ratio of nitrogen to oxygen in the gaseous environment is the same. 如申請專利範圍第1項至第10項中任一項所述的半導體元件的製造方法，其中所述第一導電型為p型，所述第二導電型為n型。The method of manufacturing a semiconductor device according to any one of claims 1 to 10, wherein the first conductivity type is a p-type and the second conductivity type is an n-type. 一種太陽電池的製造方法，其使用如申請專利範圍第1項至第11項中任一項所述的半導體元件的製造方法。A method of manufacturing a solar cell according to any one of claims 1 to 11, wherein the method of producing a semiconductor device according to any one of claims 1 to 11.
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