TW201724593A - Stepped magnetic tunnel junction devices, methods of forming the same, and devices including the same - Google Patents

Abstract

Technologies for manufacturing spin transfer torque memory (STTM) elements are disclosed. In some embodiments, the technologies include methods for forming a step proximate an interface between a free magnetic layer and a dielectric layer of a magnetic tunnel junction. In some embodiments, the step may be defined by a spacer material, which may also serve to control the slope of the sidewalls of the dielectric layer and a fixed magnetic layer during the production of the device. As a result, an offset field exhibited by the STTM element may be reduced or even eliminated. Devices and systems including such STTM elements are also described.

Description

階梯式磁穿隧接面裝置，形成階梯式磁穿隧接面裝置之方法，及包括階梯式磁穿隧接面之裝置 Stepped magnetic tunneling junction device, method for forming stepped magnetic tunneling junction device, and device including stepped magnetic tunneling interface

本公開主要有關於磁穿隧接面裝置，尤其有關於諸如自旋轉移力矩記憶體(STTM)裝置的記憶體裝置。亦描述形成用於各種終端用途的磁穿隧接面裝置(如STTM元件)的方法，及包括這種磁穿隧接面裝置的裝置。 The present disclosure is primarily directed to magnetic tunneling junction devices, and more particularly to memory devices such as spin transfer torque memory (STTM) devices. Methods of forming magnetic tunnel junction devices (such as STTM components) for various end uses, and devices including such magnetic tunnel junction devices are also described.

磁隨機存取記憶體(MRAM)因為其取代傳統記憶體的潛力而逐漸受到注目。一般而言，MRAM可包括一連串的磁穿隧接面(magnetic tunnel junction；MTJ)，其操作以儲存資訊。這種MTJ一般包括多個層(例如，固定磁層、在固定磁層上的電介質(穿隧)層、及在電介質層上的自由磁層)，這些統一決定裝置的磁行為。 Magnetic random access memory (MRAM) is gaining attention because of its potential to replace traditional memory. In general, an MRAM can include a series of magnetic tunnel junctions (MTJs) that operate to store information. Such MTJs typically include multiple layers (e.g., a fixed magnetic layer, a dielectric (tunneling) layer on the fixed magnetic layer, and a free magnetic layer on the dielectric layer) that collectively determine the magnetic behavior of the device.

自旋轉移力矩記憶體(Spin transfer torque memory；STTM)為一種MRAM記憶體裝置，因其元件的相對小尺寸、其低功率操作的潛力、及與半導體晶片上的其他元件 (如電晶體)直接整合的潛力，而逐漸受到半導體業界的關注。一般而言，可從自旋轉移力矩現象來預測STTM元件/裝置的操作。當電流經過這種裝置的磁化層(其稱為固定磁層)時，電流會在自旋極化狀況下出來。當電流中的每一個電子通過固定磁層時，所產生的自旋(角動量)可被轉移到裝置的另一個磁層(其稱為自由磁層)的磁化，導致自由磁層之磁化的小量改變。實際上，這就是造成自由磁層的磁化進動(precession)之力矩。同樣地，例如因為電子反射的緣故，力矩可能會施加到關連的固定磁層。 Spin Transfer Torque Memory (STTM) is an MRAM memory device due to its relatively small size, its potential for low power operation, and other components on semiconductor wafers. The potential for direct integration (such as transistors) is gradually gaining attention from the semiconductor industry. In general, the operation of the STTM component/device can be predicted from the spin transfer torque phenomenon. When current passes through the magnetization layer of this device (which is called a fixed magnetic layer), the current will come out under spin polarization conditions. When each of the electrons passes through the fixed magnetic layer, the resulting spin (angular momentum) can be transferred to the magnetization of another magnetic layer of the device (which is called the free magnetic layer), resulting in magnetization of the free magnetic layer. A small amount of change. In fact, this is the moment that causes the magnetization precession of the free magnetic layer. Likewise, for example, due to electronic reflection, a moment may be applied to the associated fixed magnetic layer.

最終，當施加的電流(例如，脈衝)超過閾值(其可至少部分由磁性材料及其環境造成的阻尼(damping)界定)時，自由磁層的磁化取向可在與固定磁層的磁化取向平行之狀態和與固定磁層的磁化取向反平行之狀態之間切換。固定磁層的磁化取向維持不受施加電流的改變，例如因施加電流低於固定磁層的閾值及/或因固定磁層的磁化取向被一或更多相鄰的層(如合成反鐵磁層)「釘住(pinned)」。因此，自旋轉移力矩可用來翻轉隨機存取記憶體中的主動元件，諸如STTM裝置。 Finally, when the applied current (eg, pulse) exceeds a threshold (which may be at least partially defined by the damping of the magnetic material and its environment), the magnetization orientation of the free magnetic layer may be parallel to the magnetization orientation of the fixed magnetic layer. The state is switched between a state that is anti-parallel to the magnetization orientation of the fixed magnetic layer. The magnetization orientation of the fixed magnetic layer is maintained independent of the applied current, for example because the applied current is below the threshold of the fixed magnetic layer and/or by one or more adjacent layers due to the magnetization orientation of the fixed magnetic layer (eg, synthetic antiferromagnetic Layer) "pinned". Thus, spin transfer torque can be used to flip active components in random access memory, such as STTM devices.

在如STTM裝置的各種MTJ裝置中的固定磁層在裝置的自由磁層中產生例如垂直及/或水平方向的磁場(主要磁靜場)。當固定磁層的磁化為反平行，在自由層感受到這些層的磁化在某程度上會互相抵消。在理想裝置中，當磁化反平行取向時，這些層的磁化會完全抵消。然而， 在各種真實世界情況中，自由與固定磁層間的場抵消並不完全。在這種情況中，裝置中會存在淨外部場，稱為偏移場(H_offset)。此一偏移場會造成使自由層的磁化因施加的磁場及/或電流而呈現不對稱切換，這在某些應用中(比如在STTM裝置中)並不樂見。 A fixed magnetic layer in various MTJ devices, such as STTM devices, generates magnetic fields (primary magnetic static fields), for example, in the free magnetic layer of the device, such as vertical and/or horizontal. When the magnetization of the fixed magnetic layer is anti-parallel, the magnetization of the layers is felt to cancel each other to some extent in the free layer. In an ideal device, the magnetization of these layers is completely offset when the magnetization is oriented antiparallel. However, in various real world situations, the field cancellation between free and fixed magnetic layers is not complete. In this case, there will be a net external field in the device called the offset field (H _offset ). This offset field causes the magnetization of the free layer to exhibit an asymmetrical switching due to the applied magnetic field and/or current, which is undesirable in certain applications, such as in STTM devices.

201‧‧‧基板 201‧‧‧Substrate

202‧‧‧導電材料 202‧‧‧Electrical materials

203‧‧‧材料堆疊 203‧‧‧Material stacking

204‧‧‧固定磁層 204‧‧‧Fixed magnetic layer

205‧‧‧電介質層 205‧‧‧ dielectric layer

206‧‧‧自由磁層 206‧‧‧Free magnetic layer

207‧‧‧遮罩 207‧‧‧ mask

212‧‧‧側壁 212‧‧‧ side wall

214‧‧‧側壁 214‧‧‧ side wall

215‧‧‧間隔體前導物 215‧‧‧ spacer precursor

215’‧‧‧間隔體 215'‧‧‧ spacer

216‧‧‧側壁 216‧‧‧ side wall

219‧‧‧側壁 219‧‧‧ side wall

220‧‧‧側壁 220‧‧‧ side wall

221‧‧‧側壁 221‧‧‧ side wall

222‧‧‧側壁 222‧‧‧ side wall

290‧‧‧工件 290‧‧‧Workpiece

290’‧‧‧經變更的工件 290'‧‧‧Changed workpiece

291‧‧‧裝置 291‧‧‧ device

300‧‧‧STTM元件/裝置 300‧‧‧STTM components/devices

301‧‧‧第一電極 301‧‧‧First electrode

303‧‧‧取向 303‧‧‧ orientation

305‧‧‧取向 305‧‧‧ Orientation

302‧‧‧第二電極 302‧‧‧second electrode

400‧‧‧電子系統 400‧‧‧Electronic system

402‧‧‧處理器 402‧‧‧Processor

404‧‧‧控制器 404‧‧‧ Controller

406‧‧‧記憶體裝置 406‧‧‧ memory device

410‧‧‧輸入/輸出裝置 410‧‧‧Input/output devices

500‧‧‧運算裝置 500‧‧‧ arithmetic device

502‧‧‧母板 502‧‧‧ Motherboard

506‧‧‧通訊電路 506‧‧‧Communication circuit

請求專利保護之標的物的實施例之特徵及優點可從上述詳細說明並參照圖示變得更為清楚，圖中類似標號描繪類似部件，且其中：第1A及1B圖為形成與本公開的實施例一致之自旋轉移力矩記憶體(STTM)元件之示範方法的操作之流程圖。 The features and advantages of the embodiments of the present invention are described in the accompanying drawings, and the claims A flowchart of the operation of an exemplary method of a spin transfer torque memory (STTM) component consistent with an embodiment.

第2A至2G圖逐步繪示根據形成與本公開的實施例一致之STTM元件的方法之各種操作的剖面圖。 2A through 2G are cross-sectional views showing various operations in accordance with a method of forming an STTM element consistent with embodiments of the present disclosure.

第3圖繪示與本公開的實施例一致之垂直STTM裝置的一範例之剖面圖。 3 is a cross-sectional view showing an example of a vertical STTM device consistent with an embodiment of the present disclosure.

第4圖為與本公開的實施例一致之電子系統的方塊圖。 4 is a block diagram of an electronic system consistent with an embodiment of the present disclosure.

第5圖為與本公開的實施例一致之運算裝置的方塊圖。 Figure 5 is a block diagram of an arithmetic device consistent with an embodiment of the present disclosure.

【發明內容及實施方式】 SUMMARY OF THE INVENTION AND EMBODIMENT

在此描述自旋轉移力矩記憶體(STTM)元件及形成 這種元件的方法。亦描述包括與本公開一致的STTM元件之裝置及系統。注意到為了清楚並易於了解，下列詳細說明將以參考附圖中顯示的例示性實施例之方式進行，以提供其之詳盡理解。然而對此技藝中具有通常知識者顯見地在此所述的技術不限於所示之實施例，而可在其他情境中及/或無所示實施例中包括的某些特定細節下予以實行。也應可理解到圖中所示的各種實施例為例示性實施例且非按比例繪製。 Described herein are spin transfer torque memory (STTM) components and their formation The method of this component. Apparatus and systems including STTM elements consistent with the present disclosure are also described. It is noted that the following detailed description is to be considered as a However, it is obvious to those skilled in the art that the techniques described herein are not limited to the embodiments shown, but may be practiced in other contexts and/or in certain specific details not included in the illustrated embodiments. It should also be understood that the various embodiments shown in the drawings are illustrative and not

注意到在本公開的情境中用於各種實例中的「之上」一詞表示一元件(如第一層)位在另一元件(如第二層)上方，但第一元件不需接觸第二元件。更確切來說，「之上」一詞，當用於兩元件的位置關係情境中時，意指第一元件形成在第二元件上方，但其他(如第三)元件可存在第一與第二元件之間。相反地，「直接在...之上」在此用來表示第一元件與另一元件的表面(例如，上表面)接觸，兩者間並無中介元件。 It is noted that the term "above" used in the various examples in the context of the present disclosure means that one element (such as the first layer) is located above another element (such as the second layer), but the first element does not need to be in contact with Two components. More specifically, the term "above" when used in a positional relationship between two components means that the first component is formed above the second component, but other (eg, third) components may exist first and Between two components. Conversely, "directly on" is used herein to mean that the first element is in contact with the surface (e.g., the upper surface) of another element, with no intervening elements therebetween.

亦注意到在本公開的情境中，用詞「實質上」及「大約」，當與值或值的範圍關聯使用時，意指所指值或所指範圍的端點之加或減5%。當在一元件之取向(如相對於另一元件)的情境中使用這種用詞時，應將其理解為涵蓋所指取向的加或減5度。例如，具有與第二元件的一面「垂直」取向的側壁之第一元件應理解成與第二元件的該面呈90度(垂直)取向。相較之下，具有與第二元件的該面「實質上垂直」取向的側壁之第一元件應理解成相對 於第二元件的該面呈範圍為自約85至約95度的角度取向。 It is also noted that in the context of the present disclosure, the terms "substantially" and "approximately", when used in connection with a range of values or values, mean plus or minus 5% of the endpoints of the indicated or indicated ranges. . When such a term is used in the context of an element (e.g., relative to another element), it should be understood to encompass the addition or subtraction of 5 degrees of the indicated orientation. For example, a first element having a side wall that is "vertically" oriented with one side of the second element is understood to be oriented 90 degrees (vertical) to the face of the second element. In contrast, a first element having a side wall that is "substantially perpendicular" to the face of the second element is to be understood as being The face of the second member is oriented at an angle ranging from about 85 to about 95 degrees.

在許多實例中透過多步驟程序在電介質或其他基板上形成比如STTM元件的MTJ裝置。例如，用於形成STTM元件的一些程序包括在基板上及/或其上的導電元件/層(如存在於電介質基板之上或之中的互連、接合墊、跡線等等)上形成材料堆疊。材料堆疊可包括用於形成STTM元件的各種層。例如，材料堆疊可包括一或更多「固定」磁層、在固定磁層上的一或更多電介質(如穿隧氧化物)、在電介質層上的一或更多「自由」磁層等等。 In many instances, MTJ devices such as STTM components are formed on a dielectric or other substrate through a multi-step process. For example, some of the procedures for forming STTM components include forming materials on and/or on conductive substrates/layers (such as interconnects, bond pads, traces, etc. present on or in a dielectric substrate). Stacking. The stack of materials can include various layers for forming STTM elements. For example, the material stack can include one or more "fixed" magnetic layers, one or more dielectrics on the fixed magnetic layer (eg, tunneling oxide), one or more "free" magnetic layers on the dielectric layer, etc. Wait.

在材料堆疊中亦可包括各種其他層，如此技藝中具有通常知識者可理解者。這種其他層的一範例為針對固定磁層的釘(pinning)層，例如鋪在固定磁層下方的一或更多合成反鐵磁層並用來將固定磁層的磁化釘在一特定取向中。可包括在材料堆疊中的其他層之其他範例包括針對固定及自由磁層的電極(接點)。例如，在一些實施例中，材料堆疊可包括針對固定磁層的第一接觸層，及與自由磁層耦合的第二接觸層。當然，亦可使用各種額外的層。 Various other layers may also be included in the stack of materials, as will be appreciated by those of ordinary skill in the art. An example of such other layers is a pinning layer for a fixed magnetic layer, such as one or more synthetic antiferromagnetic layers laid under a fixed magnetic layer and used to pin the magnetization of the fixed magnetic layer in a particular orientation. . Other examples of other layers that may be included in the stack of materials include electrodes (contacts) for the fixed and free magnetic layers. For example, in some embodiments, the material stack can include a first contact layer for the fixed magnetic layer and a second contact layer coupled to the free magnetic layer. Of course, various additional layers can also be used.

有鑑於前述，在一些程序中，可選擇性移除材料層堆疊的部份以產生具有希望幾何的STTM元件。例如，可選擇性移除自由磁層的區域(如使用蝕刻、微影術或另外適當的程序)而產生具有與第2E圖中所示的結構類似的結構之工件。雖這種程序可成功移除自由磁層的選定部分，自由磁層的側壁相對於裝置的電介質層之面可能並非垂直 取向。 In view of the foregoing, in some procedures, portions of the material layer stack can be selectively removed to produce STTM elements having the desired geometry. For example, regions of the free magnetic layer may be selectively removed (eg, using etching, lithography, or another suitable procedure) to produce a workpiece having a structure similar to that shown in FIG. 2E. Although this procedure can successfully remove selected portions of the free magnetic layer, the sidewalls of the free magnetic layer may not be perpendicular to the surface of the dielectric layer of the device. orientation.

確實，如第2E圖中所示，自由磁層(且在一些實例中，關聯的遮罩)可具有相較於下層電介質層及固定磁層之面呈傾斜的側壁。詳言之，自由磁層可呈現第一坡度，由等式S=h/w界定，其中S為坡度，h為自由磁層的高程增量(相應於其之厚度)，以及w為自由磁層的水平增量並由等式w=w_t-w_b界定，其中w_t為自由磁層上表面的寬度且w_b為自由磁層下表面的寬度。 Indeed, as shown in Figure 2E, the free magnetic layer (and in some examples, the associated mask) may have sidewalls that are inclined relative to the faces of the underlying dielectric layer and the fixed magnetic layer. In particular, the free magnetic layer may exhibit a first slope, defined by the equation S=h/w, where S is the slope, h is the elevation increment of the free magnetic layer (corresponding to its thickness), and w is free magnetic incremental levels layer by the equation w = w _t -w _b defined, where w _t is the width of the upper surface of the free magnetic layer and the width w _b of the free magnetic layer surface.

可接著藉由選擇性移除部分的電介質層及固定磁層來界定STTM元件的其餘部分。例如，可透過蝕刻移除部分的電介質層及固定磁層以在基板表面上產生分離的STTM元件。然而，由於自由磁層的坡度及/或其他原因，電介質層及固定磁層的側壁相對於裝置的面亦可呈傾斜。 The remainder of the STTM element can then be defined by selectively removing portions of the dielectric layer and the fixed magnetic layer. For example, portions of the dielectric layer and the fixed magnetic layer can be removed by etching to create separate STTM elements on the surface of the substrate. However, due to the slope of the free magnetic layer and/or other reasons, the sidewalls of the dielectric layer and the fixed magnetic layer may also be inclined relative to the face of the device.

本發明人觀察到當進行操作來從具有與第2E圖類似的結構之工件選擇性移除部分的電介質層及/或固定磁層，最終結果可為具有包括傾斜側壁之電介質層和固定磁層的裝置。在不希望受理論限制下，咸信這種裝置中固定磁層的已蝕刻側壁可能導致固定磁層中離散磁場，且最終導致呈現相對高偏移場H_offset的裝置。確實，本發明人已觀察到在一些實例中這種操作可能導致一種STTM元件的產生，其呈現範圍在從+/-100至約+/-400奧斯特(Oersted；Oe)的H_offset，比如從約+/-100至約+/-350Oe。如上述，這種偏移場的存在會導致自由層的磁化產生不對稱切換，可對一些應用而言並不樂見。 The inventors have observed that when operating to selectively remove portions of the dielectric layer and/or the fixed magnetic layer from a workpiece having a structure similar to that of FIG. 2E, the end result may be to have a dielectric layer including a slanted sidewall and a fixed magnetic layer. s installation. Without wishing to be bound by theory, it is believed that the etched sidewalls of the fixed magnetic layer in such devices may result in discrete magnetic fields in the fixed magnetic layer, and ultimately result in devices that exhibit a relatively high offset field _Hoffset . Indeed, the inventors have observed that in some instances such an operation may result in the production of an STTM element that exhibits an H _offset ranging from +/- 100 to about +/- 400 Oersted (Oe), For example, from about +/- 100 to about +/- 350 Oe. As noted above, the presence of such an offset field can result in asymmetric switching of the magnetization of the free layer, which may be undesirable for some applications.

有鑑於上述，本公開的一態樣有關用於形成MTJ裝置(比如自旋轉移力矩(STTM)元件)的方法。將可理解到，這種方法對形成MTJ裝置(在各式各樣裝置的情境中比如STTM元件)很有用。例如，在此所述的技術在非依電性記憶體(NVM)、磁隨機存取記憶體(MRAM)、包括但不限於垂直MTJ裝置之磁穿隧接面(MTJ)裝置、STTM裝置(如垂直STTM裝置)、非嵌入式或獨立記憶體裝置、上述的組合、及之類的情境中對形成STTM元件很有用。當然，僅為了示範而列舉這種終端用途，且應了解到在此所述的技術可用於其他裝置的情境中(或其之形成)。 In view of the above, one aspect of the present disclosure relates to a method for forming an MTJ device, such as a spin transfer torque (STTM) component. It will be appreciated that this approach is useful for forming MTJ devices (in the context of a wide variety of devices such as STTM components). For example, the techniques described herein are in non-electrical memory (NVM), magnetic random access memory (MRAM), magnetic tunnel junction (MTJ) devices including, but not limited to, vertical MTJ devices, STTM devices ( Such as vertical STTM devices), non-embedded or stand-alone memory devices, combinations of the above, and the like are useful for forming STTM components. Of course, such end uses are listed for demonstration purposes only, and it should be understood that the techniques described herein can be used in the context of other devices (or their formation).

從上述討論中可理解到，本公開的一些實施例有關於產生呈現少或無偏移場(H_offset)之STTM元件及其他MTJ裝置。將詳細解釋，本公開的技術可透過使用一間隔體來實現那個目標，該間隔體界定在MTJ裝置(如STTM元件)的自由磁層之(諸)側壁與關聯的電介質(穿隧)及/或固定磁層之側壁之間的階梯。在各種實施例中，間隔體可具有補償自由磁層(在一些情況中上覆的硬遮罩層)之側壁的坡度之內斜或其他輪廓，而得以產生具有希望的幾何特徵之界定良好的階梯。尤其，在一些實施例中，在此所述的技術可能產生具有至少約2至約5nm寬或更多的階梯尺寸之MTJ，如下討論。一般而言，H_offset會隨增加的階梯尺寸而減少，最大階梯尺寸受限於給定應用中MTJ之可接受的最大佈局面積。 As can be appreciated from the above discussion, some embodiments of the present disclosure are directed to generating STTM components and other MTJ devices that exhibit less or no offset fields ( _Hoffset ). As will be explained in detail, the techniques of the present disclosure can achieve that goal by using a spacer that defines the sidewall(s) of the free magnetic layer of the MTJ device (eg, STTM component) and associated dielectric (tunneling) and/or Or a step between the sidewalls of the fixed magnetic layer. In various embodiments, the spacers may have internal slopes or other contours that compensate for the slope of the sidewalls of the free magnetic layer (in some cases the overlying hard mask layer) to produce well-defined features with desired geometric features. ladder. In particular, in some embodiments, the techniques described herein may produce MTJs having a step size of at least about 2 to about 5 nm wide or more, as discussed below. In general, the H _offset will decrease with increasing step size, which is limited by the acceptable maximum layout area of the MTJ in a given application.

此外，間隔體的側壁可具有與在這一種裝置中的自由磁層側壁的坡度不同的坡度。例如，在自由磁層之側壁具有正的第一坡度的情況中，間隔體的側壁可具有大於第一坡度的第二坡度，且在一些實例中，趨近正無限大。或者，在自由磁層側壁的第一坡度為負的實例中，間隔體的第二坡度可比第一坡度更負(小於第一坡度)，且在一些實例中可趨近負無限大。換個方式來說，在一些實施例中，間隔體的側壁相對於裝置之電介質層及/或固定磁層的水平面呈垂直或實質上垂直取向，即便自由磁層的側壁相對於裝置之電介質層及/或固定磁層的水平面呈傾斜(亦即，非垂直或實質上垂直)。 Furthermore, the side walls of the spacer may have a different slope than the slope of the free magnetic layer sidewalls in such a device. For example, where the sidewall of the free magnetic layer has a positive first slope, the sidewall of the spacer may have a second slope greater than the first slope, and in some instances, approaching positively infinite. Alternatively, in instances where the first slope of the free magnetic layer sidewall is negative, the second slope of the spacer may be more negative (less than the first slope) than the first slope, and may approach negative infinity in some instances. In another embodiment, in some embodiments, the sidewalls of the spacer are oriented perpendicular or substantially perpendicular to the dielectric layer of the device and/or the horizontal plane of the fixed magnetic layer, even if the sidewalls of the free magnetic layer are opposite to the dielectric layer of the device and / or the horizontal plane of the fixed magnetic layer is inclined (ie, non-vertical or substantially vertical).

茲參考第1A及1B圖，其為根據與本公開一致之形成磁穿隧接面裝置(如STTM元件/裝置)的示範方法之示範操作的流程圖。為了方便並易於了解，將連同第2A至2G圖說明第1A及1B圖之操作，第2A至2G圖步驟化與本公開一致之STTM元件的一非限制性範例的形成。應了解到當然第2A至2G圖為闡述用且在此所述的各種特徵之幾何、比例、及/或大致上的組態僅為示範。確實且此技藝中具有通常知識者可理解到，在此所述的方法可有用地應用至形成各式各樣的MTJ裝置，比如但不限於STTM元件，且不限於具有第2G圖所示的特定組態之裝置的形成。 Reference is made to Figures 1A and 1B, which are flowcharts of exemplary operations of an exemplary method of forming a magnetic tunnel junction device, such as an STTM component/device, consistent with the present disclosure. For convenience and ease of understanding, the operations of Figures 1A and 1B will be described in conjunction with Figures 2A through 2G, which illustrate the formation of a non-limiting example of an STTM element consistent with the present disclosure. It should be understood that the 2A through 2G drawings are merely exemplary for illustrating the geometry, proportions, and/or general configuration of the various features described herein. Indeed, it will be appreciated by those of ordinary skill in the art that the methods described herein can be usefully applied to the formation of a wide variety of MTJ devices, such as but not limited to STTM components, and are not limited to having the FIG. Formation of a specially configured device.

回到第1A圖，方法100可從區塊101開始。方法可進至可選區塊110，依此可提供STTM元件(此後，工 件)的前導物。為了清楚及完整，本公開將進而說明提供具有第2E圖中所示之結構的工件之一非限制性方法的示範操作。然而，應了解到亦可使用具有其他結構的工件，且在此所述的方法對於備置工件的特定方式並無限制，比如連同區塊110及第2A至2D圖於下說明的操作。此外，應了解到在一些實施例中可獲得或否則提供(例如，以預建的形式)工件，藉此免除區塊110的操作之需要。 Returning to Figure 1A, method 100 can begin at block 101. The method can proceed to optional block 110, whereby STTM components can be provided (hereinafter, work The preamble of the piece). For clarity and completeness, the present disclosure will further illustrate exemplary operations for providing a non-limiting method of a workpiece having the structure shown in FIG. 2E. However, it should be understood that workpieces having other configurations can also be used, and the methods described herein are not limited to the particular manner in which the workpieces are placed, such as the operations described below in conjunction with block 110 and Figures 2A through 2D. Moreover, it should be appreciated that the workpiece may be obtained or otherwise provided (e.g., in a pre-built form) in some embodiments, thereby eliminating the need for operation of block 110.

話雖如此，根據選擇性區塊110可提供工件。針對此參考第1B圖，其繪示根據提供工件的一示範方法進行的各種示範操作。如第1B圖中所示，區塊110的操作可從區塊111開始，依此可提供基板。 Having said that, the workpiece can be provided in accordance with the selective block 110. With reference to FIG. 1B, various exemplary operations are performed in accordance with an exemplary method of providing a workpiece. As shown in FIG. 1B, operation of block 110 may begin at block 111, whereby a substrate may be provided.

不限制基板的類型及性質，只要其適合STTM元件的形成及/或支撐。適當基板的非限制性範例包括但不限於電介質基板/層，比如在半導體裝置的各種組件中可見者，例如，互連層、金屬化層上方的凸塊、或其中可使用電介質夾層的其他組件。無限制性地，在一些實施例中，基板可為夾層電介質(ILD)，例如，其可位在或鄰近半導體裝置的一或更多互連中。當然，僅為了示範而列舉這些基板，可使用且本公開設想得到其他適當類型的基板。 The type and nature of the substrate is not limited as long as it is suitable for the formation and/or support of the STTM element. Non-limiting examples of suitable substrates include, but are not limited to, dielectric substrates/layers, such as those found in various components of semiconductor devices, such as interconnect layers, bumps over metallization layers, or other components in which dielectric interlayers may be used. . Without limitation, in some embodiments, the substrate can be an interlayer dielectric (ILD), for example, it can be in or adjacent to one or more interconnects of the semiconductor device. Of course, these substrates are listed for illustrative purposes only, and the present disclosure contemplates other suitable types of substrates.

作為可根據本公開使用的基板之一範例，參考第2A圖，其繪示基板201。將於後說明，基板201可用來支撐STTM元件/裝置的各種元件，包括各種導電元件(如互連、跡線等等)、用於形成磁穿隧接面的材料堆疊等等。注意到為了闡明及便於了解，第2A至2G圖提供在基板 201上單一STTM元件的製造之「放大」圖。然而應了解到，在此所述的技術同樣可應用來製造在基板201上的複數個STTM元件或其他MTJ裝置。此外，應了解到為了清楚且易於了解，將基板201繪製成無形貌(亦即，為扁平)且無其他特徵(如溝、槽等等)。然而，此技藝中具有通常知識者將了解到在此涵蓋這種特徵。 As an example of a substrate that can be used in accordance with the present disclosure, reference is made to FIG. 2A, which illustrates substrate 201. As will be described later, the substrate 201 can be used to support various components of the STTM component/device, including various conductive components (e.g., interconnects, traces, etc.), material stacks used to form the magnetic tunneling junctions, and the like. Note that for clarification and ease of understanding, Figures 2A through 2G are provided on the substrate. A "zoom in" diagram of the manufacture of a single STTM component on 201. It should be understood, however, that the techniques described herein are equally applicable to fabricate a plurality of STTM components or other MTJ devices on substrate 201. Moreover, it should be appreciated that for clarity and ease of understanding, substrate 201 is rendered in an inmorphia (i.e., flat) and has no other features (e.g., grooves, grooves, etc.). However, those of ordinary skill in the art will appreciate that such features are encompassed herein.

回到第1B圖，一旦提供適當的基板，方法可從區塊111進至區塊112。依照區塊112，可形成材料堆疊。如在此所用，「材料堆疊」用來指一系列的層，可後續加以處理來形成MTJ元件/裝置(比如STTM元件/裝置)的全部或一部分。考慮到這一點，本公開將開始說明材料堆疊的一個範例之製造，其可用來形成STTM元件的磁穿隧接面(MTJ)。 Returning to Figure 1B, the method can proceed from block 111 to block 112 once the appropriate substrate is provided. In accordance with block 112, a stack of materials can be formed. As used herein, "material stack" is used to refer to a series of layers that can be subsequently processed to form all or a portion of an MTJ component/device (such as an STTM component/device). With this in mind, the present disclosure will begin to illustrate the fabrication of an example of a material stack that can be used to form a magnetic tunnel junction (MTJ) of an STTM component.

注意到為了闡明並易於了解，說明限於從包括單一固定磁層、單一電介質(如穿隧氧化物)層、及單一自由磁層的材料堆疊製造MTJ。然而應了解到亦可包括額外的層。確實如上所述，在一些實施例中，材料堆疊可包括一或更多額外的層，比如在固定磁層之下的一或更多底層。這種底層可包括，例如，比如合成反鐵磁層之釘層、比如接觸層的電性接點等等、上述之組合、及諸如此類，如熟悉此技藝者所知者。 It is noted that for purposes of illustration and ease of understanding, the description is limited to fabricating MTJs from a stack of materials including a single fixed magnetic layer, a single dielectric (eg, tunneling oxide) layer, and a single free magnetic layer. However, it should be understood that additional layers may also be included. Indeed, as noted above, in some embodiments, the stack of materials can include one or more additional layers, such as one or more underlayers beneath the fixed magnetic layer. Such a bottom layer can include, for example, a nail layer of a synthetic antiferromagnetic layer, an electrical contact such as a contact layer, the like, combinations thereof, and the like, as is known to those skilled in the art.

此外，在一些實施例中(雖未顯示在圖中)，材料堆疊可包括在基板上之導電層、在導電層上之第一接觸層、在第一接觸層上的一或更多底層(如反鐵磁層)、及在底 層上的固定磁層。替代或額外地，材料堆疊亦可包括一或更多覆層，亦即，可形成在MTJ的自由磁層上方的層。這種覆層可包括，例如，如上述的第二接觸層，單獨或結合如熟悉此技藝者所知的其他覆層。同樣地，應了解到在此所述的MTJ之固定磁層、自由磁層、及電介質(如穿隧氧化物)層可各由一或更多層形成。 Moreover, in some embodiments (although not shown), the material stack can include a conductive layer on the substrate, a first contact layer on the conductive layer, one or more underlayers on the first contact layer ( Such as antiferromagnetic layer), and at the bottom A fixed magnetic layer on the layer. Alternatively or additionally, the material stack may also include one or more cladding layers, that is, layers that may be formed over the free magnetic layer of the MTJ. Such a coating may comprise, for example, a second contact layer as described above, alone or in combination with other coatings as known to those skilled in the art. Similarly, it will be appreciated that the fixed magnetic layer, free magnetic layer, and dielectric (e.g., tunnel oxide) layers of the MTJ described herein can each be formed from one or more layers.

因此參照第2B圖，其繪示形成在基板201的上表面上之材料堆疊203的一範例。如所述，材料堆疊203包括固定磁層204、電介質層205、及自由磁層206。在所示實施例中，固定磁層204形成在(如直接形成在)基板201的上方，但如前述其他層(如導電層、第一接觸層、一或更多底層等等)可存在於固定磁層204及基板201的上表面之間。 Thus, referring to FIG. 2B, an example of a material stack 203 formed on the upper surface of the substrate 201 is illustrated. As described, the material stack 203 includes a fixed magnetic layer 204, a dielectric layer 205, and a free magnetic layer 206. In the illustrated embodiment, the fixed magnetic layer 204 is formed (eg, directly formed) over the substrate 201, but other layers (eg, conductive layers, first contact layers, one or more underlayers, etc.) as described above may be present in The magnetic layer 204 is fixed between the upper surface and the upper surface of the substrate 201.

在任何情況中，可由可用於STTM元件中之任何適當的材料形成固定磁層204，並可包括一或多於一層，如先前所述。可用來形成固定磁層的適當材料的非限制性範例包括鈷之磁合金，比如但不限於鈷、鐵、及硼的合金(如CoFeB)、一或多個交替的鐵及鉑層、一或多個交替的鈷(Co)及鉑(Pt)層(Co/Pt)、一或多個交替的鈷鐵合金(CoFe)及Pt層(CoFe/Pt)、一或多個交替的鐵鉑(FePt)合金及Pt層(FePt/Pt)、一或多層的摻雜有摻雜物Y的金屬X，其中x為鐵、鈷、及/或鎳，且Y為硼、磷、碳、或矽、一或更多鐵鉑(FePt)合金層、一或多個交替層的CoFeB及重金屬J，其中J為鎢、鉭 (Ta)、鉬(Mo)、鈮(Nb)、鉻(Cr)、或上述的組合(如(如CoFeB/J/CoFeB)、比如鋱鐵鈷(TbFeCo)、釓鐵鈷(GdFeCo)、上述的組合、及諸如此類之稀土/過渡金屬合金)。 In any event, the fixed magnetic layer 204 can be formed from any suitable material that can be used in the STTM element, and can include one or more layers, as previously described. Non-limiting examples of suitable materials that can be used to form the fixed magnetic layer include cobalt magnetic alloys such as, but not limited to, alloys of cobalt, iron, and boron (such as CoFeB), one or more alternating layers of iron and platinum, or Multiple alternating cobalt (Co) and platinum (Pt) layers (Co/Pt), one or more alternating cobalt iron alloys (CoFe) and Pt layers (CoFe/Pt), one or more alternating iron platinum (FePt) An alloy and a Pt layer (FePt/Pt), one or more layers of a metal X doped with a dopant Y, wherein x is iron, cobalt, and/or nickel, and Y is boron, phosphorus, carbon, or germanium, One or more layers of iron-platinum (FePt) alloy, one or more alternating layers of CoFeB and heavy metals J, wherein J is tungsten, tantalum (Ta), molybdenum (Mo), niobium (Nb), chromium (Cr), or a combination thereof (such as (such as CoFeB/J/CoFeB), such as lanthanum cobalt (TbFeCo), lanthanum cobalt (GdFeCo), the above Combinations, and the like, rare earth/transition metal alloys).

無限制地，在一些實施例中，可從一或更多層的CoFeB形成固定磁層204。在其他實施例中，從包括CoFeB或CoFe之第一層、在第一層上的釕之第二層、及在釕層上的CoFeB之第三層的堆疊形成固定磁層204。在這種實施例中，固定磁層204可為或包括CoFe、釕、及CoFeB的反鐵磁堆疊，其中第二層(亦即釕層)的厚度可為非常特定，例如在約8至約9奈米(nm)範圍中。 Without limitation, in some embodiments, the fixed magnetic layer 204 can be formed from one or more layers of CoFeB. In other embodiments, the fixed magnetic layer 204 is formed from a stack of a first layer comprising CoFeB or CoFe, a second layer of germanium on the first layer, and a third layer of CoFeB on the germanium layer. In such an embodiment, the fixed magnetic layer 204 can be or include an antiferromagnetic stack of CoFe, tantalum, and CoFeB, wherein the thickness of the second layer (ie, the tantalum layer) can be very specific, such as from about 8 to about In the range of 9 nm (nm).

無論其組成或組態為何，可由適合維持固定多數自旋的材料或材料堆疊形成固定磁層204。因此，在一些實施例中，固定磁層204可稱為合成反鐵磁層。例如，在一些實施例中，固定磁層204組態成維持一固定多數自旋，其與基板201的面實質上對齊及/或與基板201的面垂直或實質上垂直。無限制地，在一些實施例中，材料堆疊203用來形成垂直STTM元件，在該情況中，固定磁層204可組態成維持與基板201的面垂直，或更上位地，與STTM元件的面垂直之多數自旋。 Regardless of its composition or configuration, the fixed magnetic layer 204 can be formed from a stack of materials or materials suitable for maintaining a fixed majority of spin. Thus, in some embodiments, the fixed magnetic layer 204 can be referred to as a synthetic antiferromagnetic layer. For example, in some embodiments, the fixed magnetic layer 204 is configured to maintain a fixed majority of spins that are substantially aligned with the face of the substrate 201 and/or perpendicular or substantially perpendicular to the face of the substrate 201. Without limitation, in some embodiments, the material stack 203 is used to form a vertical STTM element, in which case the fixed magnetic layer 204 can be configured to remain perpendicular to the face of the substrate 201, or higher, with the STTM element. The majority of the spins are perpendicular to the surface.

在固定磁層204內的一或更多層的總厚度可隨材料堆疊203中使用的材料應用及性質大幅變化。例如，在一些實施例中，在固定磁層204中層的一或更多者之厚度範圍可為從約3埃至約14埃。在一些實施例中，在固定磁層 內的磁層之總厚度範圍可為從約100至約200埃。 The total thickness of one or more layers within the fixed magnetic layer 204 can vary widely depending on the material application and properties used in the material stack 203. For example, in some embodiments, one or more of the layers in the fixed magnetic layer 204 can range in thickness from about 3 angstroms to about 14 angstroms. In some embodiments, in a fixed magnetic layer The total thickness of the inner magnetic layer can range from about 100 to about 200 angstroms.

在一些實施例中，電介質層205由適合允許有多數自旋之電流通過其同時某程度地阻擋有少數自旋的電流通過之材料構成。因此可將電介質層205理解為一穿隧層，並在此如此指稱。在一些實施例中，電介質層205可為自一或更多氧化物形成的穿隧氧化物層。可用來形成電介質層205之氧化物的非限制性範例包括氧化鎂(MgO)、氧化鋁(Al₂O₃)、氧化銪(EuO)、氧化銪鎂(EuMgO)、硫化銪(EuS)、硒化銪(EuSe)、錳酸鉍(BiMnO₃)、氧化鎳鐵(NiFe₂O₄)、氧化鈷鐵(CoFe₂O₄)、砷化鎵(GaAs)、氧化銪(EuO)、鈦酸鍶(SrTiO₃)、氧化鎂鋁(MgAlO)、上述的組合、及諸如此類。當然，亦可使用其他適當的材料來形成電介質層205。無限制地，在一些實施例中，由MgO形成電介質層205。 In some embodiments, dielectric layer 205 is constructed of a material that is adapted to allow a current with a majority of spins to pass therethrough while blocking the passage of a small number of spins. Dielectric layer 205 can thus be understood as a tunneling layer and is so referred to herein. In some embodiments, dielectric layer 205 can be a tunneling oxide layer formed from one or more oxides. Non-limiting examples of oxides that can be used to form dielectric layer 205 include magnesium oxide (MgO), aluminum oxide (Al ₂ O ₃ ), cerium oxide (EuO), cerium oxide (EuMgO), cerium sulfide (EuS), selenium. EuSe, BiMnO ₃ , NiFe ₂ O ₄ , CoFe ₂ O ₄ , gallium arsenide (GaAs), lanthanum oxide (EuO), barium titanate (SrTiO ₃ ), magnesium aluminum oxide (MgAlO), combinations of the foregoing, and the like. Of course, other suitable materials can also be used to form the dielectric layer 205. Without limitation, in some embodiments, dielectric layer 205 is formed of MgO.

電介質層205的總厚度可隨材料堆疊203中使用的材料應用及性質大幅變化。例如，在一些實施例中，電介質層205的厚度範圍可為從約6埃至約12埃。可理解到，電介質層205的厚度會影響到薄膜的電阻面積產生(RA)，以每平方微米歐姆(Ω/μ²)測量。因此可能需要控制電介質層205的厚度以實現希望的RA，比如從約1至約20Ω/μ²。無限制地，在一些實施例中，電介質層205具有約9埃的厚度。 The overall thickness of the dielectric layer 205 can vary widely with the material application and properties used in the material stack 203. For example, in some embodiments, the dielectric layer 205 can have a thickness ranging from about 6 angstroms to about 12 angstroms. It will be appreciated that the thickness of the dielectric layer 205 affects the resistive area generation (RA) of the film, measured in ohms per square micrometer (Ω/μ ² ). It may therefore be desirable to control the thickness of the dielectric layer 205 to achieve a desired RA, such as from about 1 to about 20 Ω/μ ² . Without limitation, in some embodiments, dielectric layer 205 has a thickness of about 9 angstroms.

材料堆疊203可一般組態成提供平面或垂直STTM元件。取決於希望的組態，可變更固定磁層204及自由磁層 206的組態。無限制地，在一些實施例中，材料堆疊206可組態成提供垂直的STTM元件。針對此，可組態自由磁層使得磁取向的垂直成分相較於層之磁取向的面內(in-plane)成分佔主導地位。例如，當自由磁層為或包括一或更多層的CoFeB合金時，從該層的鐵與電介質層205(如MgO)中的氧相互作用而得的磁化之垂直成分相較於該層中提供的磁化之水平成分佔主導地位。可理解到，在與電介質(MgO)層205接界處自由磁層206中的表面(Fe)原子之氧化程度會導致自由磁層206具有垂直主導的自旋狀態。 Material stack 203 can generally be configured to provide planar or vertical STTM components. The fixed magnetic layer 204 and the free magnetic layer can be changed depending on the desired configuration Configuration of 206. Without limitation, in some embodiments, the material stack 206 can be configured to provide a vertical STTM element. To this end, the free magnetic layer can be configured such that the vertical component of the magnetic orientation dominates the in-plane composition of the magnetic orientation of the layer. For example, when the free magnetic layer is or includes one or more layers of CoFeB alloy, the perpendicular component of the magnetization obtained from the interaction of the iron of the layer with the oxygen in the dielectric layer 205 (eg, MgO) is compared to the layer. The horizontal composition of the magnetization provided is dominant. It will be appreciated that the degree of oxidation of surface (Fe) atoms in the free magnetic layer 206 at the interface with the dielectric (MgO) layer 205 will result in the free magnetic layer 206 having a vertically dominant spin state.

如先前所述，在一些實施例中，一或更多層的CoFeB合金可用來形成自由磁層206。雖然CoFeB在某些應用中特別適當，應了解到可使用其他材料來形成自由磁層206。針對此，可從一或更多層的鈷之磁合金形成自由磁層206，比如但不限於，鈷、鐵、及硼的合金(如CoFeB)、一或多個交替的鐵及鉑層、一或多個交替的鈷(Co)及鉑(Pt)層(Co/Pt)、一或多個交替的鈷鐵合金(CoFe)及Pt層(CoFe/Pt)、一或多個交替的鐵鉑(FePt)合金及Pt層(FePt/Pt)、一或多層的摻雜有摻雜物Y的金屬X，其中x為鐵、鈷、及/或鎳，且Y為硼、磷、碳、或矽、一或更多鐵鉑(FePt)合金層、一或多個交替層的CoFeB及重金屬J，其中J於前文已定義或為其組合(如(如CoFeB/H/CoFeB)、其組合、及諸如此類)。 As previously described, in some embodiments, one or more layers of CoFeB alloy can be used to form the free magnetic layer 206. While CoFeB is particularly suitable for certain applications, it should be understood that other materials may be used to form free magnetic layer 206. To this end, a free magnetic layer 206 may be formed from one or more layers of cobalt magnetic alloy, such as, but not limited to, an alloy of cobalt, iron, and boron (such as CoFeB), one or more alternating layers of iron and platinum, One or more alternating cobalt (Co) and platinum (Pt) layers (Co/Pt), one or more alternating cobalt iron alloys (CoFe) and Pt layers (CoFe/Pt), one or more alternating iron platinum (FePt) alloy and Pt layer (FePt/Pt), one or more layers of metal X doped with dopant Y, where x is iron, cobalt, and/or nickel, and Y is boron, phosphorus, carbon, or矽, one or more iron-platinum (FePt) alloy layers, one or more alternating layers of CoFeB and heavy metals J, where J has been previously defined or a combination thereof (eg (eg CoFeB/H/CoFeB), combinations thereof, And so on).

自由磁層206的一或更多層之厚度可隨材料堆疊203中使用的材料應用及性質大幅變化。例如，在一些實施例中，自由磁層206中的層之一或更多者的厚度範圍可為從約1至約30埃，比如約10至約20埃。 The thickness of one or more layers of free magnetic layer 206 can vary widely depending on the material application and properties used in material stack 203. For example, in some embodiments, one or more of the layers in the free magnetic layer 206 can range in thickness from about 1 to about 30 angstroms, such as from about 10 to about 20 angstroms.

可以任何適當的方式在基板201上形成材料堆疊203的各種層，比如藉由噴濺、物理蒸汽沉積、化學蒸汽沉積、原子層沉積、上述的組合、及諸如此類，如此技藝中具有通常知識者所知。 The various layers of material stack 203 can be formed on substrate 201 in any suitable manner, such as by sputtering, physical vapor deposition, chemical vapor deposition, atomic layer deposition, combinations of the foregoing, and the like, as is conventional in the art. know.

返回第1B圖，一旦已依照區塊112形成材料堆疊，方法可進至區塊113，依其可將自由磁層處理成針對其STTM元件/裝置中之終端用途所希望的幾何。針對此，注意到可採用各式各樣的處理技術來選擇性移除部分的自由磁層而得到希望的幾何。考慮到此點，為了完整性及便於理解，本公開接著將說明透過微影術將材料堆疊203處理成希望的幾何之程序。 Returning to Figure 1B, once the material stack has been formed in accordance with block 112, the method can proceed to block 113, which can process the free magnetic layer into the desired geometry for the end use in its STTM component/device. In view of this, it is noted that a wide variety of processing techniques can be employed to selectively remove portions of the free magnetic layer to achieve the desired geometry. With this in mind, for the sake of completeness and ease of understanding, the present disclosure will next describe a procedure for processing material stack 203 into a desired geometry by lithography.

因此參考第2C至2E圖，其描繪用於處理材料堆疊的自由磁層，尤其自由磁層206，之微影程序的操作。如第2C圖中所示，自由磁層206的程序始於在自由磁層206的上表面上沉積遮罩207。在所示的實施例中，遮罩207顯示成直接形成在自由磁層206的上表面之上。然而應了解到此一組態並非必要，且一或更多夾層(如電性接點、其他層等等)可存在於自由磁層206與遮罩207之間。 Reference is therefore made to Figures 2C to 2E, which depict the operation of a lithography procedure for processing a free magnetic layer of a material stack, particularly a free magnetic layer 206. As shown in FIG. 2C, the process of free magnetic layer 206 begins by depositing a mask 207 on the upper surface of free magnetic layer 206. In the illustrated embodiment, the mask 207 is shown as being formed directly over the upper surface of the free magnetic layer 206. However, it should be understood that this configuration is not necessary and one or more interlayers (e.g., electrical contacts, other layers, etc.) may be present between the free magnetic layer 206 and the mask 207.

遮罩207可由用來例如在後續的蝕刻或其他選擇性移 除程序期間遮蓋自由磁層206的一或更多區域的任何適當材料形成或包括此種材料。無限制地，在一些實施例中，遮罩207為不被後續設計來選擇性移除部分材料堆疊203(尤其部分的自由磁層206)之操作移除之硬遮罩。針對此，在一些實施例中，遮罩207為重金屬硬遮罩，比如形成自或含有鉭、鎢、鉿、鉬、釕、鈦、氮化鈦、氮化鉭、上述之組合及/或合金、及諸如此類之硬遮罩。無限制地，在一些實施例中，遮罩207為鉭硬遮罩。 Mask 207 can be used, for example, for subsequent etching or other selective shifting Any suitable material that covers one or more regions of the free magnetic layer 206 during the process forms or includes such material. Without limitation, in some embodiments, the mask 207 is a hard mask that is not removed by the subsequent design to selectively remove portions of the material stack 203 (particularly a portion of the free magnetic layer 206). In this regard, in some embodiments, the mask 207 is a heavy metal hard mask, such as formed or containing tantalum, tungsten, tantalum, molybdenum, niobium, titanium, titanium nitride, tantalum nitride, combinations and/or alloys thereof , and such hard masks. Without limitation, in some embodiments, the mask 207 is a hard mask.

在沉積遮罩207之後，可將之圖案化(如經由微影或其他程序)以界定自由磁層206之受保護區域(未標示)。例如且如第2D圖中所示，可移除遮罩207的區域使得遮罩207的一部分保留來在後續程序步驟期間保護材料堆疊203的底層區域(且尤其自由磁層206)。 After the mask 207 is deposited, it can be patterned (eg, via lithography or other procedures) to define a protected area (not labeled) of the free magnetic layer 206. For example and as shown in FIG. 2D, the area of the mask 207 can be removed such that a portion of the mask 207 remains to protect the underlying regions of the material stack 203 (and in particular the free magnetic layer 206) during subsequent processing steps.

一旦在自由磁層206的一或更多區域上方已圖案化或以其他方式界定遮罩207，材料堆疊203的處理可接著進行部分自由磁層206之選擇性移除。詳言之，可選擇性移除未受遮罩207保護的自由磁層206之區域。針對此，可以任何適當方式進行自由磁層206之未受保護區域的選擇性移除，比如藉由蝕刻或其他適當的程序。無限制地，在一些實施例中，可透過電漿蝕刻來執行自由磁層206之未受保護區域的選擇性移除，但當然可使用其他選擇性移除程序。例如，可於一些實施例中藉由暴露第2D圖的結構至蝕刻化學來達成自由磁層206之未受保護區域的選擇性移除，該蝕刻化學對遮罩207及電介質層205加以保留 (selective)，亦即，蝕刻自由磁層206的未受保護區域，同時保留遮罩207及電介質層不受影響或實質上不受影響。 Once the mask 207 has been patterned or otherwise defined over one or more regions of the free magnetic layer 206, the processing of the material stack 203 can then proceed with selective removal of the portion of the free magnetic layer 206. In particular, the area of the free magnetic layer 206 that is not protected by the mask 207 can be selectively removed. In this regard, selective removal of the unprotected regions of the free magnetic layer 206 can be performed in any suitable manner, such as by etching or other suitable process. Without limitation, in some embodiments, selective removal of the unprotected regions of the free magnetic layer 206 may be performed by plasma etching, although other selective removal procedures may of course be used. For example, selective removal of unprotected regions of free magnetic layer 206 may be achieved by exposing the structure of the 2D pattern to etch chemistry, which etch etches mask 207 and dielectric layer 205, in some embodiments. Selective, that is, etching the unprotected regions of the free magnetic layer 206 while leaving the mask 207 and the dielectric layer unaffected or substantially unaffected.

在電漿蝕刻的情況中，於這種程序期間，第2D圖的結構可暴露至電漿中的離子。這些離子可接觸材料堆疊203的未受保護區域，藉此移除自由磁層206之未受保護區域。可對程序參數(如時間、溫度等等)進行控制以確保蝕刻止於電介質層205的上表面。作為上述的一替代例，可使用保留電介質層205及遮罩207之濕遮罩，造成自由磁層206之未受保護區域的完全移除。 In the case of plasma etching, the structure of Figure 2D can be exposed to ions in the plasma during such a procedure. These ions can contact the unprotected regions of the material stack 203, thereby removing the unprotected regions of the free magnetic layer 206. Program parameters (such as time, temperature, etc.) can be controlled to ensure that the etch stops at the upper surface of dielectric layer 205. As an alternative to the above, a wet mask that retains the dielectric layer 205 and the mask 207 can be used, resulting in complete removal of the unprotected areas of the free magnetic layer 206.

在任何情況中，自由磁層206的之未受保護區域的選擇性移除可產生具有第2E圖中之結構的工件290。如所示，工件290包括基板201、固定磁層204、電介質層205、自由磁層206、及遮罩207，其中自由磁層206具有小於電介質層205之寬度W2和固定磁層204之寬度W3的寬度W1。針對此，W1可為任何適當的寬度，只要其小於W2及W3。 In any event, selective removal of the unprotected regions of the free magnetic layer 206 can result in a workpiece 290 having the structure of Figure 2E. As shown, the workpiece 290 includes a substrate 201, a fixed magnetic layer 204, a dielectric layer 205, a free magnetic layer 206, and a mask 207, wherein the free magnetic layer 206 has a width W2 that is less than the width of the dielectric layer 205 and a width W3 of the fixed magnetic layer 204. The width of W1. For this, W1 can be any suitable width as long as it is smaller than W2 and W3.

此外且進一步顯示在第2E圖中，自由磁層206及遮罩207可分別具有側壁212及214，兩者之一或兩者都可相對於工件290之面，或更詳言之，相對於電介質層205及/或固定磁層204的面，呈現傾斜。尤其，自由磁層206的側壁212可呈現第一坡度SL₁，其中SL₁=h/w，其中h相應於自由磁層206之厚度，且w相應於自由磁層206在鄰近共同側壁212之上與下表面的寬度間的差異，如第 2E圖中所示。或者，SL1可界定成自由磁層206相對於電介質層205的水平面之側壁的角度。針對此，SL1的範圍可為從約75至小於90度，比如從約80至小於90度，或甚至從約85至小於90度。或者，在一些實施例中，SL1的範圍可為從小於約115至大於90度，小於約100至大於90度，或甚至小於約95至大於90度。 Further, and further shown in FIG. 2E, the free magnetic layer 206 and the mask 207 can have sidewalls 212 and 214, respectively, either or both of which can be opposite the surface of the workpiece 290, or more specifically, relative to The faces of the dielectric layer 205 and/or the fixed magnetic layer 204 exhibit a tilt. In particular, sidewalls 212 of free magnetic layer 206 may exhibit a first slope SL ₁ , where SL ₁ =h/w, where h corresponds to the thickness of free magnetic layer 206 and w corresponds to free magnetic layer 206 adjacent to common sidewall 212 The difference between the widths of the upper and lower surfaces is as shown in Fig. 2E. Alternatively, SL1 can be defined as the angle of the free magnetic layer 206 relative to the sidewall of the horizontal plane of the dielectric layer 205. For this, SL1 can range from about 75 to less than 90 degrees, such as from about 80 to less than 90 degrees, or even from about 85 to less than 90 degrees. Alternatively, in some embodiments, SL1 can range from less than about 115 to greater than 90 degrees, less than about 100 to greater than 90 degrees, or even less than about 95 to greater than 90 degrees.

回到第1A圖，此時可選區塊110的操作可視為完成，且可形成第2E圖中所示之工件290。更詳言之，透過可選區塊110的操作會產生包括基板201、在基板201上之固定磁層204、在固定磁層204上之電介質層205、在電介質層205上之自由磁層206、在自由磁層206上之可選的硬遮罩層207的工件290，其中電介質層具有寬度W2，自由磁層具有寬度W1，且W1<W2。換句話說，已圖案化自由磁層206及可選的硬遮罩層207而暴露電介質層205的上表面之至少一部分。 Returning to Figure 1A, the operation of the optional block 110 can now be considered complete and the workpiece 290 shown in Figure 2E can be formed. More specifically, the operation of the optional block 110 produces a substrate 201, a fixed magnetic layer 204 on the substrate 201, a dielectric layer 205 on the fixed magnetic layer 204, a free magnetic layer 206 on the dielectric layer 205, The workpiece 290 of the optional hard mask layer 207 on the free magnetic layer 206, wherein the dielectric layer has a width W2, the free magnetic layer has a width W1, and W1 < W2. In other words, the free magnetic layer 206 and the optional hard mask layer 207 have been patterned to expose at least a portion of the upper surface of the dielectric layer 205.

在那時候(或若先前已提供工件)，方法可進至區塊120，依其可形成間隔體前導物。針對此，參考第2F圖，其描繪經變更的工件290’之一範例，其包括沉積在電介質層205之暴露的上表面上、自由磁層206及遮罩207之側壁212及214、及遮罩207的上表面上之間隔體前導物215。 At that time (or if a workpiece has been previously provided), the method can proceed to block 120, where a spacer precursor can be formed. To this end, reference is made to FIG. 2F, which depicts an example of a modified workpiece 290' that includes deposition on the exposed upper surface of dielectric layer 205, free magnetic layer 206 and sidewalls 212 and 214 of mask 207, and A spacer precursor 215 on the upper surface of the cover 207.

可使用各式各樣的材料來形成間隔體前導物215。考慮到此點且將於後討論，可選擇間隔體215之材料使其可例如在會導致電介質層205及固定磁層204之區域被移除 的後續處理步驟期間保護遮罩207及自由磁層206。例如，在一些實施例中，選擇間隔體前導物215的材料使其可被用來選擇性移除電介質層205及固定磁層204之區域的濕或乾蝕刻化學各向異性蝕刻。更詳言之，在一些實施例中，可選擇間隔體前導物的材料使其可在垂直方向比在水平方向以更快速度被蝕刻(如透過濕或乾蝕刻化學)。 A wide variety of materials can be used to form the spacer precursor 215. With this in mind and as discussed later, the material of the spacer 215 can be selected such that it can be removed, for example, in areas that would result in the dielectric layer 205 and the fixed magnetic layer 204. The mask 207 and the free magnetic layer 206 are protected during subsequent processing steps. For example, in some embodiments, the material of the spacer precursor 215 is selected such that it can be used to selectively remove the wet or dry etch chemical anisotropic etch of the dielectric layer 205 and regions of the fixed magnetic layer 204. More specifically, in some embodiments, the material of the spacer precursor can be selected such that it can be etched at a faster rate in the vertical direction than in the horizontal direction (e.g., through wet or dry etch chemistry).

考慮到上述，可用來形成間隔體前導物215之適當的材料之非限制範例包括氧化物、氮化物、及氧氮化物，比如但不限於氧化鈦、氮化鈦、氮化鉭、氧氮化矽、氧化矽、二氧化矽、上述之組合、及諸如此類。 In view of the above, non-limiting examples of suitable materials that can be used to form the spacer precursor 215 include oxides, nitrides, and oxynitrides such as, but not limited to, titanium oxide, titanium nitride, tantalum nitride, oxynitridation. Antimony, antimony oxide, antimony oxide, combinations of the foregoing, and the like.

可以任何適當方式在工件290上形成間隔體前導物215。例如，可藉由透過噴濺、物理蒸汽沉積、化學蒸汽沉積、原子層沉積、上述的組合、及諸如此類將材料沉積在工件290上來形成間隔體前導物215。無限制地，在一些實施例中，透過物理蒸汽沉積之噴濺在工件290上形成間隔體前導物215。 The spacer precursor 215 can be formed on the workpiece 290 in any suitable manner. For example, the spacer precursor 215 can be formed by depositing material on the workpiece 290 by sputtering, physical vapor deposition, chemical vapor deposition, atomic layer deposition, combinations of the foregoing, and the like. Without limitation, in some embodiments, the spacer precursor 215 is formed on the workpiece 290 by physical vapor deposition.

在任何情況中，可進行間隔體前導物215的形成，而使材料以非保角方式沉積在工件290的暴露表面上。亦即，可進行間隔體前導物215的形成，而使間隔體材料以不同速度在工件的不同表面上累積。例如，可進行間隔體前導物215的形成，而使間隔體材料在大致水平的表面(如電介質層205之上表面和遮罩207之上表面)比大致垂直的表面(如自由磁層206及遮罩207的側壁)以更快的速度累積。 In any event, the formation of the spacer precursor 215 can be performed while the material is deposited on the exposed surface of the workpiece 290 in a non-conformal manner. That is, the formation of the spacer precursor 215 can be performed while the spacer material accumulates on different surfaces of the workpiece at different speeds. For example, the formation of the spacer precursor 215 can be performed such that the spacer material is on a substantially horizontal surface (such as the upper surface of the dielectric layer 205 and the upper surface of the mask 207) than the substantially perpendicular surface (eg, the free magnetic layer 206 and The side walls of the mask 207 are accumulated at a faster rate.

例如且顯示在第2F圖中，工件290上之間隔體材料的非保角沉積會造成具有不均勻厚度的間隔體前導物215之形成。在一些實施例中且如第2F圖中所示，間隔體前導物215可具有在電介質層的上表面之第一平均厚度a，在遮罩層上表面上的第二平均厚度b，及在遮罩及自由層的側壁上的第三平均厚度c，其中a、b、及c不同。無限制地，在一些實施例中，可進行間隔體材料的非保角沉積，使得第三厚度c小於第二厚度b，其則小於第一厚度a(亦即，其中c<b<a)。 For example and shown in FIG. 2F, the non-conformal deposition of the spacer material on workpiece 290 can result in the formation of spacer precursor 215 having a non-uniform thickness. In some embodiments and as shown in FIG. 2F, the spacer precursor 215 can have a first average thickness a on the upper surface of the dielectric layer, a second average thickness b on the upper surface of the mask layer, and A third average thickness c on the sidewalls of the mask and the free layer, wherein a, b, and c are different. Without limitation, in some embodiments, non-conformal deposition of the spacer material may be performed such that the third thickness c is less than the second thickness b, which is less than the first thickness a (ie, where c < b < a) .

在一些實施例中，第一平均厚度a可界定成，在電介質層205的上表面上方，於第一區域I中間隔體前導物215的平均厚度。相較之下，第二平均厚度b可界定成，在遮罩207的上表面上方，於第二區域II中間隔體前導物215的平均厚度。並且第三平均厚度c可界定成，鄰近自由磁層206及遮罩207之側壁，於第三區域III中間隔體前導物215的平均厚度。無限制地，在一些實施例中，可選擇厚度a、b、及c以提供具有希望寬度之階梯s。 In some embodiments, the first average thickness a can be defined as the average thickness of the spacer precursor 215 in the first region I above the upper surface of the dielectric layer 205. In comparison, the second average thickness b can be defined as the average thickness of the spacer precursor 215 in the second region II above the upper surface of the mask 207. And the third average thickness c can be defined as the average thickness of the spacer precursor 215 in the third region III adjacent to the free magnetic layer 206 and the sidewall of the mask 207. Without limitation, in some embodiments, the thicknesses a, b, and c may be selected to provide a step s having a desired width.

考慮到上述，間隔體前導物215的剖面幾何可隨應用大幅變化，且因此本公開設想到具有各式各樣幾何之間隔體前導物的使用。無限制地，在一些實施例中，間隔體前導物215可具有內斜(re-entrant)剖面幾何，如大致顯示在第2F圖中。可理解到，當間隔體前導物215具有內斜輪廓時，其可包括具有第二坡度SL2之側壁216，第二坡度與電介質層205及遮罩207之側壁212及214的第一坡 度SL1不同。例如且如第2F圖中所示，在一些實施例中，SL2與SL1有相反符號。例如，在SL1為正的情況中(例如在遮罩207及自由磁層206之左側壁的情況下)，SL2可為負的。或者，在SL1為負的情況中(例如在遮罩207及自由磁層206之右側壁的情況下)，SL2可為正的。或者，側壁216可為垂直或實質上垂直，在那個情況中SL2可為或趨近正或負無限大。 In view of the above, the cross-sectional geometry of the spacer precursor 215 can vary widely with the application, and thus the present disclosure contemplates the use of spacer precursors having a wide variety of geometries. Without limitation, in some embodiments, the spacer precursor 215 can have a re-entrant cross-sectional geometry, as generally shown in FIG. 2F. It can be appreciated that when the spacer precursor 215 has an inner oblique profile, it can include a sidewall 216 having a second slope SL2, a second slope and a first slope of the dielectric layer 205 and sidewalls 212 and 214 of the mask 207. Degree SL1 is different. For example and as shown in FIG. 2F, in some embodiments, SL2 and SL1 have opposite signs. For example, in the case where SL1 is positive (eg, in the case of the left side walls of the mask 207 and the free magnetic layer 206), SL2 may be negative. Alternatively, in the case where SL1 is negative (for example, in the case of the right side wall of the mask 207 and the free magnetic layer 206), SL2 may be positive. Alternatively, side wall 216 can be vertical or substantially vertical, in which case SL2 can be either approaching positive or negative infinity.

此時，區塊120之操作可視為完成，且方法100可進至區塊130。依據區塊130，可形成MTJ元件/裝置(如STTM元件/裝置)的其餘部分。針對此，依據區塊130之操作可包括執行蝕刻程序以移除部分的間隔體前導物215，還有電介質層205及固定磁層204的區域。例如，在一些實施例中，第2F圖中所示之結構的工件290’可暴露於濕或乾蝕刻化學，其組態成移除間隔體前導物215、電介質層205、及固定磁層204之區域，同時將在分別鄰近自由磁層206及遮罩207的側壁212及214之肩部區域中的間隔體前導物保留完整。間隔體前導物215的剩餘部分可界定間隔體215’，其則可界定在鄰近與電介質層205之界面的自由磁層206之側壁(例如，在點217)與電介質層205的外緣(如在點218)之間的階梯s，此將於下進一步說明。 At this point, operation of block 120 can be considered complete and method 100 can proceed to block 130. Depending on block 130, the remainder of the MTJ component/device (e.g., STTM component/device) can be formed. To this end, operation in accordance with block 130 may include performing an etch process to remove portions of spacer precursor 215, as well as dielectric layer 205 and regions of fixed magnetic layer 204. For example, in some embodiments, the workpiece 290' of the structure shown in FIG. 2F can be exposed to wet or dry etch chemistry configured to remove the spacer precursor 215, the dielectric layer 205, and the fixed magnetic layer 204. The regions of the spacer are simultaneously intact in the shoulder regions of the sidewalls 212 and 214 adjacent the free magnetic layer 206 and the mask 207, respectively. The remainder of the spacer precursor 215 can define a spacer 215' that can then define a sidewall of the free magnetic layer 206 adjacent to the interface with the dielectric layer 205 (eg, at point 217) and the outer edge of the dielectric layer 205 (eg, The step s between points 218), which will be further explained below.

無限制地，在一些實施例中，對工件290’進行各向異性蝕刻程序，以選擇性移除間隔體前導物215、電介質層205、及固定磁層204的區域。尤其，可組態各向異性蝕 刻程序而使蝕刻垂直進行穿過間隔體前導物215、電介質層205、及固定磁層204的速度大於水平穿過這些元件的速度。例如，在一些實施例中，可藉由將工件290’暴露於濕蝕刻劑來進行各向異性蝕刻，該濕蝕刻劑垂直蝕刻穿過上述結構的速度比其水平蝕刻穿過這種結構的速度大一或若干倍。替代或額外地，可使用離子銑削或另外適合的程序來從工件290’物理性移除部分的間隔體前導物215。 Without limitation, in some embodiments, an anisotropic etch process is performed on the workpiece 290' to selectively remove the spacer precursor 215, dielectric layer 205, and regions of the fixed magnetic layer 204. In particular, configurable anisotropic etching The process is such that the etch passes vertically through the spacer precursor 215, the dielectric layer 205, and the fixed magnetic layer 204 at a faster rate than the level through the elements. For example, in some embodiments, the anisotropic etch can be performed by exposing the workpiece 290' to a wet etchant that is etched vertically through the structure at a faster rate than the level etched through the structure. One or several times. Alternatively or additionally, a portion of the spacer precursor 215 can be physically removed from the workpiece 290&apos; using ion milling or another suitable procedure.

在任何情況中，區塊130之操作的結果可為產生MTJ裝置(如STTM元件/裝置)，其包括界定鄰近自由磁層與電介質層之間的界面之階梯s的間隔體。在一些實例中且將於下說明，間隔體可包括具有坡度SL3的一或更多側壁，其中SL3與自由磁層之側壁的坡度SL1不同。此外，坡度SL3可連帶開展到電介質層及/或固定磁層之側壁。亦即，間隔體之側壁、電介質層及/或固定磁層之側壁亦可具有呈現坡度SL3的側壁。 In any event, the result of the operation of block 130 may be to create an MTJ device (such as an STTM component/device) that includes a spacer that defines a step s adjacent the interface between the free magnetic layer and the dielectric layer. In some examples and as will be explained below, the spacer may include one or more sidewalls having a slope SL3, wherein SL3 is different from the slope SL1 of the sidewall of the free magnetic layer. In addition, the slope SL3 can be carried out to the side walls of the dielectric layer and/or the fixed magnetic layer. That is, the sidewalls of the spacer, the dielectric layer, and/or the sidewalls of the fixed magnetic layer may also have sidewalls that exhibit a slope SL3.

作為可以上述方式產生之MTJ裝置的一範例，參照第2G圖。如所示，第2G圖描繪MTJ裝置291(如STTM元件/裝置)，其包括基板201、在基板201上之固定磁層204、在固定磁層204上之電介質層205、在電介質層205上之自由磁層206、在自由磁層206上之遮罩207。此外，裝置291包括間隔體215’，其沉積在肩部區域A1(例如，分別鄰近自由磁層206及遮罩207之側壁212及214)。 As an example of the MTJ device which can be produced in the above manner, reference is made to the 2Gth diagram. As shown, FIG. 2G depicts an MTJ device 291 (eg, an STTM component/device) that includes a substrate 201, a fixed magnetic layer 204 on the substrate 201, a dielectric layer 205 on the fixed magnetic layer 204, and a dielectric layer 205. The free magnetic layer 206, the mask 207 on the free magnetic layer 206. In addition, device 291 includes a spacer 215' that is deposited in shoulder region A1 (e.g., adjacent to free magnetic layer 206 and sidewalls 212 and 214 of mask 207, respectively).

進一步顯示在第2G圖中，間隔體215’可界定鄰近自 由磁層206及電介質層205之底表面之間的界面之階梯s。詳言之，間隔體215’可界定從在鄰近自由磁層206之下表面的側壁212上之點217延伸到在電介質層205的側壁220之外緣鄰近其之上表面的點218之階梯。如進一步顯示，階梯s可貫徹到固定磁層204，亦即，使得固定磁層204的側壁221與電介質層205的側壁220對齊或實質上對齊。 Further shown in the 2G diagram, the spacer 215' can be defined adjacent to A step s from the interface between the magnetic layer 206 and the bottom surface of the dielectric layer 205. In particular, the spacer 215' can define a step extending from a point 217 on the sidewall 212 adjacent the lower surface of the free magnetic layer 206 to a point 218 adjacent the outer surface of the sidewall 220 of the dielectric layer 205. As further shown, the step s can be implemented to the fixed magnetic layer 204, i.e., such that the sidewalls 221 of the fixed magnetic layer 204 are aligned or substantially aligned with the sidewalls 220 of the dielectric layer 205.

階梯s之一項功能可為補償可能由固定磁層204產生的離散場。針對此，階梯s之寬度可能會影響這種離散場的大小。因此希望可將階梯s的寬度控制在希望的值。考慮到這點，階梯s的寬度可隨應用、裝置291的幾何、電介質層205及/或固定磁層204的組成、或上述的組合大幅變化。話雖如此，在一些實施例中，階梯s的寬度範圍可為從大於0至約15nm，比如約1至約10nm，約2至約7.5nm，或甚至約5至約7.5nm。在一些實施例中，階梯s之寬度約為5nm。 One function of the step s may be to compensate for discrete fields that may be generated by the fixed magnetic layer 204. For this, the width of the step s may affect the size of this discrete field. It is therefore desirable to control the width of the step s to a desired value. With this in mind, the width of the step s can vary widely depending on the application, the geometry of the device 291, the composition of the dielectric layer 205 and/or the fixed magnetic layer 204, or a combination of the above. Having said that, in some embodiments, the width of the step s can range from greater than 0 to about 15 nm, such as from about 1 to about 10 nm, from about 2 to about 7.5 nm, or even from about 5 to about 7.5 nm. In some embodiments, the width of the step s is about 5 nm.

如第2G圖中進一步顯示，間隔體215’可包括在鄰近自由磁層206之側壁212的區域中呈垂直或實質上垂直取向的側壁219。替代或額外地，側壁219可具有相對於固定磁層204之面的坡度SL3，其中該坡度代表垂直或實質上垂直取向(例如，為或趨近正或負無限大，或換言之，相對於電介質層205之水平面為實質上90度)。考慮到此，在一些實施例中，電介質層205及固定磁層204之側壁220及221可具有與SL3相同或實質上相同的坡度(未 標示)，儘管相對於基板201、固定磁層204、或電介質層205的面。 As further shown in FIG. 2G, the spacers 215' can include sidewalls 219 that are oriented vertically or substantially vertically in regions adjacent the sidewalls 212 of the free magnetic layer 206. Alternatively or additionally, the sidewall 219 may have a slope SL3 relative to the face of the fixed magnetic layer 204, wherein the slope represents a vertical or substantially vertical orientation (eg, toward or toward positive or negative infinity, or in other words, relative to the dielectric The level of layer 205 is substantially 90 degrees). In view of this, in some embodiments, the sidewalls 220 and 221 of the dielectric layer 205 and the fixed magnetic layer 204 may have the same or substantially the same slope as the SL3 (not Marked), although relative to the substrate 201, the fixed magnetic layer 204, or the face of the dielectric layer 205.

在一些實施例中，在此所述之MTJ裝置(如MTJ裝置291)可呈現無偏移場H_offset，或呈現相對低的H_offset。例如，在一些實施例中，MTJ裝置291可呈現小於約100Oe的偏移場，比如小於約50Oe，小於約25Oe，或甚至約0Oe。無限制地，在一些實施例中，在此所述之MTJ裝置呈現0Oe的H_offset。 In some embodiments, the MTJ device (eg, MTJ device 291) described herein may exhibit an offset-free field _Hoffset or exhibit a relatively low _Hoffset . For example, in some embodiments, the MTJ device 291 can exhibit an offset field of less than about 100 Oe, such as less than about 50 Oe, less than about 25 Oe, or even about 0 Oe. Without limitation, in some embodiments, the MTJ device described herein exhibits an H _{offset of} 0 Oe .

返回第1A圖，在產生與第2G圖一致的結構後，方法100可從區塊130進至區塊140並結束。 Returning to FIG. 1A, after generating a structure consistent with the 2G map, method 100 can proceed from block 130 to block 140 and end.

本公開的另一態樣有關於包括一或更多STTM元件之STTM裝置，比如具有如上述第2G圖中所示之結構的那些。注意到雖然本公開專注於垂直STTM裝置及元件，亦可設想得到水平或平面STTM元件/裝置。 Another aspect of the present disclosure pertains to STTM devices including one or more STTM elements, such as those having the structure shown in Figure 2G above. It is noted that while the present disclosure focuses on vertical STTM devices and components, horizontal or planar STTM components/devices are also contemplated.

針對此參考第3圖，其繪示與本公開一致之STTM元件/裝置的一範例。如所示，STTM元件/裝置300可包括材料堆疊(未標示)，其可形成在基板(為了清楚而無圖示)上。如所示，材料堆疊可包括固定磁層204、在固定磁層204上之電介質層205、在電介質層205上之自由磁層206、及在自由磁層206上之遮罩207。另外，STTM元件/裝置300可包括位在區域A1，亦即鄰近自由磁層206及遮罩207之側壁的間隔體215’。間隔體215’可界定一階梯s，如先前所述。另外，間隔體215’可包括具有與自由磁層206之側壁212的坡度SL1不同之坡度SL3的 側壁222，如先前所述。不重複這些層的本質及特性之詳細說明，因先前已連同第2G圖說明。 With reference to FIG. 3, an example of an STTM component/device consistent with the present disclosure is illustrated. As shown, the STTM component/device 300 can include a stack of materials (not labeled) that can be formed on a substrate (not shown for clarity). As shown, the material stack can include a fixed magnetic layer 204, a dielectric layer 205 on the fixed magnetic layer 204, a free magnetic layer 206 on the dielectric layer 205, and a mask 207 on the free magnetic layer 206. Additionally, the STTM component/device 300 can include a spacer 215' positioned in region A1, i.e., adjacent to the free magnetic layer 206 and the sidewall of the mask 207. Spacer 215' can define a step s as previously described. Additionally, the spacer 215' may include a slope SL3 having a slope SL1 different from the slope SL1 of the sidewall 212 of the free magnetic layer 206. Side wall 222, as previously described. A detailed description of the nature and characteristics of these layers is not repeated as previously described in connection with Figure 2G.

如上述，固定磁層204可具有釘在與基板201的面垂直之方向中的磁取向。此概念顯示於第3圖中，其中以和基板201的面垂直導向之箭頭顯示固定磁層之磁化的取向305。如前述且熟悉STTM裝置之技術者可了解到，自由磁層206可具有也和基板201的面垂直之磁化的取向303，但其可與固定磁層204之磁化取向305平行或反平行對齊。如第3圖中所示，當自由磁層206之磁化的取向303與自由磁層206之磁化的取向305平行對齊時，元件/裝置300可在低電阻狀態中，亦即其中電子可較輕易地穿隧通過電介質層205的狀態。然而，在取向303與取向305反平行對齊的實例中，元件300可在高電阻狀態中，亦即其中電子較難以穿隧通過電介質層205的狀態。 As described above, the fixed magnetic layer 204 may have a magnetic orientation that is nailed in a direction perpendicular to the face of the substrate 201. This concept is shown in Figure 3, in which the arrow oriented perpendicular to the face of the substrate 201 shows the orientation 305 of the magnetization of the fixed magnetic layer. As will be appreciated by those skilled in the art and familiar with the STTM device, the free magnetic layer 206 can have a magnetized orientation 303 that is also perpendicular to the face of the substrate 201, but can be aligned parallel or anti-parallel to the magnetization orientation 305 of the fixed magnetic layer 204. As shown in FIG. 3, when the orientation 303 of the magnetization of the free magnetic layer 206 is aligned in parallel with the orientation 305 of the magnetization of the free magnetic layer 206, the component/device 300 can be in a low resistance state, ie, where electrons can be easily The state of tunneling through the dielectric layer 205. However, in an example where orientation 303 is aligned anti-parallel to orientation 305, element 300 can be in a high resistance state, ie, a state in which electrons are more difficult to tunnel through dielectric layer 205.

與先前說明一致，雖在第3圖中未顯示，材料堆疊可包括在自由磁層206、固定磁層204、或兩者之上方及/或之下方的額外層。例如，在一些實施例中，將鉭之第一接點(電極)形成為在固定磁層204下方的層，且將鉭之第二接點(電極)形成為在自由磁層206上方的層。替代或額外地，在一些實施例中，在固定磁層204下方形成合成反鐵磁層。 Consistent with the previous description, although not shown in FIG. 3, the material stack can include additional layers above and/or below the free magnetic layer 206, the fixed magnetic layer 204, or both. For example, in some embodiments, the first contact (electrode) of the crucible is formed as a layer below the fixed magnetic layer 204, and the second contact (electrode) of the crucible is formed as a layer above the free magnetic layer 206. . Alternatively or additionally, in some embodiments, a synthetic antiferromagnetic layer is formed beneath the fixed magnetic layer 204.

如第3圖中進一步顯示，在一些實施例中，第一電極301(如第一跡線)可用來耦合自由磁層206，例如至比如電壓來源的另一組件。類似地，第二電極302(如第二 跡線)可用來耦合導電材料202，例如以電性耦合固定磁層至另一組件。透過第一及第二電極301及302，可施加電壓至裝置/元件300，使得取向303從與取向305平行的方向切換到與取向305反平行的方向，且反之亦然。 As further shown in FIG. 3, in some embodiments, a first electrode 301 (such as a first trace) can be used to couple the free magnetic layer 206, such as to another component such as a voltage source. Similarly, the second electrode 302 (such as the second The traces can be used to couple the conductive material 202, for example to electrically couple the magnetic layer to another component. Through the first and second electrodes 301 and 302, a voltage can be applied to the device/element 300 such that the orientation 303 switches from a direction parallel to the orientation 305 to a direction anti-parallel to the orientation 305, and vice versa.

第4圖繪示根據本公開的實施例之電子系統400的區塊圖。電子系統400可相應於，例如，可攜式系統、電腦系統、處理控制系統、或使用處理器及關聯的記憶體之任何其他系統。電子系統400可包括，例如，處理器402、控制器404、記憶體裝置406、及輸入/輸出裝置(I/O)410。雖系統400在第4圖繪成具有有限的組件，應了解到其可包括複數個處理器、記憶體裝置、控制器、I/O及可在積體電路中見到的其他元件。在一些實施例中，系統400可組態成執行指令，其界定將由處理器402對資料執行之操作，還有在處理器402、記憶體裝置406、控制器404、及/或I/O 410之間的其他異動。 FIG. 4 illustrates a block diagram of an electronic system 400 in accordance with an embodiment of the present disclosure. Electronic system 400 may correspond to, for example, a portable system, a computer system, a process control system, or any other system that uses a processor and associated memory. Electronic system 400 can include, for example, processor 402, controller 404, memory device 406, and input/output device (I/O) 410. Although system 400 is depicted in FIG. 4 as having a limited number of components, it should be understood that it can include a plurality of processors, memory devices, controllers, I/O, and other components that can be seen in integrated circuits. In some embodiments, system 400 can be configured to execute instructions that define operations to be performed by processor 402 on data, as well as at processor 402, memory device 406, controller 404, and/or I/O 410. Other changes between.

一般而言，控制器404可藉由循環經過會使指令從記憶體裝置406被擷取並執行之一系列操作來協調控制器404、記憶體裝置406、及I/O 410之操作。針對此，記憶體裝置406可包括STTM元件及/或裝置，比如上述那些。在一些實施例中，記憶體裝置406包括複數個面內或垂直STTM元件。替代或額外地，可將與本公開一致的一或更多STTM元件/裝置嵌入處理器402、控制器404、及/或IO 410中，例如本地記憶體。 In general, controller 404 can coordinate the operation of controller 404, memory device 406, and I/O 410 by looping through instructions that cause instructions to be fetched from memory device 406 and perform a series of operations. In this regard, memory device 406 can include STTM elements and/or devices, such as those described above. In some embodiments, memory device 406 includes a plurality of in-plane or vertical STTM elements. Alternatively or additionally, one or more STTM elements/devices consistent with the present disclosure may be embedded in processor 402, controller 404, and/or IO 410, such as local memory.

本公開的另一態樣有關包括與本公開一致的STTM元 件/裝置之運算裝置。針對此，參照第5圖，其繪示根據本公開的各種實施例之運算裝置500。如所示，運算裝置500包括母板502，其可包括各種組件，比如但不限於處理器504、通訊電路(COMMS)506、其之任何或全部可與物理或電子耦合。 Another aspect of the disclosure relates to including STTM elements consistent with the present disclosure. The operating device of the device/device. To this end, reference is made to FIG. 5, which illustrates an arithmetic device 500 in accordance with various embodiments of the present disclosure. As shown, computing device 500 includes a motherboard 502 that can include various components such as, but not limited to, processor 504, communication circuitry (COMMS) 506, any or all of which can be physically or electronically coupled.

取決於其應用，運算裝置500亦可包括其他組件，比如但不限於依電性記憶體(如DRAM)、非依電性記憶體(如ROM)、快閃記憶體、圖形處理器、數位信號處理器、密碼處理器、晶片組、天線、顯示器、觸碰螢幕控制器、電池、各種編解碼器、各種感測器(如全球定位系統(GPS)、加速度計、陀螺儀等等)、一或更多揚聲器、相機、及/或大量儲存裝置。 The computing device 500 may also include other components such as, but not limited to, an electrical memory (such as DRAM), a non-volatile memory (such as a ROM), a flash memory, a graphics processor, and a digital signal, depending on its application. Processor, cryptographic processor, chipset, antenna, display, touch screen controller, battery, various codecs, various sensors (such as global positioning system (GPS), accelerometer, gyroscope, etc.), one Or more speakers, cameras, and/or mass storage devices.

COMMS 506可組態成致能資料往返運算裝置500之有線或無線通訊。在一些實施例中，COMMS 506可組態成致能透過若干無線標準或協定的無線通訊，包括但不限於Wi-Fi(IEEE 802.11系列)、WiMAX(IEEE 802.16系列)、IEEE 802.20、長期演進(LTE)、Ev-DO、HSPA+、HSDPA+、HSUPA+、EDGE、GSM、GPRS、CDMA、TDMA、DECT、藍芽、上述之衍生標準/協定，或有指定為3G、4G、5G及更新者的任何其他無線協定。 The COMMS 506 can be configured to enable wired or wireless communication of the data round-trip computing device 500. In some embodiments, the COMMS 506 can be configured to enable wireless communication over a number of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 series), WiMAX (IEEE 802.16 series), IEEE 802.20, Long Term Evolution ( LTE), Ev-DO, HSPA+, HSDPA+, HSUPA+, EDGE, GSM, GPRS, CDMA, TDMA, DECT, Bluetooth, derivative standards/agreements mentioned above, or any other specified as 3G, 4G, 5G and newer Wireless agreement.

在可存在於運算裝置500的各種組件中之積體電路晶片中可包括STTM元件/裝置。例如，在一些實施例中，處理器504可包括積體電路晶片，其包括一或更多記憶體裝置，比如在此所述之一或更多STTM元件/裝置。同樣 地，COMMS 506可包括積體電路晶片，其可包括與本公開一致的一或更多STTM元件/裝置。此外，運算裝置500的各種其他記憶體(如DRAM、ROM、大量儲存裝置等等)可由與本公開一致的STTM元件/裝置組成或包括這種元件/裝置。 STTM elements/devices may be included in an integrated circuit die that may be present in various components of computing device 500. For example, in some embodiments, processor 504 can include an integrated circuit die that includes one or more memory devices, such as one or more STTM components/devices described herein. same The COMMS 506 can include integrated circuit chips that can include one or more STTM elements/devices consistent with the present disclosure. Moreover, various other memories of computing device 500 (e.g., DRAM, ROM, mass storage devices, etc.) may be comprised of or include such STTM components/devices consistent with the present disclosure.

運算裝置500可為任何或各式各樣的運算裝置，包括但不限於，膝上型電腦、上網本(netbook)電腦、筆記型電腦、超輕薄電腦(ultrabook)、智慧型電話、平板電腦、個人數位助理(PDA)、超行動PC、行動電話、桌上型電腦、伺服器、印表機、掃描器、監視器、機上盒、娛樂控制單元、數位相機、可攜式音樂播放器、或數位視頻記錄器、上述之組合、及諸如此類。當然僅為了範例而列舉這些裝置，且運算裝置500可為任何適當類型的行動或固定的電子裝置。 The computing device 500 can be any or a variety of computing devices including, but not limited to, a laptop, a netbook computer, a notebook computer, an ultrabook, a smart phone, a tablet, an individual. Digital Assistant (PDA), Ultra Mobile PC, Mobile Phone, Desktop, Server, Printer, Scanner, Monitor, Set-top Box, Entertainment Control Unit, Digital Camera, Portable Music Player, or Digital video recorders, combinations of the above, and the like. These devices are of course listed for purposes of example only, and computing device 500 can be any suitable type of mobile or fixed electronic device.

從上述可知，在此所述之技術可致能STTM元件/裝置之生產，以及包括這種組件的積體電路，其中打斷在STTM元件/裝置的側壁上再沉積層之電性連續性。依此方式，在此所述之技術可致能且/或促成STTM元件/裝置之大量生產，同時減少或甚至避免因再沉積層的存在而導致的電性短路。 From the foregoing, it will be appreciated that the techniques described herein enable the production of STTM components/devices, as well as integrated circuits including such components, in which electrical continuity of the redeposited layer on the sidewalls of the STTM component/device is interrupted. In this manner, the techniques described herein can enable and/or facilitate mass production of STTM components/devices while reducing or even avoiding electrical shorts due to the presence of redeposited layers.

額外的實施例 Additional embodiment

下列範例代表本公開之額外非限制性實施例。 The following examples represent additional non-limiting embodiments of the present disclosure.

範例1：根據此範例，提供一種形成自旋轉移力矩記 憶體(STTM)元件之方法，包括：提供包括基板及在該基板上的材料堆疊之工件，該材料堆疊界定磁穿隧接面(MTJ)，其包括固定磁層、在固定磁層上的電介質層、及在電介質層上的自由磁層，其中在該工件中該自由磁層具有第一寬度W1，該電介質層具有第二寬度W2，且W1<W2，而得以暴露電介質層的上表面之至少一部分且該自由磁層包括具有相對於該電介質層的一平面之第一坡度SL1的至少一個側壁；在該工件的該電介質層與該自由磁層上沉積間隔體材料，來形成非保角間隔體前導物；及至少部分藉由選擇性移除該非保角間隔體前導物的至少一部分、該電介質層的至少一部分、及該固定磁層的至少一部分來形成包括階梯的STTM元件，其中該階梯延伸於鄰近該自由磁層的側壁與底表面之界面的第一點至在該STTM元件中該電介質層的上表面之外緣的第二點之間。 Example 1: According to this example, a spin torque shifting A method of a memory (STTM) component, comprising: providing a workpiece comprising a substrate and a stack of materials on the substrate, the material stack defining a magnetic tunneling interface (MTJ) comprising a fixed magnetic layer on the fixed magnetic layer a dielectric layer, and a free magnetic layer on the dielectric layer, wherein the free magnetic layer has a first width W1 in the workpiece, the dielectric layer having a second width W2, and W1 < W2, to expose an upper surface of the dielectric layer At least a portion of the free magnetic layer includes at least one sidewall having a first slope SL1 with respect to a plane of the dielectric layer; a spacer material is deposited on the dielectric layer of the workpiece and the free magnetic layer to form a non-guaranteed An angular spacer precursor; and at least partially forming an STTM element comprising a step by selectively removing at least a portion of the non-conformal spacer precursor, at least a portion of the dielectric layer, and at least a portion of the fixed magnetic layer, wherein The step extends between a first point adjacent the interface of the sidewall of the free magnetic layer and the bottom surface to a second point of the outer edge of the upper surface of the dielectric layer in the STTM element.

範例2：此範例包括範例1之任何或全部的元件，其中該間隔體材料的剩餘部分界定在該STTM元件中的該階梯。 Example 2: This example includes any or all of the elements of Example 1, wherein the remainder of the spacer material defines the step in the STTM element.

範例3：此範例包括範例1之任何或全部的元件，其中該SL1相對於該電介質層的該平面為非垂直。 Example 3: This example includes any or all of the elements of Example 1, wherein the SL1 is non-perpendicular to the plane of the dielectric layer.

範例4：此範例包括範例1之任何或全部的元件，其中：該非保角間隔體前導物具有，在該電介質層的該上表面上方之區域中的第一平均厚度a，在該自由磁層的上表面上方之區域中的第二平均厚度b，及在該自由磁層的該些側壁上之第三平均厚度c；其中a、b、及c不相同。 Example 4: This example includes any or all of the elements of Example 1, wherein: the non-conformal spacer precursor has a first average thickness a in a region above the upper surface of the dielectric layer, in the free magnetic layer a second average thickness b in the region above the upper surface, and a third average thickness c on the sidewalls of the free magnetic layer; wherein a, b, and c are different.

範例5：此範例包括範例4之任何或全部的元件，其中c<a<b。 Example 5: This example includes any or all of the elements of Example 4, where c < a < b.

範例6：此範例包括範例1至5之任何者的任何或全部的元件，其中：該工件進一步包含設置在該自由磁層上的硬遮罩層；及沉積該間隔體材料使得該非保角間隔體前導物的至少一部分在該硬遮罩層的上表面上。 Example 6: This example includes any or all of the elements of any of Examples 1 to 5, wherein: the workpiece further comprises a hard mask layer disposed on the free magnetic layer; and depositing the spacer material such that the non-conformal spacing At least a portion of the body precursor is on the upper surface of the hard mask layer.

範例7：此範例包括範例6之任何或全部的元件，其中該間隔體材料的剩餘部分界定在該STTM元件中的該階梯。 Example 7: This example includes any or all of the elements of Example 6, wherein the remainder of the spacer material defines the step in the STTM element.

範例8：此範例包括範例7之任何或全部的元件，其中該間隔體材料的該剩餘部分之上表面與該硬遮罩層的上表面實質上共面。 Example 8: This example includes any or all of the elements of Example 7, wherein the upper surface of the remainder of the spacer material is substantially coplanar with the upper surface of the hard mask layer.

範例9：此範例包括範例1至8之任何者的任何或全部的元件，其中介於該些第一及第二點之間的該階梯寬度之範圍為從大於0至約15奈米(nm)。 Example 9: This example includes any or all of the elements of any of Examples 1-8, wherein the step width between the first and second points ranges from greater than 0 to about 15 nm (nm) ).

範例10：此範例包括範例9之任何或全部的元件，其中介於該些第一及第二點之間的該階梯寬度之範圍為從大於0至約10nm。 Example 10: This example includes any or all of the elements of Example 9, wherein the step width between the first and second points ranges from greater than 0 to about 10 nm.

範例11：此範例包括範例1至10之任何者的任何或全部的元件，其中該非保角間隔體前導物具有內斜剖面輪廓。 Example 11: This example includes any or all of the elements of any of Examples 1 through 10, wherein the non-conformal spacer precursor has an internal oblique profile.

範例12：此範例包括範例1至10之任何者的任何或全部的元件，其中相對於該電介質層的水平面，SL1的範圍為從約70到少於90度。 Example 12: This example includes any or all of the elements of any of Examples 1 to 10, wherein SL1 ranges from about 70 to less than 90 degrees with respect to the horizontal plane of the dielectric layer.

範例13：此範例包括範例12之任何或全部的元件，其中：該間隔體材料的剩餘部分界定該階梯，該剩餘部分包含至少一個側壁，其具有相對於該電介質層的該水平面之第二坡度SL2；及SL2>SL1。 Example 13: This example includes any or all of the elements of Example 12, wherein: the remainder of the spacer material defines the step, the remaining portion comprising at least one sidewall having a second slope relative to the horizontal plane of the dielectric layer SL2; and SL2>SL1.

範例14：此範例包括範例13之任何或全部的元件，其中相對於該電介質層的水平面，SL2的範圍為從約85到90度。 Example 14: This example includes any or all of the elements of Example 13, wherein SL2 ranges from about 85 to 90 degrees with respect to the horizontal plane of the dielectric layer.

範例15：此範例包括範例14之任何或全部的元件，其中相對於該電介質層的水平面，SL2為90度。 Example 15: This example includes any or all of the elements of Example 14, wherein SL2 is 90 degrees relative to the horizontal plane of the dielectric layer.

範例16：此範例包括範例1至15之任何者的任何或全部的元件，其中該STTM元件呈現小於約100奧斯特(oersted；Oe)之偏移場H_Offset。 Example 16: This example includes any or all of the elements of any of Examples 1 through 15, wherein the STTM element exhibits an offset field H _{Offset of} less than about 100 Oersted (Oe).

範例17：此範例包括範例16之任何或全部的元件，其中H_Offset小於約50Oe。 Example 17: This example includes any or all of the elements of Example 16, where H _{Offset is} less than about 50 Oe.

範例18：此範例包括範例17之任何或全部的元件，其中H_Offset為0Oe。 Example 18: This example includes any or all of the elements of Example 17, where H _Offset is 0Oe.

範例19：此範例包括範例1至18之任何者的任何或全部的元件，其中該MTJ為垂直MTJ。 Example 19: This example includes any or all of the elements of any of Examples 1 through 18, wherein the MTJ is a vertical MTJ.

範例20：根據此範例，提供一種包括自旋轉移力矩記憶體(STTM)元件之積體電路裝置，該STTM元件包括：基板；及在該基板上的材料堆疊，該材料堆疊界定磁穿隧接面(MTJ)，其包括固定磁層、在固定磁層上的電介質層、及在電介質層上的自由磁層；其中：該自由磁層具有第一寬度W1，該電介質層具有第二寬度W2，且W1 <W2；該自由磁層包含具有相對於該電介質層的一平面之第一坡度SL1的至少一個側壁；及該MTJ包括一階梯，其延伸於鄰近該自由磁層的側壁與底表面之界面的第一點至在該STTM元件中該電介質層的上表面之外緣的第二點之間。 Example 20: According to this example, there is provided an integrated circuit device including a spin transfer torque memory (STTM) device, the STTM device comprising: a substrate; and a material stack on the substrate, the material stack defining a magnetic tunneling a surface (MTJ) comprising a fixed magnetic layer, a dielectric layer on the fixed magnetic layer, and a free magnetic layer on the dielectric layer; wherein: the free magnetic layer has a first width W1, the dielectric layer having a second width W2 And W1 <W2; the free magnetic layer includes at least one sidewall having a first slope SL1 with respect to a plane of the dielectric layer; and the MTJ includes a step extending adjacent to an interface between a sidewall and a bottom surface of the free magnetic layer The first point is between the second point of the outer edge of the upper surface of the dielectric layer in the STTM element.

範例21：此範例包括範例20之任何或全部的元件，其中至少部分由該電介質層的該上表面之區域界定該階梯，且該積體電路進一步包括在該些區域上的間隔體。 Example 21: This example includes any or all of the elements of Example 20, wherein the step is at least partially defined by the region of the upper surface of the dielectric layer, and the integrated circuit further includes spacers on the regions.

範例22：此範例包括範例21之任何或全部的元件，其中該間隔體包括電介質材料。 Example 22: This example includes any or all of the elements of Example 21, wherein the spacer comprises a dielectric material.

範例23：此範例包括範例21及22之任何者的任何或全部的元件，其中由該間隔體至少部分界定該階梯。 Example 23: This example includes any or all of the elements of any of Examples 21 and 22, wherein the step is at least partially defined by the spacer.

範例24：此範例包括範例21至24之任何者的任何或全部的元件，進一步包括設置在該自由磁層上的硬遮罩層。 Example 24: This example includes any or all of the elements of any of Examples 21 to 24, further comprising a hard mask layer disposed on the free magnetic layer.

範例25：此範例包括範例24之任何或全部的元件，其中該間隔體的上表面與該硬遮罩層的上表面實質上共面。 Example 25: This example includes any or all of the elements of Example 24, wherein the upper surface of the spacer is substantially coplanar with the upper surface of the hard mask layer.

範例26：此範例包括範例20至25之任何者的任何或全部的元件，其中該SL1相對於該電介質層的該平面為非垂直。 Example 26: This example includes any or all of the elements of any of Examples 20 through 25, wherein the SL1 is non-perpendicular to the plane of the dielectric layer.

範例27：此範例包括範例20至26之任何者的任何或全部的元件，其中介於該些第一及第二點之間的該階梯寬度之範圍為從大於0至約15奈米(nm)。 Example 27: This example includes any or all of the elements of any of Examples 20 to 26, wherein the step width between the first and second points ranges from greater than 0 to about 15 nm (nm ).

範例28：此範例包括範例27之任何或全部的元件，其中介於該些第一及第二點之間的該階梯寬度之範圍為從大於0至約10nm。 Example 28: This example includes any or all of the elements of Example 27, wherein the step width between the first and second points ranges from greater than 0 to about 10 nm.

範例29：此範例包括範例20至28之任何者的任何或全部的元件，其中相對於該電介質層的水平面，SL1的範圍為從約70到少於90度。 Example 29: This example includes any or all of the elements of any of Examples 20 to 28, wherein SL1 ranges from about 70 to less than 90 degrees with respect to the horizontal plane of the dielectric layer.

範例30：此範例包括範例22至25之任何者的任何或全部的元件，其中該間隔體包含至少一個側壁，其具有相對於該電介質層的該水平面之第二坡度SL2；及SL2>SL1。 Example 30: This example includes any or all of the elements of any of Examples 22 to 25, wherein the spacer includes at least one sidewall having a second slope SL2 relative to the horizontal plane of the dielectric layer; and SL2 > SL1.

範例31：此範例包括範例30之任何或全部的元件，其中相對於該電介質層的水平面，SL2的範圍為從約85到90度。 Example 31: This example includes any or all of the elements of Example 30, wherein SL2 ranges from about 85 to 90 degrees with respect to the horizontal plane of the dielectric layer.

範例32：此範例包括範例31之任何或全部的元件，其中相對於該電介質層的水平面，SL2為90度。 Example 32: This example includes any or all of the elements of Example 31, wherein SL2 is 90 degrees relative to the horizontal plane of the dielectric layer.

範例33：此範例包括範例20至32之任何者的任何或全部的元件，其中該STTM元件呈現小於約100奧斯特(oersted；Oe)之偏移場H_Offset。 Example 33: This example includes any or all of the elements of any of Examples 20 to 32, wherein the STTM element exhibits an offset field H _{Offset of} less than about 100 Oersted (Oe).

範例34：此範例包括範例33之任何或全部的元件，其中H_Offset小於約50Oe。 Example 34: This example includes any or all of the elements of Example 33, where H _{Offset is} less than about 50 Oe.

範例35：此範例包括範例34之任何或全部的元件，其中H_Offset為0Oe。 Example 35: This example includes any or all of the elements of Example 34, where H _Offset is 0Oe.

範例36：此範例包括範例20至24之任何者的任何或全部的元件，其中該MTJ為垂直MTJ。 Example 36: This example includes any or all of the elements of any of Examples 20-24, wherein the MTJ is a vertical MTJ.

在此所採用的術語和詞句作說明而非限制用，且在使用這種術語及詞句時並不意圖排除所示和所述的特徵(或其之部分)之任何等效者，且可認知到可有在專利請求項的範疇內之各種變更。依此，專利請求項涵蓋所有這種等效者。已在此說明各種特徵、態樣、及實施例。可做出熟悉此技藝者可理解的特徵、態樣、及實施例之相結合、修改及變更。故本公開應視為涵蓋這種結合、修改、及變更。 The terms and phrases used herein are for the purpose of illustration and description, and are not intended to be There may be various changes in the scope of the patent claims. Accordingly, the patent claims cover all such equivalents. Various features, aspects, and embodiments have been described herein. Combinations, modifications, and alterations of the features, aspects, and embodiments that can be understood by those skilled in the art can be made. Therefore, this disclosure should be considered to cover such combinations, modifications, and alterations.

Claims (25)

一種形成自旋轉移力矩記憶體(STTM)元件之方法，包含：提供包含基板及在該基板上的材料堆疊之工件，該材料堆疊界定磁穿隧接面(MTJ)，其包括固定磁層、在固定磁層上的電介質層、及在電介質層上的自由磁層，其中在該工件中該自由磁層具有第一寬度W1，該電介質層具有第二寬度W2，且W1<W2，而得以暴露電介質層的上表面之至少一部分且該自由磁層包含具有相對於該電介質層的一平面之第一坡度SL1的至少一個側壁；在該工件的該電介質層與該自由磁層上沉積間隔體材料，來形成非保角間隔體前導物；及至少部分藉由選擇性移除該非保角間隔體前導物的至少一部分、該電介質層的至少一部分、及該固定磁層的至少一部分來形成包括階梯的STTM元件，其中該階梯延伸於鄰近該自由磁層的側壁與底表面之界面的第一點至在該STTM元件中該電介質層的上表面之外緣的第二點之間。 A method of forming a spin transfer torque memory (STTM) component, comprising: providing a workpiece comprising a substrate and a stack of materials on the substrate, the material stack defining a magnetic tunneling junction (MTJ) comprising a fixed magnetic layer, a dielectric layer on the fixed magnetic layer, and a free magnetic layer on the dielectric layer, wherein the free magnetic layer has a first width W1 in the workpiece, the dielectric layer having a second width W2, and W1 < W2 Exposing at least a portion of an upper surface of the dielectric layer and the free magnetic layer includes at least one sidewall having a first slope SL1 relative to a plane of the dielectric layer; depositing a spacer on the dielectric layer of the workpiece and the free magnetic layer And forming a non-conformal spacer precursor; and forming at least in part by selectively removing at least a portion of the non-conformal spacer precursor, at least a portion of the dielectric layer, and at least a portion of the fixed magnetic layer a stepped STTM element, wherein the step extends from a first point adjacent an interface between a sidewall and a bottom surface of the free magnetic layer to an upper surface of the dielectric layer in the STTM element Between the second point of the outer edge. 如申請專利範圍第1項所述之方法，其中該間隔體材料的剩餘部分界定在該STTM元件中的該階梯。 The method of claim 1, wherein the remainder of the spacer material defines the step in the STTM element. 如申請專利範圍第1項所述之方法，其中該SL1相對於該電介質層的該平面為非垂直。 The method of claim 1, wherein the SL1 is non-perpendicular to the plane of the dielectric layer. 如申請專利範圍第1項所述之方法，其中：該非保角間隔體前導物具有，在該電介質層的該上表面上方之區域中的第一平均厚度a，在該自由磁層的上表 面上方之區域中的第二平均厚度b，及在該自由磁層的該些側壁上之第三平均厚度c；其中a、b、及c不相同。 The method of claim 1, wherein the non-conformal spacer precursor has a first average thickness a in a region above the upper surface of the dielectric layer, and an upper surface of the free magnetic layer a second average thickness b in the region above the face, and a third average thickness c on the sidewalls of the free magnetic layer; wherein a, b, and c are different. 如申請專利範圍第4項所述之方法，其中c<a<b。 The method of claim 4, wherein c < a < b. 如申請專利範圍第1項所述之方法，其中：該工件進一步包含設置在該自由磁層上的硬遮罩層；及沉積該間隔體材料使得該非保角間隔體的至少一部分在該硬遮罩層的上表面上。 The method of claim 1, wherein: the workpiece further comprises a hard mask layer disposed on the free magnetic layer; and depositing the spacer material such that at least a portion of the non-conformal spacer is in the hard mask On the upper surface of the cover layer. 如申請專利範圍第6項所述之方法，其中該間隔體材料的剩餘部分界定在該STTM元件中的該階梯。 The method of claim 6 wherein the remainder of the spacer material defines the step in the STTM element. 如申請專利範圍第1項所述之方法，其中介於該些第一及第二點之間的該階梯寬度之範圍為從大於0至約15奈米(nm)。 The method of claim 1, wherein the step width between the first and second points ranges from greater than 0 to about 15 nanometers (nm). 如申請專利範圍第1項所述之方法，其中該非保角間隔體前導物具有內斜(re-entrant)剖面輪廓。 The method of claim 1, wherein the non-conformal spacer precursor has a re-entrant cross-sectional profile. 如申請專利範圍第1項所述之方法，其中，相對於該電介質層的水平面，SL1的範圍為從約70到少於90度。 The method of claim 1, wherein the SL1 ranges from about 70 to less than 90 degrees with respect to a horizontal plane of the dielectric layer. 如申請專利範圍第10項所述之方法，其中：該間隔體材料的剩餘部分界定該階梯，該剩餘部分包含至少一個側壁，其具有相對於該電介質層的該水平面之第二坡度SL2；及 SL2>SL1。 The method of claim 10, wherein: the remaining portion of the spacer material defines the step, the remaining portion comprising at least one sidewall having a second slope SL2 relative to the horizontal plane of the dielectric layer; SL2>SL1. 如申請專利範圍第1項所述之方法，其中該STTM元件呈現小於約100奧斯特(oersted；Oe)之偏移場H_Offset。 The method of claim 1, wherein the STTM element exhibits an offset field H _{Offset of} less than about 100 oersted (Oe). 如申請專利範圍第1項所述之方法，其中該MTJ為垂直MTJ。 The method of claim 1, wherein the MTJ is a vertical MTJ. 一種包含自旋轉移力矩記憶體(STTM)元件之積體電路裝置，該STTM元件包含：基板；及在該基板上的材料堆疊，該材料堆疊界定磁穿隧接面(MTJ)，其包括固定磁層、在固定磁層上的電介質層、及在電介質層上的自由磁層；其中：該自由磁層具有第一寬度W1，該電介質層具有第二寬度W2，且W1<W2；該自由磁層包含具有相對於該電介質層的一平面之第一坡度SL1的至少一個側壁；及該MTJ包括一階梯，其延伸於鄰近該自由磁層的側壁與底表面之界面的第一點至在該STTM元件中該電介質層的上表面之外緣的第二點之間。 An integrated circuit device including a spin transfer torque memory (STTM) device, the STTM device comprising: a substrate; and a stack of materials on the substrate, the material stack defining a magnetic tunneling interface (MTJ) including fixing a magnetic layer, a dielectric layer on the fixed magnetic layer, and a free magnetic layer on the dielectric layer; wherein: the free magnetic layer has a first width W1, the dielectric layer has a second width W2, and W1 < W2; The magnetic layer includes at least one sidewall having a first slope SL1 with respect to a plane of the dielectric layer; and the MTJ includes a step extending from a first point adjacent to an interface between the sidewall and the bottom surface of the free magnetic layer The STTM element is between the second point of the outer edge of the upper surface of the dielectric layer. 如申請專利範圍第14項所述之積體電路裝置，其中至少部分由該電介質層的該上表面之區域界定該階梯，且該積體電路進一步包含在該些區域上的間隔體。 The integrated circuit device of claim 14, wherein the step is at least partially defined by a region of the upper surface of the dielectric layer, and the integrated circuit further includes a spacer on the regions. 如申請專利範圍第15項所述之積體電路裝置， 其中由該間隔體至少部分界定該階梯。 The integrated circuit device according to claim 15 of the patent application, Wherein the step is at least partially defined by the spacer. 如申請專利範圍第15項所述之積體電路裝置，進一步包含設置在該自由磁層上的硬遮罩層。 The integrated circuit device of claim 15, further comprising a hard mask layer disposed on the free magnetic layer. 如申請專利範圍第17項所述之積體電路裝置，其中該間隔體的上表面與該硬遮罩層的上表面實質上共面。 The integrated circuit device of claim 17, wherein the upper surface of the spacer is substantially coplanar with the upper surface of the hard mask layer. 如申請專利範圍第14項所述之積體電路裝置，其中該SL1相對於該電介質層的該平面為非垂直。 The integrated circuit device of claim 14, wherein the SL1 is non-perpendicular to the plane of the dielectric layer. 如申請專利範圍第14項所述之積體電路裝置，其中介於該些第一及第二點之間的該階梯寬度之範圍為從大於0至約15奈米(nm)。 The integrated circuit device of claim 14, wherein the step width between the first and second points ranges from greater than 0 to about 15 nanometers (nm). 如申請專利範圍第14項所述之積體電路裝置，其中，相對於該電介質層的水平面，SL1的範圍為從約70到少於90度。 The integrated circuit device of claim 14, wherein the SL1 ranges from about 70 to less than 90 degrees with respect to a horizontal plane of the dielectric layer. 如申請專利範圍第14項所述之積體電路裝置，其中該間隔體包含至少一個側壁，其具有相對於該電介質層的該水平面之第二坡度SL2；及SL2>SL1。 The integrated circuit device of claim 14, wherein the spacer comprises at least one sidewall having a second slope SL2 with respect to the horizontal plane of the dielectric layer; and SL2 > SL1. 如申請專利範圍第14項所述之積體電路裝置，其中該STTM元件呈現小於約100奧斯特(oersted；Oe)之偏移場H_Offset。 The integrated circuit device of claim 14, wherein the STTM element exhibits an offset field H _{Offset of} less than about 100 Oersted (Oe). 如申請專利範圍第14項所述之積體電路裝置，其中該STTM元件呈現小於約50奧斯特(oersted；Oe)之偏移場H_Offset。 The integrated circuit device of claim 14, wherein the STTM element exhibits an offset field H _{Offset of} less than about 50 Oersted (Oe). 如申請專利範圍第14項所述之積體電路裝置，其中該MTJ為垂直MTJ。 The integrated circuit device of claim 14, wherein the MTJ is a vertical MTJ.