TW201626587A - Optoelectronic element and solar cell employing the same - Google Patents
Optoelectronic element and solar cell employing the same Download PDFInfo
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- TW201626587A TW201626587A TW104100907A TW104100907A TW201626587A TW 201626587 A TW201626587 A TW 201626587A TW 104100907 A TW104100907 A TW 104100907A TW 104100907 A TW104100907 A TW 104100907A TW 201626587 A TW201626587 A TW 201626587A
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
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- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
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Abstract
Description
本發明係關於一種光電元件及包含其之太陽能電池。 The present invention relates to a photovoltaic element and a solar cell comprising the same.
由於全球能源的持續短缺且對於能源的需求與日俱增，因此如何提供環保且乾淨的能源便成為目前最迫切需要研究的議題。在各種替代性能源的研究當中，利用自然的太陽光經由光電能量轉換產生電能的太陽能電池，為目前所廣泛應用且積極研發之技術。 Due to the continuous shortage of global energy and the increasing demand for energy, how to provide environmentally friendly and clean energy is the most urgent issue to be studied. Among various alternative energy sources, solar cells that use natural sunlight to generate electrical energy via photoelectric energy conversion are widely used and actively developed technologies.
太陽能電池係利用具有PN接面(PN-Junction)的矽半導體基材，當照射太陽光後造成光伏效應(Photovoltaics)激發出游離電子。然而，在傳統太陽能電池中，激發所產生的游離電子係無特定的傳輸方向(係以類似擴散的方式傳輸)，因此當電子傳輸至射極層時，已因半導體材料的阻抗而造成能量的部分損耗。 The solar cell utilizes a germanium semiconductor substrate having a PN junction (PN-Junction), which causes photovoltaic effects to excite free electrons when irradiated with sunlight. However, in conventional solar cells, the free electrons generated by excitation have no specific transmission direction (transmitted in a diffusion-like manner), so when electrons are transmitted to the emitter layer, energy has been generated due to the impedance of the semiconductor material. Partial loss.
基於上述，發展出一種可改善上述習知技術缺失之太陽能電池，實為目前太陽能電池技術所迫切需要的。 Based on the above, the development of a solar cell which can improve the above-mentioned conventional technology is urgently required in the current solar cell technology.
本發明提供一種光電元件及包含其之太陽能電池。由於該光電元件(或是太陽能電池)的表面具有一阻值較低 的電流通道網，可在不減少發電面積的前提下，將照光所產生的電流，有方向性的由矽晶基材傳輸至電極，提升電流的收集效率及降低電流的傳導損耗，提高太陽能電池的整體發電效能。 The invention provides a photovoltaic element and a solar cell comprising the same. Since the surface of the photovoltaic element (or solar cell) has a lower resistance value The current channel network can transmit the current generated by the illumination to the electrode in a directional manner without reducing the power generation area, thereby improving the current collection efficiency and reducing the conduction loss of the current, and improving the solar cell. Overall power generation efficiency.
根據本發明一實施例，本發明提供一種光電元件，包含：一矽晶基材，其中該矽晶基材具有一上表面、一下表面。其中，該上表面具有一第一粗化結構(textured structure)。該第一粗化結構由複數個角錐(pyramid)所組成，每一角錐有二個以上之側面(side face)，且每一側面具有二側邊及一底邊，其中每一側面係由一低摻雜區域及一高摻雜區域所組成，且該高摻雜區域與該側邊緊密相鄰，其中該複數個角錐之高摻雜區域係相互接觸並構成一電流通道網。 According to an embodiment of the invention, the invention provides a photovoltaic element comprising: a twinned substrate, wherein the twinned substrate has an upper surface and a lower surface. Wherein, the upper surface has a first textured structure. The first roughening structure is composed of a plurality of pyramids, each pyramid has two or more side faces, and each side has two sides and a bottom side, wherein each side is composed of one The low doped region and the highly doped region are formed, and the highly doped region is closely adjacent to the side, wherein the high doped regions of the plurality of pyramids are in contact with each other and constitute a current channel network.
根據本發明另一實施例，本發明提供一種太陽能電池，包含：一矽晶基材，其中該矽晶基材具有一上表面、一下表面。該上表面具有一第一粗化結構(textured structure)，其中該第一粗化結構由複數個角錐(pyramid)所組成，每一角錐有二個以上之側面(side face)，且每一側面具有二側邊及一底邊，其中每一側面係由一低摻雜區域及一高摻雜區域所組成，且該高摻雜區域與該側邊緊密相鄰，其中該複數個角錐之高摻雜區域係相互接觸並構成一電流通道網。一第一電極，設置於該矽晶基材之上表面，與該第一粗化結構接觸。以及，一第二電極，設置於該矽晶基材之下表面。 According to another embodiment of the present invention, there is provided a solar cell comprising: a twinned substrate, wherein the twinned substrate has an upper surface and a lower surface. The upper surface has a first textured structure, wherein the first roughened structure is composed of a plurality of pyramids, each pyramid has more than two side faces, and each side Having two sides and a bottom side, wherein each side is composed of a low doped region and a highly doped region, and the highly doped region is closely adjacent to the side, wherein the plurality of pyramids is high The doped regions are in contact with one another and form a current channel network. A first electrode is disposed on the upper surface of the twinned substrate to be in contact with the first roughened structure. And a second electrode disposed on the lower surface of the twinned substrate.
為讓本發明之上述和其他目的、特徵、和優點能更明顯易懂，下文特舉出較佳實施例，並配合所附圖式，作詳 細說明如下： The above and other objects, features, and advantages of the present invention will become more apparent and understood. The details are as follows:
10‧‧‧光電元件 10‧‧‧Optoelectronic components
11‧‧‧上表面 11‧‧‧ upper surface
12‧‧‧矽晶基材 12‧‧‧Crystal substrate
13‧‧‧下表面 13‧‧‧ Lower surface
16、16A、16B‧‧‧角錐 16, 16A, 16B‧‧‧Corner
21‧‧‧頂角 21‧‧‧Top corner
23‧‧‧側邊 23‧‧‧ Side
24‧‧‧側面 24‧‧‧ side
24A‧‧‧高摻雜區域 24A‧‧‧Highly doped area
24B‧‧‧低摻雜區域 24B‧‧‧Low doped area
25‧‧‧底邊 25‧‧‧Bottom
28‧‧‧金屬線 28‧‧‧Metal wire
40、40A‧‧‧罩幕層 40, 40A‧‧ ‧ cover layer
50-54‧‧‧深度 50-54‧‧ depth
60-64‧‧‧深度 60-64‧‧ depth
41‧‧‧等向性蝕刻 41‧‧‧ isotropic etching
100‧‧‧太陽能電池 100‧‧‧ solar cells
101‧‧‧第一電極 101‧‧‧First electrode
103‧‧‧第二電極 103‧‧‧second electrode
111‧‧‧第一粗化結構 111‧‧‧First roughening structure
131‧‧‧第二粗化結構 131‧‧‧Second roughening structure
第1圖係顯示根據本發明一實施例所述之光電元件的示意圖。 Fig. 1 is a schematic view showing a photovoltaic element according to an embodiment of the present invention.
第2圖係顯示第1圖所述之光電元件其粗化結構之角錐的放大示意圖。 Fig. 2 is an enlarged schematic view showing a pyramid of a roughened structure of the photovoltaic element described in Fig. 1.
第3圖係顯示根據本發明一實施例所述之光電元件的上視示意圖。 Figure 3 is a top plan view showing a photovoltaic element according to an embodiment of the invention.
第4圖係顯示本發明另一實施例所述之光電元件其粗化結構之角錐的放大示意圖。 Fig. 4 is an enlarged schematic view showing a pyramid of a roughened structure of a photovoltaic element according to another embodiment of the present invention.
第5圖係顯示根據本發明其他實施例所述之光電元件的上視示意圖。 Fig. 5 is a top plan view showing a photovoltaic element according to another embodiment of the present invention.
第6圖係顯示根據本發明一實施例所述之光電元件的剖面示意圖。 Figure 6 is a cross-sectional view showing a photovoltaic element according to an embodiment of the present invention.
第7圖係顯示根據本發明一實施例所述之太陽能電池的示意圖。 Figure 7 is a schematic view showing a solar cell according to an embodiment of the present invention.
第8A至8G圖係顯示根據本發明一實施例所述之光電元件的製造流程圖。 8A to 8G are views showing a manufacturing flow chart of a photovoltaic element according to an embodiment of the present invention.
第9A至9B圖係第8D圖所述之角錐16A沿方向X的剖面結構示意圖。 9A to 9B are schematic cross-sectional views of the pyramid 16A described in Fig. 8D along the direction X.
第10A至10B圖係顯示根據本發明一實施例所述之太陽能電池的製造流程圖。 10A to 10B are views showing a manufacturing flow chart of a solar cell according to an embodiment of the present invention.
第11及12圖係顯示以二次離子質譜儀(SIMS)對實施例1所 得之矽晶太陽能電池在不同深度進行量測的結果。 Figures 11 and 12 show the use of secondary ion mass spectrometry (SIMS) for Example 1. The result of measuring the crystal solar cells at different depths.
第13圖係顯示不同濃度摻質對矽基材電阻率的影響。 Figure 13 shows the effect of different concentrations of dopant on the resistivity of the tantalum substrate.
在不同的特徵中所對應之數字和符號，除非另有註記，一般而言視為對應部份。所繪示的特徵清楚地標明了具體實施方式的相關態樣，且其並不一定依比例繪製。 The numbers and symbols corresponding to the different features are generally considered to be corresponding parts unless otherwise noted. The features illustrated are clearly labeled in the relevant embodiments and are not necessarily drawn to scale.
本發明係揭露一種光電元件及包含其之太陽能電池。該光電元件可包含：一矽晶基材，其中該矽晶基材具有一上表面、及一下表面。該矽晶基材可為一單晶矽基材、或一多晶矽基材。其中，該上表面具有一第一粗化結構(textured structure)。該第一粗化結構由複數個角錐(pyramid)所組成。該複數個角錐可獨立為三角錐(triangular pyramid)、四角錐(quadrangular pyramid)、五角錐(pentagonal pyramid)、或六角錐(hexagonal pyramid)，但並不以此為限，且該複數個角錐可具有相同或不同尺寸。值得注意的是，該角錐每一側面係由一低摻雜區域及一高摻雜區域所組成，而該複數個角錐之高摻雜區域係相互接觸並構成一電流通道網。 The invention discloses a photovoltaic element and a solar cell comprising the same. The photovoltaic element can comprise: a twinned substrate, wherein the twinned substrate has an upper surface and a lower surface. The twinned substrate can be a single crystal germanium substrate, or a polycrystalline germanium substrate. Wherein, the upper surface has a first textured structure. The first roughening structure is composed of a plurality of pyramids. The plurality of pyramids may be independently a triangular pyramid, a quadrangular pyramid, a pentagonal pyramid, or a hexagonal pyramid, but not limited thereto, and the plurality of pyramids may be Have the same or different sizes. It should be noted that each side of the pyramid consists of a low doped region and a highly doped region, and the high doped regions of the plurality of pyramids are in contact with each other and constitute a current channel network.
請參照第1圖，係顯示本發明一實施例所述之光電元件10。該光電元件10具有一矽晶基材12，該矽晶基材12具有一上表面11、及一下表面13。該矽晶基材12具有第一導電性(可為n型或p型導電性，例如p型導電性)，可具有一厚度介於約50μm至500μm之間。其中，該上表面11具有一第一粗化結構(textured structure)111。在此實施例中，該第一粗化結構(textured structure)111可由複數個四角錐16所組成，其中該複 數個四角錐16的尺寸可為相同或不同。請參照第2圖，係為第1圖所述之四角錐16的放大示意圖。該四角錐16係具有一個頂角(top vertex)21、及四個側面24，每一個側面具有二個側邊23以及一個底邊25，其中每一側面24係由一高摻雜區域24A及一低摻雜區域24B所組成，而任兩相鄰的四角錐16係以底邊25相疊的方式相互接觸。其中，該側邊23及該底邊25的長度可介於約3μm至20μm之間。值得注意的是，在每一個側面24的該高摻雜區域24A，係與該側面的該側邊23緊密相鄰；而且，該四角錐16每一側面的該高摻雜區域係相交於該頂角(top vertex)21。該高摻雜區域24A之面積可佔該側面24總面積約5%至25%，若低於下限值，因為高摻雜區24A串接形成的低電阻發電流通道網面積太小或不連續，無法達到提升導電效果太小；反之，若高於上限值，則高摻雜區24A的面積占比例太高，高摻雜相對會降低光伏發電壓，犧牲過多的可做為低摻雜的高發電電壓的面積。 Referring to Fig. 1, there is shown a photovoltaic element 10 according to an embodiment of the present invention. The photovoltaic element 10 has a twinned substrate 12 having an upper surface 11 and a lower surface 13. The twinned substrate 12 has a first conductivity (which may be n-type or p-type conductivity, such as p-type conductivity) and may have a thickness between about 50 μm and 500 μm. The upper surface 11 has a first textured structure 111. In this embodiment, the first textured structure 111 may be composed of a plurality of quadrangular pyramids 16, wherein the complex The dimensions of the plurality of quadrangular pyramids 16 may be the same or different. Please refer to Fig. 2, which is an enlarged schematic view of the quadrangular pyramid 16 shown in Fig. 1. The quadrangular pyramid 16 has a top vertex 21 and four side faces 24, each side having two side edges 23 and a bottom edge 25, wherein each side surface 24 is formed by a highly doped region 24A and A low doped region 24B is formed, and any two adjacent quadrangular pyramids 16 are in contact with each other in such a manner that the bottom edges 25 are stacked. The length of the side 23 and the bottom side 25 may be between about 3 μm and 20 μm. It should be noted that the highly doped region 24A on each side 24 is closely adjacent to the side 23 of the side; and the highly doped region on each side of the quadrangular pyramid 16 intersects Top vertex 21. The area of the highly doped region 24A may be about 5% to 25% of the total area of the side surface 24. If it is lower than the lower limit, the area of the low-resistance current-carrying channel formed by the high-doped region 24A is too small or not. Continuous, unable to achieve the improvement of the conductive effect is too small; conversely, if it is higher than the upper limit, the area of the highly doped region 24A is too high, the high doping will reduce the photovoltaic voltage, and the excessive sacrifice can be used as the low doping. The area of the high power generation voltage.
該高摻雜區域24A及該低摻雜區域24B具有一第二導電性(可為p型或n型導電性，例如n型導電性)。舉例來說，若該矽晶基材係為p型導電性，則該高摻雜區域24A及該低摻雜區域24B係為n型導電性(例如以磷滲入矽晶層)；另一方面，若該矽晶基材係為n型導電性，則該高摻雜區域24A及該低摻雜區域24B係為p型導電性(例如以硼滲入矽晶層)。如此一來，當該光電元件照光後，該矽晶基材與該第一粗化結構之低摻雜區域24B(或該高摻雜區域24A)間產生P-N接面(P-N junction)，因此產生一第一驅力，將一載子(例如電子)由該矽晶基材傳輸至該 低摻雜區域24B(或該高摻雜區域24A)。 The highly doped region 24A and the low doped region 24B have a second conductivity (which may be p-type or n-type conductivity, such as n-type conductivity). For example, if the twinned substrate is p-type conductive, the highly doped region 24A and the lowly doped region 24B are n-type conductive (eg, infiltrated into the twinned layer by phosphorus); If the twinned substrate is n-type conductive, the highly doped region 24A and the lowly doped region 24B are p-type conductive (for example, boron is infiltrated into the twinned layer). In this way, when the photo-electric component is illuminated, a PN junction is formed between the twinned substrate and the low-doped region 24B (or the highly doped region 24A) of the first roughened structure, thereby generating a first drive to transfer a carrier (eg, electrons) from the twin substrate to the Low doped region 24B (or the highly doped region 24A).
該高摻雜區域之表面摻雜濃度可介於約5E+20 atoms/cm3至8E+22 atoms/cm3，且該低摻雜區域之表面摻雜濃度可介於約1E+19 atoms/cm3至5E+21 atoms/cm3。此外，該高摻雜區域24A之摻雜濃度與該低摻雜區域24B之表面摻雜濃度比可介於5倍至1000倍之間。由於高摻雜區域24A之表面摻雜濃度係為該低摻雜區域24B的約5倍至1000倍。因此該高摻雜區域24A相對於該低摻雜區域24B具有降低的電阻，可使得該四角錐16之高摻雜區域24A能與該低摻雜區域24B間產生一第二驅力，導致照光後藉由第一驅力從矽晶基材所導引出的載子(例如電子)可進一步快速由該低摻雜區域24B傳輸至該高摻雜區域24A。如此一來，該複數之四角錐16相互接觸之高摻雜區域24A可構成一電流通道網，用來快速傳遞載子(例如電子)，請參照第3圖(係為本發明一實施例所述光電元件10的上視示意圖)。 The surface doping concentration of the highly doped region may be between about 5E+20 atoms/cm 3 to 8E+22 atoms/cm 3 , and the surface doping concentration of the low doped region may be between about 1E+19 atoms/ Cm 3 to 5E+21 atoms/cm 3 . In addition, the doping concentration of the highly doped region 24A and the surface doping concentration ratio of the low doped region 24B may be between 5 and 1000 times. Since the surface doping concentration of the highly doped region 24A is about 5 to 1000 times that of the low doped region 24B. Therefore, the highly doped region 24A has a reduced electrical resistance relative to the low doped region 24B, so that a high driving region 24A of the quadrangular pyramid 16 can generate a second driving force between the low doped region 24B, resulting in illumination. Carriers (e.g., electrons) that are subsequently directed from the twinned substrate by the first drive can be further rapidly transferred from the lowly doped region 24B to the highly doped region 24A. In this way, the high-doped region 24A in which the plurality of quadrangular pyramids 16 are in contact with each other can constitute a current channel network for rapidly transmitting carriers (for example, electrons). Please refer to FIG. 3 (which is an embodiment of the present invention). A top view of the photovoltaic element 10 is shown.
根據本發明另一實施例，在該四角錐16的每一側邊23上，可進一步配置一金屬線28，並與該高摻雜區域24A直接接觸，請參照第4圖。該金屬線28之材質可為鎳、鈷、或銅，形成方式可有兩種，第一種是技術成熟的IC半導體之多晶矽閘極(gate)的金屬化製程，第二種技術是矽晶太陽電池的電鍍電極技術，前者成本較高，後者成本較低。由於金屬線28與該高摻雜區域24B相比，具有更低的電阻，可使得該四角錐16之高摻雜區域24A能與該金屬線28產生一第三驅力，導致藉由第二驅力由低摻雜區域24B傳輸至該高摻雜區域24A的載子(例如電 子)可進一步快速由該高摻雜區域24A傳輸至該金屬線28。如此一來，該複數之四角錐16相互接觸之金屬線28可構成一金屬網，用來快速收集載子(例如電子)，請參照第5圖(係為本發明一實施例所述光電元件10的上視示意圖)。該高摻雜區域24A可部份被該金屬線28所覆蓋(如第5圖所示)，亦可完全被該金屬線28所覆蓋。根據本發明某些實施例，該高摻雜區域24A被該金屬線28所覆蓋的區域佔該高摻雜區域24A面積的50-100%。若該高摻雜區域24A被該金屬線28所覆蓋的區域小於高摻雜區域24A面積的50%，則所形成的金屬線28有可能會因為過細而形成非連續的金屬線；若該高摻雜區域24A係部份被該金屬線28所覆蓋，則金屬線可提供更低的電流通道，提高電流傳導效率。 According to another embodiment of the present invention, a metal wire 28 may be further disposed on each side 23 of the quadrangular pyramid 16 and directly in contact with the highly doped region 24A. Please refer to FIG. The metal wire 28 may be made of nickel, cobalt or copper. There are two ways to form the first one. The first one is a metallization process of a polycrystalline germanium gate of a well-established IC semiconductor, and the second technique is twinning. The electroplating electrode technology of the solar cell has a higher cost and a lower cost. Since the metal line 28 has a lower resistance than the highly doped region 24B, the highly doped region 24A of the quadrangular pyramid 16 can generate a third driving force with the metal line 28, resulting in the second The carrier that is driven by the low doped region 24B to the highly doped region 24A (eg, electricity) The sub) can be further transferred from the highly doped region 24A to the metal line 28. In this way, the metal wires 28 of the plurality of quadrangular pyramids 16 contacting each other can form a metal mesh for quickly collecting carriers (for example, electrons). Please refer to FIG. 5 (which is a photovoltaic device according to an embodiment of the invention). 10's top view). The highly doped region 24A may be partially covered by the metal line 28 (as shown in FIG. 5) or completely covered by the metal line 28. According to some embodiments of the invention, the region of the highly doped region 24A covered by the metal line 28 is 50-100% of the area of the highly doped region 24A. If the area of the highly doped region 24A covered by the metal line 28 is less than 50% of the area of the highly doped region 24A, the formed metal line 28 may form a discontinuous metal line because it is too fine; if the height is high The doped region 24A is partially covered by the metal line 28, and the metal line can provide a lower current path and improve current conduction efficiency.
根據本發明其他實施例，本發明所述之光電元件10，除了該上表面11可具有一第一粗化結構(textured structure)111外，該下表面13亦可具有一第二粗化結構(textured structure)131，請參照第6圖(係為本發明一實施例所述光電元件10的剖面視示意圖)。該第二粗化結構(textured structure)131的定義與該第一粗化結構(textured structure)111相同，且可與該第一粗化結構(textured structure)111在相同步驟中同時形成，或是與該第一粗化結構(textured structure)111在不同步驟中先後形成。 According to another embodiment of the present invention, in the photovoltaic element 10 of the present invention, the lower surface 13 may have a second roughened structure (the upper surface 11 may have a first textured structure 111). The textured structure 131, please refer to FIG. 6 (a schematic cross-sectional view of the photovoltaic element 10 according to an embodiment of the present invention). The second textured structure 131 has the same definition as the first textured structure 111, and can be formed simultaneously with the first textured structure 111 in the same step, or The first textured structure 111 is formed in successive steps in different steps.
根據本發明某些實施例，本發明亦提供一種包含上述光電元件之矽晶太陽能電池。請參照第7圖，該矽晶太陽能電池100可包含第1圖所示之光電元件、一第一電極101設置於該光電元件10之矽晶基材12的上表面11上、以及一第二電極 103設置於該光電元件10之矽晶基材12的下表面13上(可部份或完全設置於該下表面13上)。由於該第一電極101係與該第一粗化結構(textured structure)111直接接觸，因此由該高摻雜區域24A所可構成的電流通道網亦與該第一電極101直接接觸。如此一來，當矽晶太陽能電池100照光後，藉由第一驅力(由該矽晶基材12與該第一粗化結構之低摻雜區域24B(或該高摻雜區域24A)間P-N接面(P-N junction)所產生)、及第二驅力(高摻雜區域24A能與該低摻雜區域24B間電阻差異所產生)導入至該電流通道網的電流，可進一步被該第一電極101所收集。由於該電流通道網，可更有效率的收集藉由P-N接面所產生之載子，而該載子可再透過電流微米通道的連接傳輸到第一電極101。與傳統矽晶太陽能電池相比，所產生的電流不會無系統方向的四處逸散，而是有系統性進入具有更低阻抗的電流通道網(這是因為高摻雜區域24A的阻抗較該低摻雜區域24B低)，因此可並避免照光所產生的電流因為半導體材料的阻抗而造成損耗。此外，由於該電流通道網可大幅增加電流的收集效率，因此本發明所述之矽晶太陽能電池100其第一電極101之間的間隔可適需要調整至較傳統矽晶太陽能電池更長的間隔，因此可減少該第一電極101配置於該上表面11的數量，增加矽晶太陽能電池100的照光面積。 According to some embodiments of the present invention, the present invention also provides a twinned solar cell comprising the above photovoltaic element. Referring to FIG. 7, the twin crystal solar cell 100 may include the photovoltaic element shown in FIG. 1, a first electrode 101 disposed on the upper surface 11 of the twin crystal substrate 12 of the photovoltaic element 10, and a second electrode 103 is disposed on the lower surface 13 of the twin crystal substrate 12 of the photovoltaic element 10 (may be partially or completely disposed on the lower surface 13). Since the first electrode 101 is in direct contact with the first textured structure 111, the current path network formed by the highly doped region 24A is also in direct contact with the first electrode 101. In this way, when the twinned solar cell 100 is illuminated, by the first driving force (between the twinned substrate 12 and the low doped region 24B of the first roughened structure (or the highly doped region 24A) The current introduced into the current channel network by the PN junction (generated by the PN junction) and the second driving force (which is caused by the difference in resistance between the highly doped region 24A and the lowly doped region 24B) can be further An electrode 101 is collected. Due to the current channel network, the carrier generated by the P-N junction can be collected more efficiently, and the carrier can be transmitted to the first electrode 101 through the connection of the current microchannel. Compared with traditional twin solar cells, the generated current does not escape from the system direction, but systematically enters the current channel network with lower impedance (this is because the impedance of the highly doped region 24A is higher than that. The low doped region 24B is low, so that the current generated by the illumination can be avoided and the loss due to the impedance of the semiconductor material. In addition, since the current channel network can greatly increase the current collection efficiency, the spacing between the first electrodes 101 of the twinned solar cell 100 of the present invention can be adjusted to be longer than that of the conventional twinned solar cells. Therefore, the number of the first electrodes 101 disposed on the upper surface 11 can be reduced, and the illumination area of the twinned solar cells 100 can be increased.
根據本發明其他實施例，該矽晶太陽能電池之該第一粗化結構(textured structure)可更包含第5圖所述之金屬網，即在第一粗化結構的四角錐(pyramid)的每一側邊上，可進一步配置一金屬線，並與該高摻雜區域直接接觸。如此一來， 當矽晶太陽能電池照光後，藉由第一驅力(由該矽晶基材與該第一粗化結構之低摻雜區域(或該高摻雜區域)間P-N接面(P-N junction)所產生)、第二驅力(由高摻雜區域與低摻雜區域間之電壓差梯度所產生)、及第三驅力(由高摻雜區域與該金屬線間電阻差異所產生)導入至該金屬網的電流，可進一步被該第一電極101所收集。 According to another embodiment of the present invention, the first textured structure of the twinned solar cell may further include the metal mesh described in FIG. 5, that is, each of the pyramids of the first roughened structure. On one side, a metal wire may be further disposed and in direct contact with the highly doped region. As a result, After the twinned solar cell is illuminated, by a first driving force (by the PN junction between the twinned substrate and the low doped region of the first roughened structure (or the highly doped region) Generated), a second driving force (generated by a voltage difference gradient between the highly doped region and the low doped region), and a third driving force (generated by a difference in resistance between the highly doped region and the metal line) is introduced to The current of the metal mesh can be further collected by the first electrode 101.
此外，根據本發明其他實施例，該矽晶太陽能電池之矽晶基材之下表面可更具有一第二粗化結構(textured structure)(即該矽晶太陽能電池具有第7圖所述之矽晶基材12)，而該第二電極係與該第二粗化結構直接接觸。如此一來，該矽晶太陽能電池可具有強化第二粗糙化結構的第二電極之局部背電場。在此，該第二電極可部份配置於該第二粗化結構(即非完全覆蓋該第二粗化結構)，但本發明不以此為限。 In addition, according to other embodiments of the present invention, the lower surface of the twinned substrate of the twinned solar cell may further have a second textured structure (ie, the twinned solar cell has the structure described in FIG. 7) The crystalline substrate 12) is in direct contact with the second roughened structure. As such, the twinned solar cell can have a partial back electric field that enhances the second electrode of the second roughened structure. Here, the second electrode may be partially disposed in the second roughened structure (ie, not completely covering the second roughened structure), but the invention is not limited thereto.
第8A至8G圖係為一系列示意圖，用以說明本發明一實施例所述之光電元件10其製造流程。 8A to 8G are a series of schematic views for explaining the manufacturing process of the photovoltaic element 10 according to an embodiment of the present invention.
首先，提供一矽晶基材12，該矽晶基材12可為一單晶矽基材、或一多晶矽基材，請參照第8A圖。該矽晶基材12可具有一厚度介於50μm至500μm之間。 First, a twinned substrate 12 is provided. The twinned substrate 12 can be a single crystal germanium substrate or a polycrystalline germanium substrate. Please refer to FIG. 8A. The twinned substrate 12 can have a thickness between 50 μm and 500 μm.
接著，對矽晶基材12之一表面進行一粗糙化製程，以形成複數個角錐(例如四角錐)16A於該表面上，請參照第8B圖。該粗糙化製程可為將矽晶基材12的一表面浸漬於經加熱的鹼液中(例如含氫氧化鉀或氫氧化鈉的溶液)中，但本發明不以此為限。本發明採用的是將矽晶太陽電池晶片浸泡於攝氏80度的高溫KOH-IPA混合溶液之鹼蝕刻製程30分鐘，濃度比例 為氫氧化鉀KOH(45%)：異丙醇(IPA)：超純水(DIW)=1：2.2：36.7，因為該鹼蝕刻溶液對於矽晶片表面晶格方向(100)的單晶矽面上進行異向性的化學蝕刻產生晶格方向(111)面的微米金字塔角錐結構。 Next, a roughening process is performed on one surface of the twinned substrate 12 to form a plurality of pyramids (for example, a quadrangular pyramid) 16A on the surface. Please refer to FIG. 8B. The roughening process may be to immerse a surface of the twinned substrate 12 in a heated alkali solution (for example, a solution containing potassium hydroxide or sodium hydroxide), but the invention is not limited thereto. The invention adopts an alkali etching process of immersing a twinned solar cell wafer in a high temperature KOH-IPA mixed solution of 80 degrees Celsius for 30 minutes, the concentration ratio It is potassium hydroxide KOH (45%): isopropanol (IPA): ultrapure water (DIW) = 1:2.2:36.7 because of the alkali etching solution for the crystal lattice direction (100) of the surface of the tantalum wafer. Anisotropic chemical etching is performed to produce a micro pyramid pyramidal structure of the (111) plane in the lattice direction.
接著，坦覆性形成一遮罩層40於該基材12的上表面，以覆蓋該複數個角錐(例如四角錐)16A的所有側面，請參照第8C圖。該遮罩層40之材質可例如氮化矽層、二氧化矽層或是二氧化矽層與氮化矽層之複合結構層，遮罩層厚度需搭配濕蝕刻作用的反應時間與後續高溫摻雜擴散製程。本發明採用遮罩層40的測試材料為氮化矽層，形成方式可例如為：物理蒸氣沈積(PVD)、化學蒸氣沈積(CVD)、電漿輔助化學氣相沈積(PECVD)。 Next, a mask layer 40 is formed over the upper surface of the substrate 12 to cover all sides of the plurality of pyramids (for example, a quadrangular pyramid) 16A. Please refer to FIG. 8C. The material of the mask layer 40 may be, for example, a tantalum nitride layer, a hafnium oxide layer or a composite layer of a hafnium oxide layer and a tantalum nitride layer. The thickness of the mask layer needs to be matched with the reaction time of the wet etching and the subsequent high temperature doping. Heterogeneous diffusion process. The test material using the mask layer 40 of the present invention is a tantalum nitride layer, which may be formed by, for example, physical vapor deposition (PVD), chemical vapor deposition (CVD), or plasma assisted chemical vapor deposition (PECVD).
接著，對該罩幕層40進行等向性(isotropic)蝕刻(例如為一濕蝕刻，濕蝕刻液可例如為氫氟酸溶液HF(酸蝕刻溶液)或氫氧化鈉溶液NaOH(鹼蝕刻溶液)。請參照第9A圖，係為第8C圖所述角錐16A沿方向X的剖面結構圖，由於該角錐16A係具有折角(即角錐兩個相鄰側面的夾角小於180度)的幾何結構，因此當對該罩幕層40進行等向性(isotropic)蝕刻41時，由於蝕刻的加乘效應，位於側邊(角錐兩個相鄰側面共用的邊)上的罩幕層40其蝕刻速率明顯大於側面上平坦區域，且蝕刻的加乘效應當兩個側面的夾角(即折角)愈小愈明顯。值得注意的是，該等向性(isotropic)蝕刻並不會完全移除該罩幕層40，而是用來將位於側邊(或位於側面但接近側邊)的罩幕層40移除，因此位於該角錐16A側邊及頂角的罩幕層40，在蝕刻後會裸露出來，請 參照第8B圖及第8D圖。換言之，當該等向性(isotropic)蝕刻將相鄰於側邊(或位於側面但接近側邊)的罩幕層40移除後，則停止該等向性蝕刻。由於蝕刻的加乘效應，可使得位於側邊(或位於側面但接近側邊)的罩幕層40加速被蝕刻移除(露出部份矽晶基材12)，而保留位於側面但較遠離側邊的罩幕層40A(矽晶基材12仍被罩幕層40所覆蓋)，得到如第8D圖所示結構。 Next, the mask layer 40 is isotropically etched (for example, a wet etching, and the wet etching solution may be, for example, a hydrofluoric acid solution HF (acid etching solution) or a sodium hydroxide solution NaOH (alkaline etching solution). Please refer to FIG. 9A, which is a cross-sectional structural view of the pyramid 16A in the direction X according to FIG. 8C. Since the pyramid 16A has a geometric structure of a chamfer (ie, an angle of two adjacent sides of the pyramid is less than 180 degrees), When the mask layer 40 is isotropically etched 41, the mask layer 40 on the side edges (the sides shared by the two adjacent sides of the pyramid) has an etching rate significantly larger than that due to the etching effect of the etching. The flat area on the side, and the etched multiplication effect becomes more pronounced as the angle between the two sides (ie, the angle of the fold) becomes smaller. It is worth noting that the isotropic etching does not completely remove the mask layer 40. Rather, it is used to remove the mask layer 40 on the side (or on the side but close to the side), so the mask layer 40 on the side and the top corner of the pyramid 16A will be exposed after etching, please Refer to Figures 8B and 8D. In other words, the isotropic etch is stopped when the isotropic etch removes the mask layer 40 adjacent to the sides (or lateral but near the sides). Due to the additive effect of the etch, the mask layer 40 on the side (or on the side but close to the side) can be accelerated to be removed by etching (exposed part of the twinned substrate 12) while remaining on the side but away from the side The side mask layer 40A (the twinned substrate 12 is still covered by the mask layer 40) is obtained as shown in Fig. 8D.
接著，對第8D圖所述結構進行一第一次摻雜物製程，使得摻雜物進入未被罩幕層40覆蓋的矽晶基材12(即該側面與該側邊相鄰的部份)，得到一第一摻雜區域24A，如第8E圖所示。該第一次摻雜物製程實施的方式，如發明內容【0012】之說明，第一摻雜區域24A為高濃度摻雜區域，若該矽晶基材係為p型導電性，則第一摻雜區域24A係進行第一次n型導電性之高溫擴散摻雜(例如以磷滲入矽晶層)；另一方面，若該矽晶基材係為n型導電性，則第一摻雜區域24A係進行第一次p型導電性之高溫擴散摻雜(例如以硼滲入矽晶層)。本發明採用的是矽晶基材係為p型導電性，第一摻雜區域24A係進行第一次高溫磷擴散摻雜，攝氏800度POCl3擴散製程，第1次摻表面雜濃度可約為1E+20 atoms/cm3至5E+21 atoms/cm3。 Next, a first dopant process is performed on the structure of FIG. 8D such that the dopant enters the twinned substrate 12 that is not covered by the mask layer 40 (ie, the portion of the side adjacent to the side) A first doped region 24A is obtained as shown in FIG. 8E. The first dopant process is implemented as described in the Summary of the Invention [0012], the first doped region 24A is a high concentration doped region, and if the twinned substrate is p-type conductive, the first The doped region 24A is subjected to high-temperature diffusion doping of the first n-type conductivity (for example, infiltration of the germanium into the twinned layer); on the other hand, if the twinned substrate is n-type conductive, the first doping The region 24A is subjected to a high-temperature diffusion doping of the first p-type conductivity (for example, infiltration of the germanium into the twin layer). In the present invention, the twinned substrate is p-type conductivity, and the first doped region 24A is subjected to the first high-temperature phosphorus diffusion doping, 800 ° C POCl 3 diffusion process, and the first doping surface impurity concentration is about It is 1E+20 atoms/cm 3 to 5E+21 atoms/cm 3 .
接著，移除該罩幕層40A，露出角錐16B側面的矽晶基材，如第8F圖所示。移除該遮罩層40A的方式可例如為浸泡氫氟酸HF溶液，因為氫氟酸HF溶液對於本發明採用的氮化矽遮罩層有良好的蝕刻去除反應速率，對矽基材有非常高的選擇比，僅蝕刻去除遮罩層不蝕刻矽晶材料。HF溶液濃度為HF(49%)：DIW=1：20，浸泡時間約10~20分鐘，浸泡時間須配合 去除遮罩層厚度調整完全去除遮罩層40A。 Next, the mask layer 40A is removed to expose the twinned substrate on the side of the pyramid 16B as shown in Fig. 8F. The manner of removing the mask layer 40A may be, for example, a soaking hydrofluoric acid HF solution, because the hydrofluoric acid HF solution has a good etching removal reaction rate for the tantalum nitride mask layer used in the present invention, and has a very high A high selectivity ratio, only etching removes the mask layer without etching the germanium material. The concentration of HF solution is HF (49%): DIW=1:20, soaking time is about 10~20 minutes, soaking time must be matched Removing the mask layer thickness adjustment completely removes the mask layer 40A.
最後，對第8F圖所述結構進行一第二次摻雜物製程，得到一第二摻雜區域24B(即一低摻雜區域)，並使得該第一摻雜區域24A成為一高摻雜區域，至此得到本發明所述的光電元件10。該第二次摻雜物製程實施的方式，如發明內容之說明，若該矽晶基材係為p型導電性，則該高摻雜區域24A及該低摻雜區域24B係為n型導電性(例如以磷滲入矽晶層)；另一方面，若該矽晶基材係為n型導電性，則該高摻雜區域24A及該低摻雜區域24B係為p型導電性(例如以硼滲入矽晶層)。本發明採用的是矽晶基材係為p型導電性，第二摻雜係進行低摻雜濃度之高溫磷擴散摻雜，攝氏800度POCl3擴散製程，使得低摻雜區域24B之摻雜濃度介於1E+19至5E+21[atoms/cm3]；使得高摻雜區域24A經兩次的高溫磷擴散形成高摻雜濃度介於約5E+20 atoms/cm3至8E+22 atoms/cm3。 Finally, a second dopant process is performed on the structure of FIG. 8F to obtain a second doped region 24B (ie, a low doped region), and the first doped region 24A becomes a highly doped region. The region, and thus the photovoltaic element 10 of the present invention is obtained. The second dopant process is implemented as described in the Summary of the Invention. If the twinned substrate is p-type conductive, the highly doped region 24A and the lowly doped region 24B are n-type conductive. (eg, infiltrating the twinned layer with phosphorus); on the other hand, if the twinned substrate is n-type conductive, the highly doped region 24A and the lowly doped region 24B are p-type conductive (eg, Boron is infiltrated into the twin layer). The invention adopts a palladium substrate with p-type conductivity, a second doping system for high-temperature phosphorus diffusion doping with a low doping concentration, and an 800 degree Celsius POCl 3 diffusion process to dope the low doped region 24B. The concentration is between 1E+19 and 5E+21 [atoms/cm 3 ]; so that the highly doped region 24A is diffused by high temperature phosphorus twice to form a high doping concentration of about 5E+20 atoms/cm 3 to 8E+22 atoms. /cm 3 .
本發明一實施例亦提供第4圖所述具有金屬網的光電元件之製造方法。矽半導體材料的角椎體邊角側邊的金屬導線之製造方法可以採用兩種方法，第一種是技術成熟的IC半導體之多晶矽閘極(gate)的金屬化製程，第二種技術是矽晶太陽電池的電鍍電極技術，前者成本較高，後者成本較低。本發明實施例採用矽晶太陽電池電鍍電極技術，進行角椎體邊角側邊金屬導線的製造方法，(1)首先要先完成矽晶光電元件的前半段製程，到完成矽基材的複合式擴散摻雜PN-Junction結構；(2)接下步驟是製作僅在角錐邊角側邊裸露的遮罩(mask)，遮罩(mask)製程與材料類同於第8C圖至第8D圖，讓角錐平面區域被 絕緣層薄膜覆蓋保護與絕緣，遮罩(mask)的材料可為二氧化矽(SiO2)、氮化矽(Si3N4)、或兩者之複合材料；(3)接下步驟是將完成遮罩(mask)的光電元件半成品置入電鍍溶液中，利用光伏發電原理產生自發生電鍍的現象，裸露的角錐邊角側邊的電鍍出金屬導線。 An embodiment of the present invention also provides a method of fabricating a photovoltaic element having a metal mesh as shown in FIG. The manufacturing method of the metal wire on the side of the corner body of the semiconductor material can be carried out in two ways. The first method is a metallization process of a polycrystalline germanium gate of a well-established IC semiconductor, and the second technique is 矽The electroplating electrode technology of the crystal solar cell has a higher cost and a lower cost. In the embodiment of the invention, the method for manufacturing the metal wire of the corner body of the corner body is carried out by using the electroplating electrode technology of the twin crystal solar cell. (1) First, the first half process of the twin crystal photoelectric element is completed, and the composite of the tantalum substrate is completed. Diffusion-doped PN-Junction structure; (2) The next step is to make a mask exposed only on the side of the corner of the pyramid, the mask process and the material are similar to the 8C to 8D The pyramidal planar area is covered by the insulating layer film to protect and insulate, and the material of the mask may be cerium oxide (SiO 2 ), tantalum nitride (Si 3 N 4 ), or a composite material of the two; The next step is to place the masked photo-electric component semi-finished product into the electroplating solution, and use the photovoltaic power generation principle to generate self-electroplating phenomenon, and the bare corners of the corners are plated with metal wires.
根據本發明實施例，矽晶基材背面的第二粗糙化結構，與第一粗糙化結構可利用晶片粗糙化(texturing)處理一次完成的，矽晶基材(例如具有p型導電性、厚度為200um)之下表粗糙面以KOH-IPA溶液之濕式鹼蝕刻製程，氫氧化鉀KOH(45%)：異丙醇(IPA)：超純水(DIW)=1：2.2：36.7，反應溫度攝氏80度，反應時間30分鐘。 According to an embodiment of the invention, the second roughened structure on the back side of the twinned substrate, and the first roughened structure can be completed by using a wafer texturing process, for example, having a p-type conductivity and a thickness It is a wet alkaline etching process of KOH-IPA solution under the surface of 200um), potassium hydroxide KOH (45%): isopropanol (IPA): ultrapure water (DIW) = 1:2.2:36.7, reaction The temperature is 80 degrees Celsius and the reaction time is 30 minutes.
此外，根據本發明另一實施例，本發明亦提供一種太陽能電池100的製造方法。首先，請參照第10A圖，在完成本發明所述之光電元件(例如第8G圖所示之光電元件，但此僅為舉例，本發明並不以此為限，亦可為具有金屬網、或是第二粗化結構的光電元件)後，形成一第一電極101於部份該矽晶基材12之上表面11，與該具有複數個角錐16之第一粗化結構接觸(即與高摻雜區域所構成之電流通道網接觸)。該第一電極101之材質可例如為銀、鋁、銅、或其合金，其形成方式可例如為摻有銀粉或鋁粉之合金膠料的電極網印燒結製程，或是電鍍電極製程。 Moreover, according to another embodiment of the present invention, the present invention also provides a method of fabricating a solar cell 100. First, please refer to FIG. 10A to complete the photovoltaic device of the present invention (for example, the photovoltaic device shown in FIG. 8G, but this is merely an example, and the invention is not limited thereto, and may have a metal mesh, Or a second roughened structure of the photovoltaic element), forming a first electrode 101 on a portion of the upper surface 11 of the twinned substrate 12, in contact with the first roughened structure having a plurality of pyramids 16 (ie, Current channel network contact formed by highly doped regions). The material of the first electrode 101 can be, for example, silver, aluminum, copper, or an alloy thereof, and can be formed by, for example, an electrode screen printing sintering process of an alloy compound doped with silver powder or aluminum powder, or a plating electrode process.
接著，請參照第10B圖，於該矽晶基材12之下表面13上形成一第二電極，該等二電極可部份或完全覆蓋該下表面13，至此得到本發明所述的太陽能電池100。該第二電極103之 材質可例如為鋁-矽合金，其形成方式可例如為摻有銀粉或鋁粉之合金膠料的電極網印燒結製程，或是電鍍電極製程。 Next, referring to FIG. 10B, a second electrode is formed on the lower surface 13 of the twinned substrate 12, and the two electrodes may partially or completely cover the lower surface 13, thereby obtaining the solar cell of the present invention. 100. The second electrode 103 The material may be, for example, an aluminum-niobium alloy, which may be formed by, for example, an electrode screen printing sintering process of an alloy paste doped with silver powder or aluminum powder, or a plated electrode process.
為了讓本發明之上述和其他目的、特徵、和優點能更明顯易懂，下文特舉數實施例，來說明本發明所述之矽晶太陽能電池及其製造方法。 The above described and other objects, features, and advantages of the present invention will become more apparent and understood.
矽晶太陽能電池之製備Preparation of twin solar cells
實施例1 Example 1
首先，將一矽晶片(具有p型導電性、厚度為200um)之上表面以KOH-IPA溶液之濕式鹼蝕刻製程，氫氧化鉀KOH(45%)：異丙醇(IPA)：超純水(DIW)=1：2.2：36.7，反應溫度攝氏80度，反應時間30分鐘，進行表面粗糙化(texturing)處理，使該矽晶片具有一第一粗化結構。其中，該第一粗化結構具有複數個角錐。接著，坦覆性形成一氮化矽層(Si3N4)(作為遮罩層)於該矽晶片的上表面，以完全覆蓋該複數個角錐的所有側面。該氮化矽層(Si3N4)厚度係為120nm，形成方式係為PECVD之氮化矽層(Si3N4)。接著，對覆蓋該第一粗化結構的氮化矽層(Si3N4)進行一氫氟酸濕蝕刻製程(HF(49%)：DIW=1：20，室溫)，時間700秒。由於蝕刻的加乘效應，使得位於角錐側邊(角錐兩個相鄰側面共用的邊)上的氮化矽層(Si3N4)蝕刻速率明顯大於側面上平坦區域氮化矽層(Si3N4)的蝕刻速率，以將位於側邊(或位於側面但接近側邊)的氮化矽層(Si3N4)移除，露出位於角錐側邊或接近角錐側邊附近的些許側面之矽晶片表面，保留位於角錐側面但較遠離側邊的氮化矽層(Si3N4)；亦即形成僅於角錐邊角裸露的遮罩層(mask)。請參照附件1，係為經蝕刻後的 矽晶片之掃描式電子顯微鏡(SEM)圖譜。由附件1可知，位於角錐邊角的氮化矽層(作為遮罩)係被該蝕刻所移除，露出矽基材。接著，將對覆被該氮化矽層(Si3N4)遮罩層(Mask)矽晶片進行一第一摻雜物製程，本發明矽晶太陽電池實施例採用的是矽晶基材係為p型導電性，第一摻雜物製程係進行角錐邊角的第一次高溫磷擴散摻雜，攝氏800度POCL3擴散製程。接著，移除氮化矽層(Si3N4)遮罩層(Mask)，露出角錐側面的矽晶片表面，使用氫氟酸溶液室溫浸泡20分鐘，HF溶液濃度為HF(49%)：DIW=1：20。接著，對該矽晶片進行一第二次摻雜物製程，使得角錐之平面區域形成低摻雜濃度之高溫磷擴散摻雜，使得角錐之側邊區域經第二次的高溫磷擴散形成高摻雜濃。角錐體形成具有複合式摻雜濃度的角椎體，角椎體之側面為具有一低摻雜區域，角椎體之側邊區域為一高摻雜區域；該複數個角錐之高摻雜區域係相互接觸並構成一電流通道網。接著，去除矽晶片表面磷玻璃層(PSG)與在矽晶片表面覆被氮化矽層(Si3N4)之抗反射薄膜。接著，矽晶片的上表面以網印方式塗佈含銀、或/及鋁之上電極膠料，在矽晶片的下表面以網印方式塗佈下電極鋁膠。最後，對矽晶片進行一燒結(sintering)製程，以在矽晶片的上表面形成一圖形化第一電極(與電流通道網接觸)，並在矽晶片的下表面形成一第二電極(鋁-矽合金)與矽晶片直接接觸。請參照附件2，係為實施例1所述之矽晶太陽能電池其剖面掃描式電子顯微鏡(SEM)圖譜。 First, a wet-alkali etching process of a top surface of a wafer (having p-type conductivity and a thickness of 200 μm) in a KOH-IPA solution, potassium hydroxide KOH (45%): isopropanol (IPA): ultrapure Water (DIW) = 1:2.2:36.7, the reaction temperature was 80 degrees Celsius, and the reaction time was 30 minutes, and surface texturing treatment was performed to give the tantalum wafer a first roughened structure. Wherein, the first roughening structure has a plurality of pyramids. Next, a tantalum nitride layer (Si 3 N 4 ) is formed (as a mask layer) on the upper surface of the tantalum wafer to completely cover all sides of the plurality of pyramids. The tantalum nitride layer (Si 3 N 4 ) has a thickness of 120 nm and is formed by a PECVD tantalum nitride layer (Si 3 N 4 ). Next, a hydrofluoric acid wet etching process (HF (49%): DIW = 1:20, room temperature) was performed on the tantalum nitride layer (Si 3 N 4 ) covering the first roughened structure for 700 seconds. Due to the additive effect of etching, the yttrium nitride layer (Si 3 N 4 ) etch rate on the side of the pyramid (the side shared by two adjacent sides of the pyramid) is significantly larger than the tantalum nitride layer on the side (Si 3 ) N 4) the etch rate, positioned to the side (located at the side or sides but close to) the silicon nitride layer (Si 3 N 4) is removed, the exposed side of the side surface located a little pyramid or cone angle of approach of the sides close to The surface of the wafer is left with a layer of tantalum nitride (Si 3 N 4 ) located on the side of the pyramid but farther away from the sides; that is, a mask that is bare only at the corners of the pyramid is formed. Please refer to Annex 1 for the scanning electron microscope (SEM) spectrum of the etched germanium wafer. As can be seen from Annex 1, the tantalum nitride layer (as a mask) at the corners of the pyramid is removed by the etching to expose the tantalum substrate. Next, a first dopant process is performed on the germanium nitride layer (Si3N4) mask layer (Sisk), and the twin crystal cell embodiment of the present invention is a p-type substrate. Conductivity, the first dopant process is the first high-temperature phosphorus diffusion doping of the corner cone angle, 800 ° Celsius POCL3 diffusion process. Next, the tantalum nitride layer (Si3N4) mask layer (Mask) is removed, the surface of the tantalum wafer on the side of the pyramid is exposed, and the solution is immersed in a hydrofluoric acid solution for 20 minutes at room temperature, and the concentration of the HF solution is HF (49%): DIW=1. :20. Then, a second dopant process is performed on the germanium wafer, so that the planar region of the pyramid forms a low-doping concentration high-temperature phosphorus diffusion doping, so that the side region of the pyramid is highly doped by the second high-temperature phosphorus diffusion. Rich. The pyramid forms a vertebral body having a composite doping concentration, the side of the vertebral body has a low doped region, and the side region of the horn is a highly doped region; the highly doped region of the plurality of pyramids They are in contact with one another and form a current channel network. Next, the phosphor glass layer (PSG) on the surface of the tantalum wafer and the antireflection film coated with a tantalum nitride layer (Si 3 N 4 ) on the surface of the tantalum wafer are removed. Next, the upper surface of the germanium wafer is screen printed with the electrode paste containing silver or/and aluminum, and the lower electrode aluminum paste is applied by screen printing on the lower surface of the germanium wafer. Finally, a sintering process is performed on the germanium wafer to form a patterned first electrode (contact with the current channel network) on the upper surface of the germanium wafer and a second electrode on the lower surface of the germanium wafer (aluminum- Niobium alloy) is in direct contact with the tantalum wafer. Please refer to Annex 2 for a cross-sectional scanning electron microscope (SEM) pattern of the twinned solar cell described in Example 1.
比較實施例1 Comparative Example 1
首先，將一矽晶片(p-type)之上表面以KOH-IPA溶 液之濕式鹼蝕刻進行表面粗糙化(texturing)處理製程。接著，將晶片置於一高溫爐中並通入含磷氣體，使磷滲入矽晶片表層。接著，去除矽晶片表面磷玻璃層(PSG)與在矽晶片表面覆被氮化矽層(Si3N4)之抗反射薄膜。接著，在矽晶片的上表面以網印方式塗佈含銀、或/及鋁之漿料，在矽晶片的下表面以網印方式塗佈鋁漿。最後，對矽晶片進行一燒結(sintering)製程，以在矽晶片的上表面形成一第一電極(穿過抗反射層與與摻雜層接觸)，並在矽晶片的下表面形成一第二電極(鋁-矽合金)與矽晶片直接接觸。 First, a surface texturing process is performed by wet-base etching of a KOH-IPA solution on the upper surface of a p-type wafer. Next, the wafer is placed in a high temperature furnace and a phosphorus-containing gas is introduced to allow phosphorus to penetrate into the surface layer of the tantalum wafer. Next, the phosphor glass layer (PSG) on the surface of the tantalum wafer and the antireflection film coated with a tantalum nitride layer (Si 3 N 4 ) on the surface of the tantalum wafer are removed. Next, a paste containing silver or/and aluminum is applied by screen printing on the upper surface of the germanium wafer, and the aluminum paste is applied by screen printing on the lower surface of the germanium wafer. Finally, a sintering process is performed on the germanium wafer to form a first electrode (passing through the anti-reflective layer and contacting the doped layer) on the upper surface of the germanium wafer, and forming a second surface on the lower surface of the germanium wafer. The electrode (aluminum-niobium alloy) is in direct contact with the tantalum wafer.
矽晶太陽能電池之電性量測Electrical measurement of twin solar cells
對實施例1及比較實施例1所得之太陽能電池進行電性測試，結果如表1所示。 The solar cells obtained in Example 1 and Comparative Example 1 were subjected to electrical tests, and the results are shown in Table 1.
由以上量測可知，本發明所述之太陽能電池，由於該光電元件(或是太陽能電池)的射極層(emitter)是利用高濃度與低濃度之複合式擴散摻雜製程形成，射極層(Emitter)內具有一利用高濃度摻雜串連而成的低電阻值之電流通道網，可在不減少發電面積的前提下，將矽晶太陽能電池照光所產生的光伏發電流，更有系統性的提升矽晶電池之射極層(emitter)內部之光伏發電流之傳輸效率。分析實施例1與比較實施例1的IV電性測試的太陽能電池參數資料，具有射極層電流通道網的實施例1雖然開路電壓Voc減少0.6%，卻可以讓發電流密度增加1.7%與發電效率增加2.0%，證明了實施例1的電流通道網可以提升矽晶太陽電池射極層(Emitter)的電流傳輸能力。與比較實施例1相比，本發明實施例1所述的光電元件具有以下優點：(1)電流通道網因為高濃度摻雜具有較低的光伏發電壓，與相鄰低濃度摻雜區較高的光伏發電壓，在幾微米的距離內形成良好的電壓差梯度，驅動射極層(emitter)內的發電流匯集進入電流通道網，(2)電流通道網的高濃度摻雜擴散製程，使得電流通道網具有更低的電阻率與更深的摻雜分佈深度的通電截面積。基於上述功效，本發明所述光電元件的射極層其電流通道網雖然犧牲了局部面積成為較低的光伏發電壓區域，但由於光電元件射極層的電流傳輸效能被提升，因此可達到增加發電流密度(Jsc)與提高光電轉換效率(Eff)的目標。 It can be seen from the above measurement that the solar cell of the present invention is formed by using a high-concentration and low-concentration composite diffusion doping process for the emitter of the photovoltaic element (or solar cell), and the emitter layer. (Emitter) has a low-resistance current channel network formed by high-concentration doping in series, which can make the photovoltaic current generated by the twin-crystal solar cell illumination more systematic without reducing the power generation area. The efficiency of the photovoltaic current generation inside the emitter of the crystal cell is improved. The solar cell parameter data of the IV electrical test of Example 1 and Comparative Example 1 were analyzed. In Example 1 with the emitter layer current channel network, although the open circuit voltage Voc was reduced by 0.6%, the current density was increased by 1.7% and power generation was increased. The efficiency is increased by 2.0%, which proves that the current channel network of Embodiment 1 can improve the current transmission capability of the emitter layer of the twin crystal solar cell. Compared with the comparative example 1, the photoelectric element described in the first embodiment of the present invention has the following advantages: (1) the current channel network has a lower photovoltaic voltage because of high concentration doping, and is compared with the adjacent low concentration doping region. High photovoltaic voltage, forming a good voltage difference gradient within a few micrometers, driving the current in the emitter layer into the current channel network, and (2) the high-concentration doping diffusion process of the current channel network, The current channel network is made to have a lower resistivity and a deeper doping distribution depth of the energized cross-sectional area. Based on the above-mentioned effects, although the current channel network of the emitter layer of the photovoltaic element of the present invention sacrifices the local area to become a lower photovoltaic voltage region, the current transmission efficiency of the emitter layer of the photovoltaic element is improved, so that the current can be increased. Current density (Jsc) and the goal of improving photoelectric conversion efficiency (Eff).
由以上量測可知，本發明所述之太陽能電池，由於該光電元件(或是太陽能電池)的表面具有一阻值較低的電流通道網，可在不減少發電面積的前提下，將照光所產生的電流，有方向性的由矽晶基材傳輸至電極，提升電流的收集效率及降低電流的傳導損耗，提高太陽能電池的整體發電效能。 It can be seen from the above measurement that the solar cell of the present invention has a current channel network with a low resistance value on the surface of the photovoltaic element (or the solar cell), and can be illuminated without reducing the power generation area. The generated current is directionally transmitted from the twinned substrate to the electrode, which improves the collection efficiency of the current and reduces the conduction loss of the current, thereby improving the overall power generation efficiency of the solar cell.
高摻雜濃度與低摻雜濃度矽晶太陽電池元件的開路電壓驗證Open circuit voltage verification of high doping concentration and low doping concentration twin solar cell components
以下為對標準太陽電池的製程進行驗證之對照實驗。低濃度摻雜電池元件製程：以70ohm表面電阻值為擴散條件進行一次擴散的製程，電池元件的開路電壓(Voc)為0.630V；高濃度摻雜電池元件製程：以50ohm的表面電阻值的擴散條件進行二次擴散的製程，電池元件的開路電壓(Voc)為0.626V。接著，將上述兩種摻雜條件的電池元件進行電性量測，結果如如表2。 The following is a control experiment to verify the process of a standard solar cell. Low-concentration doped battery component process: a diffusion process with a surface resistance value of 70 ohm as a diffusion condition, the open circuit voltage (Voc) of the battery element is 0.630 V; high-concentration doped battery component process: diffusion with a surface resistance value of 50 ohm Under the condition that the secondary diffusion process is performed, the open circuit voltage (Voc) of the battery element is 0.626V. Next, the battery elements of the above two doping conditions were electrically measured, and the results are shown in Table 2.
由表2可知，二次擴散摻雜的高濃度摻雜電池元件的開路電壓相對低了-4mV。 As can be seen from Table 2, the open-circuit voltage of the secondary diffusion doped high concentration doped battery element is relatively low by -4 mV.
高摻雜濃度與低重摻雜濃度太陽電池元件的二次離子質譜儀(SIMS)摻雜剖面縱深分析Depth analysis of secondary ion mass spectrometer (SIMS) doping profile of high doping concentration and low heavy doping concentration solar cell components
以二次離子質譜儀(SIMS)對低濃度摻雜電池元件進行二次離子質譜儀(SIMS)摻雜剖面縱深分析，結果如第11圖所示：在深度50(10nm)測得P型載子濃度為1E21、電阻率0.0001ohm-cm(關於電阻率係依據第12圖計算之)；在深度51(42nm)測得P型載子濃度為1E22、電阻率0.001ohm-cm；在深度52(90nm)測得P型載子濃度為1E23、電阻率0.006ohm-cm；在深度53(200nm)測得P型載子濃度為1E23、電阻率0.02ohm-cm；以及，在深度54(260nm)測得P型載子濃度為1E24、電阻率0.1ohm-cm，結果如表3所示。以二次離子質譜儀(SIMS)對高濃度摻雜電池元件進行二次離子質譜儀(SIMS)摻雜剖面縱深分析，結果如第12圖所示：在深度60(25nm)測得P型載子濃度為1E21、電阻率0.0001ohm-cm；在深度61(100nm)測得P型載子濃度為1E20、電阻率0.001ohm-cm；在深度62(200nm)測得P型載子濃度為1E19、電阻率0.006ohm-cm；在深度63(385nm)測得P型載子濃度為1E18、電阻率0.02ohm-cm；以及，在深度64(480nm)測得P型載子濃度為1E17、電阻率0.1ohm-cm，結果如表3所示。 The secondary ion mass spectrometer (SIMS) doping profile depth analysis was performed on the secondary ion mass spectrometer (SIMS) by secondary ion mass spectrometry (SIMS). The results are shown in Fig. 11: P type loading was measured at a depth of 50 (10 nm). The sub-concentration is 1E21, the resistivity is 0.0001 ohm-cm (the resistivity is calculated according to Fig. 12); the P-type carrier concentration is 1E22 and the resistivity is 0.001 ohm-cm measured at a depth of 51 (42 nm); (90 nm) measured P-type carrier concentration of 1E23, resistivity 0.006 ohm-cm; P-type carrier concentration of 1E23, resistivity 0.02 ohm-cm measured at depth 53 (200 nm); and, at depth 54 (260 nm) The P-type carrier concentration was measured as 1E24 and the resistivity was 0.1 ohm-cm. The results are shown in Table 3. The secondary ion mass spectrometer (SIMS) doping profile depth analysis was performed on the high-concentration doped battery element by secondary ion mass spectrometry (SIMS). The results are shown in Fig. 12: P-type load measured at depth 60 (25 nm) The sub-concentration is 1E21, the resistivity is 0.0001 ohm-cm; the P-type carrier concentration is 1E20 and the resistivity is 0.001 ohm-cm measured at a depth of 61 (100 nm); the P-type carrier concentration is 1E19 measured at a depth of 62 (200 nm). The resistivity is 0.006 ohm-cm; the P-type carrier concentration is 1E18 and the resistivity is 0.02 ohm-cm measured at a depth of 63 (385 nm); and the P-type carrier concentration is 1E17 and resistance measured at a depth of 64 (480 nm). The rate was 0.1 ohm-cm, and the results are shown in Table 3.
由表3以及第11及12圖可知，二次擴散的高濃度摻雜的摻雜濃度分佈是一次擴散的低濃度摻雜的摻雜深度的兩倍以上。 As can be seen from Table 3 and Figures 11 and 12, the doping concentration distribution of the high-concentration doping of the secondary diffusion is more than twice the doping depth of the low-concentration doping of the primary diffusion.
矽半導體材料摻雜濃度與電阻值的關係分析Analysis of relationship between doping concentration and resistance value of germanium semiconductor materials
矽半導體摻雜濃度與電阻率研究成果如第13圖所示(資料來源PVeducation)。請參照表4，係為矽半導體摻雜濃度與電阻率之對應關係資料。 The results of doping concentration and resistivity of germanium semiconductors are shown in Figure 13 (source PVeducation). Please refer to Table 4 for the correspondence between doping concentration and resistivity of germanium.
由表3-4及第11-13圖可知，二次擴散的高濃度摻雜製程比起一次擴散的低濃度摻雜製程，最重要的導電率提升關鍵是在二次擴散摻雜製程增加了摻雜濃度大於1E20[atoms/cm3]的低電阻區域的分佈深度。以n-Si的磷(P)摻雜的矽材料而言，摻雜濃度1E21[atoms/cm3]電阻率為0.0001ohm-cm，摻雜濃度1E20[atoms/cm3]的電阻率為0.001ohm-cm。二次擴散的高濃度摻雜的SIMS分析圖(如第12圖)與一次擴散的低濃度摻雜的SIMS分析圖(如第11圖)的分佈深度對導電能力變化的分析如下：(1)摻雜濃度1E21[atoms/cm3](電阻率0.0001ohm-cm)的分佈深度由10nm延伸到25nm，雖只增加15nm的分佈深度，導電能力提升的效果是摻雜濃度1E19[atoms/cm3](電阻率0.006ohm-cm)的分佈深度要增加60x15nm=900nm的分佈深度；電導率是電阻率的倒數(電導率=1/電阻率)，1E21[atoms/cm3]摻雜濃度導電率是1E19[atoms/cm3]摻雜濃度導電率的60倍。(2)同理，摻雜濃度1E20(電阻率0.001ohm-cm)的深度由42nm延伸到100nm，雖然只增加58nm的分布深度，導電能力提升的效果是相當於是摻雜濃度1E19[atoms/cm3](電阻率0.006ohm-cm)的分佈深度要增加6x58nm=348nm的分佈深度。(3)摻雜濃度1E19[atoms/cm3](電阻率0.006ohm-cm)的深度由90nm延伸到200nm，增加110nm的分布深度。由上述結果可知，二次擴散摻雜製程對於導電率提升的貢獻效果依序為(1)>(2)>(3)。本發明具有電流通道網的矽 晶太陽電池之擴散摻雜製程，要提高矽基材的導電能力，關鍵因素在於摻雜濃度大於1E20[atoms/cm3]的高摻雜濃度分佈深度增加量，其中又以大於1E21[atoms/cm3]的高摻雜濃度分佈深度增加量對提高導電率效果最好。 It can be seen from Tables 3-4 and 11-13 that the high-concentration doping process of secondary diffusion is the most important conductivity improvement in the low-density doping process of primary diffusion, which is increased in the secondary diffusion doping process. The distribution depth of the low resistance region having a doping concentration greater than 1E20 [atoms/cm 3 ]. With n-Si phosphorus (P) doped germanium material, the doping concentration 1E21 [atoms/cm 3 ] resistivity is 0.0001 ohm-cm, and the doping concentration 1E20 [atoms/cm 3 ] has a resistivity of 0.001. Ohm-cm. The distribution of the high-concentration doped SIMS analysis of the secondary diffusion (as in Figure 12) and the diffusion concentration of the low-concentration doped SIMS analysis (such as Figure 11) analyzes the change in conductivity as follows: (1) The distribution depth of the doping concentration 1E21 [atoms/cm 3 ] (resistivity 0.0001 ohm-cm) is extended from 10 nm to 25 nm. Although the distribution depth of 15 nm is increased, the effect of the conductivity improvement is the doping concentration 1E19 [atoms/cm 3 The distribution depth (resistance 0.006 ohm-cm) is increased by 60x15nm=900nm; the conductivity is the reciprocal of resistivity (conductivity = 1 / resistivity), 1E21 [atoms / cm 3 ] doping concentration conductivity It is 60 times the conductivity of the 1E19 [atoms/cm 3 ] doping concentration. (2) Similarly, the doping concentration of 1E20 (resistivity 0.001 ohm-cm) extends from 42 nm to 100 nm. Although only the distribution depth of 58 nm is increased, the effect of improving the conductivity is equivalent to the doping concentration of 1E19 [atoms/cm]. The distribution depth of 3 ] (resistivity 0.006 ohm-cm) is increased by 6x58 nm = 348 nm. (3) The depth of the doping concentration 1E19 [atoms/cm 3 ] (resistivity 0.006 ohm-cm) was extended from 90 nm to 200 nm, increasing the distribution depth of 110 nm. It can be seen from the above results that the contribution of the secondary diffusion doping process to the conductivity increase is (1)>(2)>(3). The diffusion doping process of the twin crystal solar cell with current channel network of the invention has the effect of increasing the conductivity of the germanium substrate by a doping concentration of more than 1E20 [atoms/cm 3 ]. Among them, the increase in the depth of the high doping concentration distribution of more than 1E21 [atoms/cm 3 ] is the best for improving the conductivity.
本發明目的之一係提高矽晶太陽電池的射極層(emitter)電流傳輸效率，由第6圖所述之矽晶太陽電池的示意圖可知，矽晶太陽能電池係利用具有PN接面(PN-Junction)的矽半導體基材照射太陽光後造成光電效應(Photovoltaics)激發出游離電子，PN接面(PN-Junction)上層的射極層(Emitter)除了發電的功能，也必須要具有傳輸電流到上電極(第一電極101)的功能。由上述摻雜分佈深度與電阻率的分析可知，增加大於1E20的高摻雜濃度分佈深度可提高射極層的導電率(導電率=1/電阻率)，但是由高摻雜濃度與低摻雜濃度矽晶太陽電池元件的開路電壓驗證可知，較高摻雜濃度與較深分佈的摻雜擴散反而會降低矽晶太陽電池的開路電壓。單一化擴散摻雜的製程無法兼顧導電率與開路電壓，已讓矽晶太陽電池面臨矽半導體材料帶來的射極層摻雜擴散的限制瓶頸。因此，本發明利用抗反射結構中的微米尺寸角錐體形成具有複合式摻雜濃度的角椎體(如第2圖)(角椎體之側面為具有一低摻雜區域，角椎體之側邊區域為一高摻雜區域)，而該複數個角錐之高摻雜區域係相互接觸並構成一電流通道網(如第3圖)。由高摻雜濃度與低摻雜濃度矽晶太陽電池元件的開路電壓驗證分析可知，雖然高濃度與低濃度摻雜的電池元件之開路電壓(Voc)雖然只相差-4mV，但是將此種高濃度摻雜PN-Junction與低濃度摻雜PN-Junction縮小成 結合在具有複合式摻雜濃度的微米尺寸的角椎體中。高濃度與低摻雜濃度兩種PN-Juntion的光伏電壓差雖然很小(-4mV)，因為角錐體的大小尺寸僅介於3um~20um。以能量理論的觀點，高濃度與低摻雜濃度兩種PN-Juntion將形成良好電壓差梯度。換言之，射極層中多了第二驅動力驅動發電流往電流通道網進行匯集傳輸，電流通道網設計上是具有較深分佈的高摻雜濃度(>1E20[atoms/cm3])之低電阻傳導通道。另一方面，本發明的矽晶太陽電池射極層利用電池元件表面的抗反射微米角椎體的幾何結構，成功的製造成複合式的高濃度與低濃度並存的複合式摻雜擴散之射極層，大幅提升矽晶太陽電池的射極層(emitter)之電流傳導效率，達到提高矽晶太陽電池發電效率與發電流密度的目標。 One of the objects of the present invention is to improve the emitter current transmission efficiency of a twinned solar cell. As can be seen from the schematic diagram of the twinned solar cell described in FIG. 6, the twinned solar cell utilizes a PN junction (PN- Junction's germanium semiconductor substrate emits sunlight, causing photoelectric effect (Photovoltaics) to excite free electrons. The emitter layer of the upper layer of the PN junction (PN-Junction) must have a transfer current to the function of generating electricity. The function of the upper electrode (first electrode 101). From the above analysis of the doping profile depth and resistivity, it can be seen that increasing the depth of the high doping concentration distribution greater than 1E20 can increase the conductivity of the emitter layer (conductivity = 1 / resistivity), but by high doping concentration and low doping The open circuit voltage verification of the hetero-concentrated twin solar cell component shows that the higher doping concentration and the deeper doping diffusion will reduce the open circuit voltage of the twinned solar cell. The process of singular diffusion doping can not take into account the conductivity and open circuit voltage, which has caused the twinned solar cell to face the bottleneck of the doping diffusion of the emitter layer caused by the germanium semiconductor material. Therefore, the present invention utilizes micron-sized pyramids in an anti-reflective structure to form an angular vertebral body having a composite doping concentration (as shown in Fig. 2) (the side of the vertebral body has a low doped region, the side of the vertebral body The edge region is a highly doped region, and the high doped regions of the plurality of pyramids are in contact with one another and form a current channel network (as shown in FIG. 3). From the open circuit voltage verification analysis of the high doping concentration and the low doping concentration twin solar cell component, it is known that although the open circuit voltage (Voc) of the high concentration and low concentration doped battery elements differs by only -4 mV, this is high. The concentration-doped PN-Junction is reduced in combination with a low-concentration doped PN-Junction in a micro-sized angular vertebral body having a composite doping concentration. The high voltage concentration and low doping concentration of the two PN-Juntion photovoltaic voltage difference is small (-4mV), because the size of the pyramid is only between 3um~20um. From the energy theory point of view, both high and low doping concentrations of PN-Juntion will form a good voltage difference gradient. In other words, the second driving force in the emitter layer drives the current to be collected and transmitted to the current channel network. The current channel network is designed to have a deep distribution of high doping concentration (>1E20[atoms/cm 3 ]). Resistance conduction channel. On the other hand, the twin-crystal solar cell emitter layer of the present invention successfully utilizes the geometry of the anti-reflective micro-horned vertebral body on the surface of the battery element to successfully produce a composite high-concentration and low-concentration composite doping diffusion shot. The polar layer greatly enhances the current conduction efficiency of the emitter of the twin crystal solar cell, and achieves the goal of improving the power generation efficiency and current density of the twin solar cell.
雖然本發明已以數個較佳實施例揭露如上，然其並非用以限定本發明，任何所屬技術領域中具有通常知識者，在不脫離本發明之精神和範圍內，當可作任意之更動與潤飾，因此本發明之保護範圍當視後附之申請專利範圍所界定者為準。 While the invention has been described above in terms of several preferred embodiments, it is not intended to limit the scope of the present invention, and any one of ordinary skill in the art can make any changes without departing from the spirit and scope of the invention. And the scope of the present invention is defined by the scope of the appended claims.
10‧‧‧光電元件 10‧‧‧Optoelectronic components
11‧‧‧上表面 11‧‧‧ upper surface
12‧‧‧矽晶基材 12‧‧‧Crystal substrate
13‧‧‧下表面 13‧‧‧ Lower surface
16‧‧‧角錐 16‧‧‧Corner
111‧‧‧第一粗化結構 111‧‧‧First roughening structure
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