TW201610953A - Dynamically adjusting display driving method and display apparatus using the same - Google Patents
Dynamically adjusting display driving method and display apparatus using the same Download PDFInfo
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Abstract
Description
本發明係關於動態調整顯示驅動方法與應用此方法的顯示裝置，特別是關於一種動態地降低顯示畫面更新率的顯示驅動方法與應用此方法的顯示裝置。 The present invention relates to a dynamic adjustment display driving method and a display device to which the method is applied, and more particularly to a display driving method for dynamically reducing a display screen update rate and a display device to which the method is applied.
習知顯示裝置之資料驅動器及掃描驅動器分別提供資料及掃描訊號至顯示面板。現今顯示裝置因製程改善使電晶體元件特性較佳，若是畫素之前後畫面的顯示資料無實質上差異，可降低更新畫面更新頻率，達到省電效能，亦可防止元件過度使用。然而現有降低畫面更新頻率的方式係為固定頻率降低更新次數，且時序控制器、資料驅動器、及掃描驅動器仍維持正常運作模式，可降低的省電效能有限。因而如何在不影響使用者的視覺體驗的狀況下，降低整體顯示裝置所消耗的能量，是一個有待克服的課題。 The data driver and the scan driver of the conventional display device respectively provide data and scan signals to the display panel. Nowadays, the display device has better transistor component characteristics due to process improvement. If there is no substantial difference in the display data of the screen before and after the pixel, the update screen update frequency can be reduced, the power saving performance can be reduced, and the component can be prevented from being overused. However, the existing method of reducing the picture update frequency is to fix the frequency to reduce the number of updates, and the timing controller, the data driver, and the scan driver still maintain the normal operation mode, and the power saving performance can be reduced. Therefore, how to reduce the energy consumed by the overall display device without affecting the user's visual experience is a problem to be overcome.
依據本發明一個或多個實施例所揭露的一種動態調整顯示驅動方法包含：依序接收多個訊框的資料、輸出前述多個訊框中一個第一訊框的資料至源極驅動器、比較第一訊框的資料 與前述多個訊框中在第一訊框之後的一個第二訊框的資料是否實質上相同、當第二訊框的資料與第一訊框的資料實質上相同，依據顯示維持時間調整源極致能訊號的電壓位準，使源極驅動器位於工作模式與閒置模式其中之一。 A dynamic adjustment display driving method according to one or more embodiments of the present invention includes: sequentially receiving data of a plurality of frames, outputting data of a first frame in the plurality of frames to a source driver, and comparing First frame information Whether the data of a second frame behind the first frame in the plurality of frames is substantially the same, and the data of the second frame is substantially the same as the data of the first frame, and the source is adjusted according to the display maintenance time. The voltage level of the extreme signal causes the source driver to be in one of the active mode and the idle mode.
依據本發明一個或多個實施例所揭露的一種可動態調整顯示畫面的顯示裝置，具有一個顯示面板，此顯示裝置包含源極驅動器與時序控制器。其中源極驅動器電性連接至前述顯示面板，用以依據源極致能訊號的電壓位準而位於工作模式與閒置模式其中之一，當源極驅動器位於工作模式時，源極驅動器依據源極控制訊號與顯示資料驅動顯示面板。而時序控制器電性連接至源極驅動器，用以依序接收多個訊框的資料，將其中一個第一訊框的資料傳送至源極驅動器做為顯示資料，並比較第一訊框的資料與前述多個訊框中在第一訊框之後的一個第二訊框的資料。當第一訊框的資料與第二訊框的資料實質上相同時，時序控制器依據一個顯示維持時間選擇性地調整源極致能訊號的電壓位準，並選擇性地前述源極控制訊號至源極驅動器，並且輸出第二訊框的資料至源極驅動器作為顯示資料以驅動顯示面板。其中源極致能訊號係用以控制源極驅動器中至少部份電路。 A display device capable of dynamically adjusting a display screen according to one or more embodiments of the present invention has a display panel including a source driver and a timing controller. The source driver is electrically connected to the display panel, and is located in one of an operating mode and an idle mode according to a voltage level of the source enable signal. When the source driver is in the working mode, the source driver is controlled according to the source. Signal and display data drive display panel. The timing controller is electrically connected to the source driver for sequentially receiving data of the plurality of frames, and transmitting the data of one of the first frames to the source driver as the display data, and comparing the first frame. The data and the data of a second frame behind the first frame in the plurality of frames. When the data of the first frame is substantially the same as the data of the second frame, the timing controller selectively adjusts the voltage level of the source enable signal according to a display maintaining time, and selectively selects the source control signal to The source driver outputs the data of the second frame to the source driver as a display material to drive the display panel. The source enable signal is used to control at least part of the circuit in the source driver.
藉由本發明之一實施例所揭露的時序控制器，時序控制器依據顯示資料內容使得源極驅動器與閘極驅動器執行動態更新，而非遵循某特定更新頻率。因此，當連續多個訊框被判斷為實質上相同且顯示維持時間還沒到上限時，時序控制器會使 源極驅動器與閘極驅動器不更新顯示畫面。而當訊框與當前顯示畫面的內容不同，或是當顯示維持時間到達上限時，時序控制器會控制源極驅動器與閘極驅動器更新顯示畫面。總而言之，本發明所揭示的時序控制器只在有需要的時候更新顯示畫面，因此大幅度的降低更新畫面所消耗的能量。 With the timing controller disclosed in one embodiment of the present invention, the timing controller causes the source driver and the gate driver to perform dynamic update according to the displayed data content, instead of following a certain update frequency. Therefore, when a plurality of consecutive frames are judged to be substantially the same and the display holding time has not reached the upper limit, the timing controller will The source driver and the gate driver do not update the display. When the frame is different from the content of the current display, or when the display maintenance time reaches the upper limit, the timing controller controls the source driver and the gate driver to update the display. In summary, the timing controller disclosed by the present invention updates the display screen only when necessary, thereby greatly reducing the energy consumed to update the screen.
以上之關於本發明內容之說明及以下之實施方式之說明係用以示範與解釋本發明之精神與原理，並且提供本發明之專利申請範圍更進一步之解釋。 The above description of the present invention and the following description of the embodiments of the present invention are intended to illustrate and explain the spirit and principles of the invention.
1000‧‧‧顯示裝置 1000‧‧‧ display device
1100‧‧‧顯示面板 1100‧‧‧ display panel
1200‧‧‧源極驅動器 1200‧‧‧Source Driver
1210‧‧‧核心運算單元 1210‧‧‧ Core Computing Unit
1220‧‧‧移位暫存器 1220‧‧‧Shift register
1230‧‧‧暫存器 1230‧‧‧ register
1240‧‧‧拴鎖器 1240‧‧‧拴Locker
1250‧‧‧位準移位器 1250‧‧‧ Position shifter
1260‧‧‧數位類比轉換器 1260‧‧‧Digital Analog Converter
1270‧‧‧輸出緩衝器 1270‧‧‧Output buffer
1271‧‧‧電流鏡 1271‧‧‧current mirror
1300‧‧‧閘極驅動器 1300‧‧ ‧ gate driver
1400‧‧‧時序控制器 1400‧‧‧ timing controller
1410‧‧‧暫存模組 1410‧‧‧Scratch module
1430‧‧‧計時模組 1430‧‧‧Time Module
1450‧‧‧比較模組 1450‧‧‧Comparative Module
1470‧‧‧更新選擇模組 1470‧‧‧Update selection module
1490‧‧‧處理模組 1490‧‧‧Processing module
T1~T4‧‧‧時間點 T 1 ~T 4 ‧‧‧ time
POL‧‧‧極性訊號 POL‧‧‧polar signal
CLKR‧‧‧時脈訊號 CLK R ‧‧‧ clock signal
DATA‧‧‧顯示資料 DATA‧‧‧Display information
XSTB‧‧‧源極控制訊號 XSTB‧‧‧ source control signal
SOURCE_EN‧‧‧源極致能訊號 SOURCE_EN‧‧‧Source enable signal
GATE_CTRL‧‧‧閘極控制訊號 GATE_CTRL‧‧‧ gate control signal
T_KEEP‧‧‧顯示維持時間 T_KEEP‧‧‧ shows maintenance time
FRAME、FRAME1~FRAME4‧‧‧訊框 FRAME, FRAME1~FRAME4‧‧‧ frame
VCOMP‧‧‧比較訊號 VCOMP‧‧‧ comparison signal
第1圖係依據本發明一實施例的顯示裝置功能方塊圖。 1 is a functional block diagram of a display device in accordance with an embodiment of the present invention.
第2圖係依據本發明一實施例中的源極驅動器的功能方塊圖。 Figure 2 is a functional block diagram of a source driver in accordance with an embodiment of the present invention.
第3圖係依據本發明一實施例的時序控制器的功能方塊圖。 Figure 3 is a functional block diagram of a timing controller in accordance with an embodiment of the present invention.
第4圖係依據本發明一實施例之訊號時序圖。 Figure 4 is a timing diagram of signals in accordance with an embodiment of the present invention.
第5圖係依據本發明一實施例的動態調整顯示驅動方法流程圖。 Figure 5 is a flow chart of a dynamic adjustment display driving method in accordance with an embodiment of the present invention.
以下在實施方式中詳細敘述本發明之詳細特徵以及優點，其內容足以使任何熟習相關技藝者了解本發明之技術內容並據以實施，且根據本說明書所揭露之內容、申請專利範圍及圖式，任何熟習相關技藝者可輕易地理解本發明相關之目的及優點。以下之實施例係進一步詳細說明本發明之觀點，但非以任何 觀點限制本發明之範疇。 The detailed features and advantages of the present invention are set forth in the Detailed Description of the Detailed Description of the <RTIgt; </ RTI> <RTIgt; </ RTI> </ RTI> </ RTI> <RTIgt; The objects and advantages associated with the present invention can be readily understood by those skilled in the art. The following examples are intended to further illustrate the aspects of the invention, but not any The views limit the scope of the invention.
依據本發明一個實施例所揭露的一種可動態調整顯示畫面的顯示驅動方法所應用之顯示裝置，請參照第1圖，其係依據本發明一實施例的顯示裝置功能方塊圖。如第1圖所示，顯示裝置1000具有顯示面板1100，並且顯示裝置1000包含源極驅動器1200、閘極驅動器1300與時序控制器1400。其中源極驅動器1200電性連接至顯示面板1100，而時序控制器1400電性連接至源極驅動器1200及閘極驅動器1300。 A display device to which a display driving method for dynamically adjusting a display screen is applied according to an embodiment of the present invention is referred to FIG. 1 , which is a functional block diagram of a display device according to an embodiment of the present invention. As shown in FIG. 1, the display device 1000 has a display panel 1100, and the display device 1000 includes a source driver 1200, a gate driver 1300, and a timing controller 1400. The source driver 1200 is electrically connected to the display panel 1100 , and the timing controller 1400 is electrically connected to the source driver 1200 and the gate driver 1300 .
源極驅動器1200用以依據源極控制訊號與顯示資料驅動顯示面板。於本發明一個實施例中，請參照第2圖，其係依據本發明一實施例中的源極驅動器的功能方塊圖。如第2圖的實施例所示，源極驅動器1200可以包括核心運算單元1210、移位暫存器1220、暫存器1230、拴鎖器1240、位準移位器1250、數位類比轉換器1260與緩衝器1270。其中核心運算單元1210在被致能時，如果收到顯示資料DATA與源極控制訊號XSTB，核心運算單元1210將顯示資料DATA經過運算後，驅動移位暫存器1220、暫存器1230、拴鎖器1240與緩衝器1270。更明確來說，核心運算單元1210可依據顯示資料DATA提供時脈訊號CLKR給移位暫存器1220、暫存器1230與拴鎖器1240。並且核心運算單元1210將顯示資料DATA傳送給暫存器1230，核心運算單元1210提供極性訊號POL給緩衝器1270。 The source driver 1200 is configured to drive the display panel according to the source control signal and the display data. In one embodiment of the present invention, please refer to FIG. 2, which is a functional block diagram of a source driver in accordance with an embodiment of the present invention. As shown in the embodiment of FIG. 2, the source driver 1200 may include a core operation unit 1210, a shift register 1220, a register 1230, a shackle 1240, a level shifter 1250, and a digital analog converter 1260. With buffer 1270. When the core operation unit 1210 is enabled, if the display data DATA and the source control signal XSTB are received, the core operation unit 1210 drives the shift register 1220, the register 1230, and the 显示 after the display data DATA is subjected to the operation. The latch 1240 is coupled to the buffer 1270. More specifically, the core operation unit 1210 can provide the clock signal CLKR to the shift register 1220, the register 1230, and the shackle 1240 according to the display data DATA. And the core operation unit 1210 transfers the display data DATA to the register 1230, and the core operation unit 1210 provides the polarity signal POL to the buffer 1270.
當時脈訊號CLKR被傳送給移位暫存器1220時，移 位暫存器1220中的電路會在時脈訊號CLKR的每個週期都作動而調整多個輸出訊號的電壓位準。每次的作動都會需要電源(未繪示)提供所需之電量，也會將電荷釋放到固定位準，可例如是接地(ground)，從而增加能量消耗。因此如果時脈訊號CLKR的電壓位準沒有變動，則移位暫存器1220消耗的能量將會降到最低(較佳的狀況僅有靜態漏電流)。 When the clock signal CLK R is transmitted to the shift register 1220, shift register 1220 are actuated and circuitry to adjust the voltage level of the plurality of output signals in each cycle of the clock signal CLK R. Each actuation will require a power source (not shown) to provide the required amount of power, and will also release the charge to a fixed level, such as ground, thereby increasing energy consumption. Therefore, if the voltage level of the clock signal CLK R does not change, the energy consumed by the shift register 1220 will be minimized (the preferred condition is only static leakage current).
暫存器1230依據移位暫存器1220的多個輸出訊號、來自核心運算單元1210的顯示資料DATA與時脈訊號CLKR，來選擇性地暫存顯示資料DATA及/或輸出所暫存的資料。因此，如果移位暫存器1220的多個輸出訊號、來自核心運算單元1210的顯示資料DATA與時脈訊號CLKR有變化(也就是電壓位準變動)，則暫存器1230中的多個電晶體會從電源汲取電荷，也會將電荷釋放到地，從而消耗能量。因此如果移位暫存器1220的多個輸出訊號、來自核心運算單元1210的顯示資料DATA與時脈訊號CLKR的電壓位準沒有變動，則暫存器1230所消耗的能量會降到最低。舉例而言，於一較佳實施例，可僅有靜態漏電流的能量消耗。 The register 1230 selectively stores the display data DATA and/or the output temporarily stored according to the plurality of output signals of the shift register 1220, the display data DATA from the core operation unit 1210, and the clock signal CLK R . data. Therefore, if the plurality of output signals of the shift register 1220, the display data DATA from the core operation unit 1210, and the clock signal CLK R change (that is, the voltage level changes), the plurality of registers 1230 The transistor draws charge from the power supply and also discharges the charge to ground, consuming energy. Therefore, if the voltage levels of the plurality of output signals of the shift register 1220, the display data DATA from the core operation unit 1210, and the clock signal CLK R are not changed, the energy consumed by the register 1230 is minimized. For example, in a preferred embodiment, there may be only energy consumption of static leakage current.
拴鎖器1240用來接收並拴鎖暫存器1230的多組輸出訊號。核心運算單元1210、移位暫存器1220、暫存器1230與拴鎖器1240的電路基本上可以全部由電晶體所組成，而輸入、暫存、拴鎖及輸出的訊號基本上也只有兩種電壓位準，例如高數位電壓位準(通常在系統中標示為VDDD)與低數位電壓位準(通常 在系統中標示為GNDD)，因此前述核心運算單元1210、移位暫存器1220、暫存器1230與拴鎖器1240的電路基本上可以統稱數位電路。且其中高數位電壓位準的電壓值可以是大於0伏特。 The shackle 1240 is configured to receive and lock the plurality of sets of output signals of the register 1230. The circuits of the core arithmetic unit 1210, the shift register 1220, the register 1230 and the latch 1240 can basically be composed entirely of transistors, and the signals for input, temporary storage, shackle and output are basically only two. Voltage levels, such as high digital voltage levels (usually labeled VDD D in the system) and low digital voltage levels (usually labeled GND D in the system), thus the aforementioned core arithmetic unit 1210, shift register 1220. The circuits of the register 1230 and the latch 1240 can be collectively referred to collectively as digital circuits. And the voltage value of the high digit voltage level may be greater than 0 volts.
而位準移位器1250從拴鎖器1240接收多組被拴鎖的訊號，並且調整這些訊號的電壓位準，使被調整過的訊號的電壓位準適於用來控制數位類比轉換器1260，於一較佳實施例中，可以是電阻式數位類比轉換器。而數位類比轉換器1260依據這些被調整過的訊號來輸出多個類比訊號。這些類比訊號經由輸出緩衝器1270，輸出至顯示面板1100，藉此，顯示裝置1000將顯示資料DATA轉換為顯示面板1100上所呈現的影像。 The level shifter 1250 receives a plurality of sets of latched signals from the latch 1240, and adjusts the voltage levels of the signals so that the voltage level of the adjusted signals is suitable for controlling the digital analog converter 1260. In a preferred embodiment, it may be a resistive digital analog converter. The digital analog converter 1260 outputs a plurality of analog signals based on the adjusted signals. These analog signals are output to the display panel 1100 via the output buffer 1270, whereby the display device 1000 converts the display material DATA into an image presented on the display panel 1100.
其中，於本發明一實施例中，位準移位器1250以及輸出緩衝器1270中的電流鏡1271基本上可以由多個電晶體組成，因此從停能(disable)的狀態被致能(enable)進入正常工作狀態所需要的時間通常僅需幾微秒(micro second,us)。因此，如果在不需要更新顯示畫面的時候，時序控制器1400將源極致能訊號SOURCE_EN的電壓位準調整至低電壓，使位準移位器1250以及輸出緩衝器1270中的電流鏡1271停能並停止輸出顯示資料DATA及源極控制訊號XSTB，則這些電路以及移位暫存器1220、暫存器1230與拴鎖器1240都可以降低所消耗的能量，換句話說，就是讓源極驅動器1200位於閒置模式。且在需要更新顯示畫面的時候，時序控制器1400再將源極致能訊號SOURCE_EN的電壓位準調整至高電壓，用以致能核心運算單元1210、位準移 位器1250以及輸出緩衝器1270中的電流鏡1271，則可以很快的讓整個源極驅動器1200恢復正常運作，換句話說，就是讓源極驅動器1200位於工作模式。 Wherein, in an embodiment of the invention, the level shifter 1250 and the current mirror 1271 in the output buffer 1270 can basically be composed of a plurality of transistors, so that it is enabled from a disabled state (enable) The time required to enter normal operation usually takes only a few microseconds (micro second, us). Therefore, if the timing controller 1400 adjusts the voltage level of the source enable signal SOURCE_EN to a low voltage when the display screen is not required to be updated, the current mirror 1271 in the level shifter 1250 and the output buffer 1270 is disabled. And stop outputting the display data DATA and the source control signal XSTB, then these circuits and the shift register 1220, the register 1230 and the shackle 1240 can reduce the energy consumed, in other words, the source driver The 1200 is in idle mode. When the display screen needs to be updated, the timing controller 1400 adjusts the voltage level of the source enable signal SOURCE_EN to a high voltage to enable the core operation unit 1210 and the level shift. The bitper 1250 and the current mirror 1271 in the output buffer 1270 can quickly return the entire source driver 1200 to normal operation, in other words, the source driver 1200 is placed in the operating mode.
時序控制器1400用以依序接收多個訊框的資料，將其中一個第一訊框的資料傳送至源極驅動器做為顯示資料DATA，並比較第一訊框的資料與前述多個訊框中在第一訊框之後的一個第二訊框的資料。當第一訊框的資料與第二訊框的資料實質上相同時，時序控制器依據一個顯示維持時間選擇性地調整源極致能訊號的電壓位準並輸出前述源極控制訊號，並且輸出第二訊框的資料至源極驅動器作為顯示資料DATA以驅動顯示面板。其中源極致能訊號SOURCE_EN係用以致能或停能源極驅動器1200中至少部份電路，更明確的說，源極致能訊號SOURCE_EN用來選擇性地致能或停能位準移位器1250以及輸出緩衝器1270中的電流鏡1271。 The timing controller 1400 is configured to sequentially receive data of a plurality of frames, and transmit data of one of the first frames to the source driver as the display data DATA, and compare the data of the first frame with the plurality of frames. The data of a second frame after the first frame. When the data of the first frame is substantially the same as the data of the second frame, the timing controller selectively adjusts the voltage level of the source enable signal according to a display maintaining time and outputs the source control signal, and outputs the first The data of the second frame is used as the display data DATA to drive the display panel. The source enable signal SOURCE_EN is used to enable or disable at least part of the circuit of the energy source driver 1200. More specifically, the source enable signal SOURCE_EN is used to selectively enable or disable the level shifter 1250 and the output. Current mirror 1271 in buffer 1270.
具體來說，請參照第3圖，其係依據本發明一實施例的時序控制器的功能方塊圖。如第3圖所示，時序控制器1400可以包括暫存模組1410、計時模組1430、比較模組1450、更新選擇模組1470與處理模組1490。其中比較模組1450電性連接至暫存模組1410，更新選擇模組1470電性連接至比較模組1450與計時模組1430，而處理模組1490電性連接至更新選擇模組1470、暫存模組1410與源極驅動器1200。 Specifically, please refer to FIG. 3, which is a functional block diagram of a timing controller according to an embodiment of the present invention. As shown in FIG. 3, the timing controller 1400 can include a temporary storage module 1410, a timing module 1430, a comparison module 1450, an update selection module 1470, and a processing module 1490. The comparison module 1450 is electrically connected to the temporary storage module 1410, the update selection module 1470 is electrically connected to the comparison module 1450 and the timing module 1430, and the processing module 1490 is electrically connected to the update selection module 1470. The memory module 1410 is connected to the source driver 1200.
暫存模組1410用來暫時儲存時序控制器1400所接 收的多個訊框。於一個實施例中，暫存模組1410可以是一個先進先出(first in first out,FIFO)暫存器，且暫存模組1410可以只用來儲存「兩個」訊框的資料。舉例來說，當連續五個訊框被時序控制器1400所接收，首先進入時序控制器1400的是第一訊框FRAME1，依據本發明前述的實施例，第一訊框FRAME1被輸出給源極驅動器1200。當第一訊框FRAME1被輸出至源極驅動器1200時，暫存模組1410同時暫存了第一訊框FRAME1的資料。此時，計時模組1430將顯示維持時間T_KEEP歸零重新開始計時。而後當第二訊框進入時序控制器1400時，第二訊框FRAME2的資料也暫存於暫存模組1410。而後比較模組1450把第一訊框FRAME1的資料與第二訊框FRAME2的資料進行比較以調整比較訊號VCOMP的電壓位準。舉例來說，當第一訊框FRAME1的資料與第二訊框FRAME2的資料實質上相同時，比較訊號VCOMP的電壓位準為高電壓，反之比較訊號VCOMP的電壓位準則為低電壓。 The temporary storage module 1410 is configured to temporarily store the timing controller 1400 Receive multiple frames. In one embodiment, the temporary storage module 1410 can be a first in first out (FIFO) register, and the temporary storage module 1410 can only store data of the "two" frames. For example, when five consecutive frames are received by the timing controller 1400, the first frame FRAME1 is first entered into the timing controller 1400. According to the foregoing embodiment of the present invention, the first frame FRAME1 is output to the source driver. 1200. When the first frame FRAME1 is output to the source driver 1200, the temporary storage module 1410 temporarily stores the data of the first frame FRAME1. At this time, the timing module 1430 resets the display maintenance time T_KEEP to zero to restart the timing. Then, when the second frame enters the timing controller 1400, the data of the second frame FRAME2 is temporarily stored in the temporary storage module 1410. The comparison module 1450 compares the data of the first frame FRAME1 with the data of the second frame FRAME2 to adjust the voltage level of the comparison signal VCOMP. For example, when the data of the first frame FRAME1 is substantially the same as the data of the second frame FRAME2, the voltage level of the comparison signal VCOMP is a high voltage, and the voltage level criterion of the comparison signal VCOMP is a low voltage.
當第二訊框FRAME2的資料與第一訊框FRAME1的資料實質上相同，而要接收第三訊框FRAME3時，第一訊框FRAME1可以被從暫存模組1410中移除，因為把第三訊框FRAME3的資料與第二訊框FRAME2的資料做比較等同於把第三訊框FRAME3的資料與第一訊框FRAME1的資料做比較。此外，當第二訊框FRAME2的資料與第一訊框FRAME1的資料實質上不同時，更新選擇模組1470會由比較訊號VCOMP而決定要 把第二訊框FRAME2的資料輸出至源極驅動器1200，並且計時模組1430會把顯示維持時間T_KEEP歸零重新計時。此時，當接收第三訊框FRAME3時，第三訊框FRAME3就必須要被拿來跟第二訊框FRAME2做比較來決定要不要輸出第三訊框FRAME3。當更新選擇模組1470決定要把第三訊框FRAME3輸出給源極驅動器1200時，處理模組1490會源極致能訊號SOURCE_EN的電壓位準調整至高電壓以使源極驅動器1200進入工作模式，並且處理模組1490會將第三訊框FRAME3的資料與源極控制訊號XSTB一併輸出至源極驅動器1200，並輸出閘極控制訊號至閘極驅動器1300以使顯示畫面更新。 When the data of the second frame FRAME2 is substantially the same as the data of the first frame FRAME1, and the third frame FRAME3 is to be received, the first frame FRAME1 can be removed from the temporary storage module 1410 because Comparing the data of the three-frame FRAME3 with the data of the second frame FRAME2 is equivalent to comparing the data of the third frame FRAME3 with the data of the first frame FRAME1. In addition, when the data of the second frame FRAME2 is substantially different from the data of the first frame FRAME1, the update selection module 1470 is determined by the comparison signal VCOMP. The data of the second frame FRAME2 is output to the source driver 1200, and the timing module 1430 resets the display maintenance time T_KEEP to zero. At this time, when receiving the third frame FRAME3, the third frame FRAME3 must be compared with the second frame FRAME2 to decide whether or not to output the third frame FRAME3. When the update selection module 1470 determines that the third frame FRAME3 is to be output to the source driver 1200, the processing module 1490 adjusts the voltage level of the source enable signal SOURCE_EN to a high voltage to bring the source driver 1200 into the working mode, and processes The module 1490 outputs the data of the third frame FRAME3 together with the source control signal XSTB to the source driver 1200, and outputs a gate control signal to the gate driver 1300 to update the display screen.
以下以各訊號的時序圖來解釋本發明所揭示的時序控制器的運作狀態。請參照第4圖，其係依據本發明一實施例中各訊號的時序圖。如第4圖中訊框訊號FRAME的變化所示，在第1時間點T1，時序控制器1400完整的接收到了第一訊框FRAME1的資料。由於之前還沒有收到任何其他的訊框，因此暫存模組1410中所儲存的是一個「空訊框」的資料，更精確的說，暫存模組1410中所儲存的資料可以是對應於一個空白畫面(全黑)，或是對應於一個雜訊畫面。此時比較模組1450把第一訊框的資料與暫存模組1410中的空訊框做比較，發現第一訊框的資料與空訊框的資料不同，因此把比較訊號VCOMP的電壓位準調整至低電壓一小段時間(由第4圖中可以看出比較訊號VCOMP的電壓位準有一個低電壓區間)。更新選擇模組1470因此控制處理 模組1490將源極致能訊號SOURCE_EN的電壓位準調至高電壓，以致能源極驅動器1200中的位準移位器1250以及輸出緩衝器1270中的電流鏡1271，換句話說，就是使源極驅動器1200位於工作模式。並且處理模組1490把源極控制訊號XSTB送至源極驅動器1200也把第一訊框FRAME1的資料作為顯示資料DATA送至源極驅動器1200，並輸出閘極控制訊號GATE_CTRL至閘極驅動器1300令顯示畫面更新。同時，計時模組1430開始計算顯示維持時間T_KEEP，於一較佳實施例中，計時模組1430可以是累加顯示維持時間T_KEEP。 The operation state of the timing controller disclosed by the present invention will be explained below with a timing chart of each signal. Please refer to FIG. 4, which is a timing diagram of signals according to an embodiment of the present invention. 4. As FIG change information frame signal FRAME is, in the first time point T 1, the timing controller 1400 receives complete information on the first information frame FRAME1. Since no other frames have been received before, the data stored in the temporary storage module 1410 is a "air frame". More precisely, the data stored in the temporary storage module 1410 can be corresponding. On a blank screen (all black), or corresponding to a noise screen. At this time, the comparison module 1450 compares the data of the first frame with the blank frame in the temporary storage module 1410, and finds that the data of the first frame is different from the data of the blank frame, so the voltage level of the comparison signal VCOMP is compared. Quasi-adjust to low voltage for a short period of time (as can be seen from Figure 4, there is a low voltage range for the voltage level of the comparison signal VCOMP). The update selection module 1470 thus controls the processing module 1490 to adjust the voltage level of the source enable signal SOURCE_EN to a high voltage, so that the level shifter 1250 in the energy source driver 1200 and the current mirror 1271 in the output buffer 1270 are replaced. In other words, the source driver 1200 is placed in the operating mode. The processing module 1490 sends the source control signal XSTB to the source driver 1200, and also sends the data of the first frame FRAME1 as the display data DATA to the source driver 1200, and outputs the gate control signal GATE_CTRL to the gate driver 1300. Display screen updates. At the same time, the timing module 1430 begins to calculate the display maintenance time T_KEEP. In a preferred embodiment, the timing module 1430 can be the cumulative display maintenance time T_KEEP.
接著在第二時間點T2時序控制器1400完整的接收到了第二訊框FRAME2的資料。因此第二訊框FRAME2的資料也被暫存至暫存模組1410中。比較模組1450把第二訊框FRAME2的資料與暫存在暫存模組1410中的第一訊框FRAME1的資料進行比較。舉例來說，可以對第一訊框FRAME1的資料與第二訊框FRAME2的資料進行逐位元比較，當有一定數量或一定比例的資料(例如100個畫素所對應的資料)不同時，比較模組1450才判斷第一訊框FRAME1的資料與第二訊框FRAME2的資料實質上不同，如果第二訊框FRAME2的資料相較於第一訊框FRAME1的資料，只有個位數個畫素所對應的資料不同，則會被判斷為實質相同。於此實施例中，第二訊框FRAME2的資料與第一訊框FRAME1的資料實質上相同。因此比較模組1450不會調整比較訊號VCOMP的輸出位準，而且由於確知源極驅動器1200可以無 需更新顯示面板1100上的顯示畫面，因此更新選擇模組1470可以控制處理模組1490將源極致能訊號SOURCE_EN的電壓位準調至低電壓，以停能源極驅動器1200中的位準移位器1250以及輸出緩衝器1270中的電流鏡1271。並且處理模組1490不輸出源極控制訊號XSTB、顯示資料DATA、與閘極控制訊號GATE_CTRL。而計時模組1430繼續累加顯示維持時間T_KEEP。 Then at the second time point T 2 , the timing controller 1400 completely receives the data of the second frame FRAME2. Therefore, the data of the second frame FRAME2 is also temporarily stored in the temporary storage module 1410. The comparison module 1450 compares the data of the second frame FRAME2 with the data of the first frame FRAME1 temporarily stored in the temporary storage module 1410. For example, the data of the first frame FRAME1 and the data of the second frame FRAME2 can be compared bit by bit. When a certain amount or a certain proportion of data (for example, data corresponding to 100 pixels) is different, The comparison module 1450 determines that the data of the first frame FRAME1 is substantially different from the data of the second frame FRAME2. If the data of the second frame FRAME2 is compared with the data of the first frame FRAME1, only a single digit is drawn. If the information corresponding to the prime is different, it will be judged to be substantially the same. In this embodiment, the data of the second frame FRAME2 is substantially the same as the data of the first frame FRAME1. Therefore, the comparison module 1450 does not adjust the output level of the comparison signal VCOMP, and since it is known that the source driver 1200 does not need to update the display screen on the display panel 1100, the update selection module 1470 can control the processing module 1490 to enable the source. The voltage level of the signal SOURCE_EN is adjusted to a low voltage to stop the level shifter 1250 in the energy source driver 1200 and the current mirror 1271 in the output buffer 1270. The processing module 1490 does not output the source control signal XSTB, the display data DATA, and the gate control signal GATE_CTRL. The timing module 1430 continues to accumulate the display of the maintenance time T_KEEP.
接著在第三時間點T3時序控制器1400完整的接收到了第三訊框FRAME3的資料。此時處理模組1490先將源極致能訊號SOURCE_EN的電壓位準調至高電壓以暫時(或可視為預先)致能源極驅動器1200中的位準移位器1250以及輸出緩衝器1270中的電流鏡1271。第三訊框FRAME3的資料也被暫存至暫存模組1410中。此時暫存模組1410中暫存了第二訊框FRAME2的資料與第三訊框FRAME3的資料。比較模組1450把第三訊框FRAME3的資料與第二訊框FRAME2的資料進行比較。於此實施例中，第三訊框FRAME3的資料與第二訊框FRAME2的資料實質上相同。因此比較模組1450不會調整比較訊號VCOMP的電壓位準，而且由於確知源極驅動器1200可以無需更新顯示面板1100上的顯示畫面，因此更新選擇模組1470可以控制處理模組1490將源極致能訊號SOURCE_EN的電壓位準調至低電壓，以停能源極驅動器1200中的位準移位器1250以及輸出緩衝器1270中的電流鏡1271。並且處理模組1490不輸出源極控制訊號XSTB、顯示資料DATA與閘極控制訊號GATE_CTRL。而計時模組1430 繼續累加顯示維持時間T_KEEP。 Next, at time T 3 third timing controller 1400 receives complete information to the third frame of data FRAME3. At this time, the processing module 1490 first adjusts the voltage level of the source enable signal SOURCE_EN to a high voltage to temporarily (or can be regarded as pre-) the level shifter 1250 in the energy source driver 1200 and the current mirror in the output buffer 1270. 1271. The data of the third frame FRAME3 is also temporarily stored in the temporary storage module 1410. At this time, the data of the second frame FRAME2 and the data of the third frame FRAME3 are temporarily stored in the temporary storage module 1410. The comparison module 1450 compares the data of the third frame FRAME3 with the data of the second frame FRAME2. In this embodiment, the data of the third frame FRAME3 is substantially the same as the data of the second frame FRAME2. Therefore, the comparison module 1450 does not adjust the voltage level of the comparison signal VCOMP, and since it is known that the source driver 1200 does not need to update the display screen on the display panel 1100, the update selection module 1470 can control the processing module 1490 to enable the source. The voltage level of the signal SOURCE_EN is adjusted to a low voltage to stop the level shifter 1250 in the energy source driver 1200 and the current mirror 1271 in the output buffer 1270. The processing module 1490 does not output the source control signal XSTB, the display data DATA, and the gate control signal GATE_CTRL. The timing module 1430 continues to accumulate the display of the maintenance time T_KEEP.
接著在第四時間點T4時序控制器1400完整的接收到了第四訊框FRAME4的資料。此時處理模組1490先將源極致能訊號SOURCE_EN的電壓位準調至高電壓以暫時(或可視為預先)致能源極驅動器1200中的位準移位器1250以及輸出緩衝器1270中的電流鏡1271。第四訊框FRAME4的資料也被暫存至暫存模組1410中。此時暫存模組1410中暫存了第三訊框FRAME3的資料與第四訊框FRAME4的資料。比較模組1450把第四訊框FRAME4的資料與第三訊框FRAME3的資料進行比較。於此實施例中，第四訊框FRAME4的資料與第三訊框FRAME3的資料實質上不相同。因此比較模組1450將比較訊號VCOMP的電壓位準調至低電壓，而且由於確知源極驅動器1200需更新顯示面板1100上的顯示畫面，因此更新選擇模組1470控制處理模組1490將源極致能訊號SOURCEN_EN的電壓位準維持在高電壓。處理模組1490並同時輸出源極控制訊號XSTB、顯示資料DATA，並輸出閘極控制訊號GATE_CTRL至閘極驅動器1300令顯示畫面更新。而計時模組1430將顯示維持時間T_KEEP歸零重新計算。而在另一些實施例中，接收訊框時，時序控制器1400不一定輸出源極致能訊號SOURCE_EN。此外，於另一些實施例中，即使被接收的訊框的資料與先前暫存的訊框的資料相同，如果顯示維持時間T_KEEP大於等於最大顯示維持時間，更新選擇模組1470仍然會控制處理模組1490調整源極致能訊號SOURCE_EN的電壓 位準以致能源極驅動器1200中的位準移位器1250以及輸出緩衝器1270中的電流鏡1271。並且處理模組1490輸出源極控制訊號XSTB，處理模組1490也會把接收到的訊框的資料經處理後做為顯示資料DATA輸出至源極驅動器1200。 Then at the fourth time point T 4 , the timing controller 1400 completely receives the data of the fourth frame FRAME 4 . At this time, the processing module 1490 first adjusts the voltage level of the source enable signal SOURCE_EN to a high voltage to temporarily (or can be regarded as pre-) the level shifter 1250 in the energy source driver 1200 and the current mirror in the output buffer 1270. 1271. The data of the fourth frame FRAME4 is also temporarily stored in the temporary storage module 1410. At this time, the data of the third frame FRAME3 and the data of the fourth frame FRAME4 are temporarily stored in the temporary storage module 1410. The comparison module 1450 compares the data of the fourth frame FRAME4 with the data of the third frame FRAME3. In this embodiment, the data of the fourth frame FRAME4 is substantially different from the data of the third frame FRAME3. Therefore, the comparison module 1450 adjusts the voltage level of the comparison signal VCOMP to a low voltage, and since it is known that the source driver 1200 needs to update the display screen on the display panel 1100, the update selection module 1470 controls the processing module 1490 to enable the source. The voltage level of the signal SOURCEN_EN is maintained at a high voltage. The processing module 1490 simultaneously outputs the source control signal XSTB, the display data DATA, and outputs the gate control signal GATE_CTRL to the gate driver 1300 to update the display screen. The timing module 1430 recalculates the display maintenance time T_KEEP to zero. In other embodiments, the timing controller 1400 does not necessarily output the source enable signal SOURCE_EN when receiving the frame. In addition, in other embodiments, even if the data of the received frame is the same as the data of the previously temporarily stored frame, if the display retention time T_KEEP is greater than or equal to the maximum display maintenance time, the update selection module 1470 still controls the processing mode. Group 1490 adjusts the voltage level of source enable signal SOURCE_EN such that level shifter 1250 in energy pole driver 1200 and current mirror 1271 in output buffer 1270. The processing module 1490 outputs the source control signal XSTB, and the processing module 1490 also processes the received frame data and outputs the data as the display data DATA to the source driver 1200.
簡單來說，本發明所揭示的時序控制器14依據下列方法來運作。請參照第5圖，其係依據本發明一實施例的動態調整顯示驅動方法流程圖。如步驟S51所示，時序控制器依序接收多個訊框的資料。如步驟S53所示，時序控制器將前述多個訊框中的一個第一訊框的資料輸出至源極驅動器。如步驟S55所示，時序控制器比較第一訊框的資料與前述多個訊框中在第一訊框之後的一個第二訊框的資料是否實質上(substantially)相同。所述之實質上相同包含在一定容許範圍內前後訊框的位元係為相同，舉例而言，可為1%以內，亦可由設計者定義合理容許值。當第一訊框的資料與第二訊框的資料實質上相同時，如步驟S57所示，時序控制器依據一個顯示維持時間選擇性地將源極致能訊號、源極控制訊號與第二訊框的資料輸出至源極驅動器，並輸出閘極控制訊號至閘極驅動器令顯示畫面更新。當第一訊框的資料與第二訊框的資料實質上不相同時，如步驟S59所示，時序控制器直接將源極致能訊號、源極控制訊號與第二訊框的資料輸出至源極驅動器，並輸出閘極控制訊號至閘極驅動器令顯示畫面更新。 Briefly, the timing controller 14 disclosed herein operates in accordance with the following methods. Please refer to FIG. 5, which is a flowchart of a dynamic adjustment display driving method according to an embodiment of the present invention. As shown in step S51, the timing controller sequentially receives the data of the plurality of frames. As shown in step S53, the timing controller outputs the data of one of the first frames in the plurality of frames to the source driver. As shown in step S55, the timing controller compares the data of the first frame with whether the data of a second frame after the first frame in the plurality of frames is substantially the same. The bits of the front and back frames are substantially the same in a certain tolerance range, for example, may be within 1%, and a reasonable tolerance may be defined by the designer. When the data of the first frame is substantially the same as the data of the second frame, as shown in step S57, the timing controller selectively selects the source enable signal, the source control signal and the second signal according to a display maintenance time. The data of the frame is output to the source driver, and the gate control signal is output to the gate driver to update the display screen. When the data of the first frame is substantially different from the data of the second frame, as shown in step S59, the timing controller directly outputs the source enable signal, the source control signal, and the data of the second frame to the source. The pole driver and the output gate control signal to the gate driver make the display screen update.
其中在步驟S57中，時序控制器依據判斷顯示維持 時間是否大於等於『最大顯示維持時間』來選擇性地輸出源極致能訊號、源極控制訊號與第二訊框的資料。更明確的說，只有當顯示維持時間大於等於最大顯示維持時間的時候，時序控制器才輸出源極致能訊號、源極控制訊號與第二訊框的資料。如果顯示維持時間小於最大顯示維持時間，則時序控制器停止致能(或者說不輸出)源極致能訊號SOURCE_EN、源極控制訊號XSTB與第二訊框的資料至源極驅動器。其中，前述的顯示維持時間是從前一次輸出訊框開始計算，也就是說當第一訊框被輸出的時候，顯示維持時間被歸零並重新開始累計。而最大顯示維持時間係顯示面板1100在未收到更新顯示畫面的訊號時，可以維持畫面供使用者觀賞的最大時間，例如為0.1秒。然而這個最大顯示維持時間並非定值，依照顯示面板及/或源極驅動器的元件特性及廠牌的不同或者依照使用者對顯示的感受進行調整，最大顯示維持時間也會隨之改變。 In step S57, the timing controller maintains according to the judgment display. Whether the time is greater than or equal to "maximum display hold time" to selectively output the source enable signal, the source control signal and the second frame data. More specifically, the timing controller outputs the source enable signal, the source control signal, and the second frame only when the display hold time is greater than or equal to the maximum display hold time. If the display hold time is less than the maximum display hold time, the timing controller stops enabling (or not outputting) the source enable signal SOURCE_EN, the source control signal XSTB, and the data of the second frame to the source driver. The foregoing display maintenance time is calculated from the previous output frame, that is, when the first frame is output, the display maintenance time is reset to zero and the accumulation is restarted. The maximum display maintenance time is a maximum time that the display panel 1100 can maintain the screen for the user to view when the signal for updating the display screen is not received, for example, 0.1 second. However, this maximum display maintenance time is not constant. According to the component characteristics of the display panel and/or the source driver and the difference of the brand or according to the user's feeling of display, the maximum display maintenance time will also change.
此外，於某些實施例中，當第二訊框的資料與第一訊框的資料實質上相同，且顯示維持時間小於最大顯示維持時間時，時序控制器可以選擇只保留第一訊框，或是只保留第二訊框。而後把前述多個訊框中，第二訊框之後的一個第三訊框的資料與被保留的訊框(也就是第一訊框或第二訊框)的資料比較，而當第三訊框的資料與被保留的訊框的資料實質上不同的時候，時序控制器將源極致能訊號、源極控制訊號與第二訊框的資料輸出至源極驅動器，並輸出閘極控制訊號至閘極驅動器1300令顯示 畫面更新。 In addition, in some embodiments, when the data of the second frame is substantially the same as the data of the first frame, and the display maintenance time is less than the maximum display maintenance time, the timing controller may select to retain only the first frame. Or just keep the second frame. And comparing the data of a third frame behind the second frame with the information of the reserved frame (that is, the first frame or the second frame) in the plurality of frames, and then the third message When the data of the frame is substantially different from the data of the reserved frame, the timing controller outputs the source enable signal, the source control signal and the data of the second frame to the source driver, and outputs the gate control signal to Gate driver 1300 for display Screen update.
藉由本發明所揭示的動態調整顯示驅動方法與應用此方法的顯示裝置，顯示裝置中的時序控制器判斷當前收到的訊框的資料是否與正顯示於顯示面板上的訊框相同，並判斷顯示維持時間，來決定是否把當前收到的訊框的資料輸出至源極驅動器。並且當時序控制器判斷所顯示的畫面無需更新時，時序控制器以源極致能訊號暫時的停能源極驅動器中的部份元件(電路)，藉以降低整個顯示裝置所消耗的能量。 According to the dynamic adjustment display driving method and the display device using the method disclosed in the present invention, the timing controller in the display device determines whether the data of the currently received frame is the same as the frame being displayed on the display panel, and determines The hold time is displayed to determine whether to output the data of the currently received frame to the source driver. And when the timing controller determines that the displayed picture does not need to be updated, the timing controller uses a part of the components (circuits) in the temporary energy-saving driver of the source enable signal to reduce the energy consumed by the entire display device.
雖然本發明以前述之實施例揭露如上，然其並非用以限定本發明。在不脫離本發明之精神和範圍內，所為之更動與潤飾，均屬本發明之專利保護範圍。關於本發明所界定之保護範圍請參考所附之申請專利範圍。 Although the present invention has been disclosed above in the foregoing embodiments, it is not intended to limit the invention. It is within the scope of the invention to be modified and modified without departing from the spirit and scope of the invention. Please refer to the attached patent application for the scope of protection defined by the present invention.
1200‧‧‧源極驅動器 1200‧‧‧Source Driver
1300‧‧‧閘極驅動器 1300‧‧ ‧ gate driver
1400‧‧‧時序控制器 1400‧‧‧ timing controller
1410‧‧‧暫存模組 1410‧‧‧Scratch module
1430‧‧‧計時模組 1430‧‧‧Time Module
1450‧‧‧比較模組 1450‧‧‧Comparative Module
1470‧‧‧更新選擇模組 1470‧‧‧Update selection module
1490‧‧‧處理模組 1490‧‧‧Processing module
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| TWI608466B (en) * | 2016-12-16 | 2017-12-11 | 友達光電股份有限公司 | Pixel array device and segment driving method |
| TWI660334B (en) * | 2017-09-04 | 2019-05-21 | 友達光電股份有限公司 | Display panel and driving method thereof |
| TWI686786B (en) * | 2017-04-17 | 2020-03-01 | 世界先進積體電路股份有限公司 | display system |
| US11436992B2 (en) | 2017-07-13 | 2022-09-06 | Vanguard International Semiconductor Corporation | Display system and method for forming an output buffer of a source driver |
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| TWI587280B (en) * | 2016-10-18 | 2017-06-11 | 友達光電股份有限公司 | Signal controlling method and display panel utilizing the same |
| TWI755854B (en) * | 2020-09-11 | 2022-02-21 | 奇景光電股份有限公司 | Display apparatus and display circuit |
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| US8643658B2 (en) * | 2009-12-30 | 2014-02-04 | Intel Corporation | Techniques for aligning frame data |
| JP2012234334A (en) * | 2011-04-28 | 2012-11-29 | Toshiba Corp | Memory device |
| TWI587259B (en) * | 2012-03-23 | 2017-06-11 | 友達光電股份有限公司 | Driving method of a display unit and the driving circuit thereof |
| US9558721B2 (en) * | 2012-10-15 | 2017-01-31 | Apple Inc. | Content-based adaptive refresh schemes for low-power displays |
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| TWI608466B (en) * | 2016-12-16 | 2017-12-11 | 友達光電股份有限公司 | Pixel array device and segment driving method |
| TWI686786B (en) * | 2017-04-17 | 2020-03-01 | 世界先進積體電路股份有限公司 | display system |
| US11436992B2 (en) | 2017-07-13 | 2022-09-06 | Vanguard International Semiconductor Corporation | Display system and method for forming an output buffer of a source driver |
| TWI660334B (en) * | 2017-09-04 | 2019-05-21 | 友達光電股份有限公司 | Display panel and driving method thereof |
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