TW201610460A - 攝像面板之製造方法、攝像面板及x射線攝像裝置 - Google Patents
攝像面板之製造方法、攝像面板及x射線攝像裝置 Download PDFInfo
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- TW201610460A TW201610460A TW104125472A TW104125472A TW201610460A TW 201610460 A TW201610460 A TW 201610460A TW 104125472 A TW104125472 A TW 104125472A TW 104125472 A TW104125472 A TW 104125472A TW 201610460 A TW201610460 A TW 201610460A
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- 229910052736 halogen Inorganic materials 0.000 description 1
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- XOLBLPGZBRYERU-UHFFFAOYSA-N tin dioxide Chemical compound O=[Sn]=O XOLBLPGZBRYERU-UHFFFAOYSA-N 0.000 description 1
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Classifications
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- H01L27/144—Devices controlled by radiation
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- G01—MEASURING; TESTING
- G01T—MEASUREMENT OF NUCLEAR OR X-RADIATION
- G01T1/00—Measuring X-radiation, gamma radiation, corpuscular radiation, or cosmic radiation
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- G01T1/20—Measuring radiation intensity with scintillation detectors
- G01T1/2018—Scintillation-photodiode combinations
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- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
- H01L21/82—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
- H01L21/822—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
- H01L21/8232—Field-effect technology
- H01L21/8234—MIS technology, i.e. integration processes of field effect transistors of the conductor-insulator-semiconductor type
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/04—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body
- H01L27/06—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being a semiconductor body including a plurality of individual components in a non-repetitive configuration
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- H01L27/02—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
- H01L27/12—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
- H01L27/1214—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs
- H01L27/1222—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer
- H01L27/1225—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body comprising a plurality of TFTs formed on a non-semiconducting substrate, e.g. driving circuits for AMLCDs with a particular composition, shape or crystalline structure of the active layer with semiconductor materials not belonging to the group IV of the periodic table, e.g. InGaZnO
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- H—ELECTRICITY
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- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14601—Structural or functional details thereof
- H01L27/14609—Pixel-elements with integrated switching, control, storage or amplification elements
- H01L27/14612—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor
- H01L27/14616—Pixel-elements with integrated switching, control, storage or amplification elements involving a transistor characterised by the channel of the transistor, e.g. channel having a doping gradient
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- H—ELECTRICITY
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- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L27/00—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14643—Photodiode arrays; MOS imagers
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
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- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
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- H01L27/14643—Photodiode arrays; MOS imagers
- H01L27/14658—X-ray, gamma-ray or corpuscular radiation imagers
- H01L27/14663—Indirect radiation imagers, e.g. using luminescent members
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- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
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- H01L27/14—Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
- H01L27/144—Devices controlled by radiation
- H01L27/146—Imager structures
- H01L27/14683—Processes or apparatus peculiar to the manufacture or treatment of these devices or parts thereof
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- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/30—Transforming light or analogous information into electric information
- H04N5/32—Transforming X-rays
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- H—ELECTRICITY
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- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
- H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
- H01L29/68—Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
- H01L29/76—Unipolar devices, e.g. field effect transistors
- H01L29/772—Field effect transistors
- H01L29/78—Field effect transistors with field effect produced by an insulated gate
- H01L29/786—Thin film transistors, i.e. transistors with a channel being at least partly a thin film
- H01L29/7869—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate
- H01L29/78693—Thin film transistors, i.e. transistors with a channel being at least partly a thin film having a semiconductor body comprising an oxide semiconductor material, e.g. zinc oxide, copper aluminium oxide, cadmium stannate the semiconducting oxide being amorphous
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- Engineering & Computer Science (AREA)
- Power Engineering (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Hardware Design (AREA)
- Electromagnetism (AREA)
- Health & Medical Sciences (AREA)
- Molecular Biology (AREA)
- Spectroscopy & Molecular Physics (AREA)
- High Energy & Nuclear Physics (AREA)
- Life Sciences & Earth Sciences (AREA)
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Abstract
本發明之攝像面板(10)係包含於光電二極體(15)之下層,經由接觸孔(CH1)而與TFT(14)接觸之金屬層(43)。於攝像面板(10)之製造方法中,於藉由形成覆蓋第1絕緣膜(42)之金屬膜(43p)而保護第1絕緣膜(42)後,將半導體膜(作為n型非晶質矽層(151)、本徵非晶質矽層(152)及p型非晶質矽層(153)之各半導體膜)成膜,進而藉由乾蝕刻將半導體膜圖案化而形成光電二極體(15)。
Description
本發明係關於攝像面板之製造方法、攝像面板、及X射線攝像裝置。
藉由包含複數個像素部之攝像面板,拍攝X射線圖像之X射線攝像裝置為已知。於此等X射線攝像裝置中,藉由光電二極體使所照射之X射線轉換成電荷。於間接方式之X射線攝像裝置中,所照射之X射線於閃爍器中轉換成閃爍光,轉換後之閃爍光藉由光電二極體轉換成電荷。所轉換之電荷藉由使像素部所包含之薄膜電晶體(Thin Film Transistor:以下亦稱為「TFT」)動作,而被讀取。藉由如此讀取電荷,而獲得X射線圖像。
於專利文獻1,揭示有為了提高光感測器之輸出性能而使光電二極體之面積之比例增加之攝像面板。根據專利文獻1,形成於汲極電極上之接觸孔之開口邊緣記載為內包光電二極體之邊緣之配置關係。
[專利文獻1]日本專利特開2008-283113號公報
於X射線攝像裝置之攝像面板中,TFT與光電二極體係隔著絕緣膜配置。具體而言,於基板上配置TFT,且以覆蓋基板及TFT之方式設置絕緣膜,進而於絕緣膜上配置光電二極體。TFT之汲極電極與光電二極體係經由形成於絕緣膜之接觸孔而連接。
然而,於光電二極體之形成時,藉由乾蝕刻而將光電二極體圖案化。此時,絕緣膜所覆蓋之TFT因乾蝕刻而受損,有致使TFT臨限值特性產生偏差之虞。
本發明之目的在於,藉由於光電二極體之形成時抑制TFT受損,而獲得TFT臨限值特性之偏差受抑制之攝像面板。
解決上述問題之本發明之一實施形態之攝像面板係基於通過被攝物體之X射線而產生圖像者,且包含:基板;複數個薄膜電晶體,其形成於上述基板上;第1絕緣膜,其覆蓋上述薄膜電晶體而形成,且具有到達至上述複數個薄膜電晶體各者之複數個接觸孔;複數層金屬層,其覆蓋上述複數個接觸孔各者之內側面及上述第1絕緣膜,且連接於上述複數個薄膜電晶體各者;及複數個光電二極體,其於上述複數個金屬層上,與上述複數層金屬層各者接觸而形成。
解決上述問題之本發明之一實施形態之攝像面板之製造方法係基於通過被攝物體之X射線而產生圖像之攝像面板之製造方法,且包含:於基板上形成複數個薄膜電晶體之步驟;於上述基板上,覆蓋上述複數個薄膜電晶體形成第1絕緣膜之步驟;於上述第1絕緣膜,形成到達至上述複數個薄膜電晶體各者之複數個接觸孔之步驟;以覆蓋上述第1絕緣膜及上述複數個接觸孔各者之內側面之方式形成金屬膜之步驟;及將半導體膜成膜後,將上述半導體膜乾蝕刻而圖案化成島狀,藉此形成複數個光電二極體之步驟。
根據本發明,藉由抑制了光電二極體之形成時之TFT受損,可獲得TFT臨限值特性偏差受抑制之攝像面板。
1‧‧‧X射線攝像裝置
10‧‧‧攝像面板
10A‧‧‧閃爍器
11‧‧‧閘極線
12‧‧‧資料線
13‧‧‧像素
14‧‧‧TFT
14A‧‧‧TFT
14B‧‧‧TFT
15‧‧‧光電二極體
15a‧‧‧側面
16‧‧‧偏壓配線
20‧‧‧控制部
20A‧‧‧閘極控制部
20B‧‧‧信號讀取部
20C‧‧‧圖像處理部
20D‧‧‧電壓控制部
20E‧‧‧時序控制部
30‧‧‧X射線源
40‧‧‧基板
41‧‧‧閘極絕緣膜
42‧‧‧第1層間絕緣膜
43‧‧‧金屬層
43a‧‧‧側面
43p‧‧‧金屬膜
44‧‧‧上部電極
45‧‧‧第2層間絕緣膜
46‧‧‧上部電極
50‧‧‧保護層
141‧‧‧閘極電極
142‧‧‧半導體活性層
143‧‧‧源極電極
144‧‧‧汲極電極
145‧‧‧蝕刻止擋層
151‧‧‧n型非晶質矽層
151p‧‧‧n型非晶質矽層
152‧‧‧本徵非晶質矽層
152p‧‧‧本徵非晶質矽層
153‧‧‧p型非晶質矽層
153p‧‧‧p型非晶質矽層
CH1‧‧‧第1接觸孔
CH2‧‧‧第2接觸孔
CH2a‧‧‧開口
d1‧‧‧厚度
d2‧‧‧厚度
R‧‧‧抗蝕劑
S‧‧‧被攝物體
圖1係顯示實施形態中X射線攝像裝置之示意圖。
圖2係顯示圖1所示之攝像面板之概略構成之示意圖。
圖3係圖2所示之攝像面板之像素之俯視圖。
圖4A係以A-A線切斷圖3所示之像素之剖視圖。
圖4B係以B-B線切斷圖3所示之像素之剖視圖。
圖5係圖3所示之像素之閘極電極之製造步驟中像素之A-A剖視圖與B-B剖視圖。
圖6係圖3所示之像素之閘極絕緣膜之製造步驟中之像素之A-A剖視圖與B-B剖視圖。
圖7係圖3所示之像素之半導體活性層之製造步驟中之像素之A-A剖視圖與B-B剖視圖。
圖8係圖3所示之像素之源極電極及汲極電極之製造步驟中之像素之A-A剖視圖與B-B剖視圖。
圖9係圖3所示之像素之金屬層之製造步驟中之像素之A-A剖視圖與B-B剖視圖。
圖10係圖3所示之像素之光電二極體之製造步驟中之像素之A-A剖視圖與B-B剖視圖。
圖11係圖3所示之像素之電極之製造步驟中之像素之A-A剖視圖與B-B剖視圖。
圖12係圖3所示之像素之金屬層之圖案化步驟中之像素之A-A剖視圖與B-B剖視圖。
圖13係顯示放大圖12之一部分之剖視圖。
圖14係圖3所示之像素之第2層間絕緣膜之製造步驟中之像素之A-A剖視圖與B-B剖視圖。
圖15係圖3所示之像素之感光性樹脂之製造步驟中之像素之A-A剖視圖與B-B剖視圖。
圖16係圖3所示之像素之偏壓配線之製造步驟中之像素之A-A剖視圖與B-B剖視圖。
圖17係變化例中包含頂閘極型之TFT之攝像面板之像素之剖視圖。
圖18係變化例中包含具有蝕刻止擋層之TFT之攝像面板之像素之剖視圖。
本發明之實施形態之攝像面板係基於通過被攝物體之X射線而產生圖像者,且包含:基板;複數個薄膜電晶體,其形成於上述基板上;第1絕緣膜,其覆蓋上述薄膜電晶體而形成,且具有到達至上述複數個薄膜電晶體各者之複數個接觸孔;複數層金屬層,其覆蓋上述複數個接觸孔各者之內側面及上述第1絕緣膜,且連接於上述複數個薄膜電晶體各者;及複數個光電二極體,其於上述複數個金屬層上,與上述複數層金屬層各者接觸而形成(第1構成)。
根據第1構成,因於光電二極體之下層設置有金屬層,故於攝像面板之製造步驟中,可以用以形成金屬層之金屬膜覆蓋薄膜電晶體及第1絕緣膜而成膜之狀態,進行光電二極體之乾蝕刻。藉此,降低薄膜電晶體因乾蝕刻而受損,結果可抑制薄膜電晶體之臨限值特性之偏差。
第2構成係較佳於第1構成中以上述光電二極體覆蓋上述金屬層之整面,且使上述金屬層之面積小於上述光電二極體之面積。
第3構成係較佳於第1或第2構成中,使上述金屬層包含鉬膜、鈦
膜、及包含該等合金之膜之任一者。
本發明之一實施形態之X射線攝像裝置包含:如第1~第3中任一構成之攝像面板;控制部,其控制上述複數個薄膜電晶體各者之閘極電壓,讀取與由上述光電二極體所轉換之電荷相應之資料信號;及照射X射線之X射線源(第4構成)。
本發明之實施形態之攝像面板之製造方法係基於通過被攝物體之X射線而產生圖像之攝像面板之製造方法,且包含:於基板上形成複數個薄膜電晶體之步驟;於上述基板上,形成覆蓋上述複數個薄膜電晶體之第1絕緣膜之步驟;於上述第1絕緣膜,形成到達至上述複數個薄膜電晶體各者之複數個接觸孔之步驟;以覆蓋上述第1絕緣膜及上述複數個接觸孔各者之內側面之方式形成金屬膜之步驟;及將半導體膜成膜後,藉由將上述半導體膜乾蝕刻而圖案化成島狀,而形成與上述複數個接觸孔分別對應之複數個光電二極體之步驟(第1製造方法)。
根據第1製造方法,於形成覆蓋第1絕緣膜之金屬膜之步驟之後,使用乾蝕刻進行光電二極體之形成。因此,在第1導電膜之表面被金屬膜覆蓋而受保護之狀態下,乾蝕刻光電二極體。即,於乾蝕刻時,金屬膜作為第1絕緣膜及其下層之薄膜電晶體之保護膜而發揮功能。藉此,降低薄膜電晶體因乾蝕刻而受到之損傷,結果可抑制薄膜電晶體之臨限值特性之偏差。
第2製造方法係於第1製造方法中,進而包含於形成上述複數個光電二極體之步驟之後,藉由濕蝕刻去除上述金屬膜中未被上述複數個光電二極體覆蓋之區域而獲得金屬層之步驟。
以下,參照圖式,詳細說明本發明之實施形態。於圖中相同或相當之部分係附註相同符號,不重複其說明。
另,於本說明書中,所謂「連接」除了意指2個構件接觸而連接
之情形外,亦意指經由配置於2個構件之間之導電性之第3構件而電性連接2個構件之狀態。
圖1係顯示本實施形態之X射線攝像裝置之示意圖。X射線攝像裝置1具備攝像面板10、及控制部20。自X射線源30對被攝物體S照射X射線,將透過被攝物體S之X射線藉由配置於攝像面板10之上部之閃爍器10A而轉換成螢光(以下稱為閃爍光)。X射線攝像裝置1係藉由利用攝像面板10及控制部20拍攝閃爍光而取得X射線圖像。
圖2係顯示攝像面板10之概略構成之示意圖。如圖2所示,於攝像面板10形成有複數條閘極線11、及與複數條閘極線11交叉之複數條資料線12。攝像面板10具有以閘極線11與資料線12所規定之複數個像素13。於圖2中,雖顯示有具有16個(4列4行)像素13之例,但攝像面板10中的像素數量並未限定於此。
於各像素13,設置有連接於閘極線11與資料線12之TFT14、及連接於TFT14之光電二極體15。又,雖於圖2中省略圖示,但於各像素13,與資料線12大致平行而配置有對光電二極體15供給偏壓電壓之偏壓配線16(參照圖3)。
於各像素13中,將透過被攝物體S之X射線轉換後之閃爍光,藉由光電二極體15轉換成與該光量相應之電荷。
攝像面板10中的各閘極線11係藉由閘極控制部20A依序切換成選擇狀態,連接於選擇狀態之閘極線11之TFT14成為導通狀態。當TFT14成為導通狀態時,對資料線12輸出與藉由光電二極體15轉換之電荷相應之資料信號。
其次,對像素13之具體構成進行說明。圖3係圖2所示之攝像面板10之像素13之俯視圖。又,圖4A係於A-A線切斷圖3所示之像素13之剖視圖,圖4B係於B-B線切斷圖3所示之像素13之剖視圖。
如圖4A及圖4B所示,像素13係形成於基板40上。基板13係例如玻璃基板、矽基板、具有耐熱性之塑膠基板或樹脂基板等之具有絕緣性之基板。尤其,作為塑膠基板或樹脂基板,亦可使用聚對苯二甲酸乙二酯(PET)、聚萘二甲酸乙二酯(PEN)、聚醚碸(PES)、丙烯酸系、聚醯亞胺等。
TFT14係包含閘極電極141、介隔閘極絕緣膜41而配置於閘極電極141上之半導體活性層142、連接於半導體活性層142之源極電極143及汲極電極144。
閘極電極141係與基板40之厚度方向之一面(以下為主表面)接觸而形成。閘極電極141係例如包含鋁(Al)、鎢(W)、鉬(Mo)、鉭(Ta)、鉻(Cr)、鈦(Ti)、銅(Cu)等金屬、或該等合金、又或該等金屬氮化物。又,閘極電極141亦可為例如積層複數層金屬膜而成者。於本實施形態中,閘極電極141具有包含鋁之金屬膜、與包含鈦之金屬膜依該順序積層之積層構造。
閘極絕緣膜41係如圖4A及圖4B所示,形成於基板40上,且覆蓋閘極電極141。閘極絕緣膜41例如以氧化矽(SiOx)、氮化矽(SiNx)、氧氮化矽(SiOxNy)(x>y)、氮氧化矽(SiNxOy)(x>y)等形成。
如圖4A所示,半導體活性層142係與閘極絕緣膜41接觸而形成。半導體活性層142包含氧化物半導體。氧化物半導體亦可例如使用InGaO3(ZnO)5、氧化鎂鋅(MgxZn1-xO)、氧化鎘鋅(CdxZn1-xO)、氧化鎘(CdO)、或以特定比率含有銦(In)、鎵(Ga)、及鋅(Zn)之非晶質氧化物半導體等。又,半導體活性層142亦可使用添加有1族元素、13族元素、14族元素、15族元素、及17族元素等中之一種或複數種雜質元素之ZnO之非晶質(Amorphous)狀態者,又可使用多結晶狀態者。且,亦可使用非晶質狀態與多結晶狀態混合存在之微結晶狀態者、或未添加任何雜質元素者。
源極電極143及汲極電極144係如圖4A所示,與半導體活性層142及閘極絕緣膜41接觸而形成。如圖3所示,源極電極143連接於資料線12。汲極電極144如圖4A所示,經由第1接觸孔CH1而連接於後述之金屬層43。源極電極143、資料線12、及汲極電極144係形成於相同層上。
源極電極143、資料線12、汲極電極144例如包含鋁(Al)、鎢(W)、鉬(Mo)、鉭(Ta)、鉻(Cr)、鈦(Ti)、銅(Cu)等金屬或該等之合金、又或該等金屬氮化物。又,作為源極電極143、資料線12、汲極電極144之材料,亦可使用銦錫氧化物(ITO)、銦鋅氧化物(IZO)、包含氧化矽之銦錫氧化物(ITSO)、氧化銦(In2O3)、氧化錫(SnO2)、氧化鋅(ZnO)、氮化鈦等之具有透光性之材料及適當組合該等者。
源極電極143、資料線12、及汲極電極144亦可為例如積層複數層金屬膜者。於本實施形態中,源極電極143、資料線12、及汲極電極144係具有包含鈦之金屬膜、包含鋁之金屬膜、包含鈦之金屬膜依該順序積層之積層構造。
如圖4A及圖4B所示,第1層間絕緣膜42係覆蓋半導體活性層142、源極電極143、資料線12、及汲極電極144。第1層間絕緣膜42亦可為包含氧化矽(SiO2)或氮化矽(SiN)之單層構造,又可為將氮化矽(SiN)、氧化矽(SiO2)依該順序積層之積層構造。
於第1層間絕緣膜42上,如圖4A所示,形成有到達至汲極電極144之第1接觸孔CH1。
如圖4A及圖4B所示,於第1層間絕緣膜42上,形成金屬層43。金屬層43如圖4A所示,亦覆蓋第1接觸孔CH1之內壁面。因金屬層43覆蓋第1接觸孔CH1之內壁面,故金屬層43與汲極電極144接觸。金屬層43形成於與形成有後述之光電二極體15之區域大致相同之區域。即,金屬層43係對每個像素13設置複數層。
金屬層43例如以鉬(Mo)膜、鈦(Ti)膜、或包含該等之合金之膜形成。金屬層43亦可為單層構造、或積層構造之任一者。於本實施形態中,金屬層43係以鉬(Mo)膜形成。
如圖4A及圖4B所示,光電二極體15係形成於金屬層43上。光電二極體15至少包含具有第1導電型之第1半導體層、及具有與第1導電型相反之第2導電型之第2半導體層。於本實施形態中,光電二極體15包含n型非晶質矽層151、本徵非晶質矽層152、及p型非晶質矽層153。
n型非晶質矽層151包含摻雜有n型雜質(例如磷)之非晶矽。n型非晶質矽層151係與金屬層43接觸而形成。因n型非晶質矽層151係與金屬層43接觸,且金屬層43與汲極電極144接觸,故n型非晶質矽層151與汲極電極144連接。n型非晶質矽層151之厚度例如為20~100nm。
本徵非晶質矽層152係包含本徵之非晶矽。本徵非晶質矽層152係與n型非晶質矽層151接觸而形成。本徵非晶質矽層之厚度例如為200~2000nm。
p型非晶質矽層153包含摻雜有p型雜質(例如硼)之非晶矽。p型非晶質矽層153係與本徵非晶質矽層152接觸而形成。p型非晶質矽層153之厚度例如為10~50nm。
汲極電極144係作為TFT14之汲極電極發揮功能,且作為光電二極體15之下部電極發揮功能。又,汲極電極144亦作為將透過光電二極體15之閃爍光反射向光電二極體15之反射膜而發揮功能。
如圖4A及圖4B所示,上部電極44形成於光電二極體15上,且作為光電二極體15之上部電極而發揮功能。上部電極44係例如包含銦鋅氧化物(IZO)。另,作為下部電極之汲極電極144、與汲極電極144之電位連接之金屬層43、光電二極體15、及上部電極44構成光電轉換元件。
第2層間絕緣膜45係如圖4A及圖4B所示,與第1層間絕緣膜42接觸而形成。又,第2層間絕緣膜45係覆蓋金屬層43、光電二極體15、及上部電極44之側面、以及上部電極44之周邊部。
第2層間絕緣膜45係例如以氧化矽(SiO2)、氮化矽(SiN)、氧氮化矽(SiON)等形成。第2層間絕緣膜45可為單層構造,亦可為積層構造。第2層間絕緣膜45例如厚度為50~200nm。
感光性樹脂層46如圖4A及圖4B所示,形成於第2層間絕緣膜45上。感光性樹脂層46係包含有機樹脂材料、或無機樹脂材料。
於第2層間絕緣膜45及感光性樹脂層46,如圖4B所示,形成有到達至上部電極44之第2接觸孔CH2。
偏壓配線16係如圖3、圖4A及圖4B所示,於感光性樹脂層46上,與資料線12大致平行而形成。具體而言,偏壓配線16如圖3及圖4A所示,於感光性樹脂層46上,重疊形成於TFT14上。偏壓配線16連接於電壓控制部20D(參照圖1)。又,偏壓配線16如圖4B所示,經由第2接觸孔CH2連接於上部電極44,且將自電壓控制部20D輸入之偏壓電壓施加於上部電極44。偏壓配線16例如具有銦鋅氧化物(IZO)與鉬(Mo)積層而成之積層構造。
如圖4A及圖4B所示,於攝像面板10上、即感光性樹脂層46上,以覆蓋偏壓配線16之方式形成保護層50,於保護層50上設置有閃爍器10A。
回到圖1,對控制部20之構成進行說明。控制部20包含閘極控制部20A、信號讀取部20B、圖像處理部20C、電壓控制部20D、及時序控制部20E。
於閘極控制部20A,如圖2所示,連接有複數條閘極線11。閘極控制部20A經由閘極線11,對連接於閘極線11之像素13所具備之TFT14施加特定之閘極電壓。
於信號讀取部20B,如圖2所示,連接有複數條資料線12。信號
讀取部20B係經由各資料線12,讀取與由像素13所具備之光電二極體15所轉換之電荷相應之資料信號。信號讀取部20B係基於資料信號而產生圖像信號,並輸出至圖像處理部20C。
圖像處理部20C係基於自信號讀取部20B輸出之圖像信號,而產生X射線圖像。
電壓控制部20D連接於偏壓配線16。電壓控制部20D將特定之偏壓電壓施加於偏壓配線16。藉此,經由連接於偏壓配線16之上部電極44對光電二極體15施加偏壓電壓。
時序控制部20E係控制閘極控制部20A、信號讀取部20B及電壓控制部20D之動作時序。
閘極控制部20A係基於來自時序控制部20E之控制信號,而自複數條閘極線11選擇1條閘極線11。閘極控制部20A經由選取之閘極線11,而對連接於該閘極線11之像素13所具備之TFT14施加特定之閘極電壓。
信號讀取部20B係基於來自時序控制部20E之控制信號,而自複數條資料線12選擇1條資料線12。信號讀取部20B係經由選取之資料線12,而讀取與由像素13中的光電二極體15轉換之電荷相應之資料信號。被讀取資料信號之像素13係連接於由信號讀取部20B選取之資料線12,且連接於由閘極控制部20A選取之閘極線11。
時序控制部20E係例如於自X射線源30照射X射線之情形,對電壓控制部20D輸出控制信號。基於該控制信號,電壓控制部20D對上部電極44施加特定之偏壓電壓。
首先,自X射線源30照射X射線。此時,時序控制部20E將控制信號輸出至電壓控制部20D。具體而言,例如,表示自X射線源30正在照射X射線之信號,自控制X射線源30之動作之控制裝置輸出至時序
控制部20E。於該信號輸入至時序控制部20E之情形時,時序控制部20E將控制信號輸出至電壓控制部20D。電壓控制部20D基於來自時序控制部20E之控制信號,將特定電壓(偏壓電壓)施加於偏壓配線16。
自X射線源30照射之X射線係透過被攝物體S,入射至閃爍體10A。入射至閃爍體10A之X射線係轉換成螢光(閃爍光),閃爍光入射至攝像面板10。
若閃爍光入射至於攝像面板10中之各像素13中所設之光電二極體15,則藉由光電二極體15,轉換成與閃爍光之光量相應之電荷。
與藉由光電二極體15轉換之電荷相應之資料信號,於藉由自閘極控制部20A經由閘極線11輸出之閘極電壓(正電壓)而使TFT14成為導通狀態時,係通過資料線12而由信號讀取部20B讀取。由圖像處理部20C產生與讀取之資料信號相應之X射線圖像。
其次,說明攝像面板10之製造方法。圖5~圖12、及圖14~圖16係攝像面板10之各製造步驟中的像素13之A-A剖視圖與B-B剖視圖。
首先,於基板40上,藉由濺鍍等,形成積層有鋁與鈦之金屬膜。且,藉由光微影法,如圖5所示,使該金屬膜圖案化而形成閘極電極141及閘極線11(於圖5中未顯示,參照圖3)。該金屬膜之厚度為例如300nm。
其次,如圖6所示,於基板40上,藉由電漿CVD法或濺鍍等,以覆蓋閘極電極141及閘極線11之方式,形成包含氧化矽(SiOx)或氮化矽(SiNx)等之閘極絕緣膜41。閘極絕緣層41之厚度為例如20~150nm。
繼而,如圖7所示,於閘極絕緣膜41上,例如,以濺鍍等使氧化物半導體成膜,且利用光微影法,使氧化物半導體圖案化而形成半導體活性層142。於形成半導體活性層142後,亦可於高溫(例如350℃以上)之含氧之氣體環境中(例如大氣中)進行熱處理。該情形時,可使半
導體活性層142中的氧缺陷減少。半導體活性層142之厚度為例如30~100nm。
其次,於閘極絕緣膜41上、及半導體活性層142上,藉由濺鍍等形成鈦、鋁、鈦依該順序積層之金屬膜。且,如圖8所示,藉由光微影法,使該金屬膜圖案化,藉此形成源極電極143、資料線12、及汲極電極144。源極電極143、資料線12及汲極電極144之厚度為例如50~500nm。另,蝕刻加工雖可採用乾蝕刻或濕蝕刻中任一者,但於基板40之面積較大之情形時,乾蝕刻較為適合。藉此,形成底閘極型之TFT14。
繼而,如圖8所示,於源極電極143、資料線12、及汲極電極144上,例如藉由電漿CVD,形成包含氧化矽(SiO2)或氮化矽(SiN)之第1層間絕緣膜42。接著,對基板40之整面施加350℃左右之熱處理,藉由光微影法使第1層間絕緣膜42圖案化,形成第1接觸孔CH1。
其次,如圖9所示,於第1層間絕緣膜42上,例如藉由濺鍍等而成膜包含鉬(Mo)之金屬膜43p。該金屬膜43p係於後續步驟中構成金屬層43之膜。金屬膜43p亦覆蓋第1接觸孔CH1之內壁面而形成。金屬膜43p於第1接觸孔CH1中與汲極電極144接觸。
其次,於金屬膜43p上,藉由濺鍍等,依n型非晶質矽層151p、本徵非晶質矽層152p、及p型非晶質矽層153p之順序成膜。此時,介隔金屬膜43p,使汲極電極144與n型非晶質矽層151p連接。
繼而,利用光微影法使n型非晶質矽層151、本徵非晶質矽層152、及p型非晶質矽層153圖案化,並藉由乾蝕刻,而形成光電二極體15。具體而言,如圖10所示,於n型非晶質矽層151、本徵非晶質矽層152、及p型非晶質矽層153中成為光電二極體15之區域上,形成抗蝕劑R。接著,藉由對未被抗蝕劑R覆蓋之區域進行電漿照射,而去除不需要之n型非晶質矽層151p、本徵非晶質矽層152p、及p型非晶質
矽層153p,獲得n型非晶質矽層151、本徵非晶質矽層152、及p型非晶質矽層153。此時,於照射電漿之區域(參照圖10所示之箭頭)形成有金屬膜43p。
又,於乾蝕刻時,因第1層間絕緣膜42被金屬膜43p覆蓋,故蝕刻氣體未直接接觸第1層間絕緣膜42。因此,即便使用氟系或氯系之氣體作為蝕刻氣體,第1層間絕緣膜42所含之氟或氯之濃度亦未變大。例如,使用SIMS(二次離子質量分析法)進行第1層間絕緣膜42之界面分析之情形,氟濃度在10ppm以下。又,使用XPS(X射線光電子分光法)進行第1層間絕緣膜42之界面分析之情形,氟濃度為1atm%以下。
又,於乾蝕刻時,因第1層間絕緣膜42被金屬膜43p覆蓋,故未因乾蝕刻而使第1層間絕緣膜42被蝕刻。因此,第1層間絕緣膜42中被金屬層43覆蓋之區域之厚度(參照後述之圖13中的d1)、及未被金屬層43覆蓋之區域之厚度(參照圖13中的d2)之大小變得相等。
繼而,如圖11所示,於第1層間絕緣膜42及光電二極體15上,藉由濺鍍等使銦鋅氧化物(IZO)成膜,藉由光微影法圖案化而形成上部電極44。
其次,如圖12所示,藉由濕蝕刻使金屬膜43p圖案化,形成金屬層43。作為此處之蝕刻液,例如可使用硝酸系蝕刻液或硫酸系蝕刻液、磷酸系蝕刻液、醋酸系蝕刻液等。藉此,第1層間絕緣膜42中未存在光電二極體15之區域未被金屬膜43p覆蓋。
另,於本實施形態中,以鉬形成金屬層43,但於以鈦膜形成金屬層43之情形時,於金屬膜43p之濕蝕刻之步驟中,可使用硝酸系之蝕刻液或過氧化氫系之蝕刻液等作為蝕刻液。
圖13係放大顯示進行濕蝕刻後之金屬層43之周邊之剖視圖。於濕蝕刻步驟中,蝕刻液迴繞至光電二極體15之下,引起所謂之底切現
象。即,如圖13所示,與光電二極體15之側面15a比較,金屬層43之側面43a位於光電二極體15之面內方向內側。換言之,金屬層43之面積變得較光電二極體15之面積稍小。
其次,如圖14所示,於第1層間絕緣膜42及上部電極44上,藉由電漿CVD法等成膜氧化矽(SiO2)或氮化矽(SiN)形成第2層間絕緣膜45。接著,藉由光微影法使第2層間絕緣膜45圖案化,於上部電極44上形成作為第2接觸孔CH2之開口CH2a。
其次,如圖15所示,於第2層間絕緣膜45上,使感光性樹脂成膜乾燥,進而藉由光微影法而圖案化形成感光性樹脂層46。此時,形成與第2層間絕緣膜45之開口CH2a對應之開口,作為第2接觸孔CH2。
繼而,如圖16所示,於感光性樹脂層46上,藉由濺鍍等使積層銦鋅氧化物(IZO)與鉬(Mo)而成之金屬膜成膜,且藉由光微影法而圖案化並形成偏壓配線16。
根據本實施形態之攝像面板,因於光電二極體15之下層設置有金屬層43,故如上所述,於乾蝕刻光電二極體15時,於受電漿照射之區域(參照圖10所示之箭頭),存在為了形成金屬層43而設置之金屬膜43p。因此,即便於光電二極體15之乾蝕刻之步驟中照射電漿,電漿照射之影響亦被金屬膜43p吸收。即,抑制了TFT14因光電二極體15之乾蝕刻而受損。因此,結果抑制了TFT之臨限值特性之偏差。
另,使金屬膜43p圖案化而獲得金屬層43之步驟因可藉由濕蝕刻而進行,故未伴隨電漿照射。因此,未因金屬膜43p之去除而使TFT14之臨限值特性受影響。
以下,對本發明之變化例進行說明。
於上述之實施形態中,於攝像面板10中,說明包含底閘極型之TFT14之例,但例如圖17所示,TFT亦可為頂閘極型之TFT14A,又可
如圖18所示,可為底閘極型之TFT14B。
對於如圖17所示之包含頂閘極型之TFT14A之攝像面板之製造方法,說明與上述之實施形態不同之部分。首先,於基板40上,形成包含氧化物半導體之半導體活性層142。且,於基板40與半導體活性層142上,形成依鈦、鋁、鈦之順序積層之源極電極143、資料線12、汲極電極144。
繼而,於半導體活性層142、源極電極143、資料線12、汲極電極144上,形成包含氧化矽(SiOx)或氮化矽(SiNx)等之閘極絕緣膜41。其後,於閘極絕緣膜41上,形成鋁與鈦積層後之閘極電極141與閘極線11。
閘極電極141之形成後,以覆蓋閘極電極141之方式,於閘極絕緣膜41上形成第1層間絕緣膜42,且形成貫通至汲極電極144之第1接觸孔CH1。接著,與上述實施形態同樣,於第1層間絕緣膜42及汲極電極144上形成光電二極體15即可。
又,於如圖18所示之包含設置有蝕刻止擋層145之TFT14B之攝像面板之情形時,於上述之實施形態中,於形成半導體活性層142後,例如藉由電漿CVD等於半導體活性層142上成膜氧化矽(SiO2)。其後,藉由光微影法圖案化而形成蝕刻止擋層145。接著,於形成蝕刻止擋層145後,於半導體活性層142與蝕刻止擋層145上,形成依鈦、鋁、鈦之順序積層之源極電極143、資料線12、汲極電極144即可。
於上述之實施形態中,雖說明了X射線攝像裝置1係包含閃爍器10A之間接方式之X射線攝像裝置,但並未特別限定於此。X射線攝像裝置亦可為不包含閃爍器之直接方式之X射線攝像裝置。具體而言,直接方式之X射線攝像裝置具有之攝像面板係包含對自X射線源30入射之X射線進行電性轉換之光電轉換元件。
以上,雖說明了本發明之實施形態,但上述實施形態僅為用以
實施本發明之例示。藉此,本發明並非限定於上述實施形態,可於未脫離其主旨之範圍內使上述之實施形態適當變化而實施。
本發明可用於攝像面板之製造方法、攝像面板、及X射線攝像裝置。
12‧‧‧資料線
15‧‧‧光電二極體
40‧‧‧基板
41‧‧‧閘極絕緣膜
42‧‧‧第1層間絕緣膜
43p‧‧‧金屬膜
141‧‧‧閘極電極
142‧‧‧半導體活性層
143‧‧‧源極電極
144‧‧‧汲極電極
151‧‧‧n型非晶質矽層
152‧‧‧本徵非晶質矽層
153‧‧‧p型非晶質矽層
R‧‧‧抗蝕劑
Claims (6)
- 一種攝像面板,其係基於通過被攝物體之X射線而產生圖像者,且包含:基板;複數個薄膜電晶體,其形成於上述基板上;第1絕緣膜,其覆蓋上述薄膜電晶體而形成,且具有到達至上述複數個薄膜電晶體各者之複數個接觸孔;複數層金屬層,其覆蓋上述複數個接觸孔各者之內側面及上述第1絕緣膜,且連接於上述複數個薄膜電晶體各者;及複數個光電二極體,其於上述複數個金屬層上,與上述複數個金屬層各者接觸而形成。
- 如請求項1之攝像面板,其中上述金屬層之整面被上述光電二極體覆蓋,且上述金屬層之面積小於上述光電二極體之面積。
- 如請求項1或2之攝像面板,其中上述金屬層包含鉬膜、鈦膜、及包含該等合金之膜之任一者。
- 一種X射線攝像裝置,其包含:如請求項1至3中任一項之攝像面板;控制部,其控制上述複數個薄膜電晶體各者之閘極電壓,且讀取與由上述光電二極體轉換之電荷相應之資料信號;及照射X射線之X射線源。
- 一種攝像面板之製造方法,其係基於通過被攝物體之X射線而產生圖像之攝像面板之製造方法,且包含:於基板上形成複數個薄膜電晶體之步驟;於上述基板上,形成覆蓋上述複數個薄膜電晶體之第1絕緣膜之步驟; 於上述第1絕緣膜,形成到達至上述複數個薄膜電晶體各者之複數個接觸孔之步驟;以覆蓋上述第1絕緣膜及上述複數個接觸孔各者之內側面之方式形成金屬膜之步驟;及將半導體膜成膜後,藉由將上述半導體膜乾蝕刻而圖案化成島狀,而形成與上述複數個接觸孔分別對應之複數個光電二極體之步驟。
- 如請求項5之攝像面板之製造方法,其中進而包含於形成上述複數個光電二極體之步驟之後,藉由濕蝕刻去除上述金屬膜中未被上述複數個光電二極體覆蓋之區域而獲得金屬層之步驟。
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CN109087928B (zh) * | 2018-08-16 | 2021-01-26 | 京东方科技集团股份有限公司 | 光电探测基板及其制备方法、光电探测装置 |
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