TW201521142A - System and method for positioning a semiconductor chip with a bond head, thermal bonding system and method - Google Patents
System and method for positioning a semiconductor chip with a bond head, thermal bonding system and method Download PDFInfo
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Abstract
Description
本發明大致係關於半導體的製造，且更具體地但僅僅係關於一種用於定位半導體晶片與接合頭的系統及方法及熱接合系統及方法。The present invention relates generally to the fabrication of semiconductors, and more particularly, but only to a system and method for locating semiconductor wafers and bond pads, and thermal bonding systems and methods.
覆晶接合被廣泛使用在半導的製造。在覆晶接合中，積體電路(IC)晶片首先需要從已切割的晶圓或晶盤(chip tray)拾取出且然後利用熱及壓力安裝在基板上。安裝通常利用接合工具實現(在下文中可互換地稱為接合頭(bond head))。熱及壓力分佈的均勻性通常經由如接合工具的尺寸、在接合工具上的晶片的定位等因素決定。在這種情況下如果底部填充劑(underfill)在安裝之前被預先分配到基板上，其對於精確地相對於接合工具定位晶片亦為重要的以在熱壓接合製程中減少或消除底部填充劑沿著晶片邊緣滲出(creeping up)至接合頭的風險。如果接合頭的部分被暴露，例如，如果晶片與接合頭錯位或如果接合頭的尺寸大於晶片尺寸，則此可能發生。Flip chip bonding is widely used in the manufacture of semi-conductive materials. In flip chip bonding, an integrated circuit (IC) wafer first needs to be picked up from a diced wafer or chip tray and then mounted on the substrate using heat and pressure. Mounting is typically accomplished using a bonding tool (hereinafter interchangeably referred to as a bond head). The uniformity of heat and pressure distribution is typically determined by factors such as the size of the bonding tool, the positioning of the wafer on the bonding tool, and the like. In this case, if an underfill is pre-dispensed onto the substrate prior to installation, it is also important to accurately position the wafer relative to the bonding tool to reduce or eliminate underfill edges during the thermocompression bonding process. The risk of creeping up the wafer edge to the bond head. This may occur if a portion of the bond head is exposed, for example, if the wafer is misaligned with the bond head or if the size of the bond head is greater than the die size.
在覆晶接合中，助熔劑(flux)通常被用以增加濕潤性(wettability)及經由與任何存在的氧化層反應以清洗接合表面。在覆晶接合製程中，助熔/底部填充在基板上進行且晶片被對準至基板。接著使晶片接觸基板且提高晶片的溫度直到溫度達到於其上發生接合之焊料的熔點。然而，由於步驟為依序實現，此製程為比較慢的且因為其需要使用昂貴的需要間歇性地開啟及關閉供電的加熱系統所以為昂貴的。In flip chip bonding, a flux is typically used to increase wettability and to clean the bonded surface by reacting with any oxide layer present. In the flip chip bonding process, the fluxing/underfilling is performed on the substrate and the wafer is aligned to the substrate. The wafer is then brought into contact with the substrate and the temperature of the wafer is raised until the temperature reaches the melting point of the solder on which the bonding occurs. However, since the steps are sequential, the process is relatively slow and expensive because it requires the use of expensive heating systems that require intermittent powering on and off.
在修改的版本(也被稱為熔融及按壓(touch-down)的「MTD」接合)，助熔/底部填充仍然在基板上進行，但焊料在接觸基板之前被熔融。例如，接合頭可在拾取晶片之前或之後加熱，且傳輸熱能至焊料。晶片為首先對準至基板且然後使晶片接觸其上發生接合之基板。然而，在此修改的版本中，在熔融的焊料上形成的氧化物可能不足以經由在基板上助熔劑的清洗，導致可能弱化接合或形成裂縫的薄氧化物積留(entrapment)。In a modified version (also known as a melt-and-touch "MTD" bond), the flux/underfill is still performed on the substrate, but the solder is melted before contacting the substrate. For example, the bond head can be heated before or after picking up the wafer and transfer thermal energy to the solder. The wafer is first aligned to the substrate and then the wafer is brought into contact with the substrate on which the bonding occurs. However, in this modified version, the oxide formed on the molten solder may not be sufficient to cause a thin oxide entrapment that may weaken the bond or form a crack via cleaning of the flux on the substrate.
第1圖示出繪示涉及以控制之深度將晶片浸入儲存槽中並收回晶片之另一傳統覆晶助熔及接合製程的示意圖。首先，使用接合頭108將晶片102浸入助熔劑板106的助熔劑儲存槽104。然後在放置於基板110上之前，使用接合頭108收回晶片102並對準基板110。然而，在此製程，如果焊料在助熔之前熔融，焊料可能塗抹(smear)在助熔點且來自晶片102的直接熱能可能改變在儲存槽104的助熔劑性質。另一方面，如果焊料在助熔後熔融，接合製程可能更慢。此外，這種傳統的助熔製程通常由於浸入速度、浸入時間、助熔劑黏度或晶片102及助熔劑儲存槽104之間的平行性等而具有對助熔劑不適當的限制。1 is a schematic diagram showing another conventional flip-chip fluxing and bonding process involving immersing a wafer in a storage tank at a controlled depth and retracting the wafer. First, the wafer 102 is immersed in the flux storage tank 104 of the flux plate 106 using the bonding head 108. The wafer 102 is then retracted using the bond head 108 and aligned with the substrate 110 prior to placement on the substrate 110. However, in this process, if the solder melts prior to fluxing, the solder may smear at the melting point and direct thermal energy from the wafer 102 may change the flux properties in the reservoir 104. On the other hand, if the solder melts after fluxing, the bonding process may be slower. Moreover, such conventional fluxing processes typically have undue limitations on flux due to immersion speed, immersion time, flux viscosity, or parallelism between the wafer 102 and the flux storage tank 104.
因此存在有提供尋求解決至少一些上述問題的系統及方法之需求。There is therefore a need to provide systems and methods that seek to address at least some of the above problems.
根據本發明的第一態樣，提供了一種用於定位半導體晶片與接合頭的系統，系統包含： 控制器； 耦接至控制器且配置以固定及移動半導體晶片至第一位置的第一傳輸工具；以及 耦接至控制器且配置以在第一位置接收半導體晶片及移動半導體晶片至第二位置以經由接合頭拾取的第二傳輸工具， 其中第一傳輸工具可控制地校正半導體晶片位置以使半導體晶片在第一位置相對於接合頭為第一對準；以及 其中第二傳輸工具進一步可控制地校正半導體晶片位置以使半導體晶片在第二位置相對於接合頭為第二對準。In accordance with a first aspect of the present invention, a system for locating a semiconductor wafer and a bond head is provided, the system comprising: a controller; a first transfer coupled to the controller and configured to secure and move the semiconductor wafer to the first location a tool; and a second transfer tool coupled to the controller and configured to receive the semiconductor wafer and move the semiconductor wafer to the second position to pick up via the bond head at the first location, wherein the first transfer tool controllably corrects the semiconductor wafer position The semiconductor wafer is first aligned relative to the bond head in the first position; and wherein the second transfer tool further controllably corrects the semiconductor wafer position to cause the semiconductor wafer to be in a second alignment relative to the bond head in the second position.
第一對準可包含角度對準及沿著至少一水平參考軸的線性對準。The first alignment can include angular alignment and linear alignment along at least one horizontal reference axis.
第二對準可包含角度對準及沿著兩個水平參考軸的線性對準。The second alignment can include angular alignment and linear alignment along the two horizontal reference axes.
第二傳輸工具可為晶片饋送器，晶片饋送器包含： 在第一位置與第二位置之間為可移動的晶片接收部分； 配置以牢固地固定晶片就定位在晶片接收部分的固定工具；以及 配置以從第一位置移動晶片接收部分至第二位置的驅動機構。The second transfer tool may be a wafer feeder comprising: a movable wafer receiving portion between the first position and the second position; a fixing tool configured to securely fix the wafer to be positioned at the wafer receiving portion; A drive mechanism configured to move the wafer receiving portion from the first position to the second position.
固定工具可包含黏性助熔劑，且晶片接收部分可包含用於以預定深度容納所述黏性助熔劑的助熔劑儲存槽。The fixing tool may include a viscous flux, and the wafer receiving portion may include a flux storage tank for accommodating the viscous flux at a predetermined depth.
半導體晶片可設置在助熔劑儲存槽一預定助熔時間。The semiconductor wafer can be placed in the flux storage tank for a predetermined fluxing time.
助熔劑材料可在接合頭的溫度範圍具有穩定的量。The flux material can have a stable amount in the temperature range of the bond head.
系統可進一步包含耦接至控制器以判定經由第一傳輸工具固定的半導體晶片的相對線性及角度偏移值的第一光學成像器。The system can further include a first optical imager coupled to the controller to determine a relative linear and angular offset value of the semiconductor wafer secured via the first transfer tool.
第一光學成像器可包含配置以擷取半導體晶片的第一圖像的攝影機，且控制器可配置以根據經由攝影機擷取的第一圖像，計算及比較相對於的參考位置，半導體晶片位置的線性及角度偏移值。The first optical imager can include a camera configured to capture a first image of the semiconductor wafer, and the controller can be configured to calculate and compare the relative reference position based on the first image captured by the camera, the semiconductor wafer location Linear and angular offset values.
第一傳輸工具可包含耦接至控制器且配置以根據相對角度偏移值校正半導體晶片的角度位置的旋轉致動器。The first transfer tool can include a rotary actuator coupled to the controller and configured to correct an angular position of the semiconductor wafer based on the relative angular offset value.
第一傳輸工具可進一步包含耦接至控制器以水平地移動半導體晶片至第一位置的線性致動器，且線性致動器可配置以根據相對線性偏移值校正半導體晶片的線性位置。The first transfer tool can further include a linear actuator coupled to the controller to move the semiconductor wafer horizontally to the first position, and the linear actuator configurable to correct the linear position of the semiconductor wafer based on the relative linear offset value.
系統可進一步包含耦接至控制器且配置以在第二位置擷取半導體晶片與接合頭的第二圖像的第二光學成像器，且控制器可配置以根據第二圖像判定半導體晶片與接合頭的對準。The system can further include a second optical imager coupled to the controller and configured to capture a second image of the semiconductor wafer and the bond head at the second location, and the controller can be configured to determine the semiconductor wafer from the second image Alignment of the joint head.
第二光學成像器可配置以擷取半導體晶片及基板的第三圖像以判定半導體晶片及基板之間的對準。The second optical imager is configurable to capture a third image of the semiconductor wafer and the substrate to determine alignment between the semiconductor wafer and the substrate.
根據本發明的第二態樣，提供了一種熱接合系統，其包含： 如同在第一態樣中所定義的定位系統； 用於在第二位置拾取半導體晶片的接合頭；以及 耦接至接合頭且配置以加熱接合頭至高於貼附至半導體晶片的焊料熔點之溫度的加熱工具，接合頭從而熔融焊料。According to a second aspect of the present invention, there is provided a thermal bonding system comprising: a positioning system as defined in the first aspect; a bonding head for picking up a semiconductor wafer at the second position; and coupling to the bonding The head is further configured to heat the bonding head to a heating tool higher than the temperature of the melting point of the solder attached to the semiconductor wafer, to bond the head to melt the solder.
接合頭可配置以根據半導體晶片及接合頭之間的對準而設置半導體晶片在基板上。The bond head can be configured to place a semiconductor wafer on the substrate in accordance with alignment between the semiconductor wafer and the bond head.
根據本發明的第三態樣，提供了一種用於定位半導體晶片與接合頭的方法，方法包含以下步驟： 移動半導體晶片至第一位置； 在移動半導體晶片至第一位置的同時，校正半導體晶片位置以使半導體晶片在第一位置相對於接合頭為第一對準； 從第一位置移動半導體晶片至鄰近接合頭的第二位置； 在移動半導體晶片至第二位置的同時，進一步校正半導體晶片位置以使半導體晶片在第二位置相對於接合頭為第二對準。According to a third aspect of the present invention, a method for locating a semiconductor wafer and a bonding head is provided, the method comprising the steps of: moving a semiconductor wafer to a first location; correcting the semiconductor wafer while moving the semiconductor wafer to the first location Positioning to cause the semiconductor wafer to be in a first alignment relative to the bond head in the first position; moving the semiconductor wafer from the first position to a second position adjacent the bond head; further correcting the semiconductor wafer while moving the semiconductor wafer to the second position The position is such that the semiconductor wafer is in a second alignment relative to the bond head in the second position.
第一對準可包含角度對準及沿著至少一水平參考軸之線性對準。The first alignment can include angular alignment and linear alignment along at least one horizontal reference axis.
第二對準可包含角度對準及沿著兩個水平參考軸之線性對準。The second alignment can include angular alignment and linear alignment along the two horizontal reference axes.
從第一位置移動半導體晶片至第二位置的步驟可包含牢固地固定半導體晶片就定位在黏性助熔劑的預定深度。The step of moving the semiconductor wafer from the first location to the second location can include positioning the semiconductor wafer at a predetermined depth of the viscous flux.
方法可進一步包含牢固地固定半導體晶片就定位在黏性助熔劑的預定深度一預定助熔時間。The method can further include positioning the semiconductor wafer securely at a predetermined depth of the viscous flux for a predetermined fluxing time.
在移動半導體晶片至第一位置的同時，校正半導體晶片位置的步驟可包含判定半導體晶片的相對線性及角度偏移值。The step of correcting the position of the semiconductor wafer while moving the semiconductor wafer to the first location may include determining a relative linearity and angular offset value of the semiconductor wafer.
判定半導體晶片的線性及角度偏移值可包含： 擷取半導體晶片的第一圖像，以及 根據第一圖像，計算及比較相對於參考位置，半導體晶片位置的線性及角度偏移值。Determining the linear and angular offset values of the semiconductor wafer can include: drawing a first image of the semiconductor wafer, and calculating and comparing linear and angular offset values of the semiconductor wafer position relative to the reference position based on the first image.
在移動半導體晶片至第一位置的同時，校正半導體晶片位置的步驟可進一步包含根據相對角度偏移值校正半導體晶片的角度位置。The step of correcting the position of the semiconductor wafer while moving the semiconductor wafer to the first position may further comprise correcting the angular position of the semiconductor wafer based on the relative angular offset value.
在移動半導體晶片至第一位置的同時，校正半導體晶片位置的步驟可進一步包含根據相對線性偏移值校正半導體晶片的線性位置。The step of correcting the position of the semiconductor wafer while moving the semiconductor wafer to the first position may further comprise correcting the linear position of the semiconductor wafer based on the relative linear offset value.
方法可進一步包含： 在第二位置擷取半導體晶片與接合頭的第二圖像；以及 根據第二圖像判定半導體晶片與接合頭的對準。The method can further include: capturing a second image of the semiconductor wafer and the bond head at the second location; and determining alignment of the semiconductor wafer with the bond head based on the second image.
根據本發明的第四態樣，提供了一種熱接合方法，包含以下步驟： 使用如同在第三態樣中定義的方法定位半導體晶片與接合頭； 加熱接合頭至高於貼附至半導體晶片的焊料熔點之溫度； 使用加熱的接合頭在第二位置拾取半導體晶片，從而熔融焊料；以及 根據半導體晶片及接合頭之間的對準，設置半導體晶片在基板上。According to a fourth aspect of the present invention, there is provided a thermal bonding method comprising the steps of: locating a semiconductor wafer and a bonding head using a method as defined in the third aspect; heating the bonding head to a higher solder than attached to the semiconductor wafer The temperature of the melting point; the semiconductor wafer is picked up at the second position using the heated bonding head to melt the solder; and the semiconductor wafer is placed on the substrate according to the alignment between the semiconductor wafer and the bonding head.
使用加熱的接合頭在第二位置拾取半導體晶片的步驟可包含在接合頭接觸半導體晶片之前從黏性助熔劑分離半導體晶片。The step of picking up the semiconductor wafer at the second location using the heated bond head can include separating the semiconductor wafer from the viscous flux before the bond head contacts the semiconductor wafer.
例示性實施例提供用於熱接合半導體晶片至基板的系統及方法，包含在接合之前用於定位半導體晶片與接合頭的系統及方法。特別是，例示性實施例有關於用於半導體晶片對基板的高速及精確覆晶接合的系統及方法。為了清楚起見，在隨後描述中的半導體晶片指具有設置於其上的複數個接線(interconnection)的端子晶片(bumped chip)。複數個接線較佳地為包含可熔的或焊接材料，如能夠電性及/或物理連接基板的錫(tin)的焊接凸塊(solder bump)或柱凸塊(pillar bump)。基板指能夠接收及支撐半導體晶片的裝置載體，如印刷電路板(printed circuit board)、層壓基板(laminate substrate)、可撓性基板(flexible substrate)、矽基板(silicon substrate)、導線架(lead fram)或另一半導體晶片。The illustrative embodiments provide systems and methods for thermally bonding semiconductor wafers to substrates, including systems and methods for locating semiconductor wafers and bond heads prior to bonding. In particular, the illustrative embodiments are directed to systems and methods for high speed and precise flip chip bonding of semiconductor wafers to substrates. For the sake of clarity, a semiconductor wafer in the following description refers to a bumped chip having a plurality of interconnections disposed thereon. The plurality of wires are preferably solder bumps or pillar bumps comprising a fusible or solder material such as tin which can electrically and/or physically connect the substrate. The substrate refers to a device carrier capable of receiving and supporting a semiconductor wafer, such as a printed circuit board, a laminate substrate, a flexible substrate, a silicon substrate, a lead frame (lead) Fram) or another semiconductor wafer.
第2圖示出繪示根據例示性實施例的熱接合器200的示意圖。熱接合器200係由兩個可執行相同或不同接合功能的接合站(bonding station)或系統202、204組成。各接合系統202、204包含用於定位半導體晶片與接合頭的各系統，如同對於第3a圖至第3b圖之更加詳細地描述。接合器200也可包含容納控制設備的控制箱(未示出)。FIG. 2 shows a schematic diagram of a thermal bonder 200 in accordance with an illustrative embodiment. The thermal bonder 200 is comprised of two bonding stations or systems 202, 204 that can perform the same or different bonding functions. Each of the bonding systems 202, 204 includes various systems for positioning the semiconductor wafer and the bond head, as described in more detail with respect to Figures 3a through 3b. The adapter 200 can also include a control box (not shown) that houses the control device.
第3a圖至第3b圖示出根據例示性實施例用於定位半導體晶片與接合頭的系統300。定位系統300包含用於在拾取位置，例如從翻轉器(flipper)304拾取半導體晶片303(第3b圖)且移動半導體晶片303至第一位置的第一傳輸工具302、用於判定經由第一傳輸工具302拾取的半導體晶片303的偏移量的第一光學成像器306、以及用於在第一位置接收半導體晶片303且移動半導體晶片303至半導體晶片303被接合頭310拾取的第二位置的第二傳輸工具308。第一傳輸工具302、第一光學成像器306、第二傳輸工具308以及接合頭310為連接至根據第一光學成像器306提供的數據計算半導體晶片303的相對角度及線性偏移值且指示第一及第二傳輸工具302、308進行需要的校正或補償的控制器(未示出)。定位系統300進一步包含耦接至控制器以用於判定半導體晶片303與接合頭310的對準及在第二位置，半導體晶片303與對應基板之間的對準以反饋至第一光學成像器306且如果需要，用於最終定位校正的第二光學成像器312。3a through 3b illustrate a system 300 for positioning a semiconductor wafer and a bond head in accordance with an illustrative embodiment. The positioning system 300 includes a first transfer tool 302 for picking up a semiconductor wafer 303 (Fig. 3b) from a flipper 304 and moving the semiconductor wafer 303 to a first position at a picking location for determining via the first transmission The first optical imager 306 of the offset of the semiconductor wafer 303 picked up by the tool 302, and the second position for receiving the semiconductor wafer 303 at the first position and moving the semiconductor wafer 303 to the semiconductor wafer 303 by the bonding head 310 Two transmission tools 308. The first transfer tool 302, the first optical imager 306, the second transfer tool 308, and the bond head 310 calculate a relative angle and a linear offset value of the semiconductor wafer 303 connected to the data supplied from the first optical imager 306 and indicate The first and second transfer tools 302, 308 perform a desired correction or compensation controller (not shown). Positioning system 300 further includes coupling to a controller for determining alignment of semiconductor wafer 303 with bond head 310 and, at a second location, alignment between semiconductor wafer 303 and corresponding substrate for feedback to first optical imager 306 And if desired, a second optical imager 312 for final positioning correction.
對於半導體晶片303的有效定位校正的精確移動可在相同位置一起實現或可在不同位置獨立實現。在較佳實現方式中，當移動半導體晶片303至第一位置時，第一傳輸工具302包含旋轉致動器以校正半導體晶片303的角度偏移以及線性致動器以沿著第一水平參考軸(例如，在第3b圖的X軸314)校正半導體晶片303的線性偏移。第二傳輸工具308包含另一線性致動器以沿著第二水平參考軸(例如，在第3b圖的Y軸316)校正半導體晶片303的線性偏移。The precise movement of the effective positioning correction for the semiconductor wafer 303 can be implemented together at the same location or can be implemented independently at different locations. In a preferred implementation, when moving the semiconductor wafer 303 to the first position, the first transfer tool 302 includes a rotary actuator to correct the angular offset of the semiconductor wafer 303 and the linear actuator to follow the first horizontal reference axis The linear offset of the semiconductor wafer 303 is corrected (e.g., on the X-axis 314 of Figure 3b). The second transfer tool 308 includes another linear actuator to correct the linear offset of the semiconductor wafer 303 along a second horizontal reference axis (e.g., the Y-axis 316 of Figure 3b).
在另一實例中，第一傳輸工具302可實現粗略的定位校正，且第二傳輸工具308可實現精細的定位校正。在又一實施例，為了與半導體晶片的最後對準，接合頭310可為水平地可移動，例如根據經由第二光學成像器312提供之數據。在各上述實例中，半導體晶片303在經由接合頭310拾取之前，與接合頭310既角度對準亦沿著兩個水平參考軸線性對準。In another example, the first transfer tool 302 can implement coarse positioning corrections, and the second transfer tool 308 can implement fine positioning corrections. In yet another embodiment, the bond head 310 can be horizontally movable for final alignment with the semiconductor wafer, such as according to data provided via the second optical imager 312. In each of the above examples, the semiconductor wafer 303 is both angularly aligned with the bond head 310 and aligned along the two horizontal reference axes prior to being picked up via the bond head 310.
第4圖示出根據例示性實施例在第3a圖的系統300中所使用的第一傳輸工具302的放大透視圖。在本文中，第一傳輸工具302為拾取及放置機構400形式，其通常包含配置以使用真空或其他適合的工具拾取半導體晶片的拾取頭402、如配置以圍繞其自身的軸旋轉晶片的旋轉致動器404的第一機動機構、如為了拾取及放置動作而配置以在垂直方向移動晶片的線性致動器406的第二機動機構、以及如線性致動器408，以沿著X軸、Y軸或X及Y軸的結合水平地移動晶片之第三機動機構。Figure 4 illustrates an enlarged perspective view of the first transfer tool 302 used in the system 300 of Figure 3a in accordance with an illustrative embodiment. Herein, the first transfer tool 302 is in the form of a pick and place mechanism 400 that typically includes a pick head 402 configured to pick up a semiconductor wafer using a vacuum or other suitable tool, such as a rotation configured to rotate the wafer about its own axis a first motoring mechanism of the actuator 404, a second motoring mechanism configured to move the linear actuator 406 of the wafer in a vertical direction for picking and placing operations, and a linear actuator 408, such as along the X-axis, Y The combination of the shaft or the X and Y axes horizontally moves the third maneuvering mechanism of the wafer.
第5圖示出根據例示性實施例在第3a圖的系統300中所使用的第一光學成像器306的放大透視圖。在此實施例中，第一光學成像器306為查找攝影機(look-up camera)500或配置以擷取半導體晶片圖像、處理半導體晶片之定位點(fiducial point)或邊緣圖像以及傳送資料至控制器以計算相對X-Y偏移(即相對線性偏移值)以及相對θ偏移(即相對角度偏移值)的等效圖像擷取系統的形式。查找攝影機500通常包含具有圖像處理器及光源的視覺攝影機單元502(涵蓋在第5圖)。在一些例示性配置中，查找攝影機500也包含如果攝影機單元502對將被攝影的半導體晶片表面以一角度放置時，通常會被使用的半鏡半玻璃體504。FIG. 5 illustrates an enlarged perspective view of first optical imager 306 used in system 300 of FIG. 3a in accordance with an illustrative embodiment. In this embodiment, the first optical imager 306 is a look-up camera 500 or configured to capture a semiconductor wafer image, process a fiducial point or edge image of the semiconductor wafer, and transmit the data to The controller takes the form of an equivalent image capture system that calculates relative XY offset (ie, relative linear offset value) and relative θ offset (ie, relative angular offset value). The lookup camera 500 typically includes a vision camera unit 502 having an image processor and a light source (covered in Figure 5). In some exemplary configurations, lookup camera 500 also includes a half mirror half glass body 504 that would typically be used if camera unit 502 placed the surface of the semiconductor wafer to be photographed at an angle.
第6圖示出根據例示性實施例在第3a圖的系統300中所使用的第二傳輸工具308的放大透視圖。在本文中，第二傳輸工具為包含用以接收半導體晶片之晶片接收部分602，即限定的位置的晶片饋送器600的形式。晶片饋送器600也包含配置以牢固地固定半導體晶片就定位直到半導體晶片被遞交至接合工具604的固定工具。在較佳實施例中，固定工具包含黏性表面或貼片(patch)，如以下對於第11圖至第12圖更詳細描述的黏性助熔劑。例如，黏性助熔劑被容納在形成晶片接收部分602的助熔劑儲存槽。其他配置為可能的。擇一地，固定工具可經由真空吸附或允許半導體晶片在其被接合工具604拾取之前放開的其他工具而牢牢地固定半導體晶片。晶片饋送器600進一步包含配置以攜帶晶片至接合頭604的驅動機構，如線性致動器606。FIG. 6 illustrates an enlarged perspective view of a second transfer tool 308 used in the system 300 of FIG. 3a in accordance with an exemplary embodiment. Herein, the second transfer tool is in the form of a wafer feeder 600 that includes a wafer receiving portion 602 for receiving a semiconductor wafer, ie, a defined location. Wafer feeder 600 also includes a fixture that is configured to securely hold the semiconductor wafer until the semiconductor wafer is delivered to bonding tool 604. In a preferred embodiment, the fixture comprises a viscous surface or patch, such as the viscous flux described in more detail below with respect to Figures 11-12. For example, the viscous flux is contained in the flux storage tank forming the wafer receiving portion 602. Other configurations are possible. Alternatively, the fixture can securely hold the semiconductor wafer via vacuum adsorption or other tools that allow the semiconductor wafer to be released before it is picked up by the bonding tool 604. Wafer feeder 600 further includes a drive mechanism, such as linear actuator 606, configured to carry the wafer to bond head 604.
參照第7a圖至第7b圖、第8a圖至第8b圖、第9a圖至第9b及第10a圖至第10b圖，現在描述用於使用第3a圖的系統定位半導體晶片與接合頭的例示性製程順序。Referring to FIGS. 7a to 7b, 8a to 8b, 9a to 9b, and 10a to 10b, an illustration for locating a semiconductor wafer and a bonding head using the system of FIG. 3a will now be described. Sex process sequence.
在第7a圖至第7b圖中，例如，半導體晶片702從晶片翻轉器704被提供在拾取位置。第一傳輸工具經由使用真空或其他工具以拾取及放置機構400的形式(第4圖)從拾取位置拾取晶片702。在此階段的半導體晶片702可不具有理想的定位且可因為如在從晶圓頂出晶片的變量、在經由晶片翻轉器704工具拾取的變量、在交接至拾取工具的變量等因素發生移動。在例示性實施例，在與基板接合之前，作為預備步驟校正移動或錯位。In FIGS. 7a to 7b, for example, the semiconductor wafer 702 is supplied from the wafer flipper 704 at the pickup position. The first transfer tool picks up the wafer 702 from the pick-up position via the use of a vacuum or other tool in the form of a pick and place mechanism 400 (Fig. 4). The semiconductor wafer 702 at this stage may not have the desired positioning and may move due to factors such as variables that eject the wafer from the wafer, variables picked up by the wafer flipper 704 tool, variables that are handed over to the pick tool, and the like. In an exemplary embodiment, the movement or misalignment is corrected as a preliminary step prior to engagement with the substrate.
在第8a圖至第8b圖，拾取及放置機構400為了圖像處理，攜帶晶片702至預定的檢查位置。通常，為查找攝影機500(第5圖)形式的第一光學成像器擷取晶片702的第一圖像，並處理第一圖像且送至控制器。控制器接著計算且比較相對於參考位置的晶片702位置的偏移值，且為了在水平參考軸及圍繞其自身的軸(也就是說，通過晶片702平面的垂直軸)的晶片702的定位校正，送出偏移值至拾取及放置機構400的各機動機構(例如，旋轉及線性致動器)。In Figures 8a through 8b, the pick and place mechanism 400 carries the wafer 702 to a predetermined inspection position for image processing. Typically, a first image of the wafer 702 is captured for a first optical imager in the form of a seek camera 500 (figure 5) and the first image is processed and sent to a controller. The controller then calculates and compares the offset value of the wafer 702 position relative to the reference position, and for positioning correction of the wafer 702 at the horizontal reference axis and the axis about itself (that is, through the vertical axis of the wafer 702 plane). The offset values are sent to the various mechanisms of the pick and place mechanism 400 (eg, rotary and linear actuators).
在第9a圖及第9b圖，拾取及放置機構400使用各致動器，經由旋轉晶片702至所期望的角度且以所需的線性補償沿著第一水平參考軸(即X軸)移動晶片702而進行第一校正。拾取及放置機構400然後在確定晶片702為大致上平行於晶片接收部分的平面的同時放置晶片在第二傳輸工具的指定位置上(例如，晶片接收部分)。In Figures 9a and 9b, the pick and place mechanism 400 uses the actuators to move the wafer along the first horizontal reference axis (i.e., the X axis) by rotating the wafer 702 to the desired angle and with the desired linear compensation. The first correction is performed 702. The pick and place mechanism 400 then places the wafer at a designated location of the second transport tool (eg, the wafer receiving portion) while determining that the wafer 702 is substantially parallel to the plane of the wafer receiving portion.
在第10a圖至第10b圖，第二傳輸工具以晶片饋送器600(第6圖)的形式在晶片接收部分接收晶片702，固定晶片702就定位，且以在此方向所需的校正沿著第二水平參考軸(即Y軸)移動晶片702直到晶片702位在第二位置。第二光學成像器以視覺攝影機1000的形式在接合頭1002上擷取晶片702的第二圖像且傳送圖像至控制器，控制器計算及比較晶片位置相對於接合工具1002或上述晶片先前擷取的圖像。使用此比較資訊以在放置晶片702在基板上之前判定晶片702與接合工具1002的對準。如果晶片不正確地對準至接合工具1002，偏移值被傳送回控制器以指示第一光學成像器306(第3a圖)，第一傳輸工具及第二傳輸工具對後續的晶片做出必要的調節。此外，視覺攝影機1000也可擷取晶片702及基板的圖像以判定晶片與基板之間的對準。如果晶片702相對於基板為僅角度地偏移，接合工具1002可做出必要的角度校正以定位晶片702與基板對準。另一方面，如果晶片702與接合工具1002或基板的偏移值在可接受的範圍外，則晶片702被移除且不發生與基板的接合。In Figures 10a through 10b, the second transport tool receives the wafer 702 at the wafer receiving portion in the form of a wafer feeder 600 (Fig. 6), the fixed wafer 702 is positioned, and the correction required in this direction is along The second horizontal reference axis (i.e., the Y-axis) moves the wafer 702 until the wafer 702 is in the second position. The second optical imager captures a second image of the wafer 702 on the bond head 1002 in the form of a visual camera 1000 and transmits the image to a controller that calculates and compares the wafer position relative to the bonding tool 1002 or the previous wafer. Take the image. This comparison information is used to determine the alignment of the wafer 702 with the bonding tool 1002 prior to placing the wafer 702 on the substrate. If the wafer is incorrectly aligned to the bonding tool 1002, the offset value is transmitted back to the controller to indicate the first optical imager 306 (Fig. 3a), the first transfer tool and the second transfer tool making the necessary wafers for subsequent wafers Adjustment. In addition, the visual camera 1000 can also capture images of the wafer 702 and the substrate to determine alignment between the wafer and the substrate. If wafer 702 is angularly offset relative to the substrate, bonding tool 1002 can make the necessary angular correction to position wafer 702 in alignment with the substrate. On the other hand, if the offset value of the wafer 702 and the bonding tool 1002 or substrate is outside the acceptable range, the wafer 702 is removed and no bonding to the substrate occurs.
如同以下更詳細地討論，從第一位置傳輸晶片702至第二位置時，固定晶片702就定位的較佳方法包含使用黏性材料，如助熔劑；然而，也可使用其他方法，如使用真空吸附。As discussed in more detail below, a preferred method of positioning the fixed wafer 702 when transporting the wafer 702 from the first location to the second location includes the use of a viscous material, such as a flux; however, other methods, such as vacuum, can also be used. Adsorption.
在本熱接合方法中，當第二傳輸工具，例如晶片饋送器600(第6圖)，從第一位置移動晶片至第二位置時，進行半導體晶片的助熔。第11圖示出繪示根據例示性實施例的助熔方法的示意圖。在步驟1102及1104，半導體晶片1106被帶至含有助熔劑1110，如黏性助熔劑的助熔劑儲存槽1108，且放置入助熔劑儲存槽1108至一預定深度以使助熔劑大致上覆蓋在晶片1106之下的焊料。如同上述，晶片1106在這些步驟中通常使用類似於第4圖的拾取及放置機構400之拾取及放置機構1112來處理，且助熔劑儲存槽1108較佳地形成晶片饋送器600的晶片接收部分602(第6圖)。In the present thermal bonding method, when a second transfer tool, such as wafer feeder 600 (Fig. 6), moves the wafer from the first position to the second position, fluxing of the semiconductor wafer is performed. FIG. 11 shows a schematic diagram illustrating a fluxing method in accordance with an exemplary embodiment. At steps 1102 and 1104, the semiconductor wafer 1106 is brought to a flux storage tank 1108 containing a flux 1110, such as a viscous flux, and placed into the flux storage tank 1108 to a predetermined depth such that the flux substantially covers the wafer. Solder under 1106. As described above, the wafer 1106 is typically processed in these steps using a pick and place mechanism 1112 similar to the pick and place mechanism 400 of FIG. 4, and the flux storage tank 1108 preferably forms the wafer receiving portion 602 of the wafer feeder 600. (Figure 6).
其次，在步驟1114，在晶片1106經由助熔劑1110固定就定位的同時，晶片1106被移動至接合頭1116。擇一地，如同第6圖所討論的，黏性助熔劑1110可為黏性表面或貼片以固定晶片1106於定位。晶片1106被設置在助熔劑1110中的總時間可根據晶片1106在第一位置的時間、移動的時間以及在被接合頭1116拾取之前，在第二位置的晶片的時間而計算出。可使用為視覺攝影機1000(第10a圖)形式的第二光學成像器進行晶片1106及接合頭1116之間的對準的核對。Next, at step 1114, wafer 1106 is moved to bond head 1116 while wafer 1106 is positioned via flux 1110. Alternatively, as discussed in FIG. 6, the viscous flux 1110 can be a viscous surface or patch to secure the wafer 1106 for positioning. The total time that wafer 1106 is disposed in flux 1110 can be calculated based on the time of wafer 1106 at the first location, the time of movement, and the time of the wafer at the second location prior to being picked up by bond head 1116. Collation of the alignment between the wafer 1106 and the bond head 1116 can be performed using a second optical imager in the form of a visual camera 1000 (Fig. 10a).
在步驟1118的一實施方式中，使用耦接至其的加熱裝置(未示出)維持在高於焊料熔點之溫度的接合頭1116拾取晶片1106。例如，接合頭1116包含在接合頭1116接觸晶片1106之前，導致晶片1106從遠離助熔劑儲存槽1108的黏性助熔劑1110分離的吸附工具。具體地，接合頭1116與晶片1106維持一間隙且通過吸附工具，導致晶片1106跨越間隙以接觸接合頭1116。因此，來自接合頭的熱能不會傳輸至黏性助熔劑1110，且黏性助熔劑1110的性質在此製程期間不會改變。在另一實施方式，接合頭1116不會維持在提高的溫度，而是僅在拾取晶片1106之前加熱。在又一實施方式中，接合頭1116僅在拾取晶片1106之後或放置晶片1106至基板上之後加熱。在這樣的例子中，接合頭1116不處於提高的溫度且在晶片1106仍然在助熔劑儲存槽1108中時可直接接觸晶片1106以拾取晶片1106。In an embodiment of step 1118, the bonding head 1116, which is maintained at a temperature above the melting point of the solder, is used to pick up the wafer 1106 using a heating device (not shown) coupled thereto. For example, the bond head 1116 includes an sorbent tool that causes the wafer 1106 to separate from the viscous flux 1110 remote from the flux storage tank 1108 before the bond head 1116 contacts the wafer 1106. Specifically, the bond head 1116 maintains a gap with the wafer 1106 and passes through the adsorption tool, causing the wafer 1106 to span the gap to contact the bond head 1116. Therefore, thermal energy from the bond head is not transferred to the viscous flux 1110, and the properties of the viscous flux 1110 do not change during this process. In another embodiment, the bond head 1116 is not maintained at an elevated temperature, but is only heated prior to picking up the wafer 1106. In yet another embodiment, the bond head 1116 is heated only after picking up the wafer 1106 or after placing the wafer 1106 onto the substrate. In such an example, the bond head 1116 is not at an elevated temperature and can directly contact the wafer 1106 to pick up the wafer 1106 while the wafer 1106 is still in the flux storage tank 1108.
一旦加熱的接合頭1116拾取晶片1106，熱能從接合頭1116傳輸至晶片1106且然後傳輸至焊料，從而在焊料被助熔劑覆蓋的同時熔融焊料。最後，在步驟1120，在如同上述參照第10a圖至第10b圖確認晶片1106與基板1122之間的再對準之後，接合頭1116放置晶片1106在基板1122上，同時助熔劑儲存槽1108移回至第一位置以接收下一個晶片。Once the heated bond head 1116 picks up the wafer 1106, thermal energy is transferred from the bond head 1116 to the wafer 1106 and then to the solder to melt the solder while the solder is covered by the flux. Finally, at step 1120, after realignment between the wafer 1106 and the substrate 1122 is confirmed as described above with reference to FIGS. 10a through 10b, the bond head 1116 places the wafer 1106 on the substrate 1122 while the flux storage tank 1108 is moved back. To the first position to receive the next wafer.
如所述，焊料僅在助熔之後熔融，從而避免在助熔點塗抹且改變在儲存槽的助熔劑性質。半導體晶片的助熔可合併至定位半導體晶片與接合頭的製程中，允許同時操作。相對地龐大的接合頭僅需要小的移動以拾取半導體晶片，對準且放置晶片在基板上以影響接合，從而改善生產量(throughput)。此外，接合頭保持在大致上相同的提高溫度而不需要間歇性的接通和斷開。有利地，在例示性實施例的熱接合方法可更有效率地且更準確地實行。As stated, the solder melts only after the fluxing, thereby avoiding application at the melting point and changing the flux properties in the reservoir. The fluxing of the semiconductor wafer can be incorporated into the process of positioning the semiconductor wafer and the bond head, allowing simultaneous operation. The relatively bulky bond head requires only small movement to pick up the semiconductor wafer, align and place the wafer on the substrate to affect the bond, thereby improving throughput. In addition, the bond heads remain at substantially the same elevated temperature without the need for intermittent turn-on and turn-off. Advantageously, the thermal bonding method of the illustrative embodiments can be performed more efficiently and accurately.
第12a圖至第12c圖示出根據例示性實施例形成晶片饋送器的晶片接收部分的助熔劑儲存槽1200的放大圖。在第12a圖，助熔劑儲存槽1200使用助熔劑杯(flux cup)1202以助熔劑斟滿(topped up)。此可能發生在各晶片被傳送至接合頭之後，或在預定數量的傳送之後。在第12b圖，晶片設置在助熔劑儲存槽1200，且準備被傳送。在第12c圖，晶片饋送器的驅動機構沿著平行於導桿1204的方向移動助熔劑儲存槽1200與固定在其上的晶片。如同上述，沿著平行至導桿的參考軸的定位校正可根據晶片的起始偏移而實現。12a through 12c illustrate enlarged views of a flux storage tank 1200 that forms a wafer receiving portion of a wafer feeder in accordance with an exemplary embodiment. In Figure 12a, the flux storage tank 1200 is topped up with a flux cup using a flux cup 1202. This may occur after each wafer is transferred to the bond head, or after a predetermined number of transfers. In Figure 12b, the wafer is placed in the flux storage tank 1200 and is ready to be transferred. In Fig. 12c, the drive mechanism of the wafer feeder moves the flux storage tank 1200 and the wafer fixed thereto in a direction parallel to the guide bar 1204. As described above, the positioning correction along the reference axis parallel to the guide can be achieved depending on the initial offset of the wafer.
在例示性實施例的助熔製程期間拾取的助熔劑的量可根據助熔時間決定。第13a圖至第13b圖示出根據不同助熔時間比較助熔劑的尺寸的結果。在第13a圖，助熔時間為200毫秒(ms)，而在第13b圖，助熔時間為1000毫秒。如同可從第13a圖至第13b圖看到的，當助熔時間越長，助熔劑尺寸越大，表示越大量的助熔劑體積被焊接凸塊拾取。The amount of flux picked up during the fluxing process of the exemplary embodiment can be determined based on the fluxing time. Figures 13a through 13b show the results of comparing the size of the flux according to different fluxing times. In Figure 13a, the fluxing time is 200 milliseconds (ms), while in Figure 13b, the fluxing time is 1000 milliseconds. As can be seen from Figures 13a to 13b, the longer the fluxing time, the larger the flux size, indicating that the larger volume of flux is picked up by the solder bumps.
此外，在例示性實施例的助熔方法可經由焊接凸塊拾取提供一致的助熔劑體積。第14a圖至第14b圖示出比較第11圖的方法與傳統方法之間的助熔劑尺寸一致性的結果。如同可從繪示本助熔方法的第14a圖看到的，焊接凸塊的尺寸在晶片的所有不同部分為相對均勻的。另一方面，在繪示傳統衝壓助熔法(punch fluxing method)的第14b圖，焊接凸塊的尺寸有所不同，特別是接近晶片的角落。Moreover, the fluxing method of the exemplary embodiment can provide a consistent flux volume via solder bump picking. Figures 14a to 14b show the results of comparing the dimensional consistency of the flux between the method of Figure 11 and the conventional method. As can be seen from Figure 14a, which depicts the fluxing method, the dimensions of the solder bumps are relatively uniform across all different portions of the wafer. On the other hand, in the 14th drawing of the conventional punch fluxing method, the size of the solder bumps is different, particularly near the corners of the wafer.
第15圖示出繪示根據例示性實施例用於定位半導體晶片與接合頭的方法的流程圖1500。在步驟1502，半導體晶片移動至第一位置。在步驟1504，移動半導體晶片至第一位置的同時校正半導體晶片的位置以使半導體晶片在第一位置相對於接合頭為第一對準。在步驟1506，半導體晶片從第一位置移動至鄰近接合頭的第二位置。在步驟1508，在移動半導體晶片至第二位置的同時進一步校正半導體晶片的位置以使半導體晶片在第二位置相對於接合頭為第二對準。FIG. 15 illustrates a flow chart 1500 illustrating a method for locating a semiconductor wafer and bond head in accordance with an illustrative embodiment. At step 1502, the semiconductor wafer is moved to the first position. At step 1504, the position of the semiconductor wafer is corrected while moving the semiconductor wafer to the first position to cause the semiconductor wafer to be in a first alignment relative to the bond head in the first position. At step 1506, the semiconductor wafer is moved from the first position to a second position adjacent the bond head. At step 1508, the position of the semiconductor wafer is further corrected while moving the semiconductor wafer to the second position to cause the semiconductor wafer to be in a second alignment relative to the bond head in the second position.
第16圖示出繪示根據例示性實施例的熱接合方法的流程圖1600。在步驟1602，使用如上對於第15圖的描述之方法定位半導體晶片與接合頭。在步驟1604，接合頭加熱至高於貼附至半導體晶片的焊料熔點的溫度。在步驟1606，使用加熱的接合頭在第二位置拾取半導體晶片，從而熔融焊料。在步驟1608，半導體晶片根據半導體晶片及接合頭之間的對準設置在基板上。FIG. 16 shows a flow chart 1600 illustrating a thermal bonding method in accordance with an illustrative embodiment. At step 1602, the semiconductor wafer and bond head are positioned using the method described above for FIG. At step 1604, the bond head is heated to a temperature above the melting point of the solder attached to the semiconductor wafer. At step 1606, the semiconductor wafer is picked up at the second location using the heated bond head to melt the solder. At step 1608, the semiconductor wafer is disposed on the substrate in accordance with alignment between the semiconductor wafer and the bond head.
所屬技術領域中的通常知識者將理解的是，可對如在特定實施例所示的本發明進行許多變化及/或修改，而不脫離為廣泛描述的本發明的精神及範疇。本實施例為因此在所有態樣中被認為係例示性而非限制性。It will be understood by those of ordinary skill in the art that the present invention may be modified and/or modified without departing from the spirit and scope of the invention. The present embodiments are therefore to be considered as illustrative and not restrictive.
102、303、702、1106‧‧‧晶片
104、1108、1200‧‧‧儲存槽
106‧‧‧助熔劑板
108、310、1002、1116‧‧‧接合頭
110、1122‧‧‧基板
200‧‧‧接合器
202、204、300‧‧‧系統
302‧‧‧第一傳輸工具
304、704‧‧‧翻轉器
306‧‧‧第一光學成像器
308‧‧‧第二傳輸工具
312‧‧‧第二光學成像器
314‧‧‧X軸
316‧‧‧Y軸
400、1112‧‧‧拾取及放置機構
402‧‧‧拾取頭
404‧‧‧旋轉致動器
406、408、606‧‧‧線性致動器
500‧‧‧查找攝影機
502‧‧‧攝影機單元
504‧‧‧半鏡半玻璃體
600‧‧‧晶片饋送器
602‧‧‧晶片接收部分
604‧‧‧接合工具
1000‧‧‧視覺攝影機
1102、1104、1114、1118、1120、1502、1504、1506、1508、1602、1604、1606、1608‧‧‧步驟
1108、1200‧‧‧助熔劑儲存槽
1110‧‧‧助熔劑
1202‧‧‧助熔劑杯
1204‧‧‧導桿
1500、1600‧‧‧流程圖102, 303, 702, 1106‧‧‧ wafers
104, 1108, 1200‧‧‧ storage tanks
106‧‧‧ Flux board
108, 310, 1002, 1116‧‧‧ joint head
110, 1122‧‧‧ substrate
200‧‧‧ Adapter
202, 204, 300‧‧‧ systems
302‧‧‧First transmission tool
304, 704‧‧‧ flipper
306‧‧‧First optical imager
308‧‧‧Second transmission tool
312‧‧‧Second optical imager
314‧‧‧X-axis
316‧‧‧Y axis
400, 1112‧‧‧ pick and place institutions
402‧‧‧ pick up head
404‧‧‧Rotary actuator
406, 408, 606‧‧‧ linear actuators
500‧‧‧Search camera
502‧‧‧ camera unit
504‧‧‧Half-mirror semi-vitreous
600‧‧‧ wafer feeder
602‧‧‧ wafer receiving part
604‧‧‧ Bonding tools
1000‧‧‧Visual Camera
Steps 1102, 1104, 1114, 1118, 1120, 1502, 1504, 1506, 1508, 1602, 1604, 1606, 1608‧‧
1108, 1200‧‧ flux storage tank
1110‧‧‧ Flux
1202‧‧‧ Flux Cup
1204‧‧‧guides
1500, 1600‧‧‧ flow chart
本發明的實施例對於所屬技術領域中的通常知識者而言將從下列經由僅為例示的方式所寫的描述，並結合圖式更好的理解且容易地顯而易見，其中：The embodiments of the present invention will be better understood and readily apparent from the following description, taken in the <RTIgt;
第1圖示出繪示傳統助熔製程的示意圖。Figure 1 shows a schematic diagram showing a conventional fluxing process.
第2圖示出根據例示性實施例的熱接合器的透視圖。FIG. 2 illustrates a perspective view of a thermal adapter in accordance with an illustrative embodiment.
第3a圖示出根據例示性實施例用於定位半導體晶片與接合頭的系統的透視圖。Figure 3a shows a perspective view of a system for positioning a semiconductor wafer and a bond head in accordance with an illustrative embodiment.
第3b圖示出第3a圖的系統的示意圖。Figure 3b shows a schematic diagram of the system of Figure 3a.
第4圖示出根據例示性實施例在第3a圖的系統中所使用的第一傳輸工具的放大透視圖。Figure 4 shows an enlarged perspective view of a first transport tool used in the system of Figure 3a in accordance with an illustrative embodiment.
第5圖示出根據例示性實施例在第3a圖的系統中所使用的第一光學成像器的放大透視圖。Figure 5 illustrates an enlarged perspective view of a first optical imager used in the system of Figure 3a in accordance with an illustrative embodiment.
第6圖示出根據例示性實施例在第3a圖的系統中所使用的第二傳輸工具的放大透視圖。Figure 6 shows an enlarged perspective view of a second transport tool used in the system of Figure 3a in accordance with an illustrative embodiment.
第7a圖示出繪示拾取半導體晶片的第3a圖的系統的放大透視圖。Figure 7a shows an enlarged perspective view of the system of Figure 3a for picking up a semiconductor wafer.
第7b圖示出對應至第7a圖的示意圖。Figure 7b shows a schematic diagram corresponding to Figure 7a.
第8a圖示出繪示判定在第7a圖中拾取的半導體晶片的偏移值的第3a圖的系統的放大透視圖。Figure 8a shows an enlarged perspective view of the system of Figure 3a showing the offset value of the semiconductor wafer picked up in Figure 7a.
第8b圖示出對應至第8a圖的示意圖。Figure 8b shows a schematic diagram corresponding to Figure 8a.
第9a圖示出繪示進行第一定位校正的第3a圖的系統的放大透視圖。Figure 9a shows an enlarged perspective view of the system showing Figure 3a of the first positioning correction.
第9b圖示出對應至第9a圖的示意圖。Figure 9b shows a schematic diagram corresponding to Figure 9a.
第10a圖示出繪示進行第二定位校正的第3a圖的系統的放大透視圖。Figure 10a shows an enlarged perspective view of the system of Figure 3a showing the second positioning correction.
第10b圖示出對應至第10a圖的示意圖。Figure 10b shows a schematic diagram corresponding to Figure 10a.
第11圖示出繪示根據例示性實施例的助熔方法的示意圖。FIG. 11 shows a schematic diagram illustrating a fluxing method in accordance with an exemplary embodiment.
第12a圖至第12c圖示出根據例示性實施例的晶片饋送器的晶片接收部分的放大圖。12a to 12c are enlarged views of a wafer receiving portion of a wafer feeder according to an exemplary embodiment.
第13a圖至第13b圖示出根據不同助熔時間比較助熔劑尺寸的結果。Figures 13a through 13b show the results of comparing flux sizes according to different fluxing times.
第14a圖至第14b圖示出比較第11圖的方法與傳統方法之間的助熔劑尺寸均勻性的結果。Figures 14a to 14b show the results of comparing the uniformity of the flux size between the method of Fig. 11 and the conventional method.
第15圖示出繪示根據例示性實施例用於定位半導體晶片與接合頭的方法的流程圖。Figure 15 illustrates a flow chart illustrating a method for locating a semiconductor wafer and a bond head in accordance with an illustrative embodiment.
第16圖示出繪示根據例示性實施例的熱接合方法的流程圖。Figure 16 shows a flow chart illustrating a method of thermal bonding in accordance with an illustrative embodiment.
300‧‧‧系統 300‧‧‧ system
302‧‧‧第一傳輸工具 302‧‧‧First transmission tool
304‧‧‧翻轉器 304‧‧‧Flipper
306‧‧‧第一光學成像器 306‧‧‧First optical imager
308‧‧‧第二傳輸工具 308‧‧‧Second transmission tool
310‧‧‧接合頭 310‧‧‧ Bonding head
312‧‧‧第二光學成像器 312‧‧‧Second optical imager
Claims (27)
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| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US201361877306P | 2013-09-13 | 2013-09-13 | |
| US61/877,306 | 2013-09-13 | ||
| US201462012427P | 2014-06-16 | 2014-06-16 | |
| US62/012,427 | 2014-06-16 |
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| CN (1) | CN105531809B (en) |
| TW (1) | TWI648811B (en) |
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| TWI698946B (en) * | 2015-10-16 | 2020-07-11 | 德商紐豹有限責任合資公司 | Element control |
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| TWI632626B (en) * | 2016-01-06 | 2018-08-11 | 日商新川股份有限公司 | Electronic parts processing unit |
| CN107546137B (en) | 2016-06-23 | 2019-11-26 | 上海微电子装备（集团）股份有限公司 | Chip bonding device and its bonding method |
| CN108565241B (en) * | 2018-05-22 | 2020-03-24 | 苏州艾科瑞思智能装备股份有限公司 | Chip flip-chip micro-assembling machine |
| CN113050702B (en) * | 2021-06-02 | 2021-08-31 | 中科长光精拓智能装备(苏州)有限公司 | Flexible carrier position correction device and method |
| US11605610B2 (en) * | 2021-09-28 | 2023-03-14 | Google Llc | Depth-adaptive mechanism for ball grid array dipping |
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| JP2770817B2 (en) * | 1996-06-19 | 1998-07-02 | 日本電気株式会社 | Chip mounting apparatus and method |
| CH698718B1 (en) * | 2007-01-31 | 2009-10-15 | Oerlikon Assembly Equipment Ag | A device for mounting a flip chip on a substrate. |
| JP2010287816A (en) * | 2009-06-15 | 2010-12-24 | Canon Inc | Apparatus and method for positioning substrate |
| KR101193361B1 (en) * | 2010-05-17 | 2012-10-19 | (주)나노솔루션테크 | Apparatus for aligning wafers |
| CN102275869B (en) * | 2011-08-03 | 2014-04-09 | 苏州大学 | Equipment and method for bonding single chip and wafer |
| CH705802B1 (en) * | 2011-11-25 | 2016-04-15 | Esec Ag | Means for the mounting of semiconductor chips. |
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| WO2015038074A1 (en) | 2015-03-19 |
| CN105531809B (en) | 2019-03-15 |
| TWI648811B (en) | 2019-01-21 |
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