TW201519756A - Circuit board structure for isolating signal interference - Google Patents

Circuit board structure for isolating signal interference Download PDF

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Publication number
TW201519756A
TW201519756A TW103143258A TW103143258A TW201519756A TW 201519756 A TW201519756 A TW 201519756A TW 103143258 A TW103143258 A TW 103143258A TW 103143258 A TW103143258 A TW 103143258A TW 201519756 A TW201519756 A TW 201519756A
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circuit layer
grounding
pair
signal
pairs
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TW103143258A
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Chinese (zh)
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TWI583297B (en
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Xuan-He Zhong
Chien-Ling Tseng
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Kuang Ying Comp Equipment Co
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Abstract

The present invention relates to a circuit board structure for isolating signal interference, which is mainly composed of the lamination including a first circuit layer (TOP layer), a second circuit layer (GND layer), a third circuit layer (VCC layer), and a fourth circuit layer (BOT layer), wherein the first circuit layer comprises a plurality (four pairs) of grounding pair sets arranged in parallel. Each grounding pair set is independently disposed and not connected to the others. A first and a second grounding portions, which are adjacent and electrically connected to each other, are defined on the grounding pair set. In addition, the second circuit layer has a cutting portion at a position relative to each grounding pair set. As such, through the design of the first and second grounding portions, decays can be suppressed while signals will not interfere with each other due to the cutting portion. Furthermore, the second circuit layer has a design of a hollow portion, so as to effectively balance impedance.

Description

隔離訊號干擾之電路板結構 Circuit board structure for isolating signal interference

本發明為提供一種電路板結構,尤指一種可抑制衰減、可使訊號不相互干擾及平衡阻抗的隔離訊號干擾之電路板結構。 The invention provides a circuit board structure, in particular to a circuit board structure capable of suppressing attenuation, preventing signal interference from interfering with each other and balancing impedance.

按,電連接器之運用已是相當的廣泛,無論是USB或HDMI或是同軸線纜連接器等,皆已普遍被大眾所使用,然而,一般習用的連接器電路板結構,其中接地端(GND)大多與電源負極結合在一起,此方式最大之缺點在於亦會發生嚴重的訊號干擾問題。 Press, the use of electrical connectors has been quite extensive, whether it is USB or HDMI or coaxial cable connectors, etc., have been widely used by the public, however, the commonly used connector circuit board structure, where the ground ( GND) is mostly combined with the negative pole of the power supply. The biggest disadvantage of this method is that serious signal interference problems also occur.

是以,要如何解決上述習用之問題與缺失,即為本發明之發明人與從事此行業之相關廠商所亟欲研究改善之方向所在者。 Therefore, how to solve the above problems and deficiencies in the above-mentioned applications, that is, the inventors of the present invention and those involved in the industry are eager to study the direction of improvement.

故,本發明之發明人有鑑於上述缺失,乃蒐集相關資料,經由多方評估及考量,並以從事於此行業累積之多年經驗,經由不斷試作及修改,始設計出此種可抑制衰減、可使訊號不相互干擾及平衡阻抗的隔離訊號干擾之電路板結構的發明專利者。 Therefore, the inventors of the present invention have collected the relevant information in view of the above-mentioned deficiencies, and through multi-party evaluation and consideration, and through years of experience accumulated in the industry, through continuous trial and modification, the design can suppress such attenuation. Invention patents for circuit board structures that do not interfere with each other and balance impedance with signal interference.

本發明之主要目的在於:透過第一、第二接地部之設計可抑制衰減,而經由切割部則得以使訊號不會互相干擾等進步性,再者,第二電路層亦有裸空部設計,以有效平衡阻抗。 The main object of the present invention is to suppress the attenuation through the design of the first and second grounding portions, and to make the signals not interfere with each other through the cutting portion, and the second circuit layer also has a bare space design. To effectively balance the impedance.

為達上述目的之主要結構包括第一電路層、設於第一電路層一面處之第二電路層、設於第二電路層另一面之第三電路層及設於第三電路層背離第二電路層面處的第四電路層,其中各層的特徵在於: 第一電路層,係包含數個並行排列設置之接地對組,各接地對組乃分別獨立設置且彼此不相連結,並於接地對組上界定有兩個相鄰設且電性連結的第一 、第二接地部,另外,於接地對組一側處乃設有差分訊號對組,且各差分訊號對組分別包含有分別獨立不相連之第一訊號部及第二訊號部,並差分訊號對組兩側分別具有由接地對組兩側所延伸的接地基部對組,同樣地,各接地基部對組相互不相連。 The main structure for achieving the above purpose includes a first circuit layer, a second circuit layer disposed on one side of the first circuit layer, a third circuit layer disposed on the other surface of the second circuit layer, and a second circuit layer disposed away from the second circuit layer A fourth circuit layer at the circuit level, wherein each layer is characterized by: The first circuit layer includes a plurality of ground pair groups arranged in parallel, each of the ground pair groups being independently disposed and not connected to each other, and two adjacent and electrically connected groups are defined on the ground pair group One And a second grounding portion, and a differential signal pair group is disposed at one side of the grounding pair, and each of the differential signal pair groups respectively includes a first signal portion and a second signal portion that are independently disconnected, and the differential signal The two sides of the group respectively have a pair of ground base pairs extending from both sides of the ground pair group, and similarly, the ground base pairs are not connected to each other.

第二電路層,包含位在對應各接地對組位置之間的切割部,且所述的切割部為不導電的形態,除此之外,第二電路層一側處乃與接地基部對組一端處電性連結,且在對應各該差分訊號對組之位置處分別具有裸空部,同樣地,裸空部同屬不導電形態。 The second circuit layer includes a cutting portion located between the positions of the corresponding ground pair groups, and the cutting portion is in a non-conducting form, and the side of the second circuit layer is paired with the grounding base. One end is electrically connected, and has a bare space at a position corresponding to each of the differential signal pair groups. Similarly, the bare space portion is in a non-conductive form.

第三電路層,屬於一種VCC電源層。 The third circuit layer belongs to a VCC power supply layer.

第四電路層,係與各差分訊號對組資訊連結。 The fourth circuit layer is linked to the differential signal pair information.

藉此,當本發明欲進行電性導通運作時,其兩個為一對的差分訊號同軸線之線芯乃分別與差分訊號對組的第一訊號部及第二訊號部電性連結,而同軸線外層的編織網係共同與第一接地部及第二接地部電性連結,若有四對接地對組則表示有四對差分訊號同軸線,如此利用共接接地部及切割部的設計方式即可達到訊號彼此不相互干擾與抑制衰減之優勢,以及經由裸空部的設計,達到平衡阻抗之優勢。 Therefore, when the present invention is to be electrically conductive, the cores of the two differential signal coaxial lines are electrically connected to the first signal portion and the second signal portion of the differential signal pair, respectively. The woven mesh of the outer layer of the same axis is electrically connected to the first grounding portion and the second grounding portion. If there are four pairs of grounding pairs, four pairs of differential signal coaxial lines are indicated, so that the design of the common grounding portion and the cutting portion is utilized. The way to achieve the advantages of the signals do not interfere with each other and suppress the attenuation, and the design of the bare space to achieve the advantage of balanced impedance.

藉由上述技術,可針對習用連接器電路板所存在之訊號干擾問題嚴重的問題點加以突破,達到本發明如上述優點之實用進步性。 With the above technology, it is possible to break through the problem of serious signal interference problems existing in the conventional connector circuit board, and achieve the practical progress of the present invention as the above advantages.

1‧‧‧第一電路層 1‧‧‧First circuit layer

11‧‧‧接地對組 11‧‧‧ Grounding pair

111‧‧‧第一接地部 111‧‧‧First grounding

112‧‧‧第二接地部 112‧‧‧Second grounding

113‧‧‧接地基部對組 113‧‧‧ Grounding base pair

12‧‧‧差分訊號對組 12‧‧‧Differential signal pair group

121‧‧‧第一訊號部 121‧‧‧First Signal Department

122‧‧‧第二訊號部 122‧‧‧Second Signal Department

2‧‧‧第二電路層 2‧‧‧Second circuit layer

21‧‧‧切割部 21‧‧‧ Cutting Department

22‧‧‧裸空部 22‧‧‧ naked room

3‧‧‧第三電路層 3‧‧‧ third circuit layer

4‧‧‧第四電路層 4‧‧‧ fourth circuit layer

5‧‧‧同軸線 5‧‧‧ coaxial line

51‧‧‧第一同軸線 51‧‧‧First coaxial cable

511‧‧‧第一編織網 511‧‧‧First weaving net

512‧‧‧第一線芯 512‧‧‧First core

52‧‧‧第二同軸線 52‧‧‧Second coaxial cable

521‧‧‧第二編織網 521‧‧‧Second weaving net

522‧‧‧第二線芯 522‧‧‧second core

第一圖 係為本發明電路板結構之側視剖面圖。 The first figure is a side cross-sectional view of the circuit board structure of the present invention.

第二圖 係為本發明第一電路層之平面圖。 The second figure is a plan view of the first circuit layer of the present invention.

第三圖 係為本發明第二電路層之平面圖。 The third figure is a plan view of the second circuit layer of the present invention.

第四圖 係為本發明第三電路層之平面圖。 The fourth figure is a plan view of the third circuit layer of the present invention.

第五圖 係為本發明第四電路層之平面圖。 Figure 5 is a plan view of the fourth circuit layer of the present invention.

第六圖 係為本發明電路板結合同軸線之實施示意圖。 The sixth figure is a schematic diagram of the implementation of the circuit board combined with the coaxial line of the present invention.

為達成上述目的及功效,本發明所採用之技術手段及構造,茲繪圖就本發明較佳實施例詳加說明其特徵與功能如下,俾利完全了解。 In order to achieve the above objects and effects, the technical means and the structure of the present invention will be described in detail with reference to the preferred embodiments of the present invention.

請參閱第一圖至第五圖所示,係為本發明電路板結構之側視剖面圖、第一電路層之平面圖、第二電路層之平面圖、第三電路層之平面圖及第四電路層之平面圖,由圖中可清楚看出本發明係包括:一第一電路層1,第一電路層1包含數個並行排列設置之接地對組11、數個分別界定於各該接地對組11上之第一接地部111、以及數個分別界定於各該接地對組11上、且相鄰設置於該第一接地部111一側處之第二接地部112,其中第二接地部112乃與該第一接地部111電性連結,而各接地對組11乃各別獨立且不相連設置;數個並行排列設置之差分訊號對組12,各差分訊號對組12乃分別設於接地對組11一側處,且各差分訊號對組12分別包含一第一訊號部121及一相鄰設置於第一訊號部121一側之第二訊號部122,並第一訊號部121及第二訊號部122係分別獨立不相連;數個分別由接地對組11兩側延伸包圍差分訊號對組12、且相鄰設置之接地基部對組113,並各接地基部對組113乃各別獨立且不相連設置;一設於第一電路層1一面處之第二電路層2,第二電路層2上係包含有數個不導電形態之切割部21,且各切割部21之位置乃對應位於各接地基部對組113之間,並第二電路層2一側處乃與接地基部對組113一端處電性連結,又第二電路層2上具有數個分別對應各差分訊號對組12之位置處的裸空部22,且裸空部22為不導電形態;一設於第二電路層2背離該第一電路層1一面處之第三電路層3;及一設於第三電路層3背離該第二電路層2一面處之第四電路層4,第四電路層4係與各差分訊號對組12資訊連結。 Please refer to the first to fifth figures, which are side sectional views of the circuit board structure of the present invention, a plan view of the first circuit layer, a plan view of the second circuit layer, a plan view of the third circuit layer, and a fourth circuit layer. The plan view clearly shows that the present invention comprises: a first circuit layer 1, the first circuit layer 1 comprises a plurality of ground pair groups 11 arranged in parallel, and a plurality of the ground pair groups 11 are respectively defined. a first grounding portion 111, and a plurality of second grounding portions 112 respectively defined on each of the grounding pair groups 11 and disposed adjacent to the first grounding portion 111, wherein the second grounding portion 112 is The first grounding portion 111 is electrically connected to each other, and each of the grounding pair groups 11 are independently and non-connected; a plurality of differential signal pair groups 12 arranged in parallel are arranged, and each of the differential signal pair groups 12 is respectively disposed on the grounding pair. Each of the differential signal pair groups 12 includes a first signal portion 121 and a second signal portion 122 disposed adjacent to the first signal portion 121, and the first signal portion 121 and the second portion. The signal sections 122 are independently disconnected; the plurality of grounding pairs are respectively 11 The side extends to surround the differential signal pair group 12 and the adjacent grounding base pair pair 113, and each of the ground base pair groups 113 are independently and non-connected; a second circuit disposed at one side of the first circuit layer 1 The layer 2 and the second circuit layer 2 include a plurality of cutting portions 21 of non-conducting form, and the positions of the cutting portions 21 are correspondingly located between the pair of grounding base pairs 113, and the side of the second circuit layer 2 is The grounding base is electrically connected to one end of the group 113, and the second circuit layer 2 has a plurality of bare portions 22 respectively corresponding to the positions of the differential signal pairs 12, and the bare portion 22 is in a non-conducting form; a third circuit layer 3 disposed on a side of the second circuit layer 2 away from the first circuit layer 1; and a fourth circuit layer 4 disposed on a side of the third circuit layer 3 facing away from the second circuit layer 2, fourth The circuit layer 4 is linked to each of the differential signal pair groups 12.

請同時配合參閱第二圖、第三圖及第六圖所示,係為第一電路層之平面圖、第二電路層之平面圖及電路板結合同軸線之實施示意圖,由圖中可清楚看出,俾當實施本發明時,乃先將一對同軸線5(即表示有兩條同軸線)的其中一條線芯與第一訊號部121電性連結,另一條線芯則與第二訊號部122電性連結,因此,此二條線芯乃是分別獨立而不相連,然而,在連接線芯的同時, 將外層的編織網與接地對組電性連接。 Please also refer to the second, third and sixth figures, which are the plan view of the first circuit layer, the plan view of the second circuit layer and the implementation diagram of the circuit board combined with the coaxial line. It can be clearly seen from the figure. When implementing the present invention, one of the cores of a pair of coaxial wires 5 (that is, two coaxial wires) is first electrically connected to the first signal portion 121, and the other core is connected to the second signal portion. 122 electrical connection, therefore, the two cores are independent and not connected, however, while connecting the core, The outer woven mesh is electrically connected to the ground pair.

在此更進一步針對編織網連接方式詳細說明,其中,一對同軸線5包含第一同軸線51及第二同軸線52,第一同軸線51又包含有第一編織網511及第一線芯512,而第二同軸線52又包含有第二編織網521及第二線芯522,故,在接設電路板時,可將第一線芯512及第二線芯522分別與第一接地部111及第二接地部112電性連結,而第一編織網511與第二編織網521因屬於一種接地形態,因此第一編織網511及第二編織網521得以分別與第一接地部111及第二接地部112電性連接,更又因為第一接地部111及第二接地部112相連在一起,因此代表著第一同軸線51及第二同軸線52的接地是共接在一起,但訊號端是分開的。 Further, the woven mesh connection method is further described in detail, wherein the pair of coaxial wires 5 include a first coaxial wire 51 and a second coaxial wire 52, and the first coaxial wire 51 further includes a first woven mesh 511 and a first wire core. 512, the second coaxial wire 52 further includes a second woven mesh 521 and a second core 522. Therefore, when the circuit board is connected, the first core 512 and the second core 522 can be respectively connected to the first ground. The first woven mesh 511 and the second woven mesh 521 are electrically connected to each other, and the first woven mesh 511 and the second woven mesh 521 are respectively connected to the first grounding portion 111. The second grounding portion 112 is electrically connected, and the first grounding portion 111 and the second grounding portion 112 are connected together, so that the grounding of the first coaxial line 51 and the second coaxial line 52 are commonly connected together. But the signal ends are separate.

另一個重點,接地基部對組113乃將差分訊號對組12包圍夾設在中間。 Another important point is that the grounding base pair group 113 sandwiches the differential signal pair 12 in the middle.

當運作的同時,因第一接地部111及第二接地部112乃共接在一起,以及接地基部對組113乃將差分訊號對組12包圍夾設在中間,因此在電子特性上可以達到較佳的抑制衰減特性,同樣地,又因切割部21巧妙的設在各個接地對組11的中間處,有效將兩邊的訊號獨立隔離,使雜訊不會發生互相干擾的問題,而裸空部22也巧妙的設在差分訊號對組12正下方,亦也使有效隔離掉雜訊。 When the operation is performed, since the first grounding portion 111 and the second grounding portion 112 are connected together, and the grounding base pair group 113 is sandwiched between the differential signal pair group 12, the electronic characteristics can be achieved. The anti-attenuation characteristic is better. Similarly, since the cutting portion 21 is ingeniously disposed in the middle of each of the grounding pair groups 11, the signals on both sides are effectively isolated, so that the noise does not interfere with each other, and the bare space is left. 22 is also cleverly placed directly below the differential signal pair 12, which also effectively isolates the noise.

惟,以上所述僅為本發明之較佳實施例而已,非因此即侷限本發明之專利範圍,故舉凡運用本發明說明書及圖式內容所為之簡易修飾及等效結構變化,均應同理包含於本發明之專利範圍內,合予陳明。 However, the above description is only the preferred embodiment of the present invention, and thus it is not intended to limit the scope of the present invention. Therefore, the simple modification and equivalent structural changes of the present specification and the drawings should be treated similarly. It is included in the scope of the patent of the present invention and is combined with Chen Ming.

綜上所述,本發明之隔離訊號干擾之電路板結構於使用時,為確實能達到其功效及目的,故本發明誠為一實用性優異之發明,為符合發明專利之申請要件,爰依法提出申請,盼 審委早日賜准本發明,以保障發明人之辛苦發明,倘若 鈞局審委有任何稽疑,請不吝來函指示,發明人定當竭力配合,實感公便。 In summary, the circuit board structure of the isolated signal interference of the present invention can achieve its efficacy and purpose when used. Therefore, the present invention is an invention with excellent practicability, and is an application for conforming to the invention patent, To file an application, I hope that the review committee will grant the invention as soon as possible to protect the inventor's hard work. If there is any doubt in the audit committee, please do not hesitate to give instructions, the inventor will try his best to cooperate and feel polite.

1‧‧‧第一電路層 1‧‧‧First circuit layer

11‧‧‧接地對組 11‧‧‧ Grounding pair

111‧‧‧第一接地部 111‧‧‧First grounding

112‧‧‧第二接地部 112‧‧‧Second grounding

113‧‧‧接地基部對組 113‧‧‧ Grounding base pair

12‧‧‧差分訊號對組 12‧‧‧Differential signal pair group

121‧‧‧第一訊號部 121‧‧‧First Signal Department

122‧‧‧第二訊號部 122‧‧‧Second Signal Department

Claims (6)

一種隔離訊號干擾之電路板結構,主要包括:一第一電路層,該第一電路層包含:數個並行排列設置之接地對組,各該接地對組乃各別獨立且不相連設置;數個分別界定於各該接地對組上之第一接地部;及數個分別界定於各該接地對組上、且相鄰設置於該第一接地部一側處之第二接地部,該第二接地部乃與該第一接地部電性連結。 A circuit board structure for isolating signal interference, comprising: a first circuit layer, the first circuit layer comprising: a plurality of ground pair groups arranged in parallel, each of the ground pair groups being independently and not connected; a first grounding portion respectively defined on each of the pair of grounding pairs; and a plurality of second grounding portions respectively defined on each of the pair of grounding pairs and adjacently disposed at a side of the first grounding portion, the first The two grounding portions are electrically connected to the first grounding portion. 如請求項1所述之隔離訊號干擾之電路板結構,其中更包括:數個並行排列設置之差分訊號對組,各該差分訊號對組乃分別設於該接地對組一側處,且各該差分訊號對組分別包含一第一訊號部及一相鄰設置於該第一訊號部一側之第二訊號部,並該第一訊號部及該第二訊號部係分別獨立不相連;及數個分別由該接地對組兩側延伸包圍該差分訊號對組、且相鄰設置之接地基部對組,並各該接地基部對組乃各別獨立且不相連設置。 The circuit board structure of the isolated signal interference according to claim 1, further comprising: a plurality of differential signal pair groups arranged in parallel, each of the differential signal pair groups being respectively disposed at one side of the ground pair group, and each The first signal portion and the second signal portion adjacent to the first signal portion are respectively connected to each other, and the first signal portion and the second signal portion are independently disconnected; A plurality of grounding base pair groups respectively extending from the two sides of the pair of grounding pairs and adjacent to each other, and each of the grounding base pair groups are independently and non-connected. 如請求項2所述之隔離訊號干擾之電路板結構,其中該第一電路層一面處設有一第二電路層,該第二電路層上係包含有數個不導電形態之切割部,且各該切割部之位置乃對應位於各該接地基部對組之間,並該第二電路層一側處乃與該接地基部對組一端處電性連結。 The device of claim 2, wherein the first circuit layer is provided with a second circuit layer on one side, and the second circuit layer includes a plurality of non-conductive forms of the cutting portion, and each of the The position of the cutting portion is correspondingly located between the pair of grounding base pairs, and the side of the second circuit layer is electrically connected to one end of the pair of grounding bases. 如請求項3所述之隔離訊號干擾之電路板結構,其中該第二電路層背離該第一電路層一面處設有一第三電路層,該第三電路層為電源電路層。 The device of claim 3, wherein the second circuit layer is provided with a third circuit layer on a side of the first circuit layer, and the third circuit layer is a power circuit layer. 如請求項4所述之隔離訊號干擾之電路板結構,其中該第三電路層背離該第二電路層一面處設有一第四電路層,該第四電路層係與各該差分訊號對組資訊連結。 The device of claim 4, wherein the third circuit layer is disposed at a side of the second circuit layer opposite to the second circuit layer, and the fourth circuit layer is associated with each of the differential signal pairs. link. 如請求項3所述之隔離訊號干擾之電路板結構,其中該第二電路層上具有數個分別對應各該差分訊號對組之位置處的裸空部,且該裸空部為不導電形態。 The circuit board structure of the interference signal interference according to claim 3, wherein the second circuit layer has a plurality of bare spaces corresponding to the positions of the differential signal pairs, and the bare space is in a non-conducting form. .
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106572587A (en) * 2015-10-08 2017-04-19 富葵精密组件(深圳)有限公司 Flexible circuit board and manufacturing method thereof
CN109587930A (en) * 2018-11-28 2019-04-05 岱炜科技股份有限公司 USB C circuit board

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI764296B (en) * 2020-09-25 2022-05-11 財團法人工業技術研究院 Electronic device and method for signal interference compensation

Family Cites Families (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6178311B1 (en) * 1998-03-02 2001-01-23 Western Multiplex Corporation Method and apparatus for isolating high frequency signals in a printed circuit board
US20100065327A1 (en) * 2008-09-17 2010-03-18 Hon Hai Precision Ind. Co., Ltd. Cable assembly with molded grounding bar and method of making same
TWI449264B (en) * 2010-08-13 2014-08-11 Lite On Electronics Guangzhou A multi-loop antenna system and a electronic device having the multi-loop antenna system
CN102970814B (en) * 2011-08-31 2015-06-17 英业达股份有限公司 Printed circuit board
CN102892249B (en) * 2012-08-27 2016-04-20 广东欧珀移动通信有限公司 Pcb board single-point grounding processing method

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN106572587A (en) * 2015-10-08 2017-04-19 富葵精密组件(深圳)有限公司 Flexible circuit board and manufacturing method thereof
CN106572587B (en) * 2015-10-08 2019-02-19 庆鼎精密电子(淮安)有限公司 Flexible circuit board and preparation method thereof
CN109587930A (en) * 2018-11-28 2019-04-05 岱炜科技股份有限公司 USB C circuit board

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