TW201445865A - Direct Current to Direct Circuit Converter - Google Patents
Direct Current to Direct Circuit Converter Download PDFInfo
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- TW201445865A TW201445865A TW102117813A TW102117813A TW201445865A TW 201445865 A TW201445865 A TW 201445865A TW 102117813 A TW102117813 A TW 102117813A TW 102117813 A TW102117813 A TW 102117813A TW 201445865 A TW201445865 A TW 201445865A
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Abstract
Description
本發明係一種直流轉直流變換器，其包括：直流轉直流變換器積體電路(Direct Current to Direct Current Converter Integrated Circuits)及解碼計算器積體電路(Decode Counter Integrated Circuit)，為應用解碼計算器積體電路，例如CD4017、CD4022及其他解碼計算器積體電路之解碼進位輸出端，控制直流轉直流積體電路電壓輸出端的回授電路的電壓比較值、而達到控制直流轉直流積體電路輸出端輸出各種不同電壓值之目的。 The present invention is a DC-to-DC converter comprising: a DC to DC converter integrated circuit (Direct Current to Direct Current Converter Integrated Circuits) and a Decode Counter Integrated Circuit (Decode Counter Integrated Circuit), which is an application decoding calculator. Integral circuits, such as CD4017, CD4022 and other decoding calculator integrated circuit decoding carry output, control the voltage comparison value of the feedback circuit of the DC-DC integrated circuit voltage output terminal, and reach the control DC-DC integrated circuit output The terminal outputs various voltage values for the purpose.
如圖1所示，為習知直流轉直流變換器積體電路20、例如臺灣遠翔科技公司(Feeling Technology)340千赫、3安培、同步電壓降低調整器(340KHZ、Asynchronous、Step-Down Regulator)的直流轉直流變換器積體電路20、例如EP6116、其包括有：致能輸入端EN(Enable Input)、接地端GND(Ground)、過電流輸出設定開關OCSET、習知直流轉直流變換器積體電路20的正電端VCC為連接到電壓輸入端VIN端、P通道金屬氧化場效電晶體高電流輸出端LX及回授端FB所構成、電壓輸出值的控制為依第一回授電阻RFB1及第二回授電阻RFB2的比較值及規格常數值而定、並且設置有電壓輸入端VIN及電壓輸出端VOUT、其電壓輸入端VIN有電壓輸入時、其電壓輸出端VOUT的電壓值V0為：V0=(1+RFB1/RFB2) * VREF、式中VREF為習知直流轉直流變換器積體電路20內的精密電壓值為0.8伏特、自式中可 知、當第二回授電阻RFB2發生多種變化值時、在電壓輸出端VOUT可得各種不同的電壓；其有以下之缺點： As shown in FIG. 1 , it is a conventional DC-DC converter integrated circuit 20, such as Taiwan's Feixiang Technology (Feeling Technology) 340 kHz, 3 amp, synchronous voltage reduction regulator (340KHZ, Asynchronous, Step-Down Regulator) The DC-to-DC converter integrated circuit 20, such as EP6116, includes: an enable input EN (Enable Input), a ground GND (Ground), an overcurrent output setting switch OCSET, a conventional DC to DC converter The positive terminal VCC of the integrated circuit 20 is connected to the voltage input terminal VIN terminal, the P channel metal oxide field effect transistor high current output terminal LX and the feedback terminal FB, and the voltage output value is controlled according to the first feedback. The voltage value of the voltage output terminal VOUT when the voltage input terminal VIN and the voltage output terminal VOUT are provided and the voltage input terminal VIN has a voltage input depending on the comparison value of the resistor RFB1 and the second feedback resistor RFB2 and the specification constant value. V0 is: V0=(1+RFB1/RFB2) * VREF, where VREF is a precision voltage value of 0.8 volts in the conventional DC-DC converter integrated circuit 20, which can be It is known that when the second feedback resistor RFB2 has various changes, various voltages can be obtained at the voltage output terminal VOUT; it has the following disadvantages:
1.其第一回授電阻RFB1值及第二回授電阻RFB2值固定後、輸出電壓值為定值、若要變換輸出電壓值則需更換第一回授電阻RFB1值或第二回授電阻RFB2值、因而不適合於在一個電路中有各種不同輸出電壓值供應的需求。 1. After the first feedback resistor RFB1 value and the second feedback resistor RFB2 value are fixed, the output voltage value is a fixed value, and if the output voltage value is to be changed, the first feedback resistor RFB1 value or the second feedback resistor needs to be replaced. The RFB2 value is therefore not suitable for the need to have a variety of different output voltage value supplies in one circuit.
2.不適合於例如一般行動電源需要的5伏特、8.4伏特、12伏特、16伏特、20伏特等可選擇性的電壓值輸出需求。 2. Not suitable for, for example, 5 volts, 8.4 volts, 12 volts, 16 volts, 20 volts, etc., for selective voltage output requirements.
為了提供多種電壓值電源的需求：本發明的第一目的為應用解碼計算器積體電路、控制直流轉直流變換器積體電路的第二回授電阻值，以得多種電壓值電源。 In order to provide a plurality of voltage value power supplies, the first object of the present invention is to apply a decoding calculator integrated circuit and control a second feedback resistance value of the DC to DC converter integrated circuit to obtain a plurality of voltage value power supplies.
本發明的第二目的為應用解碼計算器積體電路的解碼十進位輸出端(Decode Decimal Output)、作為控制電晶體的導通(On)或開路(Off)的動作、達到控制直流轉直流變換器積體電路的第二回授電阻值的功能。 A second object of the present invention is to apply a decoding demodulation output (Decode Decimal Output) of a decoding calculator integrated circuit, as an operation of controlling a transistor to conduct (On) or open (Off), to achieve control of a DC-DC converter. The function of the second feedback resistor value of the integrated circuit.
本發明的第三目的為將直流轉直流變換器積體電路的第二回授電阻的一端與電晶體的集極(Collector)連接達到直接耦合的效果。 A third object of the present invention is to directly couple one end of a second feedback resistor of a DC-to-DC converter integrated circuit to a collector of a transistor to achieve direct coupling.
本發明的第四目的為設置有限流電阻與發光二極體、連接於解碼計算器積體電路的解碼十進位輸出端、以指示直流轉直流變換器積體電路的電壓輸出值。 A fourth object of the present invention is to provide a finite current resistor and a light emitting diode, and a decoded decimal output connected to the decoding calculator integrated circuit to indicate a voltage output value of the DC to DC converter integrated circuit.
本發明的第五目的設置有時鐘(Clock)脈波產生電路，以提供解碼計算器積體電路的時鐘端所需的脈波信號、做為解碼十進位輸出端的信號、而選擇直流轉直流變換器積體電路的電壓輸出、以提供需求者所需之電壓值。 A fifth object of the present invention is to provide a clock pulse wave generating circuit for providing a pulse wave signal required for decoding a clock terminal of a calculator integrated circuit, as a signal for decoding a decimal output terminal, and selecting a DC to DC conversion. The voltage output of the integrated circuit to provide the voltage value required by the consumer.
本發明有下列的特徵： The invention has the following features:
1.首創以直流轉直流變換器積體電路及解碼計算器積體電路、做為可輸出多種電壓值的直流轉直流變換器。 1. The first DC-to-DC converter integrated circuit and decoding calculator integrated circuit is used as a DC-to-DC converter that can output various voltage values.
2.首創應用解碼計算器積體電路的解碼十進位輸出端、作為控制電晶體的導通或開路的動作、達到控制直流轉直流變換器積體電路的第二回授電阻值的功能。 2. The function of decoding the decimal output of the integrated circuit of the application decoding calculator, as the operation of controlling the conduction or opening of the transistor, and the function of controlling the second feedback resistance of the integrated circuit of the DC-DC converter.
3.本發明直流轉直流變換器積體電路的第二回授電阻與解碼計算器積體電路的解碼十進位輸出端的連接電路採用直接耦合方式。 3. The second feedback resistor of the integrated circuit of the DC-to-DC converter of the present invention and the decoding circuit of the decoded decimal output terminal of the decoding calculator integrated circuit adopt a direct coupling manner.
4.本發明在解碼計算器積體電路的解碼十進位輸出端連接有限流電阻與發光二極體、以指示直流轉直流變換器積體電路的電壓輸出值。 4. The present invention connects the finite current resistor and the light emitting diode to the decoded decimal output terminal of the decoding calculator integrated circuit to indicate the voltage output value of the DC to DC converter integrated circuit.
5.本發明以手控產生時鐘脈波的方式代替時鐘產生器(Clock Generator)、輸入於解碼計算器積體電路的時鐘端。 5. The present invention replaces a clock generator with a clock pulse generated by a hand control, and is input to a clock terminal of a decoding calculator integrated circuit.
20‧‧‧習知直流轉直流變換器積體電路 20‧‧‧Knowledge DC-DC converter integrated circuit
EN‧‧‧致能輸入端 EN‧‧‧Enable input
FB‧‧‧回授端 FB‧‧‧reporting end
GND‧‧‧接地端 GND‧‧‧ ground terminal
VCC‧‧‧習知直流轉直流變換器積體電路的正電端 VCC‧‧‧ The positive side of the integrated circuit of DC-DC converter
OCSET‧‧‧過電流輸出設定開關 OCSET‧‧‧Overcurrent output setting switch
LX‧‧‧P通道金屬氧化場效電晶體高電流輸出端 LX‧‧‧P channel metal oxide field effect transistor high current output
VIN‧‧‧電壓輸入端 VIN‧‧‧ voltage input
VOUT‧‧‧電壓輸出端 VOUT‧‧‧ voltage output
V0‧‧‧電壓輸出端的電壓值 Voltage value of V0‧‧‧ voltage output
VL‧‧‧電晶體的集射極導通時的輸出電壓端電壓值 Output voltage terminal voltage value when the collector of the VL‧‧‧ transistor is turned on
RFB1‧‧‧第一回授電阻 RFB1‧‧‧ first feedback resistor
RFB2‧‧‧第二回授電阻 RFB2‧‧‧ second feedback resistor
VREF‧‧‧習知直流轉直流變換器積體電路內的精密電壓值 VREF‧‧‧Precision voltage value in the integrated circuit of DC to DC converter
IFB‧‧‧回授電流值 IFB‧‧‧ feedback current value
10‧‧‧解碼計算器積體電路 10‧‧‧Decoding calculator integrated circuit
VDD‧‧‧解碼計算器積體電路的正電端 The positive side of the VDD‧‧‧ decoding calculator integrated circuit
VSS‧‧‧解碼計算器積體電路的負電端 The negative side of the VSS‧‧‧ decoding calculator integrated circuit
A0‧‧‧解碼計算器積體電路的十進位輸出0端 A0‧‧‧Decoder calculator integrated circuit zero-bit output 0 end
A1‧‧‧解碼計算器積體電路的十進位輸出1端 A1‧‧‧Decoding calculator, the decimal output of the integrated circuit
A2‧‧‧解碼計算器積體電路的十進位輸出2端 A2‧‧‧Decoding calculator, the decimal output of the integrated circuit
A3‧‧‧解碼計算器積體電路的十進位輸出3端 A3‧‧‧Decoding calculator, the decimal output of the integrated circuit
CK‧‧‧時鐘端 CK‧‧‧clock end
RT‧‧‧重置端 RT‧‧‧Reset
Rb1、Rb2、Rb3‧‧‧第一、第二、第三電阻 Rb1, Rb2, Rb3‧‧‧ first, second and third resistors
R1、R2、R3‧‧‧第一、第二、第三限流電阻 R1, R2, R3‧‧‧ first, second, and third current limiting resistors
R4、R5、R6‧‧‧第四、第五、第六限流電阻 R4, R5, R6‧‧‧ fourth, fifth, and sixth current limiting resistors
R7‧‧‧充電電阻 R7‧‧‧Charging resistor
R8‧‧‧放電電阻 R8‧‧‧discharge resistor
C1‧‧‧第一電容器 C1‧‧‧First Capacitor
PB‧‧‧按鈕開關 PB‧‧‧ button switch
T1、T2、T3‧‧‧第一、第二、第三電晶體 T1, T2, T3‧‧‧ first, second and third transistors
VCE1‧‧‧第一電晶體導通時的集射極電壓值 VCE1‧‧‧The collector voltage value when the first transistor is turned on
VCE2‧‧‧第二電晶體導通時的集射極電壓值 VCE2‧‧‧ collector voltage value when the second transistor is turned on
VCE3‧‧‧第三電晶體導通時的集射極電壓值 VCE3‧‧‧The collector voltage value when the third transistor is turned on
LD1、LD2、LD3‧‧‧第一、第二、第三光電二極體 LD1, LD2, LD3‧‧‧ first, second and third photodiodes
圖1為習知直流轉直流變換器積體電路。 1 is a conventional DC to DC converter integrated circuit.
圖2本發明直流轉直流變換器實施例。 2 is an embodiment of a DC to DC converter of the present invention.
如圖2所示，為本發明直流轉直流變換器實施例，自圖中可知，習知直流轉直流變換器積體電路20設置有電壓輸入端VIN與接地端GND、以直接耦合方式連接到直流電源的正電端與接地端GND或直流連接座的正電端與接地端GND或通用序列匯流排座(USB Socket)的正電端與接地端GND；並且設置有電壓輸出端VOUT與接地端GND、可以連接到負載、其負載包括有：被充電的直流電源負載、照明負載、指示負載、電動馬達負載及電熱負載；其第一回授電阻RFB1與第二回授電阻RFB2的中間連接點連接到回授端FB、第二回授電阻RFB2為由各自獨立裝置的三個電阻與三個電晶體所構成、其三個電阻分別為第一電阻Rb1、第二電阻Rb2及第三電阻Rb3所構成、其三個電阻的第一端皆連接到回授端FB、三個電阻的設定是為實施例的說明、而不是自限為只有三個電阻、其電阻數的設定為 依所需求的電壓值多少而定、而不予自限、而三個電晶體分別為第一電晶體T1、第二電晶體T2與第三電晶體T3、其第一電阻Rb1與第一電晶體T1配合為一組、第二電阻Rb2與第二電晶體T2配合為一組、第三電阻Rb3與第三電晶體T3配合為一組；第一電阻Rb1的第二端連接第一電晶體T1的集極(Collector)、第二電阻Rb2的第二端連接第二電晶體T2的集極、第三電阻Rb3的第二端連接第三電晶體T3的集極；第一電晶體T1的基極(Base)連接第四限流電阻R4的第二端、第二電晶體T2的基極連接第五限流電阻R5的第二端、第三電晶體T3的基極連接第六限流電阻R6的第二端；第一電晶體T1、第二電晶體T2及第三電晶體T3的射極(Emitter)皆連接到接地端GND；第四限流電阻R4的第一端與第一限流電阻R1的第一端連接到解碼計算器積體電路10的十進位輸出0端、亦是解碼計算器積體電路10的十進位輸出端A0端；第五限流電阻R5的第一端與第二限流電阻R2的第一端連接到解碼計算器積體電路10的十進位輸出1端、亦是解碼計算器積體電路10的十進位輸出端A1端；第六限流電阻R6的第一端與第三限流電阻R3的第一端連接到解碼計算器積體電路10的十進位輸出2端、亦是解碼計算器積體電路10的十進位輸出端A2端；第一限流電阻R1的第二端連接第一發光二極體LD1陽極端、第一發光二極體LD1的陰極端連接接地端GND、第二限流電阻R2的第二端連接第二發光二極體LD2陽極端、第二發光二極體LD2的陰極端連接接地端GND、第三限流電阻R3的第二端連接第三發光二極體LD3陽極端、第三發光二極體LD3的陰極端連接接地端GND；解碼計算器積體電路10的十進位輸出端A3端連接到重置端RT(Reset)；解碼計算器積體電路10的時鐘端CK(Clock)連接到放電電阻R8的第一端與第一電容器C1的正電端及按鈕開關PB(Push Bottom Switch)的第二端、放電電阻R8的第二端與第一電容器的負電端連接到接地端GND、按鈕開關PB的第一端連接充電電阻R7的第二端、充電電阻R7的第一端連接到電壓輸入端VIN；解碼計算器 積體電路10設置有解碼計算器積體電路10的正電端VDD連接到電壓輸入端VIN、解碼計算器積體電路10的負電端VSS連接到接地端GND、以供給解碼計算器積體電路10的功能需求。 As shown in FIG. 2, which is an embodiment of the DC-to-DC converter of the present invention, it can be seen from the figure that the conventional DC-DC converter integrated circuit 20 is provided with a voltage input terminal VIN and a ground terminal GND, and is directly coupled to the ground. The positive terminal of the DC power supply and the grounding terminal GND or the positive terminal of the DC link and the ground GND or the positive terminal of the universal serial busbar (USB Socket) and the ground GND; and the voltage output terminal VOUT and ground are provided. The terminal GND can be connected to the load, and the load includes: a charged DC power load, a lighting load, an indicating load, an electric motor load, and an electric heating load; and an intermediate connection between the first feedback resistor RFB1 and the second feedback resistor RFB2 The point is connected to the feedback terminal FB, and the second feedback resistor RFB2 is composed of three resistors and three transistors of the respective independent devices, and the three resistors are the first resistor Rb1, the second resistor Rb2 and the third resistor, respectively. The first end of the three resistors is connected to the feedback terminal FB, and the three resistors are set for the description of the embodiment, instead of being self-limited to only three resistors, and the number of resistors is set to Depending on the required voltage value, it is not self-limiting, and the three transistors are the first transistor T1, the second transistor T2 and the third transistor T3, and the first resistor Rb1 and the first The crystal T1 is matched into a group, the second resistor Rb2 and the second transistor T2 are combined into one group, and the third resistor Rb3 and the third transistor T3 are combined into one group; the second end of the first resistor Rb1 is connected to the first transistor. The collector of T1, the second end of the second resistor Rb2 is connected to the collector of the second transistor T2, and the second end of the third resistor Rb3 is connected to the collector of the third transistor T3; the first transistor T1 The base is connected to the second end of the fourth current limiting resistor R4, the base of the second transistor T2 is connected to the second end of the fifth current limiting resistor R5, and the base of the third transistor T3 is connected to the sixth current limiting The second end of the resistor R6; the first transistor T1, the second transistor T2, and the emitter of the third transistor T3 are connected to the ground GND; the first end of the fourth current limiting resistor R4 is first The first end of the current limiting resistor R1 is connected to the decimal output 0 terminal of the decoding calculator integrated circuit 10, and is also the decimal output terminal A0 of the decoding calculator integrated circuit 10. The first end of the fifth current limiting resistor R5 and the first end of the second current limiting resistor R2 are connected to the decimal output 1 end of the decoding calculator integrated circuit 10, which is also the decoding calculator integrated circuit 10 The first end of the sixth current limiting resistor R6 and the first end of the third current limiting resistor R3 are connected to the decimal output 2 end of the decoding calculator integrated circuit 10, which is also a decoding calculator integrated body. The third terminal of the first current limiting resistor R1 is connected to the anode end of the first light emitting diode LD1, the cathode end of the first light emitting diode LD1 is connected to the grounding end GND, and the second current limiting The second end of the resistor R2 is connected to the anode end of the second LED LD2, the cathode end of the second LED LD2 is connected to the ground GND, and the second end of the third current limiting resistor R3 is connected to the third LED LD3. The anode end, the cathode end of the third LED LD3 is connected to the ground GND; the Decimal output terminal A3 of the decoding calculator integrated circuit 10 is connected to the reset terminal RT (Reset); the decoding calculator integrated circuit 10 The clock terminal CK (Clock) is connected to the first end of the discharge resistor R8 and the positive terminal of the first capacitor C1 and the button The second end of the PB (Push Bottom Switch), the second end of the discharge resistor R8 and the negative terminal of the first capacitor are connected to the ground GND, the first end of the push button switch PB is connected to the second end of the charging resistor R7, and the charging resistor The first end of R7 is connected to the voltage input terminal VIN; the decoding calculator The integrated circuit 10 is provided with a positive terminal VDD of the decoding calculator integrated circuit 10 connected to the voltage input terminal VIN, and a negative terminal VSS of the decoding calculator integrated circuit 10 is connected to the ground terminal GND for supply to the decoding calculator integrated circuit 10 functional requirements.
本發明圖2的動作原理為：當習知直流轉直流變換器積體電路20的電壓輸入端VIN有電壓供電時、按鈕開關PB為開路(Off)狀態、此時解碼計算器積體電路10的A0端輸出一正電壓供電於第一限流電阻R1與第四限流電阻R4的第一端、此時第一光電二極體LD1發亮、第一電晶體T1的集射極導通、其輸出電壓端VOUT的輸出電壓值VL為：VL={1+IFB * RFB1/(IFB * Rb1+VCE1)}* VREF、式中IFB為回授電流值、其值為IFB=VL-VCE1/(RFB1+Rb1)、式中VCE1為第一電晶體T1導通時的集射極電壓值；第一次當按鈕開關PB導通(On)時、電壓輸入端VIN的直流電流經過充電電阻R7向第一電容器C1的正電端充電、當按鈕開關PB開路(Off)時、第一電容器C1的正電端電荷向放電電阻R8放電、此按鈕開關PB執行一次導通與開路、在時鐘端CK產生一個脈波、此時解碼計算器積體電路10的A0端由正電壓轉為無電壓輸出、而A1端輸出一正電壓供電於第二限流電阻R2與第五限流電阻R5的第一端、此時第二光電二極體LD2發亮、第二電晶體T2的集射極導通、其輸出電壓端VOUT的輸出電壓值VL為：VL={1+IFB * RFB1/(IFB * Rb2+VCE2)}* VREF、式中IFB為回授電流值、其值為IFB=VL-VCE2/(RFB1+Rb2)、式中VCE2為第二電晶體T2導通時的集射極電壓值；第二次當按鈕開關PB導通(On)時、電壓輸入端VIN的直流電流經過充電電阻R7向第一電容器C1的正電端充電、當按鈕開關PB開路(Off)時、第一電容器C1的正電端電荷向放電電阻R8放電、此按鈕開關PB執行一次導通與開路、在時鐘端CK產生一個脈波、此時解碼計算器積體電路10的A0端與A1端無輸出電壓、在A2端輸出一正電壓供電於第三限流電阻R3與第六限流電阻R6的第一端、此時第三光電二極體LD3發亮、第三電晶體T3的集射極導通、其輸出電壓端VOUT的輸出 電壓值VL為：VL={1+IFB * RFB1/(IFB * Rb3+VCE3)}* VREF、式中IFB為回授電流值、其值為IFB=VL-VCE3/(RFB1+Rb3)、式中VCE3為第三電晶體T3導通時的集射極電壓值；第三次當按鈕開關PB導通(On)時、電壓輸入端VIN的直流電流經過充電電阻R7向第一電容器C1的正電端充電、當按鈕開關PB開路(Off)時、第一電容器C1的正電端電荷向放電電阻R8放電、此按鈕開關PB執行一次導通與開路、在時鐘端CK產生一個脈波、此時解碼計算器積體電路10的A1端與A2端無正電壓輸出、在A3端輸出一正電壓供電於重置端RT、此時A0端輸出一正電壓供電於第一限流電阻R1與第四限流電阻R4的第一端、同時第一光電二極體LD1發亮、第一電晶體T1的集射極導通、其輸出電壓端VOUT的輸出電壓值VL為：VL={1+IFB * RFB1/(IFB * Rb1+VCE1)}* VREF、而重覆前所述A0為正電壓輸出時的動作、而不贅述；在習知直流轉直流變換器積體電路20以FP6116為例、但是在實際應用時亦可採用其他公司產品例如：AX3023、AX5510、APE1920、EML3418等而不予自限、同理解碼計算器積體電路10亦可採用等功能特性的其他廠牌積體電路、而不予自限。 The operation principle of the present invention is as follows: when the voltage input terminal VIN of the conventional DC-DC converter integrated circuit 20 has a voltage supply, the push button switch PB is in an open state, and the decoder integrated circuit 10 is decoded at this time. The A0 terminal outputs a positive voltage to the first current limiting resistor R1 and the first terminal of the fourth current limiting resistor R4. At this time, the first photodiode LD1 is illuminated, and the collector of the first transistor T1 is turned on. The output voltage value VL of the output voltage terminal VOUT is: VL={1+IFB*RFB1/(IFB*Rb1+VCE1)}* VREF, where IFB is the feedback current value, and its value is IFB=VL-VCE1/ (RFB1+Rb1), where VCE1 is the collector voltage value when the first transistor T1 is turned on; the first time when the push button switch PB is turned on (On), the DC current of the voltage input terminal VIN passes through the charging resistor R7 to the first The positive terminal of a capacitor C1 is charged, when the push button switch PB is open (Off), the positive terminal charge of the first capacitor C1 is discharged to the discharge resistor R8, the push switch PB performs one conduction and open circuit, and the clock terminal CK generates a Pulse wave, at this time, the A0 terminal of the decoding calculator integrated circuit 10 is converted from a positive voltage to a no-voltage output, and the A1 terminal outputs a positive power. The first terminal of the second current limiting resistor R2 and the fifth current limiting resistor R5 is supplied, the second photodiode LD2 is illuminated, the collector of the second transistor T2 is turned on, and the output of the output voltage terminal VOUT is output. The voltage value VL is: VL={1+IFB*RFB1/(IFB*Rb2+VCE2)}* VREF, where IFB is the feedback current value, and its value is IFB=VL-VCE2/(RFB1+Rb2), The middle VCE2 is the collector voltage value when the second transistor T2 is turned on; the second time when the button switch PB is turned on (On), the direct current of the voltage input terminal VIN passes through the charging resistor R7 to the positive terminal of the first capacitor C1. Charging, when the push button switch PB is open (Off), the positive terminal charge of the first capacitor C1 is discharged to the discharge resistor R8, the push switch PB performs one conduction and open circuit, and a pulse wave is generated at the clock terminal CK, and the decoding calculation is performed at this time. The A0 terminal and the A1 terminal of the integrated circuit 10 have no output voltage, and a positive voltage is output at the A2 terminal to supply the first terminal of the third current limiting resistor R3 and the sixth current limiting resistor R6, and the third photodiode at this time. LD3 is lit, the collector of the third transistor T3 is turned on, and the output of the output voltage terminal VOUT The voltage value VL is: VL={1+IFB*RFB1/(IFB*Rb3+VCE3)}* VREF, where IFB is the feedback current value, and its value is IFB=VL-VCE3/(RFB1+Rb3), The middle VCE3 is the collector voltage value when the third transistor T3 is turned on; the third time when the push button switch PB is turned on (On), the direct current of the voltage input terminal VIN passes through the charging resistor R7 to the positive terminal of the first capacitor C1. Charging, when the push button switch PB is open (Off), the positive terminal charge of the first capacitor C1 is discharged to the discharge resistor R8, the push switch PB performs one conduction and open circuit, and a pulse wave is generated at the clock terminal CK, and the decoding calculation is performed at this time. The A1 terminal and the A2 terminal of the integrated circuit 10 have no positive voltage output, and a positive voltage is outputted to the reset terminal RT at the A3 terminal. At this time, the A0 terminal outputs a positive voltage to the first current limiting resistor R1 and the fourth limit. The first end of the current resistor R4, the first photodiode LD1 is lit, the collector of the first transistor T1 is turned on, and the output voltage value VL of the output voltage terminal VOUT is: VL={1+IFB*RFB1 /(IFB * Rb1+VCE1)}* VREF, and the above-mentioned operation when A0 is a positive voltage output, and is not described again; in the conventional DC-DC converter integrated circuit 20 Take FP6116 as an example, but in actual applications, other company products such as AX3023, AX5510, APE1920, EML3418, etc. can be used without self-limiting, and the same understanding function of the code calculator integrated circuit 10 can also adopt other functional characteristics. Card integrated circuits, without self-limiting.
本發明經實際實驗其結果為成功、可證明本發明可據於實施、而為一富有新穎性、進步性及可供產業利用性，應符合專利申請要件無疑，爰依法提出發明專利申請，懇請 貴審查委員早日賜於本發明專利，實感德便。 The result of the actual experiment of the present invention is successful, and the invention can be proved that it can be implemented according to the invention, and is novel, progressive and available for industrial use, and should conform to the patent application requirements, and the invention patent application is filed according to law. Your reviewer will give the invention patent as soon as possible.
20‧‧‧習知直流轉直流變換器積體電路 20‧‧‧Knowledge DC-DC converter integrated circuit
EN‧‧‧致能輸入端 EN‧‧‧Enable input
FB‧‧‧回授端 FB‧‧‧reporting end
GND‧‧‧接地端 GND‧‧‧ ground terminal
VCC‧‧‧習知直流轉直流變換器積體電路的正電端 VCC‧‧‧ The positive side of the integrated circuit of DC-DC converter
OCSET‧‧‧過電流輸出設定開關 OCSET‧‧‧Overcurrent output setting switch
LX‧‧‧P通道金屬氧化場效電晶體高電流輸出端 LX‧‧‧P channel metal oxide field effect transistor high current output
VIN‧‧‧電壓輸入端 VIN‧‧‧ voltage input
VOUT‧‧‧電壓輸出端 VOUT‧‧‧ voltage output
RFB1‧‧‧第一回授電阻 RFB1‧‧‧ first feedback resistor
10‧‧‧解碼計算器積體電路 10‧‧‧Decoding calculator integrated circuit
VDD‧‧‧解碼計算器積體電路的正電端 The positive side of the VDD‧‧‧ decoding calculator integrated circuit
VSS‧‧‧解碼計算器積體電路的負電端 The negative side of the VSS‧‧‧ decoding calculator integrated circuit
A0‧‧‧解碼計算器積體電路的十進位輸出0端 A0‧‧‧Decoder calculator integrated circuit zero-bit output 0 end
A1‧‧‧解碼計算器積體電路的十進位輸出1端 A1‧‧‧Decoding calculator, the decimal output of the integrated circuit
A2‧‧‧解碼計算器積體電路的十進位輸出2端 A2‧‧‧Decoding calculator, the decimal output of the integrated circuit
A3‧‧‧解碼計算器積體電路的十進位輸出3端 A3‧‧‧Decoding calculator, the decimal output of the integrated circuit
CK‧‧‧時鐘端 CK‧‧‧clock end
RT‧‧‧重置端 RT‧‧‧Reset
Rb1、Rb2、Rb3‧‧‧第一、第二、第三電阻 Rb1, Rb2, Rb3‧‧‧ first, second and third resistors
R1、R2、R3‧‧‧第一、第二、第三限流電阻 R1, R2, R3‧‧‧ first, second, and third current limiting resistors
R4、R5、R6‧‧‧第四、第五、第六限流電阻 R4, R5, R6‧‧‧ fourth, fifth, and sixth current limiting resistors
R7‧‧‧充電電阻 R7‧‧‧Charging resistor
R8‧‧‧放電電阻 R8‧‧‧discharge resistor
C1‧‧‧第一電容器 C1‧‧‧First Capacitor
PB‧‧‧按鈕開關 PB‧‧‧ button switch
T1、T2、T3‧‧‧第一、第二、第三電晶體 T1, T2, T3‧‧‧ first, second and third transistors
LD1、LD2、LD3‧‧‧第一、第二、第三光電二極體 LD1, LD2, LD3‧‧‧ first, second and third photodiodes
Claims (10)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| TW102117813A TW201445865A (en) | 2013-05-21 | 2013-05-21 | Direct Current to Direct Circuit Converter |
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| Application Number | Priority Date | Filing Date | Title |
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| TW102117813A TW201445865A (en) | 2013-05-21 | 2013-05-21 | Direct Current to Direct Circuit Converter |
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| TW201445865A true TW201445865A (en) | 2014-12-01 |
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| TW102117813A TW201445865A (en) | 2013-05-21 | 2013-05-21 | Direct Current to Direct Circuit Converter |
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Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112116898A (en) * | 2019-06-21 | 2020-12-22 | 厦门雅迅网络股份有限公司 | Power supply circuit of backlight driving module |
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- 2013-05-21 TW TW102117813A patent/TW201445865A/en unknown
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| CN112116898A (en) * | 2019-06-21 | 2020-12-22 | 厦门雅迅网络股份有限公司 | Power supply circuit of backlight driving module |
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