TW201343035A - Manufacturing method of circuit board structure - Google Patents

Manufacturing method of circuit board structure Download PDF

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TW201343035A
TW201343035A TW101112262A TW101112262A TW201343035A TW 201343035 A TW201343035 A TW 201343035A TW 101112262 A TW101112262 A TW 101112262A TW 101112262 A TW101112262 A TW 101112262A TW 201343035 A TW201343035 A TW 201343035A
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layer
copper foil
circuit board
board structure
substrate
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TW101112262A
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TWI446849B (en
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Doau-Tzu Wang
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Unimicron Technology Corp
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  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

A manufacturing method of a circuit board structure is provided. A first substrate and a second substrate are provided. An adhesive layer is formed between the first substrate and the second substrate. An encapsulation layer is formed to encapsulate the edges of the first substrate, the second substrate and the adhesive layer. A conductive material layer is formed on the encapsulation layer, the first substrate and the second substrate. A first patterned circuit layer is formed on the first substrate, and a second patterned circuit layer is formed on the second substrate. A first insulating layer and a fifth copper layer located on the first insulating layer are laminated on the first patterned circuit layer. A second insulating layer and a sixth copper layer located on the second insulating layer are laminated on the second patterned circuit layer. The encapsulation layer and the adhesive layer are removed so as to form a first circuit board structure and a second circuit board structure.

Description

線路板結構的製作方法Circuit board structure manufacturing method

本發明是有關於一種線路板結構的製作方法,且特別是有關於一種具有較佳製程良率的線路板結構的製作方法。The present invention relates to a method of fabricating a circuit board structure, and more particularly to a method of fabricating a circuit board structure having a better process yield.

習知之線路板結構的製作是先提供兩個銅箔基板(Copper Clad Laminate,CCL),其中銅箔基板是由介電核心層以及分別配置於介電核心層相對二面的二層銅箔層所組成。接著,於其中一個銅箔基板上透過網版印刷的方式印刷油墨,以使另一銅箔基板可結合於此銅箔基板上。之後,再透過後續壓合絕緣層及導電層或進行雷射鑽孔、電鍍導電層、電鍍填孔、微影及蝕刻製程等來形成多層線路結構或高密度內線路(Hight Density Interconnection,HDI)結構。最後,再進行解板而形成習知線路板結構的製作。然而,在印刷油墨的過程中,由於易產生滴墨的現象,因此易對銅箔基板無需印刷的表面造成污染,進而造成線路的短路現象而影響良率。此外,於後續進行微影及蝕刻製程時,蝕刻液會侵蝕兩銅箔基板的側緣,且易從兩銅箔基板的結合處(即油墨所在處)侵蝕相結合的兩銅箔層,進而降低線路板結構的可靠度。The conventional circuit board structure is first provided with two copper foil substrates (Copper Clad Laminate, CCL), wherein the copper foil substrate is composed of a dielectric core layer and two layers of copper foil respectively disposed on opposite sides of the dielectric core layer. Composed of. Next, the ink is printed by screen printing on one of the copper foil substrates so that another copper foil substrate can be bonded to the copper foil substrate. Then, through the subsequent pressing of the insulating layer and the conductive layer or performing laser drilling, plating conductive layer, plating filling, lithography and etching process to form a multilayer wiring structure or high-density internal wiring (HDI) structure. Finally, the board is unwrapped to form a conventional circuit board structure. However, in the process of printing ink, since the phenomenon of dripping is easily generated, it is easy to cause contamination on the surface of the copper foil substrate that does not need to be printed, thereby causing a short circuit of the line and affecting the yield. In addition, during subsequent lithography and etching processes, the etching solution erodes the side edges of the two copper foil substrates, and easily erodes the combined copper foil layers from the junction of the two copper foil substrates (ie, where the ink is located). Reduce the reliability of the board structure.

本發明提供一種線路板結構的製作方法,可提高製程良率、降低成產成本且適於量產。The invention provides a method for manufacturing a circuit board structure, which can improve the process yield, reduce the production cost and is suitable for mass production.

本發明提出一種線路板結構的製作方法,其包括以下步驟。提供一第一基板與一第二基板。第一基板具有一第一核心層以及位於第一核心層之一第一表面與一第二表面的一第一銅箔層與一第二銅箔層。第二基板具有一第二核心層以及位於第二核心層之一第三表面與一第四表面的一第三銅箔層與一第四銅箔層。形成一黏著層於第一基板與第二基板之間,其中第三銅箔層藉由黏著層局部結合於第二銅箔層上。形成一包覆層以包覆第一基板的側緣、第二基板的側緣以及黏著層的側緣,且延伸至部分第一銅箔層與部分第四銅箔層上。包覆層具有抗酸鹼的特性。進行一電鍍步驟,以形成一導電材料層於包覆層、第一銅箔層與第四銅箔層上。對導電材料層及其下方之第一銅箔層與第四銅箔層進行一微影及蝕刻步驟,以於第一核心層的第一表面形成一第一圖案化線路層,而於第二核心層的第四表面形成一第二圖案化線路層。壓合一第一絕緣層以及位於第一絕緣層上之一第五銅箔層於第一圖案化線路層上,以及壓合一第二絕緣層以及位於第二絕緣層上之一第六銅箔層於第二圖案化線路層上。移除包覆層與黏著層,而形成一第一線路板結構與一第二線路板結構。第一線路板結構至少是由第一核心層、第二銅箔層、第一圖案化線路層、第一絕緣層與第五銅箔層所構成。第二線路板結構至少是由第二核心層、第三銅箔層、第二圖案化線路層、第二絕緣層與第六銅箔層所構成。The invention provides a method for fabricating a circuit board structure, which comprises the following steps. A first substrate and a second substrate are provided. The first substrate has a first core layer and a first copper foil layer and a second copper foil layer on the first surface and a second surface of the first core layer. The second substrate has a second core layer and a third copper foil layer and a fourth copper foil layer on the third surface and a fourth surface of the second core layer. An adhesive layer is formed between the first substrate and the second substrate, wherein the third copper foil layer is partially bonded to the second copper foil layer by the adhesive layer. A cladding layer is formed to cover the side edges of the first substrate, the side edges of the second substrate, and the side edges of the adhesive layer, and extends to a portion of the first copper foil layer and a portion of the fourth copper foil layer. The coating layer has the property of being acid and alkali resistant. A plating step is performed to form a conductive material layer on the cladding layer, the first copper foil layer and the fourth copper foil layer. Performing a lithography and etching step on the conductive material layer and the first copper foil layer and the fourth copper foil layer below to form a first patterned circuit layer on the first surface of the first core layer, and second The fourth surface of the core layer forms a second patterned circuit layer. Pressing a first insulating layer and a fifth copper foil layer on the first insulating layer on the first patterned circuit layer, and pressing a second insulating layer and a sixth copper layer on the second insulating layer The foil layer is on the second patterned wiring layer. The cladding layer and the adhesive layer are removed to form a first circuit board structure and a second circuit board structure. The first circuit board structure is composed of at least a first core layer, a second copper foil layer, a first patterned circuit layer, a first insulating layer and a fifth copper foil layer. The second circuit board structure is composed of at least a second core layer, a third copper foil layer, a second patterned circuit layer, a second insulating layer and a sixth copper foil layer.

在本發明之一實施例中,上述之黏著層的材質包括綠漆、樹脂或黏性材料,而包覆層的材質包括黏性材料或樹脂。In an embodiment of the invention, the material of the adhesive layer comprises a green paint, a resin or a viscous material, and the material of the cover layer comprises a viscous material or a resin.

在本發明之一實施例中,上述之包覆層的黏度大於黏著層的黏度。In an embodiment of the invention, the viscosity of the coating layer is greater than the viscosity of the adhesive layer.

在本發明之一實施例中,上述之線路板結構的製作方法,更包括:於移除包覆層與黏著層之前,對第五銅箔層與第六銅箔層照射一雷射光,以形成至少一從第五銅箔層延伸至第一圖案化線路層的第一盲孔,以及形成至少一從第六銅箔層延伸至第二圖案化線路層的第二盲孔;形成一填孔材料於第一盲孔與第二盲孔中,其中填孔材料電性連接於第五銅箔層與第一圖案化線路層之間,以及填孔材料電性連接於第六銅箔層與第二圖案化線路層之間;以及移除包覆層於黏著層。In an embodiment of the present invention, the method for fabricating the circuit board structure further includes: irradiating a laser beam to the fifth copper foil layer and the sixth copper foil layer before removing the cladding layer and the adhesive layer, Forming at least one first blind via extending from the fifth copper foil layer to the first patterned wiring layer, and forming at least one second blind via extending from the sixth copper foil layer to the second patterned wiring layer; forming a fill The hole material is in the first blind hole and the second blind hole, wherein the hole filling material is electrically connected between the fifth copper foil layer and the first patterned circuit layer, and the hole filling material is electrically connected to the sixth copper foil layer Between the second patterned circuit layer; and removing the cladding layer from the adhesive layer.

在本發明之一實施例中,上述之形成填孔材料的方式包括電鍍法。In one embodiment of the invention, the manner of forming the hole-filling material described above includes electroplating.

在本發明之一實施例中,上述之線路板結構的製作方法,更包括:形成填孔材料之後,且於移除包覆層與黏著層之前,對第五銅箔層與第六銅箔層進行一微影及蝕刻步驟,以於第一絕緣層上形成一第一圖案化導電層,而於第二絕緣層上形成一第二圖案化導電層;壓合一第三絕緣層以及位於第三絕緣層上之一第七銅箔層於第一圖案化導電層上,以及壓合一第四絕緣層以及位於第四絕緣層上之一第八銅箔層於第二圖案化導電層上;以及移除包覆層與黏著層。In an embodiment of the invention, the method for fabricating the circuit board structure further includes: after forming the hole-filling material, and before removing the cladding layer and the adhesive layer, the fifth copper foil layer and the sixth copper foil Performing a lithography and etching step to form a first patterned conductive layer on the first insulating layer and a second patterned conductive layer on the second insulating layer; pressing a third insulating layer and located a seventh copper foil layer on the third insulating layer is on the first patterned conductive layer, and pressing a fourth insulating layer and an eighth copper foil layer on the fourth insulating layer on the second patterned conductive layer Upper; and remove the coating and the adhesive layer.

在本發明之一實施例中,上述之線路板結構的製作方法,更包括:於移除包覆層與黏著層之前,對第五銅箔層與第六銅箔層進行一微影及蝕刻步驟,以於第一絕緣層上形成一第一圖案化導電層,而於第二絕緣層上形成一第二圖案化導電層;壓合一第三絕緣層以及位於第三絕緣層上之一第七銅箔層於第一圖案化導電層上,以及壓合一第四絕緣層以及位於第四絕緣層上之一第八銅箔層於第二圖案化導電層上;以及移除包覆層與黏著層。In an embodiment of the invention, the method for fabricating the circuit board structure further includes: performing a lithography and etching on the fifth copper foil layer and the sixth copper foil layer before removing the cladding layer and the adhesive layer. a step of forming a first patterned conductive layer on the first insulating layer and forming a second patterned conductive layer on the second insulating layer; pressing a third insulating layer and one of the third insulating layers a seventh copper foil layer on the first patterned conductive layer, and a fourth insulating layer and a eighth copper foil layer on the fourth insulating layer on the second patterned conductive layer; and removing the cladding Layer and adhesive layer.

在本發明之一實施例中,上述之線路板結構的製作方法,更包括:於進行電鍍步驟以形成導電材料層之前,對第一基板、第二基板以及包覆層進行一表面處理步驟。In an embodiment of the invention, the method for fabricating the circuit board structure further includes: performing a surface treatment step on the first substrate, the second substrate, and the cladding layer before performing the electroplating step to form the conductive material layer.

在本發明之一實施例中,上述之移除包覆層與黏著層的方法包括刀具切割或雷射切割。In one embodiment of the invention, the above method of removing the cover layer and the adhesive layer includes knife cutting or laser cutting.

基於上述,由於本發明是透過包覆層來包覆基板的側緣,因此於後續進行電鍍、微影及蝕刻製程時,相較於習知之線路板結構的製作方法而言,本發明之線路板結構的製作方法可有效防止蝕刻液及電鍍液從基板的側緣進入,可有效提升線路板結構的製程良率與結構可靠度。再者,本發明於移除包覆層與黏著層後可同時得到兩個線路板結構,可有效降低線路板結構的製作成本。Based on the above, since the present invention covers the side edges of the substrate through the cladding layer, the wiring of the present invention is performed in the subsequent electroplating, lithography, and etching processes as compared with the conventional method for fabricating the wiring board structure. The manufacturing method of the plate structure can effectively prevent the etching liquid and the plating solution from entering from the side edge of the substrate, and can effectively improve the process yield and structural reliability of the circuit board structure. Furthermore, the present invention can simultaneously obtain two circuit board structures after removing the cladding layer and the adhesive layer, which can effectively reduce the manufacturing cost of the circuit board structure.

為讓本發明之上述特徵和優點能更明顯易懂,下文特舉實施例,並配合所附圖式作詳細說明如下。The above described features and advantages of the present invention will be more apparent from the following description.

圖1A至圖1H為本發明之一實施例之一種線路板結構的製作方法的剖面示意圖。在本實施例中,依照本實施例的線路板結構的製作方法,首先,請參考圖1A,提供一第一基板110與一第二基板120。於此,第一基板110具有一第一核心層112以及位於第一核心層112之一第一表面110a與一第二表面110b的一第一銅箔層114與一第二銅箔層116。第二基板120具有一第二核心層122以及位於第二核心層122之一第三表面120a與一第四表面120b的一第三銅箔層124與一第四銅箔層126。1A to 1H are schematic cross-sectional views showing a method of fabricating a circuit board structure according to an embodiment of the present invention. In this embodiment, in accordance with the method for fabricating the circuit board structure of the present embodiment, first, referring to FIG. 1A, a first substrate 110 and a second substrate 120 are provided. The first substrate 110 has a first core layer 112 and a first copper foil layer 114 and a second copper foil layer 116 on the first surface 110a and the second surface 110b of the first core layer 112. The second substrate 120 has a second core layer 122 and a third copper foil layer 124 and a fourth copper foil layer 126 on the third surface 120a and the fourth surface 120b of the second core layer 122.

接著,請參考圖1B,形成一黏著層130於第一基板110與第二基板120之間,其中第二基板120的第三銅箔層124藉由黏著層130局部結合於第一基板110的第二銅箔層116上。於此,黏著層130的材質例如是綠漆、樹脂或黏性材料,其中黏著層130例如是透過點膠的方式形成於第一基板110與第二基板120之間。Next, referring to FIG. 1B , an adhesive layer 130 is formed between the first substrate 110 and the second substrate 120 , wherein the third copper foil layer 124 of the second substrate 120 is partially bonded to the first substrate 110 by the adhesive layer 130 . On the second copper foil layer 116. The material of the adhesive layer 130 is, for example, a green lacquer, a resin or a viscous material. The adhesive layer 130 is formed between the first substrate 110 and the second substrate 120 by, for example, dispensing.

接著,請參考圖1C,形成一包覆層140以包覆第一基板110的側緣、第二基板120的側緣以及黏著層130的側緣,且延伸至部分第一銅箔層114與部分第四銅箔層126上。特別是,包覆層140具有抗酸鹼的特性,而包覆層140的材質例如是黏性材料或樹脂,且包覆層140的黏度大於黏著層130的黏度。此外,包覆層140亦具有耐壓合及抗高溫的特性。Next, referring to FIG. 1C, a cladding layer 140 is formed to cover the side edges of the first substrate 110, the side edges of the second substrate 120, and the side edges of the adhesive layer 130, and extend to a portion of the first copper foil layer 114 and Part of the fourth copper foil layer 126. In particular, the coating layer 140 has an acid-base resistance, and the material of the coating layer 140 is, for example, a viscous material or a resin, and the viscosity of the coating layer 140 is greater than the viscosity of the adhesive layer 130. In addition, the coating layer 140 also has the characteristics of resistance to pressure and high temperature.

接著,請參考圖1D,進行一電鍍步驟,以形成一導電材料層150於包覆層140、第一基板110的第一銅箔層114與第二基板120的第四銅箔層126上。需說明的是,於進行電鍍步驟之前,為了具有較佳的電鍍效果,亦可先對第一基板110、第二基板120以及包覆層140的表面進行一表面處理步驟,其中表面處理步驟例如是去脂清潔處理。由於包覆層140包覆第一基板110的側緣、第二基板120的側緣以及黏著層130的側緣,因此進行表面處理步驟時,亦不會對第一基板110上的第二銅箔層116以及第二基板120上第三銅箔層124造成侵蝕。Next, referring to FIG. 1D, a plating step is performed to form a conductive material layer 150 on the cladding layer 140, the first copper foil layer 114 of the first substrate 110, and the fourth copper foil layer 126 of the second substrate 120. It should be noted that, before performing the electroplating step, in order to have a better electroplating effect, a surface treatment step may be performed on the surfaces of the first substrate 110, the second substrate 120, and the cladding layer 140, wherein the surface treatment step is, for example, It is degreased and cleaned. Since the cladding layer 140 covers the side edge of the first substrate 110, the side edge of the second substrate 120, and the side edge of the adhesive layer 130, the second copper on the first substrate 110 is not performed when the surface treatment step is performed. The foil layer 116 and the third copper foil layer 124 on the second substrate 120 cause erosion.

接著,請參考圖1E,對導電材料層150及其下方之第一銅箔層114與第四銅箔層126進行一微影及蝕刻步驟,以於第一核心層112的第一表面110a形成一第一圖案化線路層150a,而於第二核心層122的第四表面120b形成一第二圖案化線路層150b。Next, referring to FIG. 1E, the conductive material layer 150 and the first copper foil layer 114 and the fourth copper foil layer 126 underneath are subjected to a lithography and etching step to form on the first surface 110a of the first core layer 112. A first patterned circuit layer 150a is formed, and a second patterned circuit layer 150b is formed on the fourth surface 120b of the second core layer 122.

接著,請參考圖1F,壓合一第一絕緣層160以及位於第一絕緣層160上之一第五銅箔層180於第一圖案化線路層150a上,以及壓合一第二絕緣層170以及位於第二絕緣層170上之一第六銅箔層190於第二圖案化線路層150b上。由於本實施例是採用熱壓合的方式壓合第一絕緣層160及第五銅箔層180於第一圖案化線路層150a上以及壓合第二絕緣層170及第六銅箔層190於第二圖案化線路層150b上,因此第一絕緣層160與第二絕緣層170會如圖1F所示延伸至包覆層140的側緣而包覆包覆層140,而第五銅箔層180與第六銅箔層190會配置於第一絕緣層160及第二絕緣層170上,且第五銅箔層180的邊緣與第六銅箔層190的邊緣分別會突出於第一絕緣層160的邊緣與第二絕緣層170的邊緣。Next, referring to FIG. 1F, a first insulating layer 160 and a fifth copper foil layer 180 on the first insulating layer 160 are bonded on the first patterned wiring layer 150a, and a second insulating layer 170 is pressed. And a sixth copper foil layer 190 on the second insulating layer 170 is on the second patterned circuit layer 150b. In this embodiment, the first insulating layer 160 and the fifth copper foil layer 180 are pressed onto the first patterned circuit layer 150a and the second insulating layer 170 and the sixth copper foil layer 190 are pressed together by thermocompression bonding. On the second patterned circuit layer 150b, the first insulating layer 160 and the second insulating layer 170 may extend to the side edges of the cladding layer 140 to cover the cladding layer 140 as shown in FIG. 1F, and the fifth copper foil layer The 180 and the second copper foil layer 190 are disposed on the first insulating layer 160 and the second insulating layer 170, and the edge of the fifth copper foil layer 180 and the edge of the sixth copper foil layer 190 respectively protrude from the first insulating layer. The edge of 160 is the edge of the second insulating layer 170.

之後,請參考圖1G,進行一撈邊步驟,以移除部分第一絕緣層160、部分第二絕緣層170、部分第五銅箔層180以及部分第六銅箔層190,而使第五銅箔層180、第一絕緣層160、第二絕緣層170以及第六銅箔層190的邊緣實質上切齊。Thereafter, referring to FIG. 1G, a burring step is performed to remove a portion of the first insulating layer 160, a portion of the second insulating layer 170, a portion of the fifth copper foil layer 180, and a portion of the sixth copper foil layer 190, and The edges of the copper foil layer 180, the first insulating layer 160, the second insulating layer 170, and the sixth copper foil layer 190 are substantially aligned.

最後,請同時參考圖1G與圖1H,移除包覆層140與黏著層130,而形成一第一線路板結構100a與一第二線路板結構100b。其中,移除包覆層140與黏著層130的方式例如是刀具切割或雷射切割。於此,第一線路板結構100a是由第一核心層112、第二銅箔層116、第一圖案化線路層150a、第一絕緣層160與第五銅箔層180所構成,且第一線路板結構100a可視為一三層印刷電路板結構。第二線路板結構100b是由第二核心層122、第三銅箔層124、第二圖案化線路層150b、第二絕緣層170與第六銅箔層190所構成,且第二線路板結構100b可視為一三層印刷電路板結構。至此,已完成第一線路板結構100a與第二線路板結構100b的製作。Finally, referring to FIG. 1G and FIG. 1H, the cladding layer 140 and the adhesive layer 130 are removed to form a first circuit board structure 100a and a second circuit board structure 100b. The manner in which the cladding layer 140 and the adhesive layer 130 are removed is, for example, a cutter cutting or a laser cutting. Here, the first circuit board structure 100a is composed of the first core layer 112, the second copper foil layer 116, the first patterned circuit layer 150a, the first insulating layer 160 and the fifth copper foil layer 180, and is first The circuit board structure 100a can be considered as a three-layer printed circuit board structure. The second circuit board structure 100b is composed of the second core layer 122, the third copper foil layer 124, the second patterned circuit layer 150b, the second insulating layer 170 and the sixth copper foil layer 190, and the second circuit board structure 100b can be viewed as a three-layer printed circuit board structure. So far, the fabrication of the first circuit board structure 100a and the second circuit board structure 100b has been completed.

由於本實施例是透過包覆層140來包覆第一基板110的側緣、第二基板120的側緣以及黏著層130的側緣,因此於後續進行電鍍、微影及蝕刻製程時,相較於習知之線路板結構的製作方法而言,本實施例之線路板結構的製作方法可有效防止蝕刻液及電鍍液從第一基板110的側緣、第二基板120的側緣或黏著層130的側緣進入,可有效提升第一線路板結構100a與第二線路板結構100b的製程良率與結構可靠度。此外,本實施例於移除包覆層140與黏著層130後可同時得到兩個線路板結構(即第一線路板結構100a與第二線路板結構100b),可有效降低線路板結構的製作成本。In this embodiment, the side edge of the first substrate 110, the side edge of the second substrate 120, and the side edge of the adhesive layer 130 are covered by the cladding layer 140, so that the subsequent electroplating, lithography, and etching processes are performed. Compared with the conventional manufacturing method of the circuit board structure, the manufacturing method of the circuit board structure of the embodiment can effectively prevent the etching liquid and the plating solution from the side edge of the first substrate 110, the side edge of the second substrate 120 or the adhesive layer. The side edge entry of 130 can effectively improve the process yield and structural reliability of the first circuit board structure 100a and the second circuit board structure 100b. In addition, in the embodiment, after the cladding layer 140 and the adhesive layer 130 are removed, two circuit board structures (ie, the first circuit board structure 100a and the second circuit board structure 100b) can be obtained at the same time, which can effectively reduce the structure of the circuit board structure. cost.

以下實施例沿用前述實施例的元件標號與部分內容,其中採用相同的標號來表示相同或近似的元件,並且省略了相同技術內容的說明。關於省略部分的說明可參考前述實施例,下述實施例不再重複贅述。The following embodiments use the same reference numerals and parts in the foregoing embodiments, and the same reference numerals are used to refer to the same or similar elements, and the description of the same technical content is omitted. For the description of the omitted portions, reference may be made to the foregoing embodiments, and the following embodiments are not repeated.

圖2A至圖2C為本發明之一實施例之一種線路板結構的製作方法的局部步驟的剖面示意圖。請先參考圖2C,本實施例的第一線路板結構100c與第二線路板結構100d與前述實施例之第一線路板結構100a及第二線路板結構100b主要的差異是在於:本實施例之第一線路板結構100c更具有第一盲孔162與填充材料199所組成之導電通孔結構,以連接第五銅箔層180與第一圖案化線路層150a,且此第一線路板結構100c可視為一三層高密度內連線基板結構。第二線路板結構100d更具有第一盲孔172與填充材料199所組成之導電通孔結構,以連接第六銅箔層190與第二圖案化線路層150b,且此第二線路板結構100d可視為一三層高密度內連線基板結構。2A-2C are cross-sectional views showing a partial step of a method of fabricating a circuit board structure according to an embodiment of the present invention. Referring to FIG. 2C, the main difference between the first circuit board structure 100c and the second circuit board structure 100d of the present embodiment and the first circuit board structure 100a and the second circuit board structure 100b of the foregoing embodiment is that: this embodiment The first circuit board structure 100c further has a conductive via structure composed of a first blind via 162 and a filling material 199 to connect the fifth copper foil layer 180 and the first patterned circuit layer 150a, and the first circuit board structure 100c can be regarded as a three-layer high-density interconnect substrate structure. The second circuit board structure 100d further has a conductive via structure composed of a first blind via 172 and a filling material 199 to connect the sixth copper foil layer 190 and the second patterned wiring layer 150b, and the second wiring board structure 100d Can be regarded as a three-layer high-density interconnect substrate structure.

在製程上,本實施例的第一線路板結構100c與第二線路板結構100d可以採用與前述實施例之第一線路板結構100a與第二線路板結構100b大致相同的製作方式,並且在圖1G之步驟後,即進行一撈邊步驟以移除部分第一絕緣層160、部分第二絕緣層170、部分第五銅箔層180以及部分第六銅箔層190之後,請參考圖2A,對第五銅箔層180與第六銅箔層190照射一雷射光L,以形成至少一從第五銅箔層180延伸至第一圖案化線路層150a的第一盲孔162(圖2A中繪示兩個第一盲孔),以及形成至少一從第六銅箔層190延伸至第二圖案化線路層150b的第二盲孔172(圖2A中繪示兩個第二盲孔)。In the process, the first circuit board structure 100c and the second circuit board structure 100d of the embodiment may be substantially the same as the first circuit board structure 100a and the second circuit board structure 100b of the foregoing embodiment, and After the step of 1G, after performing a burring step to remove a portion of the first insulating layer 160, a portion of the second insulating layer 170, a portion of the fifth copper foil layer 180, and a portion of the sixth copper foil layer 190, please refer to FIG. 2A. The fifth copper foil layer 180 and the sixth copper foil layer 190 are irradiated with a laser light L to form at least one first blind via 162 extending from the fifth copper foil layer 180 to the first patterned wiring layer 150a (FIG. 2A) Two first blind vias are illustrated, and at least one second blind via 172 extending from the sixth copper foil layer 190 to the second patterned wiring layer 150b is formed (two second blind vias are depicted in FIG. 2A).

接著,請參考圖2B,形成一填孔材料199於第一盲孔162與第二盲孔172中,其中填孔材料199電性連接於第五銅箔層180與第一圖案化線路層150a之間,以及填孔材料199電性連接於第六銅箔層190與第二圖案化線路層150b之間。於此,形成填孔材料199的方式例如是電鍍法。之後,請同時參考圖2B與圖2C,移除包覆層140與黏著層130,而形成一第一線路板結構100c與一第二線路板結構100c。於此,第一線路板結構100c是由第一核心層112、第二銅箔層116、第一圖案化線路層150a、第一絕緣層160、第五銅箔層180、第一盲孔162及填充於第一盲孔162內的填充材料199所構成。第二線路板結構100b是由第二核心層122、第三銅箔層124、第二圖案化線路層150b、第二絕緣層170、第六銅箔層190、第二盲孔172及填充於第二盲孔172內的填充材料199所構成。至此,已完成第一線路板結構100c與第二線路板結構100d的製作。Next, referring to FIG. 2B, a hole-filling material 199 is formed in the first blind hole 162 and the second blind hole 172, wherein the hole-filling material 199 is electrically connected to the fifth copper foil layer 180 and the first patterned circuit layer 150a. The hole filling material 199 is electrically connected between the sixth copper foil layer 190 and the second patterned circuit layer 150b. Here, the form of the hole-filling material 199 is, for example, an electroplating method. Thereafter, referring to FIG. 2B and FIG. 2C, the cladding layer 140 and the adhesive layer 130 are removed to form a first circuit board structure 100c and a second circuit board structure 100c. Here, the first circuit board structure 100c is composed of the first core layer 112, the second copper foil layer 116, the first patterned circuit layer 150a, the first insulating layer 160, the fifth copper foil layer 180, and the first blind via 162. And a filling material 199 filled in the first blind hole 162. The second circuit board structure 100b is composed of a second core layer 122, a third copper foil layer 124, a second patterned circuit layer 150b, a second insulating layer 170, a sixth copper foil layer 190, a second blind via 172, and The filling material 199 in the second blind hole 172 is formed. So far, the fabrication of the first circuit board structure 100c and the second circuit board structure 100d has been completed.

圖3A至圖3C為本發明之另一實施例之一種線路板結構的製作方法的局部步驟的剖面示意圖。請先參考圖3C,本實施例的第一線路板結構100e與第二線路板結構100f與前述實施例之第一線路板結構100a及第二線路板結構100b主要的差異是在於:本實施例之第一線路板結構100e更具有一第一圖案化導電層182、一第三絕緣層165與一第七銅箔層185,且此第一線路板結構100e可視為一四層印刷電路板結構。第二線路板結構100f更具有一第二圖案化導電層192、一第四絕緣層175與一第八銅箔層195,且此第二線路板結構100f可視為一四層印刷電路板結構。3A-3C are cross-sectional views showing a partial step of a method of fabricating a circuit board structure according to another embodiment of the present invention. Referring to FIG. 3C, the main difference between the first circuit board structure 100e and the second circuit board structure 100f of the present embodiment and the first circuit board structure 100a and the second circuit board structure 100b of the foregoing embodiment is that: this embodiment The first circuit board structure 100e further has a first patterned conductive layer 182, a third insulating layer 165 and a seventh copper foil layer 185, and the first circuit board structure 100e can be regarded as a four-layer printed circuit board structure. . The second circuit board structure 100f further has a second patterned conductive layer 192, a fourth insulating layer 175 and an eighth copper foil layer 195, and the second circuit board structure 100f can be regarded as a four-layer printed circuit board structure.

在製程上,本實施例的第一線路板結構100e與第二線路板結構100f可以採用與前述實施例之第一線路板結構100a與第二線路板結構100b大致相同的製作方式,並且在圖1G之步驟後,即進行一撈邊步驟以移除部分第一絕緣層160、部分第二絕緣層170、部分第五銅箔層180以及部分第六銅箔層190之後,請參考圖3A,對第五銅箔層180與第六銅箔層190進行一微影及蝕刻步驟,以於第一絕緣層160上形成一第一圖案化導電層182,而於第二絕緣層170上形成一第二圖案化導電層192。此時,由於包覆層140外第一絕緣層160與第二絕緣層170的包覆,因此可更進一步防止蝕刻液侵蝕第一基板110的第二銅箔層116與第二基板120的第三銅箔層124。In the process, the first circuit board structure 100e and the second circuit board structure 100f of the embodiment may be substantially the same as the first circuit board structure 100a and the second circuit board structure 100b of the foregoing embodiment, and After the step of 1G, after performing a burring step to remove a portion of the first insulating layer 160, a portion of the second insulating layer 170, a portion of the fifth copper foil layer 180, and a portion of the sixth copper foil layer 190, please refer to FIG. 3A. A fifth lithography and etching step is performed on the fifth copper foil layer 180 and the sixth copper foil layer 190 to form a first patterned conductive layer 182 on the first insulating layer 160 and a second insulating layer 170 on the second insulating layer 170. The second patterned conductive layer 192. At this time, since the first insulating layer 160 and the second insulating layer 170 are coated outside the cladding layer 140, the etching solution can be further prevented from eroding the second copper foil layer 116 and the second substrate 120 of the first substrate 110. Three copper foil layers 124.

接著,請參考圖3B,壓合一第三絕緣層165以及位於第三絕緣層165上之一第七銅箔層185於第一圖案化導電層182上,以及壓合一第四絕緣層175以及位於第四絕緣層175上之一第八銅箔層195於第二圖案化導電層192上。之後,請同時參考圖3B與圖3C,移除包覆層140與黏著層130,而形成一第一線路板結構100e與一第二線路板結構100f。於此,第一線路板結構100e是由第一核心層112、第二銅箔層116、第一圖案化線路層150a、第一絕緣層160、第一圖案化導電層182、第三絕緣層165以及第七銅箔層185所構成。第二線路板結構100b是由第二核心層122、第三銅箔層124、第二圖案化線路層150b、第二絕緣層170、第二圖案化導電層192、第四絕緣層175以及第八銅箔層195所構成。至此,已完成第一線路板結構100e與第二線路板結構100f的製作。Next, referring to FIG. 3B, a third insulating layer 165 and a seventh copper foil layer 185 on the third insulating layer 165 are laminated on the first patterned conductive layer 182, and a fourth insulating layer 175 is laminated. And an eighth copper foil layer 195 on the fourth insulating layer 175 is on the second patterned conductive layer 192. Thereafter, referring to FIG. 3B and FIG. 3C, the cladding layer 140 and the adhesive layer 130 are removed to form a first circuit board structure 100e and a second circuit board structure 100f. Here, the first circuit board structure 100e is composed of a first core layer 112, a second copper foil layer 116, a first patterned circuit layer 150a, a first insulating layer 160, a first patterned conductive layer 182, and a third insulating layer. 165 and a seventh copper foil layer 185 are formed. The second circuit board structure 100b is composed of a second core layer 122, a third copper foil layer 124, a second patterned wiring layer 150b, a second insulating layer 170, a second patterned conductive layer 192, a fourth insulating layer 175, and The eight copper foil layer 195 is formed. So far, the fabrication of the first circuit board structure 100e and the second circuit board structure 100f has been completed.

圖4A至圖4C為本發明之又一實施例之一種線路板結構的製作方法的局部步驟的剖面示意圖。請先參考圖4C,本實施例的第一線路板結構100g與第二線路板結構100h與前述實施例之第一線路板結構100c及第二線路板結構100d主要的差異是在於:本實施例之第一線路板結構100g更具有一第一圖案化導電層182、一第三絕緣層165與一第七銅箔層185,且此第一線路板結構100g可視為一四層高密度內連線基板結構。第二線路板結構100h更具有一第二圖案化導電層192、一第四絕緣層175與一第八銅箔層195,且此第二線路板結構100h可視為一四層高密度內連線基板結構。4A-4C are cross-sectional views showing a partial step of a method of fabricating a circuit board structure according to still another embodiment of the present invention. Referring to FIG. 4C, the main difference between the first circuit board structure 100g and the second circuit board structure 100h of the present embodiment and the first circuit board structure 100c and the second circuit board structure 100d of the foregoing embodiment is that: this embodiment The first circuit board structure 100g further has a first patterned conductive layer 182, a third insulating layer 165 and a seventh copper foil layer 185, and the first circuit board structure 100g can be regarded as a four-layer high-density interconnect. Line substrate structure. The second circuit board structure 100h further has a second patterned conductive layer 192, a fourth insulating layer 175 and an eighth copper foil layer 195, and the second circuit board structure 100h can be regarded as a four-layer high-density interconnect. Substrate structure.

在製程上,本實施例的第一線路板結構100g與第二線路板結構100h可以採用與前述實施例之第一線路板結構100c與第二線路板結構100d大致相同的製作方式,並且在圖2B之步驟後,即形成填孔材料199於第一盲孔162與第二盲孔172中之後,請參考圖4A,對第五銅箔層180與第六銅箔層190進行一微影及蝕刻步驟,以於第一絕緣層160上形成一第一圖案化導電層182,而於第二絕緣層170上形成一第二圖案化導電層192。此時,由於包覆層140外第一絕緣層160與第二絕緣層170的包覆,因此可更進一步防止蝕刻液侵蝕第一基板110的第二銅箔層116與第二基板120的第三銅箔層124。In the process, the first circuit board structure 100g and the second circuit board structure 100h of the embodiment may be substantially the same as the first circuit board structure 100c and the second circuit board structure 100d of the foregoing embodiment, and After the step of 2B, after forming the hole-filling material 199 in the first blind hole 162 and the second blind hole 172, please refer to FIG. 4A to perform a lithography on the fifth copper foil layer 180 and the sixth copper foil layer 190. An etching step is performed to form a first patterned conductive layer 182 on the first insulating layer 160 and a second patterned conductive layer 192 on the second insulating layer 170. At this time, since the first insulating layer 160 and the second insulating layer 170 are coated outside the cladding layer 140, the etching solution can be further prevented from eroding the second copper foil layer 116 and the second substrate 120 of the first substrate 110. Three copper foil layers 124.

接著,請參考圖4B,壓合一第三絕緣層165以及位於第三絕緣層165上之一第七銅箔層185於第一圖案化導電層150a上,以及壓合一第四絕緣層175以及位於第四絕緣層175上之一第八銅箔層195於第二圖案化導電層150b上。之後,請同時參考圖4B與圖4C,移除包覆層140與黏著層130,而形成一第一線路板結構100g與一第二線路板結構100h。於此,第一線路板結構100g是由第一核心層112、第二銅箔層116、第一圖案化線路層150a、第一絕緣層160、第一圖案化導電層182、第一盲孔162及填充於第一盲孔162內的填充材料199、第三絕緣層165以及第七銅箔層185所構成。第二線路板結構100h是由第二核心層122、第三銅箔層124、第二圖案化線路層150b、第二絕緣層170、第二圖案化導電層192、第二盲孔172及填充於第二盲孔172內的填充材料199、第四絕緣層175以及第八銅箔層195所構成。至此,已完成第一線路板結構100e與第二線路板結構100f的製作。Next, referring to FIG. 4B, a third insulating layer 165 and a seventh copper foil layer 185 on the third insulating layer 165 are laminated on the first patterned conductive layer 150a, and a fourth insulating layer 175 is laminated. And an eighth copper foil layer 195 on the fourth insulating layer 175 is on the second patterned conductive layer 150b. Thereafter, referring to FIG. 4B and FIG. 4C, the cladding layer 140 and the adhesive layer 130 are removed to form a first circuit board structure 100g and a second circuit board structure 100h. Here, the first circuit board structure 100g is composed of a first core layer 112, a second copper foil layer 116, a first patterned circuit layer 150a, a first insulating layer 160, a first patterned conductive layer 182, and a first blind via. 162 and a filling material 199, a third insulating layer 165, and a seventh copper foil layer 185 filled in the first blind via 162. The second circuit board structure 100h is composed of a second core layer 122, a third copper foil layer 124, a second patterned circuit layer 150b, a second insulating layer 170, a second patterned conductive layer 192, a second blind via 172, and a fill. The filling material 199, the fourth insulating layer 175 and the eighth copper foil layer 195 in the second blind hole 172 are formed. So far, the fabrication of the first circuit board structure 100e and the second circuit board structure 100f has been completed.

綜上所述,由於本發明是透過包覆層來包覆基板的側緣,因此於後續進行電鍍、微影及蝕刻製程時,相較於習知之線路板結構的製作方法而言,本發明之線路板結構的製作方法可有效防止蝕刻液及電鍍液從基板的側緣進入,可有效提升線路板結構的製程良率與結構可靠度。再者,本發明於移除包覆層與黏著層後可同時得到兩個線路板結構,可有效降低線路板結構的製作成本。In summary, since the present invention covers the side edges of the substrate through the cladding layer, the present invention is in the subsequent electroplating, lithography, and etching processes, compared to the conventional method of fabricating the wiring board structure. The manufacturing method of the circuit board structure can effectively prevent the etching liquid and the plating liquid from entering from the side edge of the substrate, and can effectively improve the process yield and structural reliability of the circuit board structure. Furthermore, the present invention can simultaneously obtain two circuit board structures after removing the cladding layer and the adhesive layer, which can effectively reduce the manufacturing cost of the circuit board structure.

雖然本發明已以實施例揭露如上,然其並非用以限定本發明,任何所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作些許之更動與潤飾,故本發明之保護範圍當視後附之申請專利範圍所界定者為準。Although the present invention has been disclosed in the above embodiments, it is not intended to limit the invention, and any one of ordinary skill in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the invention is defined by the scope of the appended claims.

100a、100c、100e、100g...第一線路板結構100a, 100c, 100e, 100g. . . First circuit board structure

100b、100d、100f、100h...第二線路板結構100b, 100d, 100f, 100h. . . Second circuit board structure

110...第一基板110. . . First substrate

110a...第一表面110a. . . First surface

110b...第二表面110b. . . Second surface

112...第一核心層112. . . First core layer

114...第一銅箔層114. . . First copper foil layer

116...第二銅箔層116. . . Second copper foil layer

120...第二基板120. . . Second substrate

120a...第三表面120a. . . Third surface

120b...第四表面120b. . . Fourth surface

122...第二核心層122. . . Second core layer

124...第三銅箔層124. . . Third copper foil layer

126...第四銅箔層126. . . Fourth copper foil layer

130...黏著層130. . . Adhesive layer

140...包覆層140. . . Coating

150...導電材料層150. . . Conductive material layer

150a...第一圖案化線路層150a. . . First patterned circuit layer

150b...第二圖案化線路層150b. . . Second patterned circuit layer

160...第一絕緣層160. . . First insulating layer

162...第一盲孔162. . . First blind hole

165...第三絕緣層165. . . Third insulating layer

170...第二絕緣層170. . . Second insulating layer

172...第二盲孔172. . . Second blind hole

175...第四絕緣層175. . . Fourth insulating layer

180...第五銅箔層180. . . Fifth copper foil layer

182...第一圖案化導電層182. . . First patterned conductive layer

185...第七銅箔層185. . . Seventh copper foil layer

190...第六銅箔層190. . . Sixth copper foil layer

192...第二圖案化導電層192. . . Second patterned conductive layer

195...第八銅箔層195. . . Eighth copper foil layer

199...填孔材料199. . . Hole filling material

L...雷射光L. . . laser

圖1A至圖1H為本發明之一實施例之一種線路板結構的製作方法的剖面示意圖。1A to 1H are schematic cross-sectional views showing a method of fabricating a circuit board structure according to an embodiment of the present invention.

圖2A至圖2C為本發明之一實施例之一種線路板結構的製作方法的局部步驟的剖面示意圖。2A-2C are cross-sectional views showing a partial step of a method of fabricating a circuit board structure according to an embodiment of the present invention.

圖3A至圖3C為本發明之另一實施例之一種線路板結構的製作方法的局部步驟的剖面示意圖。3A-3C are cross-sectional views showing a partial step of a method of fabricating a circuit board structure according to another embodiment of the present invention.

圖4A至圖4C為本發明之又一實施例之一種線路板結構的製作方法的局部步驟的剖面示意圖。4A-4C are cross-sectional views showing a partial step of a method of fabricating a circuit board structure according to still another embodiment of the present invention.

110...第一基板110. . . First substrate

110a...第一表面110a. . . First surface

110b...第二表面110b. . . Second surface

112...第一核心層112. . . First core layer

114...第一銅箔層114. . . First copper foil layer

116...第二銅箔層116. . . Second copper foil layer

120...第二基板120. . . Second substrate

120a...第三表面120a. . . Third surface

120b...第四表面120b. . . Fourth surface

122...第二核心層122. . . Second core layer

124...第三銅箔層124. . . Third copper foil layer

126...第四銅箔層126. . . Fourth copper foil layer

130...黏著層130. . . Adhesive layer

140...包覆層140. . . Coating

Claims (9)

一種線路板結構的製作方法,包括:提供一第一基板與一第二基板,其中該第一基板具有一第一核心層以及位於該第一核心層之一第一表面與一第二表面的一第一銅箔層與一第二銅箔層,該第二基板具有一第二核心層以及位於該第二核心層之一第三表面與一第四表面的一第三銅箔層與一第四銅箔層;形成一黏著層於該第一基板與該第二基板之間,其中該第三銅箔層藉由該黏著層局部結合於該第二銅箔層上;形成一包覆層以包覆該第一基板的側緣、該第二基板的側緣以及該黏著層的側緣,且延伸至部分該第一銅箔層與部分該第四銅箔層上,其中該包覆層具有抗酸鹼的特性;進行一電鍍步驟,以形成一導電材料層於該包覆層、該第一銅箔層與該第四銅箔層上;對該導電材料層及其下方之該第一銅箔層與該第四銅箔層進行一微影及蝕刻步驟,以於該第一核心層的該第一表面形成一第一圖案化線路層,而於該第二核心層的該第四表面形成一第二圖案化線路層;壓合一第一絕緣層以及位於該第一絕緣層上之一第五銅箔層於該第一圖案化線路層上,以及壓合一第二絕緣層以及位於該第二絕緣層上之一第六銅箔層於該第二圖案化線路層上;以及移除該包覆層與該黏著層,而形成一第一線路板結構與一第二線路板結構,其中該第一線路板結構至少是由該第一核心層、該第二銅箔層、該第一圖案化線路層、該第一絕緣層與該第五銅箔層所構成,而該第二線路板結構至少是由該第二核心層、該第三銅箔層、該第二圖案化線路層、該第二絕緣層與該第六銅箔層所構成。A method for fabricating a circuit board structure includes: providing a first substrate and a second substrate, wherein the first substrate has a first core layer and a first surface and a second surface of the first core layer a first copper foil layer and a second copper foil layer, the second substrate has a second core layer and a third copper foil layer and a third surface and a fourth surface of the second core layer a fourth copper foil layer; an adhesive layer is formed between the first substrate and the second substrate, wherein the third copper foil layer is partially bonded to the second copper foil layer by the adhesive layer; a layer covering a side edge of the first substrate, a side edge of the second substrate, and a side edge of the adhesive layer, and extending to a portion of the first copper foil layer and a portion of the fourth copper foil layer, wherein the package The coating has an acid-base resistant property; performing a plating step to form a conductive material layer on the cladding layer, the first copper foil layer and the fourth copper foil layer; the conductive material layer and the underlying layer thereof Performing a lithography and etching step on the first copper foil layer and the fourth copper foil layer for the first The first surface of the core layer forms a first patterned circuit layer, and the fourth surface of the second core layer forms a second patterned circuit layer; a first insulating layer is pressed and located at the first insulation a fifth copper foil layer on the layer on the first patterned circuit layer, and a second insulating layer and a sixth copper foil layer on the second insulating layer on the second patterned circuit layer And removing the cladding layer and the adhesive layer to form a first circuit board structure and a second circuit board structure, wherein the first circuit board structure is at least the first core layer and the second copper layer a foil layer, the first patterned circuit layer, the first insulating layer and the fifth copper foil layer, and the second circuit board structure is at least the second core layer, the third copper foil layer, The second patterned circuit layer, the second insulating layer and the sixth copper foil layer are formed. 如申請專利範圍第1項所述之線路板結構的製作方法,其中該黏著層的材質包括綠漆、樹脂或黏性材料,而該包覆層的材質包括黏性材料或樹脂。The method for manufacturing a circuit board structure according to the first aspect of the invention, wherein the material of the adhesive layer comprises a green paint, a resin or a viscous material, and the material of the cover layer comprises a viscous material or a resin. 如申請專利範圍第2項所述之線路板結構的製作方法,其中該包覆層的黏度大於該黏著層的黏度。The method for fabricating a circuit board structure according to claim 2, wherein the viscosity of the coating layer is greater than the viscosity of the adhesive layer. 如申請專利範圍第1項所述之線路板結構的製作方法,更包括:於移除該包覆層與該黏著層之前,對該第五銅箔層與該第六銅箔層照射一雷射光,以形成至少一從該第五銅箔層延伸至該第一圖案化線路層的第一盲孔及形成至少一從該第六銅箔層延伸至該第二圖案化線路層的第二盲孔;形成一填孔材料於該第一盲孔與該第二盲孔中,其中該填孔材料電性連接於該第五銅箔層與該第一圖案化線路層之間以及電性連接於該第六銅箔層與該第二圖案化線路層之間;以及移除該包覆層與該黏著層。The method for fabricating a circuit board structure according to claim 1, further comprising: irradiating the fifth copper foil layer and the sixth copper foil layer with a ray before removing the coating layer and the adhesive layer Emitting light to form at least one first blind via extending from the fifth copper foil layer to the first patterned wiring layer and forming at least one second extending from the sixth copper foil layer to the second patterned wiring layer a blind hole; a hole filling material is formed in the first blind hole and the second blind hole, wherein the hole filling material is electrically connected between the fifth copper foil layer and the first patterned circuit layer and electrically Connecting between the sixth copper foil layer and the second patterned circuit layer; and removing the cladding layer and the adhesive layer. 如申請專利範圍第4項所述之線路板結構的製作方法,其中形成該填孔材料的方式包括電鍍法。The method for fabricating a circuit board structure according to claim 4, wherein the manner of forming the hole-filling material comprises electroplating. 如申請專利範圍第4項所述之線路板結構的製作方法,更包括:形成該填孔材料之後,且於移除該包覆層與該黏著層之前,對該第五銅箔層與該第六銅箔層進行一微影及蝕刻步驟,以於該第一絕緣層上形成一第一圖案化導電層,而於該第二絕緣層上形成一第二圖案化導電層;壓合一第三絕緣層以及位於該第三絕緣層上之一第七銅箔層於該第一圖案化導電層上,以及壓合一第四絕緣層以及位於該第四絕緣層上之一第八銅箔層於該第二圖案化導電層上;以及移除該包覆層與該黏著層。The method for fabricating a circuit board structure according to claim 4, further comprising: after forming the hole-filling material, and before removing the coating layer and the adhesive layer, the fifth copper foil layer and the The sixth copper foil layer is subjected to a lithography and etching step to form a first patterned conductive layer on the first insulating layer and a second patterned conductive layer on the second insulating layer; a third insulating layer and a seventh copper foil layer on the third insulating layer on the first patterned conductive layer, and a fourth insulating layer and a eighth copper layer on the fourth insulating layer a foil layer on the second patterned conductive layer; and removing the cladding layer and the adhesive layer. 如申請專利範圍第1項所述之線路板結構的製作方法,更包括:於移除該包覆層與該黏著層之前,對該第五銅箔層與該第六銅箔層進行一微影及蝕刻步驟,以於該第一絕緣層上形成一第一圖案化導電層,而於該第二絕緣層上形成一第二圖案化導電層;壓合一第三絕緣層以及位於該第三絕緣層上之一第七銅箔層於該第一圖案化導電層上,以及壓合一第四絕緣層以及位於該第四絕緣層上之一第八銅箔層於該第二圖案化導電層上;以及移除該包覆層與該黏著層。The method for fabricating a circuit board structure according to claim 1, further comprising: performing a slight micro-layer on the fifth copper foil layer and the sixth copper foil layer before removing the cladding layer and the adhesive layer And a etching step of forming a first patterned conductive layer on the first insulating layer and forming a second patterned conductive layer on the second insulating layer; pressing a third insulating layer and positioning the same a seventh copper foil layer on the third insulating layer is on the first patterned conductive layer, and a fourth insulating layer is pressed and an eighth copper foil layer on the fourth insulating layer is patterned on the second On the conductive layer; and removing the cladding layer and the adhesive layer. 如申請專利範圍第1項所述之線路板結構的製作方法,更包括:於進行該電鍍步驟以形成該導電材料層之前,對該第一基板、該第二基板以及該包覆層進行一表面處理步驟。The method for fabricating a circuit board structure according to claim 1, further comprising: performing a plating step to form the conductive material layer, performing a first substrate, the second substrate, and the cladding layer Surface treatment steps. 如申請專利範圍第1項所述之線路板結構的製作方法,其中移除該包覆層與該黏著層的方法包括刀具切割或雷射切割。The method of fabricating a circuit board structure according to claim 1, wherein the method of removing the cladding layer and the adhesive layer comprises cutter cutting or laser cutting.
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Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI583265B (en) * 2015-12-03 2017-05-11 欣興電子股份有限公司 Circuit structure and manufacturing method thereof
TWI621382B (en) * 2016-01-06 2018-04-11 欣興電子股份有限公司 Circuit board and manufacturing method thereof

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI583265B (en) * 2015-12-03 2017-05-11 欣興電子股份有限公司 Circuit structure and manufacturing method thereof
TWI621382B (en) * 2016-01-06 2018-04-11 欣興電子股份有限公司 Circuit board and manufacturing method thereof

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