TW201330728A - Printed circuit board and method for manufacturing the same - Google Patents

Printed circuit board and method for manufacturing the same Download PDF

Info

Publication number
TW201330728A
TW201330728A TW101142737A TW101142737A TW201330728A TW 201330728 A TW201330728 A TW 201330728A TW 101142737 A TW101142737 A TW 101142737A TW 101142737 A TW101142737 A TW 101142737A TW 201330728 A TW201330728 A TW 201330728A
Authority
TW
Taiwan
Prior art keywords
pad
layer
photoresist
printed circuit
circuit board
Prior art date
Application number
TW101142737A
Other languages
Chinese (zh)
Inventor
Dong-Wook Lee
Hwa-Sub Oh
Soon-Jin Cho
Seung-Hyun Noh
Yong-Soon Jang
Kyoung-Ro Yoon
Original Assignee
Samsung Electro Mech
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Samsung Electro Mech filed Critical Samsung Electro Mech
Publication of TW201330728A publication Critical patent/TW201330728A/en

Links

Classifications

    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/22Secondary treatment of printed circuits
    • H05K3/24Reinforcing the conductive pattern
    • H05K3/243Reinforcing the conductive pattern characterised by selective plating, e.g. for finish plating of pads
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K1/00Printed circuits
    • H05K1/02Details
    • H05K1/11Printed elements for providing electric connections to or between printed circuits
    • H05K1/111Pads for surface mounting, e.g. lay-out
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/007Manufacture or processing of a substrate for a printed circuit board supported by a temporary or sacrificial carrier
    • HELECTRICITY
    • H05ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05KPRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00Apparatus or processes for manufacturing printed circuits
    • H05K3/38Improvement of the adhesion between the insulating substrate and the metal
    • H05K3/382Improvement of the adhesion between the insulating substrate and the metal by special treatment of the metal

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Manufacturing Of Printed Wiring (AREA)
  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

The present invention relates to a method for manufacturing a printed circuit board, which includes: forming a carrier on one surface of a metal layer; providing a first pad forming region by forming a first resist on the other surface of the metal layer; removing the carrier; forming a metal pattern layer by forming a pattern on the metal layer; and providing a second pad forming region by forming a second resist on the opposite surface of the surface of the metal pattern layer on which the first resist is formed, and can implement high-density interlayer connection and reduce manufacturing costs.

Description

印刷電路板及其製造方法 Printed circuit board and method of manufacturing same

本發明是有關於一種印刷電路板及一種製造其之方法,且特別是一種可以實現高密度層間電性連接並減少製造成本之印刷電路板及製造其之方法。 BACKGROUND OF THE INVENTION 1. Field of the Invention This invention relates to a printed circuit board and a method of fabricating the same, and more particularly to a printed circuit board and a method of manufacturing the same that can achieve high-density interlayer electrical connection and reduce manufacturing costs.

近年來,由於電子設備及產品之提升,電子產品的小型化及技術整合已穩定發展。此外,因應小型化及技術整合,電子設備及產品之印刷電路板製造流程需要有不同的變化。 In recent years, due to the advancement of electronic equipment and products, the miniaturization and technical integration of electronic products have been steadily developing. In addition, due to miniaturization and technology integration, the printed circuit board manufacturing process for electronic devices and products needs to be changed differently.

印刷電路板之製造方法的技術方向從早期單一側印刷電路板發展到雙側印刷電路板,且更進一步發展到多層印刷電路板。特別地是,最近於製造多層印刷電路板中,發展出被稱之為增建方法之製造方法。 The technical direction of the manufacturing method of printed circuit boards has progressed from an early single-sided printed circuit board to a double-sided printed circuit board, and further developed to a multilayer printed circuit board. In particular, recently, in the manufacture of a multilayer printed circuit board, a manufacturing method called an extension method has been developed.

同時,於印刷電路板之製造流程中,需要形成各種孔洞,以電性連接各層之電路圖案及電子元件,例如是內孔(inner via hole,IVH)、盲孔(blind via hole,BVH)及電鍍穿孔(plated through hole,PTH)。先前技術中,藉由形成孔洞於基板內、執行電鍍於包括孔洞之基板的表面,以電性連接各層、及採用一乾膜形成包括接墊之線路圖案於基板之表面上,以形成印刷電路板。 At the same time, in the manufacturing process of the printed circuit board, various holes need to be formed to electrically connect the circuit patterns and electronic components of each layer, such as an inner via hole (IVH), a blind via hole (BVH), and Plated through hole (PTH). In the prior art, by forming holes in the substrate, performing electroplating on the surface of the substrate including the holes, electrically connecting the layers, and forming a wiring pattern including the pads on the surface of the substrate by using a dry film to form a printed circuit board. .

然而,因應高密度且薄基板之需求下,高密度層間電性連接是需要的,但採用先前技術來製造印刷電路板時, 由於需要二或多個金屬層,而對高密度層間電性連接而言是有限制的。 However, high-density interlayer electrical connections are required in response to the demand for high-density and thin substrates, but when manufacturing printed circuit boards using prior art techniques, Since two or more metal layers are required, there is a limit to the high-density interlayer electrical connection.

再者,由於形成孔洞及電鍍孔洞內部以形成層間電性連接之製程是必須的,因此,印刷電路板之製造過程是複雜且製造成本將會增加。 Furthermore, since a process of forming a hole and plating the inside of the hole to form an electrical connection between the layers is necessary, the manufacturing process of the printed circuit board is complicated and the manufacturing cost is increased.

本發明為了克服上述問題而發明,因此本發明之目的係為提供一種印刷電路板,其藉由接墊直接連接至一金屬圖案層,不需採用孔洞而直接形成層間電性連接(interlayer electrical connection),使得印刷電路板可以具有高密度且薄之特性。 The present invention has been made to overcome the above problems, and an object of the present invention is to provide a printed circuit board which is directly connected to a metal pattern layer by a pad, and directly forms an interlayer electrical connection without using a hole. ), so that the printed circuit board can have high density and thin characteristics.

本發明之另一目的係提供一種印刷電路板之製造方法。此方法可以藉由直接連接接墊至金屬圖案層以形成層間電性連接,來簡化製造流程並因此減少製造成本,而不需形成孔洞之製程或電鍍通孔洞內部之製程。 Another object of the present invention is to provide a method of manufacturing a printed circuit board. The method can simplify the manufacturing process and thus reduce the manufacturing cost by directly connecting the pads to the metal pattern layer to form an interlayer electrical connection, without forming a hole process or a process of plating the inside of the hole.

根據達成本發明目的之一方面,提供一種印刷電路板之製造方法,此方法包括:形成載體於金屬層之一表面上;藉由形成第一光阻於金屬層之另一表面上,以提供第一接墊形成區域;移除載體;藉由形成圖案於金屬層上,以形成金屬圖案層;以及藉由形成第二光阻於已形成第一光阻之金屬圖案層之表面的相對表面上,以提供第二接墊形成區域。 According to an aspect of achieving the object of the present invention, a method of manufacturing a printed circuit board is provided, the method comprising: forming a carrier on a surface of a metal layer; and providing a first photoresist on the other surface of the metal layer to provide a first pad forming region; removing the carrier; forming a metal pattern layer by patterning on the metal layer; and forming an opposite surface of the surface of the metal pattern layer on which the first photoresist has been formed by forming the second photoresist Upper to provide a second pad forming region.

再者,印刷電路板之製造方法可以更包括:形成第一 接墊於第一接墊形成區域內;以及形成第二接墊於第二接墊形成區域內之步驟。 Furthermore, the manufacturing method of the printed circuit board may further include: forming the first a pad in the first pad forming region; and a step of forming a second pad in the second pad forming region.

而且,提供第一接墊形成區域之步驟可以包括:設置第一光阻於金屬層之另一表面;以及藉由移除第一光阻之一部份,來開口(open)出第一接墊形成區域。 Moreover, the step of providing the first pad forming region may include: disposing the first photoresist on the other surface of the metal layer; and opening the first interface by removing one of the first photoresist portions The pad forms an area.

此外,形成第二接墊形成區域之步驟可以包括:設置第二光阻於已形成第一光阻於金屬圖案層之表面的相對表面上;以及藉由移除第二光阻之一部份,來開口出第二接墊形成區域。 In addition, the step of forming the second pad forming region may include: disposing the second photoresist on the opposite surface on which the first photoresist is formed on the surface of the metal pattern layer; and removing one part of the second photoresist To open the second pad forming area.

另外,藉由形成圖案於金屬層上,以形成金屬圖案層之步驟包括:設置薄膜層於金屬層之一表面上;選擇性移除薄膜層;以及藉由移除於已移除薄膜層區域之金屬層來形成金屬圖案層。 In addition, the step of forming a metal pattern layer by forming a pattern on the metal layer comprises: providing a film layer on one surface of the metal layer; selectively removing the film layer; and removing the removed film layer region by removing The metal layer forms a metal pattern layer.

再者,選擇性移除薄膜層之步驟可以是選擇性曝光、顯影及剝離薄膜層。 Further, the step of selectively removing the film layer may be selective exposure, development, and stripping of the film layer.

另外,藉由於金屬層上形成圖案,以形成金屬圖案層之步驟可以包括:設置薄膜層於金屬層之一表面上;選擇性移除薄膜層;形成電鍍層於已移除薄膜層之區域;移除剩餘薄膜層;以及藉由移除對應於剩餘薄膜層之金屬層,以形成金屬圖案層。 In addition, the step of forming a metal pattern layer by forming a pattern on the metal layer may include: providing a film layer on one surface of the metal layer; selectively removing the film layer; forming a plating layer on a region of the removed film layer; Removing the remaining film layer; and forming a metal pattern layer by removing the metal layer corresponding to the remaining film layer.

以及,選擇性移除薄膜層之步驟可以是選擇性曝光、顯影及剝離薄膜層。 And, the step of selectively removing the film layer may be selective exposure, development, and stripping of the film layer.

在此,粗糙結構可以形成於第一光阻與金屬圖案層之連接表面上。 Here, the roughness may be formed on the connection surface of the first photoresist and the metal pattern layer.

再者,第一接墊可以是用以形成凸塊之凸塊形成接墊,以及第二接墊可以是用以嵌設電子元件之銲線接合接墊。 Furthermore, the first pad may be a bump forming pad for forming a bump, and the second pad may be a wire bonding pad for embedding the electronic component.

另外,第一光阻之厚度可以大於第二光阻之厚度。 In addition, the thickness of the first photoresist may be greater than the thickness of the second photoresist.

同時,根據達成本發明目的之另一方面,提供一種印刷電路板。印刷電路板包括:一金屬圖案層,其藉由形成圖案於金屬層上所形成;一光組,其設置於金屬圖案層上,以開口出接墊形成區域;以及一接墊,其形成於接墊形成區域內。 Meanwhile, according to another aspect of achieving the object of the present invention, a printed circuit board is provided. The printed circuit board includes: a metal pattern layer formed by patterning on the metal layer; a light group disposed on the metal pattern layer to open the pad formation region; and a pad formed on The pads are formed in the area.

在此,光阻可以包括第二光阻及第一光阻。第二光阻設置於金屬圖案層之一表面上,以開口出第二接墊形成區域;第一光阻設置於金屬圖案層之另一表面上,以開口出第一接墊形成區域。 Here, the photoresist may include a second photoresist and a first photoresist. The second photoresist is disposed on a surface of the metal pattern layer to open the second pad forming region; the first photoresist is disposed on the other surface of the metal pattern layer to open the first pad forming region.

以及,可藉由移除部分金屬層,以形成圖案來形成金屬圖案層。 And, the metal pattern layer can be formed by removing a portion of the metal layer to form a pattern.

再者,可以藉由移除部分金屬層以形成圖案,及藉由形成電鍍層於已形成圖案之金屬層上來形成金屬圖案層。 Furthermore, the metal pattern layer can be formed by removing a portion of the metal layer to form a pattern, and by forming a plating layer on the patterned metal layer.

另外,接墊可以包括第一接墊及第二接墊。第一接墊形成於第一接墊形成區域內;以及第二接墊形成於第二接墊形成區域內。 In addition, the pad may include a first pad and a second pad. The first pad is formed in the first pad forming region; and the second pad is formed in the second pad forming region.

在此,第一接墊可以是用以形成凸塊之凸塊形成接墊;第二接墊可以是用以嵌設電子元件之銲線接合接墊。 Here, the first pad may be a bump forming pad for forming a bump; and the second pad may be a wire bonding pad for embedding the electronic component.

再者,粗糙結構可以形成於該第一光阻與金屬圖案層之接合表面。 Furthermore, a roughness structure may be formed on the bonding surface of the first photoresist and the metal pattern layer.

另外,第一光阻之厚度可以大於第二光阻之厚度。 In addition, the thickness of the first photoresist may be greater than the thickness of the second photoresist.

在本發明說明書以及申請專利範圍中所用的字詞,不應以限定於其通常意義或字典中之定義的方式進行解釋,而應基於發明者可適當定義術語之概念來以最佳方式描述其發明的法則,解釋為具有關於本發明技術領域之意義及概念。 Words used in the description of the present invention and in the scope of the claims should not be construed as being limited to their ordinary meaning or definition in the dictionary, but should be described in an optimal manner based on the concept that the inventor can appropriately define the term. The laws of the invention are to be construed as having meaning and concepts related to the technical field of the invention.

然而,本發明之圖示及實施例中所繪示之結構係為最佳實施例之範例,但非代表本發明之所有技術精神。因此,本發明應視為包含各種均等及更動。 However, the structures illustrated in the drawings and the embodiments of the present invention are examples of the preferred embodiments, but do not represent all the technical spirit of the present invention. Accordingly, the invention is considered to include various equivalents and modifications.

以下,本發明之實施例配合所附圖示做更詳細之描述。 Hereinafter, embodiments of the present invention will be described in more detail in conjunction with the accompanying drawings.

第1圖繪示依據本發明之一實施例之印刷電路板的剖面圖。 1 is a cross-sectional view of a printed circuit board in accordance with an embodiment of the present invention.

如第1圖所繪示,印刷電路板100包括一金屬圖案層120、一光阻140及一接墊160。 As shown in FIG. 1 , the printed circuit board 100 includes a metal pattern layer 120 , a photoresist 140 , and a pad 160 .

金屬圖案層120係藉由於圖案於金屬層122上以形成圖案所形成。金屬圖案層120可以是由金屬材料製成,例如是銅(Cu)、銀(Ag)、金(Au)、鋁(Al)、鐵(Fe)、鈦(Ti)、錫(Sn)、鎳(Ni)或鉬(Mo)。 The metal pattern layer 120 is formed by patterning on the metal layer 122 to form a pattern. The metal pattern layer 120 may be made of a metal material such as copper (Cu), silver (Ag), gold (Au), aluminum (Al), iron (Fe), titanium (Ti), tin (Sn), nickel. (Ni) or molybdenum (Mo).

金屬圖案層120可以具有由移除金屬層122之一部份而形成之圖案,其厚度依據電路形成之困難度可以有所不同。一般來說,金屬圖案層120之厚度可以是2微米、3 微米、5微米、12微米、18微米等,但可變化而不受其限制。 The metal pattern layer 120 may have a pattern formed by removing a portion of the metal layer 122, the thickness of which may vary depending on the difficulty in circuit formation. Generally, the thickness of the metal pattern layer 120 can be 2 microns, 3 Micron, 5 micron, 12 micron, 18 micron, etc., but may vary without being limited thereto.

此時,如第1圖中印刷電路板之結構僅係為一範例,並可應用於各種印刷電路板,且以下所描述本發明之技術特徵可以同樣地被應用。 At this time, the structure of the printed circuit board as shown in Fig. 1 is merely an example and can be applied to various printed circuit boards, and the technical features of the present invention described below can be equally applied.

光阻140設置於金屬圖案層120上以開口出一接墊形成區域,且光組140可以由第二光阻144及第一光阻142組成。第二光阻144設置於金屬圖案層120之一表面上以開口出一第二接墊形成區域B,第一光阻142設置於金屬圖案層120之另一表面上以開口出一第一接墊形成區域A。 The photoresist 140 is disposed on the metal pattern layer 120 to open a pad formation region, and the light group 140 may be composed of the second photoresist 144 and the first photoresist 142. The second photoresist 144 is disposed on a surface of the metal pattern layer 120 to open a second pad forming region B. The first photoresist 142 is disposed on the other surface of the metal pattern layer 120 to open a first connection. The pad forms area A.

再者,一粗糙結構可以形成於第一光阻142與金屬圖案層120之接合表面,來加強金屬圖案層120及光阻140間之黏合。 Furthermore, a rough structure may be formed on the bonding surface of the first photoresist 142 and the metal pattern layer 120 to strengthen the adhesion between the metal pattern layer 120 and the photoresist 140.

光阻140通常可以是光固化/熱固化樹脂,通常是防焊材料。 The photoresist 140 can typically be a photocurable/thermosetting resin, typically a solder resist material.

在此,防焊材料是一種絕緣性永久塗佈材料,當設置電子元件進行焊接時,防焊材料覆蓋金屬圖案層120以避免不必要之連接。再者,防焊材料也稱為防焊遮罩,防焊材料覆蓋金屬圖案層120且屏蔽除了需要用以焊接電子元件之接墊以外之區域。防焊材料避免了印刷電路板之短路、腐蝕及汙染,並停留於基板上作為薄膜。甚至於印刷電路板製造後,防焊材料可扮演保護線路免於受外部撞擊、潮濕及化學反應之角色。 Here, the solder resist material is an insulating permanent coating material, and when the electronic component is provided for soldering, the solder resist material covers the metal pattern layer 120 to avoid unnecessary connection. Further, the solder resist material is also referred to as a solder mask, and the solder resist material covers the metal pattern layer 120 and shields regions other than the pads for soldering electronic components. The solder resist material avoids short circuit, corrosion and contamination of the printed circuit board and stays on the substrate as a film. Even after the printed circuit board is manufactured, the solder resist material acts as a protection circuit from external impact, moisture and chemical reactions.

接墊160形成於接墊形成區域。接墊160可以由第一 接墊162及第二接墊164所組成。第一接墊162形成於第一接墊形成區域A內,第二接墊164形成於第二接墊形成區域B內。 The pad 160 is formed in the pad forming region. Pad 160 can be made by the first The pad 162 and the second pad 164 are composed of a pad. The first pad 162 is formed in the first pad forming region A, and the second pad 164 is formed in the second pad forming region B.

此時,第一接墊162係為凸塊形成接墊,凸塊形成接墊用以形成凸塊,第二接墊164係為銲線接合接墊,線路接合接墊用以設置電子元件。對此,第一光阻142之厚度可以大於第二光阻144之厚度。 At this time, the first pad 162 is a bump forming pad, the bump forming pad is used to form a bump, the second pad 164 is a wire bonding pad, and the line bonding pad is used to set the electronic component. In this regard, the thickness of the first photoresist 142 may be greater than the thickness of the second photoresist 144.

也就是說,由於凸塊形成於第一接墊162上,第一光阻144之厚度可以對應於凸塊之尺寸、厚度及面積來增加,且相對地大於用以接合一銲線之第二接墊的第二光阻144。若凸塊係為焊球,根據焊球之直徑,第一光阻142可以具有從最小5微米到最大50微米之不同厚度。 That is, since the bump is formed on the first pad 162, the thickness of the first photoresist 144 may increase corresponding to the size, thickness and area of the bump, and is relatively larger than the second for bonding a bonding wire. The second photoresist 144 of the pad. If the bumps are solder balls, the first photoresist 142 may have a different thickness from a minimum of 5 microns to a maximum of 50 microns, depending on the diameter of the solder balls.

如此,由於光阻之厚度可根據形成於接墊上之凸塊類型來調整,而使接墊及凸塊間的附著穩定,並提供可靠之印刷電路板。 Thus, since the thickness of the photoresist can be adjusted according to the type of bump formed on the pad, the adhesion between the pads and the bumps is stabilized, and a reliable printed circuit board is provided.

最後,依據本發明實施例之印刷電路板提供一種不需通孔而直接以接墊連接至金屬圖案層之結構,使得應用於單層之印刷電路板能夠達成薄且高密度之效果。 Finally, the printed circuit board according to the embodiment of the present invention provides a structure in which a metal pad layer is directly connected by a pad without a via hole, so that a printed circuit board applied to a single layer can achieve a thin and high density effect.

第2圖繪示依據本發明另一實施例之印刷電路板的剖面圖。 2 is a cross-sectional view of a printed circuit board in accordance with another embodiment of the present invention.

在此,除了金屬圖案層以外,本發明之另一實施例具有如上述實施例之印刷電路板相同的技術特徵,並採用相同的標號。 Here, in addition to the metal pattern layer, another embodiment of the present invention has the same technical features as the printed circuit board of the above embodiment, and the same reference numerals are used.

如第2圖中所繪示,印刷電路板100包括一金屬圖案 層120、一光阻140及一接墊160。 As shown in FIG. 2, the printed circuit board 100 includes a metal pattern The layer 120, a photoresist 140 and a pad 160.

藉由移除金屬層122之一部份以形成一圖案,並形成電鍍層124於該圖案上之金屬層122上,以形成金屬圖案層120。在此,依據本發明另一實施例之金屬層122可以是一薄膜,而具有比本實施例之金屬層122更小之厚度。 A pattern is formed by removing a portion of the metal layer 122, and a plating layer 124 is formed on the metal layer 122 on the pattern to form the metal pattern layer 120. Here, the metal layer 122 according to another embodiment of the present invention may be a thin film having a smaller thickness than the metal layer 122 of the present embodiment.

金屬圖案層120可以是由金屬材料所製成,例如是銅、銀、金、鋁、鐵、鈦、錫、鎳或鉬。 The metal pattern layer 120 may be made of a metal material such as copper, silver, gold, aluminum, iron, titanium, tin, nickel or molybdenum.

光阻140設置於金屬圖案層120上以開口出一接墊形成區域,且可由第二光阻144及第一光阻142所組成。第二光阻144設置於金屬圖案層120之一表面上以開口出一第二接墊形成區域B,第一光阻142設置於金屬圖案層120之另一表面上以開口出一第一接墊形成區域A。 The photoresist 140 is disposed on the metal pattern layer 120 to open a pad formation region, and may be composed of the second photoresist 144 and the first photoresist 142. The second photoresist 144 is disposed on a surface of the metal pattern layer 120 to open a second pad forming region B. The first photoresist 142 is disposed on the other surface of the metal pattern layer 120 to open a first connection. The pad forms area A.

再者,一粗糙結構可以形成於第一光阻142與金屬圖案層120之接合表面,來加強金屬圖案層120及光阻140間之黏合。 Furthermore, a rough structure may be formed on the bonding surface of the first photoresist 142 and the metal pattern layer 120 to strengthen the adhesion between the metal pattern layer 120 and the photoresist 140.

接墊160形成於接墊形成區域。接墊160可以由第一接墊162及第二接墊164所組成。第一接墊162形成於第一接墊形成區域A內,第二接墊164形成於第二接墊形成區域B內。 The pad 160 is formed in the pad forming region. The pad 160 may be composed of a first pad 162 and a second pad 164. The first pad 162 is formed in the first pad forming region A, and the second pad 164 is formed in the second pad forming region B.

此時,第一接墊162係為凸塊形成接墊,凸塊形成接墊用以形成凸塊,第二接墊164係為銲線接合接墊,銲線接合接墊用以設置電子元件。對此,第一光阻142之厚度可以大於第二光阻144之厚度。 At this time, the first pad 162 is a bump forming pad, the bump forming pad is used to form a bump, the second pad 164 is a wire bonding pad, and the wire bonding pad is used for setting the electronic component. . In this regard, the thickness of the first photoresist 142 may be greater than the thickness of the second photoresist 144.

也就是說,由於凸塊形成於第一接墊162上,第一光 阻144之厚度可以對應於凸塊之尺寸、厚度及面積來增加,且相對地大於用以接合一銲線之第二接墊的第二光阻144。若凸塊係為焊球,根據焊球之直徑,第一光阻142可以具有從最小5微米到最大50微米之不同厚度。 That is, since the bump is formed on the first pad 162, the first light The thickness of the resistor 144 may increase corresponding to the size, thickness, and area of the bump, and is relatively larger than the second photoresist 144 of the second pad for bonding a bonding wire. If the bumps are solder balls, the first photoresist 142 may have a different thickness from a minimum of 5 microns to a maximum of 50 microns, depending on the diameter of the solder balls.

以下,依據本發明實施例之一印刷電路板之製造流程將被說明。 Hereinafter, a manufacturing process of a printed circuit board according to an embodiment of the present invention will be described.

第3~11圖係為依據本發明實施例之印刷電路板的製造方法的剖面圖。 3 to 11 are cross-sectional views showing a method of manufacturing a printed circuit board according to an embodiment of the present invention.

如第3圖所繪示,載體110形成於金屬層122之一表面上。此時,金屬層122用以支撐印刷電路板100。金屬層122可以由金屬材料所製成,例如是銅、銀、金、鋁、鐵、鈦、錫、鎳或鉬。 As shown in FIG. 3, the carrier 110 is formed on one surface of the metal layer 122. At this time, the metal layer 122 is used to support the printed circuit board 100. The metal layer 122 may be made of a metal material such as copper, silver, gold, aluminum, iron, titanium, tin, nickel or molybdenum.

再者,可以使用濺鍍、黏合及電鍍之任何一種方法將金屬層122設置於載體110上。 Further, the metal layer 122 may be disposed on the carrier 110 by any of sputtering, bonding, and electroplating.

在此,濺鍍方法係為黏合薄膜於物體表面之一種技術。濺鍍可以藉由於高真空環境中蒸鍍固體來形成薄膜或厚膜,以形成電子電路於陶磁基板或半導體基板。 Here, the sputtering method is a technique of bonding a film to the surface of an object. Sputtering can form a thin film or a thick film by evaporating solids in a high vacuum environment to form an electronic circuit on a ceramic substrate or a semiconductor substrate.

更特別地是,濺射方法也稱之為濺射沉積,並可以藉由原子、薄膜材料來形成薄膜於物體表面。也就是說,游離原子(氬)被電場加速而撞擊薄膜材料時,薄膜材料之原子會藉由碰撞而彈出並黏合於物體表面以形成薄膜。除了濺射沉積外,也可以使用不同方法來形成金屬層,例如使用蒸鍍薄膜沉積。為了沉積金屬層,蒸鍍薄膜沉積使用電子束或電子燈絲於高真空(5x10-5~1x10-7托耳)環境 中加熱船型容器,以融化船型容器內之金屬,並蒸鍍金屬。此時,已蒸鍍之金屬被壓縮於物體之冷表面上以形成薄膜。 More specifically, the sputtering method is also referred to as sputter deposition, and the film can be formed on the surface of the object by atomic or thin film materials. That is to say, when the free atom (argon) is accelerated by the electric field to strike the film material, the atoms of the film material are ejected by the collision and adhered to the surface of the object to form a film. In addition to sputter deposition, different methods can be used to form the metal layer, for example using an evaporated film deposition. In order to deposit a metal layer, the deposited film is deposited using an electron beam or an electronic filament in a high vacuum (5x10-5~1x10-7 Torr) environment. The vessel is heated to melt the metal in the vessel and to evaporate the metal. At this time, the vapor-deposited metal is compressed on the cold surface of the object to form a film.

再者,黏合方法係為黏合金屬層122之方法,例如是黏合銅箔於載體110。電鍍方法係為使用熱浸鍍或電鍍來塗佈金屬於載體110上之方法。 Furthermore, the bonding method is a method of bonding the metal layer 122, for example, bonding a copper foil to the carrier 110. The plating method is a method of coating metal on the carrier 110 using hot dip plating or electroplating.

金屬層122之厚度可以根據電路形成之困難度而有所不同。一般來說,金屬層122之厚度可以是2微米、3微米、5微米、12微米、18微米等,但可變化且不受其限制。 The thickness of the metal layer 122 may vary depending on the difficulty in circuit formation. In general, the thickness of the metal layer 122 can be 2 microns, 3 microns, 5 microns, 12 microns, 18 microns, etc., but can vary and is not limited thereto.

以及,載體110可以是由金屬材料製成,且其厚度可通常約為20微米至50微米。 Also, the carrier 110 may be made of a metal material and may have a thickness of usually about 20 to 50 micrometers.

接著,第一光阻142係形成於金屬層122之另一表面上以提供第一接墊形成區域A。更特別地是,在第4圖及第5圖中,第一光阻142設置於金屬層122之另一表面上,且第一光阻142之一部份被移除,以開口出第一接墊形成區域A。曝光、顯影及剝離製程用來移除第一光阻142之一部份。 Next, a first photoresist 142 is formed on the other surface of the metal layer 122 to provide a first pad formation region A. More specifically, in FIGS. 4 and 5, the first photoresist 142 is disposed on the other surface of the metal layer 122, and a portion of the first photoresist 142 is removed to open the first The pad forms area A. The exposure, development, and lift-off processes are used to remove a portion of the first photoresist 142.

再者,第一光阻142之一部份可以使用不同雷射來移除,例如是紫外線雷射(UV laser)或二氧化碳雷射(CO2 laser)。 Furthermore, a portion of the first photoresist 142 can be removed using different lasers, such as a UV laser or a CO 2 laser.

接著,如第6圖所示,移除載體110。 Next, as shown in Fig. 6, the carrier 110 is removed.

然後,如第7圖所示,薄膜層130設置於金屬層122之一表面並選擇性地被移除。在此,可以使用曝光、顯影 及剝離製程來選擇性移除薄膜層130,也可以使用不同雷射,例如是紫外線雷射或二氧化碳雷射。 Then, as shown in FIG. 7, the film layer 130 is disposed on one surface of the metal layer 122 and is selectively removed. Here, exposure and development can be used And a stripping process to selectively remove the film layer 130, and different lasers, such as ultraviolet lasers or carbon dioxide lasers, may also be used.

再者,薄膜層130可以由不同光敏感材料製成,例如是光阻材料、光防焊材料及乾膜材料,且上述材料可以被不同材料替換而不受限於上述材料。 Furthermore, the film layer 130 may be made of different light sensitive materials, such as photoresist materials, photo solder resist materials, and dry film materials, and the materials may be replaced by different materials without being limited by the above materials.

此外,如第8圖及第9圖所示,藉由移除於薄膜層130已移除之區域之金屬層122以形成金屬圖案層120,並移除薄膜層130。 Further, as shown in FIGS. 8 and 9, the metal pattern layer 120 is removed by removing the metal layer 122 in the removed region of the film layer 130, and the film layer 130 is removed.

然後,如第10圖所示,第二光阻144形成於已移除薄膜層130之金屬圖案層120上以提供第二接墊形成區域B。在此,第二光阻144設置於金屬圖案層120上,並移除第二光阻144之一部份,以開口出第二接墊形成區域B。 Then, as shown in FIG. 10, a second photoresist 144 is formed on the metal pattern layer 120 of the removed film layer 130 to provide a second pad formation region B. Here, the second photoresist 144 is disposed on the metal pattern layer 120 and removes a portion of the second photoresist 144 to open the second pad forming region B.

接著,如第11圖所示,第一接墊162形成於第一接墊形成區域A上,且第二接墊164形成於第二接墊形成區域B上。在此,第一接墊162係為凸塊形成接墊,其用以形成凸塊,第二接墊164係為銲線接合接墊,其用以嵌設電子元件。在此,第一光阻142之厚度可以大於第二光阻144之厚度。 Next, as shown in FIG. 11, the first pad 162 is formed on the first pad forming region A, and the second pad 164 is formed on the second pad forming region B. Here, the first pads 162 are bump forming pads for forming bumps, and the second pads 164 are wire bonding pads for embedding electronic components. Here, the thickness of the first photoresist 142 may be greater than the thickness of the second photoresist 144.

也就是說,由於凸塊形成於第一接墊162上,第一光阻144之厚度可以對應於凸塊之尺寸、厚度及面積來增加,且相對地大於用以焊接銲線之第二接墊的第二光阻144。若凸塊係為焊球,根據焊球之直徑,第一光阻142可有從最小5微米到最大50微米之不同厚度。 That is, since the bump is formed on the first pad 162, the thickness of the first photoresist 144 may increase corresponding to the size, thickness and area of the bump, and is relatively larger than the second connection for soldering the bonding wire. The second photoresist 144 of the pad. If the bumps are solder balls, the first photoresist 142 may have a different thickness from a minimum of 5 microns to a maximum of 50 microns depending on the diameter of the solder balls.

如此,由於光阻之厚度可以根據形成於接墊上之凸塊 的類型來調整,而使接墊及凸塊間的附著穩定,並且提供可靠之印刷電路板。 Thus, since the thickness of the photoresist can be based on the bumps formed on the pads The type is adjusted to stabilize the adhesion between the pads and the bumps and to provide a reliable printed circuit board.

以下,將描述依據本發明之另一實施例之印刷電路板的製造流程。 Hereinafter, a manufacturing flow of a printed circuit board according to another embodiment of the present invention will be described.

第12~20圖繪示依據本發明另一實施例之印刷電路板之製造流程的剖面圖。 12 to 20 are cross-sectional views showing a manufacturing process of a printed circuit board according to another embodiment of the present invention.

在此,本發明之另一實施例具有如上述實施例之印刷電路板之製造方法相同的技術特徵,並採用相同的標號。 Here, another embodiment of the present invention has the same technical features as the manufacturing method of the printed circuit board of the above embodiment, and the same reference numerals are used.

如第12圖所示,設置載體110於金屬層122之一表面上。此時,支撐印刷電路板100之金屬層122可以是由金屬材料製成,例如是銅、銀、金、鋁、鐵、鈦、錫、鎳或鉬。 As shown in FIG. 12, the carrier 110 is disposed on one surface of the metal layer 122. At this time, the metal layer 122 supporting the printed circuit board 100 may be made of a metal material such as copper, silver, gold, aluminum, iron, titanium, tin, nickel or molybdenum.

此時,根據本發明另一實施例之金屬層122係為一薄膜型態,而具有較本發明實施例之金屬層122更小之厚度。 At this time, the metal layer 122 according to another embodiment of the present invention is in a thin film type and has a smaller thickness than the metal layer 122 of the embodiment of the present invention.

再者,可以使用濺射、黏合及電鍍方法中任何一種方式來設置金屬層122於載體110上。 Further, the metal layer 122 may be disposed on the carrier 110 using any of sputtering, bonding, and plating methods.

在此,濺鍍方法係為黏合薄膜於物體表面之一種技術。濺鍍可以藉由於高真空環境中蒸鍍固體來形成薄膜或厚膜,以形成電子電路於陶磁基板或半導體基板。 Here, the sputtering method is a technique of bonding a film to the surface of an object. Sputtering can form a thin film or a thick film by evaporating solids in a high vacuum environment to form an electronic circuit on a ceramic substrate or a semiconductor substrate.

再者,黏合方法係為黏合金屬層122之方法,例如是黏合銅箔於載體110。電鍍方法係為使用熱浸鍍或電鍍來塗佈金屬於載體110上之方法。 Furthermore, the bonding method is a method of bonding the metal layer 122, for example, bonding a copper foil to the carrier 110. The plating method is a method of coating metal on the carrier 110 using hot dip plating or electroplating.

金屬層122之厚度可根據電路形成之困難度而有所不同。一般來說,薄膜型態之金屬層122可具有較本發明 實施例之金屬層122更小之厚度。 The thickness of the metal layer 122 may vary depending on the difficulty in circuit formation. In general, the thin film type metal layer 122 can have the present invention. The metal layer 122 of the embodiment has a smaller thickness.

以及,載體110可以是由金屬材料製成,且其厚度可以通常約為20微米至50微米。 Also, the carrier 110 may be made of a metal material and may have a thickness of usually about 20 to 50 μm.

接著,第一光阻142係形成於金屬層122之另一表面上,以提供第一接墊形成區域A。更特別地是,如第13圖及第14圖所示,第一光阻142設置於金屬層122之另一表面上,且移除第一光阻142之一部份,以開口出第一接墊形成區域A。曝光、顯影及剝離製程用來移除第一光阻142之一部份。 Next, a first photoresist 142 is formed on the other surface of the metal layer 122 to provide a first pad formation region A. More specifically, as shown in FIG. 13 and FIG. 14 , the first photoresist 142 is disposed on the other surface of the metal layer 122 and removes a portion of the first photoresist 142 to open the first portion. The pad forms area A. The exposure, development, and lift-off processes are used to remove a portion of the first photoresist 142.

再者,第一光阻142之一部份可以使用不同雷射來移除,例如是紫外線雷射(UV laser)或二氧化碳雷射(CO2 laser)。 Furthermore, a portion of the first photoresist 142 can be removed using different lasers, such as a UV laser or a CO 2 laser.

接著,如第15圖所示,移除載體110。 Next, as shown in Fig. 15, the carrier 110 is removed.

然後,如第16圖所示,薄膜層130設置於金屬層122之一表面,並移除薄膜層130之一部份。此時,曝光、顯影及剝離製程可以用來移除薄膜層130之一部份,且可使用不同雷射,例如是紫外線雷射或二氧化碳雷射。 Then, as shown in FIG. 16, the film layer 130 is disposed on one surface of the metal layer 122, and a portion of the film layer 130 is removed. At this point, the exposure, development, and lift-off processes can be used to remove a portion of the film layer 130, and different lasers can be used, such as ultraviolet lasers or carbon dioxide lasers.

再者,薄膜層130可以由不同光敏感材料製成,例如是光阻材料、光防焊材料及乾膜材料,且上述材料可以被不同材料替換而不受限於上述材料。 Furthermore, the film layer 130 may be made of different light sensitive materials, such as photoresist materials, photo solder resist materials, and dry film materials, and the materials may be replaced by different materials without being limited by the above materials.

以及,如第17圖及第18圖所示,藉由形成電鍍層124於薄膜層130已移除之區域且移除剩餘薄膜層130及對應於剩餘薄膜層130區域之金屬層122(也就是說,位於剩餘薄膜層130之下的金屬層122及薄膜層130被移 除),來形成金屬圖案層120。 And, as shown in FIGS. 17 and 18, by forming a plating layer 124 on the removed region of the thin film layer 130 and removing the remaining thin film layer 130 and the metal layer 122 corresponding to the remaining thin film layer 130 region (ie, It is said that the metal layer 122 and the film layer 130 under the remaining film layer 130 are moved. In addition, a metal pattern layer 120 is formed.

然後,如第19圖所示,第二光阻144形成於已移除薄膜層130之金屬圖案層120上,以提供第二接墊形成區域B。對此,第二光阻144設置於已移除薄膜層130之金屬圖案層120上,並移除第二光阻144之一部份,以開口出第二接墊形成區域B。 Then, as shown in FIG. 19, a second photoresist 144 is formed on the metal pattern layer 120 of the removed film layer 130 to provide a second pad forming region B. In this regard, the second photoresist 144 is disposed on the metal pattern layer 120 of the removed film layer 130, and a portion of the second photoresist 144 is removed to open the second pad forming region B.

接著,如第20圖所示,第一接墊162形成於第一接墊形成區域A上,第二接墊164形成於第二接墊形成區域B上。在此,第一接墊162係為凸塊形成接墊,其用以形成凸塊,第二接墊164係為銲線接合接墊,其用以嵌設電子元件。對此,第一光阻142之厚度可以大於第二光阻144之厚度。 Next, as shown in FIG. 20, the first pad 162 is formed on the first pad forming region A, and the second pad 164 is formed on the second pad forming region B. Here, the first pads 162 are bump forming pads for forming bumps, and the second pads 164 are wire bonding pads for embedding electronic components. In this regard, the thickness of the first photoresist 142 may be greater than the thickness of the second photoresist 144.

也就是說,由於凸塊形成於第一接墊162上,第一光阻144之厚度可以對應於凸塊之尺寸、厚度及面積來增加,且相對地大於用以接合一銲線之第二接墊的第二光阻144。若凸塊係為焊球,根據焊球之直徑,第一光阻142可以具有從最小5微米到最大50微米之不同厚度。 That is, since the bump is formed on the first pad 162, the thickness of the first photoresist 144 may increase corresponding to the size, thickness and area of the bump, and is relatively larger than the second for bonding a bonding wire. The second photoresist 144 of the pad. If the bumps are solder balls, the first photoresist 142 may have a different thickness from a minimum of 5 microns to a maximum of 50 microns, depending on the diameter of the solder balls.

同時,關於本發明製造印刷電路板之方法可以應用於減去方法(subtractive method)、附加方法(additive method)、掩蔽方法(tenting method)及半加成方法(semi-additive method)。 Meanwhile, the method of manufacturing a printed circuit board according to the present invention can be applied to a subtractive method, an additive method, a tenting method, and a semi-additive method.

最後,根據本發明之印刷電路板之製造方法可以簡化製造流程,且藉由直接連接接墊與金屬層以作為層間電性連接,而不採用形成孔洞或電鍍孔洞內部之製程,而減少 製造成本。 Finally, the manufacturing method of the printed circuit board according to the present invention can simplify the manufacturing process, and reduce the manufacturing process by directly connecting the pads and the metal layer, instead of forming a hole or plating the inside of the hole, thereby reducing the process. manufacturing cost.

如上所述,根據本發明實施例中之印刷電路板及印刷電路板之製造方法,其藉由直接連接接墊與金屬圖案層,以作為層間電性連接,而不採用通孔之方式,使得基板能夠高密度且薄。也就是說,由於至少二層之傳統印刷電路板可以被作為單層結構,而能夠實現高密度之層間電性連接。 As described above, according to the manufacturing method of the printed circuit board and the printed circuit board in the embodiment of the present invention, the connection pad and the metal pattern layer are directly connected to be electrically connected between the layers without using a through hole. The substrate can be high density and thin. That is to say, since at least two layers of the conventional printed circuit board can be used as a single layer structure, high-density interlayer electrical connection can be realized.

再者,這也能夠將印刷電路板之訊號損失降至最低,並改善訊號傳輸速度。 Furthermore, this also minimizes signal loss on the printed circuit board and improves signal transmission speed.

以及,由於不需形成孔洞或電鍍孔洞內部之製程,而能夠簡化製造流程,且因此減少製造成本。 And, since it is not necessary to form a hole or a process of plating the inside of the hole, the manufacturing process can be simplified, and thus the manufacturing cost can be reduced.

再者,藉由使用光固化/熱固化樹脂能夠替換物理製程。 Furthermore, the physical process can be replaced by using a photocurable/thermosetting resin.

因此,這能夠確保印刷電路板全部產品之可靠度。 Therefore, this ensures the reliability of all printed circuit boards.

綜上所述,雖然本發明已以較佳實施例揭露如上,然其並非用以限定本發明。本發明所屬技術領域中具有通常知識者,在不脫離本發明之精神和範圍內,當可作各種之更動與潤飾。因此,本發明之保護範圍當視後附之申請專利範圍所界定者為準。 In conclusion, the present invention has been disclosed in the above preferred embodiments, and is not intended to limit the present invention. A person skilled in the art can make various changes and modifications without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.

100‧‧‧印刷電路板 100‧‧‧Printed circuit board

110‧‧‧載體 110‧‧‧ Carrier

120‧‧‧金屬圖案層 120‧‧‧metal pattern layer

122‧‧‧金屬層 122‧‧‧metal layer

124‧‧‧電鍍層 124‧‧‧Electroplating

130‧‧‧薄膜層 130‧‧‧film layer

140‧‧‧光阻 140‧‧‧Light resistance

142‧‧‧第一光阻 142‧‧‧First photoresist

144‧‧‧第二光阻 144‧‧‧second photoresist

160‧‧‧接墊 160‧‧‧ pads

162‧‧‧第一接墊 162‧‧‧first mat

164‧‧‧第二接墊 164‧‧‧second mat

A‧‧‧第一接墊形成區域 A‧‧‧First pad forming area

B‧‧‧第二接墊形成區域 B‧‧‧Second pad forming area

從以下實施例之描述並結合所圖示,本發明概念之這些及/或其他方面及優點將更清楚且易於理解。 These and/or other aspects and advantages of the present invention will be more apparent and understood from the description of the appended claims.

第1圖繪示依據本發明實施例之印刷電路板之剖面 圖。 1 is a cross section of a printed circuit board according to an embodiment of the present invention. Figure.

第2圖繪示依據本發明另一實施例之印刷電路板之剖面圖。 2 is a cross-sectional view of a printed circuit board in accordance with another embodiment of the present invention.

第3~11圖繪示依據本發明實施例之製造印刷電路板之流程圖,其中第3圖繪示載體設置於金屬層之表面上之狀態的剖面圖。 3 to 11 are flow charts showing the manufacture of a printed circuit board according to an embodiment of the present invention, wherein FIG. 3 is a cross-sectional view showing a state in which the carrier is disposed on the surface of the metal layer.

第4圖繪示第一光阻設置於金屬層之另一表面上之狀態的剖面圖。 4 is a cross-sectional view showing a state in which the first photoresist is disposed on the other surface of the metal layer.

第5圖繪示第一接墊形成區域開口於第一光阻內之剖面圖。 FIG. 5 is a cross-sectional view showing the first pad forming region being opened in the first photoresist.

第6圖繪示移除載體之狀態之剖面圖。 Figure 6 is a cross-sectional view showing the state in which the carrier is removed.

第7圖繪示設置於金屬層表面上之部分被移除的薄膜層之狀態的剖面圖。 Fig. 7 is a cross-sectional view showing a state in which a portion of the thin film layer which is disposed on the surface of the metal layer is removed.

第8圖繪示藉由移除薄膜層已被移除區域之金屬層以形成金屬圖案層之狀態的剖面圖。 Fig. 8 is a cross-sectional view showing a state in which a metal layer of a region where a film layer has been removed is removed to form a metal pattern layer.

第9圖繪示已移除薄膜層之狀態的剖面圖。 Figure 9 is a cross-sectional view showing the state in which the film layer has been removed.

第10圖繪示第二光阻設置於第一光阻已形成之金屬圖案層之表面的相對表面上之狀態的剖面圖。 FIG. 10 is a cross-sectional view showing a state in which the second photoresist is disposed on the opposite surface of the surface of the metal pattern layer on which the first photoresist has been formed.

第11圖繪示第一接墊及第二接墊形成於第一接墊形成區域及第二接墊形成區域內之狀態的剖面圖。 11 is a cross-sectional view showing a state in which the first pads and the second pads are formed in the first pad forming region and the second pad forming region.

第12~20圖繪示依據本發明之另一實施例之製造印刷電路板之流程剖面圖。其中第12圖繪示載體設置於金屬層表面之狀態的剖面 圖。 12 to 20 are cross-sectional views showing the process of manufacturing a printed circuit board according to another embodiment of the present invention. FIG. 12 is a cross-sectional view showing a state in which the carrier is disposed on the surface of the metal layer. Figure.

第13圖繪示第一光阻設置於金屬層另一表面之狀態的剖面圖。 Figure 13 is a cross-sectional view showing a state in which the first photoresist is disposed on the other surface of the metal layer.

第14圖繪示第一接墊形成區域開口於第一光阻內。 FIG. 14 illustrates that the first pad forming region is opened in the first photoresist.

第15圖繪示已移除薄膜層之狀態的剖面圖。 Figure 15 is a cross-sectional view showing the state in which the film layer has been removed.

第16圖繪示部分被移除之薄膜層設置於金屬層表面之狀態的剖面圖。 Figure 16 is a cross-sectional view showing a state in which a portion of the removed film layer is disposed on the surface of the metal layer.

第17圖繪示電鍍層形成於該薄膜層已移除之區域之狀態的剖面圖。 Figure 17 is a cross-sectional view showing a state in which a plating layer is formed in a region where the film layer has been removed.

第18圖繪示藉由移除剩餘薄膜層及對應於剩餘薄膜層之金屬層以形成金屬圖案層之狀態的剖面圖。 Figure 18 is a cross-sectional view showing a state in which a metal pattern layer is formed by removing a remaining thin film layer and a metal layer corresponding to the remaining thin film layer.

第19圖繪示第二光阻設置於第一光阻形成於金屬圖案層之表面的相對表面上之狀態的剖面圖。 Figure 19 is a cross-sectional view showing a state in which the second photoresist is disposed on the opposite surface of the surface of the metal pattern layer.

第20圖繪示第一接墊及第二接墊形成於第一接墊形成區域及第二接墊形成區域內之狀態的剖面圖。 FIG. 20 is a cross-sectional view showing a state in which the first pad and the second pad are formed in the first pad forming region and the second pad forming region.

100‧‧‧印刷電路板 100‧‧‧Printed circuit board

120‧‧‧金屬圖案層 120‧‧‧metal pattern layer

122‧‧‧金屬層 122‧‧‧metal layer

124‧‧‧電鍍層 124‧‧‧Electroplating

140‧‧‧光阻 140‧‧‧Light resistance

142‧‧‧第一光阻 142‧‧‧First photoresist

144‧‧‧第二光阻 144‧‧‧second photoresist

160‧‧‧接墊 160‧‧‧ pads

162‧‧‧第一接墊 162‧‧‧first mat

164‧‧‧第二接墊 164‧‧‧second mat

A‧‧‧第一接墊形成區域 A‧‧‧First pad forming area

B‧‧‧第二接墊形成區域 B‧‧‧Second pad forming area

Claims (21)

一種印刷電路板之製造方法,包括:形成一載體於一金屬層之一表面上;藉由形成一第一光阻於該金屬層之另一表面上,以提供一第一接墊形成區域;移除該載體;藉由形成一圖案於該金屬層上,以形成一金屬圖案層;以及藉由形成一第二光阻於該金屬圖案層之該另一表面的相對表面上,以提供一第二接墊形成區域,該第一光阻形成於該金屬圖案層之該另一表面上。 A method of manufacturing a printed circuit board, comprising: forming a carrier on a surface of a metal layer; forming a first pad forming region by forming a first photoresist on the other surface of the metal layer; Removing the carrier; forming a metal pattern layer by forming a pattern on the metal layer; and providing a second photoresist on the opposite surface of the other surface of the metal pattern layer to provide a a second pad forming region, the first photoresist being formed on the other surface of the metal pattern layer. 如申請專利範圍第1項所述之印刷電路板之製造方法,更包括:形成一第一接墊於該第一接墊形成區域內;以及形成一第二接墊於該第二接墊形成區域內。 The method for manufacturing a printed circuit board according to claim 1, further comprising: forming a first pad in the first pad forming region; and forming a second pad to form the second pad. within the area. 如申請專利範圍第1項所述之印刷電路板之製造方法,其中提供該第一接墊形成區域之步驟包括:設置該第一光阻於該金屬層之該另一表面上;以及藉由移除該第一光阻之一部份,以打開該第一接墊形成區域。 The method of manufacturing a printed circuit board according to claim 1, wherein the step of providing the first pad forming region comprises: disposing the first photoresist on the other surface of the metal layer; One portion of the first photoresist is removed to open the first pad forming region. 如申請專利範圍第1項所述之印刷電路板之製造方法,其中提供該第二接墊形成區域之步驟包括:設置該第二光阻於該金屬圖案層之該另一表面之相對表面,該第一光阻形成於該金屬圖案層之該另一表面 上;以及藉由移除該第二光阻之一部份,以打開該第二接墊形成區域。 The method for manufacturing a printed circuit board according to claim 1, wherein the step of providing the second pad forming region comprises: disposing the second photoresist on an opposite surface of the other surface of the metal pattern layer, The first photoresist is formed on the other surface of the metal pattern layer And opening the second pad forming region by removing a portion of the second photoresist. 如申請專利範圍第1項所述之印刷電路板之製造方法,其中藉由形成該圖案於該金屬層上,以形成該金屬圖案層之步驟包括:設置一薄膜層於該金屬層之一表面上;選擇性移除該薄膜層;以及藉由移除該薄膜層已移除之區域的該金屬層,以形成該金屬圖案層。 The method of manufacturing a printed circuit board according to claim 1, wherein the step of forming the pattern on the metal layer to form the metal pattern layer comprises: providing a film layer on a surface of the metal layer Upper; selectively removing the thin film layer; and forming the metal pattern layer by removing the metal layer of the removed region of the thin film layer. 如申請專利範圍第5項所述之印刷電路板之製造方法,其中選擇性移除該薄膜層之步驟係選擇性曝光、顯影及剝離該薄膜層。 The method of manufacturing a printed circuit board according to claim 5, wherein the step of selectively removing the film layer selectively exposes, develops, and peels the film layer. 如申請專利範圍第1項所述之印刷電路板之製造方法,其中藉由形成該圖案於該金屬層上,以形成該金屬圖案層之步驟包括:塗佈一薄膜層於該金屬層之一表面上;選擇性移除該薄膜層;形成一電鍍層於該薄膜層已移除之區域;移除剩餘之該薄膜層;以及藉由移除對應於剩餘之該薄膜層的該金屬層,以形成該金屬圖案層。 The method of manufacturing a printed circuit board according to claim 1, wherein the step of forming the pattern on the metal layer to form the metal pattern layer comprises: coating a film layer on one of the metal layers Surfacely; selectively removing the film layer; forming a plating layer on the removed region of the film layer; removing the remaining film layer; and removing the metal layer corresponding to the remaining film layer, To form the metal pattern layer. 如申請專利範圍第7項所述之印刷電路板之製造方法,其中選擇性移除該薄膜層之步驟係選擇性曝光、顯 影及剝離該薄膜層。 The method for manufacturing a printed circuit board according to claim 7, wherein the step of selectively removing the film layer is selective exposure and display Shadowing and peeling off the film layer. 如申請專利範圍第1項所述之印刷電路板之製造方法,其中一粗糙結構係形成於該第一光阻及該金屬圖案層之接合表面上。 The method of manufacturing a printed circuit board according to claim 1, wherein a rough structure is formed on the bonding surface of the first photoresist and the metal pattern layer. 如申請專利範圍第2項所述之印刷電路板之製造方法,其中該第一接墊係為一凸塊形成接墊,用以形成一凸塊。 The method of manufacturing a printed circuit board according to claim 2, wherein the first pad is a bump forming pad for forming a bump. 如申請專利範圍第2項所述之印刷電路板之製造方法,其中該第二接墊係為一銲線接合接墊,用以嵌設(mount)一電子元件。 The method of manufacturing a printed circuit board according to claim 2, wherein the second pad is a wire bond pad for mounting an electronic component. 如申請專利範圍第1項所述之印刷電路板之製造方法,其中該第一光阻之厚度大於該第二光阻之厚度。 The method of manufacturing a printed circuit board according to claim 1, wherein the thickness of the first photoresist is greater than the thickness of the second photoresist. 一種印刷電路板,包括:一金屬圖案層,該金屬圖案層係藉由形成一圖案於一金屬層上製成;一光阻,該光阻設置於該金屬圖案層,以開口出一接墊形成區域;以及一接墊,形成於該接墊形成區域。 A printed circuit board comprising: a metal pattern layer formed by forming a pattern on a metal layer; a photoresist disposed on the metal pattern layer to open a pad Forming a region; and a pad formed on the pad forming region. 如申請專利範圍第13項所述之印刷電路板,其中該光阻包括:一第二光阻,設置於該金屬圖案層之一表面上,以開口出一第二接墊形成區域;以及一第一光阻,設置於該金屬層之另一表面上,以開口出一第一接墊形成區域。 The printed circuit board of claim 13, wherein the photoresist comprises: a second photoresist disposed on a surface of the metal pattern layer to open a second pad forming region; and a The first photoresist is disposed on the other surface of the metal layer to open a first pad forming region. 如申請專利範圍第13項所述之印刷電路板,其中藉由移除該金屬層之一部份以形成該圖案,製成該金屬圖案層。 The printed circuit board of claim 13, wherein the metal pattern layer is formed by removing a portion of the metal layer to form the pattern. 如申請專利範圍第13項所述之印刷電路板,其中藉由移除該金屬層之一部份以形成該圖案,以及藉由形成一電鍍層於已形成該圖案的該金屬層上,以製成該金屬圖案層。 The printed circuit board of claim 13, wherein the pattern is formed by removing a portion of the metal layer, and by forming a plating layer on the metal layer on which the pattern has been formed, The metal pattern layer is formed. 如申請專利範圍第14項所述之印刷電路板,其中該接墊包括:一第一接墊,形成於該第一接墊形成區域內;以及一第二接墊,形成於該第二接墊形成區域內。 The printed circuit board of claim 14, wherein the pad comprises: a first pad formed in the first pad forming region; and a second pad formed on the second pad The pad is formed in the area. 如申請專利範圍第17項所述之印刷電路板,其中該第一接墊係為一凸塊形成接墊,用以形成一凸塊。 The printed circuit board of claim 17, wherein the first pad is a bump forming pad for forming a bump. 如申請專利範圍第17項所述之印刷電路板,其中該第二接墊係為一電線接合接墊,用以嵌設(mount)一電子元件。 The printed circuit board of claim 17, wherein the second pad is a wire bonding pad for mounting an electronic component. 如申請專利範圍第13項所述之印刷電路板,其中一粗糙結構係形成於該第一光阻與該金屬圖案層之接合表面。 The printed circuit board of claim 13, wherein a rough structure is formed on a bonding surface of the first photoresist and the metal pattern layer. 如申請專利範圍第14項所述之印刷電路板,其中該第一光阻之厚度大於該第二光阻之厚度。 The printed circuit board of claim 14, wherein the thickness of the first photoresist is greater than the thickness of the second photoresist.
TW101142737A 2011-11-18 2012-11-16 Printed circuit board and method for manufacturing the same TW201330728A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
KR1020110121041A KR20130055343A (en) 2011-11-18 2011-11-18 Printed circuit board and method for manufacturing the same

Publications (1)

Publication Number Publication Date
TW201330728A true TW201330728A (en) 2013-07-16

Family

ID=48455273

Family Applications (1)

Application Number Title Priority Date Filing Date
TW101142737A TW201330728A (en) 2011-11-18 2012-11-16 Printed circuit board and method for manufacturing the same

Country Status (4)

Country Link
JP (1) JP2013110408A (en)
KR (1) KR20130055343A (en)
CN (1) CN103124475A (en)
TW (1) TW201330728A (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN107231755A (en) * 2017-07-21 2017-10-03 维沃移动通信有限公司 A kind of flexible PCB and preparation method thereof, mobile terminal
CN107278028A (en) * 2017-07-28 2017-10-20 维沃移动通信有限公司 A kind of flexible PCB and preparation method thereof and mobile terminal
KR20220133506A (en) 2021-03-25 2022-10-05 스템코 주식회사 Multi-layer board and manufacturing method thereof, and electronic apparatus including the same

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6583364B1 (en) * 1999-08-26 2003-06-24 Sony Chemicals Corp. Ultrasonic manufacturing apparatuses, multilayer flexible wiring boards and processes for manufacturing multilayer flexible wiring boards
JP3243462B2 (en) * 1999-09-01 2002-01-07 ソニーケミカル株式会社 Method for manufacturing multilayer substrate
JP2004179574A (en) * 2002-11-29 2004-06-24 Ngk Spark Plug Co Ltd Core substrate for wiring boards, its manufacturing method, and build-up wiring board using the same
JP2006312265A (en) * 2005-05-09 2006-11-16 Furukawa Circuit Foil Kk Extremely thin copper foil with carrier, printed wiring board using it and multilayered printed wiring board
TW200644754A (en) * 2005-06-03 2006-12-16 Adv Flexible Circuits Co Ltd PCB manufacture method of single copper clad double-sided conduction
JP2010123703A (en) * 2008-11-19 2010-06-03 Furukawa Electric Co Ltd:The Printed wiring board with carrier, and method of manufacturing the same
EP2240005A1 (en) * 2009-04-09 2010-10-13 ATOTECH Deutschland GmbH A method of manufacturing a circuit carrier layer and a use of said method for manufacturing a circuit carrier
JP2011071406A (en) * 2009-09-28 2011-04-07 Mitsubishi Paper Mills Ltd Method of forming multistaged resin structure
KR101089647B1 (en) * 2009-10-26 2011-12-06 삼성전기주식회사 Board on chip package substrate and manufacturing method thereof

Also Published As

Publication number Publication date
CN103124475A (en) 2013-05-29
JP2013110408A (en) 2013-06-06
KR20130055343A (en) 2013-05-28

Similar Documents

Publication Publication Date Title
US8277668B2 (en) Methods of preparing printed circuit boards and packaging substrates of integrated circuit
US7081402B2 (en) Semiconductor package substrate having contact pad protective layer formed thereon and method for fabricating the same
US20080060838A1 (en) Flip chip substrate structure and the method for manufacturing the same
US20080041621A1 (en) Circuit board structure and method for fabricating the same
US8499441B2 (en) Method of manufacturing a printed circuit board
US20060191709A1 (en) Printed circuit board, flip chip ball grid array board and method of fabricating the same
US20060157852A1 (en) Circuit barrier structure of semiconductor packaging substrate and method for fabricating the same
US20110024180A1 (en) Printed circuit board and method of fabricating the same
US20050251997A1 (en) Method for forming printed circuit board
TWI392428B (en) Method for manufacturing double sided flexible printed wiring board
US20110024176A1 (en) Printed circuit board and method of fabricating the same
JP2009283739A (en) Wiring substrate and production method thereof
TW201347628A (en) Printed circuit board having embedded capacitor and method of manufacturing the same
CN102098883A (en) Carrier for manufacturing substrate and method of manufacturing substrate using the same
US20140034359A1 (en) Printed circuit board and method of manufacturing printed circuit board
US20130146349A1 (en) Printed circuit board and method for manufacturing the same
US20130118792A1 (en) Printed circuit board and method for manufacturing the same
TW201330728A (en) Printed circuit board and method for manufacturing the same
JP2019186337A (en) Multi-layer wiring structure and manufacturing method thereof
JP2018019076A (en) Printed circuit board
JP2004146742A (en) Manufacturing method for wiring board
JPH05335713A (en) Printed substrate lamination board with fine through-hole with one side closed and conduction plating method of the board
JP2005244104A (en) Manufacturing method of wiring board
JP4445778B2 (en) Wiring board manufacturing method
TW592010B (en) Method for fabricating patterned fine pitch circuit layer of semiconductor package substrate