TW201248740A

TW201248740A - Laminate substrate for electron device, electron device, display apparatus for organic electroluminescence, electronic paper, and manufacturing method for laminate substrate for electron device

Info

Publication number: TW201248740A
Application number: TW101111300A
Authority: TW
Inventors: Shunji Fukuda; Katsuya Sakayori; Keita Arihara; Yasuhiro Iizumi
Original assignee: Dainippon Printing Co Ltd
Priority date: 2011-03-30
Filing date: 2012-03-30
Publication date: 2012-12-01
Also published as: JP2012212522A; WO2012133807A1; TWI549200B

Abstract

A main object of the present invention is to provide a laminate substrate for an electron device which can realize barrier properties and narrow frame simultaneously while also being excellent in heat dissipation. To achieve the object, the invention provides a laminate substrate for an electron device used for an electron device, comprising: an insulating layer having an insulating layer through-hole, a first conductive part filled in the insulating layer through-hole, a metal layer formed in pattern on the insulating layer and having an opening part on the first conductive part, and a conductive part formed in a thickness direction of the laminate substrate for an electron device, conducts a surface and rear face of the laminate substrate for an electron device, and having at least the first conductive part, wherein the conductive part does not conduct through the metal layer.

Description

201248740 六、發明說明：【發明所屬之技術領域】本發明係關於有機電致發光元件、電子紙、薄臈電晶體等之電子元件所使用的積層基板。【先前技術】有機電致發光元件（以下有時將電致發光稱為EL)、電子紙、薄膜電晶體元件（以下有時將薄膜電晶體稱為TFT)等之電子元件，係對水分的耐性弱，因水分而元件特性降低。習知，作為支撐電子元件的基板’已提案有玻璃基板、賦予了阻氣性之塑膠薄膜、金屬基板等之具有阻氣性的基板。又，作為由上部密封電子元件的密封基板，亦提案有使用此等具有阻氣性的基板。玻璃基板雖然平滑性或耐熱性優越，但欠缺可撓性、不適合薄型/輕量化，並有耐衡擊性差的缺點。賦予了阻氣性之塑膠薄膜，雖具有具可撓性、輕量，亦具有耐衝擊性的優點，但耐熱性不足，線熱膨脹係數較大，故有尺寸穩定性差、或吸滿性較大的缺點。另一方面，金屬基板係關於金屬之種類或厚度而可取得各式各樣者並予以適當選擇，可滿足耐熱性、輕量性、可撓性。然而’金屬基板相較於玻璃基板有表面平坦性較差的傾向，並具有導電性，故為了於金屬基板上製造電子元件則必須設置絕緣層。例如專利文獻1中提案於表面形成了絕緣層的金 101111300 4 201248740 屬基板。近年來，於主動矩陣驅動之有機E]L元件或電子紙等之顯不裝置中’使用具有阻氣性之透明基板作為由上方密封元件的密封基板，由上部觀察影像的方式正受_目。於此種顯 , 不I置中’由於不被屬於主動驅動元件之TFT元件所遮蔽， • 故可提冋開口率。上述顯示裝置中，由於金屬基板不具有透明性，故無法细料透明之密封基板，但由於具有上述優點，故可適合使用作為支撐元件的支縣板。又，於被動矩陣驅動之有機EL元件或電子紙等之顯示裝置、或照明用途之有機EL_元件中，亦在上述方式的情況，可使用金屬基板作為支稽元件的支揮基板。另^，有機EL元件中，正盛行著對大型電視、室内照明用途等的開务，在以大型化為目標時，必須抑制有機此元件之發光時之發熱所造成的元件劣化及面内溫度不均所造成的輝度不均。金屬基板因熱傳導性亦優越，故適合作為有機EL元件的基板。再者如例如照明用途之整面發光之有機肛元件等般， ^在不需形成TFT元件的情形，並不僅止於將有機EL元件形，成於基板上後，*上部藉透縣板予以密封，由上部取出光的方式亦適合使用將有機EL元件形成於透明基板上後，由上部藉密封基板予以密封，由下部取出光的方式。在後者 .的情況，密封基板雖不需要透明性，但在整面發光之有機 101111300 5 201248740 EL元件的情況，由於較主動矩陣驅動或被動矩陣驅動之有機EL元件般之部分發光的有機el元件的情況產生更多量的熱，故要求較高放熱性。如上述般由於金屬基板的熱傳導性優越’故可謂亦適合作為有機EL元件的密封基板。最近，於有機EL元件或電子紙，要求更進一步之輕量、薄型、窄邊框等。於顯示器用途之有機ELs件或電子紙中此等性能之要求更高。例如專利文獻2中，提案有減小非顯示區域之顯示裝置。專利文獻2中，係形成貫通樹脂基板内之通孔，將形成於樹脂基板上之電極、與形成於樹脂基板之相反面的佈線連接，於樹脂基板之相反面安裝驅動電路，藉此實現大晝面化。另外，專利文獻3中’提案有顯示器用之高開口率及高密度之有機半導體元件。該有機半導體元件係具有具貫通孔的絕緣性薄膜、形成於絕緣性薄臈上之有機電晶體、與形成於絕緣性薄膜之與有機電晶體側為相反側面的顯示電極，使顯示電極與有機電晶體經由絕緣性薄膜之貫通孔連接成通電者，藉由此種構造，達成高開口率及高密度。再者，雖非有機EL元件或電子紙，但關於液晶顯示器，於專利文獻4中提案有關於顯示裝置之大型化的技術。根據專利文獻4，對接頭要求敏感並高精度之碑式技術的光學元件等之光控制部分，有大塑化、安裝較多零件之必要，予以大型化時，則複雜之驅動電路安裝部分可單元化為較小型， 101111300 6 201248740 於光控制面板之貫通電極之背面安裝含有經安裝了驅動電路之複數基板的驅動模組’將經大型化之光控制部分之基板與經單元化之義f路錢”分之練的兩基板結線，藉此可不損及光學特性、產率佳地製作大型顯示裝置。尚且，專利文獻4記載之顯示褒置，係於形成了透明電極之玻璃基板與形成了貫通電極之陶竟基板之間挾持著液晶的液晶顯示器，並非以可撓化、薄型/輕量化為目的。另外，例如專利文獻5、6中，提案有於有機EL·元件中，可窄邊框化的佈線方法。專散獻5、6中，係於基板上積層陽極與發光層與陰極，於陰極上形成保護膜，於保護膜上形成佈線，於保護膜上形成連接孔，以導電體充滿連接孔，使陽極及陰極與形成於保護膜上之佈線藉由於連接孔中充滿的導電體所連接。作為該保護膜，係使用观或随等之蒸鍍膜、氣體不透過性薄膜、樹脂塗覆膜、玻璃。 (專利文獻1)曰本專利特開2006_331694號公報 (專利文獻2)曰本專利特開2〇〇8·33〇95號公報 (專利文獻3)日本專利特開2〇〇9_244338號公報 (專利文獻4)日本專利特開2〇〇1_3〇5999號公報 (專利文獻5)日本專利特開2〇〇4_355998號公報 (專利文獻6)曰本專利特開2〇〇4_362788號公報【發明内容】 (發明所欲解決之問題） 101111300 7 201248740 於專利文獻2記載之顯示裝置中，係藉阻氣性薄膜被覆顯示面板整體，屬於支撐基板之樹脂基板本身並不具有阻氣. 性。因此，期待具有阻氣性、可窄邊框化的支撐基板。另外’目前尚未提案有阻氣性、放熱性及窄邊框均滿足的密封基板。本發明係有鑑於上述實情而形成者，以提供可同時實現阻氣性及窄邊框，進而放熱性亦優越的電子元件用積層基板為目的。 .(解決問題之手段）為了達成上述目的，本發明提供一種電子元件用積層基板，係用於電子元件者，其特徵為具有：具有絕緣層貫通孔的絕緣層；填充於上述絕緣層貫通孔的第丨導通部；於上述絕緣層上形成為圖案狀，於上述第1導通部上具有開口部的金屬層；與形成於上述電子元件用積層基板之厚度方向上，導通上述電子元件用積層基板之表背，至少具有上述第i 導通部的導通部；上述導通部並未與上述金屬層導通。根據本發明，使金屬層之開口部配置於第丨導通部上，由於導通部並未與金屬層導通，故可由表面將佈線取出至背面。因此，在將本發明之電子元件用積層基板用於TFT元件、有機EL元件、電子紙等之電子元件時，可達到窄邊框化。尤其是在將本發明之電子元件用積層基板用於有機el 元件或電子紙時，可使發光區域或顯示區域充分增大◎又， 101111300 8 201248740 般係阻氣性優越’故藉由使用積層了絕緣層與阻斷性較ΐ/1相較於樹脂層單獨的情況，其水分或氧的子此 +元件日^將本發明之電子元件用積層基板用於上述電二可抑制因水料氧所造叙元件雜降低。如發明，可兼顧阻絕性及窄邊框。進而，由於金屬㈣料倾越，故可快迷轉導狀賴，在將本 j子元件用積層基板用於有機EL元件時，可長期間，且可持發光特性，並實現無發光不均的均句發光減低哥°卩之縮短或元件破壞。發月中，較佳係上述絕緣層含有聚醯亞胺。此時，較佳係上述絕緣独聚醯亞胺作為主成分。因可作成絕緣性、对熱性、尺寸穩定性優越的絕緣層。又，藉由以聚酿亞胺作為主成77 ’則可進行絕緣層之薄膜化並提升絕緣層之熱傳導性’進而提向放熱性。另外，本發明中，較佳係上述絕緣層之吸濕膨脹係數為 0ppm/%RH〜15ppm/%RH的範圍内。吸濕膨脹係數為吸水性之指標，吸濕膨脹係數越小則吸水性越小。因此，若吸濕膨脹係數為上述範圍，則可提升阻絕性，可於濕氣存在下實現高可靠性。又，絕緣層之吸濕膨脹係數越小，則越提升絕緣層的尺寸穩定性。由於金屬層之吸濕膨脹係數幾乎接近零，故若絕緣層之吸濕膨脹係數過大，則有絕緣層及金屬層之密黏性降低之虞。 101111300 9 201248740 再者，本發明中，較佳係上述絕緣層之線熱膨脹係數為 0ppm/°C〜30ppm/°C之範圍内，若絕緣層之線熱膨脹係數為上述範圍，則可使絕緣層及金屬層之線熱膨脹係數接近，可抑制電子元件用積層基板的曲翹，並可提高絕緣層及金屬層的密黏性。另外，本發明中’較佳係上述絕緣層之線熱膨脹係數與上述金屬層之線熱膨脹係數的差為15ppm/t以下。如上述，絕緣層及金屬層之線熱膨脹係數越接近，則越可抑制電子一件用積層基板的曲翹，並可提高絕緣層及金屬層的密黏另外’本發明中’較佳係上述金屬層之線熱膨脹係數為 0ppm/°C〜25PPm/°C的範圍内。若金屬層之線熱膨脹係數^ 上述範圍内，則可使金屬層及電子元件部之電或佈線的缝熱膨脹係數接近，而可抑制電子元件用積層基板的曲翹、、可抑制於電子元件部之電極或佈線發生剝離或裂痏 ^ 再者，本發明中，較佳係上述金屬層之圖案端$ ’ 所絕緣。藉由使金屬層之圖案端部由被覆層所絕緣，金屬層及導通部絕緣。則可韻再者，本發明中，由阻絕性的觀點而言， ° 上吨金屬#戶斤成之區域整體的面積’較佳係在將上述電子元 θ开整體之面積設為100%時，為80%以上且未滿層基相另外，本發明之電子元件用積層基板係進—步具, 上述金屬層之開口部内、並配置於上述第丨導通邹上"为' 101111300 10 201248740 上述金屬層相同之材料所構成的導通部用金屬部，上述導通部亦可具有上述第1導通部與上述導通部用金屬部。此時，第1 V通部配置於金屬層之開口部上，導通部用金屬部係於金屬層之開口部内相對於金屬層獨立形成，故可使金屬層及導通部絕緣’並可由表面取出佈線至背面。又，由於導通部用金屬部係由與金屬層相同讀料所構成，故可於金屬層之圖案化同時形成導通部用金屬部，可縮短導通部的形成製程。另外，上述情況中，本發明之電子元件用積層基板亦可進 -步具有形成於上述金屬層上、配置於上述導通部用金屬部上之具有第2絕緣層貫通孔的第2絕緣層。藉由於金屬層上形成第2絕緣層，則可於第2絕緣層上依與導通部導通的方式形成電極或佈線等。此時本發明之電子元件用積層基板亦可進—步具有填充於上述第2絕緣層貫通孔的第2導通部，上述導通部可具有上述第1導通部與上述導通部用金屬部與上述第2導通部。另外’本發明之電子元件用積層基板亦可進一步具有形成於上述金屬層上、配置於上述導通部上之具有第2絕緣層貫通孔的第2絕緣層，與填充於上述第2絕緣層貫通孔的第2 ，通部，上述導通部可具有上述第i導通部與上述第2導通邛#由於金屬層上形成第2絕緣層，則可於第2絕緣層上依與導通部導通的方式形成電極或佈線等。 101111300 201248740 炉植係上述金屬層之圖案端部由上述絕緣層咬本發明中，軼供 , ^ 上述第2絕緣廣所絕緣。亦即，較佳係上述被覆層為上述絕緣層或上述笫2絕緣層。此係由於可使電子元件用積層基板之製造步驟簡略化。另外，本發明之電子元件用積層基板較佳係進一步具有形成於上述第2絕緣層上、配置成被覆上述金屬層之開口部、與上述第2導通部導通的第3金屬層。藉由使第3金屬層配置成被覆金#之開口部，則可阻礙水分或氧的穿透。再者，本發明之電子元件用積層基板較佳係進一步具有形成在上述絕緣層之與上述金屬層側為相反側面、配置成被覆上述金屬層之開口部、與上述第1導通部導通的第2金屬層。藉由使第2金屬層配置成被覆金屬層之開口部，則可阻礙水分或氧的穿透。尤其是在本發明之電子元件用積層基板之兩面，將第2金屬層及第3金屬層分別配置成被覆金屬層之開口部時，玎有效地阻礙水分或氧之穿透。又，上述本發明中’較佳係上述第2絕緣層含有聚醯亞胺。此時，較佳係上述第2絕緣層以聚籬亞胺作為主成分。因可作成絕緣性、耐熱性、尺寸穩定性優越的第2絕緣層。又，藉由以聚醯亞胺作為主成分，則可進行第2絕緣層之薄膜化並提升第2絕緣層之熱傳導性，進而提高放熱性。再者’本發明中’亦可於上述絕緣層之與上述金屬層側相反側的面上，形成含有無機化合物的密黏層。例如，在將本 101111300 12 201248740 發明之電子元件用積層基板用於TFT元件時，可提高電子元件用積層基板及TFT元件的密黏性，防止於TFT元件發生剝離或裂痕。另外’本發明係提供一種電子元件，其特徵為具有：上述電子元件用積層基板；形成於上述電子元件用積層基板之絕緣層上的電子元件部；與配置於上述電子元件部上的透明密封基板。根據本發明，由於具備上述之電子元件用積層基板，故可將佈線取出至電子元件用積層基板之與電子元件部所配置之面為相反側的面，而可窄邊框化。又，由於上述電 _ 用積層基板之阻絕性優越，故可良好地維持元件丨生处上述發明中’上述電子元件部亦可為TFT元件部另外’上述發明中，上述電子元件部係具有:成:。緣層上之背面電極層、形成於上述背面電極屛上機發光層的EL層、與形成於上述EL層上之透明夕込有有機EL元件部；上述電子元件用積層基板之導、^極層的有連接於上述透明電極層之透明電極層用導通部通。卩亦可具上述背面電極層之背面電極層用導通部。除了與連接於之有外，由於上述電子元件用積層基板具有放熱性故^致果機EL元件之發熱所造成的性能劣化。可抑制再者，上述發明中，上述電子元件部係具有形成於緣層上之背面電極層、形成於上述背面電極屏於上述絕、上之《示層、 101111300 13 201248740 與形成於上述顯示層上之透明電極層的電子紙元件部；上述電子兀件用積層基板之導通部亦可具有連接於上述透明電極層之透明電極層用導通部、與連接於上述背面電極層之背面電極層用導通部。另外本么明提供一種有機扯顯示褒置，其特徵為具有：上述電子元件用積層基板；形成於上述電子元制積層基板之絕”彖層上的TFT το件部；形成於上述電子元件用積詹基板之絕緣層上’連接於上述TFT元件部的背面電極層；具有形成於上述背面電極層上並至少含有有機發光層的el 層、及形成於上述EL層上之透明電極層的有機el元件部；與配置於上述有機EL元件部上之透明密封基板。根據本發明，由於具備上述電子元件用積層基板，故可將佈線取出至電子元件用積層基板之與元件所配置之面為相反側的面’可T以窄邊框化。又於上述電子元件用積用基板之阻絕性優越、具有放熱性，故良好地維持元件性外3 並可抑制因有機EL元件之發熱所造成的性能劣化。犯’ 再者，本發明提供一種電子紙，其特徵為具有：上述兀件用積層基板；形成於上述電子元件用積層基板子上的TFT TL件部；具有形成於上述電子元件用積層基板5 絕緣層上並連接於上述TFT元件部的背面電極層、邢成之上述背面電極層上之顯示層、及形成於上述顯示層上 ' 電極層的電子紙元件部；與配置於上述電子紙元件部上、 101111300 201248740 明密封基板。根據本發明，由於具備上述電子元件用積層基板，故可將佈線取出至電子元件用積層基板之與元件所反側的面’可㈣窄邊框化。又，由於上述電子树用積層基板之阻絕性優越，故可良好地維持元件性能。另外，本發明提供一種電子元件用積層基板之製造方法，其特徵為具有：準備至少依序積層了絕緣層及金屬^之積層體的積層鮮備步驟；於上賴緣層形成絕緣層貫通孔的^ 緣層貫通孔形成步驟；與對上述金屬層進行圖案化，而同時形成於上歧緣層貫通孔上具有.部之金屬層、與配置於上述絕緣層貫通孔上之導通部用金屬部的金屬層圖案化步驟；依不同順序進行上述絕緣層貫$ ^ y 層圖案化步驟。 “貝通㈣輕驟及上述金屬根據本發明，可在金屬層之圖案化同時形成導通部用部，而可縮短導通部的形成製程。屬絕：:=!:用積_反之製造方法，較佳係於上述絕緣層“㈣成步難，於上粒制_化步後’進一步具有於上述絕緣層貫通孔月μ 1導通部形成步驟。減第1導通部的第金=!=_基板之製造方法’較佳係於上述金屬層随化形成步職，進—步具有於上述金❹上开第2絕緣層的第2絕緣層形成步驟、與於上述第2絕緣層上 101111300 201248740 形成第2絕緣層貫通孔的第2絕緣層貫通孔形成步驟；此時，在上述絕緣層貫通孔形成步驟之前、後或同時，進行上述第2絕緣層貫通孔形成步驟。藉由於金屬層上形成第2 絕緣層，則可於第2絕緣層上依與導通部導通之方式形成電極或佈線等。本發明之電子元件用積層基板之製造方法中，較佳係於上述第2絕緣層貫通孔形成步驟後，進一步具有於上述第2 絕緣層貫通孔填充第2導通部的第2導通部形成步驟丨此時，在上述第1導通部形成步驟之前、後或同時，進行上述第2導通部形成步驟。 (發明效果）本發明中，可發揮能同時實現阻絕性及窄邊框的效果。【實施方式】以下，針對本發明之電子元件用積層基板、電子元件、有機EL顯示裝置、電子紙及電子元件用積層基板之製造方法進行詳細說明。 ’ Α.電子元件用積層基板首先’說明本發明之電子元件用積層基板。本發明之電子元件用積層基板係用於電子元件的電子元件用積層基板’其特徵為具有：具有絕緣層貫通孔之絕緣層；填充於上述絕緣層貫通孔的第丨導通部；於上述絕緣層上形成為圖案狀，於上述第！導通部上具有開口部的金屬 101111300 16 201248740 上’導通上述 1導通部的導層；與形成於電子元件用積層基板之厚度方向電子元件用積層基板之表背，至少具有上述第通部；上述導通部並未與上述金屬層導通。尚且，所謂使金屬層形成為# w、.，…疋黑a 幻鸯層並未形於電子元件用積層基板之整面’而如例如圖u ^ 、）、（b)及圖 2(a)〜(c)般依金屬層3具有開口部13h的方式形 m 项•為圖案:沿；的情況。圖1(a)為圖1(b)之A-A線剖面圖’圖& 、八）為圖2(b)、 (c)之B-B線剖面圖，圖1(b)及圖2(b)、（c)係番2 _ 电子元件用積層基板1之由金屬層3側之面所觀察到的平面圖。谓另外’所謂電子元件用積層基板之厚度方向，係發明之電子元件用積層基板用於電子元件時，相斜於電：件部所配置之面呈垂直的方向。 70 所謂電子元件用積層基板之表背，係指在將本發明之電元件用積層基板用於電子元件時，電子元件部所配置之面與相對於該面之相反侧的面。本發明之電子元制積層基板可分為·PW種實施態樣。第1實施態樣係如圖l(a)、（b)所例示般，具有：具有絕緣層貫通孔i2h之絕緣層2 ;填充於上述絕緣層貫通孔既之第1導通部6;於上述絕緣層2上形成為圖案狀，於上述第1導通部6上具有開σ部13h的金屬層3 ;與形成於上述電子元件用積層基板1之厚度方向上，導通上述電子元件用積層基板1之表f，至少具有上述第1導通部6的導通部7; 101111300 201248740 上述導通部7並未與上述金腳3導通的f子元㈣積層基板1 ;電子細用積層基板i係進—步具有：形成於上述金屬層3之開口部13h内，配置於上述第1導通部6上，由與上述金屬層3相同之材料所構成的導通部用金屬部8;上述導通部7係具有上述第丨導通部6與上迷導通部用金屬部8 的電子元件用積層基板j。第2實施態樣係如圖2⑻〜⑻所例示般，具有··呈有絕緣層貫通孔咖之絕緣層2 ;填充於上述絕緣層貫軌m之第1導通部6 ·，於上述絕緣層2上形成為圖案狀，於上述第 1導通部6上具有開口部13h的金屬層3 ;與形成於上述電子元件用積層基板1之厚度方向上，導通上述電子元件用積層基板1之表背，至少具有上述第1導通部6的導通部7; 上述導通部7並未與上述金屬層3導通的電子元制積層基板1 〇以下，分別各實施態樣進行說明。 1·第1實施態樣本貫施1、樣<電子元件用積層基板的特徵在於具有：具有、在緣層貫it孔之絕緣層；填充於上料縣貫通孔之第1 導通部’於上述絕緣層上形成為®案狀，於上述第1導通部 -有1彳的金屬層；與形成於上述電子元件用積層基板旱又方向上$通上述電子元件用積層基板之表背，至少 '、第導通部的導通部；上述導通部並未與上述金屬 101111300 201248740 層導通者；電子元件用積層基板係進一步具有··形成於上述金屬層之開口部内，配置於上述第丨導通部上，由與上述金屬層相同之材料所構成的導通部用金屬苦P;上述導通部係具有上述第1導通部與上述導通部用金屬部。針對本實施態樣之電子元件用積層基板’參照圖式進行說明。 ° 圖1(a)、（b)為表示本實施態樣之電子元件用積層基板之一例的概略剖面圖及平面圖，圖i⑻為圖！⑻之a_a線剖面圖，圖1(b)為電子元件用積層基板1之由金屬们侧之: 所看的平面圖。圖Ua)、（b)所例示之電子元件用積層基板丨，係具有：且有絕緣層貫通孔nh之絕緣層2 ;填充於絕緣層貫通孔⑽ 之第1導通部6;於絕緣層2上形成為圖餘，於第i導通部6上具有開口部的金屬層3;與形成於金屬層3之開口部 13h内’配置於第i導通部6上，由與金屬層3相同之材料所構成的導通部用金屬部8。而且，藉由填充於絕緣層貫通孔12h之第i導通部6哨配置於第i導通部6之導通部用金屬部8構成導通部7。該電子元件用積層基板1中，第1導通部6係配置於金屬層3之開口部13h上’導通部用金屬部8係於金屬層3之開口部13h内相對於金屬層3獨立形成，故金屬層3與導通部 7並未導通。因此，可經由導通部7由表面將佈線取出至背 101111300 201248740 面。圖3為表示本實施態樣之電子元件用積層基板之其他例的概略剖面圖。圖3所例示之電子元件用積層基板1，係圖 Ua)、（b)之電子元件用積層基板1進一步具有：形成於金屬層3上’具有配置於導通部用金屬部8上之第2絕緣層貫通孔的第2絕緣層4。金屬層3之圖案端部i3s由被覆層（圖3 中為第2絕緣層4)所絕緣，金屬層3之開口部I3h内之導通部用金屬部8以外的部分由被覆層（圖3中為第2絕緣層 4)所填充。 s玄電子元件用積層基板1中’第1導通部6係配置於金屬層3之開口部13h上，導通部用金屬部8係於金屬層3之開口部13h内相對於金屬層3獨立形成，金屬層3之開口部 13h内之導通部用金屬部8以外的部分由被覆層（圖3中為第2絕緣層4)所填充，故金屬層3與導通部7並未導通。因此，可經由導通部7由表面將佈線取出至背面。圖4為表示本實施態樣之電子元件用積層基板之其他例的概略剖面圖。圖4所例示之電子元件用積層基板丨，係於圖1(a)、（b)所示之電子元件用積層基板i中，金屬層3之圖案端部13s由被覆層（圖4中為第2絕緣層4)所絕緣，金屬層3之開口部i3h内之導通部用金屬部8以外的部分由被覆層（圖4中為第2絕緣層4)所填充。该電子元件用積層基板1中，第1導通部6係配置於金屬 101111300 20 201248740 層3之開口部13h上，導通部用金屬部8係於金屬層3之開口部13h内相對於金屬層3獨立形成，金屬層3之開口部 13h内之導通部用金屬部8以外的部分係由被覆層15所填充，故金屬層3與導通部7並未導通。因此，可經由導通部 7由表面將佈線取出至背面。圖5(a)、（b)為表示本實施態樣之電子元件用積層基板之其他例的概略剖面圖及平面圖，圖5(a)為圖5(b)之D-D線剖面圖，圖5(b)為電子元件用積層基板1之由第2絕緣層4 側之面所觀看的平面圖。圖5(a)、（b)所例示之電子元件用積層基板1，係使圖3所示之電子元件用積層基板1進一步具有填充於第2絕緣層貫通孔14h的第2導通部10。導通部7係由下述者所構成：填充於絕緣層貫通孔12h之第1導通部6 ;形成於金屬層3 之開口部13h内，配置於第1導通部6上，由與金屬層3 相同之材料所構成的導通部用金屬部8;與填充於第2絕緣層貫通孔14h之第2導通部10。該電子元件用積層基板1中，第1導通部6係配置於金屬層3之開口部13h上，導通部用金屬部8係於金屬層3之開口部13h内相對於金屬層3獨立形成，第2導通部10係配置於導通部用金屬部8上，金屬層3之開口部13h内之導通部用金屬部8以外的部分係由被覆層（圖5(a)中為第2絕緣層4)所填充，故金屬層3與導通部7並未導通。因此，可 101111300 21 201248740 經由導通部7由表面將佈線取出至背面。圖6為表示具備本實施態樣之電子元件用積層基板之有機EL元件之一例的概略剖面圖。圖6所示之有機EL元件 21係具備圖5(a)、（b)所例示之電子元件用積層基板1者。有機EL元件21係具有：電子元件用積層基板1 ;形成於電子元件用積層基板1之絕緣層2上的有機EL元件部20;配置於有機EL元件部20上的透明密封基板25 ;與使電子元件用積層基板1及透明密封基板25接黏而將元件密封的密封部26。有機EL元件部20係具有：背面電極層22 ;形成於背面電極層22上，含有有機發光層之EL層23 ;與形成於EL層23上的透明電極層24。電子元件用積層基板1之 2個之導通部7a、7b中，一方之背面電極層用導通部7a係連接於背面電極層22,另一方之透明電極層用導通部7b係連接於透明電極層24。該有機EL元件21為由透明密封基板25側取出發光L的頂部發光型。尚且，本實施態樣之電子元件用積層基板係包含有機EL 元件，可用於電子紙、TFT元件等之電子元件中。圖7為表示具備本實施態樣之電子元件用積層基板之有機EL元件之其他例的概略剖面圖。圖7所例示之有機EL 元件21中，電子元件用積層基板1係使圖5(a)、（b)所例示之電子元件用積層基板1進一步具有：形成於絕緣層2之與金屬層3側為相反側的面上，配置成被覆金屬層3之開口 101111300 22 201248740 部，·與第1導通部6導通之第2金屬層μ ;豳， ’與形成於第2 絕緣層4上，配置成被覆金屬層3之開口部，愈人第2導通邱 10導通的第3金屬層17。又，於電子元件用積爲義第2絕緣層4係相對於金屬層3形成為圖案肤，於金屬層3 之面不存在第2絕緣層4，設有金屬層3所露屮之金屬層露出區域11a。有機EL元件21係具有：透明发』土板27 ;形成於透明基板27上之有機EL元件部20 ;配 i於有機EL元件部20上之電子元件用積層基板1 ;與使形成有有機件部20之透明基板27及電子元件用積層其拓 70 土风i接黏而將元件密封的密封部26。有機EL元件部20係且女. '、^、有.透明電極層24 ;形成於透明電極層24上，含有有機發光層之 23 ;與形成於EL層23上之背面電極層22。雷工- " 电于元件用積層基板i之2個之導通部7a、7b中’-方之透明電極層用導通部7b係連接於透明電極層24，另一方面夕心jC面電極層用導通部7a係連接於背面電極層22。該有機EL元件2ι係由透明基板27側取出發光L的底部發光型。如此，在將本實施態樣之電子元件用積層基板用於有機 EL元件、奸紙、TFT元件等之電子元件時，可將佈線取出至電子元件用積層基板之與元件所配置之面為相反側的面。其中，在將本實施態樣之電子元件用積層基板用於有機 EL元件或電子紙時，可充分增大發光區域或顯示區威。藉此’可達到窄邊框化。尤其是有利於進行多去角的情形。與 101111300 23 201248740 者’亦可於電子元件用積層基板之一面上配置TFT元件’ 於另一面上配置有機EL元件或電子紙。另外’金屬層-般係阻氣性優越，本實施態樣之電子元件用積層基板係使金屬層n絕緣層積層者，故相較於樹脂層單獨的情況，可減低水分或氧的穿透。從而，在將本實施態樣之電子凡件用積層基板用於上述電子元件時，可抑制因水分或氧所造成的元件劣化。又，在將本實施態樣夂電子元件用積層基板用於電子紙時，可使元件内濕度保持為一定，抑制因濕度變化所造成的負電狀態變化，可得到良好的顯示特性。一般金屬層不僅阻氣性優越，熱傳導性亦優良。因此，本實施態樣之電子元件用積層基板中，水分或氧之遮蔽性高，且可快速地傳導或放射熱。因此’在將本實施態樣之電子元件用積層基板用於有機EL元件時，職料性高，可抑制因發熱所造成的不良影響，實現無發光不均的均勻發光，且可減低壽命縮短或元件破壞。又’此時’由於電子元件用積詹基板之阻氣性優越’故可減低來自電子元件用積層基板側的水分或氧之穿透，可長期間地穩定維持發光特性。另外，在如圖7所例示般設置金屬層露出區域⑴時，可提高電子元件用積層基板的放熱性。因此，在將本實施態樣之電子元件用積層基板祕有機EL元件時，可有效抑制因有機EL元件之發熱所造成的性能劣化。 101111300 24 201248740 再者’在如圖7所示例般依被覆金屬層3之開口部之方、配置第2金屬層16及第3金屬層17時，可使於式电于疋件用積層基板之厚度方向上均不存在金屬層、導通部、 $ 2金屬層及第3金屬層的區域消失，而可有效阻礙水分或氣、201248740 VI. Description of the Invention: TECHNICAL FIELD The present invention relates to a laminated substrate used for electronic components such as an organic electroluminescence device, an electronic paper, and a thin germanium transistor. [Prior Art] Electronic components such as an organic electroluminescence device (hereinafter referred to as EL for electroluminescence), an electronic paper, or a thin film transistor (hereinafter referred to as a TFT for a thin film transistor) are used for moisture. The resistance is weak, and the component characteristics are lowered due to moisture. Conventionally, a substrate having a gas barrier property such as a glass substrate, a plastic film imparting gas barrier properties, or a metal substrate has been proposed as a substrate for supporting electronic components. Further, as a sealing substrate for sealing an electronic component from the upper portion, a substrate having gas barrier properties is also proposed. Although the glass substrate is excellent in smoothness or heat resistance, it lacks flexibility, is not suitable for thinness and weight reduction, and has a disadvantage of being inferior in balance resistance. The plastic film imparting gas barrier properties has the advantages of flexibility, light weight, and impact resistance, but the heat resistance is insufficient, and the linear thermal expansion coefficient is large, so that the dimensional stability is poor, or the fullness is large. Shortcomings. On the other hand, the metal substrate can be variously selected depending on the type or thickness of the metal, and can be appropriately selected to satisfy heat resistance, light weight, and flexibility. However, the metal substrate tends to have poor surface flatness compared to the glass substrate, and has electrical conductivity. Therefore, in order to manufacture an electronic component on a metal substrate, it is necessary to provide an insulating layer. For example, Patent Document 1 proposes a substrate of gold 101111300 4 201248740 having an insulating layer formed on its surface. In recent years, in the case of an active matrix-driven organic E]L device or a display device such as an electronic paper, a transparent substrate having a gas barrier property is used as a sealing substrate for the upper sealing member, and the image is observed from the upper portion. . In this case, it is not placed in the 'because it is not obscured by the TFT element belonging to the active driving element, so the aperture ratio can be improved. In the above display device, since the metal substrate does not have transparency, the transparent sealing substrate cannot be made fine. However, since the above-described advantages are obtained, the branch plate as a supporting member can be suitably used. Further, in the case of a display device such as an organic EL element or an electronic paper driven by a passive matrix or an organic EL element for illumination use, in the case of the above aspect, a metal substrate can be used as the support substrate of the support element. In addition, in the organic EL device, the use of large-scale televisions and indoor lighting applications is prevailing. When it is aimed at increasing the size, it is necessary to suppress component deterioration and in-plane temperature caused by heat generated when the organic component emits light. Uneven unevenness caused by unevenness. Since the metal substrate is also excellent in thermal conductivity, it is suitable as a substrate for an organic EL element. In addition, for example, in the case of an organic anal element that illuminates the entire surface of the illumination, etc., in the case where the TFT element is not required to be formed, it is not limited to the shape of the organic EL element, and is formed on the substrate. It is also suitable to use a method in which the light is removed from the upper portion, and the organic EL element is formed on the transparent substrate, and the upper portion is sealed by the sealing substrate, and the light is taken out from the lower portion. In the latter case, although the sealing substrate does not require transparency, in the case of the organic light of the organic surface of the 101111300 5 201248740 EL element, the organic EL element which is partially illuminated by the active EL element or the passive matrix driven organic EL element is used. The situation produces a greater amount of heat and therefore requires a higher exothermicity. As described above, the metal substrate is excellent in thermal conductivity. Therefore, it is suitable as a sealing substrate for an organic EL element. Recently, in organic EL elements or electronic papers, further lightweight, thin, narrow frames, and the like are required. These properties are more demanding in organic ELs or electronic paper for display applications. For example, Patent Document 2 proposes a display device for reducing a non-display area. In Patent Document 2, a through hole penetrating through the resin substrate is formed, and an electrode formed on the resin substrate is connected to a wiring formed on the opposite surface of the resin substrate, and a drive circuit is mounted on the opposite surface of the resin substrate, thereby realizing a large Faceted. Further, Patent Document 3 proposes an organic semiconductor element having a high aperture ratio and a high density for a display. The organic semiconductor device has an insulating film having a through hole, an organic transistor formed on the insulating thin film, and a display electrode formed on the side opposite to the organic transistor side of the insulating film, so that the display electrode has The electromechanical crystal is connected to an electric current via a through hole of an insulating film, and with such a structure, a high aperture ratio and a high density are achieved. In addition, in the liquid crystal display, a technique for increasing the size of the display device is proposed in the liquid crystal display. According to Patent Document 4, the optical control portion of the optical element such as the magnet technology that is sensitive to the joint and has high precision is necessary for large plasticization and installation of many parts. When the size is increased, the complicated driving circuit mounting portion can be Unitized to a smaller type, 101111300 6 201248740 A drive module including a plurality of substrates on which a drive circuit is mounted is mounted on the back surface of the through electrode of the light control panel. The substrate and the unitized unit of the enlarged light control portion are f In addition, the two substrates are connected to each other, whereby a large-sized display device can be produced without impairing optical characteristics and productivity. Moreover, the display device described in Patent Document 4 is formed on a glass substrate on which a transparent electrode is formed. The liquid crystal display in which the liquid crystal is held between the ceramics of the through-electrode is not intended to be flexible, and is thinner or lighter. Further, for example, in Patent Documents 5 and 6, it is proposed that the organic EL element can be narrow. Framed wiring method. In the 5th and 6th, the anode and the luminescent layer and the cathode are laminated on the substrate, and a protective film is formed on the cathode on the protective film. In the wiring, a connection hole is formed in the protective film, and the connection hole is filled with the electric conductor, so that the anode and the cathode and the wiring formed on the protective film are connected by the electric conductor filled in the connection hole. Or a vapor-deposited film, a gas-impermeable film, a resin-coated film, or a glass. (Patent Document 1) Japanese Patent Laid-Open Publication No. 2006-331694 (Patent Document 2) Patent Application No. 2〇〇8·33〇 Japanese Laid-Open Patent Publication No. JP-A No. Hei. No. Hei. No. Hei. No. Hei. (Patent Document 6) Japanese Laid-Open Patent Publication No. Hei. No. 4-362788. SUMMARY OF THE INVENTION PROBLEMS TO BE SOLVED BY THE INVENTION The display device described in Patent Document 2 is a gas barrier film-covered display panel. As a whole, the resin substrate belonging to the support substrate itself does not have gas barrier properties. Therefore, a support substrate having a gas barrier property and a narrow frame can be expected. Further, 'gas barrier, heat release and narrow sides have not been proposed yet. The present invention has been made in view of the above circumstances, and is intended to provide a laminated substrate for electronic components which can simultaneously achieve gas barrier properties and a narrow bezel, and which has excellent heat dissipation properties. In order to achieve the above object, the present invention provides a laminated substrate for an electronic component, which is characterized in that it is provided with an insulating layer having an insulating layer through-hole, and a second conductive portion filled in the insulating layer through-hole; The insulating layer is formed in a pattern shape, and has a metal layer having an opening in the first conductive portion; and a front surface of the laminated substrate for electronic component that is formed in the thickness direction of the electronic component laminated substrate has at least a conductive portion of the ith conductive portion; the conductive portion is not electrically connected to the metal layer. According to the invention, the opening of the metal layer is disposed on the second conductive portion, and since the conductive portion is not electrically connected to the metal layer, the wiring can be taken out to the back surface by the surface. Therefore, when the laminated substrate for an electronic component of the present invention is used for an electronic component such as a TFT element, an organic EL device, or an electronic paper, a narrow frame can be obtained. In particular, when the laminated substrate for an electronic component of the present invention is used for an organic EL device or an electronic paper, the light-emitting region or the display region can be sufficiently increased. ◎In addition, 101111300 8 201248740 is generally excellent in gas barrier property, so by using a laminate In the case where the insulating layer is less than the barrier layer/1, the moisture or oxygen is added to the resin layer alone, and the laminated substrate for the electronic component of the present invention is used for the above-mentioned electricity. Oxygen-induced components are reduced. As invented, both barrier properties and narrow bezels can be considered. Further, since the metal (four) material is tilted, it is possible to change the conduction state. When the laminated substrate for the j-sub element is used for the organic EL element, the light-emitting characteristics can be maintained for a long period of time, and no uneven light emission can be realized. The singularity of the sentence reduces the shortening or component destruction of the brother. In the month of the moon, it is preferred that the insulating layer contains polyimine. In this case, it is preferred that the above-mentioned insulating monomimide is used as a main component. It is an insulating layer that is excellent in insulation, heat resistance, and dimensional stability. Further, by using the polyimide as the main component 77', the insulating layer can be thinned and the thermal conductivity of the insulating layer can be improved, thereby improving the heat dissipation property. Further, in the invention, it is preferred that the insulating layer has a coefficient of hygroscopic expansion of from 0 ppm/% RH to 15 ppm/% RH. The hygroscopic expansion coefficient is an index of water absorption, and the smaller the hygroscopic expansion coefficient, the smaller the water absorption. Therefore, if the coefficient of hygroscopic expansion is in the above range, the barrier property can be improved, and high reliability can be achieved in the presence of moisture. Further, the smaller the coefficient of hygroscopic expansion of the insulating layer, the more the dimensional stability of the insulating layer is improved. Since the coefficient of hygroscopic expansion of the metal layer is almost zero, if the coefficient of hygroscopic expansion of the insulating layer is too large, the adhesion between the insulating layer and the metal layer is lowered. Further, in the present invention, it is preferable that the linear thermal expansion coefficient of the insulating layer is in the range of 0 ppm/° C. to 30 ppm/° C., and if the linear thermal expansion coefficient of the insulating layer is in the above range, the insulating layer may be used. The linear thermal expansion coefficient of the metal layer is close to each other, and the warpage of the laminated substrate for electronic components can be suppressed, and the adhesion between the insulating layer and the metal layer can be improved. Further, in the present invention, it is preferable that the difference between the linear thermal expansion coefficient of the insulating layer and the linear thermal expansion coefficient of the metal layer is 15 ppm/t or less. As described above, the closer the thermal expansion coefficient of the insulating layer and the metal layer is, the more the warpage of the laminated substrate for the electronic piece can be suppressed, and the adhesion between the insulating layer and the metal layer can be improved. The coefficient of thermal expansion of the metal layer is in the range of 0 ppm/°C to 25 ppm/°C. When the coefficient of thermal expansion of the metal layer is within the above range, the thermal expansion coefficient of the electric or wiring of the metal layer and the electronic component portion can be made close, and the warpage of the laminated substrate for electronic components can be suppressed, and the electronic component can be suppressed. The electrode or the wiring is peeled off or cracked. Further, in the present invention, it is preferable that the pattern end of the metal layer is insulated. The metal layer and the conductive portion are insulated by insulating the pattern end portion of the metal layer from the coating layer. Further, in the present invention, from the viewpoint of the barrier property, the area of the entire area of the upper portion of the metal is preferably set to 100% when the area of the entire electronic element θ is 100%. In addition, the multilayer substrate for an electronic component of the present invention is incorporated in a step, and the opening of the metal layer is disposed in the opening of the third layer, and is "101111300 10 201248740". The metal portion for the conduction portion formed of the material having the same metal layer, and the conduction portion may have the first conductive portion and the metal portion for the conduction portion. At this time, the first V-pass portion is disposed on the opening of the metal layer, and the metal portion of the conductive portion is formed separately from the metal layer in the opening of the metal layer, so that the metal layer and the conductive portion can be insulated 'can be taken out from the surface Route to the back. Further, since the metal portion for the conduction portion is formed of the same reading material as the metal layer, the metal portion for the conduction portion can be formed simultaneously with the patterning of the metal layer, and the formation process of the conduction portion can be shortened. Further, in the above case, the laminated substrate for an electronic component of the present invention may further include a second insulating layer having a second insulating layer through hole formed in the metal layer and disposed on the metal portion for the conductive portion. By forming the second insulating layer on the metal layer, an electrode or a wiring can be formed on the second insulating layer in accordance with the conduction of the conductive portion. In this case, the multilayer substrate for the electronic component of the present invention may further include a second conductive portion filled in the second insulating layer through-hole, and the conductive portion may include the first conductive portion and the conductive portion metal portion. The second conduction portion. Further, the multilayer substrate for an electronic component according to the present invention may further include a second insulating layer having a second insulating layer through hole formed in the metal layer and disposed on the conductive portion, and being filled in the second insulating layer. In the second and second through portions of the hole, the conductive portion may have the ith conductive portion and the second conductive 邛 #. The second insulating layer is formed on the metal layer, and the conductive portion can be electrically connected to the conductive portion on the second insulating layer. An electrode or a wiring or the like is formed. 101111300 201248740 Furnace planting The pattern end of the above metal layer is bitten by the above insulating layer. In the present invention, the second insulating layer is widely insulated. That is, it is preferable that the coating layer is the insulating layer or the 笫2 insulating layer. This is because the manufacturing steps of the laminated substrate for electronic components can be simplified. Further, the laminated substrate for an electronic component of the present invention preferably further includes a third metal layer which is formed on the second insulating layer, is disposed to cover the opening of the metal layer, and is electrically connected to the second conductive portion. By arranging the third metal layer to cover the opening of the gold #, the penetration of moisture or oxygen can be inhibited. Furthermore, it is preferable that the laminated substrate for an electronic component of the present invention further includes an opening formed on the side opposite to the metal layer side of the insulating layer, and is disposed to cover the opening of the metal layer, and is electrically connected to the first conductive portion. 2 metal layers. By arranging the second metal layer to cover the opening of the metal layer, penetration of moisture or oxygen can be prevented. In particular, when the second metal layer and the third metal layer are disposed to cover the openings of the metal layer on both surfaces of the laminated substrate for electronic components of the present invention, the ruthenium effectively blocks the penetration of moisture or oxygen. Further, in the above invention, it is preferable that the second insulating layer contains polyimide. In this case, it is preferable that the second insulating layer has a component of the barrier imine. The second insulating layer is excellent in insulation, heat resistance, and dimensional stability. Further, by using polyimide as a main component, the thickness of the second insulating layer can be increased, and the thermal conductivity of the second insulating layer can be improved, and the heat dissipation property can be improved. Further, in the present invention, an adhesive layer containing an inorganic compound may be formed on the surface of the insulating layer opposite to the side of the metal layer. For example, when the multilayer substrate for an electronic component of the invention is used for a TFT element, the adhesion between the laminated substrate and the TFT element for an electronic component can be improved, and peeling or cracking of the TFT element can be prevented. Further, the present invention provides an electronic component comprising: the laminated substrate for the electronic component; the electronic component portion formed on the insulating layer of the laminated substrate for the electronic component; and a transparent seal disposed on the electronic component portion Substrate. According to the present invention, since the above-mentioned laminated substrate for electronic components is provided, the wiring can be taken out to the surface on the opposite side of the surface on which the electronic component portion is placed on the laminated substrate for electronic components, and the frame can be narrowed. Further, in the above invention, the above-mentioned invention, in which the above-mentioned electronic component portion can be a TFT element portion, can be satisfactorily excellent in the above-mentioned invention. The electronic component portion has: to make:. a back electrode layer on the edge layer, an EL layer formed on the surface electrode layer of the back electrode, and an organic EL element portion formed on the transparent layer formed on the EL layer; and a conductive layer of the laminated substrate for the electronic component The transparent electrode layer connected to the transparent electrode layer of the layer is connected to the conductive portion. The crucible may have a conductive portion for the back electrode layer of the back electrode layer. In addition to being connected to the above, the above-mentioned laminated substrate for electronic components has a heat dissipation property, which causes deterioration in performance due to heat generation of the EL element. In the above invention, the electronic component portion has a back electrode layer formed on the edge layer, and the display layer formed on the back surface of the back electrode screen, 101111300 13 201248740, and the display layer. The electronic paper element portion of the upper transparent electrode layer; the conductive portion of the laminated substrate for the electronic component may have a conductive portion for the transparent electrode layer connected to the transparent electrode layer and a back electrode layer connected to the back electrode layer Conduction. Further, the present invention provides an organic lead display device comprising: the laminated substrate for an electronic component; a TFT τ portion formed on the 彖 layer of the electron-emitting layer substrate; and the electronic component a back surface electrode layer connected to the TFT element portion on the insulating layer of the product substrate; an el layer having an organic light emitting layer formed on the back surface electrode layer; and an organic layer formed on the EL layer The el element portion and the transparent sealing substrate disposed on the organic EL element portion. According to the present invention, since the laminated substrate for the electronic component is provided, the wiring can be taken out to the surface of the laminated substrate for the electronic component. The surface on the opposite side can be narrowed to the frame. The barrier film of the electronic component substrate is excellent in heat resistance, so that the elemental property is well maintained and the heat generation of the organic EL element can be suppressed. Further, the present invention provides an electronic paper characterized by comprising: the laminated substrate for the above-mentioned element; formed on the electronic element a TFT TL member on the laminated substrate; a display layer formed on the insulating layer of the electronic component laminated substrate 5 and connected to the back surface electrode layer of the TFT element portion, and the back surface electrode layer of Xingcheng; The electronic paper element portion of the 'electrode layer on the display layer; and the 101111300 201248740 clear sealing substrate disposed on the electronic paper element portion. According to the present invention, since the laminated substrate for the electronic component is provided, the wiring can be taken out to the electronic component. The surface of the laminated substrate on the opposite side of the device can be (4) narrowly framed. Further, since the laminated substrate for the electronic tree is excellent in barrier properties, the device performance can be favorably maintained. Further, the present invention provides a laminated substrate for electronic components. The manufacturing method is characterized in that: a step of preparing a layered layer in which at least an insulating layer and a metal layer are laminated in sequence; and a step of forming a through hole of the insulating layer through hole in the upper layer; The metal layer is patterned while being formed on the through-hole of the upper margin layer and has a metal layer on the portion and disposed on a metal layer patterning step of the metal portion for the conductive portion on the through hole of the insulating layer; the step of patterning the insulating layer through the layer is performed in a different order. "Beton (four) light flash and the metal according to the present invention can be The patterning of the metal layer simultaneously forms the portion for the via portion, and the formation process of the via portion can be shortened. Is absolutely::=!: using the product _ reverse manufacturing method, preferably in the above-mentioned insulating layer "(four) step-by-step, after the granulation _ step" further has the formation of the insulating layer through hole month μ 1 conduction portion The step of reducing the thickness of the first conductive portion of the first conductive portion is as follows: the manufacturing method of the substrate is preferably formed by the step of forming the metal layer, and the second insulating layer of the second insulating layer is opened on the metal layer. a layer forming step and a second insulating layer through hole forming step of forming a second insulating layer through hole on the second insulating layer 101111300 201248740; in this case, before, after or simultaneously with the insulating layer through hole forming step In the second insulating layer through-hole forming step, an electrode or a wiring can be formed on the second insulating layer so as to be electrically connected to the conductive portion by forming the second insulating layer on the metal layer. In the manufacturing method, it is preferable that after the second insulating layer through-hole forming step, the second insulating portion forming step in which the second insulating layer through-hole is filled in the second conductive portion is preferably performed at the first conduction. Step formation The second conductive portion forming step is performed before, after, or at the same time. (Effect of the Invention) In the present invention, the effect of achieving both the barrier property and the narrow frame can be achieved. [Embodiment] Hereinafter, the laminated layer for electronic components of the present invention will be described. A method of manufacturing a substrate, an electronic device, an organic EL display device, an electronic paper, and a laminated substrate for an electronic component will be described in detail. [Layer. A laminated substrate for an electronic component] First, a laminated substrate for an electronic component of the present invention will be described. A laminated substrate for an electronic component using a laminated substrate for an electronic component is characterized in that: an insulating layer having a through hole of an insulating layer; a second conductive portion filled in the through hole of the insulating layer; and a pattern formed on the insulating layer The metal 101111300 16 201248740 having an opening in the above-mentioned first conductive portion has a conductive layer that conducts the above-described one conductive portion, and has a surface of the laminated substrate for the electronic component formed in the thickness direction of the electronic component laminated substrate. The first through portion; the conductive portion is not electrically connected to the metal layer. The metal layer is formed as #w, . . . , 疋 black a illusion layer is not formed on the entire surface of the laminated substrate for electronic components 'as shown in, for example, u ^ , ), (b), and FIG. 2 (a) ~ ( c) In the case where the metal layer 3 has the opening portion 13h, the m-item is the pattern: the edge; FIG. 1(a) is a cross-sectional view of the line AA of FIG. 1(b) 'Fig. & Sections 2(b) and (c) of the BB line, Fig. 1(b) and Figs. 2(b) and 2(c) are observed on the side of the metal layer 3 side of the laminated substrate 1 for electronic components. In the thickness direction of the laminated substrate for electronic components, when the laminated substrate for electronic components of the invention is used for an electronic component, the surface of the laminated portion is perpendicular to the surface in which the component is disposed. In the case of using the laminated substrate for an electric component of the present invention as an electronic component, the surface on which the electronic component portion is disposed and the surface opposite to the surface are used. The electronic component laminated substrate of the present invention can be classified into a PW type implementation. As shown in FIGS. 1(a) and 1(b), the first embodiment has an insulating layer 2 having an insulating layer through-hole i2h, and a first conductive portion 6 filled in the insulating layer through-hole; The insulating layer 2 is formed in a pattern, and the metal layer 3 having the σ portion 13h is formed in the first conductive portion 6; and the laminated substrate 1 for the electronic component is electrically connected to the thickness direction of the multilayer substrate 1 for electronic components. The table f has at least the conductive portion 7 of the first conductive portion 6; 101111300 201248740 The conductive portion 7 is not provided with the f sub-element (four) laminated substrate 1 that is electrically connected to the gold leg 3, and the electronic fine laminated substrate i is stepped into the step The conductive portion 3 is formed in the opening 13h of the metal layer 3, and is disposed on the first conductive portion 6 and is made of the same material as the metal layer 3; the conductive portion 7 has the above-mentioned conductive portion 7 The second conductive portion 6 and the laminated substrate j for electronic components of the upper conductive portion metal portion 8. In the second embodiment, as shown in Figs. 2 (8) to (8), the insulating layer 2 having an insulating layer through hole is provided, and the first conductive portion 6 filled in the insulating layer via m is applied to the insulating layer. The second layer is formed in a pattern, and the metal layer 3 having the opening 13h is formed in the first conductive portion 6; and the surface of the laminated substrate 1 for the electronic component is turned on in the thickness direction of the multilayer substrate 1 for electronic components. The conductive portion 7 having at least the first conductive portion 6; and the conductive portion 7 which is not electrically connected to the metal layer 3, and the conductive portion 7 are not described below. 1. The first embodiment of the sample <The laminated substrate for electronic components characterized by having an insulating layer having a hole in the edge layer; and the first conductive portion filled in the through hole of the upper material is formed in a pattern on the insulating layer, a first conductive portion having a metal layer of one turn; and a front surface of the laminated substrate for the electronic component formed in the dry direction of the electronic component, at least 'the conductive portion of the conductive portion; the conductive portion It is not connected to the above-mentioned metal 101111300 201248740 layer; the laminated substrate for electronic components further includes a material formed in the opening of the metal layer, disposed on the second conductive portion, and made of the same material as the metal layer. The conductive portion has a metal bit P; the conductive portion has the first conductive portion and the conductive portion metal portion. The laminated substrate for electronic components of the present embodiment will be described with reference to the drawings. Fig. 1 (a) and (b) are a schematic cross-sectional view and a plan view showing an example of a laminated substrate for an electronic component of the present embodiment, and Fig. 1 (8) is a view! (a) is a cross-sectional view taken along line a_a, and Fig. 1(b) is a plan view of the laminated substrate 1 for electronic components on the side of the metal. The laminated substrate for electronic components illustrated in FIGS. Ua) and (b) has an insulating layer 2 having an insulating layer through hole nh, a first conductive portion 6 filled in the insulating layer through hole (10), and an insulating layer 2; The upper portion is formed as a metal layer 3 having an opening in the i-th conductive portion 6; and is disposed on the i-th conductive portion 6 in the opening portion 13h formed in the metal layer 3, and is made of the same material as the metal layer 3. The metal portion 8 is formed as a conductive portion. Further, the conductive portion 7 is formed by the conductive portion metal portion 8 which is placed in the i-th conductive portion 6 of the insulating layer through-hole 12h. In the laminated substrate 1 for electronic components, the first conductive portion 6 is disposed on the opening 13h of the metal layer 3, and the metal portion 8 for the conductive portion is formed separately from the metal layer 3 in the opening portion 13h of the metal layer 3. Therefore, the metal layer 3 and the conductive portion 7 are not electrically connected. Therefore, the wiring can be taken out from the surface via the conduction portion 7 to the back surface 101111300 201248740. Fig. 3 is a schematic cross-sectional view showing another example of the laminated substrate for an electronic component of the embodiment. The laminated board 1 for electronic components illustrated in FIG. 3 has the laminated board 1 for electronic components of FIGS. Ua) and (b) further including a second layer formed on the metal layer 3 and having a metal portion 8 disposed on the conductive portion The insulating layer penetrates the second insulating layer 4 of the hole. The pattern end portion i3s of the metal layer 3 is insulated by the coating layer (the second insulating layer 4 in Fig. 3), and the portion other than the metal portion 8 for the conduction portion in the opening portion I3h of the metal layer 3 is covered by the coating layer (Fig. 3 It is filled in the second insulating layer 4). In the laminated substrate 1 for the sinus electronic component, the first conductive portion 6 is disposed on the opening 13h of the metal layer 3, and the conductive portion metal portion 8 is formed separately from the metal layer 3 in the opening 13h of the metal layer 3. The portion other than the metal portion 8 for the conduction portion in the opening portion 13h of the metal layer 3 is filled with the coating layer (the second insulating layer 4 in FIG. 3), so that the metal layer 3 and the conduction portion 7 are not electrically connected. Therefore, the wiring can be taken out to the back surface by the surface via the conduction portion 7. Fig. 4 is a schematic cross-sectional view showing another example of the laminated substrate for an electronic component of the embodiment. The laminated substrate for electronic components illustrated in FIG. 4 is in the multilayer substrate i for electronic components shown in FIGS. 1(a) and 1(b), and the pattern end portion 13s of the metal layer 3 is covered by a coating layer (in FIG. 4 The second insulating layer 4) is insulated, and a portion other than the conductive portion metal portion 8 in the opening portion i3h of the metal layer 3 is filled with a coating layer (the second insulating layer 4 in Fig. 4). In the laminated substrate 1 for electronic components, the first conductive portion 6 is disposed on the opening 13h of the layer 3 of the metal 101111300 20 201248740, and the metal portion 8 for the conductive portion is formed in the opening 13h of the metal layer 3 with respect to the metal layer 3. Since the portion other than the metal portion 8 in the opening portion 13h of the metal layer 3 is filled with the coating layer 15, the metal layer 3 and the conduction portion 7 are not electrically connected. Therefore, the wiring can be taken out to the back surface by the surface via the conduction portion 7. 5(a) and 5(b) are a schematic cross-sectional view and a plan view showing another example of the laminated substrate for an electronic component of the present embodiment, and Fig. 5(a) is a cross-sectional view taken along line DD of Fig. 5(b). (b) is a plan view of the laminated substrate 1 for electronic components viewed from the surface on the second insulating layer 4 side. The laminated substrate 1 for electronic components illustrated in Fig. 5 (a) and (b) further includes a second conductive portion 10 filled in the second insulating layer through-hole 14h. The conductive portion 7 is composed of a first conductive portion 6 that is filled in the insulating layer through hole 12h, and is formed in the opening portion 13h of the metal layer 3, and is disposed on the first conductive portion 6, and is connected to the metal layer 3 The conductive portion metal portion 8 composed of the same material and the second conductive portion 10 filled in the second insulating layer through hole 14h. In the laminated substrate 1 for electronic components, the first conductive portion 6 is disposed on the opening 13h of the metal layer 3, and the conductive portion metal portion 8 is formed separately from the metal layer 3 in the opening 13h of the metal layer 3. The second conductive portion 10 is disposed on the conductive portion metal portion 8, and the portion other than the conductive portion metal portion 8 in the opening portion 13h of the metal layer 3 is a coating layer (the second insulating layer in FIG. 5(a)) 4) Filled, the metal layer 3 and the conductive portion 7 are not turned on. Therefore, the wiring can be taken out to the back surface by the surface via the conduction portion 7 at 101111300 21 201248740. Fig. 6 is a schematic cross-sectional view showing an example of an organic EL element including a laminated substrate for an electronic component according to the embodiment. The organic EL element 21 shown in Fig. 6 includes the multilayer substrate 1 for electronic components illustrated in Figs. 5(a) and 5(b). The organic EL element 21 includes a laminated substrate 1 for electronic components, an organic EL element portion 20 formed on the insulating layer 2 of the laminated substrate 1 for electronic components, and a transparent sealing substrate 25 disposed on the organic EL element portion 20; The laminated portion 1 for the electronic component and the transparent sealing substrate 25 are bonded to each other to seal the sealing portion 26 of the element. The organic EL element portion 20 has a back electrode layer 22, an EL layer 23 formed on the back electrode layer 22, an organic light-emitting layer, and a transparent electrode layer 24 formed on the EL layer 23. Among the two conductive portions 7a and 7b of the laminated substrate 1 for electronic components, one of the back electrode layer conductive portions 7a is connected to the back electrode layer 22, and the other transparent electrode layer conductive portion 7b is connected to the transparent electrode layer. twenty four. This organic EL element 21 is a top emission type in which the light emission L is taken out from the side of the transparent sealing substrate 25. In addition, the laminated substrate for electronic components of the present embodiment includes an organic EL element and can be used for electronic components such as electronic paper and TFT elements. Fig. 7 is a schematic cross-sectional view showing another example of the organic EL element including the build-up substrate for an electronic component of the embodiment. In the organic EL element 21 illustrated in FIG. 7 , the laminated substrate 1 for electronic components further includes the multilayer substrate 1 for electronic components illustrated in FIGS. 5( a ) and 5 ( b ) and the metal layer 3 formed on the insulating layer 2 . The surface on the opposite side is disposed so as to cover the openings 101111300 22 201248740 of the metal layer 3, the second metal layer μ which is electrically connected to the first conductive portion 6, and the second insulating layer 4 are disposed on the second insulating layer 4 The opening of the metal layer 3 is covered, and the third metal layer 17 that is turned on by the second is turned on. Further, the second insulating layer 4 is formed as a patterned skin with respect to the metal layer 3, and the second insulating layer 4 is not present on the surface of the metal layer 3, and the metal layer exposed by the metal layer 3 is provided. The area 11a is exposed. The organic EL element 21 has a transparent organic substrate 27, an organic EL element portion 20 formed on the transparent substrate 27, a laminated substrate 1 for electronic components disposed on the organic EL element portion 20, and an organic member formed thereon. The transparent substrate 27 of the portion 20 and the electronic component are laminated with a sealing portion 26 which is adhered to the earth wind i to seal the element. The organic EL element portion 20 is a transparent electrode layer 24 formed on the transparent electrode layer 24, and includes an organic light-emitting layer 23; and a back electrode layer 22 formed on the EL layer 23. In the two conductive portions 7a and 7b of the laminated substrate i for the device, the conductive portion 7b for the transparent electrode layer is connected to the transparent electrode layer 24, and the jC surface electrode layer is provided. The conductive portion 7a is connected to the back electrode layer 22. This organic EL element 2i is a bottom emission type in which the light emission L is taken out from the side of the transparent substrate 27. When the laminated substrate for electronic components of the present embodiment is used for an electronic component such as an organic EL device, a paper, or a TFT element, the wiring can be taken out to the surface of the laminated substrate for the electronic component. Side face. In the case where the laminated substrate for an electronic component of the present embodiment is used for an organic EL device or electronic paper, the light-emitting region or the display region can be sufficiently increased. By this, a narrow frame can be achieved. In particular, it is advantageous for the case of performing multiple de-angles. In the case of 101111300 23 201248740, a TFT element can be disposed on one surface of a laminated substrate for electronic components, and an organic EL element or electronic paper can be disposed on the other surface. In addition, the metal layer-like gas barrier property is excellent, and the laminated substrate for electronic components of the present embodiment is such that the metal layer n insulating layer is laminated, so that the penetration of moisture or oxygen can be reduced as compared with the case where the resin layer is alone. . Therefore, when the laminated substrate for an electronic component of the present embodiment is used for the above electronic component, deterioration of the element due to moisture or oxygen can be suppressed. Further, when the laminated substrate for electronic components of the present embodiment is used for electronic paper, the humidity inside the device can be kept constant, and the change in the negative electric state due to the change in humidity can be suppressed, and good display characteristics can be obtained. Generally, the metal layer is excellent in gas barrier properties and excellent in thermal conductivity. Therefore, in the laminated substrate for electronic components of the present embodiment, moisture or oxygen is highly shielded, and heat can be quickly conducted or radiated. Therefore, when the laminated substrate for electronic components of the present embodiment is used for an organic EL device, the material property is high, and it is possible to suppress the adverse effect due to heat generation, to achieve uniform light emission without unevenness in light emission, and to shorten the life. Or component destruction. Further, in this case, since the gas barrier property of the electronic component substrate is excellent, the penetration of moisture or oxygen from the side of the laminated substrate for the electronic component can be reduced, and the light-emitting characteristics can be stably maintained for a long period of time. Further, when the metal layer exposed region (1) is provided as illustrated in Fig. 7, the heat dissipation property of the laminated substrate for electronic components can be improved. Therefore, in the case of using the laminated organic EL element for an electronic component of the present embodiment, performance deterioration due to heat generation of the organic EL element can be effectively suppressed. 101111300 24 201248740 Further, when the second metal layer 16 and the third metal layer 17 are disposed on the side of the opening of the metal layer 3 as shown in FIG. 7, the laminated substrate can be electrically connected to the element. The metal layer, the conductive portion, the $2 metal layer, and the third metal layer are not removed in the thickness direction, and the moisture or gas is effectively blocked.

透。在將本實施態樣之電子元件用積層基板使用作為將的穿由上方進行密封的密封基板時，特佳係依被覆金屬層之疋件部之方式配置第2金屬層及第3金屬層。之開D 再者，本實施態樣中，由於具有金屬層，故可提高因此，在將本發明之電子元件㈣層基㈣於度。元件時，可提升耐久性。又電子另外，本實施態樣中，由於導通部用金屬部係由與相同之材料所構成，故可在金屬層之圖案化的同時形成屬層部用金屬部，可縮短步驟。亦即，藉由對金屬層進如導通可同時形成金屬層之加工與導通部用金屬部之形成^刻’ 圖案化前之金屬層作為給電層而進行電料，何缩^暮將部之形成製程。 ' a導通再者’本實施態樣中，在製作電子元件用積層基板時，於在金屬層上㈣㈣法形成絕緣層或第2絕緣層的情況，可提升絕緣層或第2絕緣層的平滑性。另外，本實施態樣中，在使用銀f等之導電膏形成第i 導通部或第2導通部時，可進—步縮短製程的步驟數。以下’針對本實施態樣之電子元件用積層基板之各構成進 101111300 25 201248740 行說明。 (1)絕緣層本實施態樣之絕緣層係具有配置絕緣層貫通孔者。、屬層之開口部上的一般而言，相較於無機材料，有大的傾向，故絕緣層之線熱膨脹係數最好為較== 疋性佳係絕緣層之線熱膨〇Ppm/C〜3Gppm/C的範_。當線熱膨脹係數過大，則溫度變化時所產生之伸縮會變大，故對尺寸穩定性造成不良影響。另外，絕緣層係由尺寸穩定性的觀點而言，較佳係絕緣層之線熱膨脹係數與金屬層之線熱膨脹係數的差為i5ppm/t)c 以下、更佳10ppm/t：以下、再更佳5ppm/〇c以下。絕緣層與金屬層之線熱膨服係數越接近’則越抑制電子元件用積層基板之曲翹，且在電子元件用積層基板之熱環境發生變化時，絕緣層與金屬層間之界面的應力變小、提升密黏性。又，本貫施態樣之電子元件用積層基板於操作方面，較佳係在〇°C〜100°c之範圍的溫度環境下不曲翹，但若因絕緣層之線熱膨脹係數較大而絕緣層與金屬層之線熱膨脹係數的差大幅相異’則電子元件用積層基板因熱環境變化而發生曲紐。尚且’所謂於電子元件用積層基板不發生曲輕，係指將電子元件用積層基板切出成寬10mm、長5〇mm的短片狀，將 101111300 26 201248740 所得樣本之一短邊固定於水平且平滑之台上時，樣本之另一短邊由台表面的上浮距離為1.0mm以下。例如’在重視電傳導性、熱傳導性的情況，較佳係於金屬層使用銅、銀、鋁，故此時，絕緣層之線熱膨脹係數最好與銅、銀、鋁之線熱膨脹係數間的差較小。另外’絕緣層之線熱膨脹係數並不限於金屬層，較佳係與後述之第2金屬層、第3金屬層、電子元件部、密黏層、電極及佈線等之形成於絕緣層上之層的線熱膨脹係數接近。若絕緣層之線熱膨脹係數與形成於絕緣層上之層的線熱膨脹係數相異，則尺寸穩定性降低且成為曲翹或裂痕的原因。在形成於絕緣層上之層為以Zn、In、Ga、Cd、Ti、St、Sn、 Te、Mg、w、Mo、Cu、A1、Fe、Sr、Ni、Ir、Mg 等之金屬之氧化物或Si、Ge、B等之非金屬之氧化物或上述元素之氮化物、硫化物、硒化物及此等之混合物（亦包括由多元素所構成之陶莞般依原子等級所混合者）等的無機材料作為主成分時，由於此等無機材料中亦包括線熱膨脹係數為 10ppm/°c以下者，故較佳係絕緣層之線熱膨脹係數亦較小。絕緣層之線熱膨脹係數係視金屬層之種類而異，但較佳為 Oppm/C〜18ppm/C之範圍内、更佳Oppm/t〜12ppm/°C之範圍内、特佳Oppm/°C〜7ppm/°C之範圍内。尚且，線熱膨脹係數係如下述般進行測定。首先，製作僅有絕緣層的薄膜。絕緣層薄膜之製作方法係於耐熱薄膜 101111300 27 201248740 (UPILEX S 50S(宇部興產(股)製))或玻璃基板上製作了絕緣層薄膜後，剝離絕緣層薄膜的方法，或於金屬基板上製作了絕緣層薄膜後，將金屬藉蝕刻予以去除而得到絕緣層薄棋％方法等。接著，將所得之絕緣層薄膜切斷為寬5mmx長 20mm，作成評價樣本。線熱膨脹係數係藉由熱機械分析事置(例如Thermo Plus TMA8310(Rigaku公司製))所測定。測定條件係設成升溫速度為10°C /min，依評價樣本之剖面單位面積之加重相同的方式將拉張加重設為1δ/25〇〇〇μιη2，將 100°C〜200°C範圍内之平均之線熱膨脹係數作為線熱膨脹係數(C.T.E.)。絕緣層係具備絕緣性者。具體而言，絕緣層之體積電阻較佳為1.0χ109Ω · m以上，更佳ι.〇χΐ〇10Ω · m以上，再更佳 1·〇χ10ηΩ · m 以上。尚且，體積電阻可藉由根據JIS K69n、JIS C2318、ASTM D2 5 7專之規格的手法進行測定。於絕緣層上係有形成構成電極、佈線或電子元件部之層中厚度為150nm以下之層的情形，故絕緣層最好具有表面平滑性。具體而言，作為絕緣層之表面粗度Ra，係較金屬層之表面粗度Ra越小越好，較佳為i〇nm以下、特佳化爪以上、更佳2nm以下。例如在將本實施態樣之電子元件用積層基板用於TFT元件時，若絕緣層之表面粗度尺3過大，則有因凹凸而TFT元件之電氣性能劣化之虞。又習知在半 101111300 28 201248740 導體裝置等之電子裝置中所使用的佈線基板中，係重視絕緣層與形成於絕緣層上之層（主要為金屬佈線層）間的密黏強度。若絕緣層之表面平滑性高，則有與絕緣層上所形成之層間的密黏性降低的傾向，故為了提高密黏性，絕緣層之表面平滑性最好不過高。另一方面，本發明中，為了防止因凹凸所造成之TFT元件的電氣性能劣化，較佳係絕緣層具有表面平滑性。尚且’上述表面粗度Ra係使用原子間力顯微鏡(AFM)所測定之值。例如，於使用AFM進行測定時，係使用Nanoscopethrough. When the laminated substrate for electronic components of the present embodiment is used as a sealing substrate which is sealed by the upper side, it is particularly preferable to arrange the second metal layer and the third metal layer so as to cover the metal portion of the metal layer. Further, in the present embodiment, since the metal layer is provided, the metal element (4) of the present invention can be improved. When the components are used, durability can be improved. Further, in the present embodiment, since the metal portion for the conduction portion is made of the same material, the metal portion for the layer portion can be formed while patterning the metal layer, and the step can be shortened. In other words, by forming a metal layer while conducting the metal layer, and forming a metal layer for the conductive portion, the metal layer before the patterning is used as the power supply layer for the electric material, and Form the process. In the case of producing a laminated substrate for an electronic component, when the insulating layer or the second insulating layer is formed on the metal layer by the method of (4) (4), the smoothing of the insulating layer or the second insulating layer can be improved. Sex. Further, in the present embodiment, when the i-th conductive portion or the second conductive portion is formed using a conductive paste such as silver f, the number of steps of the process can be further shortened. Hereinafter, the respective configurations of the laminated substrate for electronic components of the present embodiment will be described in the description of 101111300 25 201248740. (1) Insulating layer The insulating layer of this embodiment has a through hole in which an insulating layer is disposed. Generally speaking, the opening portion of the genus layer has a large tendency compared with the inorganic material, so the coefficient of thermal expansion of the insulating layer is preferably the thermal expansion coefficient Ppm/C of the insulating layer. ~3Gppm/C van _. When the coefficient of thermal expansion of the wire is too large, the expansion and contraction generated when the temperature changes will become large, which adversely affects dimensional stability. Further, the insulating layer is preferably a difference in dimensional stability between the linear thermal expansion coefficient of the insulating layer and the linear thermal expansion coefficient of the metal layer of i5 ppm/t) c or less, more preferably 10 ppm/t: or less, and furthermore. Good 5ppm / 〇c or less. The closer the thermal expansion coefficient of the insulating layer to the metal layer is, the more the curvature of the laminated substrate for the electronic component is suppressed, and the stress at the interface between the insulating layer and the metal layer changes when the thermal environment of the laminated substrate for the electronic component changes. Small, enhanced adhesion. Further, the laminated substrate for an electronic component according to the present embodiment is preferably in a temperature range of 〇 ° C to 100 ° C in operation, but if the coefficient of thermal expansion of the insulating layer is large, The difference in thermal expansion coefficient between the insulating layer and the metal layer is greatly different, and the laminated substrate for electronic components is bent by the thermal environment. In addition, the laminated substrate for electronic components is not thinned, and the laminated substrate for electronic components is cut into a short sheet having a width of 10 mm and a length of 5 mm, and one of the short-side samples of 101111300 26 201248740 is fixed at a horizontal level. When the table is smoothed, the other short side of the sample has a floating distance of 1.0 mm or less from the surface of the table. For example, in the case of paying attention to electrical conductivity and thermal conductivity, it is preferable to use copper, silver, and aluminum in the metal layer. Therefore, the difference between the thermal expansion coefficient of the insulating layer and the thermal expansion coefficient of copper, silver, and aluminum is preferable. Smaller. Further, the coefficient of thermal expansion of the insulating layer is not limited to the metal layer, and is preferably a layer formed on the insulating layer, such as a second metal layer, a third metal layer, an electronic component portion, an adhesive layer, an electrode, and a wiring, which will be described later. The linear thermal expansion coefficient is close. If the linear thermal expansion coefficient of the insulating layer is different from the linear thermal expansion coefficient of the layer formed on the insulating layer, dimensional stability is lowered and it is a cause of warping or cracking. The layer formed on the insulating layer is oxidized by a metal such as Zn, In, Ga, Cd, Ti, St, Sn, Te, Mg, w, Mo, Cu, Al, Fe, Sr, Ni, Ir, Mg, or the like. a non-metallic oxide of Si or Ge, B, or the like, or a nitride, a sulfide, a selenide of the above elements, and a mixture thereof (including a mixture of multi-element and aquarium-like atomic grades) When the inorganic material is used as the main component, since the inorganic material also includes a linear thermal expansion coefficient of 10 ppm/° C or less, the linear thermal expansion coefficient of the insulating layer is preferably small. The thermal expansion coefficient of the insulating layer varies depending on the type of the metal layer, but is preferably in the range of Oppm/C to 18 ppm/C, more preferably in the range of Oppm/t to 12 ppm/°C, and particularly preferably Oppm/°C. Within the range of ~7ppm/°C. Further, the coefficient of linear thermal expansion was measured as follows. First, a film having only an insulating layer is produced. The method for producing the insulating layer film is a method of peeling off the insulating layer film after the insulating film is formed on the heat-resistant film 101111300 27 201248740 (UPILEX S 50S (made by Ube Industries Co., Ltd.) or the glass substrate, or on the metal substrate After the insulating layer film is formed, the metal is removed by etching to obtain an insulating layer thin method. Next, the obtained insulating layer film was cut into a width of 5 mm x a length of 20 mm to prepare an evaluation sample. The linear thermal expansion coefficient is measured by a thermomechanical analysis (e.g., Thermo Plus TMA8310 (manufactured by Rigaku Corporation)). The measurement conditions are such that the temperature increase rate is 10 ° C / min, and the tensile weight is set to 1 δ / 25 〇〇〇 μ η 2 in the same manner as the weight per unit area of the evaluation sample, and the temperature is in the range of 100 ° C to 200 ° C. The average linear thermal expansion coefficient is taken as the coefficient of linear thermal expansion (CTE). The insulating layer is insulated. Specifically, the volume resistance of the insulating layer is preferably 1.0 χ 109 Ω · m or more, more preferably ι. 〇χΐ〇 10 Ω · m or more, and even more preferably 1 · 〇χ 10 η Ω · m or more. Further, the volume resistance can be measured by a method according to the specifications of JIS K69n, JIS C2318, and ASTM D2 5 7 . In the case where a layer having a thickness of 150 nm or less in the layer constituting the electrode, the wiring or the electronic component portion is formed on the insulating layer, the insulating layer preferably has surface smoothness. Specifically, the surface roughness Ra of the insulating layer is preferably as small as the surface roughness Ra of the metal layer, and is preferably i 〇 nm or less, more preferably more than 2 nm, more preferably 2 nm or less. For example, when the laminated substrate for an electronic component of the present embodiment is used for a TFT element, if the surface roughness of the insulating layer is too large, the electrical properties of the TFT element are deteriorated due to irregularities. Further, in the wiring board used in an electronic device such as a conductor device, it is also known that the adhesion strength between the insulating layer and the layer (mainly a metal wiring layer) formed on the insulating layer is emphasized. When the surface smoothness of the insulating layer is high, the adhesion to the layer formed on the insulating layer tends to be lowered. Therefore, in order to improve the adhesion, the surface smoothness of the insulating layer is preferably not too high. On the other hand, in the present invention, in order to prevent deterioration of electrical properties of the TFT element due to unevenness, it is preferred that the insulating layer have surface smoothness. Further, the above surface roughness Ra is a value measured by an atomic force microscope (AFM). For example, when using AFM for measurement, use Nanooscope

Vmultimode(Veeco 公司製），依敲拍模式(tapping mode)，以懸臂：MPP11100、掃瞄範圍：1〇μιηχ1〇μιη、掃瞄速度：〇 5Hz，對表面狀形進行攝影，算出距離所得影像所算出之粗度曲線的中心線的平均偏差，藉此可求取Rae 絕緣層中所使用的材料若為可形成絕緣層貫通孔、滿足上述特性者則無特別限定，可舉例如聚醯亞胺、酚樹脂pps(聚苯硫）、PPE(聚伸笨基峻）、PEK(聚崎綱）、pEEK(聚喊醚剛、Vmultimode (made by Veeco), according to the tapping mode, the cantilever: MPP11100, scanning range: 1〇μιηχ1〇μιη, scanning speed: 〇5Hz, the surface shape is photographed, and the distance obtained is calculated. The average deviation of the center line of the calculated roughness curve is determined by the fact that the material used in the Rae insulating layer is a through hole capable of forming an insulating layer, and the above characteristics are not particularly limited, and for example, polyimine Phenol resin pps (polyphenyl sulphide), PPE (poly-extension), PEK (Jusaki), pEEK (polyether ether,

其中，絕緣層較佳係含有聚醯亞胺，為主成分。此係由於可作成絕緣性、而 1安，特佳係以聚醯亞胺作、耐熱性、尺寸穩定性優 101111300 29 201248740 越的絕緣層。又，藉由以聚醯亞胺作為主成分，則可使絕緣層薄膜化’提升絕緣層之熱傳導性，可作成熱傳導性優越的電子元件用積層基板。又，在如後述般減小絕緣層貫通孔之徑時，較佳係絕緣層之厚度較薄，在減薄絕緣層時，由絕緣性之觀點而言最好使用聚醯亞胺。尚且’所謂絕緣層以聚醯亞胺作為主成分，係指依滿足上述特性的程度，使絕緣層含有聚醯亞胺。具體而言，係指絕緣層中之聚醯亞胺之含量為75質量。/。以上的情況，較佳為 90質量％以上，特佳係絕緣層僅由聚醢亞胺所構成。若絕緣層中之聚醯亞胺含量為上述範圍内，則可顯示用於達成本發明目的的充分特性，聚醯亞胺之含量越多，則聚醯亞胺原本之耐熱性或絕緣性等之特性越良好。一般聚醯亞胺係具有吸水性。有機EL元件、電子紙、TFT 元件等之電子元件中所使用的半導體材料大多對水分呈較弱，或於電子紙中必須將元件内部濕度保持為一定，故為了減低元件内部水分、於濕氣存在下實現高可靠性，較佳係絕緣層之吸水性為較小。作為吸水性之指標之一，為吸濕膨脹係數。因此，絕緣層之吸濕膨脹係數越小越佳，具體而言，較佳為0ppm/%RH〜15ppm/〇/〇RH之範圍内，更佳為 0ppm/%RH〜12ppm/%RH 之範圍内，再更佳為 0ppm/%RH〜10ppm/%RH的範圍内。吸濕膨脹係數越小，則吸水性越小。又’若絕緣層之吸濕膨脹係數為上述範圍，則 101111300 30 201248740 絕緣層之吸水性可充分減小，火八阻絕性。又’電子it件用積層基板容穿:用== 係數越小，献寸穩紐越科。績。又’吸濕膨脹右絕緣層之吸濕膨脹係數較大’則因與吸濕％脹係數幾乎差，有隨著濕度上昇而電子元層間的膨服率積層基板曲勉、咬絕緣層與金屬層間之密黏性降低的情形。 I次、、邑緣層月心因此，在製造過程中進行濕式製程時，較佳亦吸濕膨脹係數較小。尚且，吸濕膨脹係數係如下述般進行測定。首先’製作僅有絕緣層的薄膜。絕緣層薄膜的製作方法係如上述。接著，將所得之絕緣層薄膜娥成寬5_長2G_，作成評價樣本。吸濕膨脹係數係藉濕度可變機械式分析裝置仰_ plus TMA831G(Rigaku公司製))所狀。例如將溫度固定為饥，首&，於濕度15%RH環境下使樣本呈穩定狀態，將此狀態保持約3G分〜2小時後，將測定部位的濕度設為 20〇/〇RH，再使樣本依此狀態保持3〇分〜2小時直到其呈穩定。其後’使濕度變M mRH，將其轉料之樣本^ 與在20。細下呈穩定狀料之樣本長的差、除以濕度變化 (此情況下為50 —20的30)，將該值再除以樣本長的值作為吸濕膨脹係數(C.H.E.)。測定時，依使評價樣本之單位剖面積之加重成為相同的方式，將拉張加重設為lg/25〇〇^m2。作為構成絕緣層之聚醯亞胺’若滿足上述特性者則無特別 101111300 201248740 限定。例如，藉由適當選擇聚醯亞胺的構造，則可抑制吸濕膨脹係數或線熱膨脹係數。作為聚醯亞胺，由使絕緣層之線熱膨脹係數或吸濕膨脹係數適合於本實施態樣之電子元件用積層基板的觀點而言，較佳係含有芳香族骨架之聚醯亞胺。聚醯亞胺中，含有芳香族骨架之聚醯亞胺係因其剛直而呈高平面性骨架，故耐熱性或薄膜的絕緣性優越，線熱膨脹係數亦較低，因此適合使用於本實施態樣之電子元件用積層基板的絕緣層。一般之聚醯亞胺係具有下式（1)所示的重複單位。 [化1]Among them, the insulating layer preferably contains polyamidene as a main component. This is because it can be made into an insulating property and is 1 ampere. It is excellent in heat resistance and dimensional stability. The insulating layer is 101111300 29 201248740. Further, by using polyimide as a main component, the insulating layer can be thinned to increase the thermal conductivity of the insulating layer, and a laminated substrate for an electronic component excellent in thermal conductivity can be obtained. Further, when the diameter of the through hole of the insulating layer is reduced as will be described later, the thickness of the insulating layer is preferably thin, and when the insulating layer is thinned, it is preferable to use polyimide from the viewpoint of insulating properties. Further, the term "insulating layer" as a main component of polyimine means that the insulating layer contains polyimine in such a manner as to satisfy the above characteristics. Specifically, it means that the content of the polyimine in the insulating layer is 75 mass. /. In the above case, it is preferably 90% by mass or more, and the particularly preferred insulating layer is composed only of polyimine. If the content of the polyimine in the insulating layer is within the above range, sufficient characteristics for achieving the object of the present invention can be exhibited, and the more the content of the polyimine, the heat resistance or the insulating property of the polyimide. The better the characteristics. Generally, the polyimine has water absorption. The semiconductor materials used in electronic components such as organic EL devices, electronic papers, and TFT devices are often weak in moisture, or the internal humidity of the components must be kept constant in electronic paper. Therefore, in order to reduce moisture and moisture in the components. In the presence of high reliability, it is preferred that the water absorption of the insulating layer is small. As one of the indexes of water absorption, it is a coefficient of hygroscopic expansion. Therefore, the smaller the hygroscopic expansion coefficient of the insulating layer, the more preferable, specifically, the range of 0 ppm/% RH to 15 ppm/〇/〇RH, more preferably 0 ppm/% RH to 12 ppm/% RH. Further, it is more preferably in the range of 0 ppm/% RH to 10 ppm/% RH. The smaller the coefficient of hygroscopic expansion, the smaller the water absorption. Further, if the coefficient of hygroscopic expansion of the insulating layer is within the above range, the water absorption of the insulating layer of 101111300 30 201248740 can be sufficiently reduced, and the fire resistance is extremely resistant. In addition, the electronic substrate is covered by a laminated substrate: the smaller the == coefficient, the more stable the key is. Performance. In addition, the hygroscopic expansion coefficient of the right-absorbing layer of the moisture absorption expansion is almost the same as the coefficient of moisture absorption and the coefficient of expansion of the moisture absorption layer, and the expansion ratio between the layers of the electron element increases the substrate curve, the bite insulation layer and the metal. The case where the adhesion between the layers is lowered. For the first time, the edge of the rim layer is also preferred. When the wet process is carried out during the manufacturing process, it is preferred that the coefficient of hygroscopic expansion is small. Further, the coefficient of hygroscopic expansion was measured as follows. First, a film having only an insulating layer was produced. The method for producing the insulating layer film is as described above. Next, the obtained insulating layer film was kneaded into a width of 5 mm to 2 G_ to prepare an evaluation sample. The coefficient of hygroscopic expansion is in the form of a humidity-variable mechanical analyzer, _plus TMA831G (manufactured by Rigaku Co., Ltd.). For example, the temperature is fixed to hunger, first &, in a humidity of 15% RH environment to stabilize the sample, this state is maintained for about 3G minutes ~ 2 hours, the humidity of the measurement site is set to 20 〇 / 〇 RH, and then The sample was kept in this state for 3 minutes to 2 hours until it was stable. Thereafter, the humidity is changed to M mRH, and the sample to be transferred is set at 20. The difference in sample length of the stable material is divided by the change in humidity (in this case, 30 to 50-20), and the value is divided by the sample length as the coefficient of hygroscopic expansion (C.H.E.). In the measurement, the weighting of the unit profile of the evaluation sample is made the same, and the tensile weighting is set to lg/25〇〇^m2. The polyimine which constitutes the insulating layer is not limited to 101111300 201248740 if it satisfies the above characteristics. For example, by appropriately selecting the structure of the polyimine, the coefficient of hygroscopic expansion or the coefficient of linear thermal expansion can be suppressed. In view of the fact that the linear thermal expansion coefficient or the hygroscopic expansion coefficient of the insulating layer is suitable for the laminated substrate for an electronic component of the present embodiment, the polyimide having an aromatic skeleton is preferably a polyimine. Among the polyimines, the polyimine containing an aromatic skeleton is a highly planar skeleton because of its rigidity, so that the heat resistance or the insulating property of the film is excellent, and the linear thermal expansion coefficient is also low, so that it is suitable for use in the present embodiment. An insulating layer of a laminated substrate for an electronic component. The general polyimine has a repeating unit represented by the following formula (1). [Chemical 1]

(式(I)中，R1為4價有機基，R2為2價有機基，重複之R1 彼此及R2彼此分別可為相同或相異。η為1以上之自然數。）式(I)中，一般R1為來自四羧酸二酐的構造，R2為來自二胺的構造。作為聚醯亞胺可應用的四羧酸二酐，可舉例如：乙烯四羧酸二酐、丁烷四羧酸二酐、環丁烷四羧酸二酐、甲基環丁烷四羧酸二酐、環戊烷四羧酸二酐等之脂肪族四羧酸二酐；焦蜜石酸二酐、3,3’，4,4’-二苯基酮四羧酸二酐、2,2’，3,3’-二苯基酮四羧酸二酐、2,3’，3,4’-二苯基酮四羧酸二酐、3,3’,4,4’- 101111300 32 201248740 聯笨基四齡t —、2,2，，3,3，·聯笨基四叛酸二針、2,3，，3,4，_ 聯苯基四駿酉夂一軒、2,2，，6,6，_聯苯基四敌酸二針、2,2-雙(3,4_ 二敌基笨基）㈣m雙〇二絲苯細烧二酐、雙(3,4-二幾基笨_二肝、雙(3,4-二缓基苯基)颯二針、u_ •雙(2,3·二減苯基）乙院二酐、雙(2,3·二羧基苯基）曱烧二 .酉卜雙(3,4·二緩基苯基）曱烧二軒、2,2_雙(3,4_二觀基苯基）U，l，3,3,3-六氟丙烷二酐、2,2-雙仏3二羧基苯苯酐1，4_雙[(3,4-二羧基）苯曱醯基]苯二酐、2,2_雙 ^ [ (1,2 一羧基)苯氧基]苯基}丙烷二野、2,2_雙{4-[3-(1，2· -竣基)苯氧基]苯基}丙烧：^雙㈣似：細苯氧基] 苯基}酮二酐、雙{4_[3_(H幾基)苯氧基]苯基}酮二野、 4’4 -雙[4-(1，2_二緩基)苯氧基]聯苯二酐、Μ、雙叫口-工羧基)苯氧基]聯苯二肝、雙(4仰，2_二幾基)苯氧基]苯基}酮酐雙{4-[3-(1，2-二缓基）苯氧基]苯基}嗣二針、雙 Η [4 (1，2-一羧基）苯氧基]苯基p風二肝、雙（叩_(1，2二羧基)苯氧基]笨_二酐、雙(4仰，2_二絲)苯氧基]苯基）硫越二酐、雙㈣_(H縣)苯氧基]苯基）硫趟二軒心雙仲-(1，2_二細苯氧基]苯基…山切·六氣丙燒二酐、2,2-雙{4.[3_(1，2_二絲)苯氧基]苯基…山3,3,3_六氟丙烧二肝、2,3,6,7·萘四幾酸二奸、U，l，3,3,3-六氟_2,2_雙 (2,3-或3,4-二羧基苯基）丙烷二酐、丨兑认萘四羧酸二酐、 101111300 33 201248740 1，2,5,6-萘四緩酸二軒、1234^· 、，知一听^3,4-本四羧酸二酐、3,4,9，1〇-茈四羧西文一酐、2,3,6,7_蒽四羧酸二 ^ r 12,7,8-菲四竣酸二酐、吼0四竣酸二肝、續酿基二醜酸軒、間聯三苯基-3,3’4 4’-四魏二軒、對聯三苯基_3,3，，4,4，,賴讀、9,9_雙_，(三氣甲基)咖1四賴umu氟曱基)如星四缓酸二酐 y2m12，14·雙(4 竭·，_，7_二4 稠五本-2,3,9，10-四羧酸二酐、n 四氟苯二@卜14_雙（：氣，一—_本氧基）氟曱土）-，3,5,6-苯四羧酸二軒、對 - π 呀對伸本基雙本偏三酸單酯酸 -肝^聯伸本基雙苯偏三酸單㈣二酐等之芳香族四魏酐4。此村單獨或混合2種以上使用。另方面聚醯亞胺中可應用的二胺成分，亦可單獨使用 1種-或併用2種以上之二胺。所使用之二胺成分並無特別疋1舉例如料苯基二胺、間伸苯基二胺、鄰伸笨基一月女3,3 -一胺基二苯基喊、3,4，·二胺基二苯基縫、4, 二胺基二笨基越、3,3’·二胺基二苯基硫醚、3,4，·二胺基二苯基硫謎4,4 ·一胺基二苯基硫趟、3,3，·二胺基二苯基硬、3,4，· 二胺基二笨基硬、4,4，·二胺基二笨基颯、3,3，-二胺基二苯基酮、4,4’-二胺基二笨基_、3,4，_二月安基二苯基明、3,3，_二胺基二苯基曱烧、4,4，_二胺基二苯基曱院、3,4，_二胺基二笨基甲烧、2,2-二(3·胺基苯基）丙烧、2,2二(4_胺基苯基）丙烧、 2-(3-胺基笨基）_2_(4_胺基笨基）μ、m_胺基笨 101111300 34 201248740 基)_1，1，1，3,3,3-六氣丙烧、2,2-二(4-胺基苯基）_1，1，1,3,3,3_六氟丙烧、2-(3·胺基苯基)-2-(4-胺基苯基)_ι，ι，ι，3,3,3-六氟丙烧、1，1-二(3-胺基苯基)-1-苯基乙烧、1,1_二(4_胺基苯基)_ι_ 本基乙院、1-(3-胺基苯基)-1-(4-胺基笨基)_ι_苯基乙烧、ι，3_ 雙(3-胺基笨氧基)苯、i，3-雙(4-胺基苯氧基)笨、1，4_雙(3_胺基本氧基）本、1，4-雙(4·胺基苯氧基）苯、1，3_雙(3_胺基苯曱醯基）苯、I，3-雙(4_胺基苯曱醯基）苯、MK3_胺基苯曱醯基）苯、1，4-雙(4-胺基苯曱醯基）苯、丨，3_雙(3_胺基-α，α_二曱基苯曱醯基）苯、1，3-雙(4-胺基-α，α-二曱基苯曱醯基）苯、雙(3-胺基-α，α-二曱基苯曱醯基)苯、1>4_雙(4_胺基_α，α_二曱基苯甲醯基)苯、1，3-雙(3_胺基-α，α_二(三氣曱基)苯曱醯基) 苯、1,3-雙(4-胺基_α，α_二(三氟曱基）苯甲醯基）苯、胺基-α，α-二（三氟曱基）笨曱醯基）苯、Μ-雙(4-胺基_α，α_: (二氟曱基）笨曱醯基）苯、2,6_雙(3_胺基苯氧基）苯腈、2,6_ 雙(3-胺基苯氧基)吼咬、4,4，·雙(3_胺基苯氧基)聯苯、4,4，· 雙(4_胺基笨氧基)聯苯、雙[4·(3·胺基苯氧基）苯基]鋼、雙 [4-(4-胺基苯氧基）笨基]_、雙[4_(3_絲苯氧基）苯基]硫醚又[4_(4-胺基苯氧基）苯基]硫鱗、雙[4_(3·胺基苯氧基）苯基]颯、雙[4-(4-胺基苯氧基)苯基拽、雙[4 (3_胺基苯氧基）本基]醚雙[4-(4_胺基苯氧基）苯基]醚、2,2-雙[4-(3-胺基苯氧基)苯基]丙烧、2,2_雙[4_(4_胺基苯氧基)苯基]丙燒、2,2· 又[3-(3-知基苯氧基）苯基]六亂丙烧、雙 101111300 35 201248740 [4-(4_胺基苯氧基）笨基]]，1，1，3从六敗丙燒、以雙[M3_ 胺基苯氧基）苯曱醯基]笨、I，3-雙[4·⑷胺基笨氧基）笨甲酿基]苯、1，4-雙[4-(3-胺基笨氧基）笨曱醯基]笨、U4雙[4_(‘ 胺基苯氧基）苯曱醯基]笨、1，3-雙[4-(3-胺基苯氧基)^，〜二曱基苄基]苯、1，3-雙[4-(4-胺基笨氧基>(χ，α_二曱基苄基] 苯、I，4·雙[4-(3-胺基苯氧基)部-二曱基苄基]苯、认雙 [4-(4·胺基苯氧基)-α，α-二曱基苄基]苯、4,4,雙[4_(4胺基苯氧基）苯甲醯基]二苯基醚、4,4，·雙[4_(4_胺基_α，α二甲基苄基)苯氧基]二苯基酮、4,4’-雙[4-(4·胺基_α，α_二曱基节基)苯氧基]二笨基砜、4,4’-雙[4-(4-胺基苯氧基）笨氧基]二苯基砜、3,3，-二胺基-4,4’-二苯氧基二苯基酮' 3,3,二胺基_44，_ 二聯苯氧基二苯基酮、3,3’-二胺二胺基-4_聯苯氧基二苯基嗣、6,6，_雙（3_胺基苯氧基）_3,3’3’’3’_四甲、6,6’_雙…胺基苯氧基)-3,3,3’，3’-四曱基螺聯節般之芳香族胺；丨义雙^·胺基丙基)四甲基二轉烧、U-雙⑷胺基丁基)四甲基二石夕氧烷、α，ω-雙(3-胺基丙基）聚二曱基矽氧燒、 ^ 基)聚二曱基魏烧、她基曱綱、雙(:基 (3-胺基丙基)鱗、雙[(2-胺基曱氧基)乙基]喊、雙[2_(2_胺基乙氧基）乙基胸、雙[2-(3-胺基丙氧基）乙基]醚、i H锋甲氧基）乙烧、U-雙(2-胺基乙氧基）乙燒、u•雙^安基J氧基)乙氧基⑽、U·雙[2♦胺基乙氧基^乙二 101111300 36 201248740 醇雙(3-胺基丙基)鱗、二乙二醇雙(3-胺基丙基)醚、三乙二醇雙(3-胺基丙基)喊、乙二胺、ι，3_二胺基丙烧、1，4-二胺基丁燒、 L5-二胺基戊烷、1，6-二胺基己烷、1，7-二胺基庚烷、1，8·二胺基辛烷、i，9_二胺基壬烷、1，10-二胺基癸烷、1，11_二胺基十一烧、1，12-二胺基十二烷般之脂肪族胺；ι，2_二胺基環己烷、二胺基環己烷、1，4-二胺基環己烷、1，2-二(2-胺基乙基)環己院、U-二(2-胺基乙基)環己烷、丨，‘二(2·胺基乙基)環己烷、雙(4_胺基環己基）甲烷、2,6-雙(胺基曱基)聯環[2.2.1]庚烷、 2,5-雙(胺基甲基)聯環[2 21]庚烷般之脂環式二胺等。作為胍胺類’可舉例如丙胍胺、苯胍胺等；又，亦可使用將上述一胺之芳香環上氫原子之一部分或全部被選自氟基、甲基、甲氧基、二氟曱基或三氟曱氧基的取代基所取代的二胺。再者，配合目的，亦可將成為交聯點之乙炔基、笨并環丁稀水基、乙稀基、稀丙基、氰基、異氰酸基及異⑽基之任-種或2種以上，導人至上述二胺之芳香環上氫原子二一部分或全部作為取代基而使用。為了提升絕緣層之耐熱性及絕緣性，較佳係如上述妒醯亞胺含有芳香族骨架。含有芳香族骨架的聚酿亞胺^因盆剛直而呈高平面性骨架，故耐熱性或薄膜的絕緣性 ^ 低洩氣，因此適合使用於本實施態樣之絕緣層。 ‘’、、族構造，較佳係來另外，聚醯亞胺中，來自酸二酐之部分具有芳香更佳係來自二胺之部分亦含有芳香族構造。此外， 101111300 37 201248740 自二胺之構造亦為由芳香族二胺所衍生的構造。特佳係來自酸二酐之部分及來自二胺之部分均為含有芳香埃構造的全芳香族聚醯亞胺。於此，所謂全芳香族聚醯亞胺，係指藉由芳香族酸成分與芳香族胺之共聚合、或芳香族酸/胺基成分之聚合而獲得者。又，所謂芳香族酸成分，係指使形成聚醯亞胺骨架之4 個酸基全部取代至芳香族環上的化合物；所謂芳香族胺成分’係指形成聚醯亞胺骨架之2個胺基雙方均取代至芳香族環上的化合物；所謂芳香族酸/胺基成分，係指形成聚醯亞細骨.之酸基與胺基之任一者取代至芳香族環上的化合物。其中，由上述原料之芳香族酸二酐及芳香族二胺之具體例可明白’所有的酸基或胺基並不需要存在於同一芳香環上。基於以上理由，聚醯亞胺係在要求耐熱性及尺寸穩定性時，較佳係芳香族酸成分及/或芳香族胺成分之共聚合比例儘可能地大。具體而言，醯亞胺構造之構成重複單位之酸成分中所佔之芳香族酸成分的比例較佳為50莫耳％以上、特佳70莫耳％以上；醯亞胺構造之構成重複單位之胺成分中所佔之芳香族胺成分的比例較佳為40莫耳％以上、特佳60 莫耳％以上，更佳係全芳香族聚醯亞胺。其中，上述式（1)中之R1中，較佳係33莫耳％以上為下式所示之任一構造。其理由在於有成為耐熱性優越、顯示低線 101111300 38 201248740 熱膨脹係數之聚酿亞胺的優點。 [化2](In the formula (I), R1 is a tetravalent organic group, R2 is a divalent organic group, and R1 and R2 may be the same or different from each other. η is a natural number of 1 or more.) In the formula (I) In general, R1 is a structure derived from tetracarboxylic dianhydride, and R2 is a structure derived from a diamine. Examples of the tetracarboxylic dianhydride to which the polyimine is applied include ethylene tetracarboxylic dianhydride, butane tetracarboxylic dianhydride, cyclobutane tetracarboxylic dianhydride, and methylcyclobutane tetracarboxylic acid. An aliphatic tetracarboxylic dianhydride such as dianhydride or cyclopentane tetracarboxylic dianhydride; pyromellitic dianhydride, 3,3',4,4'-diphenyl ketone tetracarboxylic dianhydride, 2, 2',3,3'-diphenyl ketone tetracarboxylic dianhydride, 2,3',3,4'-diphenyl ketone tetracarboxylic dianhydride, 3,3',4,4'- 101111300 32 201248740 联笨基四龄t —, 2,2,,3,3,· 联笨基四叛酸二针,2,3,,3,4,_ biphenyl tetrajun 酉夂一轩, 2, 2,6,6,_biphenyltetrahydro acid two-needle, 2,2-bis(3,4-di-enylidyl) (tetra)m-bifluorene di-benzene benzoate dianhydride, double (3,4-di a few bases stupid _ two liver, bis (3,4-dibuylphenyl) fluorene two needles, u_ • bis (2,3 · di- phenyl) bisphenol dianhydride, bis (2,3 · dicarboxy benzene基)曱烧二.酉卜双(3,4·二基基基)曱烧二轩, 2,2_bis(3,4_diguanylphenyl) U,l,3,3,3 - hexafluoropropane dianhydride, 2,2-bisindole 3 dicarboxy phthalic anhydride 1,4 bis[(3,4-dicarboxy)phenyl fluorenyl] phthalic anhydride, 2, 2 _Bis^[(1,2-monocarboxy)phenoxy]phenyl}propane diino, 2,2_bis{4-[3-(1,2·-indolyl)phenoxy]phenyl} Burning: ^ double (four) like: fine phenoxy] phenyl} ketone dianhydride, double {4_[3_(H-methyl)phenoxy]phenyl}one di wild, 4'4- double [4-(1 , 2_disyl)phenoxy]biphenyl dianhydride, hydrazine, double-mouth-operating carboxy)phenoxy]biphenyldi-hepatic, bis(4-, 2-diyl)phenoxy]benzene Keto anhydride bis{4-[3-(1,2-disulfo)phenoxy]phenyl}indole, bismuth [4 (1,2-monocarboxy)phenoxy]phenyl p Wind II liver, bis(叩_(1,2 dicarboxy)phenoxy] stupid-dianhydride, bis(4,2,2) phenoxy]phenyl)sulfide dianhydride, bis(tetra)_(H County) phenoxy]phenyl) sulfonium bismuth bismuth-(1,2-diphenyloxy)phenyl...Shanqi·six propylene dianhydride, 2,2-double {4.[ 3_(1,2_Difilament)phenoxy]phenyl...Mountain 3,3,3_hexafluoropropanil, liver, 2,3,6,7·naphthalene tetraacid, U,l,3 ,3,3-hexafluoro-2,2_bis(2,3- or 3,4-dicarboxyphenyl)propane dianhydride, fluorene naphthalene tetracarboxylic dianhydride, 101111300 33 201248740 1,2,5 , 6-naphthalene tetrazoic acid two Xuan, 1234^·,, know one listen ^3,4-tetracarboxylic acid Acid dianhydride, 3,4,9,1〇-茈tetracarboxylic oxime anhydride, 2,3,6,7-decane tetracarboxylic acid 2^12,7,8-phenanthroic acid dianhydride, hydrazine 0 tetradecanoic acid liver, continuous brewing base 2 ugly acid Xuan, inter-linked triphenyl-3,3'4 4'-four Wei two Xuan, couplet triphenyl _3,3,,4,4,, reading, 9,9_double _, (three gas methyl) coffee 1 four lam umu fluoro fluorenyl) such as star four acid dianhydride y2m12, 14 · double (4 exhausted, _, 7_ two 4 thick five -2 ,3,9,10-tetracarboxylic dianhydride, n tetrafluorobenzene II@卜14_double (: gas, mono-_benthoxy) fluorocarbon)-,3,5,6-benzenetetracarboxylic acid Erxuan, p-π 对伸本本双双双双双双 - - - - 芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族芳香族This village is used alone or in combination of two or more. On the other hand, a diamine component which can be used in the polyimine may be used singly or in combination of two or more kinds of diamines. The diamine component used is not particularly exemplified by, for example, phenyldiamine, meta-phenylenediamine, ortho-stirty, 3,3-aminodiphenyl, 3,4, Diaminodiphenyl sulphide, 4, diaminodiphenyldiphenyl, 3,3'-diaminodiphenyl sulfide, 3,4,diaminodiphenyl sulfide 4,4 ·1 Aminodiphenylsulfonium, 3,3,diaminodiphenyl hard, 3,4,diaminodiphenyl, 4,4,diaminodiphenyl, 3,3 ,-Diaminodiphenyl ketone, 4,4'-diaminodiphenyl, 3,4,-diphenanyldiphenylamine, 3,3,-diaminodiphenyl fluorene , 4,4,-diaminodiphenyl fluorene, 3,4,-diaminodipyridyl, 2,2-bis(3·aminophenyl)propane, 2,2 2 ( 4_Aminophenyl)propane, 2-(3-aminophenyl)_2_(4-aminophenyl)μ, m_amine stupid 101111300 34 201248740 base)_1,1,1,3,3 , 3-hexafluoropropene, 2,2-bis(4-aminophenyl)_1,1,1,3,3,3-hexafluoropropane, 2-(3·aminophenyl)-2 -(4-Aminophenyl)_ι,ι,ι,3,3,3-hexafluoropropanone, 1,1-di(3-aminophenyl)-1-phenylethene, 1,1 _二(4_Aminophenyl)_ι_ 本基乙, 1-(3-Aminophenyl)-1-(4-aminophenyl)-yl-phenylethene, ι,3_bis(3-aminophenyloxy)benzene, i,3-dual ( 4-aminophenoxy) stupid, 1,4-bis(3-amine basic oxy) pentene, 1,4-bis(4.aminophenoxy)benzene, 1,3 bis (3-amine Benzophenyl)benzene, I,3-bis(4-aminophenylphenyl)benzene, MK3_aminophenylhydrazino)benzene, 1,4-bis(4-aminophenylhydrazino) Benzene, anthracene, 3_bis(3_amino-α,α-dimercaptophenyl)phenyl, 1,3-bis(4-amino-α,α-dimercaptophenyl) Benzene, bis(3-amino-α,α-dimercaptobenzoyl)benzene, 1>4_bis(4-amino-α,α-dimercaptobenzylidene)benzene, 1 ,3-bis(3_amino-α,α_bis(trishydrazinyl)phenyl) benzene, 1,3-bis(4-amino-α,α_bis(trifluoromethyl) Benzyl hydrazino) benzene, amino-α,α-bis(trifluoromethyl) alkenyl) benzene, fluorene-bis(4-amino-α, α_: (difluorofluorenyl) alum Benzo, 2,6-bis(3-aminophenoxy)benzonitrile, 2,6-bis(3-aminophenoxy)bite, 4,4,bis (3-aminophenoxy) Biphenyl, 4,4,·bis(4-aminophenyloxy)biphenyl, bis[4·(3·aminobenzene) Oxy)phenyl] steel, bis[4-(4-aminophenoxy)phenyl]-, bis[4-(3-methylphenoxy)phenyl]thioether and [4_(4-amino group) Phenoxy)phenyl]sulfide scale, bis[4-(3.aminophenoxy)phenyl]anthracene, bis[4-(4-aminophenoxy)phenylhydrazine, bis[4 (3_ Aminophenoxy) benzyl]ether bis[4-(4-aminophenoxy)phenyl]ether, 2,2-bis[4-(3-aminophenoxy)phenyl]propane , 2,2_bis[4_(4-aminophenoxy)phenyl]propane, 2,2· and [3-(3- knowylphenoxy)phenyl]hexa-propylate, double 101111300 35 201248740 [4-(4-Aminophenoxy) phenyl]], 1,1,3 from hexa-propylate, bis[M3_aminophenoxy)phenylhydrazino] stupid, I,3 - bis [4 · (4) amino phenyloxy) benzene, 1,4-bis[4-(3-aminophenyloxy) alum,] U4 bis [4_(' amine Phenyloxy)phenylindoleyl] stupid, 1,3-bis[4-(3-aminophenoxy)^,~didecylbenzyl]benzene, 1,3-bis[4-(4 -aminophenyloxy>(χ,α_dimercaptobenzyl)benzene, I,4·bis[4-(3-aminophenoxy) moiety-didecylbenzyl]benzene, double [4-(4.Aminophenoxy)-α,α-dimercaptobenzyl]benzene, 4,4, bis[4_(4 amine Phenoxy)benzhydryl]diphenyl ether, 4,4,bis[4_(4-amino-α,α-dimethylbenzyl)phenoxy]diphenyl ketone, 4,4' - bis[4-(4.Amino-α,α-diindenyl) phenoxy]diphenylsulfone, 4,4'-bis[4-(4-aminophenoxy)oxy Diphenylsulfone, 3,3,-diamino-4,4'-diphenoxydiphenyl ketone '3,3,diamino-44,_diphenoxydiphenyl ketone , 3,3'-diaminediamine-4_biphenoxydiphenylanthracene, 6,6,_bis(3-aminophenoxy)_3,3'3''3'_tetrazole, 6,6'_bis(aminophenoxy)-3,3,3',3'-tetramercapto-synthesized aromatic amine; deuterated bis-aminopropyl)tetramethyl Sublimation, U-bis(4)aminobutyl)tetramethyldiazepine, α,ω-bis(3-aminopropyl)polydidecyloxylated, ^yl)polydithiol Burning, her genus, bis (:yl (3-aminopropyl) scale, bis[(2-aminomethoxy)ethyl] shout, bis[2_(2-aminoethoxy)B Basal, bis[2-(3-aminopropoxy)ethyl]ether, i H-front methoxy) ethene, U-bis(2-aminoethoxy) ethene, u•double^ Anji J oxy)ethoxy (10), U·double [2 ♦Aminoethoxy ethoxylate 2101111300 36 201248740 Alcohol bis(3-aminopropyl) sulphate, diethylene glycol bis(3-aminopropyl)ether, triethylene glycol bis(3-aminopropyl acrylate Base) shout, ethylenediamine, iota, 3-diaminopropane, 1,4-diaminobutyrate, L5-diaminopentane, 1,6-diaminohexane, 1,7- Diamino heptane, 1,8-diaminooctane, i,9-diaminodecane, 1,10-diaminodecane, 1,11-diamine eleven, 1,12 - an aliphatic amine such as diaminododecane; i, 2, diaminocyclohexane, diaminocyclohexane, 1,4-diaminocyclohexane, 1,2-di(2- Aminoethyl)cyclohexyl, U-bis(2-aminoethyl)cyclohexane, hydrazine, 'bis(2.aminoethyl)cyclohexane, bis(4-aminocyclohexyl)methane 2,6-bis(aminomercapto)bicyclo[2.2.1]heptane, 2,5-bis(aminomethyl)bicyclo[2 21]heptane-like alicyclic diamine, and the like. Examples of the guanamines include acrylamide, benzoguanamine, and the like. Further, a part or all of hydrogen atoms on the aromatic ring of the above-mentioned one amine may be selected from a fluorine group, a methyl group, a methoxy group, and the like. A diamine substituted with a substituent of a fluoromethyl or trifluoromethoxy group. Further, for the purpose of blending, any of the ethynyl group, the stupid cyclopentadienyl group, the ethylene group, the dipropyl group, the cyano group, the isocyanate group and the iso(10) group which are the crosslinking points or 2 may be used. In the above, a part or all of the hydrogen atom on the aromatic ring of the above diamine is used as a substituent. In order to improve the heat resistance and the insulating property of the insulating layer, it is preferred that the above fluorene imine contains an aromatic skeleton. The polyaniline containing an aromatic skeleton is suitable for use in the insulating layer of the present embodiment because the pot is straight and has a highly planar skeleton, so that heat resistance or insulation of the film is low, and therefore it is low in venting. Further, in the polyimine, the portion derived from the acid dianhydride has an aromaticity. More preferably, the portion derived from the diamine also contains an aromatic structure. Further, 101111300 37 201248740 The structure of the diamine is also a structure derived from an aromatic diamine. The particularly preferred portion derived from the acid dianhydride and the portion derived from the diamine are all aromatic polyimine having an aromatic structure. Here, the wholly aromatic polyimine is obtained by copolymerization of an aromatic acid component with an aromatic amine or polymerization of an aromatic acid/amine component. In addition, the aromatic acid component means a compound in which all four acid groups forming a polyimine skeleton are substituted with an aromatic ring; the term "aromatic amine component" means two amine groups forming a polyimine skeleton. Both of them are substituted with a compound on an aromatic ring; the term "aromatic acid/amine-based component" refers to a compound in which any one of an acid group and an amine group which forms a polysulfide sub-base is substituted with an aromatic ring. Among them, it is understood from the specific examples of the aromatic acid dianhydride and the aromatic diamine of the above-mentioned raw materials that all of the acid groups or amine groups do not need to be present on the same aromatic ring. For the above reasons, when the polyimine is required to have heat resistance and dimensional stability, it is preferred that the copolymerization ratio of the aromatic acid component and/or the aromatic amine component be as large as possible. Specifically, the ratio of the aromatic acid component in the acid component constituting the repeating unit of the quinone imine structure is preferably 50 mol% or more, particularly preferably 70 mol% or more; and the constituent unit of the quinone imine structure The proportion of the aromatic amine component in the amine component is preferably 40 mol% or more, particularly preferably 60 mol% or more, and more preferably a wholly aromatic polyimine. Among them, in R1 in the above formula (1), preferably 33 mol% or more is any structure shown by the following formula. The reason for this is that it has the advantage of being a heat-resistant and exhibiting a thermal expansion coefficient of a low-line 101111300 38 201248740. [Chemical 2]

(式(2)中’a為〇或！以上之自然數’ A為單鍵(聯苯構造卜氧原子(醚鍵結）、S旨鍵結之任—者，可全部為相同、或分別相異。鍵絲係由料環之鍵結部倾看，鍵結至芳香環之 2,3位或3,4位。）尤其是若具有上述(1)所示之構造的聚醯亞胺含有上式(2) 所示之構造’則顯示低吸濕膨脹。再者，有容易由市售取得、低成本等優點。具有上述構造之聚醯亞胺’可成為顯示高耐熱性、低線熱膨脹係數之聚醯亞胺。因此，上式所示構造之含量較佳係接近上式（1)中之R1中的100莫耳％，並至少含有上式（1)中之 R中的33%以上。其中，上式所示構造之含量較佳係於上式（1)中之R1中的50莫耳％以上、更佳7〇莫耳％以上。作為使聚醯亞胺成為吸低濕之酸二酐的構造，可舉例如下式(3)所示者。 [化3] 101111300 39 (3) (3)201248740(In the formula (2), 'a is 〇 or ! The above natural number' A is a single bond (a biphenyl structure, an oxygen atom (ether bond), or a S bond), all of which may be the same or respectively The bond wire is observed from the bonding portion of the ring and bonded to the 2, 3 or 3, 4 position of the aromatic ring.) Especially if the polyimine has the structure shown in the above (1) The structure shown in the above formula (2) shows low moisture absorption expansion. Further, it is easy to obtain commercially available, low cost, etc. The polyimine having the above structure can exhibit high heat resistance and low a polyimine having a linear thermal expansion coefficient. Therefore, the content of the structure shown in the above formula is preferably close to 100 mol% in R1 in the above formula (1), and contains at least R in the above formula (1). 33% or more, wherein the content of the structure shown in the above formula is preferably 50 mol% or more, more preferably 7 mol% or more, of R1 in the above formula (1). The structure of the low-humidity acid dianhydride can be exemplified by the following formula (3): [Chemical 3] 101111300 39 (3) (3) 201248740

(式(3)中，a為〇或1以上之自然數，A為單鍵(聯苯構造）、氧原子（醚鍵）、酯鍵之任一種，全部可為相同成分別相異。酸酐骨架（-C0-0-C0-)係由鄰接之芳香環的鍵結部位來看，其鍵結於芳香環的2,3位或3，4位上。）上式(3)中，作為A為單鍵(聯笨構造）、氧原子（醚鍵)的酸酐，可舉例如3,3’，4,4’-聯笨四羧酸二酐、2二3,，4，-聯苯四狻酸二針、2’3’2’’3、聯笨四賴二軒、雙(3,4_二叛基苯基声二酐等。由減低吸_脹係數之觀點及㈣二胺之選擇性的觀點而言，此等屬較佳。 _之苯基§二!醜亞胺成為低吸濕的觀點而言，A為酐。具體可舉例如對:㈣呵舉例如下式所示之酸二苯基雙苯偏三恤本二雙苯:三酸單酿酸二㈣聯，及拓寬二胺之選擇+ 專°由減低吸濕膨脹係數之鮮 [化4] 十生的觀點而言’此等為特佳。 101111300 201248740 L Ja 謂。1〇+。^0： l Ja(In the formula (3), a is a natural number of hydrazine or 1 or more, and A is a single bond (biphenyl structure), an oxygen atom (ether bond), or an ester bond, and all of them may be different in the same form. The skeleton (-C0-0-C0-) is defined by the bonding sites of the adjacent aromatic rings, which are bonded to the 2, 3 or 3, 4 positions of the aromatic ring.) In the above formula (3), A is an acid anhydride of a single bond (linked structure) and an oxygen atom (ether bond), and examples thereof include 3,3', 4,4'-biphenyltetracarboxylic dianhydride, 2,3,4,4-biphenyl. Four-capric acid two-needle, 2'3'2''3, Lianbu Si Lai two Xuan, double (3,4_ two thiophenyl phthalic anhydride, etc.. From the viewpoint of reducing the absorption coefficient, and the choice of (4) diamine From a sexual point of view, these are preferred. _ phenyl § 2! ugly imine is a low moisture absorption point of view, A is an anhydride. Specifically, for example: (4) oh, for example, the acid shown in the following formula Diphenyl benzene biased three-tone bi-diphenyl: tri-acid mono-branched acid (two), and widening diamine selection + special ° by reducing the hygroscopic expansion coefficient of the fresh [chemical 4] ten students' point of view This is especially good. 101111300 201248740 L Ja says. 1〇+.^0: l Ja

(式中，a為0或1以上之自然數，酸酐骨架（-C0-0-C0-)係由鄰接之芳香環的鍵結部位來看，其鍵結於芳香環的2,3位或3,4位上。）在上述之吸濕膨脹係數較小的四羧酸二酐的情況，可範圍廣泛地選擇作為後述二胺。作為所併用之四羧酸二酐，可使用如下式所示般之具有至少1個氟原子的四羧酸二酐。若使用導入了氟之四羧酸二酐，則最終所得之聚醯亞胺之吸濕膨脹係數降低。作為具有至少1個氟原子之四羧酸二酐，其中較佳為具有氟基、三氟曱基或三氟曱氧基。具體可舉例如2,2-雙（3,4-二羧基苯基)-1，1，1，3,3,3_六氟丙烧二酐等。然而，在作為上述聚醯亞胺成分而含有之聚醯亞胺前驅物為具有含氟骨架時，上述聚醯亞胺前驅物有難以溶解於鹼性水溶液中的傾向，在上述聚醯亞胺前驅物的狀態下，使用光阻等進行圖案化時，有時必須藉由醇等之有機溶媒與驗性水溶液的混合溶液進行顯影。 [化5] 101111300 41 201248740(wherein, a is a natural number of 0 or more, and the anhydride skeleton (-C0-0-C0-) is bonded to the 2,3 position of the aromatic ring as seen by the bonding site of the adjacent aromatic ring. In the case of the above-mentioned tetracarboxylic dianhydride having a small coefficient of hygroscopic expansion, it can be widely selected as a diamine to be described later. As the tetracarboxylic dianhydride to be used in combination, a tetracarboxylic dianhydride having at least one fluorine atom as shown in the following formula can be used. When fluorine tetracarboxylic dianhydride is introduced, the coefficient of hygroscopic expansion of the finally obtained polyimine decreases. As the tetracarboxylic dianhydride having at least one fluorine atom, it is preferred to have a fluorine group, a trifluoroindenyl group or a trifluorodecyloxy group. Specific examples thereof include 2,2-bis(3,4-dicarboxyphenyl)-1,1,1,3,3,3-hexafluoropropane dianhydride. However, when the polyimine precursor contained as the polyimine component has a fluorine-containing skeleton, the polyimine precursor tends to be difficult to be dissolved in an aqueous alkaline solution, and the polyimine is preferred. In the state of the precursor, when patterning is performed using a photoresist or the like, it is necessary to perform development by a mixed solution of an organic solvent such as alcohol and an aqueous test solution. [化5] 101111300 41 201248740

於此’由耐熱性、亦即低洩氣化的觀點而言，所選擇之二月女較佳為芳香族二胺，但配合目標物性，在不超過二胺整體之60莫耳％、較佳40莫耳％的範_，亦可使用脂肪族二胺或矽氧烷系二胺等之芳香族以外的二胺。另外’上述聚酿亞胺成分令，較佳係上式⑴ 33莫耳％以上為下式所雜—構造。中的 6] 101111300 42 201248740 -〇-R3〇-Here, from the viewpoint of heat resistance, that is, low gas bleed, the selected second month female is preferably an aromatic diamine, but the target physical property is not more than 60 mol% of the entire diamine, preferably. A 40% molar %, a diamine other than an aromatic such as an aliphatic diamine or a decane-based diamine may be used. Further, the above-mentioned polyienimine component is preferably a structure in which the above formula (1) 33 mol% or more is a structure of the following formula. Of 6] 101111300 42 201248740 -〇-R3〇-

(R3為2價有機基、氧原子、硫原子或磺醯基，尺4及反5為1 價有機基或鹵原子。）外=上述聚醯亞胺成分含有上式之任一構造，則因此等剛直月架而颟不低線熱膨脹及低吸濕膨脹。再者，亦有容易由市售取得、低成本的優點。有上述構造的情況，上述聚醯亞胺的耐熱性提升，線二::數變小。因此’越接近上式⑴中之R2中的100莫耳％越隹，伯竑人女、可。其中一 3有上式（1)中之R2中的至少33%以上即 5〇莫構造之含量較佳為上式⑴中之尺2中的、更佳7()料％以上。地聚醢亞胺成為更低吸月女構造’車交佳為下式(41、“ 作為一 [化7] 飞(44)〜(4_3)、（5)所示者。(R3 is a divalent organic group, an oxygen atom, a sulfur atom or a sulfonyl group, and the quaternary 4 and the reverse 5 are a monovalent organic group or a halogen atom.) External = The above polyamidiamine component has any structure of the above formula, Therefore, it is just like a straight straight frame and it does not have low-line thermal expansion and low moisture absorption expansion. Furthermore, there are advantages that it is easy to obtain from the market and low cost. In the case of the above structure, the heat resistance of the above polyimine is increased, and the number of the second:: is small. Therefore, the closer to the 100% of R2 in the above formula (1), the more the 竑隹隹隹隹隹隹隹. Among them, the content of at least 33% or more of R2 in the above formula (1), that is, the content of the 5〇 mo structure is preferably the same as that of the rule 2 in the above formula (1), and more preferably 7% or more. The polydiamine is a lower suction structure. The car is better than the following (41, "as a [Chem. 7] fly (44) ~ (4_3), (5).

(5)(5)

(4-3)(4-3)

(iU4_2)〜(4-3)中’亦可: 中，&為〇或1以上之 101111300 芳香環上鍵結2個胺基。式(5) ’胺基係相對㈣環彼此的鍵 43 201248740 結，而鍵結於間位或對位上。又，亦可使芳香環上之氫原子之一部分或全部被選自氟基、曱基、曱氧基、三氟甲基或三氟甲氧基的取代基所取代。）作為上式(4-1)〜(4-3)所示之二胺，具體可舉例如對伸苯基二胺、間伸苯基二胺、1，4-二胺基萘、1，5-二胺基蔡、2 6_ 二胺基萘、2,7-二胺基萘、1，4-二胺基蒽等。作為上式（5)所示之二胺，具體可舉例如2,2，_二甲基_4,4，_ 二胺基聯苯、2,2’-二(三氟甲基)·4,4’_二胺基聯苯、3,3，_二氯 -4,4’-二胺基聯苯、3,3’-二曱氧基_4,4’_二胺基聯苯、3,3，_二曱基_4,4’-二胺基聯苯等。另外，若導入氣作為芳香環之取代基，則可減低上述聚酿亞胺之吸濕膨脹係數。例如，作為上式（5)所示之二胺中導入了氟的構造，可舉例如下式所示者。然而，含有氣之聚酿亞胺前驅物、尤其疋聚醯胺酸，係難以溶解於鹼性水溶液中，形成低洩氣之感光性聚醯亞胺絕緣層的情況，在絕緣層的加工時’有時必須藉其與醇等有機溶媒的混合溶液進行顯影0 [化8]In (iU4_2)~(4-3), it is also possible to: in the middle, & is < or 10 or more than 101111300, an aromatic ring is bonded to two amine groups. The formula (5) 'amine group is bonded to the (tetra) ring to each other's bond 43 201248740 and is bonded to the meta or para position. Further, a part or all of the hydrogen atoms on the aromatic ring may be substituted with a substituent selected from a fluorine group, a decyl group, a decyloxy group, a trifluoromethyl group or a trifluoromethoxy group. Specific examples of the diamine represented by the above formulas (4-1) to (4-3) include p-phenylenediamine, meta-phenylenediamine, and 1,4-diaminonaphthalene. 5-Diamine-based, 2 6-diaminonaphthalene, 2,7-diaminonaphthalene, 1,4-diaminoguanidine, and the like. Specific examples of the diamine represented by the above formula (5) include 2,2,-dimethyl _4,4,-diaminobiphenyl and 2,2'-bis(trifluoromethyl)·4. , 4'-diaminobiphenyl, 3,3,-dichloro-4,4'-diaminobiphenyl, 3,3'-dimethoxy-4-4,4'-diaminobiphenyl, 3,3,_Dimercapto-4,4'-diaminobiphenyl, and the like. Further, when the introduced gas is used as a substituent of the aromatic ring, the coefficient of hygroscopic expansion of the above-mentioned polyiamine can be reduced. For example, as a structure in which fluorine is introduced into the diamine represented by the above formula (5), the following formula can be exemplified. However, the gas-containing polyiminoimide precursor, especially the ruthenium polyamine, is difficult to dissolve in an alkaline aqueous solution to form a low-draining photosensitive polyimide elastomer layer, during the processing of the insulating layer. Sometimes it is necessary to carry out development with a mixed solution of an organic solvent such as an alcohol.

在對聚醯亞胺賦予感光性，而使用作為感光性聚醯亞胺或感光性聚醯亞胺前驅物時，為了提高感度，得到正確地再現 101111300 44 201248740 主圖案的圖案形狀，較佳係在1μιη之膜厚時，對曝光波長顯示至少5°/。以上的穿透率，更佳為顯示15%以上之穿透率。另外’在使用一般曝光光源之高壓水銀燈進行曝光時，於 436nm、405nm、365nm之波長的電磁波中，對至少】種波長之電磁波的穿透率於成膜為厚1μπι之薄膜時，較佳為5〇/〇以上、更佳15%以上、再更佳5〇%以上。所謂聚醢亞胺對曝光波長的穿透率較高，係指光損失較少’可得到高感度之感光性聚醯亞胺或感光性聚醯亞胺前驅物。作為聚醯亞胺，為了提升穿透率，作為酸二酐，最好使用導入了氟的酸二酐、或具有脂環骨架的酸二酐。然而，若使用具有脂環骨架之酸二酐，則有耐熱性降低、損及低洩氣性之虞，故亦可一邊注意共聚合比例而予以併用。本實施態樣中’為了提升穿透率而使用導入了氟之芳香族酸二酐作為酸二酐時，由可一邊維持耐熱性（因為屬於芳香族）、亦可減低吸濕膨脹的觀點而言，將屬更佳。作為本實施形態所使用之具有至少丨個氟原子之四羧酸二酐，可使用上述具有氟原子的四羧酸二酐，其中，較佳為具有氟基、三氟曱基或三氟曱氧基。具體可舉例如2,2_雙 (3’4-二羧基苯基)_1，1，1，3,3,3_六氟丙烷二酐等。然而，具有含氟骨架之聚醯亞胺前驅物，係有難以溶解於鹼性水溶液中的傾向，在聚醯亞胺前驅物的狀態下，使用光 101111300 45 201248740 阻等進行圖案化時，有時必須藉液之混合溶液進行顯影。由醇等有機溶媒與鹼性水溶另外，若使用焦蜜石酸酐、3,3，，4,4，_聯苯崎酸二野、，4,5,8-奈四紐二料之剛性的酸項，則最終所得之聚醯亞胺的線熱膨脹係數雖變小，但由於有阻礙透明性提升的 f頁向，故可一邊注意共聚合比例而併用。作為聚醯亞胺’為了提升穿透率，作為二胺，最好使用導入了氣的二胺、或具有脂環骨架的二胺。然而，若使用且有脂環骨架之二胺’則有耐熱性降低、損及低喊性之虞，故亦可一邊注意共聚合比例而予以併用。為了提升穿透率而使科人了氟之㈣族二胺作為二胺時，由可-邊維持耐熱性（因為屬於芳香族）、亦可減低吸濕膨脹的觀點而言，將屬更佳。作為導入了氟.之芳香族二胺，具體可舉例如上述具有導入了氟之構造者，更具體可舉例如：2,2，·二（三氟甲基)_4,4，_ 二胺基聯苯、2,2’·二(3-胺基笨基二(4-胺基苯基)_1，1，1，3,3,3_六|1丙;^、2_(3-胺基苯基)_2_(4_ 曱基)¥基)苯、I，3-雙(4_胺基·a，acg氟曱基)节基)苯、认雙(3-胺基-α，α·二（三氟甲基）苄基）苯、1，4_雙(4_胺基_a，a_: (三氟甲基）¥基）苯、2,2-雙[3-(3-胺基苯氧基）苯基]-1，1，1，3,3,3-六氟丙烷、2,2-雙[4-(4·胺基苯氧基）苯 101111300 46 201248740 基]-1，1，1，3,3,3-六氟丙燒等。然而’含氟之聚醯亞胺前驅以溶解於驗性溶液中，而於絕緣A &其疋聚醯胺酸’係難，與醇等有機溶制混合溶液^ =卫時有時Μ藉由其另一方面，作為二胺，若俥田吏用丨，3·雙（3-胺基丙基）四甲| 二矽氧烷等之具有矽氧烷骨牟）四甲基木的二胺，則可改善與金屬思„ 之密黏性，或使上述_亞胺之彈性係數降低 ^轉移溫度降低。使坡璃轉在使用含有聚醯亞胺或聚醯亞胺前驅物之聚醯八的聚醯亞麟餘成物形成含有聚醯亞胺之絕緣層時，聚二亞胺成分的重量平均分子量，雖視其用途而異" 3,000^1,000,000 ^|6 i ^ 5,000^500,000 # . 佳U)，000〜500,000之範圍。若重量平均分子量未滿3侧，則在作成塗膜或薄膜時難以得到充分強度。又，實施加熱声理等而作成聚醯亞胺時的骐強度亦變低。另一方面，若重旦平均分子量超過1，000,000，則黏度上升，溶解性亦降低，故難以得到表面平滑且膜厚均勻之塗膜或薄膜。於此所使用之分子量，係指由凝膠滲透層析法(GPC)所得之聚苯乙婦換算的值，可為聚醯亞胺前驅物本身的分子量亦可為藉醋酸酐等進行了化學性醯亞胺化處理後者。作為聚醯亞胺成分的含量，由所得之圖案的膜物性、尤其是膜強度或耐熱性的觀點而言，係相對於上述聚醯亞胺樹脂 101111300 47 201248740 組成物之固形份整體，較佳為50重量％以上、更佳70重量 %以上。另外’聚醯亞胺樹脂組成物之固形份係指溶劑以外之所有成分’液狀單體成分亦包含於固形份中。本實施態樣中，絕緣層亦可含有具上述式（1)所示重複單位的聚醯亞胺，视需要亦可適當地將此聚醯亞胺與其他聚醯亞月女進行積層或組合，而作成絕緣層。另外’上述聚醯亞胺亦可為使用感光性聚醯亞胺或感光性聚醯亞胺前驅物而得者。感光性聚醯亞胺可使用公知手法而獲得。例如，於聚醯胺酸之羧基中藉由酯鍵或離子鍵導入乙烯性雙鍵，於所得之聚醯亞胺前驅物中混合光自由基起始劑，可作成溶劑顯影負型感光性聚醢亞胺前驅物。又，例如於聚醯胺酸或其部分g旨化物中添加二#氮魏化合物，作成驗顯影負型感光性聚醢亞胺前驅物；或於聚_酸中添加齡叫⑽系化合物而作成驗顯影負型感光性聚醯亞胺前驅物等；可於聚醯胺酸中添加紐發生劑而作成_影負型感光性聚醯亞胺前驅物。此等感光性聚醯亞胺前驅物中，係相對於聚醯亞胺成分重量而添加15%〜35%之感紐衫成分。因此，即使仏 ^成後以赋〜楊。C進行加熱，來自感光性賦予成分 ^ .. 4殘存物將成為線熱膨脹係: 或及濕_係數增大的賴，故若使用感紐聚醯亞胺前 101111300 48 201248740 物’則相較於使用非感光性之聚醯亞胺前驅物，其元件的可罪性有降低的傾向。然而，於聚醯胺酸中添加了光嶮發生劑的感光性聚醯亞胺前驅物，由於即使將屬於添加劑之光鹼發生劑之添加量設為丨5 %以下仍可形成圖案，故作成聚醯亞胺後，來自添加劑的分解殘渣仍較少、線熱膨脹係數或吸濕膨脹係數等之特性的劣化較少，再者，洩氣亦較少，故最適合作為本實施態樣中可應用的感光性聚醢亞胺前驅物。其中，上述聚酿亞胺較佳係使用感光性聚醯亞膝或感光性聚醯亞胺前驅物而得者。在藉由光刻法形成絕緣層貫通孔時，於使用非感光性之聚醯亞胺的情況，由於形成於絕緣層上之光阻層之厚度對絕緣層貫通孔的大小造成影響，故為j 形成較小徑之絕緣層貫通孔，較佳係使用感光性聚醯亞胺。藉由使用感光性聚醯亞胺或感光性聚醯亞胺前驅物，則可彤成細微圖案，可減小絕緣層貫通孔之徑。其結果，可提高^ 實施態樣之電子元件用積層基板上所配置之電子元件部的集成度。聚醯亞胺所使用之聚醯亞胺前驅物，可藉鹼性水溶液進行顯影，此點係在對絕緣層進行圖案化時，由確保作業環境之安全性及減低製程成本的觀點而言為較佳。鹼性水溶液可便宜地取得，廢液處理費用或用於確保作業安全性的設備費用較便宜，故可依更低成本進行生產。絕緣層中，視需要亦可含有均平劑、可塑劑、界面活性劑、 101111300 49 201248740 消泡劑等之添加劑。絕緣層亦可填充於金屬層之開口勒之導通部用金屬部以外的部分。亦即，金屬層之圖案端部亦可由絕緣層所絕緣。藉此，可使金屬層及導通部絕緣。絕緣層係具有配置於金屬層之開口部上的絕緣層貫通孔。作為絕緣層貫通孔之形狀，可配合本實施態樣之電子元件用積層基板的用途等而適當決定，並無特別限定。絕緣層貫通孔之平面的形狀可設為例如圓形狀、擴圓形狀、多角形狀、矩形狀等任意形狀。X，絕緣層貫通孔之平面的形狀可於絕緣層之表背面為相同或相異。邑’彖層貫通孔之大小若為H由絕緣層與填充於絕緣層貫通孔之第1導通部支料通部用金屬部，則無特別限定，絕緣層貫通孔可較導通部用金屬部小或大。在絕緣層貫通孔之平面形狀為圓形狀時，絕緣層貫通孔之直徑若為藉由絕緣層與填充於絕緣層貫通孔之第 1導通部支撐導通部用金屬告P，則無特別限定，其中’較佳為 Ιμιη〜ΙΟΟΟμιη之範圍内。尤其是在達到本實施態樣之電子元件用積層基板上所形成之元件的高精細化方面，絕緣層貫通孔之直控較佳為丨μηι〜5〇〇μιη之範圍内、更佳1μιη〜2〇〇μιη 之範圍内、再更佳1μηι〜1()()μιη之範圍内。若絕緣層貫通孔之直徑大於上述範圍，則在將本實施態樣之電子元件用積層基板用於顯示裝置時，無法得到所需之開口率，且無法提升】01]11300 50 201248740 集成度(挽度），而有妨礙高精細化之虞。又，由在絕緣層貫通孔中填充第1導通部的觀點*言，若絕緣層貫通孔之直徑過小，則有實質上難以形成第丨導通部的情形。另外’即使在絕緣層貫通孔之平面形狀不為圓形狀時，較 •佳亦絕緣層貫通孔之平面面積為與由上述絕緣層貫通孔之直徑所規定之面積相同程度。第1導通部之大小係依存於絕緣層貫通孔之大小。而且，絕緣層貫通孔之大小係依存於絕緣層H具體而言，由於絕緣層貫通孔之大小係絕緣層之厚度左右成為實質下限，故絕緣層厚度_，則可減小絕緣層貫通孔之大小。因此，為了減小絕緣層貫通孔之大小，較佳係減薄絕緣層。另外，在藉由光刻法形成絕緣層貫通孔時，於使用非感光性之聚醯亞胺的情況，形成於絕緣層上之光阻層的厚度亦對絕緣層貫通孔之大小造成影響。因此，如上述般，為了形成較小輕之絕緣層貫通孔，較佳係使用感光性聚酿亞胺。絕緣層貫it孔之巾^位置可與導通利金屬部之中心位置一致或不一致。絕緣層貫通孔之數量係配合本實施態樣之電子元件用積、層基板的用途而適當選擇。、 ’ 料絕緣層貫通孔之配置，若為將絕緣層貫通孔配置於金屬層之開口部上，且配置於導通部用金屬部上，則無特別限定。 101111300 51 201248740 絕緣層貝通孔亦可配置於電子元件用積層基板之外周部。例如將本實施態樣之電子元件用積層基板用於有機el 凡件或電子纟叫，藉由如®1 7所例示般於電子元件用積層基板1之外周配置絕緣層貫通孔⑽，則可於密封部％外側配置月面電極層用導通部7a及透明電極層用導通部7b，而可有效防止水分或氧藉由電子元件用積層基板而侵入至元件中的情形。如，圖8所例示，亦可絕緣層2相對於金屬層3形成為圖案狀’設置於金屬層3之面不存在絕緣層2、露出金屬層3之金屬層露出區域Ub。又’關於金屬層露出區域，由於記載於後述之金屬層項目中，故於此省略其說明。、、·邑、·彖層之厚度若為可滿足上述特性之厚度則無特別限定，較佳係1μιη〜1000μιη之範圍内、更佳1μιη〜2〇〇μιη之範圍内、再更佳_〜100_之範圍内。由於若絕緣層之厚度過薄，則無法維持絕緣性，難以使金屬層表面之凹凸平坦化。又，因為若絕緣層之厚度過厚，則可撓性降低、變得過重、製膜時之乾燥困難、或材料使用量增加而成本變高。再者，右絕緣層之厚度較厚，則由於聚醯亞胺等之樹脂的熱傳導率較金屬低，故熱傳導性降低。尚且’關於絕緣層之形成方法及絕緣層貫通孔之形成方法’由於記載於後述之「Ε.電子元件用積層基板之製造方法」項目中，故於此省略其說明。 101111300 52 201248740 (2)金屬層本貫施態樣之金屬層係於上述絕緣層上形成為圖案狀，於後述之第1導通部上具有開口部，並未於導通部導通者。作為構成金屬層之金屬材料，可舉例如鋁、銅、銅合金、磷青銅、不銹鋼(SUS)、金、金合金、鎳、鎳合金、銀、銀合金、錫、錫合金、鈦、鐵、鐵合金、鋅、鉬、銦鋼材等，但無特別限定〇此等可配合後述特性而適當選擇。於此所謂金屬材料，係指金屬元素之單體或合金，金屬元素之定義係記載於Shriver無機化學第3版(上）第429頁，不包含石夕。（於周期表中，1〜12族為止之氫以外的所有元素、 13族之A卜Ga、In、T1、14族之Sn、Pb、15族之則為金屬元素。） ^ 由尺寸穩定性之觀點而s，金屬層之線熱膨脹係數較、 Oppm/t〜25ppm/t的範圍内。若線熱膨脹係數過大乂為溫度變化時所產生之伸縮變大，故對尺寸穩定性造、則由響。成不良影另外’由尺寸疋性之觀點而言，金屬層之線執 ,t L ·'、、辱脹係赵較佳係與絕緣層之線熱膨脹係數接近。絕緣層與金屬居熱膨脹係數越接近，則越抑制電子元件用積層基板的之線且在電子元件用積層基板之熱環境發生變化時，超’ 七緣層與全屬層之界面的應力變小、提升密黏性。又，關於么 ^ 、龙屬層之输熱膨脹係數與絕緣層之線熱膨脹係數的差，由於 4 、匕記載於上 101111300 53 201248740 述絕緣層的項目中，故於此省略其說明。另外’金屬層之線熱膨脹係數並不僅止於絕緣層，較佳係與後述之第2金屬層、第3金屬層、電子元件部、密黏層、電極及佈線等之形成於絕緣層上之層的線熱膨脹係數接近。右金屬層之線熱膨服係數與形成於絕緣層上之層的線熱膨脹係數相異，則尺寸穩定性降低且成為曲翹或裂痕的原因。在形成於絕緣層上之層為以Zn、In、Ga、Cd、Ti、St、When the polyimide is used as a photosensitive polyimide or a photosensitive polyimide precursor, in order to improve the sensitivity, the pattern shape of the 101111300 44 201248740 main pattern can be accurately reproduced. At a film thickness of 1 μm, the exposure wavelength is at least 5°/. The above transmittance is more preferably a transmittance of 15% or more. Further, when exposure is performed by a high-pressure mercury lamp using a general exposure light source, in the electromagnetic waves having wavelengths of 436 nm, 405 nm, and 365 nm, when the transmittance of electromagnetic waves of at least one wavelength is formed into a film having a thickness of 1 μm, it is preferably 5〇/〇 or more, more preferably 15% or more, and even more preferably 5〇% or more. The term "polyimine" has a high transmittance at the exposure wavelength, which means that the light loss is small, and a high-sensitivity photosensitive polyimide or a photosensitive polyimide precursor can be obtained. As the polydiimine, in order to increase the transmittance, it is preferable to use an acid dianhydride to which fluorine is introduced or an acid dianhydride having an alicyclic skeleton. However, if an acid dianhydride having an alicyclic skeleton is used, the heat resistance is lowered and the low gas escaping property is impaired, so that the copolymerization ratio can be used in combination. In the present embodiment, when the aromatic acid dianhydride introduced with fluorine is used as the acid dianhydride in order to increase the transmittance, the heat resistance (because it is aromatic) can be maintained, and the hygroscopic expansion can be reduced. It will be better. As the tetracarboxylic dianhydride having at least one fluorine atom used in the present embodiment, the above-mentioned tetracarboxylic dianhydride having a fluorine atom can be used, and among them, a fluorine group, a trifluoroindenyl group or a trifluoroantimonle is preferable. Oxygen. Specific examples thereof include 2,2-bis(3'4-dicarboxyphenyl)_1, 1,1,3,3,3-hexafluoropropane dianhydride. However, the polyimide precursor having a fluorine-containing skeleton tends to be difficult to be dissolved in an aqueous alkaline solution, and when patterned using a light 101111300 45 201248740 in the state of a polyimide precursor, there is It is necessary to carry out development with a mixed solution of liquid. It is made of an organic solvent such as an alcohol and an alkaline water. If it is used, it is made of pyrogallic anhydride, 3,3,4,4,_biphenyl succinate, and 4,5,8-na-nene. In the acid term, the linear thermal expansion coefficient of the finally obtained polyimine is small, but since the f-page direction which hinders the transparency improvement is obtained, it can be used together with attention to the copolymerization ratio. As the polyimine, in order to increase the transmittance, it is preferable to use a diamine in which gas is introduced or a diamine having an alicyclic skeleton as the diamine. However, if a diamine having an alicyclic skeleton is used, the heat resistance is lowered and the low-shock property is impaired, so that the copolymerization ratio can be used in combination. In order to increase the transmittance and to make the fluorine (tetra) group diamine as a diamine, it is better to maintain the heat resistance (because it is aromatic) and to reduce the hygroscopic expansion. . Specific examples of the aromatic diamine to which fluorine is introduced include those having a structure in which fluorine is introduced, and more specifically, for example, 2,2,·bis(trifluoromethyl)-4,4,-diamino group. Biphenyl, 2,2'·bis(3-aminophenyl)bis(4-aminophenyl)_1,1,1,3,3,3_hexa|1prop;^,2-(3-amino Phenyl)_2_(4-fluorenyl)-yl)benzene, I,3-bis(4-amino·a,acgfluoroindolyl) nodal, bis (3-amino-α, α·II) (trifluoromethyl)benzyl)benzene, 1,4-bis(4-amino-a, a-: (trifluoromethyl) benzyl), 2,2-bis[3-(3-amino) Phenoxy)phenyl]-1,1,1,3,3,3-hexafluoropropane, 2,2-bis[4-(4.aminophenoxy)benzene 101111300 46 201248740 base]-1, 1,1,3,3,3-hexafluoropropane and the like. However, the 'fluorinated polyimine precursor is dissolved in the test solution, while the insulating A & 疋poly-proline' is difficult, and organic mixed solution such as alcohol is sometimes used. On the other hand, as a diamine, if 俥田吏 uses 丨, 3·bis(3-aminopropyl)tetramethyl | dioxane, etc. The amine can improve the adhesion to the metal, or reduce the elastic modulus of the above-imine, and reduce the transfer temperature. The glass is transferred to a polyfluorene containing a polyimide or a polyimide precursor. The weight average molecular weight of the polydiimine component in the formation of an insulating layer containing polymethyleneimine, which varies depending on its use, is 3,000^1,000,000 ^|6 i ^ 5,000^500,000 # In the range of 000 to 500,000, if the weight average molecular weight is less than 3, it is difficult to obtain sufficient strength when a coating film or a film is formed, and the strength of the ruthenium when the polyimide or the like is heated to form a polyimide. On the other hand, if the average molecular weight of the heavy denier exceeds 1,000,000, the viscosity increases and the solubility decreases. Therefore, it is difficult to obtain a coating film or film having a smooth surface and a uniform film thickness. The molecular weight used herein refers to a polystyrene-derived value obtained by gel permeation chromatography (GPC), which may be a polyimine. The molecular weight of the precursor itself may be chemically imidized by acetic anhydride or the like. The content of the polyimine component is determined by the film properties of the obtained pattern, particularly film strength or heat resistance. In other words, the solid content of the composition of the polyimine resin 101111300 47 201248740 is preferably 50% by weight or more, more preferably 70% by weight or more. Further, the solid portion of the composition of the polyimine resin is The liquid monomer component other than the solvent is also contained in the solid component. In the embodiment, the insulating layer may further contain a polyimine having a repeating unit represented by the above formula (1), and may be appropriately selected as needed. The polyimine is laminated or combined with other polyphthalocyanines to form an insulating layer. In addition, the above polyimine may also be a photosensitive polyimide or a photosensitive polyimide precursor. And the winner The photopolymerizable polyimine can be obtained by a known method. For example, an ethylenic double bond is introduced by an ester bond or an ionic bond in a carboxyl group of a polylysine, and a photoradical is mixed in the obtained polyimine precursor. The initiator can be used as a solvent to develop a negative photosensitive polyimide precursor. Further, for example, a polynitrous acid or a part thereof can be added to a nitrogen-based compound to form a negative photosensitive photosensitive polymer. An imine precursor; or a compound called a (10) compound added to a poly-acid to form a negative-type photosensitive polyimide precursor; and a neogene reagent can be added to the poly-proline to form a negative image Photosensitive Polyimine Precursor These photosensitive polyimine precursors are added with 15% to 35% of the susceptor component weight relative to the weight of the polyimide component. Therefore, even after 仏 ^ is formed by Fu ~ Yang. C is heated, and the residual component from the photosensitive component is a linear thermal expansion system: or the wetness coefficient is increased. Therefore, if the sensory polyimide is used, 101111300 48 201248740 is compared with The use of non-photosensitive polyimine precursors tends to reduce the sinfulness of the elements. However, a photosensitive polyimide intermediate having a photo-producing agent added to the poly-proline has a pattern even if the amount of the photobase generator added to the additive is 5% or less. After the polyimine, the decomposition residue from the additive is still less, the linear thermal expansion coefficient or the hygroscopic expansion coefficient and the like are less deteriorated, and further, the air leakage is less, so it is most suitable as the application in the present embodiment. Photosensitive polyimine precursor. Among them, the above-mentioned polyiminoimide is preferably obtained by using a photosensitive polyimide or a photosensitive polyimide precursor. When the insulating layer through-hole is formed by photolithography, when a non-photosensitive polyimide is used, since the thickness of the photoresist layer formed on the insulating layer affects the size of the insulating layer through-hole, j An insulating layer through hole having a smaller diameter is formed, and a photosensitive polyimide is preferably used. By using a photosensitive polyimide or a photosensitive polyimide precursor, a fine pattern can be formed, and the diameter of the through hole of the insulating layer can be reduced. As a result, the degree of integration of the electronic component portions disposed on the laminated substrate for electronic components of the embodiment can be improved. The polyimine precursor used in polyimine can be developed by an aqueous alkaline solution, which is based on the viewpoint of ensuring the safety of the working environment and reducing the cost of the process when patterning the insulating layer. Preferably. The alkaline aqueous solution can be easily obtained, and the waste liquid disposal cost or the equipment for ensuring the safety of the work is relatively inexpensive, so that the production can be carried out at a lower cost. In the insulating layer, an additive such as a leveling agent, a plasticizer, a surfactant, and an antifoaming agent such as 101111300 49 201248740 may be contained as needed. The insulating layer may be filled in a portion other than the metal portion for the conduction portion of the opening of the metal layer. That is, the patterned end of the metal layer may also be insulated by an insulating layer. Thereby, the metal layer and the conductive portion can be insulated. The insulating layer has an insulating layer through hole disposed in the opening of the metal layer. The shape of the insulating layer through-holes can be appropriately determined in accordance with the use of the laminated substrate for electronic components of the present embodiment, and the like, and is not particularly limited. The shape of the plane of the insulating layer through-hole can be any shape such as a circular shape, a circular shape, a polygonal shape, or a rectangular shape. X. The shape of the plane of the through hole of the insulating layer may be the same or different from the front and back of the insulating layer. The size of the 彖' 彖 layer through hole is not particularly limited as long as the insulating layer and the metal portion for the first conductive portion of the insulating layer through hole are filled, and the insulating layer through hole can be made more than the metal portion for the conductive portion. Small or big. When the planar shape of the through-hole of the insulating layer is a circular shape, the diameter of the through-hole of the insulating layer is not particularly limited as long as it is a metal for supporting the conductive portion of the first conductive portion filled in the insulating layer through-hole. Wherein 'preferably within the range of Ιμιη~ΙΟΟΟμιη. In particular, in terms of achieving high definition of the element formed on the laminated substrate for an electronic component of the present embodiment, the direct control of the through hole of the insulating layer is preferably in the range of 丨μηι 5 5 μmη, more preferably 1 μm~ Within the range of 2 〇〇 μιη, and even better within the range of 1 μηι~1 () () μιη. When the diameter of the insulating layer through-hole is larger than the above range, when the laminated substrate for an electronic component of the present embodiment is used for a display device, the required aperture ratio cannot be obtained and cannot be improved] 01] 11300 50 201248740 Integration degree (挽度), and there is a hindrance to high definition. Further, in the case where the first conductive portion is filled in the insulating layer through hole, if the diameter of the insulating layer through hole is too small, it is difficult to form the second conductive portion. Further, even when the planar shape of the insulating layer through-hole is not circular, the planar area of the insulating layer through-hole is preferably the same as the area defined by the diameter of the insulating layer through-hole. The size of the first conductive portion depends on the size of the through hole of the insulating layer. Further, the size of the through hole of the insulating layer depends on the insulating layer H. Specifically, since the size of the through hole of the insulating layer is substantially lower than the thickness of the insulating layer, the thickness of the insulating layer can reduce the through hole of the insulating layer. size. Therefore, in order to reduce the size of the through hole of the insulating layer, it is preferable to thin the insulating layer. Further, when the insulating layer through-hole is formed by photolithography, when a non-photosensitive polyimide is used, the thickness of the photoresist layer formed on the insulating layer also affects the size of the insulating layer through-hole. Therefore, as described above, in order to form a light-transparent insulating layer through-hole, it is preferred to use photosensitive polyimide. The position of the insulating layer through the hole can be consistent or inconsistent with the center position of the conductive metal portion. The number of the insulating layer through holes is appropriately selected in accordance with the use of the electronic component product and the layer substrate of the present embodiment. The arrangement of the through-holes of the insulating layer is not particularly limited as long as the insulating layer through-hole is disposed in the opening of the metal layer and is disposed on the metal portion for the conductive portion. 101111300 51 201248740 The insulating layer beacon hole may be disposed on the outer periphery of the laminated substrate for electronic components. For example, the laminated substrate for an electronic component of the present embodiment is used for an organic EL or an electronic squeak, and the insulating layer through hole (10) is disposed on the outer periphery of the laminated substrate 1 for an electronic component as exemplified in the specification of the invention. The lunar electrode layer conductive portion 7a and the transparent electrode layer conductive portion 7b are disposed outside the sealing portion %, and moisture or oxygen can be effectively prevented from entering the device by the laminated substrate for electronic components. As illustrated in Fig. 8, the insulating layer 2 may be formed in a pattern with respect to the metal layer 3. The insulating layer 2 is provided on the surface of the metal layer 3, and the metal layer exposed region Ub of the exposed metal layer 3 is not present. Further, the metal layer exposed region is described in the metal layer item to be described later, and thus the description thereof will be omitted. The thickness of the layer of the yttrium, yttrium, and ytterbium is not particularly limited as long as it satisfies the above characteristics, and is preferably in the range of 1 μm to 1000 μm, more preferably in the range of 1 μm to 2 μm, and more preferably _~ Within the range of 100_. If the thickness of the insulating layer is too small, the insulating property cannot be maintained, and it is difficult to flatten the unevenness on the surface of the metal layer. Further, when the thickness of the insulating layer is too thick, the flexibility is lowered, the weight is excessive, the drying at the time of film formation is difficult, or the amount of material used is increased, and the cost is increased. Further, when the thickness of the right insulating layer is thick, since the heat conductivity of the resin such as polyimide or the like is lower than that of the metal, the thermal conductivity is lowered. In addition, the method of forming the insulating layer and the method of forming the insulating layer through-holes are described in the item "Manufacturing method of the laminated substrate for electronic components" which will be described later. Therefore, the description thereof is omitted here. 101111300 52 201248740 (2) Metal layer The metal layer of the present embodiment is formed in a pattern on the insulating layer, and has an opening portion in a first conductive portion to be described later, and is not electrically connected to the conductive portion. Examples of the metal material constituting the metal layer include aluminum, copper, copper alloy, phosphor bronze, stainless steel (SUS), gold, gold alloy, nickel, nickel alloy, silver, silver alloy, tin, tin alloy, titanium, iron, Iron alloy, zinc, molybdenum, indium steel, etc., but it is not particularly limited, and these can be appropriately selected in accordance with the characteristics described later. The term "metal material" as used herein refers to a monomer or alloy of a metal element, and the definition of a metal element is described in Shriver Inorganic Chemistry, 3rd Edition (on), page 429, and does not include Shi Xi. (In the periodic table, all elements other than hydrogen from Groups 1 to 12, Group A, Ga, In, T1, and 14 of Sn, Pb, and 15 are metal elements.) ^ Dimensional stability From the viewpoint of s, the linear thermal expansion coefficient of the metal layer is in the range of Oppm/t to 25 ppm/t. If the linear thermal expansion coefficient is too large, the expansion and contraction generated when the temperature changes will become large, so that the dimensional stability is caused. In addition, from the viewpoint of dimensionality, the line of the metal layer, t L · ', and the insulting system are close to the thermal expansion coefficient of the insulating layer. When the thermal expansion coefficient of the insulating layer and the metal are closer to each other, the line of the laminated substrate for electronic components is suppressed, and when the thermal environment of the laminated substrate for electronic components changes, the stress at the interface between the super-seven-edge layer and the entire layer becomes small. Improve the adhesion. Further, the difference between the coefficient of thermal expansion of the layer of the dragon and the coefficient of thermal expansion of the insulating layer is described in the item of the insulating layer described in the above-mentioned 101111300 53 201248740, the description of which is omitted here. Further, the linear thermal expansion coefficient of the metal layer is not limited to the insulating layer, and is preferably formed on the insulating layer by a second metal layer, a third metal layer, an electronic component portion, an adhesive layer, an electrode, and a wiring, which will be described later. The linear thermal expansion coefficient of the layer is close. The linear thermal expansion coefficient of the right metal layer is different from the linear thermal expansion coefficient of the layer formed on the insulating layer, and the dimensional stability is lowered and becomes a cause of warping or cracking. The layer formed on the insulating layer is Zn, In, Ga, Cd, Ti, St,

Sn、Te、Mg、W、Mo、Cu、A1、Fe、Sr、Ni、Ir、Mg 等之金屬之氧化物或Si、Ge、B等之非金屬之氧化物或上述元素之氮化物、硫化物、石西化物及此等之混合物（包括如由多元素所構成之陶瓷般依原子等級混合者）等之無機材料作為主成分的情況，此等無機材料中由於亦包括線熱膨脹係數為 10ppm/°C以下者，則較佳係金屬層之線熱膨脹係數亦為較 /J、〇金屬層之線熱膨脹係數更佳為〇ppm/°c〜丨8ppm/〇c之範圍内、再更佳0ppm/°c〜12ppm/°C之範圍内、特佳 0ppm/°C 〜7ppm/°C之範圍内。又，關於金屬或合金之線熱膨脹係數，可參照文獻。例如純金屬之線熱膨脹係數已記載於化學便覽、改訂4版、曰本化學會編基礎編1542頁、基礎編Π17頁。又，數個之合金或氧化物之線熱膨服係數已記载於Materials Science and Engineering, an introduction, W.D. Callister Jr., John Wiley, 101111300 54 201248740 1985。又，關於線熱膨脹係數仍為未知者，可與上述絕緣層之線熱膨脹係數之測定同樣進行而求得。關於線熱膨脹係數之測定方法，除了將金屬層切斷成寬5mmx長20mm作為評價樣本以外，其餘與上述絕緣層之線熱膨職係數的測定方法相同。另外，形成於絕緣層上之層係含有上述氧化物的氧化物層，在使用本實施態樣之電子元件用積層基板製造電子元件時，於進行氧化製程時，較佳係金屬層具有耐氧化性。此係因為將本實施態樣之電子元件用積層基板用於TFT元件時，通常於TFT元件製作時實施高溫處理。尤其是在TFT 元件具有氧化物半導體層的情況，因為於氧存在下、依高溫進行回火處理，故金屬層最好具有耐氧化性。在將本貫施態樣之電子元件用積層基板應用於大型之電子元件的情況、或應用於需要細微加工之電子元件的情況等需要高尺寸穩定性的情況，構成金屬層之金屬材料較佳為 Fe(鐵）系合金、特佳為SUS。SUS除了耐氧化性優越，且耐熱性亦優越以外’相較於銅等其線熱膨脹係數較小而尺寸穩定性優越。又，_ SUS304有耐氧化性、耐純較sus柳高的優點；關於SUS430尚有線熱膨脹係數小於SUS3〇4等優點。另-方©’在將本實施態樣之電子元件用積層基板用於TFT元件時’騎慮到金及财元件之線熱膨服係數’則由線熱膨脹係數的觀點而言，以較SUS43〇更加低線 101111300 55 201248740 不細熱膨膜係數最好亦考慮到起因於耐氧_ 及延性等㈣之力 u金屬⑷之祕注或成本再進行選擇。作為金屬層之形能廿於令届-g、無特別限定，可為例如狀或板狀。於金屬V#的情況，可主击丨2ΐ々々上、 m ^ v - ^ L洎或電解箔，可配合金屬材料種類予以適當選擇。诵縈 ^ ^由合金所構成之金屬箔係藉軋延所展作。乍為金屬層之厚度，若為可滿足上述特性的厚度則無特別限定。具體而言’較佳為—〜1〇〇〇师之範圍内、更佳 μ 200μιη之範圍内、再更佳㈣〜觸哗之範圍内。若金屬層之厚度過薄，财對氧或水纽之阻氣性降低、或電子元件用積層基板之強度降低之虞。又，若金屬層之厚度過厚，則使可撓性降低、變得過重、或成本變高。作為金屬層之表面粗度Ra，係較上賴緣層之表面粗度An oxide of a metal such as Sn, Te, Mg, W, Mo, Cu, A1, Fe, Sr, Ni, Ir, Mg, or a non-metal oxide of Si, Ge, B or the like or a nitride or sulfide of the above element In the case of inorganic materials such as a mixture of materials, stone sulphides, and the like (including those mixed by a multi-element ceramic), the inorganic materials also include a linear thermal expansion coefficient of 10 ppm. / ° C or less, the coefficient of thermal expansion of the preferred metal layer is also better than /J, the linear thermal expansion coefficient of the base metal layer is preferably in the range of 〇ppm / °c ~ 丨 8ppm / 〇c, and even better Within the range of 0 ppm/°c to 12 ppm/°C, particularly preferably in the range of 0 ppm/°C to 7 ppm/°C. Further, regarding the linear thermal expansion coefficient of a metal or an alloy, reference can be made to the literature. For example, the linear thermal expansion coefficient of pure metal has been recorded in the chemical handbook, revised edition 4, 曰本会编编编编编编编编编编编编编编编编编编编编编编Further, the coefficient of thermal expansion of a plurality of alloys or oxides is described in Materials Science and Engineering, an introduction, W. D. Callister Jr., John Wiley, 101111300 54 201248740 1985. Further, the linear thermal expansion coefficient is still unknown, and can be obtained in the same manner as the measurement of the linear thermal expansion coefficient of the insulating layer. The method for measuring the linear thermal expansion coefficient is the same as the method for measuring the thermal expansion coefficient of the above-mentioned insulating layer except that the metal layer is cut into a width of 5 mm x a length of 20 mm as an evaluation sample. Further, the layer formed on the insulating layer contains the oxide layer of the oxide, and when the electronic component is produced by using the laminated substrate for electronic component of the present embodiment, it is preferable that the metal layer is resistant to oxidation during the oxidation process. Sex. In the case where the multilayer substrate for an electronic component of the present embodiment is used for a TFT element, high-temperature processing is usually performed at the time of fabrication of the TFT element. In particular, in the case where the TFT element has an oxide semiconductor layer, since the tempering treatment is performed at a high temperature in the presence of oxygen, the metal layer preferably has oxidation resistance. The metal material constituting the metal layer is preferably used in the case where the laminated substrate for electronic components of the present embodiment is applied to a large electronic component or when it is applied to an electronic component requiring fine processing. It is an Fe (iron)-based alloy, and particularly preferably SUS. In addition to excellent oxidation resistance and excellent heat resistance, SUS has a smaller coefficient of thermal expansion than copper and has excellent dimensional stability. Moreover, _ SUS304 has the advantages of oxidation resistance and purity resistance compared with sus willow; the thermal expansion coefficient of SUS430 is less than that of SUS3〇4. In the case where the laminated substrate for electronic components of the present embodiment is used for a TFT element, the linear thermal expansion coefficient of the gold and the financial components is taken from the viewpoint of the linear thermal expansion coefficient, and is compared with SUS43. 〇More low line 101111300 55 201248740 The fine thermal expansion coefficient is also best selected considering the secrets or cost of the metal (4) due to the resistance of oxygen and _ (4). The shape of the metal layer can be, for example, a gram or a plate shape. In the case of metal V#, the main 丨 2 ΐ々々, m ^ v - ^ L 洎 or electrolytic foil can be appropriately selected in accordance with the metal material type.诵萦 ^ ^ The metal foil consisting of alloys is exhibited by rolling. The thickness of the metal layer is not particularly limited as long as it satisfies the above characteristics. Specifically, it is preferably within the range of -1 〇〇〇〇〇〇, more preferably within the range of μ 200 μm, and even more preferably (four) ~ within the range of touch. If the thickness of the metal layer is too thin, the gas barrier properties of the oxygen or water barrier are lowered, or the strength of the laminated substrate for the electronic component is lowered. Further, if the thickness of the metal layer is too thick, the flexibility is lowered, the weight is excessive, or the cost is increased. As the surface roughness Ra of the metal layer, the surface roughness of the upper layer

Ra更大者，例如為5〇nm〜2〇〇nm左右。又關於上述表面粗度之測定方法，係與上述絕緣層之表面粗度測定方法相同。金屬層係形成為圖案狀者，於第丨導通部上具有開口部。作為金屬層之開口部的形狀，若為可將後述之導通部用金屬部配置於金屬層之開口部内的形狀則無特別限定^金屬層之開口部的平面形狀可設為例如圓形狀、橢圓形狀多角形狀、矩形狀等之任意形狀。 101111300 56 201248740 金屬層之開口部的大小若為金屬層之開π部内4可於金屬金屬部配置於通孔，則無特別限定。. 巴琢增貝金屬層之開口部的數量将西里係配合本實施態樣之電積層基板的用途而適當選擇。电十疋件用作為金屬層之開口部的配置，於金屬層之開π部内則無特別限定。部用金屬部配置金屬層之開口部係與上迷絕緣ί貫通孔同樣地’可配置於電子元件用積層基板之外周部。、金屬層之圖案端部較佳係由被覆層所被覆，更佳係金⑽ 之開口部内之導通部用金屬部以外的部分由被覆層㈣充。藉此，可使金層層與導通部被絕緣。其中，金屬層之開口部内之導通部用金屬部以外的部分，較佳係由上述絕緣声或後述之第2絕緣層所填充。在《層為絕緣層或第2絕二層的情況’可使電子元件用積層基板之製造步略化。由絕緣層及第2躲層之任—者填充金屬層之開口部内之導通部用金屬部以外的部分，係配合本實施態樣之電子元件用積層基板之製造方法予以適當選擇。作為金屬層所形成之區域的面積’若可確保電子元件用積層基板所需之阻蔽性則無特別限定’在將電子元件用積層基板整體之面積設為100%時，金屬層所形成之區域整體的面積較佳為80%以上、更佳90%以上、再更佳95%以上。若 101111300 57 201248740 金屬層所形成之區域整體的面積小於上述範圍，則有無法得到所需之阻蔽性之虞。又，若金屬層所形成之區域較少，則視絕緣層及第2絕緣層之厚度，有電子元件用積層基板之強度降低之虞。又，金屬層所形成之區域整體的面積的上限為未滿100%。金屬層亦可於金屬層之至少一面上具有不存在絕緣層或第2絕緣層、使金屬層露出的金屬層露出區域。如圖9所示’在將本實施態樣之電子元件用積層基板1 用於有機EL元件21時，絕緣層2形成於金屬層3之外緣部以外處，在電子元件用積層基板1之元件所配置之面之金屬層3的外緣部設置金屬詹露出區域11 b的情況，可使電子元件用積層基板1之金屬層3與透明密封基板25直接密黏’而可更牢固地防止水分或氧侵入至有機EL元件中。又，在電子元件用積層基板之元件所配置的面上設有金屬層露出區域時，藉由將密封部選擇性地配置於金屬層露出區域，則可於面内區隔有機EL元件、或依多面狀態進行密封，而有可依南生產性製造元件的優點。另外，如圖7及圖9所例示般，在將本貫施態樣之電子元件用積層基板1用於有機EL元件21時，使第2絕緣層4 對金屬層3形成為圖案狀，在電子元件用積層基板1之與元件所配置之面相反側之面上設有金屬層露出區域Ha時，可提高電子元件用積層基板之放熱性。藉此，可有效抑制因有 101111300 58 201248740 機EL元件之發熱所造成的元件劣化。金屬層露出區域之形狀、大小、配置、數量等並無特別限定，可配合設置上述金屬層露㈣域的目的㈣當選擇。作為金屬層之形成方法，可使用一般方法，配合金屬材料 t種類或金㈣之厚度以騎。繼呵為得到金屬層單體的方}亦可為將金屬材料蒸鍍於絕緣層上，得到金屬層與絕緣狀韻如料。心，纽驗較佳為得到金屬層單體的方法。 ”The Ra is larger, for example, about 5 〇 nm to 2 〇〇 nm. Further, the method for measuring the surface roughness is the same as the method for measuring the surface roughness of the insulating layer. The metal layer is formed into a pattern, and has an opening on the second conductive portion. The shape of the opening of the metal layer is not particularly limited to a shape in which the metal portion for the conductive portion to be described later is disposed in the opening of the metal layer. For example, the planar shape of the opening of the metal layer can be, for example, a circular shape or an ellipse. Any shape such as a polygonal shape or a rectangular shape. 101111300 56 201248740 The size of the opening of the metal layer is not particularly limited as long as the metal layer is disposed in the through hole. The number of openings in the metal layer of the Basil enhancement shell is appropriately selected in accordance with the use of the SiGe system in accordance with the electrode layer substrate of the present embodiment. The arrangement of the eleventh member as the opening of the metal layer is not particularly limited in the π portion of the metal layer. In the metal portion, the opening portion of the metal layer is disposed in the outer peripheral portion of the multilayer substrate for the electronic component in the same manner as the insulating via hole. Preferably, the pattern end portion of the metal layer is covered by the coating layer, and it is more preferable that the portion other than the metal portion for the conduction portion in the opening portion of the gold (10) is filled with the coating layer (four). Thereby, the gold layer and the conductive portion can be insulated. The portion other than the metal portion for the conduction portion in the opening portion of the metal layer is preferably filled with the insulating sound or the second insulating layer described later. In the case where the layer is an insulating layer or a second insulating layer, the manufacturing steps of the laminated substrate for electronic components can be simplified. The portion other than the metal portion for the conductive portion in the opening portion of the metal layer filled with the insulating layer and the second layer is appropriately selected in accordance with the method for producing the laminated substrate for electronic components of the present embodiment. The area of the region in which the metal layer is formed is not particularly limited as long as the barrier property required for the laminated substrate for electronic components is ensured. When the area of the entire laminated substrate for electronic components is 100%, the metal layer is formed. The area of the entire region is preferably 80% or more, more preferably 90% or more, still more preferably 95% or more. If the area of the entire region formed by the metal layer of 101111300 57 201248740 is smaller than the above range, the desired barrier property cannot be obtained. Further, when the area of the metal layer is small, the thickness of the insulating layer and the second insulating layer may be lowered by the strength of the laminated substrate for electronic components. Further, the upper limit of the area of the entire region formed by the metal layer is less than 100%. The metal layer may have a metal layer exposed region on the at least one side of the metal layer in which the insulating layer or the second insulating layer is not present and the metal layer is exposed. As shown in FIG. 9 , when the multilayer substrate 1 for electronic components of the present embodiment is used for the organic EL element 21, the insulating layer 2 is formed outside the outer edge portion of the metal layer 3, and the laminated substrate 1 for electronic components is used. When the outer edge portion of the metal layer 3 on the surface on which the element is disposed is provided with the metal exposed region 11 b, the metal layer 3 of the laminated substrate 1 for electronic components and the transparent sealing substrate 25 can be directly adhered to each other to be more firmly prevented. Moisture or oxygen intrudes into the organic EL element. Further, when the metal layer exposed region is provided on the surface on which the components of the electronic component laminated substrate are disposed, by selectively disposing the sealing portion in the metal layer exposed region, the organic EL element can be interposed in the plane, or It is sealed in a multi-faceted state, and has the advantage of being able to manufacture components in the south. In addition, as shown in FIG. 7 and FIG. 9, when the laminated substrate 1 for electronic components of the present embodiment is used for the organic EL element 21, the second insulating layer 4 is formed into a pattern shape for the metal layer 3, When the metal layer exposed region Ha is provided on the surface of the build-up substrate 1 for electronic components on the side opposite to the surface on which the elements are disposed, the heat dissipation property of the laminated substrate for electronic components can be improved. Thereby, element deterioration due to heat generation of the EL element of 101111300 58 201248740 can be effectively suppressed. The shape, size, arrangement, number, and the like of the exposed area of the metal layer are not particularly limited, and may be selected in accordance with the purpose of (4) setting the metal layer exposed (four) domain. As a method of forming the metal layer, a general method can be used to match the thickness of the metal material t or the thickness of the gold (4). In order to obtain the metal layer monomer, it is also possible to evaporate the metal material on the insulating layer to obtain a metal layer and an insulating material. The heart, the test is preferably a method of obtaining a metal layer monomer. ”

尚且’關於金屬層之圖案化方法，係記载於後述之「E 電子元件用積層基板之製造方法」項目中，於此省略盆說明。 (3)第1導通部 ” 本實施態樣之第1導通部係填充於上述絕緣層貫通孔，構成導通部之一部分。作為第1導通部之材料，若可填充於絕緣層貫通孔則無特別限定’通常使用金屬。作為金屬，可舉例如紹(Al)、金 (Au)、銀(Ag)、鈷(Co)、鎳(Ni)、鉑(pt)、銅(Cu)、錫(sn)、鋅(Zn)、鉻(Cr)、鐵(Fe)及此等金屬之合金等。第1導通部T由1種材料形成，亦可使用2種以上之材料而形成。另外，在藉電鍍形成第1導通部時，基本上係使用上述金屬之單體。此等金屬可依丨種單獨使用，亦可使用複數種金屬。在使用不同金屬進行鍍覆時，係依序實施鍍覆。 101111300 59 201248740 由電氣傳導性的觀點而言，第丨導通部較佳係電阻係數低。具體而言，室溫下之電阻係數較佳為lxl〇-4ncm以下、更佳5xl(T5Qcm以下、再更佳lxl〇_5Qcm以下。作為第1導通部之態樣，若形成於電子元件用積層基板之厚度方向、亦即絕緣層之厚度方向上則無特別限定。其中，較佳係相對於絕緣層之厚度方向呈平行地形成第丨導通部。另外’第1導通部之形狀係配合上述絕緣層貫通孔之形狀而適當決定，並可配合本實施態樣之電子元件用積層基板之用途等而適當決定，並無特別限定。作為第i導通部之平面形狀’例如可^為圓形狀、橢圓形狀、多角形狀、矩形狀等之任意形狀。又，第1導通部之形狀可於絕緣層之表背面為相同或相異。，第1導通。卩之大小係配合上述絕緣層貫通孔之大小而適當決定。在將第1導通部之平面形狀設為圓形狀時’第i 導通部之直㈣設為與上述絕緣層貫通孔之直徑相同。又， =1導通部之平面形狀不為圓形狀時姻 :::=積為與㈣第一直徑™之沿割丨㈣物_貫通孔另外，第1導通部係與上述絕置於電子元相_紐之相t M地，亦可配 W1U1300 201248740 第1導通部之數量係配a a 基板之用途而適當選擇。又°本貫施態樣之電子元件用積層 ’在複數配置了第1導通部時，其配置可配合本實施態樣、奈本雙搭,,, 之電子元件用積層基板之用途而適當選擇，例如可如圖1(>Λ )所示般規則地配列。尚且，關於第1導通部之 _ ^ L v成方法，由於記載於後述之「E. 電子元件用積層基板之製造明。万法」項目中’故於此省略其說 (4)導通部用金屬部本實施態樣中之導通部用少 „ 用主屬部係形成於上述金Μ爲+ 開口部内，配置於上述第丨屬層之之材料所構成’並構成導通部之：部分由:、上述金屬層相同導通部用金屬部若由鱼〇刀。、金屬層相同之材料所構別限定，較佳係在金屬層冓成則無特圖案化的同時所形成。拉1 屬層進行勉刻，可同時進 θ由對金 π 知丁金屬層之加工與導通部用金^ 嗓化別之金屬層作為給電層造彳-+ 專，而可縮短導通部之形成製程。胃進仃電錢作為導通部用金屬部 + 置於金屬層之開巧心㈣金屬部配。卩内的形狀即可，可配合本實施離 = 用積層基板之用途等而適當決定，並c 為導通部用金屬部作狀、多角形狀祐狀，圓形之形狀可祕等之任意雜。又，導通部用金屬，邊可於表背面為相同或相異。 °ρ 】〇】】Π30〇 201248740 導通部用金屬部之大小係若為使導通部用金屬部配置於金屬層之開口部内，由絕緣層與填充於絕緣層貫通孔之第ι 導通部支料ϋ部时屬部，㈣導通朝金屬部配置於第 1導通部上’則無制限定，導通部用金屬部可較第^導通部大或小。導通部用金屬部之數量係配合本實施H樣之電子元件用積層基板而適當選擇。作為導通部用金屬部之配置，若使導通部用金屬部配置於金屬層之開口部内則無特別限定。導通部用金屬部係與上述絕緣層貫通孔同樣地，亦可配置於電子元件用積層基板之外周部。作為導通部用金屬部之形成方法，可設為與上述金屬層之圖案化方法相同。 (5)第2絕緣層本實施態樣中較佳係於上述金屬層上形成第2絕緣層。藉由於金屬層之兩面上分別形成絕緣層及第2絕緣層，則可使金屬層及導通部絕緣，並可於第2絕緣層上依與導通部導通之方式形成電極或佈線等。本實施態樣中之第2絕緣層係形成於金屬層上，並具有配置於上述導通部用金屬部上的第2絕緣層貫通孔。尚且，由於第2絕緣層之特性、材料、厚度、形成方法等均與上述絕緣層相同’故於此省略其說明。 101111300 62 201248740 第2、、’邑、、’彖層可填充於金屬層之開口部内之導通部用金屬部以外的部分。亦即，可使金屬層之圖案端部被第2絕緣層所絕緣。藉此，可使金屬層及導通部絕緣。第2絕緣層係具有配置於導通部用金屬部上的第2絕緣層貫通孔。尚且，第2絕緣層貫通孔之形狀、中心位置、大小、數量、配置、形成方法料與上賴緣層貫通孔相同，故於此省略其說明。第2絕緣層貫通狀雜可與上錢緣層貫通孔之形狀相同或相異。又，第2絕緣層貫通孔之中心位置可與上述絕緣層貫通孔之中心位置一致或不一致。如上述，第2絕緣層係相對於金屬層形成為圖案狀，亦可於:屬層之面上設置不存在第2絕緣層、露出金屬層的金屬層露出區域。 (6)第2導通部導=Γ，亦可於上述第2絕緣層貫通孔中填充第2 導通部。該第2輸輪於増構成導通部之一部分。貝、扎Τ 尚且，第2導通部之材料、大小、配置、數量等均與上述第1導通部相同，故於此省略其說明。法異第2㈣部之材料可與上述第1導通部之材科相同或相 101111300 63 201248740 (7)導通部之本實施態樣中之導通部係形成於電子元件用積層基板厚度方向上，使電子元件用積層基板之表背導通，不與上述金屬層導通者，至少具有上述第丨導通_上述導通部用金屬部。又’導通部亦可進—步具有上述第2導通部。導通部通常連接於電子元件部之電極或佈線。又，所謂導通部連接於電極或佈線，係指1少1分之導通部連接至電 =佈線。例如’可為所有之導通部連接至電極或佈線，亦可為-部分之導通部連接巧作為導通部之配置，若為伟I飞佈線基板之厚度方向上、使電子2通邹形成於電子元件用積層無特別限定。 #_層基板之表背導通’則導通4係如上述般，亦可配置於電子元件用積層基板之外周部。導通部之數㈣配合本實施態樣之電子元剌積層基板之用途而適當選擇。又，在導通部為複數配置的情況，其配置係配合本實施態樣之電子元件用積層基板之用途而適當選擇’可例如圖1(b)所示般規則配列。在將本實施態樣之電子元件用積層基板用於主動矩陣型之電子元件時，係如圖10(a)、（b)所例示般，可設置連接於電子元件部30之閘極導線32g的閘極導線用導通部7g、與連接至電子元件部30之源極導線32s的源極導線用導通部 101111300 64 201248740 7s。又，圖10(a)係由電子元件用積層基板之絕緣層2侧之面所觀看的平面圖，圖10(b)係由電子元件用積層基板之第 2絕緣層4側之面所觀看的平面圖，圖1〇(a)、（b)係簡略表示佈線的概略圖。圖l〇(a)中，係於絕緣層2上、亦即電子元件用積層基板之絕緣層2側上形成電子元件部30。圖1〇(b) 中，係於第2絕緣層4上、亦即電子元件用積層基板之第2 絕緣層4側形成驅動器（控制IC)35，藉由佈線33將閘極導線用導通部7g及源極導線用導通部7s連接至驅動器（控制 IC)35。關於主動矩陣型之電子元件的佈線方法，可採用公知方法。在將本實施態樣之電子元件用積層基板用於被動矩陣型之電子元件時’係如圖U所例示般，可設置連接至X佈線 32x(其連接至電子元件部3〇之背面電極層）之背面電極層用導通部7a、與連接至y佈線32y(其連接至電子元件部30之透明電極層）之透明電極層用導通部7b。又，圖u係由電子疋件用積層基板之絕緣層2側之面觀察的平面圖，為簡略表示佈線的概略圖。圖u中，係於絕緣層2上、亦即電子元件用積層基板之絕緣層2側上形成有電子元件部30、X 佈線32x及y佈線32y。另外’在將本實施態樣之電子元件用積層基板用於被動矩陣型之電子元件時’係如圖12所例示般，可依各個電子元 101111300 65 201248740 件部30設置導通部7。又，圖12係由電子元件用積層基板之絕緣層2侧之面觀看的平面圖。圖12中，係於絕緣層2 上、亦即電子元件用積層基板之絕緣層2側上形成電子元件部30。又，雖未圖示，但於第2絕緣層上、亦即電子元件用積層基板之第2絕緣層側上，形成有連接至電子元件部 30之背面電極層的χ怖線、與連接至電子元件部3〇之透明電極層的y佈線。關於被動矩陣型之電子元件的佈線方法，可採用公知方法。 (8)第2金屬層本實施態樣之電子元件用積層基板係如圖13所例示般，較佳係進一步具有形成於絕緣層2之與金屬層3側為相反側的面上，配置成被覆金屬層3之開口部i3h，與第χ導通部 6導通的第2金屬層16。藉由使第2金屬層配置成被覆金屬層之開口部’則使於電子元件用積層基板之厚度方向上金屬層、第2金屬層、導通部用金屬部、第i導通部、第2導通部均不存在的區域消失，可防止水分或氧的料。在將本實施態樣之電子元件用積層基板用於作為由元件上方予以密封的密封基板時，特佳係形成此第2金屬層。由於第2金屬層可成為電子元件部之電極或佈線，故作為構成第2金屬層之材料’係、配合本實施態樣之電子元件用積層基板之用途而適當選擇。 101111300 66 201248740 例如在將本實施態樣之電子元件用積層基板用於有機H l 元件或電子紙時，第2金屬層可成為背面電極層。此時，作為第2金屬層之材料，若為導電體則無特別限定，可舉例如：Au、Ta、W、Pt、Ni、Pd、Cr、Cu、Mo、鹼金屬、鹼土族金屬等之金屬單體、此等金屬之氧化物，及、 AICa、AlMg荨之Α1合金、MgAg等之Mg合金、祕合金、 Cr合金、鹼金屬之合金 '鹼土族金屬之合金等之合金等。此等導電體可單獨使用或組合2種以上使用，亦可使用2 種以上予以積層。另外，例如在將本實施態樣之電子元件用積層基板用於 TFT元件時，第2金屬層可成為閘極導線、源極導線、構成 TFT之閘極電極、源極電極及汲極電極。此時，由導電性的觀點而言，較佳係第2金屬層為由無機材料所構成。作為構成第2金屬層的無機材料，若為具備所需導電性者則無特別限定，可使用一般TFT所使用之導電體。作為此種無機材料之例子’可舉例如 Cu、Ta、Ti、Al、Zr、Cr、Nb、Hf、 Mo、Au、Ag、Pt、Mo-Ta 合金、W-Mo 合金、ITO、IZO 等。In addition, the method of patterning the metal layer is described in the item "Manufacturing method of the laminated substrate for E-electronic components" which will be described later, and the description of the pot is omitted here. (3) First conductive portion" The first conductive portion of the present embodiment is filled in the insulating layer through hole to constitute one of the conductive portions. The material of the first conductive portion can be filled in the insulating layer through hole. In particular, a metal is usually used. Examples of the metal include, for example, Al (Al), gold (Au), silver (Ag), cobalt (Co), nickel (Ni), platinum (pt), copper (Cu), and tin ( Sn), zinc (Zn), chromium (Cr), iron (Fe), alloys of these metals, etc. The first conductive portion T is formed of one type of material, and may be formed using two or more kinds of materials. When the first conductive portion is formed by electroplating, the metal monomer is basically used. These metals may be used singly or in combination with a plurality of metals. When plating with different metals, plating is sequentially performed. 101111300 59 201248740 From the viewpoint of electrical conductivity, the second conductive portion preferably has a low resistivity. Specifically, the resistivity at room temperature is preferably lxl 〇 -4 ncm or less, more preferably 5 x 1 (less than T5 Qcm). Further, it is preferably lxl 〇 _5 Qcm or less. As a first conductive portion, it is formed on a laminated substrate for an electronic component. The thickness direction, that is, the thickness direction of the insulating layer is not particularly limited. Preferably, the second conductive portion is formed in parallel with respect to the thickness direction of the insulating layer. Further, the shape of the first conductive portion is matched with the insulating layer. The shape of the through-holes is appropriately determined, and can be appropriately determined in accordance with the use of the laminated substrate for electronic components of the present embodiment, and the like, and is not particularly limited. The planar shape of the i-th conductive portion can be, for example, a circular shape or an ellipse. Any shape such as a shape, a polygonal shape, or a rectangular shape. Further, the shape of the first conductive portion may be the same or different from the front and back surfaces of the insulating layer. The first conductive portion is sized to match the size of the through hole of the insulating layer. When the planar shape of the first conductive portion is a circular shape, the straight portion (four) of the i-th conductive portion is the same as the diameter of the through hole of the insulating layer. Further, the planar shape of the conductive portion is not a circle. In the shape of the marriage::: = product and (4) the first diameter TM along the cutting edge (four) object _ through hole In addition, the first conduction portion and the above-mentioned absolute placement of the electronic element phase _ New Zealand, can also be matched W1U1300 201248740 (1) The number of the conductive portions is appropriately selected in accordance with the use of the aa substrate. In the case where the first conductive portion is disposed in a plurality of layers for the electronic component, the configuration can be matched with the present embodiment, Naibi Double The electronic component is appropriately selected by the use of the laminated substrate, and can be regularly arranged, for example, as shown in Fig. 1 (>). Further, the method of forming the first conductive portion is described by In the following section, "E. Manufacturing of laminated substrate for electronic components. "Wan method" is omitted here. (4) Metal part for conductive portion is used for the conductive portion in the present embodiment. The metal element is formed in the + opening portion, and the material disposed in the second layer is formed to constitute the conductive portion: the metal portion of the metal layer is the same as the metal portion of the conductive portion. The material having the same metal layer is defined by a structure, and is preferably formed while the metal layer is formed without special patterning. Pulling the 1 genus layer for engraving, the θ can be simultaneously entered into the θ by the processing of the gold π 丁金属金属金属金属与与导导导导金属金属金属金属金属金属 + + + + + + + + + + + + + + + + + + + + + + + Process. The stomach enters the electricity money as the metal part of the conduction part + is placed in the metal layer (4) metal part. The shape in the crucible may be appropriately determined in accordance with the use of the laminated substrate in the present embodiment, and c is a metal portion of the conduction portion, a polygonal shape, and a circular shape. Further, the conductive portion is made of metal, and the sides may be the same or different on the front and back sides. °ρ 】〇】】Π30〇201248740 The size of the metal part for the conduction part is such that the metal part of the conduction part is placed in the opening of the metal layer, and the insulating layer and the first conductive part filled in the through hole of the insulating layer In the case of the crotch portion, (4) the conduction to the metal portion is disposed on the first conductive portion, there is no limitation, and the metal portion for the conduction portion may be larger or smaller than the first conductive portion. The number of metal portions for the conduction portion is appropriately selected in accordance with the laminated substrate for electronic components of the present embodiment. The arrangement of the metal portions for the conduction portions is not particularly limited as long as the metal portions for the conduction portions are disposed in the openings of the metal layers. Similarly to the insulating layer through-holes, the metal portion for the conductive portion may be disposed on the outer peripheral portion of the laminated substrate for electronic components. The method of forming the metal portion for the conduction portion can be the same as the method for patterning the metal layer. (5) Second insulating layer In the present embodiment, it is preferable to form a second insulating layer on the above metal layer. When the insulating layer and the second insulating layer are formed on both surfaces of the metal layer, the metal layer and the conductive portion can be insulated, and an electrode or a wiring can be formed on the second insulating layer so as to be electrically connected to the conductive portion. The second insulating layer in the present embodiment is formed on the metal layer and has a second insulating layer through hole disposed in the metal portion for the conduction portion. Further, since the characteristics, material, thickness, and formation method of the second insulating layer are the same as those of the insulating layer, the description thereof will be omitted. 101111300 62 201248740 The second, '邑, 彖' layer can be filled in a portion other than the metal portion for the conduction portion in the opening of the metal layer. That is, the pattern end portion of the metal layer can be insulated by the second insulating layer. Thereby, the metal layer and the conductive portion can be insulated. The second insulating layer has a second insulating layer through hole disposed in the metal portion for the conductive portion. Further, the shape, the center position, the size, the number, the arrangement, and the forming method of the second insulating layer through-hole are the same as those of the upper peripheral layer through-hole, and thus the description thereof will be omitted. The second insulating layer may have the same or different shape as the through hole of the upper edge layer. Further, the center position of the through hole of the second insulating layer may coincide with or not coincide with the center position of the through hole of the insulating layer. As described above, the second insulating layer is formed in a pattern shape with respect to the metal layer, and the metal layer exposed region in which the second insulating layer is not present and the metal layer is exposed may be provided on the surface of the genus layer. (6) The second conductive portion may be filled with the second conductive portion in the second insulating layer through hole. The second transfer wheel forms part of the conductive portion at 増. Further, the material, the size, the arrangement, the number, and the like of the second conductive portion are the same as those of the first conductive portion, and thus the description thereof will be omitted. The material of the second (fourth) portion may be the same as the material of the first conductive portion or the phase of the first conductive portion 101111300 63 201248740 (7) The conductive portion of the conductive portion of the conductive portion is formed in the thickness direction of the laminated substrate for the electronic component. The surface of the laminated circuit for the electronic component is electrically connected to the front surface of the laminated substrate, and the third metal conduction portion is not provided to the conductive layer. Further, the conductive portion may further have the second conductive portion. The conductive portion is usually connected to an electrode or a wiring of the electronic component portion. Further, the connection between the conduction portion and the electrode or the wiring means that the conduction portion which is less than one minute is connected to the electric wiring. For example, 'all the conductive portions may be connected to the electrodes or wirings, or the conductive portions of the - portions may be connected as the conductive portions. If the thickness of the conductive wiring substrate is in the thickness direction, the electrons are formed in the electrons. The layer for the component is not particularly limited. The conduction back 4 of the #_layer substrate may be disposed on the outer peripheral portion of the laminated substrate for electronic components as described above. The number of the conductive portions (4) is appropriately selected in accordance with the use of the electron-emitting layer substrate of the present embodiment. In the case where the conductive portions are arranged in plural, the arrangement is appropriately selected in accordance with the use of the laminated substrate for electronic components of the present embodiment, and can be arranged in a regular manner as shown in Fig. 1(b). When the laminated substrate for electronic components of the present embodiment is used for an active matrix type electronic component, as shown in FIGS. 10(a) and (b), a gate wire 32g connected to the electronic component portion 30 can be provided. The gate lead conductive portion 7g and the source lead conductive portion 101111300 64 201248740 7s connected to the source lead 32s of the electronic component portion 30. In addition, FIG. 10(a) is a plan view of the surface of the multilayer substrate for the electronic component, which is viewed from the surface on the side of the second insulating layer 4 of the multilayer substrate for electronic components. Fig. 1(a) and (b) are schematic diagrams showing the wiring in a simplified manner. In Fig. 10(a), the electronic component portion 30 is formed on the insulating layer 2, that is, on the side of the insulating layer 2 of the laminated substrate for electronic components. In Fig. 1 (b), a driver (control IC) 35 is formed on the second insulating layer 4, that is, on the second insulating layer 4 side of the multilayer substrate for electronic components, and a gate lead conductive portion is formed by the wiring 33. The 7 g and source wire conduction portion 7s is connected to a driver (control IC) 35. Regarding the wiring method of the active matrix type electronic component, a known method can be employed. When the laminated substrate for an electronic component of the present embodiment is used for a passive matrix type electronic component, as illustrated in FIG. U, a back electrode layer connected to the X wiring 32x (which is connected to the electronic component portion 3) may be provided. The back electrode layer conductive portion 7a and the transparent electrode layer conductive portion 7b connected to the y wiring 32y (which is connected to the transparent electrode layer of the electronic component portion 30). Further, Fig. u is a plan view of the surface of the multilayer substrate for an electronic component on the side of the insulating layer 2, and is a schematic view showing the wiring. In Fig. u, the electronic component portion 30, the X wiring 32x, and the y wiring 32y are formed on the insulating layer 2, that is, on the insulating layer 2 side of the multilayer substrate for electronic components. Further, when the laminated substrate for an electronic component of the present embodiment is used for a passive matrix type electronic component, as shown in Fig. 12, the conductive portion 7 can be provided for each electronic component 101111300 65 201248740. Further, Fig. 12 is a plan view of the laminated circuit on the side of the insulating layer 2 of the electronic component. In Fig. 12, the electronic component portion 30 is formed on the insulating layer 2, that is, on the side of the insulating layer 2 of the laminated substrate for electronic components. Further, although not shown, the second insulating layer, that is, the second insulating layer side of the electronic component laminated substrate, is formed with a sinus line connected to the back electrode layer of the electronic component portion 30, and is connected to The y wiring of the transparent electrode layer of the electronic component portion 3〇. Regarding the wiring method of the passive matrix type electronic component, a known method can be employed. (8) Second metal layer The laminated substrate for electronic components of the present embodiment is preferably formed on the surface of the insulating layer 2 opposite to the metal layer 3 side as illustrated in FIG. The opening portion i3h of the metal layer 3 is covered, and the second metal layer 16 is electrically connected to the second conductive portion 6. When the second metal layer is disposed to cover the opening portion of the metal layer, the metal layer, the second metal layer, the metal portion for the conduction portion, the ith conduction portion, and the second conduction are formed in the thickness direction of the multilayer substrate for electronic components. Areas where none exist are eliminated, and moisture or oxygen can be prevented. When the laminated substrate for an electronic component of the present embodiment is used as a sealing substrate sealed from the upper side of the element, it is particularly preferable to form the second metal layer. Since the second metal layer can be used as an electrode or a wiring of the electronic component, it is appropriately selected as the material constituting the second metal layer and the use of the laminated substrate for electronic components of the present embodiment. 101111300 66 201248740 For example, when the laminated substrate for electronic components of the present embodiment is used for an organic H l element or electronic paper, the second metal layer can be a back electrode layer. In this case, the material of the second metal layer is not particularly limited as long as it is a conductor, and examples thereof include Au, Ta, W, Pt, Ni, Pd, Cr, Cu, Mo, an alkali metal, and an alkaline earth metal. A metal monomer, an oxide of such a metal, an alloy of AICa, AlMg荨, a Mg alloy such as MgAg, a secret alloy, a Cr alloy, an alloy of an alkali metal, an alloy of an alkaline earth metal, or the like. These conductors may be used singly or in combination of two or more kinds, or two or more layers may be used. Further, for example, when the multilayer substrate for an electronic component of the present embodiment is used for a TFT element, the second metal layer can serve as a gate wiring, a source wiring, a gate electrode constituting the TFT, a source electrode, and a drain electrode. In this case, from the viewpoint of conductivity, the second metal layer is preferably made of an inorganic material. The inorganic material constituting the second metal layer is not particularly limited as long as it has a desired conductivity, and a conductor used in a general TFT can be used. Examples of such an inorganic material include, for example, Cu, Ta, Ti, Al, Zr, Cr, Nb, Hf, Mo, Au, Ag, Pt, Mo-Ta alloy, W-Mo alloy, ITO, IZO, and the like.

作為第2金屬層之形成位置，若使第2金屬層形成於絕緣層之與金屬層側為相反側的面上即可，可使第2金屬層直接形成於絕緣層上方；在於絕緣層之與金屬層側為相反側之面上形成有後述之密黏層時，可使第2金屬層直接形成於密黏層上方；在將本實施態樣之電子元件用積層基板用於TFT 101111300 67 201248740 元件時’可於絕緣層及第2金屬層之間形成半導體層、閘極絕緣膜等。其中，較佳係使第2金屬層直接形成於絕緣層上方、或使第2金屬層直接形成於密黏層上方。另外，作為第2金屬層之配置’若使第2金屬層配置成被覆金屬層之開口部’且配置成並無於電子元件用積層基板之厚度方向上金屬層、第2金屬層、導通部用金屬部、第1 導通部、第2導通部均不存在的區域即可，可配合本實施態樣之電子元件用積層基板的用途而適當選擇。作為第2金屬層之形成方法，可設為與電子元件中一般之電極或佈線之形成方法相同。另外，作為第2金屬層之厚度，係配合本實施態樣之電子元件用積層基板的用途而適當選擇，可設為與電子元件中一般之電極或佈線之厚度相同。 (9)第3金屬層本實施態樣之電子元件用積層基板係如圖Η所例示般，較佳係進-步具有形成於第2絕緣層4上，配置成被覆金屬層3之開口部13h，與第2導通部1G導通的第3金屬層17。藉由使第3金屬層配置成被覆金屬層之開口部，職於電子元件用積層基板之厚度方向上金制、第3金屬層、導通部用金屬部、第1導通部、第2導通部均不存在的區域消失，可防止水分或氧的穿透。在將本實施態樣之電子元件用積層基板用於作為由元件上方予以密封的密封基板時，特佳係形 101111300 68 201248740 成此第3金屬層。由於第3金屬層可成為電子元件部之電極或佈線，故構成第3金屬層之材料，可^為與上述第2金屬層之材料相同0 作為第3金屬層之形成位置，若使第3金屬層形成於第2 絕緣層上即可。通常使第3金屬層形成於紅絕緣層正上方。另外，作為第3金屬層之配置，若使第3金屬層配置成被覆金屬層之開口部，且配置成並無於電子元件_層基板之厚度方向上金屬層、第3金屬層、導通部用金屬部、第ι 導通部、第2導通部均不存在的區域即可，可配合本實施態樣之電子元件用積層基板的用途而適當選擇。作為第3金屬層之形成方法及厚度，可設為與上述第2 金屬層之形成方法及厚度相同。本實施態樣中，較佳係於絕緣層之與金屬層側為相反側的面上形成上述第2金屬層’於第2絕緣層上形成第3金屬層’亦即於電子元件用積層基板之兩面上分別形成第2金屬層及第3金屬層，使第2金屬層及第3金屬層配置成被覆金屬層之開口部。藉由於電子元件用積層基板之兩面分別形成第2金屬層及第3金屬層，使第2金屬層及第3金屬層配置成被覆金屬層之開口部，則可有效防止水分或氧的穿透。在將本實施態樣之電子元件用積層基板用於作為密封基板時，特佳係形成第2金屬層及第3金屬層。 101111300 69 201248740 (ίο)電極及佈線本實施態樣中，亦可於上述絕緣層之與上述金屬層側為相反側的面上形成電極及/或佈線。作為構成電極及佈線的材料，係配合本實施態樣之電子_ 件用積層基板的用途而適當選擇，可使用上述第2金屬層凡材料。又，在例如將本實施態樣之電子元件用積層基板用= 有機EL元件時，在有機發光層上配置電極或佈線的情況等對電極或佈線要求透明性的情況下，可使用氧化銦锡 (ΙΤΟ)、氧化銦鋅(ΙΖΟ)、氧化錫、氧化鋅、氧化銦氧化鋁鋅(ΑΖΟ)等之導電性氧化物，或聚苯胺、聚乙烯二氧基噻吩等之導電性高分子材料。作為電極及佈線的形成位置，可使電極或佈線形成於絕緣層之與金屬層侧為相反侧的面上，亦可使電極或佈線形成於絕緣層正上方，在於絕緣層之與金屬層側為相反側之面上形成有後述之密黏層的情況，可使電極或佈線形成於密黏層正上方，在將本實施態樣之電子元件用積層基板用於TFT元件的情況，可於絕緣層與電極或佈線之間形成半導體層、閘極絕緣層等。其中，較佳係使電極或佈線形成於絕緣層正上方、或使電極或佈線形成於密黏層正上方。另外，作為電極及佈線的配置並無特別限定，係配合本實施態樣之電子元件用積層基板的用途而適當選擇。作為電極及佈線的形成方法，可設為與電子元件中之一般 101111300 70 201248740 之電極或佈線的形成方法相同。另外，作為電極及佈線的厚度，係配合電極或佈線之種類而適當選擇’可設為與電子元件中之—般之電㈣佈線的厚度相同。 (11)密黏層 . 本實施態樣中，係如圖15所例示般，在絕緣層2之與金屬層3側為相反侧之面上，可形成含有無機化合物的密黏層 9。密黏層係祕提高電子料㈣層基板及電子元件部之密黏力而設置的層。密黏層較佳係具有平滑性。密黏層之表面粗度Ra係較金屬層之表面粗度Ra越小越佳，具體而言，較佳為1〇細以下、更佳5mn以下。若密黏層之表面粗度Ra過大，則在將本實態樣之電子元件用積層基板用於TFT元件時，有TFT 元件之電氣性能劣化之虞。又，關於上述表面粗度之測定方法，係與上述絕緣層之表面粗度之測定方法相同。另外，密黏層較佳係具有耐熱性。此係由於在將本實施態樣之電子元件用積層基板用於TFT元件時，TFT元件之製作時通常會施行高溫處理所致。作為密黏層之耐熱性，較佳係密黏層之5%重量減少溫度為3〇〇它以上。尚且，關於5%重量減少溫度之測定，係使用熱分析裝置 (DTG-60(島津製作所(股)製)），依環境氣體：氮氣環境、溫度範圍：30°C〜60(TC、升溫速度：1(rc/min，進行熱重量· 101111300 71 201248740 示差熱(TG-DTA) ’將試料重量減少5%的溫度設為州重量減少溫度。由於有在密黏層上形成電極或佈線的情形，故密黏層通常具有絕緣性。When the second metal layer is formed on the surface of the insulating layer opposite to the metal layer side, the second metal layer may be formed directly on the insulating layer; When a dense layer to be described later is formed on the surface opposite to the metal layer side, the second metal layer can be directly formed on the dense layer; and the laminated substrate for electronic components of the present embodiment is used for the TFT 101111300 67 In the case of the 201248740 device, a semiconductor layer, a gate insulating film, or the like can be formed between the insulating layer and the second metal layer. Preferably, the second metal layer is formed directly on the insulating layer or the second metal layer is directly formed on the dense layer. In addition, as the arrangement of the second metal layer, the second metal layer is disposed so as to cover the opening portion of the metal layer, and the metal layer, the second metal layer, and the conductive portion are not disposed in the thickness direction of the multilayer substrate for electronic components. The region where the metal portion, the first conductive portion, and the second conductive portion are not present may be used, and may be appropriately selected in accordance with the use of the laminated substrate for electronic components of the present embodiment. The method of forming the second metal layer can be the same as the method of forming a general electrode or wiring in an electronic component. In addition, the thickness of the second metal layer is appropriately selected in accordance with the use of the laminated substrate for an electronic component of the present embodiment, and can be set to be the same as the thickness of a general electrode or wiring in an electronic component. (9) Third metal layer The laminated substrate for electronic components of the present embodiment is preferably formed on the second insulating layer 4 and arranged to cover the opening of the metal layer 3, as illustrated in the drawing. 13h, the third metal layer 17 that is electrically connected to the second conductive portion 1G. By arranging the third metal layer to cover the opening of the metal layer, the metal, the third metal layer, the metal portion for the conduction portion, the first conductive portion, and the second conductive portion are formed in the thickness direction of the laminated substrate for electronic components. Areas that do not exist disappear, preventing the penetration of moisture or oxygen. When the laminated substrate for an electronic component of the present embodiment is used as a sealing substrate sealed from above the element, the third metal layer is formed in a particularly good shape 101111300 68 201248740. Since the third metal layer can serve as an electrode or a wiring of the electronic component portion, the material constituting the third metal layer can be the same as the material of the second metal layer, and the third metal layer can be formed as a third metal layer. The metal layer may be formed on the second insulating layer. The third metal layer is usually formed directly above the red insulating layer. In addition, when the third metal layer is disposed so as to cover the opening of the metal layer, the metal layer, the third metal layer, and the conductive portion are not disposed in the thickness direction of the electronic component layer substrate. The region where the metal portion, the ι conductive portion, and the second conductive portion are not present may be used, and may be appropriately selected in accordance with the use of the laminated substrate for electronic components of the present embodiment. The method and thickness of forming the third metal layer can be the same as the method and thickness of forming the second metal layer. In this embodiment, it is preferable that the second metal layer 'the third metal layer is formed on the second insulating layer' on the surface opposite to the metal layer side of the insulating layer, that is, the laminated substrate for electronic components. The second metal layer and the third metal layer are formed on both surfaces, and the second metal layer and the third metal layer are disposed so as to cover the opening of the metal layer. When the second metal layer and the third metal layer are formed on both surfaces of the laminated substrate for electronic components, and the second metal layer and the third metal layer are disposed so as to cover the opening of the metal layer, moisture or oxygen can be effectively prevented from penetrating. . When the laminated substrate for an electronic component of the present embodiment is used as a sealing substrate, it is particularly preferable to form the second metal layer and the third metal layer. 101111300 69 201248740 (Electrode) and wiring In the embodiment, an electrode and/or a wiring may be formed on a surface of the insulating layer opposite to the side of the metal layer. The material constituting the electrode and the wiring is appropriately selected in accordance with the use of the laminated substrate for an electronic component according to the present embodiment, and the material of the second metal layer can be used. In the case of using an organic EL element for a laminated substrate for an electronic component of the present embodiment, for example, when an electrode or a wiring is disposed on the organic light-emitting layer, transparency is required for the electrode or the wiring, and indium tin oxide can be used. (ΙΤΟ), a conductive oxide such as indium zinc oxide (yttrium oxide), tin oxide, zinc oxide, indium oxide aluminum oxide zinc or the like, or a conductive polymer material such as polyaniline or polyethylene dioxythiophene. As the electrode and the wiring formation position, the electrode or the wiring may be formed on the surface of the insulating layer opposite to the metal layer side, or the electrode or the wiring may be formed directly above the insulating layer, on the side of the insulating layer and the metal layer. In the case where the adhesive layer to be described later is formed on the surface on the opposite side, the electrode or the wiring can be formed directly above the adhesion layer, and when the multilayer substrate for an electronic component of the present embodiment is used for the TFT element, A semiconductor layer, a gate insulating layer, or the like is formed between the insulating layer and the electrode or the wiring. Among them, it is preferable to form the electrode or the wiring directly above the insulating layer or to form the electrode or the wiring directly above the dense layer. In addition, the arrangement of the electrodes and the wiring is not particularly limited, and is appropriately selected in accordance with the use of the laminated substrate for electronic components of the present embodiment. The method of forming the electrode and the wiring can be the same as the method of forming the electrode or wiring of the general 101111300 70 201248740 in the electronic component. Further, the thickness of the electrode and the wiring is appropriately selected in accordance with the type of the electrode or the wiring, and can be set to be the same as the thickness of the electric (four) wiring in the electronic component. (11) Adhesive layer In the present embodiment, as shown in Fig. 15, an adhesive layer 9 containing an inorganic compound can be formed on the surface of the insulating layer 2 opposite to the side of the metal layer 3. The dense layer is a layer that is provided to improve the adhesion of the electronic material (four) layer substrate and the electronic component portion. The dense layer is preferably smooth. The surface roughness Ra of the dense layer is preferably smaller as the surface roughness Ra of the metal layer is smaller. Specifically, it is preferably 1 Å or less, more preferably 5 mn or less. When the surface roughness Ra of the dense layer is too large, when the laminated substrate for an electronic component of the present embodiment is used for a TFT element, the electrical properties of the TFT element are deteriorated. Further, the method for measuring the surface roughness is the same as the method for measuring the surface roughness of the insulating layer. Further, the dense layer is preferably heat resistant. In the case where the multilayer substrate for an electronic component of the present embodiment is used for a TFT element, the TFT element is usually subjected to high-temperature processing at the time of production. As the heat resistance of the dense layer, it is preferred that the 5% weight loss temperature of the dense layer is 3 Å or more. In addition, the measurement of the 5% weight loss temperature is performed by using a thermal analyzer (DTG-60 (manufactured by Shimadzu Corporation)), depending on the ambient gas: nitrogen atmosphere, temperature range: 30 ° C to 60 (TC, temperature increase rate) :1 (rc/min, heat weight · 101111300 71 201248740 Differential heat (TG-DTA) 'The temperature at which the weight of the sample is reduced by 5% is set as the state weight reduction temperature. Due to the formation of electrodes or wiring on the dense layer Therefore, the dense adhesive layer is usually insulative.

另外’在將本實施紐之電子元剌積層基㈣於TFT 凡件時，密黏層較佳係防止絕緣層所含之雜質離子等擴散至 TFT元件的半導體層。具體而言，作為密黏層之離子 ^較佳係鐵㈣離子濃度為㈠鹏以下，或鈉_離子濃度為5〇PPb以下。又，作為Fe離子、他離子之濃度測定方法’係採用將形成於密黏層上之層採樣抽出後，藉析法進行分析的方法。「增作為構成密黏層的無機化合物，若滿足上述特 ::定，可舉例如氧化石，^ 鋁、氧氮化鋁、氧化鉻、氧化鈦。此等可為密黏層可為單層或多層。 ^ 以上。在也黏層為多層膜時，可使上由…、枝化合物所構成之層 =數層積層’亦可使上叙由無機化合物所構叙層盘屬所構成之層積層。作為此時所使用的金屬，若可得到滿足上^性的密黏層則無特別㈣，可舉例如絡、鈦、紹、石夕。為氧切為多層膜的情況’較佳係密黏層之最表層 =τ::即广本實施態樣之電子元件用積層基板作τ 70件時，較佳係於氧切膜上製作m元件。 10Π11300 72 201248740 此係由於氧化石夕膜可充分滿足上述特性。此時之氧化石夕較佳為Si〇x(X為1·5〜2.0之範圍内）。其中，检黏層較佳係有：形成於絕緣層上，具含有選自由鉻、欽、，、石夕、氮化石夕、氧氮化石夕、氧化銘、氮化铭、氧 ,IU匕紹、氧化鉻及氧化鈦所組成群之至少一種的第層；與形成於第i密黏層上’含有氧化石夕的第2密黏層。: 係由於可藉由P密黏層提高絕緣層與第2密黏層間的密黏性’並可藉由第2密黏層提高絕緣層與電子科部間之密黏性。又’含有氧化石夕之第2密黏層可充分滿足上述特性。、密黏層之^度若為可滿足上述特性之厚度職特別限疋，具體而吕，較佳為lnm〜500nm的範圍内。其中在密黏層如上述般具有第i密黏層與第2密黏層時，較佳係第2 密黏層之厚度較第i密黏層厚，第！密黏層較薄，而第2 密黏層較厚。此時，第！密黏層的厚度較佳為〇jnm〜5〇nm 之範圍内、更佳〇.5魏〜2〇11111之範圍内、再更佳inm〜i〇nm 之範圍内。又’第2密黏層之厚度較佳為1〇nm〜麻m之範圍内、更佳50nm〜30〇nm之範圍内、再更佳8()nm〜12()nm 之範圍内。若厚度過薄，則有無法得到充分密黏性之虞，若厚度過厚，則有於密黏層發生裂痕之虞。為了於密黏層上形成電極或佈線’並使電極或佈線連接至導通部，如圖15所例示般，密黏層9通常形成為圖案狀，具有配置於第1導通部6上的開口部19h。 101111300 73 201248740 作為密黏層之開口部的配置，若使導通部配置於密黏層之開口部内則無特別限定。例如，可於每個導通部配置密黏層之開口部，亦可依使複數導通部配置於密黏層之開口部内的方式配置密黏層之開口部。作為密黏層之開口部的形狀，若為可將導通部配置於密黏層之開口部内的形狀則無特別限定。密黏層之開口部的尺寸若可將導通部配置於密黏層之開口部内則無特別限定。密黏層之開口部的數量係配合本實施態樣之電子元件用積層基板的用途而適當選擇。在將絕緣層相對於金屬層形成為圖案狀時，較佳係密黏層與絕緣層亦同樣地相對於金屬層形成為圖案狀。若於金屬層上直接形成密黏層，則有於密黏層發生裂痕的情形。作為密黏層之形成方法，若為可形成上述由無機化合物所形成之層或上述由金屬所形成之層的方法，則無特別限定，可舉例如DC(直流）錢鍍法、RF(高頻）磁控濺鑛法、電漿 CVD(化學氣相蒸鍍)法等。其中，在形成上述由無機化合物所構成之層時，於形成含有鋁或矽之層的情況，較佳係使用反應性濺鍍法。因為可得到與絕緣層間之密黏性優越的膜。作為密黏層之圖案化方法，可採用藉由光刻法、雷射等進行直接加工的方法；藉由金屬遮罩進行鑛錢或蒸鑛，藉此位置選擇性地形成密黏層的方法。 101111300 74 201248740 另外’本實施態樣中，上述密黏層亦可形成於絕緣層與金屬層之間。此係由於可提高絕緣層與金屬層之密黏性。例如後述「E.電子元件用積層基板之製造方法」項目所記載般，在積層絕緣層及金屬層時於絕緣層上形成金屬層的情況下’為了提高絕緣層與金屬層之密黏性，可於絕緣層上形成密黏層、於密黏層上形成金屬層。 (12) 被覆層本實施態樣中，金屬層之圖案端部可被被覆層所絕緣，又，亦可使金屬層之開口部内之導通部用金屬部以外的部分被被覆層所填充。作為被覆層’若為可將金屬層之圖案端部被覆絕緣，進而填充於金屬層之開口部内之導通部用金屬部以外的部分者’則無特別限定’可為上述絕緣層或第2絕緣層，亦可為與絕緣層及第2絕緣層相異的絕緣層。被覆層之種類係配合本實施態樣之電子元件用積層基板的製造方法而適當選擇。其中，被覆層較佳為絕緣層或第2絕緣層。 (13) 其他構成本實施祕中，可於金屬層與絕緣層及第2絕緣層之間形成中間層。例如’可於金屬層與絕緣層及第2絕緣層之間，形成由使構成金屬層之金屬經氧化的氧化膜所構成9的中0間層。藉此，/可提高金屬層與絕緣層及第2絕緣層的密黏性。該氧化膜係藉由使金>1層表面氧化而形成。 101111300 75 201248740 (14) 用途本實施態樣之電子元件用積層基板係用於需要防止水分或氧之侵入的電子元件。具體可舉例如有機EL元件、電子紙、TFT元件、有機薄膜太陽電池、固體攝像元件等。本實施態樣之電子元件用積層基板可使用作為支撐元件的支撐基板，亦可使用作為由元件上方進行密封的密封基板。其中，本實施態樣之電子元件用積層基板適合使用作為支撐有機EL元件、電子紙、TFT元件的支撐基板。又，本實施態樣之電子元件用積層基板亦適合使用作為例如室内照明用途之整面發光之有機EL元件等、對不具有TFT元件之有機 EL元件由上部進行密封的密封基板。尚且，關於有機EL元件、電子紙、TFT元件，由於記載於後述「B.電子元件」、「C.有機EL顯示裝置」及「D.電子紙」項目中，故於此省略其說明。 (15) 電子元件用積層基板之製造方法作為本實施態樣之電子元件用積層基板之製造方法，並無特別限定，可藉由各種製造方法進行製作。尚且，關於電子元件用積層基板之製造方法，由於記載於後述「E.電子元件用積層基板之製造方法」項目中，故於此省略其說明。 2.第2實施態樣本實施態樣之電子元件用積層基板的特徵在於具有：具有 101111300 76 201248740 絕緣層貫通孔之絕緣層；填充於上述絕緣層貫通孔之第i 導通部;於上述絕緣層上形成為圖案狀’於上述第1導通部 1具有開σ部的金屬層；_成於上述電子元件用積層基板之厚度方向上’導it上逃電子元件用積層基板之表背，至少具有上述第1導通部的導通部。針對本實施癌樣之電子元件用積層基板，參照圖式進行說明。圖2(a)〜(C)為表示本實施態樣之電子元件用積層基板之一例的概略剖面圖及平面圖，圖2⑻為圖咖、圖2⑷之線剖面圖’圖2(b)、（C)為電子元件用積層基板1之由金屬層3側之面所觀看的平面圖。圖2⑷〜⑷所例示之電子元件用積層基板1，係具有：具有絕緣層貫通孔12h之絕緣層2 ;填充於絕緣層貫通孔12h 之第1導通部6;與於絕緣層2上形成為圖案狀，於第1導通部6上具有開口部的金屬層3。而且，藉由填充於絕緣層貝通孔12h之第1導通部6構成導通部7。圖2(b)中，將金屬層3之開口部13h設於每個第1導通部6(絕緣層貫通孔 12h)。另一方面，圖2(c)中，將金屬層3之開口部I3h依使複數之第1導通部6(絕緣層貫通孔I2h)配置於一個金屬層3 之開口部13h内的方式而設置。由於該電子元件用積層基板1中，第1導通部6係配置於金屬層3之開口部13h上’故金屬層3與導通部7並未導通。 101111300 77 201248740 因此可經由導通部7由表面將佈線取出至背面。圖（）（b)為表示本實施態樣之電子元件用積層基板之其他例的概略剖面圖及平面圖，圖16⑷為圖⑻之線剖面圖，圖16(b)為電子元件用積層基板丨之由第2絕緣層 4側之面所觀看的平面圖。圖16(a)、（b)所例示之電子元件用積層基板1，係使圖 2(a)、（b)所示之電子元件用積層基板1進一步具有：形成於金屬層3上’具有配置於第1導通部6上的第2絕緣層貫通孔14h的第2絕緣層4 ;與填充於第2絕緣層貫通孔14h的第2導通部1G。導通部7係由下述者所構成：填充於絕緣層貫通孔12h之第1導通部6 ;與填充於第2絕緣層貫通孔 14h之第2導通部1〇。又，金屬層3之圖案端部13s係由被覆層（圖16(a)中為第2絕緣層4)所絶緣，金屬層3之開口部 13h内之導通部7以外的部分係由被覆層（圖16(a)中為第2 絕緣層4)所填充。由於該電子元件用積層基板1中，苐1導通部6係配置於金屬層3之開口部上，第2導通部配置於第丨導通部ό上，金屬層3之開口部Uh内之導通部7以外的部分由被覆層（圖16(a)中為第2絕緣層4)所填充，故金屬層3與導通部7並未導通。因此，可經由導通部7由表面將佈線取出至背面。圖17為表示具備本實施態樣之電子元件用積層基板之有 78 101111300 201248740 機EL·元件之一例的概略剖面圖。圖17所例示之有機EL元件21係具備圖16(a)、（b)所例示之電子元件用積層基板1 者。有機EL·元件21係具有：電子元件用積層基板1 ;形成於電子元件用積層基板1之絕緣層2上的有機EL元件部 20 ;配置於有機EL元件部20上的透明密封基板25 ;與使電子元件用積層基板1及透明密封基板25接黏而將元件密 * 封的密封部26。有機EL元件部20係具有：背面電極層22; 形成於背面電極層22上，含有有機發光層之EL層23 ;與形成於EL層23上的透明電極層24。電子元件用積層基板 1之2個之導通部7a、7b中，一方之背面電極層用導通部 7a係連接於背面電極層22，另一方之透明電極層用導通部 7b係連接於透明電極層24。該有機EL元件21為由透明密封基板25側取出發光L的頂部發光型。圖18為表示具備本實施態樣之電子元件用積層基板之有機EL元件之其他例的概略剖面圖。圖18所例示之有機EL 元件21中，電子元件用積層基板i係使圖16(a)、（b)所例示之電子元件用積層基板1進一步具有：形成於絕緣層2 之與金屬層3侧為相反侧的面上，配置成被覆金屬層3之開 * 口部；與第1導通部6導通之第2金屬層16;與形成於第2 * 絕緣層4上，配置成被覆金屬層13之開口部’與第2導通部10導通的第3金屬層17。又，於電子元件用積層基板1 中，第2絕緣層4係相對於金屬層3形成為圖案狀，於金屬 101111300 79 201248740 層3之面不存在第2絕緣層4,設有金屬層3所露出之金屬層露出區域11a。有機EL元件21係具有：透明基板27 ; 形成於透明基板27上之有機EL元件部20;配置於有機EL 元件部20上之電子元件用積層基板1 ;與使形成有有機EL 元件部20之透明基板27及電子元件用積層基板1接黏而將元件密封的密封部26。有機EL元件部20係具有：透明電極層24 ;形成於透明電極層24上，含有有機發光層之EL 層23 ;與形成於EL層23上之背面電極層22。電子元件用積層基板1之2個之導通部7a、7b中，一方之透明電極層用導通部7b係連接於透明電極層24,另一方面之背面電極層用導通部7a係連接於背面電極層22。該有機EL元件21 係由透明基板27側取出發光L的底部發光型。根據本實施態樣，可與上述第1實施態樣同樣地同時實現阻絕性及窄邊框化。另外，根據本實施態樣，可與上述第1實施態樣同樣地賦予放熱性。尤其是在如圖18所例示般設有金屬層露出區域 11a時，可提高電子元件用積層基板的放熱性。再者，在如圖18所示例般依被覆金屬層3之開口部之方式配置第2金屬層16及第3金屬層17時，可使於電子元件用積層基板之厚度方向上均不存在金屬層、導通部、第2 金屬層及第3金屬層的區域消失，而可有效阻礙水分或氧的穿透。在將本實施態樣之電子元件用積層基板使用作為將元 101111300 80 201248740 板時，特佳係依被覆金屬層之開式配置第2金屬層及第3金屬層。另外，本實施態射，由於藉由鍍覆法衬形成僅有第1 導通部或由第1導通部及第2導通部所構成的導通部，故可電阻。進而，可以金屬層作為給電層而藉電鑛 4 ^導通部或第2導通部，故具有_適合性高的優點。又’在使用銀膏等之導電膏形成第1導通部或第2導通部時，可削減製程的步驟數。、尚且’絕緣層、金屬層、第1導通部、第2絕緣層、第2 導通°Ρ、第2金屬層、第3金屬層、電極及佈線、密黏層、被覆層、其他構成、用料，由於與上述第i實施態樣相二，故於此省略其說明。以下針對本實施態樣之電子元件用積層基板之其他構成進行說明。 (1)導通部本實施紐巾之導料，係職於電子元制積層基板之厚度方向，使電子元制㈣基板之表背面導通，未與上述金屬層導通者’至少具有第丨導通部。又’導通部亦可進一步具有第2導通部。尚且’關於導通部之其他點，由於與上述帛1實施態樣相同，故於此省略其說明。 (2)電子元件用積層基板之製造方法本實施態樣之電子元件用積層基板之製造方法並無特別 101111300 81 201248740 限定，可藉由各種製造方法進行製造。圖19為表示本實施態樣之電子元件用積層基板之製造方法之-例的步驟圖。首先，準備依序積層了金屬層3與絕緣層2與金屬膜55的三層材（圖19(a)積層體準備步驟)。接著，於金屬層3上層合乾式薄膜光阻，藉光刻法對金屬層3進行圖案化，形成開口部13h(圖19(b)金屬層圖案化步驟）。接著於金屬層3上使用感光性聚醯亞胺或感光性聚酿亞胺前驅物形成第2絕緣層4(圖19⑷第2絕緣層形成步驟）。接著，藉由光刻法對第2絕緣層4進行圖案化，形成第2絕緣層貫通孔14h(圖19(d)第2絕緣層貫通孔形成步驟）。接著，以第2絕緣層4之圖案作為遮罩，藉濕式侧對絕緣層2 進行圖案化形成絕緣層貫通孔12h(圖19(e)絕緣層貫通孔形成步驟）。此時，使用聚醯亞胺前驅物形成第2絕緣層4，於第2絕緣層4上層合乾式薄膜光阻，藉光刻法對第2絕緣層4進行圖案化，形成第2絕緣層貫通孔Hh後，以第2 絕緣層4之ϋ案作為遮罩，藉濕式#刻對絕緣層2進行圖案化亦可形成絕緣層貫通孔12h。此等情況下’係使用第2 絕緣層4不進行濕式触刻、絕緣層2可進行濕式侧者。又，述中亦可藉雷射加工同時對第2絕緣層4及絕緣層2 進灯圖案化’形成第2絕緣層貫通孔14h及絕緣層貫通孔接著以金屬膜55作為給電層而進行鍍覆，於絕緣層貝通孔及第2絕緣層貫通孔14h填充第1導通部6及第 101111300 82 201248740 2導通部10，形成導通部7(圖19(〇第丄導通部形成步驟及第2導通部形成步驟卜此時，可使用導電膏於絕緣層貫通孔12h及第2絕緣層貫通孔l4h中填充第1導通部6及第2 導通部10。接著，對金屬膜55進行圖案化而形成第2金屬層16(圖19(g))。如此，可得到電子元件用積層基板。 • 圖2〇為表示本實施態樣之電子元件用積層基板之製造方法之其他例的步驟圖。首先，準備依序積層了金屬層3與絕緣層4與金屬膜55的三層材（圖2〇(&)積層體準備步驟）。接著，於金屬層3上層合乾式薄膜光阻，藉光刻法對金屬層3 進行圖案化，形成開口部13h(圖20(b)金屬層圖案化步驟）。接著，於絕緣層2上層合乾式薄膜光阻，藉光刻法對絕緣層 2進行圖案化，形成絕緣層貫通孔12h(圖20(c)絕緣層貫通孔形成步驟）。此時，亦可使用感光性聚醯亞胺或感光性聚醯亞胺前驅物形成絕緣層2,藉由光刻法對絕緣層2進行圖案化，形成絕緣層貫通孔12h。又，此時亦可藉由雷射加工對絕緣層2進行圖案化’形成絕緣層貫通孔121^接著，以金屬膜55作為給電層而進行鍍覆，於絕緣層貫通孔填充第1導通部6，形成導通部7(圖20(d)第1導通部形成步驟）。此時，可使用導電膏於絕緣層貫通孔12h中填充第i . 導通部6。接著，對金屬膜55進行圖案化而形成第2金屬層16(圖20(e))。如此，可得到電子元件用積層基板。 B.電子元件 101111300 83 201248740 接著說明本發明之電子元件。其ίΓΓ電子元件藉由上職子元件㈣層基板為支撐密封基板而分為2鶴樣1下，分別㈣各態樣。 1.電子元件之第1態樣本態樣之電子元件的特徵在於具有：上述電子細用積層成於上述電子元件用積層基板之絕緣層上的電子元件置於上述電子元件部上的透明密封基板。為本U之電子元件部，若為需要防止水分或氧 =，，可舉例如TFT元件部、有機E“件:電等:二二有機薄膜太陽電池元件部、固體攝像元件部 :子::-:Γ元件部較佳為TFT元件部、有機扯元件1 電子斌辑部。以下，分為好元 4 豇元件部、電子紙元件部的情況進行說明/件心有機 (1)電子元件部為TFT元件料情形β 件==子元件部為TFT元件部時，本態樣之電子元〜、有上4電子元件用積層基板、形成於上述電積層基板之絕緣層上的電子元件部、與配置於上 =Further, when the electron-emitting layer (4) of the present embodiment is applied to a TFT, the dense layer is preferably prevented from diffusing impurity ions or the like contained in the insulating layer to the semiconductor layer of the TFT element. Specifically, as the ion of the dense layer, it is preferable that the iron (tetra) ion concentration is (1) or less, or the sodium ion concentration is 5 〇 PPb or less. Further, the method for measuring the concentration of Fe ions and other ions is a method in which a layer formed on the dense layer is sampled and extracted, and analyzed by a desorption method. "Increased as an inorganic compound constituting the dense layer, if it satisfies the above-mentioned characteristics: for example, oxidized stone, aluminum, aluminum oxynitride, chromium oxide, or titanium oxide. These may be a single layer of a dense layer. Or more than one layer. ^ Above. When the adhesive layer is a multilayer film, the layer composed of ... and the branch compound = several layers can also be used to make the layer composed of the inorganic compound. As a metal to be used at this time, there is no particular (4) if a dense layer which satisfies the above properties is obtained, and examples thereof include a complex, a titanium, a sho, and a shovel. The outermost layer of the dense adhesive layer = τ:: When the laminated substrate for electronic components of the present embodiment is used as the τ 70 element, it is preferable to form the m element on the oxygen cut film. 10Π11300 72 201248740 This is due to the oxidized stone film The above characteristics can be satisfactorily satisfied. The oxidized oxide eve is preferably Si〇x (X is in the range of 1.5 to 2.0). Among them, the adhesion layer is preferably formed on the insulating layer and has a selection Free chrome, Chin,,, Shi Xi, nitrite, oxynitride, oxidized, nitriding, oxygen, I a first layer of at least one of the group consisting of uranium, chromia, and titanium oxide; and a second dense layer of oxidized stone formed on the ith layer of the viscous layer: due to the P-adhesive layer Improve the adhesion between the insulating layer and the second adhesive layer' and improve the adhesion between the insulating layer and the electronic component by the second dense layer. The second dense layer containing the oxidized stone can be sufficient. The thickness of the dense adhesive layer is particularly limited to the thickness of the adhesive layer, and is preferably in the range of 1 nm to 500 nm, wherein the dense adhesive layer has the ith density as described above. When the adhesive layer and the second adhesive layer are used, it is preferable that the thickness of the second dense layer is thicker than that of the first dense layer, the second dense layer is thinner, and the second dense layer is thicker. The thickness of the dense adhesive layer is preferably in the range of 〇jnm~5〇nm, more preferably in the range of 魏5. 5 Wei~2〇11111, and even better in the range of inm~i〇nm. The thickness of the layer is preferably in the range of 1 〇 nm to hemp m, more preferably in the range of 50 nm to 30 〇 nm, and even more preferably in the range of 8 () nm to 12 () nm. If the thickness is too thin, there is Unable to get full density If the thickness is too thick, there is a crack in the dense adhesive layer. In order to form an electrode or wiring on the dense layer and connect the electrode or wiring to the conductive portion, as illustrated in Fig. 15, the dense The adhesive layer 9 is usually formed in a pattern and has an opening 19h disposed in the first conductive portion 6. 101111300 73 201248740 As the arrangement of the opening of the adhesive layer, if the conductive portion is disposed in the opening of the adhesive layer, For example, the opening of the adhesive layer may be disposed in each of the conductive portions, and the opening of the adhesive layer may be disposed such that the plurality of conductive portions are disposed in the opening of the adhesive layer. The shape of the portion is not particularly limited as long as the conductive portion can be disposed in the opening of the adhesive layer. The size of the opening of the dense layer is not particularly limited as long as the conductive portion can be disposed in the opening of the adhesive layer. The number of the openings of the dense layer is appropriately selected in accordance with the use of the laminated substrate for electronic components of the present embodiment. When the insulating layer is formed into a pattern with respect to the metal layer, it is preferable that the dense layer and the insulating layer are formed in a pattern shape with respect to the metal layer. If a dense layer is formed directly on the metal layer, cracks may occur in the dense layer. The method for forming the dense layer is not particularly limited as long as it can form the layer formed of the inorganic compound or the layer formed of the metal, and examples thereof include DC (direct current) carbon plating and RF (high). Frequency) magnetron sputtering method, plasma CVD (chemical vapor deposition) method, and the like. Among them, in the case of forming the layer composed of the inorganic compound described above, in the case of forming a layer containing aluminum or ruthenium, a reactive sputtering method is preferably used. This is because a film excellent in adhesion to the insulating layer can be obtained. As a method of patterning the dense adhesion layer, a method of directly processing by photolithography, laser, or the like; a method of selectively forming an adhesive layer by using a metal mask for mineral money or steaming . 101111300 74 201248740 In another embodiment, the dense layer may be formed between the insulating layer and the metal layer. This is because the adhesion between the insulating layer and the metal layer can be improved. For example, when the metal layer is formed on the insulating layer when the insulating layer and the metal layer are laminated, as described in the item "Manufacturing method of the laminated substrate for electronic components" described later, in order to improve the adhesion between the insulating layer and the metal layer, An adhesive layer can be formed on the insulating layer and a metal layer can be formed on the dense layer. (12) Coating layer In the present embodiment, the pattern end portion of the metal layer may be insulated by the coating layer, or the portion other than the metal portion of the conduction portion in the opening portion of the metal layer may be filled with the coating layer. The coating layer is not particularly limited as long as it is a portion other than the metal portion for the conduction portion that is filled with the end portion of the metal layer and is filled in the opening portion of the metal layer. The insulating layer or the second insulation may be used. The layer may be an insulating layer different from the insulating layer and the second insulating layer. The type of the coating layer is appropriately selected in accordance with the method for producing a laminated substrate for an electronic component according to the embodiment. Among them, the coating layer is preferably an insulating layer or a second insulating layer. (13) Other constitution In the present embodiment, an intermediate layer can be formed between the metal layer and the insulating layer and the second insulating layer. For example, a medium-to-interlayer 9 composed of an oxide film oxidized by a metal constituting the metal layer may be formed between the metal layer and the insulating layer and the second insulating layer. Thereby, the adhesion of the metal layer to the insulating layer and the second insulating layer can be improved. This oxide film is formed by oxidizing the surface of the gold layer 1. 101111300 75 201248740 (14) Use The laminated substrate for electronic components of the present embodiment is used for an electronic component that needs to prevent intrusion of moisture or oxygen. Specific examples thereof include an organic EL device, an electronic paper, a TFT element, an organic thin film solar cell, and a solid-state imaging device. The laminated substrate for electronic components of this embodiment can be used as a supporting substrate as a supporting member, or can be used as a sealing substrate which is sealed from above the element. Among them, the laminated substrate for electronic components of the present embodiment is suitably used as a supporting substrate for supporting an organic EL element, an electronic paper, or a TFT element. Further, the laminated substrate for an electronic component of the present embodiment is preferably a sealing substrate which is sealed with an upper portion of an organic EL element which does not have a TFT element, such as an organic EL element which is used for the entire surface illumination for indoor illumination. In addition, the organic EL element, the electronic paper, and the TFT element are described in the "B. Electronic component", "C. organic EL display device", and "D. electronic paper" items which will be described later, and thus the description thereof will be omitted. (15) Method for producing a laminated substrate for an electronic component The method for producing a laminated substrate for an electronic component according to the present embodiment is not particularly limited, and can be produced by various production methods. In addition, the manufacturing method of the laminated substrate for electronic components is described in the item "E. Manufacturing method of laminated substrate for electronic components" which will be described later, and thus the description thereof will be omitted. 2. The laminated substrate for an electronic component according to the second embodiment of the present invention is characterized by comprising: an insulating layer having a through hole of an insulating layer of 101111300 76 201248740; an i-th conductive portion filled in the through hole of the insulating layer; and the insulating layer a metal layer having a σ-opening portion in the first conductive portion 1 is formed in a pattern shape, and is formed on the surface of the multilayer substrate for the electronic component in the thickness direction of the electronic component laminated substrate. a conduction portion of the first conductive portion. The laminated substrate for electronic components of the present invention will be described with reference to the drawings. 2(a) to 2(C) are a schematic cross-sectional view and a plan view showing an example of a laminated substrate for an electronic component according to the embodiment, and Fig. 2(8) is a cross-sectional view of Fig. 2(4), Fig. 2(b), ( C) is a plan view of the laminated substrate 1 for electronic components viewed from the side on the metal layer 3 side. The laminated substrate 1 for an electronic component illustrated in FIGS. 2(4) to 4(4) has an insulating layer 2 having an insulating layer through hole 12h, a first conductive portion 6 filled in the insulating layer through hole 12h, and formed on the insulating layer 2 The metal layer 3 having an opening in the first conductive portion 6 is formed in a pattern. Further, the first conductive portion 6 filled in the insulating layer beacon hole 12h constitutes the conductive portion 7. In Fig. 2(b), the opening 13h of the metal layer 3 is provided in each of the first conductive portions 6 (insulating layer through holes 12h). On the other hand, in FIG. 2(c), the opening portion I3h of the metal layer 3 is provided so that the plurality of first conductive portions 6 (insulating layer through holes I2h) are disposed in the opening portion 13h of the one metal layer 3. . In the laminated substrate 1 for electronic components, the first conductive portion 6 is disposed on the opening 13h of the metal layer 3, so that the metal layer 3 and the conductive portion 7 are not electrically connected. 101111300 77 201248740 Therefore, the wiring can be taken out to the back surface by the surface via the conduction portion 7. (b) is a schematic cross-sectional view and a plan view showing another example of the laminated substrate for electronic components of the present embodiment, and Fig. 16 (4) is a cross-sectional view taken along line (8), and Fig. 16 (b) is a laminated substrate for electronic components. A plan view seen from the side of the second insulating layer 4 side. The laminated substrate 1 for electronic components illustrated in FIGS. 16(a) and (b) further includes the laminated substrate 1 for electronic components shown in FIGS. 2(a) and 2(b): formed on the metal layer 3' The second insulating layer 4 of the second insulating layer through-hole 14h disposed in the first conductive portion 6 and the second conductive portion 1G filled in the second insulating layer through-hole 14h. The conductive portion 7 is composed of a first conductive portion 6 that is filled in the insulating layer through hole 12h and a second conductive portion that is filled in the second insulating layer through hole 14h. Further, the pattern end portion 13s of the metal layer 3 is insulated by the coating layer (the second insulating layer 4 in Fig. 16(a)), and the portion other than the conduction portion 7 in the opening portion 13h of the metal layer 3 is covered by the coating layer. (The second insulating layer 4 in Fig. 16(a) is filled. In the laminated substrate 1 for electronic components, the turns 1 is disposed on the opening of the metal layer 3, the second conductive portion is disposed on the second conductive portion, and the conductive portion in the opening Uh of the metal layer 3 is provided. The portion other than 7 is filled with the coating layer (the second insulating layer 4 in Fig. 16(a)), so that the metal layer 3 and the conduction portion 7 are not electrically connected. Therefore, the wiring can be taken out to the back surface by the surface via the conduction portion 7. Fig. 17 is a schematic cross-sectional view showing an example of an EL-element having 78 101111300 201248740, which is provided with a laminated substrate for an electronic component of the present embodiment. The organic EL element 21 illustrated in Fig. 17 is provided with the laminated substrate 1 for electronic components illustrated in Figs. 16(a) and 16(b). The organic EL element 21 includes an organic EL element portion 20 formed on the insulating layer 2 of the electronic device multilayer substrate 1 and a transparent sealing substrate 25 disposed on the organic EL element portion 20; The sealing portion 26 in which the electronic component laminate substrate 1 and the transparent sealing substrate 25 are bonded to each other to seal the device. The organic EL element portion 20 has a back electrode layer 22, an EL layer 23 formed on the back electrode layer 22, an organic light-emitting layer, and a transparent electrode layer 24 formed on the EL layer 23. Among the two conductive portions 7a and 7b of the laminated substrate 1 for electronic components, one of the back electrode layer conductive portions 7a is connected to the back electrode layer 22, and the other transparent electrode layer conductive portion 7b is connected to the transparent electrode layer. twenty four. This organic EL element 21 is a top emission type in which the light emission L is taken out from the side of the transparent sealing substrate 25. Fig. 18 is a schematic cross-sectional view showing another example of the organic EL element including the build-up substrate for an electronic component of the embodiment. In the organic EL element 21 illustrated in FIG. 18, the laminated substrate i for an electronic component has the laminated substrate 1 for electronic components illustrated in FIGS. 16(a) and 16(b) further including a metal layer 3 formed on the insulating layer 2. The surface on the opposite side is disposed so as to cover the opening of the metal layer 3; the second metal layer 16 that is electrically connected to the first conductive portion 6, and the second metal layer 16 that is formed on the second insulating layer 4, and is disposed to cover the metal layer. The third metal layer 17 that is electrically connected to the second conductive portion 10 in the opening portion of the third portion. Further, in the multilayer substrate 1 for electronic components, the second insulating layer 4 is formed in a pattern shape with respect to the metal layer 3, and the second insulating layer 4 is not present on the surface of the layer 3 of the metal 101111300 79 201248740, and the metal layer 3 is provided. The exposed metal layer exposes the area 11a. The organic EL element 21 includes a transparent substrate 27, an organic EL element portion 20 formed on the transparent substrate 27, a laminated substrate 1 for electronic components disposed on the organic EL element portion 20, and an organic EL element portion 20 formed thereon. The transparent substrate 27 and the laminated board 1 for electronic components are bonded to each other to seal the sealing portion 26 of the element. The organic EL element portion 20 has a transparent electrode layer 24, an EL layer 23 formed on the transparent electrode layer 24, an organic light-emitting layer, and a back electrode layer 22 formed on the EL layer 23. Among the two conductive portions 7a and 7b of the laminated substrate 1 for electronic components, one of the transparent electrode layer conductive portions 7b is connected to the transparent electrode layer 24, and the back electrode layer conductive portion 7a is connected to the back electrode. Layer 22. This organic EL element 21 is a bottom emission type in which the light emission L is taken out from the transparent substrate 27 side. According to this embodiment, the barrier property and the narrow frame can be simultaneously achieved in the same manner as in the first embodiment described above. Further, according to this embodiment, the heat dissipation property can be imparted in the same manner as in the first embodiment described above. In particular, when the metal layer exposed region 11a is provided as illustrated in Fig. 18, the heat dissipation property of the laminated substrate for electronic components can be improved. Further, when the second metal layer 16 and the third metal layer 17 are disposed so as to cover the opening of the metal layer 3 as shown in FIG. 18, the metal layer 16 can be prevented from being present in the thickness direction of the multilayer substrate for electronic components. The regions of the layer, the conductive portion, the second metal layer, and the third metal layer disappear, and the penetration of moisture or oxygen can be effectively prevented. When the laminated substrate for an electronic component of the present embodiment is used as a plate of 101111300 80 201248740, the second metal layer and the third metal layer are disposed in an open manner in accordance with the coating of the metal layer. Further, in the present embodiment, since only the first conductive portion or the conductive portion including the first conductive portion and the second conductive portion is formed by the plating method, resistance can be obtained. Further, since the metal layer can be used as the power supply layer by the electric conduction or the second conductive portion, it has the advantage of being highly suitable. Further, when the first conductive portion or the second conductive portion is formed by using a conductive paste such as silver paste, the number of steps of the process can be reduced. Further, the insulating layer, the metal layer, the first conductive portion, the second insulating layer, the second conductive layer, the second metal layer, the third metal layer, the electrode and the wiring, the adhesive layer, the coating layer, and other components are used. The material is the same as the above-described first embodiment, and thus the description thereof is omitted. The other configuration of the laminated substrate for electronic components of the present embodiment will be described below. (1) Conducting section The guiding material of the present invention is to be in the thickness direction of the electronic component laminated substrate, so that the back surface of the electronic component (4) substrate is turned on, and the conductive layer not connected to the above metal layer has at least the first conductive portion. . Further, the conductive portion may further have a second conductive portion. Further, since the other points of the conduction portion are the same as those of the above-described 帛1, the description thereof is omitted here. (2) Method for producing laminated substrate for electronic component The method for producing a laminated substrate for electronic component of the present embodiment is not limited to 101111300 81 201248740, and can be manufactured by various manufacturing methods. Fig. 19 is a flow chart showing an example of a method of manufacturing a laminated substrate for an electronic component according to the embodiment. First, a three-layer material in which the metal layer 3 and the insulating layer 2 and the metal film 55 are laminated in this order is prepared (Fig. 19 (a) laminated body preparation step). Next, a dry film resist is laminated on the metal layer 3, and the metal layer 3 is patterned by photolithography to form an opening 13h (Fig. 19(b) metal layer patterning step). The second insulating layer 4 is formed on the metal layer 3 by using a photosensitive polyimide or a photosensitive polyimide intermediate precursor (Fig. 19 (4) second insulating layer forming step). Then, the second insulating layer 4 is patterned by photolithography to form a second insulating layer through hole 14h (Fig. 19 (d) second insulating layer through hole forming step). Then, using the pattern of the second insulating layer 4 as a mask, the insulating layer 2 is patterned by the wet side to form an insulating layer through hole 12h (Fig. 19(e) insulating layer through hole forming step). At this time, the second insulating layer 4 is formed using a polyimide precursor, the dry film resist is laminated on the second insulating layer 4, and the second insulating layer 4 is patterned by photolithography to form a second insulating layer. After the hole Hh, the insulating layer 2 is patterned by the pattern of the second insulating layer 4, and the insulating layer through hole 12h can be formed by patterning the insulating layer 2. In these cases, the second insulating layer 4 is not wet-etched, and the insulating layer 2 can be wet-side. Further, in the above description, the second insulating layer 4 and the insulating layer 2 may be patterned by laser processing to form the second insulating layer through hole 14h and the insulating layer through hole, and then the metal film 55 is used as the power supply layer for plating. The first conductive portion 6 and the 101111300 82 201248740 2 conductive portion 10 are filled in the insulating layer beacon hole and the second insulating layer through hole 14h to form the conductive portion 7 (FIG. 19 (the first conductive portion forming step and the second portion) In the case of the conductive portion forming step, the first conductive portion 6 and the second conductive portion 10 can be filled in the insulating layer through hole 12h and the second insulating layer through hole 14h using a conductive paste. Next, the metal film 55 is patterned. The second metal layer 16 is formed (Fig. 19(g)). Thus, a laminated substrate for an electronic component can be obtained. Fig. 2A is a flow chart showing another example of the method of manufacturing the laminated substrate for an electronic component according to the embodiment. First, a three-layer material in which the metal layer 3 and the insulating layer 4 and the metal film 55 are laminated in this order (Fig. 2 & laminated body preparation step) is prepared. Next, a dry film photoresist is laminated on the metal layer 3, The metal layer 3 is patterned by photolithography to form an opening 13h (Fig. 20(b) a metal layer patterning step). Next, a dry film photoresist is laminated on the insulating layer 2, and the insulating layer 2 is patterned by photolithography to form an insulating layer through hole 12h (Fig. 20 (c) insulating layer through hole is formed Step) In this case, the insulating layer 2 may be formed using a photosensitive polyimide or a photosensitive polyimide precursor, and the insulating layer 2 may be patterned by photolithography to form an insulating layer through hole 12h. In this case, the insulating layer 2 may be patterned by laser processing to form the insulating layer through-holes 121, and then the metal film 55 is used as the power-feeding layer, and the first conductive portion 6 is filled in the insulating layer through-holes. The conductive portion 7 is formed (Fig. 20 (d) first conductive portion forming step). At this time, the conductive layer can be filled in the insulating layer through hole 12h with the i-th conductive portion 6. Next, the metal film 55 is patterned. The second metal layer 16 is formed (Fig. 20(e)). Thus, a laminated substrate for an electronic component can be obtained. B. Electronic component 101111300 83 201248740 Next, an electronic component of the present invention will be described. (4) The layer substrate is divided into 2 cranes for supporting the sealing substrate In the first aspect, the electronic component of the first aspect of the electronic component is characterized in that the electronic component is laminated on the insulating layer of the laminated substrate for the electronic component. The transparent sealing substrate on the electronic component portion. In the electronic component portion of the U, if it is necessary to prevent moisture or oxygen =, for example, a TFT element portion, an organic E element: electricity, etc.: a two-two organic thin film solar cell element The solid-state imaging device unit: the sub-::-: the Γ-element component is preferably a TFT component, and the organic component is an electronic component. The following is a description of the case of the component 4 and the electronic component. In the case of the TFT element material, the electronic component unit is a TFT element material. When the sub element unit is a TFT element unit, the electron element of the present aspect has a laminated substrate for the upper four electronic components, and is formed on the electrically laminated substrate. The electronic component on the insulating layer and disposed on the upper =

=透明密封基板者，其特徵在於上述電子元件部為:T 尚關於電子元件用積層基板，由於已記载於上述「A 電子元件用積層基板」項目中，故於此省略其說明。以下，針對電子元件部為TFT元件部時之電子元件的各構成進行 101111300 84 201248740 說明。 (a)TFT元件部本態樣之TFT元件部係形成於電子元件用積層基板之絕緣層上者。在於電子元件用積層基板形成有電極或佈線的情況，電子元件部係具有該電極或佈線。電極及佈線若為構成Tft元件部的電極或佈線則無特別限定，可舉例如閘極導線、源極導線、構成TFT之閘極電極、源極電極、汲極電極。此等係配合TFT元件部之構成或TFT之構造而適當選擇。作為TFT之構造，可舉例如頂閘極構造(正交錯型）、底閘極構造(反交錯型）、共面型構造。在頂閘極構造(正交錯型) 及底閘極構造（反交錯型）的情況，進而可舉例如頂接觸構底接觸構造。此等構造係配合構成TFT之半導體層的種類而適當選擇。作為構成TFT的半導體層，若為可形成於電子元件用積層基板上者則無特別限定，可使用例如矽、氧化物半導體、有機半導體。作為矽，可使用聚矽、非晶型矽。作為氧化物半導體，可使用例如氧化鋅(Zn〇) 、氧化鈦 ’ （™)、氧化鎮鋅(MgxZni-x〇)、氧化鑛鋅(CdxZni χ〇)、氧化鑛(cd〇)、氧化銦(Ιη2〇3)、氧化錄(Ga2〇3)、氧化錫(Sn〇2)、氧化鎮(Mg〇)、氧化鎢(w〇)、InGaZn〇系、祕系、 101111300 85 201248740In the case of the transparent sealing substrate, the electronic component portion is a laminated substrate for electronic components, and is described in the above-mentioned "A laminated substrate for electronic components". Therefore, the description thereof is omitted here. Hereinafter, each configuration of the electronic component when the electronic component portion is a TFT component portion will be described in the description of 101111300 84 201248740. (a) TFT element portion The TFT element portion of this aspect is formed on the insulating layer of the laminated substrate for electronic components. In the case where an electrode or a wiring is formed on a laminated substrate for an electronic component, the electronic component has the electrode or the wiring. The electrode and the wiring are not particularly limited as long as they are electrodes or wirings constituting the Tft element portion, and examples thereof include a gate wire, a source wire, a gate electrode constituting the TFT, a source electrode, and a drain electrode. These are appropriately selected in accordance with the configuration of the TFT element portion or the structure of the TFT. The structure of the TFT may, for example, be a top gate structure (positive staggered type), a bottom gate structure (inverted staggered type), or a coplanar structure. In the case of the top gate structure (positive staggered type) and the bottom gate structure (inverted staggered type), for example, a top contact structure contact structure may be mentioned. These structures are appropriately selected in accordance with the kind of the semiconductor layer constituting the TFT. The semiconductor layer constituting the TFT is not particularly limited as long as it can be formed on a laminated substrate for an electronic component, and for example, germanium, an oxide semiconductor, or an organic semiconductor can be used. As the crucible, a polyfluorene or an amorphous crucible can be used. As the oxide semiconductor, for example, zinc oxide (Zn〇), titanium oxide '(TM), oxidized zinc (MgxZni-x〇), zinc oxide oxide (CdxZni®), oxidized ore (cd〇), indium oxide can be used. (Ιη2〇3), Oxidation Record (Ga2〇3), Tin Oxide (Sn〇2), Oxidation Town (Mg〇), Tungsten Oxide (w〇), InGaZn〇 System, Secret System, 101111300 85 201248740

InGaZnMgO 系、InAIZnO 系、InFeZnO 系、InGaO 系、ZnGaO 系、InZnO 系。作為有機半導體’可舉例如π電子共軛系之芳香族化合物、鍵式化合物、有機顏料、有機妙化合物等。更且體可舉例如稠五苯、稠四苯、嗟吩寡聚物衍生物、伸苯基衍生物、欧菁化合物、聚乙炔衍生物、聚°塞吩衍生物、花青色素等。半導體層之形成方法及厚度可與一般者相同。構成閘極導線、源極導線、TFT之閘極電極、源極電極及没極電極，若為具備所需導電性者則無特別限定，可使用一般TFT所使用之導電體。作為此種材料之例子，可舉例如 Ta、Ti、Al、Zr、Cr、Nb、Hf、Mo、Au、Ag、Pt、Mo-Ta 合金、W-Mo合金、ITO、IZO等之無機材料，及pED〇T/pSS 等之具有導電性的有機材料。作為構成閘極導線、源極導線、TFT之閘極電極、源極電極及汲極電極的形成方法及厚度，可設為與一般者相同。作為構成TFT之閘極絕緣膜，可使用與一般TFT中之閘極絕緣膜相同者，例如可使用氧化矽、氮化矽、氧化鋁、氧化组 '鈦酸鋇勰(BST)、鈦酸鍅酸鉛(PZT)等之絕緣性無機材料，及丙烯酸系樹脂、酚系樹脂、氟系樹脂、環氧系樹脂、 Cardo系樹脂、乙烯系樹脂、醯亞胺系樹脂、酚醛清漆系樹脂等之絕緣性有機材料。作為閘極絕緣膜之形成方法及厚度，可設為與一般者相 101111300 86 201248740 同。 TFT上亦巧形成保護膜。保護膜為用於保護TFT而設置者。例如可防止半導體層曝露空氣中所含有的水分等中。藉由形成保護膜，可減低TFT性能的經時劣化。作為此種保護膜，可使用例如氧化石夕、氮化石夕。作為保護膜之形成方法及厚度，可設為與一般者相同。 (b) 透明密封基板作為本態樣之透明密封基板，可設為與TFT元件中之一般透明密封基板相同。 (c) 密封部本態樣中’可於電子元件用積層基板與透明密封基板之間’在TFT元件部之外周部形成密封部。藉密封部密封元件，可防止水分或氧由外部的侵入。作為密封部，可設為與TFT元件中之一般密封部相同。 (d) 用途在電子元件部為TFT元件部時，本態樣之電子元件可用於主動矩陣驅動的有機EL顯示裝置、電子紙等之顯示裝置。此時，可於電子元件之透明密封基板上製作有機EI^元件、電子紙，亦可於電子元件之電子元件用積層基板上製作有機EL元件、電子紙。 (2)電子元件部為有機el元件部的情況在本態樣中之電子元件部為有機E]L元件部時，本態樣之 101111300 87 201248740 電子元件係具有上述電子元件用積層基板、形成於上述電子元件用積層基板之絕緣層上的電子元件部、與配置於上述電子元件部之透明密封基板者，其特徵為，上述電子元件部係具有形成於上述絕緣層上之背面電極層、形成於上述背面電極層上且至少含有有機發光層的EL層、與形成於上述EL 層上之透明電極層的有機EL元件部；上述電子元件用積層基板之導通部係具有連接於上述透明電極層之透明電極層用導通部、與連接於上述背面電極層之背面電極層用導通部。圖6為表示本態樣之電子元件為有機EL元件時之一例的概略剖面圖，為具備第1實施態樣之電子元件用積層基板的例。圖17為表示本態樣之電子元件為有機EL元件時之其他例的概略剖面圖，為具備第2實施態樣之電子元件用積層基板的例。圖6及圖17所例示之有機EL元件21均具有：電子元件用積層基板1 ;形成於電子元件用積層基板1之絕緣層2上的有機EL元件部20 ;配置於有機EL元件部20 上的透明密封基板25 ;與使電子元件用積層基板1及透明密封基板25接黏並密封元件的密封部26。有機EL元件部 20係具有：背面電極層22 ;形成於背面電極層22上，含有有機發光層的EL層23 ;與形成於EL層23上之透明電極層24。電子元件用積層基板1之2個導通部7a、7b中，一方之背面電極層用導通部7a係連接於背面電極層22,另一 101111300 88 201248740 方之远明電極層關於電子元件用積層基板ι連接於透明電極層24。又，為由透明密封基板25 j、士上述。該有機EL元件21 土販25側取出發光以下，針對電子元的頂概型。各構成進行說明。M_EL元件部時之電子元件的 (a)電子元件用積層基板本態樣之電子元件用板，電子元件㈣料板之導料讀用積層基電極層之透明電極層用導通部c上述透明背面電極層科通部。 4接於上述背面電極層之尚且，關於電子元件用積層基板，由於已記載於上述「A. 電子兀件用積層基板」項目中，故於此省略其說明。作為透明電極層用導通部及背面電極廣用導通部的配置’若為使透明電極層料通部連接至透明電極層、使背面電極層用導通部連接於背面電極層，則無特別限定。在電子兀件用積層基板為第1實施態樣及第2實施態樣之電子元件用積層基板時，可例如圖6及圖17所示般，將背面電極層用導通部7a及透明電極層用導通部7b配置於電子元件用積層基板1之外周部、亦即未形成EL層23的區域，亦可如圖21及圖22所示般，將背面電極層用導通部7a配置於形成有EL層23的區域。又，可如圖ό及圖17所示奴將背面電極層用導通部7&及逸明電極層用導通部7b配篆於 101111300 89 201248740 密封部26外側，亦可如¢1 9所示般’將背面電極層用導通部7a及透明電極層用導通部卟配置於密封部26内側。其中，較佳係如圖ό及圖17所示般，將背面電極層用導通部7a及透明電極層用導通部7b配置於密封部26外侧。此係由於可藉由電子元件用積層基板有效防止水分或氧侵入至元件中。 (b)有機EL元件部本態樣之有機EL元件部係具有：形成於電子元件用積層基板之絕緣層上的背面電極層；形成於上述背面電極層上，至少含有有機發光層的EL層；與形成於上述EL層上的透明電極層》以下說明有機EL元件部之各構成。 (i)EL 層本態樣之肛層係形成於 a有有機發光層者’且為具有至少含有有機發光層之1 =層的有機層者。亦即，EL層係指至少含有有機發^ 成Ε::ΓΓ蝴1層以上的層。通常在以塗佈法形、由於Α媒的關係而難以積層多數層，故乩層大多具有1層或2層的有機層，但藉由考量有機材料 :溶解性不同’或組合真空蒸鍍法，則可使其作成為: 作為有機發光層以外之乱層内所形成的層，可舉例如電 101111300 201248740 洞注入層、電洞輪送層、電子注入層及電子輪送層。電洞注入層及電洞輸送層有時被一體化。同樣地，電子注入層及電子輸送層有時被一體化◊其他，作為丑[層内所形成之層，可舉例如載體塊層般之防止電洞或電子的穿破，進而防止激子擴散而將激子封閉於發光層内，而可藉以提高再結合效率的層等。如此，EL層大多具有積層了各種層的積層構造，而其積層構造有許多種類。作為構成EL層的各層，係與一般有機元件所使用者相同。 (ii) 透明電極層本態樣之透明電極層，係形成於EL層上者。本態樣之有機EL元件中係由透明密封基板側取出光 ’故透明電極層具有透明性。作為透明電極層之材料，若為可形成透明電極之導電體則無特別限疋’可使用例如氧化銦錫(Ι1Ό)、氧化銦鋅(IZ〇)、氧化錫、氧化鋅、氧化銦、氧化銘鋅⑽⑺等之導電性氧化物。透明電極層之形成方法及厚度，可設為與一般有機el元件中之電極相同。 (iii) 背面電極層本態樣之背面電極層係形成於電子元件用積層基板之絕 101111300 91 201248740 緣層上。尚且，關於背面電極層，由於已記載於上述「A.電子元件用積層基板」之電極及佈線的項目中，故於此省略其說明。 (C)透明密封基板作為本態樣所使用之透明密封基板，可設為與有機£1^元件中一般之透明密封基板相同。 (d)密封部本態樣中’可於電子元件用積層基板與透明密封基板之間’於有機EL元件部之外周部形成密封部。藉由密封部密封元件’可防止水分或氧由外部侵入。作為松封部的構成材料，若為具有防止水分侵入的功能者 =無_限定’可_如聚•胺系樹脂、聚錢系樹脂、 %氧系樹脂、丙烯酸純脂等之熱硬化型樹脂、光硬化型樹街封部亦可含有吸濕劑藉由密封部中之吸濕劑進;f w ”八％'川栉田社、蚵邵守濕，則可更有效地防止水分由外部的侵入。作為吸濕劑，若為具有至少吸附水分之功能者則益特較佳係化學性地吸附水分，且即使吸濕仍維上的化合物。作為此種化合物，可舉例如金屬氧化金屬之無機酸鹽或有機酸鹽等。特佳為驗土族金屬氧化驗土族金屬氧化物，可舉例如氧鄉氧化銷專。作為硫酸鹽，可舉例如硫酸鐘、硫酸 101111300 92 201248740 硫酸鉀、硫酸鈦、硫酸鎳等。又，亦可使用矽膠或聚乙烯醇等之具有吸濕性的有機化合物。此等之中，特佳為氧化鈣、氧化鋇、矽膠。因為此等吸濕劑的吸濕性較高。吸濕劑的含量並無特別限定，相對於吸濕劑與樹脂的合計量100質量份，較佳為5質量份〜80質量份的範圍内、更佳 5質量份〜60質量份的範圍内、再更佳5質量份〜50質量份的範圍内。作為密封部的厚度及寬度，若為可防止水分由外部侵入的厚度則無特別限定，係配合有機EL元件之用途而適當選擇。作為密封部的形成方法，可使用於電子元件用積層基板或透明密封基板上塗佈樹脂組成物的方法。作為塗佈方法，若為可於既定部分進行塗佈的方法則無特別限定，可使用例如凹版印刷法、網版印刷法、配量器法等。 (e)其他構成在電子元件部為有機EL元件部時，本態樣之電子元件係除了上述構成之外，視需要亦可具有絕緣層、隔壁等。 ⑴用途在電子元件部為有機EL元件部時，本態樣之電子元件可使用作為被動矩陣驅動之有機EL顯示裝置、有機EL照明裝置。 (3)電子元件部為電子紙元件部的情況在本態樣之電子元件部為電子紙元件部的情況，本態樣之 101111300 93 201248740 電子元件係具有：上述電子元件用積層基板；形成於上述電子元件用積層基板之絕緣層上的電子元件部；與配置於上述電子元件部上之透明密封基板者；其特徵為，上述電子元件部係具有形成於上述絕緣層上之背面電極層、形成於上述背面電極層上的顯示層、與具有形成於上述顯示層上之透明電極層的電子紙元件部；上述電子元件用積層基板之導通部係具有連接於上述透明電極層之透明電極層用導通部、與連接於上述背面電極層之背面電極層用導通部。以下’針對電子元件部為電子紙元件部時之電子元件的各構成進行說明。 (a)電子元件用積層基板本態樣之電子元件用積層基板係上述電子元件用積層板’電子科用積層基板之導通部係具有：連接於上述透電極層之透明電_科通部；與連祕背面電極層科通部。電件用積層基板，由於已記載於上述' m」項目巾，故於此省略其說明。置由㈣/電極層料通部及背面電極層用導通部的$ :省:::::元件部為有機―情況相同， (b)電子紙元件部具有.形成於電子元件用積層基本態樣之電子紙元件部係 101111300 94 201248740 板之絕緣層上的背面電極層；形成於上述背面電極層上的顯示層；與形成於上述顯示層上的透明電極層。作為電子紙之顯示方式，可應用公知者，可舉例如電泳動方式、扭轉向列球方式、粉體移動方式（電子粉流體方式、靜電碳粉型方式）、液晶顯示方式、熱方式（發色方式、光散射方式）、電泳沉積方式、可動薄膜方式、電色變方式、電濕潤方式、磁泳方式等。作為構成電子紙之顯示層，係配合電子紙之顯示方式而適當選擇。另外，關於背面電極層及透明電極層，由於與電子元件部為有機EL元件部的情況相同，故於此省略其說明。 (c) 透明密封基板作為本態樣所使用之透明密封基板，可設為與電子紙中一般之透明密封基板相同。 (d) 密封部本態樣中，可於電子元件用積層基板與透明密封基板之 » 間，於電子紙元件部之外周部形成密封部。藉由密封部密封元件，可防止水分或氧由外部侵入，並將元件内之濕度保持為一定。尚且，關於密封部，由於與電子元件部為有機EL元件部的情況相同，故於此省略其說明。 ⑷用途 101111300 95 本態樣之電子元件可使在電子元件部為電子紙元件邹時用作為被動矩陣驅動之電子紙。 2.電子元件之第2態樣 +恐像之電 ‘丁兀仵的特徵在於具有. 述透明基板上㈣子元件部；&有基板；形成於上上述電子元件用積層基板。本態樣置中=述電子元件部上的係配置成使絕緣層側面向電子 ΐ子7L件用積層基板作為本態樣之電子元件部，若為者則無特亀定，其帽料 W水分或氧之侵入子元件部騎機件部的情㈣彳。灯針對電 (電子元件部騎機EL元件部的情况）說月。電==電子元件部為有機&件部時，本態樣之 2疋件係具有透明基板、形成於上述透明基板上的電子元件^、與配置於上述電子元件部之上述電子元制積層基板者，其特徵為’上述電子元件㈣財料於上述透明基板上之透明電極層、形成於上述透明電極層上且至少含有有機發光層的成於上述虹層上之背面電極層的有機EL元件部；上述電子元件用積層基板之導通部係具有連接於上述透明電極層之透明電極層用導通部、與連接於上述背面電極層之背面電極層用導通部。圖7為表示本態樣之電子元件為有機EL元侏技+ — τ于之一例的概略剖面圖，為具備第1貫施態樣之電子元件用積展武板的 101111300 96 201248740 例。圖18為表示本態樣之電子元件為有機EL元件時之其他例的概略剖面圖，為具備第2實施態樣之電子元件用積層基板的例。圖7及圖18所例示之有機EL元件21均具有：透明基板27 ;形成於透明基板27上的有機EL元件部20 ; 配置於有機EL元件部20上的電子元件用積層基板1;與使透明基板27與電子元件用積層基板1接黏並密封元件的密封部26。有機EL元件部20係具有：透明電極層24 ;形成於透明電極層24上，含有有機發光層的EL層23 ;與形成於EL層23上之背面電極層22。電子元件用積層基板1之 2個導通部7a、7b中，一方之背面電極層用導通部7a係連接於背面電極層22,另一方之透明電極層用導通部7b係連接於透明電極層24。又，關於電子元件用積層基板1，係如上述。該有機EL元件21為由透明基板27側取出發光L的底部發光型。尚且，關於電子元件用積層基板、有機EL元件部、密封部及其他構成，由於與上述第1態樣中電子元件部為有機 EL元件部的情況相同，故於此省略其說明。以下，針對電子元件部為有機EL元件部時之電子元件的其他構成進行說明。 (a)透明基板作為本態樣所使用之透明基板，可設為與有機EL元件中一般之透明基板相同。 101111300 97 201248740 (b)用途在電子元件部為有機EL元件部時，本態樣之電子元件可使用作為有機EL照明裝置。 C.有機EL顯示裝置接著說明本發明之有機EL顯示裝置。本發明之有機EL顯示裝置可藉由上述電子元件用積層基板為支撐基板或密封基板而分為2種態樣。以下分別說明各態樣。 1.有機EL顯示裝置之第1態樣本態樣之有機EL顯示裝置的特徵在於具有··上述電子元件用積層基板；形成於上述電子元件用積層基板之絕緣層上的TFT元件部；有機EL元件部，其具有形成於上述電子元件用積層基板之絕緣層上且連接至上述TFT元件部的背面電極層、形成於上述背面電極層上且至少含有有機發光層的 EL層、及形成於上述EL層上之透明電極層；與配置於上述有機EL元件部上的透明密封基板。InGaZnMgO system, InAIZnO system, InFeZnO system, InGaO system, ZnGaO system, InZnO system. The organic semiconductor may, for example, be an aromatic compound of a π-electron conjugated system, a key compound, an organic pigment, or an organic compound. Further, for example, condensed pentabenzene, condensed tetraphenyl, porphin oligomer derivative, phenyl derivative, phthalocyanine compound, polyacetylene derivative, polythiophene derivative, cyanine dye, or the like can be mentioned. The method of forming the semiconductor layer and the thickness thereof can be the same as those of the general one. The gate electrode, the source wire, the gate electrode of the TFT, the source electrode, and the electrodeless electrode are not particularly limited as long as they have the required conductivity, and a conductor used in a general TFT can be used. Examples of such a material include inorganic materials such as Ta, Ti, Al, Zr, Cr, Nb, Hf, Mo, Au, Ag, Pt, Mo-Ta alloy, W-Mo alloy, ITO, and IZO. And an organic material having conductivity such as pED〇T/pSS. The forming method and thickness of the gate electrode, the source wiring, the gate electrode of the TFT, the source electrode, and the drain electrode can be set to be the same as in the ordinary case. As the gate insulating film constituting the TFT, the same as the gate insulating film in the general TFT can be used, for example, yttrium oxide, tantalum nitride, aluminum oxide, oxidized group 'BST barium titanate (BST), barium titanate can be used. An insulating inorganic material such as lead acid (PZT), or an acrylic resin, a phenol resin, a fluorine resin, an epoxy resin, a Cardo resin, an ethylene resin, a quinone imine resin, or a novolac resin. Insulating organic material. The method and thickness for forming the gate insulating film can be the same as that of the general phase 101111300 86 201248740. A protective film is also formed on the TFT. The protective film is provided for protecting the TFT. For example, it is possible to prevent the semiconductor layer from being exposed to moisture or the like contained in the air. By forming the protective film, the deterioration of the performance of the TFT can be reduced. As such a protective film, for example, oxidized stone and cerium nitride can be used. The method of forming the protective film and the thickness thereof can be set to be the same as those of the general one. (b) Transparent sealing substrate As the transparent sealing substrate of this aspect, it can be set to be the same as a transparent sealing substrate in a TFT element. (c) Sealing portion In the present aspect, a sealing portion can be formed on the outer peripheral portion of the TFT element portion between the laminated substrate for the electronic component and the transparent sealing substrate. By sealing the sealing member, moisture or oxygen can be prevented from intruding from the outside. The sealing portion can be made the same as the general sealing portion in the TFT element. (d) Application When the electronic component unit is a TFT element unit, the electronic component of this aspect can be used for an active matrix driven organic EL display device or an electronic paper display device. In this case, an organic EI element and electronic paper can be produced on the transparent sealing substrate of the electronic component, and an organic EL element or electronic paper can be produced on the laminated substrate for electronic components of the electronic component. (2) When the electronic component part is the organic EL element part, the electronic component part in this aspect is an organic E] L element part, and the 101111300 87 201248740 electronic component of this aspect has the above-mentioned laminated substrate for electronic components, and is formed in the above. An electronic component portion on an insulating layer of a laminated substrate for an electronic component and a transparent sealing substrate disposed on the electronic component portion, wherein the electronic component portion has a back electrode layer formed on the insulating layer and is formed on An EL layer containing at least an organic light-emitting layer on the back electrode layer; and an organic EL element portion formed on the transparent electrode layer formed on the EL layer; and a conductive portion of the multilayer substrate for the electronic component having a connection to the transparent electrode layer The conductive portion for the transparent electrode layer and the conductive portion for the back electrode layer connected to the back electrode layer. Fig. 6 is a schematic cross-sectional view showing an example in which the electronic component of the present embodiment is an organic EL device, and is an example of a laminated substrate for an electronic component according to the first embodiment. Fig. 17 is a schematic cross-sectional view showing another example of the case where the electronic component of the present embodiment is an organic EL device, and is an example of a laminated substrate for an electronic component according to the second embodiment. Each of the organic EL elements 21 illustrated in FIG. 6 and FIG. 17 includes a laminated substrate 1 for electronic components, an organic EL element portion 20 formed on the insulating layer 2 of the laminated substrate 1 for electronic components, and disposed on the organic EL element portion 20. The transparent sealing substrate 25 and the sealing portion 26 for bonding the electronic component laminated substrate 1 and the transparent sealing substrate 25 to each other and sealing the element. The organic EL element portion 20 has a back electrode layer 22, an EL layer 23 formed on the back electrode layer 22, an organic light-emitting layer, and a transparent electrode layer 24 formed on the EL layer 23. Among the two conductive portions 7a and 7b of the laminated substrate 1 for electronic components, one of the back electrode layer conductive portions 7a is connected to the back electrode layer 22, and the other 101111300 88 201248740 square far electrode layer for the electronic component laminated substrate. Ip is connected to the transparent electrode layer 24. Further, the transparent sealing substrate 25 j is made of the above. The organic EL element 21 is taken out on the side of the landlord 25, and is illuminated in the following. Each configuration will be described. In the case of the electronic component of the M_EL element portion, (a) the laminated substrate for the electronic component, the electronic component board of the electronic component (4), the transparent electrode layer conductive portion c for the conductive read layer base electrode layer of the material guide plate, and the transparent back electrode Department of Science and Technology Department. In the above-mentioned "A. laminated substrate for electronic components", the laminated substrate for electronic components is described in the above-mentioned "back electrode layer", and the description thereof is omitted here. The arrangement of the conductive portion for the transparent electrode layer and the wide-side conductive portion of the back electrode is not particularly limited as long as the transparent electrode layer material is connected to the transparent electrode layer and the back electrode layer conductive portion is connected to the back electrode layer. When the laminated substrate for an electronic component is the first embodiment and the laminated substrate for an electronic component of the second embodiment, the conductive portion 7a for the back electrode layer and the transparent electrode layer can be used as shown in FIG. 6 and FIG. The conductive portion 7b is disposed on the outer peripheral portion of the electronic component multilayer substrate 1, that is, the region where the EL layer 23 is not formed, and the back electrode layer conductive portion 7a may be disposed as shown in FIGS. 21 and 22 The area of the EL layer 23. Further, as shown in FIG. 17, the conduction portion 7& and the conductive electrode layer conduction portion 7b of the back electrode layer may be disposed outside the sealing portion 26 of 101111300 89 201248740, as shown in FIG. The conduction portion 7a for the back electrode layer and the conduction portion 透明 for the transparent electrode layer are disposed inside the sealing portion 26. Preferably, the back electrode layer conductive portion 7a and the transparent electrode layer conductive portion 7b are disposed outside the sealing portion 26 as shown in Fig. 17 and Fig. 17 . This is because moisture or oxygen can be prevented from intruding into the element by the laminated substrate for electronic components. (b) The organic EL element portion of the organic EL element portion has a back electrode layer formed on an insulating layer of the laminated substrate for electronic components, and an EL layer formed on the back electrode layer and containing at least an organic light-emitting layer; Each of the organic EL element portions will be described below with respect to the transparent electrode layer formed on the EL layer. (i) EL layer The anal layer of the present aspect is formed in a layer having an organic light-emitting layer and is an organic layer having a layer of at least one organic light-emitting layer. That is, the EL layer means a layer containing at least one layer of organic hair: ΓΓ 。. Usually, in the coating method, it is difficult to laminate a large number of layers due to the relationship between the ruthenium and the media. Therefore, the ruthenium layer often has one or two organic layers, but by considering organic materials: different solubility' or combination vacuum evaporation Further, the layer formed in the disorder layer other than the organic light-emitting layer may, for example, be a 101111300 201248740 hole injection layer, a hole transfer layer, an electron injection layer, and an electron transfer layer. The hole injection layer and the hole transport layer are sometimes integrated. Similarly, the electron injecting layer and the electron transporting layer are sometimes integrated into each other, and as a layer formed in the layer, for example, a carrier block layer prevents the penetration of holes or electrons, thereby preventing exciton diffusion. The layer in which the exciton is enclosed in the light-emitting layer, thereby improving the recombination efficiency, and the like. As described above, the EL layer often has a laminated structure in which various layers are laminated, and there are many types of laminated structures. The layers constituting the EL layer are the same as those of the general organic device. (ii) Transparent electrode layer The transparent electrode layer of this aspect is formed on the EL layer. In the organic EL device of this aspect, light is taken out from the side of the transparent sealing substrate, so that the transparent electrode layer has transparency. The material of the transparent electrode layer is not particularly limited as long as it can form a transparent electrode. It can be used, for example, indium tin oxide (Indium Oxide), indium zinc oxide (IZ〇), tin oxide, zinc oxide, indium oxide, oxidation. Conductive oxides such as zinc (10) (7). The method of forming the transparent electrode layer and the thickness thereof can be set to be the same as those of the electrode of a general organic EL element. (iii) Back electrode layer The back electrode layer of this aspect is formed on the edge layer of 101111300 91 201248740 of the laminated substrate for electronic components. In addition, since the back electrode layer is described in the item of the electrode and the wiring of the above-mentioned "A. laminated substrate for electronic components", the description thereof is omitted here. (C) Transparent sealing substrate The transparent sealing substrate used in this aspect can be set to be the same as the general transparent sealing substrate in the organic one. (d) Sealing portion In the present invention, a sealing portion can be formed on the outer peripheral portion of the organic EL element portion between the laminated substrate for the electronic component and the transparent sealing substrate. The sealing member seals the member to prevent moisture or oxygen from intruding from the outside. As a constituent material of the loose seal portion, if it has a function of preventing moisture intrusion, it is a thermosetting resin such as a polyamine resin, a polyvalence resin, a % oxygen resin, or a pure acrylic resin. The light-curing tree block seal may also contain a moisture absorbent through the moisture absorbent in the sealing portion; fw "eight%" Chuan Yutian, and Shao Shaoshou, can more effectively prevent moisture from being externally In the case of a moisture-absorbing agent, if it has a function of adsorbing at least moisture, it is preferable to chemically adsorb moisture, and to maintain the compound even if it absorbs moisture. As such a compound, for example, metal oxide metal Inorganic acid salt or organic acid salt, etc. It is particularly preferred to be a metal oxide of a soil-testing group of a soil-reducing group, and may be, for example, an oxygen-oxygen oxide product. As the sulfate salt, for example, a sulfuric acid clock, sulfuric acid 101111300 92 201248740 potassium sulfate, titanium sulfate And nickel sulfate, etc. Further, it is also possible to use a hygroscopic organic compound such as silicone or polyvinyl alcohol. Among them, calcium oxide, cerium oxide, and cerium are particularly preferred because of the moisture absorption of such moisture absorbents. High sex. The content of the agent is not particularly limited, and is preferably in the range of 5 parts by mass to 80 parts by mass, more preferably 5 parts by mass to 60 parts by mass, based on 100 parts by mass of the total amount of the moisture absorbent and the resin. In the range of 5 parts by mass to 50 parts by mass, the thickness and the width of the sealing portion are not particularly limited as long as they can prevent the intrusion of moisture from the outside, and are appropriately selected in accordance with the use of the organic EL element. A method of forming a resin composition for a laminated substrate or a transparent sealing substrate for an electronic component can be used. The coating method is not particularly limited as long as it can be applied to a predetermined portion, and for example, a gravure can be used. (e) In the case where the electronic component portion is an organic EL device portion, the electronic component of the present aspect may have an insulating layer as needed, in addition to the above configuration. (1) Use When the electronic component unit is an organic EL element, the electronic device of this aspect can be used as an organic EL display device driven by a passive matrix or an organic EL illumination device. (3) In the case where the electronic component unit is the electronic paper component part, the electronic component part of the present aspect is the electronic paper component part, and the 101111300 93 201248740 electronic component of the present invention has the laminated substrate for the electronic component described above; An electronic component portion on an insulating layer of a laminated substrate for an element; and a transparent sealing substrate disposed on the electronic component portion; wherein the electronic component portion has a back electrode layer formed on the insulating layer, and is formed on a display layer on the back electrode layer and an electronic paper element portion having a transparent electrode layer formed on the display layer; and a conductive portion of the laminated substrate for the electronic component having a transparent electrode layer connected to the transparent electrode layer And a conductive portion for the back electrode layer connected to the back electrode layer. Hereinafter, each configuration of the electronic component when the electronic component unit is the electronic paper component will be described. (a) a laminated substrate for an electronic component, the laminated substrate for an electronic component, and a conductive layer of the electronic component laminated substrate, wherein the conductive portion is connected to the transparent electrode of the through-electrode layer; Even the secret back electrode layer section. Since the laminated substrate for an electric component has been described in the above-mentioned 'm' item, the description thereof is omitted here. The (4)/electrode layer material passage portion and the back electrode layer conduction portion are: $: province::::: the element portion is organic, and the case is the same, and (b) the electronic paper element portion has a basic state of formation for the electronic component layer. The electronic paper component part 101111300 94 201248740 The back electrode layer on the insulating layer of the board; the display layer formed on the back surface electrode layer; and the transparent electrode layer formed on the said display layer. As a display method of the electronic paper, a known one can be applied, and examples thereof include an electrophoresis method, a twisted nematic ball method, a powder moving method (electronic powder fluid method, electrostatic toner type), a liquid crystal display method, and a thermal method. Color mode, light scattering method), electrophoretic deposition method, movable film method, electrochromic method, electrowetting method, magnetophoresis method, and the like. As the display layer constituting the electronic paper, it is appropriately selected in accordance with the display mode of the electronic paper. In addition, since the back electrode layer and the transparent electrode layer are the same as those in the case where the electronic component portion is the organic EL element portion, the description thereof is omitted here. (c) Transparent sealing substrate The transparent sealing substrate used in this aspect can be set to be the same as the general transparent sealing substrate in electronic paper. (d) Sealing portion In this aspect, a sealing portion can be formed on the outer peripheral portion of the electronic paper element portion between the laminated substrate for the electronic component and the transparent sealing substrate. By sealing the sealing member, it is possible to prevent moisture or oxygen from intruding from the outside and to keep the humidity inside the component constant. In addition, since the sealing portion is the same as the case where the electronic component portion is the organic EL device portion, the description thereof is omitted here. (4) Use 101111300 95 The electronic component of this aspect can be used as a passive matrix driven electronic paper when the electronic component is an electronic paper component. 2. Second aspect of electronic component + electric power of fear image ‘Ding 兀仵 is characterized by having (4) a sub-element portion on a transparent substrate; &; having a substrate; and forming the above-mentioned laminated substrate for an electronic component. In the present embodiment, the system on the electronic component portion is arranged such that the side surface of the insulating layer is used as the electronic component portion of the electronic substrate 7L for the electronic substrate. If it is not specified, the cap material W is hydrated or The intrusion of oxygen into the component part of the rider part (4). The lamp is used for electricity (in the case of the EL component of the electronic component unit). When the electronic component portion is an organic component, the second component of the present invention includes a transparent substrate, an electronic component formed on the transparent substrate, and the electronic component layer substrate disposed on the electronic component portion. The electronic component (the fourth) is a transparent electrode layer on the transparent substrate, and an organic EL element formed on the transparent electrode layer and having at least an organic light-emitting layer and a back electrode layer formed on the rainbow layer. The conductive portion of the laminated substrate for electronic components includes a conductive portion for a transparent electrode layer connected to the transparent electrode layer, and a conductive portion for a back electrode layer connected to the back electrode layer. Fig. 7 is a schematic cross-sectional view showing an example in which the electronic component of the present embodiment is an organic EL element + - τ, and is an example of 101111300 96 201248740 having an integrated electronic component for the first embodiment. Fig. 18 is a schematic cross-sectional view showing another example of the case where the electronic component of the present embodiment is an organic EL device, and is an example of a laminated substrate for an electronic component according to the second embodiment. Each of the organic EL elements 21 illustrated in FIG. 7 and FIG. 18 has a transparent substrate 27, an organic EL element portion 20 formed on the transparent substrate 27, and a laminated substrate 1 for electronic components disposed on the organic EL element portion 20; The transparent substrate 27 is bonded to the laminated substrate 1 for electronic components and seals the sealing portion 26 of the element. The organic EL element portion 20 has a transparent electrode layer 24, an EL layer 23 formed on the transparent electrode layer 24, an organic light-emitting layer, and a back electrode layer 22 formed on the EL layer 23. Among the two conductive portions 7a and 7b of the laminated substrate 1 for electronic components, one of the back electrode layer conductive portions 7a is connected to the back electrode layer 22, and the other transparent electrode layer conductive portion 7b is connected to the transparent electrode layer 24. . Further, the laminated substrate 1 for electronic components is as described above. This organic EL element 21 is a bottom emission type in which the light emission L is taken out from the side of the transparent substrate 27. In addition, the laminated circuit board for an electronic component, the organic EL element portion, the sealing portion, and the like are the same as those in the case where the electronic component portion is the organic EL device portion in the first aspect, and thus the description thereof is omitted. Hereinafter, other configurations of the electronic component in the case where the electronic component portion is the organic EL device portion will be described. (a) Transparent substrate The transparent substrate used in this aspect can be the same as the transparent substrate which is generally used in an organic EL device. 101111300 97 201248740 (b) Use When the electronic component unit is an organic EL element, the electronic component of this aspect can be used as an organic EL illumination device. C. Organic EL display device Next, an organic EL display device of the present invention will be described. The organic EL display device of the present invention can be classified into two types by using the laminated substrate for electronic components as a supporting substrate or a sealing substrate. The following describes each aspect separately. 1. The organic EL display device of the first aspect of the organic EL display device is characterized in that: the above-mentioned electronic device laminated substrate; the TFT element portion formed on the insulating layer of the electronic component laminated substrate; organic EL An element portion having a back electrode layer formed on the insulating layer of the electronic component laminated substrate and connected to the TFT element portion, an EL layer formed on the back electrode layer and containing at least an organic light emitting layer, and an EL layer formed thereon a transparent electrode layer on the EL layer; and a transparent sealing substrate disposed on the organic EL element portion.

根據本態樣，由於具備上述電子元件用積層基板，故可將佈線取出至電子元件用積層基板之元件所配置之面為相反側的面，可達到窄邊框化。又，根據本態樣，由於電子元件用積層基板之阻氣性優越、具有放熱性，故可良好地維持元件性能’並可抑制因有機EL元件發熱所造成的性能劣化。尚且，關於電子元件用積層基板，由於已記載於上述「A 101111300 98 201248740 電子元件用積層基板」項目中，故於此省略其說明。又，關於.TFT元件部、有機EL元件部、透明密封基板，由於已記載於上述「B.電子元件」項目中，故於此省略其說明。 2.有機EL顯示裝置之第2態樣本態樣之有機EL顯示裝置的特徵在於具有：透明基板；有機EL元件部，其具有形成於上述透明基板上的背面電極層、形成於上述背面電極層上且至少含有有機發光層的EL 層、及形成於上述EL層上之透明電極層；與配置於上述有機EL元件部上的上述電子元件用積層基板。本態樣中，電子元件用積層基板係配置成使絕緣層側面向有機EL元件部。尚且’關於電子元件用積層基板，由於已記載於上述「A. 電子元件用積層基板」項目中，故於此省略其說明。又，關於有機EL元件部、透明基板，由於已記載於上述「Β·電子元件」項目中，故於此省略其說明。本態樣中，亦可於電子元件用積層基板之與有機El元件部所配置之面為相反側之面上形成TFT元件部。又，關於 TFT元件部，由於已記載於上述「B.電子元件」項目中，故於此省略其說明。 D.電子紙接著說明本發明之電子紙。本么月之電子紙的特被在於具有.上述電子元件用積層基 101111300 99 201248740 板；形成於上述電_ 件部；電子紙元件。疋件用積層基板之絕緣層上的TFT元板之絕緣層上其具有形成於上述電子元件用積層基成於上述背面電極^至上述TFT元件部的背面電極層、形透明電極層’·與配㈢上的顯示層、及形成於上述顯示層上之板。置^於上述電子紙元件部上的透明密封基根據本發明，由於佈線取出至電子_ 、述電子元件用積層基板，故可將反側的面，可達到^牛用積層基板之與元件所配置之面為相件用積層基板之阻々邊樞化。又，根據本發明，由於電子元尚且，關於電子:性優越’故可良好地維持元件性能。電子元件用積層基板用積層基板’由於已記載於上述「A. 於丁FT元件部、電'項目中’故於此省略其說明。又，關載於上述「B電子-彼紙元件部、透明密封基板，由於已記本發明之電子元件用積層基板的製造方法 :至少_及金屬層依序積層之積層體的:層、= 驟;於上述絕緣層形成絕緣層貫通孔的絕緣驟；與對上述金屬層進行圖㈣π太，貝ι孔开乂成步 >、化，同時形成於上述絕緣層貫具有開口部之金屬層肖配置於上述絕緣層貫通孔上之導通部用金屬部的金屬相案化步驟；並依列順序進行上述絕緣層貫通孔形成步驟及上述金屬層圖案化步驟。本發 101111300 100 201248740 明之電子70件用積層基板之製造方法，係上述「A.電子元件用積層基板」項目中記载之製造第1實施態樣之電子元件用積層基板的方法。參照圖式說明本發明之電子元件用積層基板的製造方法。圖23(a)〜(e)為表示本發明之電子元件用積層基板之製造方法之一例的步驟圖。首先，準備金屬層幻單體（圖23(a)" 於金屬層S3上形成絕緣層％圖23(b)，積層體準備步驟）。接著，於絕緣層2上層合乾式薄膜光阻，藉光刻法對絕緣層 2進行圖案化，形成絕緣層貫通孔12h(圖23⑷，絕緣層貫通孔形成步驟）。此時，亦可使贼光性聚酿亞胺或感光性聚醯亞胺前驅物形成絕緣層2,藉由光刻法對絕緣層2進行圖案化，形成絕緣層貫通孔12h。接著，以金屬層53作為給電層而進行鍍覆，於絕緣層貫通孔12h填充第丨導通部 6(圖23(d)，第1導通部形成步驟）。此時，亦可使用導電膏於絕緣層貫通孔12h中填充第1導通部6。接著，於金屬層 53上層合乾式薄膜光阻，藉光刻法對金屬層33進行圖案化’而同時形成具有開口部13h之金屬層3與導通部用金屬部8(圖23(e)，金屬層圖案化步驟）。藉此，可得到由第1導通部6及導通部用金屬部8所構成的導通部7。圖23(a)〜(e)及圖24(a)〜(b)為表示本發明之電子元件用積層基板之製造方法之其他例的步驟圖。又，圖23(e)及圖24(a) 為相同圖。關於圖23(a)〜(e)已於上述故省略說明。接著， 101111300 101 201248740 將被覆層15填充於金屬層3之開口部13h内之導通部用金屬部8以外的部分（圖24(b))。圖25(a)〜(e)係表示本發明之電子元件用積層基板之製造方法之其他例的步驟圖。又，圖25(a)為與圖23(e)相同的圖。關於圖23(a)〜(e)已於上述故省略說明。接著，於金屬層3 上形成第2絕緣層4(圖25(b)’第2絕緣層形成步驟）。接著，於第2絕緣層4上層合乾式薄膜光阻，藉光刻法對第2絕緣層4進行圖案化，形成第2絕緣層貫通孔14h(圖25(c)，第 2絕緣層貫通孔形成步驟此時，亦可使用感光性聚醯亞胺或感光性聚醯亞胺前驅物形成第2絕緣層4，藉光刻法對第2絕緣層4進行圖案化，以形成第2絕緣層貫通孔14h。接者’藉由無電解鍍覆於第2絕緣層4整面形成金屬膜55(圖 25(d))其後，於金屬膜55上層合乾式薄膜光阻，藉由光刻法對金屬膜55進彳了圖案化，形成填級第2絕緣層貫通孔 Mh的第2導通部1〇(圖25(e)，第2導通部形成步驟）。此 /寺亦可藉無電解鍍覆於第2絕緣層整面薄薄地形成金屬膜後’⑽金屬膜作為給電層進行電解，形成第2導通部。又，導通:厂導電膏於第2絕緣層貫通孔14h中填充第2 部8與第2導通^㈣如1導通部6與導通部用金屬屬膜55之__所構㈣_卩7。此時，在上述金或佈線。于，亦可同時於第2絕緣層4上形成電極 101111300 102 201248740 m〜(g)為表示本發明之料__層基板之製生夂之,、他例的步驟圖。首先，準備依序積層了、與絕緣層2與金屬膜55的三層材（圖 53 驟）。接著，於金屬層53上層合乾式,& ’積層體準倚歩尽口乾式溥祺光阻，蕤金屬層53進行圖案化’同時形成具有開口部‘之全屬: 3與導金屬部，(b)，金屬層圖、 %進行圖案化(圖。金屬層53及金屬進行雙面®案化。接著，於金屬層3上打门時 %⑷，第2絕緣層形成步驟）。其次，^ :緣層V圖合乾式薄膜総，_嶋⑽層4進=^上層成第2絕緣層貫通孔14h(圖2_，第2 畜、形步驟)。此時’亦可使用感光性聚醯：貝、广形成前驅物形成第2絕緣層4,藉由光刻法，第2絕==: 圖案化，形成第2絕緣層貫通孔141^接著，以金屬膜55 之圖案作為遮罩，對絕緣層2進行蝕刻，形成絕緣層貫通孔 12h(圖26(e)，絕緣層貫通孔形成步驟）5)此時，由於以金屬膜55之圖案作為遮罩而進行蝕刻，故即使是使用了非感光性聚醯亞胺的絕緣層2亦可進行圖案化。接著，進一步對金屬膜55進行圖案化，於絕緣層2上形成電極•佈線5(圖 26⑺）。接著，使用使用導電膏於絕緣層貫通孔12h及第2 絕緣層貫通孔14h中填充第1導通部6及第2導通部10(圖 101111300 103 201248740 26(g)，第 1 導诵如TT>? b 1According to the aspect of the invention, since the laminated substrate for the electronic component is provided, the surface on which the wiring is taken out to the component of the laminated substrate for the electronic component can be on the opposite side, and the frame can be narrowed. Further, according to the aspect of the invention, since the laminated substrate for an electronic component has excellent gas barrier properties and has heat dissipation properties, the device performance can be favorably maintained, and performance deterioration due to heat generation of the organic EL device can be suppressed. In addition, the laminated substrate for electronic components is described in the above-mentioned item "A 101111300 98 201248740 laminated substrate for electronic components", and thus the description thereof is omitted here. Further, the TFT element portion, the organic EL element portion, and the transparent sealing substrate are described in the above-mentioned "B. Electronic device" item, and thus the description thereof will be omitted. 2. The organic EL display device of the second aspect of the organic EL display device, comprising: a transparent substrate; and an organic EL element portion having a back electrode layer formed on the transparent substrate and formed on the back electrode layer An EL layer containing at least an organic light-emitting layer, a transparent electrode layer formed on the EL layer, and a laminated substrate for the electronic component disposed on the organic EL element portion. In this aspect, the electronic component is laminated on the laminated substrate so that the side surface of the insulating layer faces the organic EL element portion. In addition, the laminated substrate for electronic components has been described in the above-mentioned "A. Multilayer substrate for electronic components", and thus the description thereof is omitted here. In addition, since the organic EL element portion and the transparent substrate are described in the above-mentioned "Β·Electronic device" item, the description thereof is omitted here. In this aspect, the TFT element portion may be formed on the surface on the opposite side to the surface on which the organic EL element portion is disposed on the laminated substrate for electronic components. Further, since the TFT element portion has been described in the above "B. Electronic Component" item, the description thereof is omitted here. D. Electronic Paper Next, the electronic paper of the present invention will be described. The electronic paper of the present month is characterized in that it has the above-mentioned laminated board for electronic components 101111300 99 201248740; it is formed in the above-mentioned electric parts; and an electronic paper element. The insulating layer of the TFT element plate on the insulating layer of the laminated substrate has a back electrode layer and a transparent electrode layer formed on the back surface electrode to the TFT element portion. (3) The upper display layer and the plate formed on the display layer. According to the present invention, the transparent sealing base provided on the electronic paper element portion can be taken out to the electronic substrate and the laminated substrate for the electronic component, so that the surface on the opposite side can be obtained, and the laminated substrate and the component can be realized. The surface of the configuration is pivoted by the blocking edge of the laminated substrate for the phase piece. Further, according to the present invention, since the electron element is superior in terms of electrons, the element performance can be favorably maintained. The laminated substrate for a build-up substrate for an electronic component is described in the above-mentioned "A. FT FT component part, electric" item, and thus the description thereof is omitted here. Further, it is contained in the above-mentioned "B-electron-and-paper element portion. In the transparent sealing substrate, the method for manufacturing a laminated substrate for an electronic component according to the present invention is characterized in that at least the layer of the layered body of the metal layer is sequentially laminated, and the insulating layer forms an insulating step of the insulating layer through-hole; In the metal layer of the conductive layer, the metal layer of the insulating layer is disposed on the insulating layer through hole, and the metal layer is formed in the insulating layer. The step of forming the insulating layer through hole and the step of patterning the metal layer in the order of the column. The method for manufacturing the 70-layer laminated substrate for the electronic device is the above-mentioned "A. electronic component". A method of manufacturing a laminated substrate for an electronic component according to the first embodiment described in the item of the laminated substrate. A method of manufacturing a laminated substrate for an electronic component of the present invention will be described with reference to the drawings. Figs. 23(a) to (e) are process diagrams showing an example of a method of manufacturing a laminated substrate for an electronic component of the present invention. First, a metal layer phantom cell is prepared (Fig. 23(a) " formation of insulating layer % on metal layer S3 Fig. 23(b), laminated body preparation step). Next, a dry film resist is laminated on the insulating layer 2, and the insulating layer 2 is patterned by photolithography to form an insulating layer through hole 12h (Fig. 23 (4), insulating layer through hole forming step). At this time, the insulating layer 2 may be formed by lithographic light-weight polyimide or photosensitive polyimide precursor, and the insulating layer 2 may be patterned by photolithography to form the insulating layer through-holes 12h. Then, the metal layer 53 is plated as the power supply layer, and the second conductive portion 6 is filled in the insulating layer through hole 12h (Fig. 23(d), first conductive portion forming step). At this time, the first conductive portion 6 may be filled in the insulating layer through hole 12h by using a conductive paste. Next, a dry film resist is laminated on the metal layer 53, and the metal layer 33 is patterned by photolithography to simultaneously form the metal layer 3 having the opening portion 13h and the metal portion 8 for the conductive portion (FIG. 23(e), Metal layer patterning step). Thereby, the conduction portion 7 composed of the first conductive portion 6 and the metal portion 8 for the conduction portion can be obtained. Figs. 23(a) to (e) and Figs. 24(a) to (b) are process diagrams showing other examples of the method of manufacturing the laminated substrate for electronic components of the present invention. 23(e) and 24(a) are the same diagram. 23(a) to (e) have been omitted from the above. Next, 101111300 101 201248740 The coating layer 15 is filled in a portion other than the conductive portion metal portion 8 in the opening portion 13h of the metal layer 3 (Fig. 24(b)). Fig. 25 (a) to (e) are process diagrams showing other examples of the method of manufacturing the laminated substrate for electronic components of the present invention. Further, Fig. 25(a) is the same as Fig. 23(e). 23(a) to (e) have been omitted from the above. Next, the second insulating layer 4 is formed on the metal layer 3 (Fig. 25(b)' second insulating layer forming step). Next, a dry film photoresist is laminated on the second insulating layer 4, and the second insulating layer 4 is patterned by photolithography to form a second insulating layer through hole 14h (FIG. 25(c), second insulating layer through hole In the forming step, the second insulating layer 4 may be formed using a photosensitive polyimide or a photosensitive polyimide precursor, and the second insulating layer 4 may be patterned by photolithography to form a second insulating layer. The through hole 14h. The connector 'forms the metal film 55 on the entire surface of the second insulating layer 4 by electroless plating (Fig. 25(d)), and then laminates the dry film photoresist on the metal film 55 by photolithography. In the method, the metal film 55 is patterned to form the second conductive portion 1A of the second insulating layer through-hole Mh (FIG. 25(e), second conductive portion forming step). After electrolytic plating is performed on the entire surface of the second insulating layer to form a thin metal film, '(10) the metal film is electrolyzed as a power supply layer to form a second conductive portion. Further, the conductive paste is filled in the second insulating layer through hole 14h. The second portion 8 and the second conductive portion (4) are formed by the conductive portion 6 and the metal portion film 55 of the conductive portion (4)_卩7. In this case, the gold or the wiring is formed. The electrode 101111300 102 201248740 m to (g) can be simultaneously formed on the second insulating layer 4 to represent the production of the material substrate of the present invention, and the steps of the example are shown. First, the layers are sequentially stacked. And the three layers of the insulating layer 2 and the metal film 55 (Fig. 53). Next, the dry layer is laminated on the metal layer 53, and the 'layered body is pressed against the dry-type 溥祺 photoresist, and the ruthenium metal layer 53 is patterned. At the same time, all of the genus having the opening portion are formed: 3 and the metal guiding portion, (b), the metal layer pattern, and the % patterning (Fig. metal layer 53 and metal for double-sided SiC. Next, in the metal layer) 3% (4), the second insulating layer forming step). Next, ^: the edge layer V is a dry film 総, the _ 嶋 (10) layer 4 is = ^ the upper layer is the second insulating layer through hole 14h (Fig. 2_, The second animal, the shape step). At this time, it is also possible to form the second insulating layer 4 by using a photosensitive polyfluorene: a shell and a broad precursor, and patterning by the photolithography method, forming a second The insulating layer through hole 141 is then covered with the pattern of the metal film 55, and the insulating layer 2 is etched to form the insulating layer through hole 12h (Fig. 26(e), Layer through hole forming step) 5) In this case, since the pattern of the metal film 55 as a mask and etching, so that even with a non-photosensitive polyimide insulating layer 2 may also be patterned. Next, the metal film 55 is further patterned, and the electrode/wiring 5 is formed on the insulating layer 2 (Fig. 26 (7)). Next, the first conductive portion 6 and the second conductive portion 10 are filled in the insulating layer through hole 12h and the second insulating layer through hole 14h by using a conductive paste (FIG. 101111300 103 201248740 26(g), the first guide such as TT>; ? b 1

56、57(圖27(b))。其後，於此等金屬膜56、π上層合乾式薄膜光阻，藉由光刻法對兩面之金屬膜56、57進行圖案化，形成分別填充於絕緣層貫通孔12h及第2絕緣層貫通孔14h 的第1導通部6及第2導通部ι〇(圖27(c)，第1導通部形成步驟及第2導通部形成步驟）。此時，亦可藉無電解鍍覆於第2絕緣層4及金屬膜55之整面分別薄薄地形成金屬膜後，以此等金屬膜作為給電層進行電解，形成第1導通部6 及第2導通部1〇。藉此，可得到由第1導通部6與導通部用金屬部8與第2導通部1〇所構成的導通部7。此時，在上述金屬膜56、57之圖案化時，亦可同時於絕緣層2上形成電極或佈線、或於第2絕緣層4上形成佈線。如此，可得到電子元件用積層基板。根據本發明，由於在金屬層之圖案化的同時形成導通部用金屬部，故可縮短步驟。亦即，藉由對金屬層進行蝕刻，可同時進行金屬層之加工與導通部用金屬部的形成，而且可以 101111300 104 201248740 圖案化前之金屬層作為給電層而進行電解，故有製程簡便的優點。另外，在藉塗佈形成絕緣層或第2絕緣層時，可得到平坦性高之絕緣層及第2絕緣層。再者，在使用導電膏形成第1導通部或第2導通部時，可進一步縮短製程之步驟數。以下說明本發明之電子元件用積層基板之製造方法中的各步驟。 1.積層體準備步驟本發明之積層體準備步驟係準備至少使絕緣層及金屬層依序積層之積層體的步驟。積層體若為至少使絕緣層及金屬層依序積層者即可，例如可為如圖14(b)所示般使絕緣層2及金屬層53依序積層者，亦可為如圖17(a)所示般使金屬層53與絕緣層2與金屬膜 55依序積層者。在將絕緣層及金屬層進行積層時，例如可於金屬層上形成絕緣層，亦可於絕緣層上形成金屬層。在於金屬層上形成絕緣層的情況，作為絕緣層之形成方法，可使用例如於金屬層上塗佈塗佈液的方法、將金屬層與絕緣層薄膜經由接黏劑予以貼合的方法、將金屬層與絕緣層薄膜進行加熱壓黏的方法。其中，較佳為塗佈塗佈液的方法。此係由於可得到平滑性優越之絕緣層所致。在絕緣層含 101111300 105 201248740 有聚醯亞胺的情況，作為塗佈塗佈液的方法，可使用塗佈聚醯亞胺溶液或聚醯亞胺前驅物溶液的方法。特佳為塗佈聚醯亞胺前驅物溶液。此係由於聚醯亞胺一般較缺乏對溶媒的溶解性所致。又，對溶媒之溶解性高的聚醯亞胺，其耐熱性、線熱膨脹係數、吸濕膨脹係數等物性較差。作為塗佈方法，較佳為可得到平滑性良好之絕緣層的方法，可使用例如$疋塗法、模塗法、浸塗法 '棒塗法、凹版印刷法、網版印刷法等。在塗佈聚醯亞胺溶液或聚醯亞胺前驅物溶液時，藉由於塗佈後加熱至聚醯亞胺或聚醯亞胺前驅物之玻璃轉移溫度以上，則可提高膜之流動性、使平滑性良好。另外，例如藉由使用凹版印刷法、網版印刷法等之印刷法將上述絕緣層形成為圖案狀，則亦可同時進行後述之絕緣層貫通孔形成步驟。另外，在於絕緣層上形成金屬層的情況，作為金屬層之形成方法，可使用例如金屬喷敷法。在於上述絕緣層上藉金屬喷敷法设置金屬層時’其條件並無特別限定，可使用蒸鍵、濺鍍、鍍覆之任一種方法。又，亦可為將此等方法複數組合的方法。又，在積層體含有上述密黏層的情況，可使用首先係於上述絕緣層上藉濺鍍法等形成由無機材料所構成的密黏層後’於被黏層上藉蒸鐘法等形成上述金屬層的方法。又，亦可例如使用介隔遮罩將上述金屬材料予以蒸鑛之方 101111300 106 201248740 法等，將上述金屬層形成為圖案狀，屬層圖案化步驟。寻進仃後述之金另外，亦可事先在經圖案化之金屬層上於經圖案化之絕緣層上形成金屬層。、’、緣層，或可 . 帛且，關於絕緣層及金屬層’由於已記載於上、f「 •元件用積層基板」項目中，故於此省略其說明。4 A.電子又，關於三層材中之金屬膜，係可成為上述「。用積層基板」項目中所記載之第2 A.電子几件可成為電極、佈線等的層。屬層的層’具體而言為 2.絕緣層貫通孔形成步驟本::之絕緣層貫通孔形成步驟係於上絕緣層貝通孔的步驟，為於上述積層 θ上形成驟。備^驟後進行的步作為絕緣層貫通孔之形成方法，可使运以雷射等進行直接加工的方法。用印刷法、光刻法、為岁1丨、、十— 金屬層及絕緣層之積層體中夕 /’ ’可舉例如：在 Τ〈絕緣層上來由該圖案對絕緣層藉濕式蝕刻法 /战光阻圖案，沿著除光阻圖案的方法；對使金屬^ L式银刻去進行餘刻後，去优贪屬層與絕緣層與金屬膜 .積層體中之金屬膜進行圖案化，以該㈣作為㈣ . 層進彳了⑽後，去除金相之圖f的方法；使用感光性聚醯亞胺或感光性聚醯亞胺前驅物等之感光性樹脂組成物，於金屬層上直接形成絕緣層之圖案的方法《又，在塗佈聚醯亞胺 101111300 107 201248740 前驅物溶液的情況，可舉例如：在將屬於聚醯亞胺前驅物之聚醯胺酸於金屬層上進行製膜後，於聚醯胺酸膜上形成光阻層，藉光刻法形成光阻圖案，其後，以該圖案作為遮罩，將圖案開口部之聚醯胺酸膜去除後，去除光阻圖案，使聚醯胺酸進行醯亞胺化的方法；在上述光阻圖案之形成時，同時亦對聚醯胺酸膜進行顯影，其後，去除光阻圖案，使聚醯胺酸進行醯亞胺化的方法。作為印刷法，可例示使用了凹版印刷或可撓印刷、網版印刷、喷墨法等之公知的印刷技術的方法。尚且，關於絕緣層貫通孔，由於已記載於上述「A.電子元件用積層基板」項目中，故於此省略其說明。 3.金屬層圖案化步驟本發明中之金屬層圖案化步驟，係對上述金屬層進行圖案化，同時形成於上述絕緣層貫通孔上具有開口部之金屬層、與配置於上述絕緣層貫通孔上之導通部用金屬部的步驟，屬於在上述積層體準備步驟後進行的步驟。作為金屬層之圖案化方法，可使用光刻法、以雷射等進行直接加工的方法，或藉由經由金屬遮罩進行濺鍍或蒸鍍，而位置選擇性地形成金屬層的方法。作為光刻法，可舉例如在上述積層體之金屬層上層合乾式薄膜光阻，形成光阻圖案，沿著該圖案對金屬層進行触刻後，去除光阻圖案的方法。尚且，關於具有開口部之金屬層及導通部用金屬部，由於已記載於上述「A.電子元件用積層基板」項目中，故於此省 101111300 108 201248740 略其說明。刹順序進行絕緣層貫通孔形成步驟及金案化1 °例如可如圖14⑷〜㈤所示般於絕緣層貫通孔形成步驟後進行金屬層圖案化步驟，亦可如圖17⑷〜⑻ 驟所示般於金屬層圖案化步驟後進行絕緣層貫通孔形成步， 4.第1導通部形成步驟本發明中，係於上述絕緣層貫通孔形成步驟後’在上述金屬層圖案化步驟的前或後，進行於上述絕緣層貫通孔中填充第1導通部的第1導通部形成步驟。作為第1導通部的形成方法，可舉例如艘覆法、塗佈銀膏等之導電膏的方法、使用焊錫的方法等。作為鍍覆法，可為電鍍法或無電解鍛覆法。又，亦可組合無電解鐘覆法及電鍍法。例如，可在藉無t解㈣形成較薄之金屬膜後，於該較薄之金屬膜上實施電鍍。在電鍍時，可以金屬層作為給電層進行鍍覆，亦可H緣層或第 2絕緣層上形成金屬膜，以該金屬膜作為給電層而進行鍍覆。作為導電膏之塗佈方法，若為可將導衫填充於絕緣層貫通孔中之方法則無特別限定，可舉例如噴墨法、配量器法等。尚且，關於第1導通部，由於已記載於上述「九電子元件用積層基板」項目巾，故於此省略其說明。 5.第2絕緣層形成步驟本發明中，較佳係於上述金屬層圖案化步驟後，進行於上 101111300 109 201248740 述金屬層上形成第2絕緣層之第2絕緣層形成步驟。尚且，關於第2絕緣層之形成方法，由於與上述絕緣層之形成方法相同，故於此省略其說明。尚且，關於第2絕緣層，由於已記載於上述「A.電子元件用積層基板」項目中’故於此省略其說明。第2絕緣層形成步驟若於上述金屬層圖案化形成步驟後進行即可，可於上述絕緣層貫通孔形成步驟前進行，亦可於上述絕緣層貫通孔形成步驟後進行。又，第2絕緣層形成步驟可於上述第1導通部形成步驟前進行，亦可於上述第1 導通部形成步驟後進行。 6.第2絕緣層貫通孔形成步驟本發明中，較佳係於上述第2絕緣層形成步驟後，於上述絕緣層貫通孔形成步驟前、後或同時，進行於上述第2絕緣層上形成第2絕緣層貫通孔之第2絕緣層貫通孔形成步驟。尚且關於第2絕緣層貫通孔之形成方法，由於與上述絕緣層貫通孔之形成方法相同，故於此省略其說明。尚且，關於第2絕緣層貫通孔，由於已記载於上述「A. 電子元件用積層基板」項目中，故於此省略其說明。第2絕緣層貫通孔形成步驟若於上述第2絕緣層形成步驟後進行即可，可於上述絕緣層貫通孔形成步驟前進行，亦可於上述絕緣層貫通孔形成步驟後進行，或可與上述絕緣層貫通孔形成步驟同時進行。又，第2絕緣層貫通孔形成步驟可 101111300 110 201248740 於上述第1導通部形成步驟前進行，亦可於上述第1導通部形成步驟後進行。 7.第2導通部形成步驟本發明中，較佳係於上述第2絕緣層貫通孔形成步驟後，於上述第1導通部形成步驟前、後或同時，進行於上述第2 絕緣層貫通孔中填充第2導通部的第2導通部形成步驟。尚且，關於第2導通部之形成方法，由於與上述第ι導通部之形成方法相同，故於此省略其說明。尚且，關於第2導通部，由於已記载於上述「Α.電子元件用積層基板」項目中，故於此省略其說明。電子凡件，幻導通部形成步驟若於上述第2絕緣層貫通孔形成步驟後進灯即可’可於上述絕，緣層貫通孔形成步驟前進行，亦可於上述絕緣層貫通孔形成步驟後進行。又，第2導通部形成步驟可於上述第丨導通部形成步驟前進行，亦可於上述第ι 導通部形成步雜進行，或可與上述第ι導通部形成步驟同時進行。本發明並不限定於上述實施形態。上述實施形態僅為例不，具有與本發明申請專利範圍所記載之技術思想實質上相同之構成、且發揮相同作用效果者，均涵括於本發明之技術範圍中。 (實施例）以下針對本發明，使用實施例及比較例進行具體說明。 101111300 111 201248740 [製造例] 1.聚醯亞胺清漆（聚醯亞胺前驅物溶液)之調製 (1) 製造例1 將4,4’-二胺基二苯基醚(〇DA)4.0g(20mmol)與對伸笨基二胺(PPD)8.65g(80mmoi)投入至500ml的分離燒瓶中，使其溶解於200g之經脫水的N-曱基-2-吡咯啶酮(NMP)中，於氣氣流下’依藉油浴使液溫成為50°C之方式一邊以熱電偶進行監測並加熱、一邊予以攪拌。確認其等完全溶解後，於其中逐次少量地歷時30分鐘添加3,3’，4,4，-聯苯四羧酸二野 (BI>DA)29.1g(99mmol)，添加結束後，於5〇。(：攪拌5小時。其後冷卻至室溫’得到聚酿亞胺前驅物溶液1。 (2) 製造例2 除了依使反應溫度及溶液之濃度成為17重量％〜19重量％之方式調整ΝΜΡ量以外，其餘依與製造例丨相同之方法，依下表1所示調配比合成聚醯亞胺前驅物溶液2〜17。作為酸二酐’係使用3,3’，4,4’-聯苯四羧酸二酐(bpda)、焦蜜石酸二酐(PMDA)、對伸苯基雙苯偏三酸單酯酸二酐 (TAHQ)、對聯伸本基雙苯偏三酸單醋酸二針(βρτμε)。作為二胺，係使用4,4’-二胺基二苯基醚(〇dA)、對伸苯基二胺 (PPD)、I，4·雙(4_胺基笨氧基）苯(4ApB)、2，r_二曱基·4,4，_ 二胺基聯苯(TBHG)、2,2，-雙（三氟甲基)_4,4’-二胺基聯苯 (TFMB)之一種或二種。 101111300 112 201248740 【1^】反應溫度 rc) o o o 〇 in 淫丨1 添加量 (mmol) 〇 (N 1 Ο ο CN 100 o 00 yn 卜 Ο ο o (N o 100 L 100 〇 L 100 100 v〇 CN 種類 ODA 1 ODA 4APB TBHG | TBHG | I TBHG | 1 TFMB 1 TFMB 1 TFMB | TFMB TBHG I ODA | ODA ODA ODA ODA 筚 Ί 添加量 (mmol) 〇 00 100 I g 1 CS 1 § o 〇 1 1 1 1 in 1 種類 ____1 PPD PPD 1 PPD 1 | ODA | ODA 1 PPD PPD TBHG 1 1 PPD 1 1 丨PPD Ί 添加量 (mmol) OS 〇\ 〇\ σ\ OS 〇\ 〇\ C\ ON Ο G\ On C\ Os OS C\ On 〇\ Os 〇\ ON Os C\ ON ON Os 種類 BPDA BPDA BPDA BPDA BPDA BPDA BPDA BPDA BPDA BPDA BPDA PMDA PMDA PMDA BPTME o ffi ί o ί <N m 寸〇卜〇〇〇 m 寸 ν〇卜56, 57 (Fig. 27(b)). Thereafter, the metal film 56 and the π upper layer dry film photoresist are patterned by photolithography to form the metal films 56 and 57 on both sides, and are formed to be filled in the insulating layer through hole 12h and the second insulating layer, respectively. The first conductive portion 6 and the second conductive portion ι of the hole 14h (Fig. 27(c), the first conductive portion forming step and the second conductive portion forming step). In this case, the metal film can be formed thinly on the entire surface of the second insulating layer 4 and the metal film 55 by electroless plating, and then the metal film can be electrolyzed as the power supply layer to form the first conductive portion 6 and the first portion. 2 conduction part 1〇. Thereby, the conduction portion 7 composed of the first conduction portion 6 and the conduction portion metal portion 8 and the second conduction portion 1A can be obtained. At this time, in the patterning of the metal films 56 and 57, an electrode or a wiring may be formed on the insulating layer 2 or a wiring may be formed on the second insulating layer 4. Thus, a laminated substrate for an electronic component can be obtained. According to the invention, since the metal portion for the conduction portion is formed while patterning the metal layer, the step can be shortened. In other words, by etching the metal layer, the metal layer can be simultaneously processed and the metal portion for the conductive portion can be formed, and the metal layer before patterning can be electrolyzed as 101111300 104 201248740, so that the process is simple. advantage. Further, when the insulating layer or the second insulating layer is formed by coating, an insulating layer having high flatness and a second insulating layer can be obtained. Further, when the first conductive portion or the second conductive portion is formed by using the conductive paste, the number of steps of the process can be further shortened. Each step in the method for producing a laminated substrate for an electronic component of the present invention will be described below. 1. Laminate preparation step The laminate preparation step of the present invention is a step of preparing a laminate in which at least an insulating layer and a metal layer are sequentially laminated. The laminated body may be formed by sequentially laminating at least the insulating layer and the metal layer. For example, as shown in FIG. 14(b), the insulating layer 2 and the metal layer 53 may be sequentially laminated, or may be as shown in FIG. The metal layer 53 and the insulating layer 2 and the metal film 55 are sequentially laminated as shown in a). When the insulating layer and the metal layer are laminated, for example, an insulating layer may be formed on the metal layer, or a metal layer may be formed on the insulating layer. In the case where an insulating layer is formed on the metal layer, as a method of forming the insulating layer, for example, a method of applying a coating liquid on the metal layer, a method of bonding the metal layer and the insulating layer film via a bonding agent, or the like may be used. A method in which a metal layer and an insulating layer film are heat-pressed. Among them, a method of applying a coating liquid is preferred. This is due to the fact that an insulating layer with superior smoothness can be obtained. In the case where the insulating layer contains 101111300 105 201248740 in the presence of polyimine, as a method of applying the coating liquid, a method of coating a polyimide or a polyimide precursor solution can be used. Particularly preferred is a coating of a polyamidene precursor solution. This is due to the fact that polyimine is generally less soluble in the solvent. Further, the polyimide having high solubility in a solvent has poor physical properties such as heat resistance, linear thermal expansion coefficient, and hygroscopic expansion coefficient. As the coating method, a method of obtaining an insulating layer having good smoothness is preferable, and for example, a ruthenium coating method, a die coating method, a dip coating method, a bar coating method, a gravure printing method, a screen printing method, or the like can be used. When the polyimine solution or the polyimide precursor solution is coated, the fluidity of the film can be improved by heating to a glass transition temperature of the polyimide or the polyimide precursor after coating. Make the smoothness good. Further, for example, by forming the insulating layer into a pattern by a printing method such as a gravure printing method or a screen printing method, the insulating layer through hole forming step to be described later can be simultaneously performed. Further, in the case where a metal layer is formed on the insulating layer, as a method of forming the metal layer, for example, a metal spraying method can be used. When the metal layer is provided by the metal spraying method on the insulating layer, the condition is not particularly limited, and any of steaming, sputtering, and plating may be used. Further, a method of combining these methods in plural may be employed. Further, in the case where the laminate contains the above-mentioned dense layer, it is possible to form a dense layer made of an inorganic material by sputtering or the like on the insulating layer, and then form a vapor layer on the adherend layer. The method of the above metal layer. Further, for example, the metal layer may be subjected to vapor deposition by using a barrier mask, and the metal layer may be formed into a pattern, and the layer may be patterned. Searching for gold as described later Alternatively, a metal layer may be formed on the patterned insulating layer on the patterned metal layer in advance. In addition, since the insulating layer and the metal layer are described in the above, "the laminated substrate for components", the description thereof is omitted here. 4 A. Electron The metal film in the three-layer material can be a layer of the second A. electron described in the above-mentioned "Laminated substrate" item, and can be a layer such as an electrode or a wiring. The layer of the genus layer is specifically 2. The step of forming the through hole of the insulating layer. The step of forming the insulating layer through hole is a step of forming the through hole of the upper insulating layer to form a step on the above laminated layer θ. Steps to be performed after the preparation As a method of forming the through hole of the insulating layer, a method of directly processing by laser or the like can be employed. The printing method, the photolithography method, the laminated body of the aged metal layer, and the ten-metal layer and the insulating layer may be, for example, wet etching on the insulating layer by the pattern on the insulating layer. / War resist pattern, along the method of removing the photoresist pattern; after engraving the metal L-type silver, the metal film is patterned in the greedy layer and the insulating layer and the metal film. Taking (4) as (4). After removing the layer (10), the method of removing the metallographic figure f; using a photosensitive resin composition such as a photosensitive polyimide or a photosensitive polyimide precursor in the metal layer A method of directly forming a pattern of an insulating layer. Further, in the case of coating a precursor solution of a polyimine 101111300 107 201248740, for example, a polyamic acid belonging to a polyimide precursor is applied to a metal layer. After the film formation, a photoresist layer is formed on the polyamic acid film, and a photoresist pattern is formed by photolithography. Thereafter, the pattern is used as a mask, and the polyamic acid film in the opening portion of the pattern is removed. a photoresist pattern for carrying out hydrazylation of polylysine; When patterning the barrier, but also on polyamide acid film is developed, and thereafter, removing the resist pattern, a method of making polyamide acid of the acyl imine. As the printing method, a method using a known printing technique such as gravure printing, flexographic printing, screen printing, or inkjet method can be exemplified. In addition, the insulating layer through-holes are described in the above-mentioned "A. Multilayer substrate for electronic components", and thus the description thereof will be omitted. 3. Metal layer patterning step In the metal layer patterning step of the present invention, the metal layer is patterned, and a metal layer having an opening formed in the insulating layer through hole and a through hole disposed in the insulating layer are formed. The step of using the metal portion for the upper conductive portion belongs to the step performed after the above-described laminated body preparation step. As a method of patterning the metal layer, a method of directly processing by laser or a laser or a method of selectively forming a metal layer by sputtering or vapor deposition through a metal mask can be used. As the photolithography method, for example, a method of laminating a dry film resist on a metal layer of the laminate, forming a photoresist pattern, and etching the metal layer along the pattern to remove the photoresist pattern can be mentioned. Further, the metal layer having the opening portion and the metal portion for the conduction portion are described in the above-mentioned "A. Multilayer substrate for electronic components", and therefore, a description will be omitted hereby in the province of 101111300 108 201248740. The step of forming the insulating layer through-holes and the gold plating 1 ° can be performed, for example, as shown in FIGS. 14(4) to (5), after the insulating layer through-hole forming step, the metal layer patterning step is performed, as shown in FIGS. 17(4) to (8). The insulating layer through hole forming step is performed after the metal layer patterning step. 4. The first conductive portion forming step is in the present invention, after the insulating layer through hole forming step, 'before or after the metal layer patterning step And a first conductive portion forming step of filling the first conductive portion in the insulating layer through hole. The method of forming the first conductive portion may, for example, be a shipping method, a method of applying a conductive paste such as a silver paste, a method of using solder, or the like. As the plating method, it may be an electroplating method or an electroless forging method. Further, an electroless clock coating method and an electroplating method can be combined. For example, electroplating may be performed on the thinner metal film after forming a thinner metal film by the solution of (t). At the time of electroplating, a metal layer may be used as a plating layer, or a metal film may be formed on the H-edge layer or the second insulating layer, and the metal film may be plated as a power-feeding layer. The method of applying the conductive paste is not particularly limited as long as it can fill the insulating layer through-holes, and examples thereof include an inkjet method and a dispenser method. In addition, the first conductive portion is described in the above-mentioned "multilayer laminated substrate for electronic components", and thus the description thereof is omitted here. 5. Second insulating layer forming step In the present invention, preferably, after the metal layer patterning step, a second insulating layer forming step of forming a second insulating layer on the metal layer of the above 101111300 109 201248740 is performed. Further, the method of forming the second insulating layer is the same as the method of forming the insulating layer, and thus the description thereof will be omitted. In addition, the second insulating layer is described in the above-mentioned "A. Multilayer substrate for electronic components". Therefore, the description thereof is omitted here. The second insulating layer forming step may be performed after the metal layer patterning forming step, before the insulating layer through hole forming step, or after the insulating layer through hole forming step. Further, the second insulating layer forming step may be performed before the first conductive portion forming step, or may be performed after the first conductive portion forming step. 6. Second insulating layer through hole forming step In the present invention, preferably after the second insulating layer forming step, the insulating layer is formed on the second insulating layer before, after or simultaneously with the insulating layer through hole forming step. The second insulating layer through hole forming step of the second insulating layer through hole. Further, the method of forming the through hole of the second insulating layer is the same as the method of forming the through hole of the insulating layer, and thus the description thereof will be omitted. In addition, the second insulating layer through-hole is described in the above-mentioned "A. Multilayer substrate for electronic components", and thus the description thereof is omitted here. The second insulating layer through hole forming step may be performed after the second insulating layer forming step, and may be performed before the insulating layer through hole forming step, or after the insulating layer through hole forming step, or may be performed The insulating layer through hole forming step is simultaneously performed. Further, the second insulating layer through hole forming step 101111300 110 201248740 may be performed before the first conductive portion forming step, or may be performed after the first conductive portion forming step. 7. Second conductive portion forming step In the present invention, preferably after the second insulating layer through hole forming step, the second insulating layer through hole is formed before, after or after the first conductive portion forming step The second conductive portion forming step of filling the second conductive portion. Further, the method of forming the second conductive portion is the same as the method of forming the first conductive portion, and thus the description thereof will be omitted. In addition, the second conductive portion is described in the above-mentioned item "Laminated electronic substrate for electronic components", and thus the description thereof is omitted here. In the electronic component, the magic conduction portion forming step may be performed before the step of forming the second insulating layer through hole, and may be performed before the step of forming the insulating layer through hole, or after the step of forming the insulating layer through hole get on. Further, the second conductive portion forming step may be performed before the first conductive portion forming step, or may be performed in the first ι conductive portion forming step, or may be performed simultaneously with the first ι conductive portion forming step. The present invention is not limited to the above embodiment. The above-described embodiments are merely examples, and those having substantially the same configuration as the technical idea described in the claims of the present invention and exhibiting the same effects are included in the technical scope of the present invention. (Examples) Hereinafter, the present invention will be specifically described using examples and comparative examples. 101111300 111 201248740 [Production Example] 1. Preparation of Polyimine Epoxy Resin (Polyimide Precursor Solution) (1) Production Example 1 4,4'-Diaminodiphenyl ether (〇DA) 4.0 g (20 mmol) and stearyldiamine (PPD) 8.65 g (80 mmoi) were placed in a 500 ml separation flask and dissolved in 200 g of dehydrated N-mercapto-2-pyrrolidone (NMP). Under the gas flow, the temperature was changed to 50 ° C by means of an oil bath, and the mixture was stirred while being monitored by a thermocouple. After confirming that it was completely dissolved, 3,3',4,4,-biphenyltetracarboxylic acid dimer (BI >DA) 29.1 g (99 mmol) was added in small portions for 30 minutes, and after the addition, at 5 Hey. (: stirring for 5 hours. Thereafter, it was cooled to room temperature' to obtain a poly-imine precursor solution 1. (2) Production Example 2 In addition, the reaction temperature and the concentration of the solution were adjusted to be 17% by weight to 19% by weight. In addition to the amount, in the same manner as in the production example, the polypyridamine precursor solution 2 to 17 was prepared according to the ratio shown in Table 1 below. As the acid dianhydride, 3, 3', 4, 4'- was used. Biphenyltetracarboxylic dianhydride (bpda), pyromellitic dianhydride (PMDA), p-phenylene dicarboxylic acid monoester dianhydride (TAHQ), paired-stranded bis-dicarboxylic acid monoacetic acid Two needles (βρτμε). As a diamine, 4,4'-diaminodiphenyl ether (〇dA), p-phenylenediamine (PPD), I,4·bis (4-amino group) Oxy)benzene (4ApB), 2,r-dimercapto-4,4,-diaminobiphenyl (TBHG), 2,2,-bis(trifluoromethyl)-4,4'-diamino One or two of biphenyl (TFMB). 101111300 112 201248740 [1^] Reaction temperature rc) ooo 〇in Obscene 1 Addition amount (mmol) 〇(N 1 Ο ο CN 100 o 00 yn Ο Ο ο o (N o 100 L 100 〇L 100 100 v〇CN Category ODA 1 ODA 4APB TBHG TBHG | I TBHG | 1 TFMB 1 TFMB 1 TFMB | TFMB TBHG I ODA | ODA ODA ODA ODA 筚Ί Addition (mmol) 〇00 100 I g 1 CS 1 § o 〇1 1 1 1 in 1 Category ____1 PPD PPD 1 PPD 1 | ODA | ODA 1 PPD PPD TBHG 1 1 PPD 1 1 丨PPD Ί Addition (mmol) OS 〇\ 〇\ σ\ OS 〇\ 〇\ C\ ON Ο G\ On C\ Os OS C\ On 〇\ Os 〇\ ON Os C\ ON ON Os Type BPDA BPDA BPDA BPDA BPDA BPDA BPDA BPDA BPDA BPDA BPDA PMDA PMDA PMDA BPTME o ffi ί o ί <N m inch 〇卜〇〇〇m 〇ν〇卜

Ul 0GSHO1 201248740 (3)線熱膨脹係數及吸濕膨脹係數之評價將上述聚醯亞胺前驅物溶液1〜17塗佈於貼附在玻璃上的耐熱薄膜(UPILEX S 50S(宇部興產(股)製))上，於8(rc加熱板上乾燥10分鐘後，由耐熱薄膜予以剝離，得到膜厚 15μιη〜20μηι薄膜。其後，將該薄膜固定於金屬製框上，於氮環境下，依350°C進行熱處理1小時(升溫速度1〇。〇/分鐘’自然放冷）’得到膜厚9μηι〜15μηι之聚醯亞胺樹脂丨〜17 的薄膜。 (a) 線熱膨脹係數將藉上述手法所製作之薄膜切斷成寬5111111><長2〇mm，作成評價樣本。線熱膨脹係數係藉熱機械性分析裝置Therm〇 Plus TMA8310(Rigaku公司製)所測定。測定條件設為評價樣本之觀測長15mm、升溫速度10°C/min、使評價樣本之單位剖面積之加重成為相同的方式將拉伸加重設為 lg/25000〆，將100。(：〜20(TC之範圍的平均線熱膨脹係數作為線熱膨脹係數(C.T.E)。 (b) 濕度膨脹係數將藉上述手法所製作之薄膜切斷成寬5111111><長2〇mm，作成評價樣本。吸濕膨脹係數係藉濕度可變機械式分析裝置 Thermo Plus TMA8310(Rigaku&司製）所測定。將溫度固定為25°C，首先，於濕度15%RH環境下使樣本呈穩定狀態，將此狀態保持約3G分〜2小時後，將測定部位的濕度設為 101111300 114 201248740 20%RH，再使樣本依此狀態保持30分〜2小時直到其呈穩定。其後，使濕度變化成50%RH，將其呈穩定時之樣本^ 與在20%RH下呈就狀態時之樣本長縣、除以濕度變化 (此情況下為50 —20的30)，將該值再除以樣本長的值作為吸濕膨脹係數(C.H.E.)。此時，依使評價樣本之單位剖面積之加重成為相同的方式將拉伸加重設為lg/25〇〇〇^m2。 (c)基板曲翹評價於厚18μιη之SUS304-HTA羯（東洋精羯製）上，使用上述聚醯亞胺前驅物溶液1〜17，依使醯亞胺化後之膜厚為 10 μιη± 1 μm之方式，依與線熱膨脹係數評價之樣本作成相同的製程條件，形成聚醯亞胺樹脂卜17之聚醯亞胺膜。其後，將SUS304 .洛及聚醯亞胺膜之積層體切斷為寬1〇_χ長 50mm，作為基板曲翹評價用樣本。將此樣本的僅有樣本短邊單側藉Kapt〇n膠帶固定於板表面，以l〇0°C烘爐加熱1小時後，於加熱至100。(：之烘爐内’測定樣本之相反侧之短邊與sus板的距離。將此時之距離為0mm以上且〇.5mm以下的樣本判斷為〇，將超過 0.5mm且l.〇mm以下的樣本判斷為△，將超過i 〇mm的樣本判斷為X。同樣地將此樣本的僅有樣本短邊單側藉Kapton膠帶固定於sus板表面，於2rc、85%Rh之狀態的恒溫恒濕槽靜置 1小時後’測定樣本之相反側之短邊與板的距離◊將此 101111300 115 201248740 時之距離為0mm以上且0.5mm以下的樣本判斷為〇，將超過0.5mm且1.0mm以下的樣本判斷為△，將超過1.0mm的樣本判斷為X。此等評價結果示於表2。 101111300 116 201248740 【(N^】基板曲翹評價 85%Rh 〇〇 X 〇〇〇〇〇〇〇〇〇 <] X 〇〇〇 100°C 〇〇 X 〇 < 〇〇 X 〇〇〇〇 X 〇 X X 〇寸 00 in od 21.8 10.9 »r! 卜 od in ro ON 寸 cn vd 00 cn 20.4 21.6 o tn v〇卜 ON 線熱膨脹係數 (ppm/°C) 18.9 10.9 43.9 19.3 — 12.3 22.0 31.1 15.4 10.8 14.2 35.2 17.2 34.7 37.7 15.6 聚醯亞胺樹脂 CN m 寸 in 卜 00 ON o <N 寸卜 UI —uol 201248740 由於sus·狀㈣顿若聚醯亞胺膜與金屬H間之h為17ppm/c，故確認到 ^ , 線熱膨騰係數之差較大，則積層體的曲勉較大。另外，由表2可知，聚醯亞胺妝勝之吸濕膨脹係數越小，則高濕環境下之積層體的曲趣越小。 2.光鹼發生劑之合成 (光鹼發生劑1之合成）於氣環境下’在安裝了迪恩•史塔克裝置之·ml三口燒瓶中’將4,5-二曱氧基-2-硝基苯甲醛82g(39mm〇1)溶解於脫水2-丙醇100m卜加入異丙氧化鋁2 〇g〇〇mm〇i，〇 25% ) 並以105C進行加熱授拌7小時。隨著途中溶媒的蒸發減少’追加4次之2-丙醇40m卜以0.2N鹽酸15〇1111使反應停止後，藉氣仿進行萃取，將溶媒減壓餾除而得到6_硝基藜蘆醇7.2g。於氮環境下，在200ml三口燒瓶中，將6_硝基藜蘆醇 5.3g(25mmol)溶解於脫水二曱基乙醯胺觸ml並加入三乙基胺7.0ml(50mmo卜2.0eq)。於冰浴下，加入對确基笨基氣曱酸酯5.5g(27mmo卜l.leq)後’於室溫下攪拌16小時。將反應液注入至水2L中’過滤所生成之沉殿物後，藉梦膠管柱層析法進行精製’得到4,5-二曱氧基_2_硝基苄基_對硝基苯基碳酸醋6.4g。於氮環境下，在l〇〇ml三口燒瓶中，將4,5_二曱氧基 101111300 118 201248740 硝基苄基-對硝基苯基碳酸酯3.6g(9.5mmol)溶解於脫水二曱基乙酿胺50ml中’加入2,6-二曱基0底α定5ml(37mmol， 3.9eq)、1-經基苯并三β圭0.36g(0.3eq)並於90°C進行加熱擾拌18小時。將反應溶液注入至1%碳酸氫鈉水溶液il中，過濾所生成之沉澱物後，以水予以洗淨’得到下式所示之光鹼發生劑1Ν-{[(4,5-二曱氧基-2-硝基苄基）氧基]幾基卜2,6_ 二曱基旅°定2.7g。 [化9]Ul 0GSHO1 201248740 (3) Evaluation of coefficient of thermal expansion and coefficient of hygroscopic expansion The above-mentioned polyimine precursor solutions 1 to 17 were applied to a heat-resistant film attached to glass (UPILEX S 50S (Ube Industries, Ltd.) The film was dried on a rc hot plate for 10 minutes, and then peeled off from a heat-resistant film to obtain a film having a film thickness of 15 μm to 20 μm. Thereafter, the film was fixed on a metal frame under a nitrogen atmosphere. The heat treatment was carried out at 350 ° C for 1 hour (heating rate of 1 〇. 〇 / min 'naturally cooled) 'to obtain a film having a film thickness of 9 μm to 15 μm of polyimine resin 丨~17. (a) The coefficient of linear thermal expansion will be borrowed from the above method. The produced film was cut into a width of 5111111 <2 mm in length to prepare an evaluation sample. The linear thermal expansion coefficient was measured by Thermo Scientific Plus Ther〇Plus TMA8310 (manufactured by Rigaku Co., Ltd.). The measurement conditions were set as evaluation samples. The observation length is 15 mm, the temperature rise rate is 10 ° C/min, and the weight of the unit cross-sectional area of the evaluation sample is made the same. The tensile weight is set to lg/25000 〆, which is 100. (: 〜20 (the average line of the range of TC) Thermal expansion coefficient Coefficient (CTE) (b) Humidity expansion coefficient The film produced by the above method is cut into a width of 5111111 >< 2 mm in length to prepare an evaluation sample. The coefficient of hygroscopic expansion is a humidity-variable mechanical analyzer Thermo Plus TMA8310 (Rigaku & Seiko) measured. The temperature was fixed at 25 ° C, first, in a humidity of 15% RH environment to stabilize the sample, this state is maintained for about 3G minutes ~ 2 hours, the measurement site The humidity is set to 101111300 114 201248740 20%RH, and the sample is kept in this state for 30 minutes to 2 hours until it is stable. Thereafter, the humidity is changed to 50% RH, and the sample is stabilized at 20%. Under RH, the sample is in the state of the county, divided by the humidity change (in this case, 50-20 of 30), and the value is divided by the sample length as the hygroscopic expansion coefficient (CHE). The weighting of the unit cross-sectional area of the evaluation sample was made the same. The tensile weighting was set to lg/25 〇〇〇^m2. (c) The substrate curvature was evaluated on SUS304-HTA 厚 (made by Toyo Seiki) having a thickness of 18 μm. Using the above polyamidiamine precursor solution 1~17, depending on the imine After the film thickness is 10 μm η ± 1 μm, the same process conditions as those of the sample evaluated by the coefficient of thermal expansion of the wire are used to form a polyimide film of polyimine resin, and then SUS304. The laminate of the polyimide film was cut into a width of 1 〇 χ and a length of 50 mm, and was used as a sample for evaluation of the substrate. The sample-only short side of this sample was fixed to the surface of the plate by Kapt〇n tape on one side, and heated at 100 ° C for 1 hour in an oven at 0 ° C. (In the oven: 'Measure the distance between the short side of the opposite side of the sample and the sus plate. The sample with a distance of 0 mm or more and 〇.5 mm or less at this time is judged to be 〇, which will exceed 0.5 mm and be less than 0.5 mm. The sample is judged as △, and the sample exceeding i 〇 mm is judged as X. Similarly, only the short side of the sample is fastened to the surface of the sus plate by the Kapton tape on one side, and the temperature is constant at 2 rc and 85% Rh. After the wet bath was allowed to stand for 1 hour, the distance between the short side of the opposite side of the sample and the plate was measured. The sample with a distance of 0,111 mm or more and 0.5 mm or less at 101111300 115 201248740 was judged as 〇, and would exceed 0.5 mm and 1.0 mm or less. The sample was judged as Δ, and the sample exceeding 1.0 mm was judged as X. The results of these evaluations are shown in Table 2. 101111300 116 201248740 [(N^] Evaluation of the substrate curvature of 85% Rh 〇〇X 〇〇〇〇〇〇〇〇〇<] X 〇〇〇100°C 〇〇X 〇< 〇〇X 〇〇〇〇X 〇XX 〇 inch 00 in od 21.8 10.9 »r! 卜 in ro ON inch cn vd 00 cn 20.4 21.6 o tn v〇布 ON line thermal expansion coefficient (ppm/°C) 18.9 10.9 43.9 19.3 — 12.3 22. 0 31.1 15.4 10.8 14.2 35.2 17.2 34.7 37.7 15.6 Polyimine resin CN m inch in Bu 00 ON o <N inch Bu UI —uol 201248740 Because of sus shape (four) If the polyimide film and metal H between When it is 17 ppm/c, it is confirmed that the difference between the thermal expansion coefficient and the linear thermal expansion coefficient is large, and the curvature of the laminated body is large. In addition, as shown in Table 2, the smaller the hygroscopic expansion coefficient of the polyimine makeup, the smaller. The smaller the taste of the layered body in a high-humidity environment. 2. The synthesis of a photobase generator (synthesis of photobase generator 1) in a gas environment, in a three-neck flask equipped with a Dean Stark device Dissolve 4,5-dimethoxy-2-nitrobenzaldehyde 82g (39mm〇1) in dehydrated 2-propanol 100m, add isopropyl alumina 2 〇g〇〇mm〇i, 〇 25% And heating and mixing at 105C for 7 hours. With the evaporation of the solvent on the way to decrease 'Additional 4 times 2-propanol 40m to 0.2N hydrochloric acid 15〇1111 to stop the reaction, then extract by air imitation, reduce the solvent 6-nitroresveratrol 7.2 g was obtained by distillation, and 5.3 g (25 mmol) of 6-nitroresorcin was dissolved in dehydrated two in a 200 ml three-necked flask under nitrogen atmosphere. Group as acetamide and contact ml of triethylamine was added 7.0ml (50mmo BU 2.0eq). Under ice bath, 5.5 g (27 mmo of l.leq) was added to the base, and the mixture was stirred at room temperature for 16 hours. The reaction solution was poured into 2 L of water, 'filtered to form a sediment, and then refined by a dream hose column chromatography to obtain 4,5-dimethoxyoxy-2_nitrobenzyl-p-nitrophenyl. Carbonic acid vinegar 6.4g. 4,5-dimethoxy 101111300 118 201248740 nitrobenzyl-p-nitrophenyl carbonate 3.6 g (9.5 mmol) was dissolved in dehydrated dihydrazide in a 10 mL flask. Add 5,6-dimercapto[0,5,5,5,5,3,3,3,3,3,3,3,3,3,3,3,3,3 18 hours. The reaction solution was poured into a 1% aqueous solution of sodium hydrogencarbonate il, and the resulting precipitate was filtered and washed with water to obtain a photobase generator 1Ν-{[(4,5-dioxane) represented by the following formula. Benzyl-2-nitrobenzyl)oxy]methylidene 2,6-dihydryl group 2.7 g. [Chemistry 9]

(光驗發生劑2之合成）於氮環境下，在100ml三口燒瓶中，將鄰香豆酸(東亨化成工業（股）製)0.50g(3.1 mmol)溶解於脫水四羥基咳喃中，加入1-乙基-3-(3-二曱基胺基丙基)碳二醯亞胺鹽酸鹽 (東京化成工業（股）製)〇.59g(3.1mmol，l.Oeq)。於冰浴下，加入略啶（東京化成（股）製)0.3ml(31mm〇卜！〇eq)後，於室溫下攪拌—晚。濃縮反應液，藉氣仿進行萃取，以稀鹽酸、飽和碳酸氫鈉水溶液、食鹽水予以洗淨，並過濾，而得到 450mg之下式所示之光鹼發生劑2。 [化 10] 101111300 119 201248740(Synthesis of photoinitiator 2) 0.50 g (3.1 mmol) of o-coumaric acid (manufactured by Toshen Chemicals Co., Ltd.) was dissolved in dehydrated tetrahydroxy cough in a 100 ml three-necked flask under a nitrogen atmosphere. 1-ethyl-3-(3-didecylaminopropyl)carbodiimide hydrochloride (manufactured by Tokyo Chemical Industry Co., Ltd.) was added. 59 g (3.1 mmol, 1.0 eq). Under ice bath, 0.3 ml (31 mm !! 〇eq) of acridine (manufactured by Tokyo Chemical Industry Co., Ltd.) was added, and the mixture was stirred at room temperature until late. The reaction mixture was concentrated, extracted with a methylene chloride, washed with dilute hydrochloric acid, saturated aqueous sodium hydrogen carbonate and brine, and filtered to give 450 mg of the photobase generator 2 of the formula below. [化 10] 101111300 119 201248740

光鹼發生劑2 (光驗發生劑3之合成）於100ml燒瓶中，將碳酸鉀2.〇〇g加入至甲醇15ml中。於50ml燒瓶中，將乙氧基羰基甲基（三苯基）溴化磷 2.67g(6.2mmol)、2-羥基-4-甲氧基苯甲醛 945mg(6.2mmol) 溶解於曱醇10ml中，慢慢滴下至經充分攪拌的碳酸鉀溶液中。攪拌3小時後，藉Tlc確認到反應結束後進行過濾而去除碳酸鉀，予以減壓濃縮。濃縮後，加入1N之氫氧化鈉水溶液50ml並攪拌1小時。反應結束後，藉過濾去除三苯基氧化膦後，滴下濃鹽酸使反應液成為酸性。藉過濾收集沉澱物，以少量氯仿進行洗淨而得到2·羥基_‘甲氧基桂皮酸 l.〇〇g。接著，於100ml三口燒瓶中，將2_羥基冰曱氧基桂皮酸500mg(3.0mmol)溶解於脫水四羥基呋喃4〇ml中，加入 EDC0.586g(3.0mmol)«30 分鐘後，加入哌啶〇 3ml(3 〇mm〇i) 。反應結束後，將反應溶液濃縮，並溶解於水中。以二乙美醚萃取後’藉飽和碳酸氫納水溶液、鹽酸、飽和食鹽水予以洗淨。其後’藉石夕膠管柱層析法(展開溶媒：氣仿^醇 100/1〜10/1)進行精製，得到64mg之下式所示之光驗發生劑 3 ° [化 11] 101111300 120 201248740Photobase generator 2 (synthesis of photoinitiator 3) Potassium carbonate 2. 〇〇g was added to 15 ml of methanol in a 100 ml flask. In a 50 ml flask, 2.67 g (6.2 mmol) of ethoxycarbonylmethyl(triphenyl)phosphonium bromide and 945 mg (6.2 mmol) of 2-hydroxy-4-methoxybenzaldehyde were dissolved in 10 ml of decyl alcohol. Slowly drip into a well-stirred potassium carbonate solution. After stirring for 3 hours, it was confirmed by Tlc that after completion of the reaction, filtration was carried out to remove potassium carbonate, and the mixture was concentrated under reduced pressure. After concentration, 50 ml of a 1N aqueous sodium hydroxide solution was added and stirred for 1 hour. After completion of the reaction, the triphenylphosphine oxide was removed by filtration, and concentrated hydrochloric acid was added dropwise to make the reaction solution acidic. The precipitate was collected by filtration and washed with a small amount of chloroform to give 2· hydroxy _ methoxy cinnamic acid l. Next, 500 mg (3.0 mmol) of 2-hydroxyhasyloxycinnamic acid was dissolved in 4 ml of dehydrated tetrahydroxyfuran in a 100 ml three-necked flask, and EDC 0.586 g (3.0 mmol) was added for 30 minutes, and piperidine was added thereto. 〇 3ml (3 〇mm〇i). After the reaction was completed, the reaction solution was concentrated and dissolved in water. After extraction with dimethacrylate, it was washed with a saturated aqueous solution of sodium hydrogencarbonate, hydrochloric acid and saturated brine. Thereafter, the product was purified by a silica gel column chromatography method (developing solvent: gas-like alcohol 100/1 to 10/1) to obtain 64 mg of the photodetecting agent represented by the following formula: 3 ° 101111300 120 201248740

光驗發生劑3 (光驗發生劑4之合成）光鹼發生劑3之合成中，除了取代哌啶而使用環己基胺以外，其餘與光鹼發生劑3之合成相同地進行，得到80mg之下式所示的光鹼發生劑4。 [化 12]Photodetector 3 (synthesis of photoinitiator 4) In the synthesis of photobase generator 3, except that cyclohexylamine was used instead of piperidine, the same reaction as the synthesis of photobase generator 3 was carried out to obtain 80 mg. The photobase generator 4 shown by the following formula. [化 12]

光驗發生劑4 ΝΌ (光驗發生劑5之合成）光鹼發生劑3之合成中，除了取代2-羥基-4-曱氧基苯甲醛而使用1-羥基-2-萘曱醛以外，其餘與光鹼發生劑3之合成相同地進行，得到75mg之下式所示的光鹼發生劑5。 [化 13]Photodetector 4 ΝΌ (Synthesis of photodetector 5) In the synthesis of photobase generator 3, in addition to 1-hydroxy-2-naphthylfurfural instead of 2-hydroxy-4-nonyloxybenzaldehyde, The rest was carried out in the same manner as the synthesis of the photobase generator 3, and 75 mg of the photobase generator 5 represented by the following formula was obtained. [Chem. 13]

光驗發生劑5 (光驗發生劑6之合成）光鹼發生劑3之合成中，除了取代2-羥基_4_曱氧基苯甲醛而使用2-羥基-1-萘曱醛以外，其餘與光鹼發生劑3之合成相同地進行，得到90mg之下式所示的光鹼發生劑6。 [化 14] 101111300 121 201248740Photodetector 5 (synthesis of photoinitiator 6) In the synthesis of photobase generator 3, in addition to 2-hydroxy-1-naphthaldehyde, 2-hydroxy-1-naphthaldehyde is used instead of 2-hydroxy-4-indolylbenzaldehyde. In the same manner as the synthesis of the photobase generator 3, 90 mg of the photobase generator 6 represented by the following formula was obtained. [化14] 101111300 121 201248740

光鹼發生劑6 [光鹼發生劑之評價] 針對所合成之光驗發生劑1〜6，進行以下測定、評價。將莫耳吸光係數及鹼發生能力的結果示於表3。又，表3中，所謂光反應率係指經光反應之莫耳數相對於所使用之驗發生劑莫耳數的百分比率。又，將5%重量減少溫度的結果示於表4。 (!)莫耳吸光係數將鹼發生劑1〜6分別依lx10_4mol/L之濃度溶解於乙猜中’於石英槽（光路經長10mm)充滿溶液，測定吸光度。又，莫耳吸光係數ε係將溶液之吸光度除以吸收層厚度與溶質之莫耳濃度而得的值(L/(mol · cm))。 (2)光反應率評價針對驗發生劑1〜6 ’分別準備3個lmg試料，分別於石英製NMR管中溶解於重氫乙醇中。遮阻350nm以下之波長之光，使用使i射線穿透20%之濾光器與高壓水銀燈，於一根依2J/cm2進行光照射，於另一根依20J/cm2進行光照射。剩下一根未進行光照射。測定各樣本之1HNMR ’求得光反應之比例。尚且，關於光反應率，係由NMR ’對驗發生劑與光反應生成物進行定量，由其比例藉下式算出光反應率(°/〇)。 101111300 122 201248740 光反應率=光反應生成物量/(未分解之鹼發生劑量+光反應生成物量）xl〇〇 [表3] 莫耳吸光係數光反應率評價 s(365nm) e(405nm) 2J/cm2 20J/cm2 光鹼發生劑1 4820 290 0 7 光鹼發生劑2 110 0 6 22 光驗發生劑3 260 40 23 90 光驗發生劑4 30 0 7 33 光鹼發生劑5 7700 240 10 58 光驗發生劑6 5780 0 51 95 由表3可知，鹼發生劑1〜6係確認到因20J/cm2照射而進行光反應，故對i射線具有感度。鹼發生劑1係於2 J/cm2 之照射下未確認到鹼發生。光鹼發生劑6則顯示最高的感度，而且光驗發生劑3之感度亦較高。 (2)熱重量測定為了對鹼發生劑1〜6及Nifedipine(東京化成製）之耐熱性進行評價，分別以其30°C時之重量作為基準，依升溫速度 10°C/min之條件進行熱重量測定。結果示於表4。 [表4] 重量減少溫度（°c) 重量減少率（％) 5% 50% 300°C 光驗發生劑1 249 295 63 光驗發生劑2 199 247 98 光鹼發生劑3 208 233 87 光驗發生劑4 205 237 78 光驗發生劑5 191 244 71 光驗發生劑6 199 255 98 Nifedipine 255 292 69 (調製例1) 101111300 123 201248740 於上述聚醯亞胺前驅物溶液1中添加溶液之固形份之15 重量％的光驗發生劑1，作成感光性聚醯亞胺樹脂組成物1。 (調製例2) 於上述聚醯亞胺前驅物溶液1中添加溶液之固形份之10 重量％的光驗發生劑3，作成感光性聚醯亞胺樹脂組成物2。 (調製例3) 於上述聚醯亞胺前驅物溶液11中添加溶液之固形份之15 重量％的光驗發生劑3，作成感光性聚醯亞胺樹脂組成物3。 (調製例4) 於上述聚醯亞胺前驅物溶液11中添加溶液之固形份之15 重量％的光驗發生劑1，作成感光性聚醯亞胺樹脂組成物4。 (調製例5) 於上述聚醯亞胺前驅物溶液11中添加溶液之固形份之15 重量％的光驗發生劑2，作成感光性聚醯亞胺樹脂組成物5。 (調製例6) 於上述聚醯亞胺前驅物溶液11中添加溶液之固形份之15 重量％的光驗發生劑4，作成感光性聚醯亞胺樹脂組成物6。 (調製例7) 於上述聚醯亞胺前驅物溶液11中添加溶液之固形份之15 重量％的光驗發生劑5，作成感光性聚醯亞胺樹脂組成物7。 (調製例8) 於上述聚醯亞胺前驅物溶液11中添加溶液之固形份之15 101111300 124 201248740 重:M：°/。的光驗發生劑6’作成感光性聚酿亞胺樹脂組成物g。 (調製例9) 於上述聚醯亞胺前驅物溶液11中添加溶液之固形份之3〇重量％的Nifedipine(東京化成製），作成感光性聚醯亞胺樹脂組成物9。 3.感光性樹脂組成物之評價：圖案形成能力評價將調製例中所調製之感光性聚醯亞胺樹脂組成物1及感光性^^醯亞胺樹脂組成物2，分別於經錢絡之玻璃上依最終膜厚成為4μιη的方式進行旋塗，於80。(：之加熱板上乾燥15 分鐘，製作感光性聚醯亞胺樹脂組成物1及感光性聚醯亞胺樹脂組成物2的塗膜。經由光罩使用手動曝光機，藉高壓水銀燈，圖案狀地對感光性聚醯亞胺樹脂組成物丨之塗膜進行 2000mJ/cm2之曝光’對感光性聚醯亞胺樹脂組成物2之塗膜進行100mJ/cm2之曝光。其後，針對各別的塗膜依進行加熱10分鐘。針對各別的塗膜，將其浸潰於使四曱基氫氧化敍2.38重量％水溶液與異丙醇依9:丨混合的溶液中。其結果，可得到曝光部未溶解於顯影液中而殘存的圖案。再者，將其依 350 C加熱1小時而進行醯亞胺化。可知如此藉由使用上述感光性聚醯亞胺樹脂組成物1及2，則可形成良好的圖案。將調製例中所調製之感光性聚醯亞胺樹脂組成物3〜8，分別於經鍍鉻之玻璃上依最終膜厚成為4μιη的方式進行旋 101111300 125 201248740 塗，於100°c之加熱板上乾燥15分鐘’製作感光性聚醯亞胺樹脂組成物3〜8的塗膜。經由光罩使用手動曝光機，藉高壓水銀燈，圖案狀地對感光性聚醯亞胺樹脂組成物3之塗膜進行80mJ/cm2之曝光，對感光性聚醯亞胺樹脂組成物4之塗膜進行1500mJ/cm2之曝光，對感光性聚醯亞胺樹脂組成物5之塗膜進行5〇〇mJ/cm2之曝光，對感光性聚醯亞胺樹脂組成物6之塗膜進行4〇〇mJ/cm2之曝光，對感光性聚醯亞胺樹脂組成物7之塗膜進行200mJ/cm2之曝光，對感光性聚醯亞胺樹脂組成物8之塗膜進行80mJ/cm2之曝光。其後，針對各別的塗膜依17(TC進行加熱10分鐘。針對各別的塗膜，將其浸潰於使四曱基氫氧化銨2.38重量％水溶液與異丙醇依8 : 2混合的溶液中。其結果，可得到曝光部未溶解於顯影液中而殘存的圖案。 4 ·線熱膨脹係數及吸濕膨脹係數之評價將上述感光性聚醯亞胺樹脂組成物1、2及3塗佈於貼附在玻場上的耐熱薄膜(UPILEX S 50S(宇部興產（股)製))上，於1〇〇C加熱板上乾燥10分鐘後，藉高壓水銀燈依365nm 波長之照度換算計為2〇〇〇mJ/cm2進行曝光後，於加熱板上依170C加熱10分鐘後，由耐熱薄膜予以剝離，得到膜厚 1〇μιη的薄膜。其後，將該薄蘭定於金屬製框上，於氣環埏下’依350°c進行熱處理1小時(升溫速度1(TC/分鐘，自然放冷）’得到膜厚6μιη之感光性聚醯亞胺1、感光性聚醯 101111300 126 201248740 亞胺2及感光性聚醯亞胺3的薄膜。與上述記載之方法同樣地進行線熱膨脹係數、吸濕膨脹係數、基板曲輕評價。結果示於表5。 [表5] 感光性聚醯亞胺樹脂組成物線熱膨脹係數 (ppm/°C) 吸濕膨脹係數 (ppm/%RH) 基板曲翹評價 100°C 85%Rh 1 26.1 16.0 △ Δ 2 22.1 13.0 〇〇 3 15.5 8.9 〇〇如表5所示，由於SUS304箔之線熱膨脹係數為 17ppm/°C，故確認到若聚醯亞胺膜與金屬箔間之線熱膨服係數之差較大，則積層體的曲赵較大。另外，由表5可知’聚醯亞胺膜之吸濕膨脹係數越小，則高濕環境下之積層體的曲翹越小。 5.洩氣試驗將調製例中所調製之感光性聚醯亞胺樹脂組成物3及感光性聚醯亞胺樹脂組成物4，分別於玻璃上依最終膜厚成為 ΙΟμιη的方式進行旋塗，於100°C之加熱板上乾燥15分鐘，製作感光性聚醯亞胺樹脂組成物3、感光性聚醯亞胺樹脂組成物4的塗膜。經由光罩使用手動曝光機，藉高壓水銀燈，對感光性聚醢亞胺樹脂組成物3進行500mJ/cm2之曝光，對感光性聚醯亞胺樹脂組成物4進行2000mJ/cm2之曝光。其後，針對各別的塗膜依170°C進行加熱10分鐘。對各別的塗膜依350°C加熱1小時而進行醯亞胺化，得到茂氣測定樣 101111300 127 201248740 本1及2。另外，將聚醯亞胺前驅物溶液η，於玻璃上依最終膜厚成為ΙΟμιη之方式進行旋塗，於i〇〇〇c之加熱板上乾燥15 为知，製作聚酿亞胺溶液11的塗膜。對各別的塗膜依35〇乞加熱1小時而進行醯亞胺化，得到洩氣測定樣本3。將調製例9中所調製之感光性聚醯亞胺樹脂組成物9，於玻璃上依最終膜厚成為l〇pm的方式進行旋塗’於1〇〇〇C之加熱板上乾燥15分鐘，製作比較感光性聚醯亞胺樹脂組成物1的塗膜。經由光罩使用手動曝光機，藉高壓水銀燈進行 1000mJ/cm2之曝光。其後，依185它進行加熱1〇分鐘後，依350°C加熱1小時而進行醯亞胺化，得到洩氣測定樣本將UR-5100FX(Toray製），於玻璃上依最終膜厚成為ι〇μιη 的方式進行旋塗，於95。(：之加熱板上乾燥8分鐘，製作 UR-5100FX的塗膜。經由光罩使用手動曝光機，藉高壓水銀燈進行70mJ/cm2之曝光。其後，依8(TC進行加熱1分鐘後，依140°C加熱30分鐘、350t：加熱1小時而進行醢亞胺化，得到洩氣測定樣本5。將XP-1530(HD Microsystem製）’於玻璃上依最終膜厚成為ΙΟμιη的方式進行旋塗，於7〇°C之加熱板上乾燥2分鐘，並於85°C之加熱板上乾燥2分鐘，製作XP-1530的塗膜。經由光罩使用手動曝光機，藉高壓水銀燈進行300mJ/cm2之曝光。其後’依105°C進行加熱1分鐘後，依200°C加熱30分 101111300 128 201248740 鐘、350 C加熱1小時而進行醯亞胺化，得到泡氣測定樣本6。 —針對所製作之成氣測定樣本卜6，由玻璃上削取樣本，於氮環境下’依升溫速度10°c/min上升S 1〇〇t>c後依⑽。C 加熱60分鐘後，於氮環境下放冷15分鐘以上後，進行在將依升溫速度lG°C/min進行測定時之放冷後重量作為基準時的5%重量減少溫度的測定。結果示於表6。 [表6] 洩氣測樣本Photobase generator 6 [Evaluation of photobase generator] The following measurement and evaluation were carried out for the synthesized photodetectors 1 to 6. The results of the molar absorption coefficient and the alkali generating ability are shown in Table 3. Further, in Table 3, the photoreaction rate means the percentage ratio of the number of moles of the photoreaction to the number of moles of the test agent to be used. Further, the results of the 5% weight reduction temperature are shown in Table 4. (!) More Absorbance Coefficient The alkali generators 1 to 6 were dissolved in a concentration of lx10_4 mol/L in a mixture. The solution was filled in a quartz bath (light path length 10 mm), and the absorbance was measured. Further, the Molar Absorption Coefficient ε is a value obtained by dividing the absorbance of the solution by the thickness of the absorption layer and the molar concentration of the solute (L/(mol · cm)). (2) Evaluation of photoreaction rate Three lmg samples were prepared for each of the test reagents 1 to 6', and dissolved in dihydrogen ethanol in a quartz NMR tube. Light having a wavelength of 350 nm or less is blocked, and a light filter that penetrates 20% of i-rays and a high-pressure mercury lamp are used, and one light is irradiated at 2 J/cm 2 and the other light is irradiated at 20 J/cm 2 . The remaining one is not illuminated. The ratio of the photoreaction was determined by 1H NMR of each sample. Further, regarding the photoreaction rate, the photoreaction product and the photoreaction product were quantified by NMR, and the photoreaction rate (°/〇) was calculated from the ratio by the following formula. 101111300 122 201248740 Photoreaction rate = amount of photoreaction product / (undecomposed base generation dose + photoreaction product amount) xl 〇〇 [Table 3] More absorption coefficient Photoreaction rate evaluation s (365 nm) e (405 nm) 2J/ Cm2 20J/cm2 photobase generator 1 4820 290 0 7 photobase generator 2 110 0 6 22 photoinitiator 3 260 40 23 90 photoinitiator 4 30 0 7 33 photobase generator 5 7700 240 10 58 light The test reagent 6 5780 0 51 95 It can be seen from Table 3 that the alkali generators 1 to 6 have been confirmed to have a photoreaction by irradiation of 20 J/cm 2 , so that they have sensitivity to i rays. In the alkali generator 1, it was not confirmed that alkali occurred under irradiation of 2 J/cm 2 . The photobase generator 6 showed the highest sensitivity, and the sensitivity of the photodetector 3 was also high. (2) Thermogravimetric measurement In order to evaluate the heat resistance of the alkali generators 1 to 6 and Nifedipine (manufactured by Tokyo Chemical Industry Co., Ltd.), the temperature was measured at a temperature rise rate of 10 ° C/min based on the weight at 30 ° C. Thermogravimetric determination. The results are shown in Table 4. [Table 4] Weight reduction temperature (°c) Weight reduction rate (%) 5% 50% 300°C Photoinitiator 1 249 295 63 Photodetector 2 199 247 98 Photobase generator 3 208 233 87 Photo test Incident 4 205 237 78 Photoinitiator 5 191 244 71 Photoinitiator 6 199 255 98 Nifedipine 255 292 69 (Preparation Example 1) 101111300 123 201248740 Adding a solid solution of the solution to the above polyimine precursor solution 1 15% by weight of the photoinitiator 1 was used to prepare a photosensitive polyimide resin composition 1. (Preparation Example 2) A photopolymerization agent 3 of 10% by weight of a solid portion of the solution was added to the above polyimide intermediate solution 1 to prepare a photosensitive polyimide resin composition 2. (Preparation Example 3) A photopolymerization agent 3 of 15% by weight of a solid portion of the solution was added to the polyimide intermediate precursor solution 11 to prepare a photosensitive polyimide resin composition 3. (Preparation Example 4) A photopolymerization agent 1 of 15% by weight of a solid portion of the solution was added to the polyimine precursor solution 11 to prepare a photosensitive polyimide resin composition 4. (Preparation Example 5) A photopolymerization agent 2 of 15% by weight of a solid portion of the solution was added to the polyimide intermediate precursor solution 11 to prepare a photosensitive polyimide resin composition 5. (Preparation Example 6) A photopolymerization agent 4 of 15% by weight of a solid portion of the solution was added to the polyimide intermediate precursor solution 11 to prepare a photosensitive polyimide resin composition 6. (Preparation Example 7) A photopolymerization agent 5 of 15% by weight of a solid portion of the solution was added to the polyimide intermediate precursor solution 11 to prepare a photosensitive polyimide resin composition 7. (Preparation Example 8) A solid portion of the solution was added to the above polyimine precursor solution 11 10 101111300 124 201248740 Weight: M: ° /. The photodetecting agent 6' was used to form a photosensitive polyimide resin composition g. (Preparation Example 9) Nifedipine (manufactured by Tokyo Chemical Industry Co., Ltd.) was added to the above-mentioned polyimine precursor solution 11 in an amount of 3% by weight of the solid content of the solution to prepare a photosensitive polyimide pigment composition 9. 3. Evaluation of photosensitive resin composition: evaluation of pattern forming ability The photosensitive polyimide composition 1 and the photosensitive composition 2 prepared in the preparation example were respectively subjected to Qianluo The glass was spin-coated at a final film thickness of 4 μm, at 80°. (: The hot plate was dried for 15 minutes to prepare a coating film of the photosensitive polyimide film composition 1 and the photosensitive polyimide film composition 2. The manual exposure machine was used through a photomask, and a high-pressure mercury lamp was used. The coating film of the photosensitive polyimide resin composition 进行 was exposed at 2000 mJ/cm 2 'The coating film of the photosensitive polyimide varnish composition 2 was exposed to 100 mJ/cm 2 . Thereafter, for each of the films The coating film was heated for 10 minutes. For each of the coating films, it was immersed in a solution in which a tetrazolium hydroxide aqueous solution of 2.38 wt% and isopropyl alcohol 9: hydrazine were mixed. As a result, exposure was obtained. The pattern which remained in the developing solution was not dissolved in the developing solution. Further, it was imidated by heating at 350 C for 1 hour. It is understood that by using the above-mentioned photosensitive polyimide resin compositions 1 and 2, The photosensitive polyimine resin compositions 3 to 8 prepared in the preparation example were respectively coated on a chrome-plated glass so that the final film thickness became 4 μm, and the coating was applied to the film 101111300 125 201248740. Drying on a hot plate of °c 15 The film of the photosensitive polyimine resin composition 3 to 8 was produced by a clock. The coating film of the photosensitive polyimide resin composition 3 was patterned in a pattern by a high-pressure mercury lamp through a photomask. /cm2 exposure, the coating film of the photosensitive polyimide resin composition 4 was exposed at 1500 mJ/cm2, and the coating film of the photosensitive polyimide resin composition 5 was exposed to 5 〇〇mJ/cm2. The coating film of the photosensitive polyimide resin composition 6 was exposed to 4 μm/cm 2 , and the coating film of the photosensitive polyimide resin composition 7 was exposed to 200 mJ/cm 2 for photosensitive polycondensation. The coating film of the imine resin composition 8 was exposed to 80 mJ/cm 2 , and then the film was heated for 10 minutes for each of the coating films. For each of the coating films, the film was impregnated with a tetradecyl group. A 2.38 wt% aqueous solution of ammonium hydroxide and a solution of isopropyl alcohol in a ratio of 8:2 were obtained. As a result, a pattern in which the exposed portion was not dissolved in the developer was obtained. 4 · Evaluation of linear thermal expansion coefficient and hygroscopic expansion coefficient Applying the above-mentioned photosensitive polyimide resin compositions 1, 2, and 3 to the attached The heat-resistant film on the glass field (UPILEX S 50S (manufactured by Ube Industries, Ltd.)) was dried on a 1 °C hot plate for 10 minutes, and the high-pressure mercury lamp was converted to 2 〇〇〇 according to the illuminance at 365 nm wavelength. After exposure to mJ/cm2, it was heated on a hot plate at 170 C for 10 minutes, and then peeled off from a heat-resistant film to obtain a film having a film thickness of 1 μm. Thereafter, the thin blue was set on a metal frame to be in a gas ring.埏下' heat treatment at 350 ° C for 1 hour (heating rate 1 (TC / min, natural cooling)" to obtain a film thickness of 6 μηη photosensitive polyimide 1、 1, photosensitive poly 醯 101111300 126 201248740 imine 2 and sensitization A film of polyimine 3 . The coefficient of linear thermal expansion, the coefficient of hygroscopic expansion, and the evaluation of the substrate curvature were carried out in the same manner as in the above-described method. The results are shown in Table 5. [Table 5] Photosensitive Polyimine Resin Composition Linear Thermal Expansion Coefficient (ppm/°C) Hygroscopic Expansion Coefficient (ppm/%RH) Evaluation of substrate warpage 100°C 85% Rh 1 26.1 16.0 Δ Δ 2 22.1 13.0 〇〇3 15.5 8.9 As shown in Table 5, since the thermal expansion coefficient of the SUS304 foil is 17 ppm/°C, it is confirmed that if the difference between the thermal expansion coefficient of the polyimine film and the metal foil is large, Then the curved body of the laminated body is larger. Further, as is clear from Table 5, the smaller the hygroscopic expansion coefficient of the polyimine film, the smaller the warp of the laminate in a high-humidity environment. 5. Deflating test The photosensitive polyimine resin composition 3 and the photosensitive polyimide resin composition 4 prepared in the preparation example were each spin-coated on the glass so that the final film thickness became ΙΟμηη. The film was dried on a hot plate at 100 ° C for 15 minutes to prepare a coating film of the photosensitive polyimide film composition 3 and the photosensitive polyimide film composition 4. The photosensitive polyimide resin composition 3 was exposed to 500 mJ/cm 2 by a high-pressure mercury lamp using a manual exposure machine through a photomask, and the photosensitive polyimide resin composition 4 was exposed at 2000 mJ/cm 2 . Thereafter, the respective coating films were heated at 170 ° C for 10 minutes. Each of the coating films was heated at 350 ° C for 1 hour to carry out oxime imidization to obtain a pulverization sample 101111300 127 201248740 s 1 and 2. Further, the polyiminoimine precursor solution η is spin-coated on the glass so that the final film thickness becomes ΙΟμηη, and dried on a hot plate of i〇〇〇c. Coating film. Each of the coating films was subjected to hydrazine imidization by heating at 35 Torr for 1 hour to obtain a bleed measurement sample 3. The photosensitive polyimine resin composition 9 prepared in Preparation Example 9 was spin-coated on a glass plate of 1 〇〇〇C for 15 minutes on the glass so that the final film thickness became l〇pm. A coating film of the photosensitive polyimide composition 1 was prepared. Exposure was performed at 1000 mJ/cm2 by a high pressure mercury lamp using a manual exposure machine through a photomask. Thereafter, it was heated at 185 for 1 minute, and then heated at 350 ° C for 1 hour to carry out hydrazine imidization to obtain a bleed measurement sample. UR-5100FX (manufactured by Toray) was formed on the glass according to the final film thickness. Spin coating at μιη, at 95. (: The hot plate was dried for 8 minutes to prepare a coating film of UR-5100FX. The exposure was performed by a high-pressure mercury lamp through a photomask using a manual exposure machine. After that, it was heated by 1 (TC for 1 minute). After heating at 140 ° C for 30 minutes and 350 °: heating for 1 hour, the oxime imidization was carried out to obtain a bleed measurement sample 5. XP-1530 (manufactured by HD Microsystem) was spin-coated on the glass so that the final film thickness became ΙΟμηη. Drying on a hot plate at 7 ° C for 2 minutes, and drying on a hot plate at 85 ° C for 2 minutes to prepare a coating film of XP-1530. Using a manual exposure machine through a photomask, 300 mJ/cm 2 was performed by a high pressure mercury lamp. After exposure, the temperature was heated at 105 ° C for 1 minute, and then heated at 200 ° C for 30 minutes 101111300 128 201248740 clocks and 350 C for 1 hour to carry out hydrazine imidization to obtain a bubble gas measurement sample 6. - For the production The gas sample was measured, and the sample was cut by glass. Under the nitrogen atmosphere, the temperature was increased by 10 °c/min. S 1〇〇t>c was followed by (10). After heating for 60 minutes, it was placed under nitrogen. After cooling for more than 15 minutes, the temperature will be increased at a rate of 1 G ° C/min. The weight loss after cooling was measured as a basis for the measurement of the 5% weight loss temperature. The results are shown in Table 6. [Table 6] Leak test sample

-------1_____件 — 如表6所不，使用了光鹼發生劑之樣本（洩氣測定樣本i、 2)均具有45(TC以上的5%重量減少溫度。關於茂氣測定樣本1，係具有與聚醯胺酸單體（洩氣測定樣本3)同程度之非常低的低洩氣性（由於光鹼發生劑之5 〇 %重量減少溫度較低，故來自感光性成分的殘渣較少所致）。其他測定樣本之 5%重量減少溫度均為未滿450¾。 [實施例1] 準備依序積層了由SUS所構成之金屬基板、由聚酿亞胺所構成之絕緣層及由Cu所構成之種子層及導電層的積層基板（圖 20(a))。接著，對該積層基板之SUS面製作金屬蝕刻用光阻。具 101111300 129 201248740 體而言，係於積層基板之兩面两面層合金屬蝕刻用之乾式薄膜光阻，於SUS面側進行圖案腹止 /、h先、於Cu面侧進行整面曝光’ 使用碳酸鈉水溶液進行顯影，只〜，於SUS面上形成光阻圖案。接著，使用氯化鐵水溶液作作為餘刻液，經由光阻圖案，對 SUS面施行圖案蝕刻後，制離利離先阻圖案（圖20(b))。接者’對該積層基板之suq & / b面側所露出之聚醯亞胺面製作聚醯亞胺濕式触刻用光阻。g 昇體而言，係於積層基板之兩面層合聚醢亞胺濕式姓刻用之乾式薄膜光阻，於^面側進行圖案曝光、於Cu面側進杆敕订整面曝光，使用碳酸鈉水溶液進行顯影，於SUS面上來士、，> 成先阻圖案。接著，使用 TPE 3000(東麗工私么司製）作為飿刻液經由光阻圖案，對 SUS面側所露出之聚醯亞胺面進行圖案個，形成導通部形成用之貫通孔後，剝離光阻圖案（圖20(c))。對所製作之積層體’依壓力25〜30pa、製程氣體 NF3/02=10/90〇/。、頻率40kHz進行電製處理。其後，對⑽ 面之露出部及Cu©祕覆用遮罩帶進行遮罩後，使用於硫酸銅130g/L、硫酸160g/L中添加了添加劑（CU_BRITE(茗原 UDYLITE股份有限公司製))的電鑛洛，以&面作為給電層，於室溫下依2A/dmk條件進行45分鐘鍍覆’形成導通部（圖 20(d))。接著，對該積層基板之Cu面製作金屬钱刻用光阻。具體而言，係於積層基板之兩面層合金屬银刻用之乾式薄膜光 101111300 130 201248740 阻’於cu面侧進行圖案曝光、於sus面側進行整面制碳酸納水溶液進行顯影，於Cu面上形成級圖索者’使用II化鐵水溶液作為射，經由光阻圖案，依於醯亞胺上殘存由〇1所構成之電極的方式對Cu面進行牵敍刻（圖2G(e))。其後’剝離光阻圖案後’藉快速韻刻去除種子層而得到電子元件用積層基板。 / [貫施例2-1-1](非感光性聚醯亞胺前驅物圖案化）於厚20μιη之SUS304-HTAii (東洋精猪製）上，使用上述聚醯亞胺前驅物溶液1 ’依硬化後膜厚成為1〇μιη之方式藉模塗器進行塗佈，於8(rc烘爐中，於大氣下乾燥6G分鐘 23(a)〜(b))。其後，於聚醯亞胺前驅物膜上，使用乾式薄膜光阻製作絲、進行㈣而㈣使純亞胺前驅物膜進行顯影後，剝離光阻圖案，於氮環境下’以35〇t>c進行熱處理工小時(升溫速度1代/分鐘，自然放冷），*得到依貫通孔部分被去除之方式使由聚醯亞胺所構成之絕緣層被圖案化的聚醯亞胺-不銹鋼積層體（圖23(c))。接著，對該聚醯亞胺-不銹鋼積層體之sus面製作金屬蝕刻用光阻。其次，使用氣化鐵水溶液作為蝕刻液，經由光阻圖案，對SUS面施行圖案㈣後，_光阻圖案而得到電子元件用積層基板2-1-1。 [貫施例2-1-2](非感光性聚醯亞胺之醯亞胺化後圖案化）於厚20μιη之SUS304-HTAf|(東洋精箱製）上，使用上述 101111300 131 201248740 聚醯亞胺前驅物溶液12,依硬化後獏厚成為ι〇μιη之方式藉模塗器進行塗佈，於80°C烘爐中，於大氣下乾燥⑼分鐘。其後，於氮環境下，以35(TC進行熱處理丨小時(升溫速度 10°c/分鐘’自然放冷），而得到積層體（圖23(a)〜(b))e於上述積層體之由聚醯亞胺所構成的絕緣層上，形成光阻圖案。使用聚酿亞胺银刻液TPE-3000(東麗工程公司製）去除露出絕緣層之部分後，剝㈣阻_，而得到依導通部形成用部分被去除之方式使絕緣層被圖案化的聚醯亞胺·不錄鋼積層體（圖 23(c))。 θ 積其後，與上述實施例2·Μ同樣進行而得到電子元件用層基板2-1-2。 [貫施例2-1-3](感光性聚醯亞胺圖案化）於厚20叫之SUS304韻落（東洋精羯製）上將調製例 3所調製之感紐聚醯亞胺義組成物3，依硬化後膜厚成為之方式藉模塗器進行塗佈，於贼烘爐中，於大氣下乾燥6〇分鐘（圖23⑷,）。其後，經由光罩使用手動曝先機，藉南壓水銀燈圖案狀地進行5〇〇mj/cm2之曝光。其後乂 155 C加熱1〇分鐘。對塗膜藉由使混合了四甲基氣 2·38重量％水溶_丙醇依9 ]混合的溶液進行 =後’於氮環境下，依3耽熱處理ι小時(升溫速度_ =亞ir冷)’而得到依貫通孔部分被去除之方式使由 λ才冓成之絕緣層被圖案化的聚醯亞胺-不錄鋼積層 101111300 132 201248740 體（圖 23(c))。八後與上述實施例2-1-1同樣進行而得到電子元件用積層基板2-1 j。 [實施例2、2-1 ](非感光性聚醯亞胺前驅物圖案化）於電子元件用積層基板2-卜1之SUS面側，將上述聚醯亞胺前驅物溶液1依硬化後於SUS上膜厚成為10μηΐ2方式，藉模塗器進行塗佈，於抓烘爐巾，於大氣下乾燥6〇分鐘。其後，於聚醯亞胺前驅物膜上，使用乾式薄膜光阻製作光阻、進仃_影而同時使料亞胺前驅物膜進行顯影後，剝離光阻圖案’於氮環境下，以350°C進行熱處理丨^(、時(升溫速度1〇C/分鐘，自然放冷），而得到依貫通孔部分被去除之方式使由t驢亞胺所構成之絕緣層（第2層）被圖案化的電子元件用積層基板2_2-1。 [實施例2-2、2](非感光性聚醯亞胺之醯亞胺化後圖案化）於電子元件用積層基板2-1-2之SUS面側，將上述聚醯亞胺前驅物崎12依硬化後於SUS ±膜厚成為1〇叫之方式，藉模塗器進行塗佈，於80°C烘爐中，於大氣下乾燥6〇。其後，於氮環境下，以350 C進行熱處理i小時(升溫速度10°C/分鐘，自然放冷），而得到積層體。於上述積層體之由聚醯亞胺所構成的絕緣層（第2層）上，形成光阻圖案。使用聚醯亞胺蝕刻液TPE-3000(東麗工程公司製）去除露出絕緣層（第2層）之部分後，剝離光阻圖案，而得到依貫通 101111300 133 201248740 孔部分被去除之方式使絕緣層（第2層）被圖案化的電子元件用積層基板2-2-2。 [實施例2-2-3](感光性聚醯亞胺圖案化）於電子元件用積層基板2-1-2的SUS面側，將上述感光性聚醯亞胺樹脂組成物3依硬化後於SUS上膜厚成為1〇μ1Ώ 之方式，藉模塗器進行塗佈，於80°C烘爐中，於大氣下乾燥60分鐘。其後，經由光罩使用手動曝光機，藉高麗水銀 · 燈圖案狀地進行500mJ/cm2之曝光。其後，以155。〇加熱10 分鐘。對塗膜藉由使混合了四曱基氫氧化銨238重量％水溶液與異丙醇依9: 1混合的溶液進行顯影後，於氛環境下，依350 C熱處理1小時(升溫速度1(TC/分鐘，自然放冷），而得到依貫通孔部分被去除之方式使由聚醯亞胺所構成之絕緣層（第2層）被圖案化的電子元件用積層基板2_2_3。 [實施例3-1](非感光性聚醯亞胺前驅物圖案化）準備依序積層了由SUS所構成之金屬基板(厚ι8μιη)、由聚醯亞胺所構成之絕緣層（第1層）(厚10μιη)與由Cu所構成之種子層及電極層（厚9pm)的積層基板（圖26(a))。對上述積層基板之SUS面製作金屬敍刻用光阻。接著，使用氣化鐵水溶液作為飯刻液，經由光阻圖案，對sus面 . 施行圖案蝕刻後，剝離光阻圖案。接著，對該積層基板之 _ Cu面製作金屬蝕刻用光阻。接著使用氣化鐵水溶液作為蝕刻液，經由光阻圖案，對Cu面施行圖案蝕刻後，剝離光阻圖 101111300 134 201248740-------1_____ Pieces - As shown in Table 6, samples using photobase generators (ventilation measurement samples i, 2) have a 5% weight reduction temperature of TC or higher. Sample 1, which has a very low low gas repellency to the same extent as polyglycolic acid monomer (bleeding test sample 3) (the residue from the photosensitive component is lower due to the lower temperature of the 5% by weight of the photobase generator) The 5% weight loss temperature of the other measurement samples is less than 4,503⁄4. [Example 1] A metal substrate composed of SUS and an insulating layer composed of styrene are sequentially laminated. A laminated substrate of a seed layer and a conductive layer made of Cu (Fig. 20(a)). Next, a photoresist for metal etching is formed on the SUS surface of the laminated substrate. The article 101111300 129 201248740 is a laminated substrate. Dry film photoresist for double-sided double-sided metal etching, pattern ablation on the SUS surface side, h first, full surface exposure on the Cu surface side 'Development using an aqueous solution of sodium carbonate, only ~, formed on the SUS surface Photoresist pattern. Next, using an aqueous solution of ferric chloride For the residual liquid, the pattern of the SUS surface is etched through the photoresist pattern, and then the pattern of the eliminator is removed (Fig. 20(b)). The connector is exposed on the side of the suq & / b of the laminated substrate. The polyimide film is made of polythene imide. The g-lift is a dry film photoresist which is laminated on both sides of the laminated substrate and is coated with a polyimide film. The surface side was subjected to pattern exposure, and the surface of the Cu surface was subjected to a full-surface exposure, and development was carried out using an aqueous solution of sodium carbonate, and the pattern was formed on the SUS surface, and then a pattern of the first resistance was used. Next, using TPE 3000 (Dongli Gong'er) In the etching liquid, the polyimide film surface exposed on the SUS surface side is patterned as a squeezing liquid, and a through hole for forming a conductive portion is formed, and then the photoresist pattern is peeled off ( FIG. 20( c )). The laminated body produced is subjected to electrical treatment at a pressure of 25 to 30 Pa, process gas NF3/02 = 10/90 〇 /, and frequency of 40 kHz. Thereafter, the exposed portion of the (10) surface and the mask for the Cu© secret cover are applied. After the mask is applied, the additive is added to the copper sulfate 130g/L and the sulfuric acid 160g/L (CU_BRITE (茗原UDYLITE limited stock) The electroporation of the system), using the & surface as the power supply layer, is plated at room temperature for 2 minutes at 2A/dmk conditions to form a conductive portion (Fig. 20(d)). Next, the laminated substrate is The Cu surface is made of a metal-etched photoresist. Specifically, the dry film light 101111300 130 201248740 which is laminated on both sides of the laminated substrate is used for pattern exposure on the cu surface side and the entire surface on the SUS surface side. The sodium carbonate aqueous solution was developed to form a level map on the Cu surface, and the surface of the Cu surface was subjected to the use of an aqueous solution of arsenic on the surface of the yttrium. Engraving engraving (Fig. 2G(e)). Thereafter, the seed layer is removed by a rapid rhyme after the film is peeled off to obtain a laminated substrate for an electronic component. / [Scheme 2-1-1] (patterning of non-photosensitive polyimine precursors) On a SUS304-HTAii (manufactured by Toyo Seiki) having a thickness of 20 μm, the above-mentioned polyimine precursor solution 1 ' The coating was applied by a die coater after the film thickness of the film was 1 μm, and dried in an oven (6 g minutes 23 (a) to (b)) in an oven. Thereafter, on the polyimide precursor film, a dry film photoresist is used to produce a silk, and (4) and (4) the pure imine precursor film is developed, and the photoresist pattern is peeled off, and the temperature is '35 〇t> in a nitrogen atmosphere. ;c heat treatment hours (heating rate 1 generation / minute, natural cooling), * obtained by the through hole portion is removed in a way to make the insulating layer composed of polyimine imprinted polyimide - stainless steel Laminated body (Fig. 23(c)). Next, a photoresist for metal etching was formed on the sus surface of the polyimide-stainless steel laminate. Then, using a vaporized iron aqueous solution as an etching solution, a pattern (4) is applied to the SUS surface via a photoresist pattern, and then the _resist pattern is used to obtain a laminated substrate 2-1-1 for an electronic component. [Example 2-1-2] (patterning after imidization of non-photosensitive polyimine) On SUS304-HTAf (made by Toyo Seiki) having a thickness of 20 μm, the above 101111300 131 201248740 is used. The imine precursor solution 12 was applied by means of a die coater after being hardened to a thickness of ι〇μηη, and dried in an oven at 80 ° C for (9) minutes. Thereafter, in a nitrogen atmosphere, heat treatment was carried out at 35 (TC for 丨 hours (heating rate 10 ° c / min 'naturally cooled) to obtain a laminate (Fig. 23 (a) to (b)) e in the above laminate. A photoresist pattern is formed on the insulating layer made of polyimide, and the portion of the exposed insulating layer is removed by using a polytetramine silver engraving solution TPE-3000 (manufactured by Toray Engineering Co., Ltd.), and then peeling is performed. A polyimide-based non-recorded steel laminate in which the insulating layer was patterned in such a manner that the portion for forming the conductive portion was removed (Fig. 23(c)). After θ, the same procedure as in the above Example 2·Μ was carried out. The layer substrate 2-1-2 for an electronic component was obtained. [Scheme 2-1-3] (Photographic Polyimine Patterning) The SUS304 rhyme (made by Toyo Seiki) was prepared in a thickness of 20 The sensitizing sensitizing composition 3 prepared by the method of Example 3 was coated by a die coater in the manner of hardening, and dried in a thief oven for 6 minutes in the atmosphere (Fig. 23(4),). Thereafter, a manual exposure machine was used via a photomask, and a 5 〇〇mj/cm2 exposure was performed in a patterned manner by a south-pressure mercury lamp. Thereafter, 乂155 C was heated for 1 〇 minutes. The film is subjected to a solution in which tetramethyl gas is mixed with 2.38% by weight of water-soluble propanol according to 9] = after the nitrogen treatment, and heat treatment is carried out for 3 hours (heating rate _ = sub-ir cold) The polyimine-unrecorded steel layer 101111300 132 201248740 body (Fig. 23(c)) in which the insulating layer formed by λ is patterned is removed in such a manner that the through-hole portion is removed. 2-1-1 was carried out in the same manner to obtain a laminated substrate 2-1 j for an electronic component. [Example 2, 2-1] (patterning of a non-photosensitive polyimide precursor) Patterning substrate for an electronic component 2- On the SUS surface side of the first surface, the polyimine precursor solution 1 was cured, and the film thickness on the SUS was 10 μm 2 , which was applied by a die coater, and dried in an oven for 6 minutes. Thereafter, on the polyimide film, a photoresist film is formed by using a dry film photoresist, and the imide precursor film is developed, and the photoresist pattern is stripped in a nitrogen atmosphere. Heat treatment at 350 ° C 、 ^ (, time (heating rate 1 〇 C / min, naturally let cool), and get through the through hole part is gone In the method of forming an insulating layer (second layer) composed of t-imine, the laminated substrate 2_2-1 for electronic components is patterned. [Examples 2-2, 2] (Non-photosensitive polyimine) After the imidization, the pattern is formed on the SUS surface side of the laminated substrate 2-1-2 for electronic components, and the polyimide polyimide precursor 12 is cured, and the thickness of the SUS ± film is 1 ,. The applicator was coated, dried in an oven at 80 ° C, and dried under air for 6 Torr. Thereafter, it was heat-treated at 350 C for 1 hour under nitrogen atmosphere (temperature up rate 10 ° C / min, naturally let cool). And get a layered body. A photoresist pattern is formed on the insulating layer (second layer) composed of the polyimide of the above laminate. After the portion of the exposed insulating layer (the second layer) was removed by using a polytheneimide etching solution TPE-3000 (manufactured by Toray Engineering Co., Ltd.), the photoresist pattern was peeled off, and the hole portion was removed by the penetration of 101111300 133 201248740. The layer (second layer) is a patterned laminated substrate 2-2-2 for electronic components. [Example 2-2-3] (Photosensitive Polyimine Patterning) The photosensitive polyimide resin composition 3 was cured after the SUS surface side of the electronic component laminated substrate 2-1-2. The film thickness of the SUS was 1 〇μ1 ,, and it was applied by a die coater, and dried in an oven at 80 ° C for 60 minutes in the air. Thereafter, a manual exposure machine was used via a photomask, and exposure of 500 mJ/cm 2 was performed in a pattern of a Koryo mercury lamp. Thereafter, take 155. Heat for 10 minutes. The coating film was developed by mixing a solution of a 238% by weight aqueous solution of tetrakis ammonium hydroxide with isopropyl alcohol in a ratio of 9:1, and then heat-treated at 350 C for 1 hour under an atmosphere (temperature up rate 1 (TC). In the case where the through-hole portion is removed, the insulating layer (second layer) composed of polyimide is patterned to form a laminated substrate 2_2_3 for electronic components. [Example 3 1] (Non-photosensitive polyimine precursor patterning) A metal substrate (thickness 8 μm) composed of SUS and an insulating layer (first layer) made of polyimide are sequentially laminated (thickness 10 μm) a laminated substrate made of a seed layer and an electrode layer (thickness: 9 pm) made of Cu (Fig. 26 (a)). A metal etching resist is formed on the SUS surface of the laminated substrate. Next, an aqueous solution of iron oxide is used. The rice etch liquid is subjected to pattern etching through a photoresist pattern, and then the photoresist pattern is removed. Then, a photoresist for metal etching is formed on the _Cu surface of the build-up substrate, and then an aqueous solution of iron oxide is used as an etchant. After pattern etching of the Cu surface via the photoresist pattern, peeling Photoresist 101 111 300 134 201 248 740 FIG.

案，藉此形成SUS面、Cu面均被圖案化的積層體(圖鄉)）。將上述聚醯亞胺前驅物溶液丨依硬化後於SUS 上膜厚成為ΙΟμιη之方式，於SUS面藉模塗器進行塗佈，於肋。c烘爐中，於大氣下乾燥60分鐘（圖26⑹）。其後，於聚酿亞胺前驅物膜上，使用乾式薄膜光阻製作光阻、進行顯影而同時使聚醯亞胺前驅物膜進行顯影後，剝離光阻圖案，於氮環境下，以35(TC進行熱處理丨小時(升溫速度1〇它/分鐘自然放冷），而形成經圖案化之由聚醯亞胺所構成的絕緣層（第2 層）(圖26(d))。接著，以經圖案化之Cu層作為遮罩，使用聚醯亞胺蝕刻液ΤΡΕ·3000(東麗工程公司製）對絕緣層（第ι 層）進行蝕刻（圖26(e))。於積層基板之兩面層合金屬蝕刻用之乾式薄獏光阻，於 SUS面側進行整面曝光，使用碳酸鈉水溶液進行顯影後，使用氯化鐵水溶液作為蝕刻液，依殘存由Cu所構成之電極的方式進行Cu面之蝕刻（圖26(f))。其後，藉快速蝕刻去除種子層。接著，藉配量器於2層絕緣層之貫通孔中分別填充銀膏，而形成第1導通部及第2導通部，而得到電子元件用積層基板3-1(圖26(g))。 [實施例3-2](感光性聚醯亞胺圖案化）與上述實施例3-1同樣進行，形成使SUS面、Cu面均經圖案化的積層體（圖26(b))。將感光性聚醯亞胺樹脂組成物2依硬化後於SUS上膜厚 101111300 135 201248740 成為1〇μΐη之方式藉模塗器於SUS面上進行塗佈，於8〇〇c 烘爐中，於大氣下乾燥60分鐘（圖26(c))。其後，經由光罩使用手動曝光機，藉高壓水銀燈圖案狀地進行遍w 之+光其後以i55°c加熱ίο分鐘。對各別的塗膜，藉由使混合了四曱基氫氧化銨2 38 4量％水溶液與異丙醇依 9. 1混合的溶液進行顯影後，於氮環境下，依35(TC熱處理 1小時(升溫速度耽/分鐘，自然放冷），而形成經圖案化之由聚醯亞胺所構成之絕緣層（第2層）(圖26(d))。其後，與上述實施例3-1同樣進行而得到電子元件用積層基板 3-2(圖 26(g))。 [實施例4-1]. 準備依序積層了由SUS所構成之金屬基板(厚18μιη)、由聚酿亞胺所構成之絕緣層（第1層）(厚ΙΟμιη)與由〇!所構成之導電層（厚9^m)的積層基板（圖19(a))。對上述積層基板之sus面製作金屬蝕刻用光阻。接著，使用氣化鐵水溶液作為餘刻液，經由光阻圖案，對sus面施行圖案蝕刻後，剝離光阻圖案（圖19(b；))。接著’將上述感光性聚醯亞胺樹脂組成物3依硬化後於 SUS上臈厚成為10μιη之方式，藉模塗器進行塗佈，於8〇。〇烘爐中，於大氣下乾燥60分鐘（圖19(c))。其後，經由光罩使用手動曝光機，藉高壓水銀燈圖案狀地進行500mJ/cm2 之曝光。其後，以l55°c加熱1〇分鐘。對塗膜藉由使混合 101111300 136 201248740 了四曱基氫氧化铵2·38重量％水溶液與異内醇依9 :丨混合的溶液進行顯影後，於氮環境下’依3 5 〇亡熱處理1小時^(二溫速度HTC/分鐘，自然放冷），而得到依導通部形成用之貫通孔部分被去除之方式使由聚醯亞胺所構成之絕緣層（第2 • 層）被圖案化的聚醯亞胺-不銹鋼積層體（圖l9(d))。以經圖案 _ 化之絕緣層（第2層）作為遮罩，使用聚醯亞胺蝕刻液 TPE-3000(東麗工程公司製）對絕緣層（第1層）進行姓刻（圖 19(e))。使用配置器，將銀膏填充於2層之絕緣層之貫通孔中而形成導通部。其人，對5玄聚醯亞胺-不鎮鋼積層體之Cu面製作金屬触刻用光阻。接著，使用氯化鐵水溶液作為蝕刻液，經由光阻圖案，依殘存由Cu所構成之電極的方式對cu面進行圖案蝕刻後’剝離光阻圖案（圖19(g))。 [實施例4-2] 與上述實施例4-1同樣進行，形成使sus面經圖案化的積層體（圖19(b))。接著’將上述聚酿亞胺前驅物溶液1依硬化後於膜厚成為 . ΙΟμιη之方式藉模塗器於sus面側進行塗佈，於8〇艺烘爐中’於大氣下乾燥6〇分鐘（圖19(c))。其後，於聚醯亞胺前驅物膜上’使用乾式薄膜光阻製作光阻、進行顯影而同時使聚醯亞胺前驅物膜進行顯影後，剝離光阻圖案，於氣環境 101111300 137 201248740 下，以350°C進行熱處理i小時(升溫速度1〇c>c/分鐘自然放冷），而得到依使導通部形成用之貫通孔部分被去除之方式使由聚醯亞胺所構成之絕緣層（第2層）經目案化的聚酿亞胺-不銹鋼積層體（圖19(d)卜其後’與上述實施例4-1同樣進行而得到電子元件用積層基板4-2。 [實施例4-3] 與上述實施例4-1同樣進行，形成使sus面經圖案化的積層體（圖19(b))。層接著，將上述聚醯亞胺前驅物溶液12藉模塗器於sus面側進行塗佈，於80°C烘爐中，於大氣下乾燥6〇分鐘。其後，於氮環境下，以350°C進行熱處理1小時(升溫速度1〇它/分釦，自然放冷）（圖19(c))。接著，由聚醯亞胺面側照射mg 雷射，於2層之絕緣層形成貫通孔，而得到依使導通部形、用之貫通孔部分被去除之方式使由聚醯亞胺所構成之之絕緣層經圖案化的聚醯亞胺-不銹鋼積層體（圖丨9(q) 其後，與上述實施例4-1同樣進行而得到電子元件用積層基板4-3。 [實施例5-1-1](非感光性聚醯亞胺前驅物圖案化）於厚20μιη之SUS304-HTA箔（東洋精箔製）上 ’ 使用上述聚醯亞胺前驅物溶液1，依硬化後膜厚成為 . 〈方式藉模塗器進行塗佈，於80°C烘爐中，於大氣下乾燥八 ” S鐘（圖 101111300 138 201248740 23(a)〜(b))。其後，於聚醯亞胺前驅物膜上，使用乾式薄膜光阻製作光阻、進行顯影而同時使聚醯亞胺前驅物膜進行顯影後，剝離光阻圖案，於氮環境下，以350。(：進行熱處理1 小時(升溫速度10°C/分鐘，自然放冷）’而得到依貫通孔部分被去除之方式使由聚醯亞胺所構成之絕緣層被圖案化的聚酿亞胺-不錄鋼積層體（圖23(c))。對所製作之聚醯亞胺-不銹鋼積層體，依壓力25Pa 〜30Pa、製程氣體NF3/〇2=10%/90%、頻率40kHz進行電聚處理後’對SUS面之露出部藉鍍覆用遮罩帶進行遮罩後，使用於硫酸銅130g/L、硫酸160g/L中添加了添加劑 (CU-BRITE(茬原UDYLITE股份有限公司製))的電鍍浴，以 SUS面作為給電層，於室溫下依電流密度2A/dm2之條件進行45分鐘鍍覆，形成導通部（圖23(d))。接著，對該聚醯亞胺-不銹鋼積層體之SUS面製作金屬钮刻用光阻。其次，使用氣化鐵水溶液作為姓刻液，經由光阻圖案，對SUS面施行圖案蝕刻後，剝離光阻圖案而得到電子元件用積層基板5-1-1(圖23(e))。 [實施例5-1-2](非感光性聚酿亞胺之酿亞胺化後圖宰化）於厚20μιη之SUS304-HTA箔（東洋精箔製）上，將上述聚醯亞胺前驅物溶液12,依硬化後膜厚成為1〇μιη之方式藉模塗器進行塗佈’於80°C供爐中’於大氣下乾燥6〇分鐘。其後，於氮環境下，依350°C熱處理1小時(升溫速度1〇<>(：/分 101111300 139 201248740 鐘’自然放冷）’而得到積層體（圖23(a)〜(b))e於上述積層體之由聚醯亞胺所構成的絕緣層上，形成光阻圖案。將露出聚酿亞胺膜之部分使用聚醯亞胺蝕刻液ΤΡΕ-3000(東麗工程公司製）予以去除後，剝離光阻圖案，得到依導通部形成用者被去除之方式使聚醯亞胺膜被圖案化的聚醯亞胺-不錄鋼積層體（圖23(c))。其後’與上述實施例5-1-1同樣進行而得到電子元件用積潛基板5-1-2。 [實施例5-1-3](感光性聚醯亞胺圖案化）於厚20μιη之SUS3〇4_HTA羯（東洋精羯製）上，將調製例 3所调製之感光性聚醯亞胺樹脂組成物3，依硬化後膜厚成為ΙΟμιη之方式藉模塗器進行塗佈，於8〇t烘爐中，於大氣下乾燥60分鐘（圖23(a)〜(b))。其後，經由光罩使用手動曝光機’藉高壓水銀燈圖案狀地進行5〇〇mJ/cm2之曝光。其後，以155¾加熱1〇分鐘。對塗膜藉由使混合了四曱基氫氧化銨2.38重量％水溶液與異丙醇依9 : }混合的溶液進行顯影後’於氮環境下，依35〇t熱處理“、時(升溫速度1〇口分鐘，自賊冷），而得雜貫通⑽分被去除之方式使由聚醯亞胺所構成之絕緣層被圖案化的聚醯亞胺·不錄鋼積層體(圖 23(c))。其後’與上述實施例5_M同樣進行而得到電子元件用積層基板5-1 -3。 101111300 140 201248740 [實施例5。 11 ](非感光性聚醯亞胺前驅物圖案化）於雷了— 一、疋件用積層基板5-1-1之SUS面側，將上述聚醯亞月女剛驅物馨液1依硬化後於SUS上膜厚成為1一之方式， 9 °唣行塗佈，於8(TC烘爐中’於大氣下乾燥60分鐘。其後^ ,於*取、1隨亞胺前驅物膜上，使用乾式薄膜光阻製作光阻進订顯影而同時使聚醯亞胺前驅物膜進行顯影後，剝離光阻圖案，认於氮環境下，以350 C進行熱處理1小時(升溫速度C/分鐘’自然放冷），而得到依貫通孔部分被去除之方式使由聚酿亞胺所構成之絕緣層被圖案化的電子元件用積層基板5-2-1。 [實施例5-2-2](非感光性聚醯亞胺之醯亞胺化後圖案化）於電子元件用積層基板5-1-2之SUS面侧，將上述聚醯亞胺前驅物溶液12依硬化後於SUS上膜厚成為ΙΟμιη之方式’藉模塗器進行塗佈，於80°C烘爐中，於大氣下乾燥60 分鐘。其後，於氮環境下5以350〇C進行熱處理1小時(升溫速度10 C/分鐘，自然放冷），而得到積層體。於上述積層體之由聚醯亞胺所構成的絕緣層（第2層）上’形成光阻圖案。使用聚醯亞胺蝕刻液TPE-3000(東麗工程公司製)去除露出絕緣層（第2層）之部分後’剝離光阻圖案，而得到依貫通孔部分被去除之方式使絕緣層（第2層）被圖案化的電子元件用積層基板5-2-2。 [實施例5-2-3](感光性聚醯亞胺圖案化） 101111300 141 201248740 於電子元件用積層基板5小2的SUS面側，將上述感光性聚醯亞胺樹脂組成物3依硬化後於SUS上膜厚成為1〇μηι 之方式，藉模塗器進行塗佈，於80¾烘爐中，於大氣下乾燥60分鐘。其後，經由衫使用手動曝光機，藉高壓水^ 燈圖案狀地進行500mJ/cm2之曝光。其後，以155七加熱分鐘。對塗膜藉由使混合了四曱基氫氧化銨2 38重量:水溶液與異丙醇依9: 1混合的溶液進行顯影後，於氮琿境下，依350°C熱處理1小時(升溫速度i〇〇c/分鐘，自然放冷），而得到依貫通孔部分被去除之方式使由聚醯亞胺所構成之絕緣層（第2層）被圖案化的電子元件用積層基板5 。 [實施例6-1] 與實施例2-1-1同樣進行，得到依導通部形成用之+通孔部分被去除之方式使聚醯亞胺膜被圖案化的聚醯亞胺鋼積層體（圖23(c))。對所製作之聚醯亞胺-不銹鋼積層體，佑厭队铿力25Pa 〜30Pa、製程氣體 NF3/02=10%/90%、頻率 4〇kl·^ w ^進行電漿處理。對SUS面之露出部藉鍍覆用遮罩帶進行遮罩 S-10X(上村工業製）、A-10X(上村工業製）分別進行3分铲又前處理後’使用NPR-4(上村工業製）進行無電解鍍覆^八鐘。以形成於絕緣層上之無電解鍍覆層作為給雷思电層，使用於硫酸銅70g/L、硫酸200g/L、鹽酸0.5ml/L中添力。口了添加劑 (Super-Throw2000(Enthone Japan 股份有限公司製))的電 101111300 142 201248740 浴’於室溫下依電流密度4A/dm2之條件進行接著，對形成於無電雜覆層上之^面=全屬㈣用錄。接著，使用氣化鐵水溶液作為㈣液= 先阻圖案，依使由Cu所構成之電極於Cu面上以被覆其後形成之SUS開口部之形式殘存的方式施行圖案钮刻後，剝離光阻圖案。對露出之無電解鍍覆層以NIMUDEN RIP m 進行軟性餘刻而予以剝離後，為了去除觸媒，藉 MACOHO(股）製濕式喷砂裝置，依氧化㈣石、G.5k^J2 之水壓、lOm/min之處理速度進行處理，去除觸媒。接著，於180°C、lhr、氮環境下進行熱處理。接著，對該積層體之SUS面製作金屬蝕刻用光阻。接著，使用氣化鐵水;谷液作為姓刻液，經由光阻圖案，於sus面施行圖案|虫刻後，剝離光阻圖案，而得到電子元件用積層基板 6-1。 [實施例6-2] 於實施例6-1中’除了取代濕式喷砂所進行之觸媒去除步驟’而進行藉MACUDIZER9204(日本MacDermid股份有限公司製），依液溫35°C浸潰1分鐘、水洗，藉 MACUDIZER9275(日本MacDermid股份有限公司製），依液溫75°C浸潰2分鐘、水洗，藉43°C之MACUDIZER9279(日本MacDermid股份有限公司製），浸潰1分鐘、水洗後，予以乾燥而去除觸媒的步驟以外，其餘與實施例6-1同樣進行 101111300 143 201248740 而製作電子元件用積層基板6-2。 [實施例6-3] 於上述電子元件用積層基板6-1之SUS面側，將上述聚醯亞胺前驅物溶液！依硬化後於sus上媒厚成為ι〇μιη之方式，藉模塗器進行塗佈，於8(rc烘爐中，於大氣下乾燥 60分鐘。其後，於聚醯亞胺前驅物膜上，使用乾式薄膜光阻製作光阻、進行顯影而同時使聚醯亞胺前驅物臈進行顯影後，剝離光阻圖案，於氮環境下，以35(rc進行熱處理i小時(升溫速度l〇°C/分鐘，自然放冷），而得到依貫通孔部分被去除之方式使由聚醯亞胺所構成之絕緣層（第2層）被圖案化的電子元件用積層基板6-3。 [實施例6-4] 於上述電子元件用積層基板6-2之SUS面側，將上述聚醯亞胺前驅物溶液1依硬化後於sus上膜厚成為1〇叫^之方式，藉模塗器進行塗佈，於80。(：烘爐中，於大氣下乾燥 60分鐘。其後，於聚醯亞胺前驅物膜上，使用乾式薄膜光阻製作光阻、進行顯影而同時使聚醯亞胺前驅物膜進行顯影後，剝離光阻圖案，於氮環境下，以350°C進行熱處理j小時(升溫速度l〇°C/分鐘，自然放冷），而得到依貫通孔部分被去除之方式使由聚醯亞胺所構成之絕緣層（第2層）被圖案化的電子元件用積層基板6_4。 [實施例7-1] 101111300 144 201248740 準備依序積層了由SUS所構成之金屬基板(厚18叫）、由聚醯亞胺所構成之絕緣層（第1層）(厚10㈣與由Cu所構成之導電層（厚9μηι)的積層基板（圖19(a))。對上述積層基板之SUS面製作金屬银刻用光阻。接著，使用氣化鐵水溶液作為飯刻液，經由光阻圖案，對娜面施行圖絲刻後，剝離光阻圖案（圖哪)）。接著於SUS面側將上述感光性聚醯亞胺樹脂組成物3 依在SUS上硬化相厚成為1G帅之方式難塗器進行塗佈’於贼烘爐中，於大氣下乾燥60分鐘（圖19(c))。其後’經由光罩使用手鱗光機，藉高壓水銀燈圖案狀地進行 500mW之曝光。其後，以阶加熱1〇分鐘。對塗膜藉由使混合了四f基氫氣化錢2 38重量％水溶液與異丙醇依 9 . 1此合的’谷液進行顯影後’於氮環境下，依35(TC熱處理 1 m(升皿速度i〇C/分鐘，自然放冷），而得到依導通部形成用之貫通孔部分被去除之方式使由聚醯亞胺所構成之絕緣層（第2層）被圖案化的聚醯亞胺-不錄鋼積層體(圖19(d))。以經圖案化之絕緣層（第2層）作為遮罩，使用聚醯亞胺敍刻液TPE-3000(東麗工程公司製)對絕緣層（第1層）進行蝕刻 (圖 19(e))。對所製作之聚酿亞胺不錄鋼積層體，依壓力25Pa 〜30Pa、製程氣體师3/〇2=1〇%/9〇%、頻率進行處理後’使用於硫酸鋼13〇g/L、硫酸刚叭中添加了添加 101111300 145 201248740 劑（CU-BRITE(茗原UD YUTE股份有限公司製》的電梦、谷以Cu面作為給電層，於室溫下依2A/dm2之條件進行12〇分鐘鍍覆，形成導通部（圖19(f))。接著，對該聚感亞胺-不錢鋼積層體之面製作金屬敍巧用光阻。其次，使用氣化鐵水溶液作為蝕刻液，經由光阻圖案，依使由Cu所構成之電極殘存的方式對Cu面施行圖案蝕刻後，剝離光阻圖案而得到電子元件用積層基板7_丨（圖 19(g))。 [實施例7-2] 與上述實施例7-1同樣進行，形成使sus面經圖案化的積層體（圖19(b))。接著，於SUS面側將上述聚醯亞胺前驅物溶液丨依硬化後於SUS上膜厚成為10μιη之方式，藉模塗器進行塗佈，於80C烘爐中，於大氣下乾燥6〇分鐘（圖19⑷）。其後於聚醯亞胺前驅物膜上，使用乾式薄膜光阻製作光阻、進行顯影而同時使聚醯亞胺前驅物膜進行顯影後，剝離光阻圖案，於氮環境下，以350°C進行熱處理1小時(升溫速度1〇它/分鐘，自然放冷）’而得到依導通部形成用之貫通孔部分被去除之方式使由聚醯亞胺所構成之絕緣層（第2層）被圖案化的聚酿亞胺·不錄鋼積層體（圖19(d))。其後，與上述實施例8-1同樣進行而得到電子元件用積層基板7-2。 101111300 146 201248740 [實施例7-3】與上述實施例7-1同樣進行，形成使SUS面經圖案化的積層體（圖19(b))。接著，於SUS面側將上述聚醯亞胺前驅物溶液12，藉模塗器進行塗佈，於8(TC烘爐中，於大氣下乾燥60分鐘。其後，於氮環境下，以350°C進行熱處理1小時(升溫速度丨〇°c/In this case, a laminated body in which the SUS surface and the Cu surface are patterned is formed (Fig.). The polyimine precursor solution was hardened and applied to the SUS layer so as to be ΙΟμηη, and applied to the SUS surface by a die coater. In a c oven, it was dried under the atmosphere for 60 minutes (Fig. 26 (6)). Thereafter, on the polyimide precursor film, a photoresist was produced using a dry film photoresist, and development was carried out while developing the polyimide film, and then the photoresist pattern was peeled off, and under a nitrogen atmosphere, 35 (TC is heat-treated for a few hours (heating rate is 1 〇 it/min is naturally cooled), and a patterned insulating layer (layer 2) composed of polyimide is formed (Fig. 26(d)). The insulating layer (the first layer) was etched using a patterned Cu layer as a mask, and the polyimide layer (manufactured by Toray Engineering Co., Ltd.) was used (Fig. 26(e)). The dry-type thin tantalum photoresist for double-sided laminated metal etching is exposed to the entire surface of the SUS surface side, and after development using an aqueous solution of sodium carbonate, an aqueous solution of ferric chloride is used as an etching liquid, and a Cu surface is formed in such a manner that an electrode composed of Cu remains. Etching (Fig. 26(f)). Thereafter, the seed layer is removed by rapid etching. Then, the silver paste is filled in the through holes of the two insulating layers by the dispenser to form the first conductive portion and the second conductive portion. In the same manner, a laminated substrate 3-1 for an electronic component is obtained (Fig. 26(g)). Example 3-2] (Photographic Polyimine Patterning) A layered body in which both the SUS surface and the Cu surface were patterned was formed in the same manner as in the above Example 3-1 (Fig. 26(b)). The polyimine resin composition 2 is applied to the SUS surface by a die coater at a thickness of 101111300 135 201248740 in a manner of 1 〇μΐη, and is applied to the SUS surface in an 8 〇〇c oven under atmospheric pressure. It was dried for 60 minutes (Fig. 26(c)). Thereafter, a manual exposure machine was used, and the high-pressure mercury lamp was patterned in a pattern of light + light and then heated at i55 ° C for ίο minutes. The solution was developed by mixing a solution of tetraammonium hydroxide 2384 wt% aqueous solution with isopropyl alcohol 9.1, and then heat-treated under a nitrogen atmosphere for 1 hour (temperature increase rate 耽/ In a minute, naturally, it was cooled, and an insulating layer (second layer) composed of a patterned polyimide was formed (Fig. 26 (d)). Thereafter, it was obtained in the same manner as in the above Example 3-1. Multilayer substrate 3-2 for electronic components (Fig. 26(g)). [Example 4-1]. A metal substrate (thickness 18 μm) composed of SUS was laminated in sequence, and A laminated substrate (Fig. 19 (a)) of an insulating layer (first layer) composed of an imine (thick layer) and a conductive layer (thickness: 9 μm) composed of yttrium. Next, using a vaporized iron aqueous solution as a residual liquid, the sus surface is subjected to pattern etching through a photoresist pattern, and then the photoresist pattern is peeled off (FIG. 19(b)). The polyimine resin composition 3 was applied by means of a die coater after being hardened to a thickness of 10 μm on a SUS, and dried in an atmosphere of an oven for 60 minutes in an oven (Fig. 19(c)). . Thereafter, exposure was performed in a pattern of 500 mJ/cm 2 by a high-pressure mercury lamp using a manual exposure machine through a photomask. Thereafter, it was heated at 1 55 ° C for 1 minute. The coating film is developed by mixing 101111300 136 201248740 tetrakisyl ammonium hydroxide 2·38% by weight aqueous solution with isopropanol 9: hydrazine, and then subjected to heat treatment in a nitrogen environment. Hour ^ (two temperature temperance HTC / min, naturally let cool), and the insulating layer (the second layer) composed of polyimine is patterned in such a manner that the through-hole portion for forming the via portion is removed. Polyimine-stainless steel laminate (Fig. 19(d)). The insulating layer (layer 2) was patterned with a patterned polyimide layer (layer 2), and the insulating layer (layer 1) was subjected to a surname using a polytheneimide etching solution TPE-3000 (manufactured by Toray Engineering Co., Ltd.) (Fig. 19 (e) )). Using a configurator, silver paste was filled in the through holes of the insulating layer of the two layers to form a conductive portion. The person who made the metal touch-etched photoresist on the Cu surface of the 5th polytheneimine-un-steel laminate. Next, an aqueous solution of ferric chloride was used as an etching solution, and the cu surface was subjected to pattern etching after leaving an electrode made of Cu through a photoresist pattern, and then the photoresist pattern was peeled off (Fig. 19 (g)). [Example 4-2] In the same manner as in the above Example 4-1, a laminate in which the SUS surface was patterned was formed (Fig. 19 (b)). Then, the above-mentioned polyamidene precursor solution 1 is hardened and then coated on the sus side by a die coater in a film thickness of ΙΟμηη, and dried in the oven for 6 minutes in an oven. (Fig. 19(c)). Thereafter, a photoresist is formed on the polyimide film by using a dry film photoresist, and development is carried out while developing the polyimide film, and then the photoresist pattern is removed, and the gas atmosphere is 101111300 137 201248740. The heat treatment was performed at 350 ° C for 1 hour (heating rate 1 〇 c > c / minute natural cooling), and the insulating layer composed of polyimide was obtained in such a manner that the through-hole portion for forming the conductive portion was removed. The layered (second layer) meshed polyimide-stainless steel layered body (Fig. 19 (d) and subsequent steps' was obtained in the same manner as in the above Example 4-1 to obtain a laminated substrate 4-2 for electronic components. Example 4-3] A layered body in which the SUS surface was patterned was formed in the same manner as in the above Example 4-1 (Fig. 19 (b)). Next, the above polyimine precursor solution 12 was applied by die coating. The coating was applied to the side of the SUS, and dried in an oven at 80 ° C for 6 minutes in the atmosphere. Thereafter, heat treatment was carried out at 350 ° C for 1 hour in a nitrogen atmosphere (temperature up rate 1 〇 it / minute deduction) , naturally let cool) (Fig. 19(c)). Next, the Mg laser is irradiated from the side of the polyimide, and the insulating layer is applied to the second layer. A through-hole is obtained, and a patterned polyimide-stainless steel layer is formed by a conductive layer composed of polyimine in a manner that the conductive portion is removed and the through-hole portion is removed (Fig. 9 ( q) The laminate substrate 4-3 for electronic components was obtained in the same manner as in the above Example 4-1. [Example 5-1-1] (patterning of non-photosensitive polyimide intermediate precursor) Thickness 20 μm SUS304-HTA foil (made on Toyo fine foil). Using the above polyimide precursor solution 1, the film thickness after curing is changed. Dry the eight" S clock in the atmosphere (Fig. 101111300 138 201248740 23 (a) ~ (b)). Thereafter, on the polyimide film, a dry film photoresist is used to make the photoresist and develop while simultaneously polymerizing After the yttrium imide precursor film was developed, the photoresist pattern was peeled off, and the through-hole portion was obtained by a heat treatment for 1 hour (heating rate of 10 ° C/min, natural cooling) in a nitrogen atmosphere. The method of removing the patterned polyaniline-unrecorded steel layer composed of the polyimide layer Body (Fig. 23(c)). After the electropolymerization treatment was carried out on the polyimine-stainless steel laminate produced according to the pressure of 25Pa to 30Pa, the process gas NF3/〇2=10%/90%, and the frequency of 40 kHz. After the SUS surface is covered with a masking tape, an electroplating bath containing an additive (CU-BRITE (manufactured by Ebara UDYLITE Co., Ltd.)) is added to a copper sulfate of 130 g/L and a sulfuric acid of 160 g/L. The SUS surface was used as the power supply layer, and plating was performed at room temperature for 45 minutes under the conditions of a current density of 2 A/dm 2 to form a conductive portion (Fig. 23 (d)). Next, a photoresist for metal button was formed on the SUS surface of the polyimide-stainless steel laminate. Then, a vaporized iron aqueous solution was used as a surname, and the SUS surface was subjected to pattern etching through a photoresist pattern, and then the photoresist pattern was peeled off to obtain a laminated substrate 5-1-1 for an electronic component (Fig. 23(e)). [Example 5-1-2] (Nu-imidation of non-photosensitive acrylonitrile after imidization) On the SUS304-HTA foil (manufactured by Toyo Fine Foil) having a thickness of 20 μm, the above-mentioned polyimine precursor was used. The solution 12 was dried by a die coater at a temperature of 1 〇 μηη after hardening and dried in an oven at 80 ° C for 6 minutes. Thereafter, the laminate was heat-treated at 350 ° C for 1 hour in a nitrogen atmosphere (temperature up rate 1 〇 <> (: / minute 101111300 139 201248740 clock 'natural cooling)' to obtain a laminate (Fig. 23 (a) ~ ( b)) e forms a photoresist pattern on the insulating layer composed of the polyimide of the above laminated body. The portion of the polyimide film is exposed using a polyimide etch liquid ΤΡΕ-3000 (Dongli Engineering Co., Ltd.) After the removal, the photoresist pattern was peeled off to obtain a polyimide-unrecorded steel laminate in which the polyimide film was patterned in such a manner that the conductive portion was removed (Fig. 23(c)). Then, in the same manner as in the above Example 5-1-1, a submerged substrate 5-1-2 for an electronic component was obtained. [Example 5-1-3] (Photosensitive polyimide fluorination pattern) Thickness 20 μm On the SUS3〇4_HTA(R) (made by Toyo Seiki Co., Ltd.), the photosensitive polyimine resin composition 3 prepared in Preparation Example 3 was applied by a die coater so that the film thickness after hardening became ΙΟμηη. In an 8 〇t oven, it is dried in the atmosphere for 60 minutes (Fig. 23(a) to (b)). Thereafter, a manual exposure machine is used via a reticle to borrow a high pressure mercury lamp pattern. The exposure was performed at 5 〇〇mJ/cm 2 , and then heated at 1553⁄4 for 1 。 minutes. The coating film was mixed with isopropyl alcohol by a mixture of tetramethylammonium hydroxide and a 2.38 wt% aqueous solution. After the development, in the nitrogen environment, according to the heat treatment of 35〇t, (the temperature rise rate is 1 minute, the temperature is 1 minute, the thief is cold), and the hybrid (10) is removed to make the insulation composed of polyimine. The layered patterned polyimide and non-recorded steel laminate (Fig. 23(c)). Thereafter, the laminated substrate 5-1-1 for electronic components was obtained in the same manner as in the above Example 5_M. 101111300 140 201248740 [ Example 5. 11 ] (patterning of non-photosensitive polyimine precursor) Yu Lei - I. The SUS surface side of the laminated substrate 5-1-1 for the element, the above-mentioned poly-Yu-Yu female After the scented liquid 1 is hardened, the film thickness on the SUS is one by one, and the coating is applied at 9 °, and dried in the air oven for 8 minutes in a TC oven. After that, it is taken at *1, 1 with ya On the amine precursor film, the resist film is developed by using a dry film photoresist while the polyimide film is developed, and the photoresist pattern is peeled off. It is considered that the heat treatment is performed at 350 C for 1 hour in a nitrogen atmosphere (heating rate C/min 'naturally cools down), and the insulating layer composed of the polystyrene is patterned in such a manner that the through-hole portion is removed. The laminated substrate 5-2-1 for electronic components. [Example 5-2-2] (patterning after imidization of non-photosensitive polyimine) In the laminated substrate 5-1-2 for electronic components On the SUS surface side, the polyilylimide precursor solution 12 was applied by a die coater to a thickness of SUS, and then dried in an oven at 80 ° C for 60 minutes in an atmosphere. Thereafter, heat treatment was carried out at 350 ° C for 1 hour in a nitrogen atmosphere (increased temperature of 10 C/min, and naturally allowed to cool) to obtain a laminate. A photoresist pattern is formed on the insulating layer (the second layer) composed of the polyimide of the above laminate. After removing the portion of the insulating layer (the second layer) by using the polyimide etchant TPE-3000 (manufactured by Toray Engineering Co., Ltd.), the photoresist pattern was removed, and the insulating layer was removed in such a manner that the through-hole portion was removed. Two layers) The patterned laminated substrate 5-2-2 for electronic components. [Example 5-2-3] (Photosensitive Polyimine Patterning) 101111300 141 201248740 The photosensitive polyimide resin composition 3 is hardened on the SUS surface side of the laminated board 5 for electronic components. After the film thickness of SUS was 1 〇μηι, it was applied by a die coater and dried in an oven at 803⁄4 for 60 minutes. Thereafter, exposure was performed in a pattern of 500 mJ/cm 2 by a high-pressure water lamp using a manual exposure machine via a shirt. Thereafter, it was heated at 155 to a minute. The coating film was developed by mixing a solution of tetramethylammonium hydroxide 2 38 weight: aqueous solution and isopropyl alcohol 9:1, and then heat-treating at 350 ° C for 1 hour in a nitrogen atmosphere (heating rate) In the case of i〇〇c/min, it is naturally cooled, and the insulating layer (second layer) composed of polyimine is patterned so that the through-hole portion is removed. [Example 6-1] In the same manner as in Example 2-1-1, a polyimine steel laminated body in which a polyimide film was patterned in such a manner that the via portion was formed and the via portion was removed was obtained. (Fig. 23(c)). For the polyimine-stainless steel laminate produced, the electrode was treated with a force of 25 Pa to 30 Pa, a process gas of NF 3/02 = 10%/90%, and a frequency of 4 〇 kl·^ w ^. In the exposed part of the SUS surface, the S-10X (made by Uemura Industrial Co., Ltd.) and the A-10X (made by Uemura Industrial Co., Ltd.) are covered with a masking tape for the SUS surface, and the NPR-4 (Shangcun Industrial Co., Ltd.) is used. System) electroless plating ^ eight clocks. The electroless plating layer formed on the insulating layer was used as a layer for the use of copper sulfate 70 g/L, sulfuric acid 200 g/L, and hydrochloric acid 0.5 ml/L. The electric charge 101111300 142 201248740 bath of the additive (Super-Throw 2000 (manufactured by Enthone Japan Co., Ltd.)) is carried out under the conditions of a current density of 4 A/dm 2 at room temperature, and is formed on the surface of the electroless hybrid coating. All belong to (4) use. Next, using a vaporized iron aqueous solution as the (four) liquid = first resist pattern, the photoresist is peeled off after the electrode formed of Cu remains on the Cu surface so as to remain in the form of the SUS opening formed after the coating. pattern. After the exposed electroless plating layer is peeled off with a soft residue by NIMUDEN RIP m, in order to remove the catalyst, the MACOHO (share) wet blasting device is used, and the water of oxidized (four) stone and G.5k^J2 is used. The processing speed of pressure and lOm/min is processed to remove the catalyst. Next, heat treatment was performed at 180 ° C, 1 hr, and nitrogen atmosphere. Next, a photoresist for metal etching was formed on the SUS surface of the laminate. Next, vaporized molten iron was used; the valley liquid was used as the surname, and the pattern was applied to the sus surface via the photoresist pattern, and then the photoresist pattern was peeled off to obtain a laminated substrate 6-1 for an electronic component. [Example 6-2] In Example 6-1, 'the catalyst removal step was performed in place of the wet blasting,' was carried out by MACUDIZER 9204 (manufactured by Japan MacDermid Co., Ltd.), and the solution was immersed at a liquid temperature of 35 ° C. 1 minute, washed with water, by MACUDIZER9275 (made by Japan MacDermid Co., Ltd.), immersed for 2 minutes at a liquid temperature of 75 ° C, washed with water, by MACUDIZER 9279 (manufactured by Japan MacDermid Co., Ltd.) at 43 ° C, dipped for 1 minute, washed with water. After that, the step of drying the catalyst to remove the catalyst was carried out, and 101111300 143 201248740 was carried out in the same manner as in Example 6-1 to produce a laminated substrate 6-2 for electronic components. [Example 6-3] The polyimine precursor solution was placed on the SUS surface side of the above-mentioned electronic component laminated substrate 6-1! After hardening, the medium thickness of sus is ι〇μιη, coated by a die coater, dried in an oven at 80 (for 60 minutes in a rc oven), and then on a polyimide film. After drying the photoresist using a dry film photoresist and developing it, the polyimide film was peeled off, and the photoresist pattern was peeled off, and heat-treated at 35 (rc for 1 hour) in a nitrogen atmosphere (temperature up rate l〇° C/min, which is naturally cooled, and a laminated substrate 6-3 for an electronic component in which an insulating layer (second layer) made of polyimide is patterned in such a manner that the through-hole portion is removed. [Example 6-4] On the SUS surface side of the above-mentioned laminated board 6-2 for electronic components, the polythenimine precursor solution 1 is cured, and the thickness of the sus upper film is 1 ,, and the die coater is used. The coating was carried out in an oven at 80° C. for 60 minutes. Thereafter, a photoresist was formed on the polyimide film precursor using a dry film photoresist, and development was carried out while simultaneously making the polyimide. After the amine precursor film was developed, the photoresist pattern was peeled off and heat-treated at 350 ° C under a nitrogen atmosphere. j hours (heating rate l〇°C/min, natural cooling), and an electronic component in which the insulating layer (second layer) composed of polyimide is patterned in such a manner that the through-hole portion is removed Laminated substrate 6_4. [Example 7-1] 101111300 144 201248740 A metal substrate made of SUS (thickness 18) and an insulating layer (first layer) made of polyimine (slice 10 (4) thick) a laminated substrate of a conductive layer (thickness 9 μm) composed of Cu (Fig. 19 (a)). A photoresist for metal silver etching is formed on the SUS surface of the laminated substrate. Next, an aqueous solution of iron oxide is used as a rice engraving solution. After the pattern is patterned by the photoresist pattern, the photoresist pattern is removed (Fig.). Then, the photosensitive polyimide resin composition 3 is cured on the SUS surface side to a thickness of 1 G. The handsome method is difficult to apply the coating in a thief oven and dried in the atmosphere for 60 minutes (Fig. 19(c)). Thereafter, using a hand scale machine through a reticle, 500mW is patterned by a high pressure mercury lamp. The exposure is followed by heating in steps of 1 。 minutes. By coating the film by mixing four f Hydrogenated money 2 38% by weight aqueous solution and isopropanol according to 9.1. After the 'grain solution is developed, under nitrogen environment, according to 35 (TC heat treatment 1 m (liter speed i〇C / min, natural The cooling layer is obtained, and the insulating layer (the second layer) composed of the polyimide is patterned to remove the through-hole portion for forming the conductive portion (the second layer) is patterned (polyimide-unrecorded steel laminate) Fig. 19(d)). Using the patterned insulating layer (second layer) as a mask, the insulating layer (layer 1) was made using polyimine imitation liquid TPE-3000 (manufactured by Toray Engineering Co., Ltd.). Etching (Fig. 19(e)). For the produced polyaniline non-recorded steel laminate, according to the pressure of 25Pa ~ 30Pa, process gas division 3 / 〇 2 = 1〇% / 9〇%, after the frequency treatment' Adding 101111300 145 201248740 to the sulfuric acid steel and adding the 101111300 145 201248740 agent (CU-BRITE (made by 茗 UD YUTE Co., Ltd.), the electricity is used as the power supply layer at room temperature. The plating was carried out for 12 minutes under conditions of 2A/dm2 to form a conductive portion (Fig. 19(f)). Next, a metal-defining photoresist was produced on the surface of the polyimine-insoluble steel laminate. Then, using a vaporized iron aqueous solution as an etching solution, the Cu surface is subjected to pattern etching so that the electrode made of Cu remains through the photoresist pattern, and then the photoresist pattern is removed to obtain a laminated substrate for electronic components 7_丨 ( Figure 19 (g)). [Example 7-2] In the same manner as in the above Example 7-1, a laminate in which the SUS surface was patterned was formed (Fig. 19 (b)). Next, the polyimide polyimide precursor solution was hardened on the SUS surface side, and then the film thickness of the SUS was 10 μm, coated by a die coater, and dried in an 80 ° oven for 6 minutes in the air. (Fig. 19(4)). Thereafter, a photoresist is formed on the polyimide film by using a dry film photoresist, and development is carried out while developing the polyimide film, and then the photoresist pattern is removed, and the film is removed at 350° in a nitrogen atmosphere. C is heat-treated for 1 hour (heating rate is 1 〇 it/min, naturally let cool), and an insulating layer (second layer) composed of polyimine is obtained in such a manner that the through-hole portion for forming the conductive portion is removed. The patterned polyimide and non-recorded steel laminate (Fig. 19(d)). Then, in the same manner as in the above Example 8-1, a laminated substrate 7-2 for an electronic component was obtained. 101111300 146 201248740 [Example 7-3] In the same manner as in the above Example 7-1, a laminate in which the SUS surface was patterned was formed (Fig. 19 (b)). Next, the polyimine precursor solution 12 was applied onto the SUS surface side by a die coater, and dried in an atmosphere of 8 (TC oven for 60 minutes in a TC oven. Thereafter, under a nitrogen atmosphere, 350 Heat treatment at °C for 1 hour (heating rate 丨〇°c/

分鐘’自然放冷)(圖19(c))。接著，從聚醯亞胺面側照射YAG 雷射’形成貫通孔於2層之絕緣層，而得到依導通部形成用之貫通孔部分被去除之方式使由聚醯亞胺所構成之2層絕緣層被圖案化的聚醯亞胺-不銹鋼積層體（圖19(e))。其後’與上述實施例7_丨同樣進行而得到電子元件用積層基板8-3。 [表面平垣性之評價] 針對下述3種類評價表面平坦性。 L藉塗佈所形成之聚醯亞胺(PI)面（實施例2-1-1〜2-2_3、實施例 3 -1 〜1 ο 、貫3&例4-1〜4-3、實施例5-1-1〜5-2-3、實施例 7-1〜7-3) 2·由PI-Cu之積層體藉Cu蝕刻所形成之ρι面（實施例卜實施例6-1〜6-4) US之積層體藉sus餘刻所形成之pi面（比較例） 101111300 147 201248740 [表7] --- 表面粗度Ra(nm) (測定區域ΙΟμιηο) ____ 塗佈所形成之PI面 1.2 ___ Lu蚀刻後之pi面 8.4 __^ SUS蝕刻後之PI面 73.1 ____ SUS箔 71.9 __ [有機EL顯示裝置之實施例] 藉由貫施例4-1記載之方法，準備下述基板A :於15〇mm xl50mm基板上，將15〇μιη0之導通部依225μιη間隔，形成縱240個、橫320個，於背面側具有形成了銅佈線的導通部。接著，使用金屬遮罩，對導通部進行遮置，並於具有導通部之基板Α之聚醯亞胺上，藉由DC濺鍍法（成膜壓力〇.2Pa(氬）、投入電力1kw、成膜時間10秒)依厚5nm形成作為第1密黏層之鋁膜。接著，藉由RF磁控濺鍍法(成膜壓力0.3Pa(氬：氧=3 : 1)、投入電力2kw、成膜時間3〇分鐘) 依厚100nm形成作為第2密黏層之氧化矽膜。於上述具有導通部之基板A的中央部之l2〇mmxl20mm 之區域製作底閘極•底接觸構造之TFT。首先，將厚100nm 之賴成膜作為閘極電極難，縣刻法形成光_案後以構酸溶液進行濕式_，將域_化為既定圖案而形成問極電極及閘極導線。_導線係形成為使導通部與閘極電極連接。接著，依被覆該間極電極之方法整面地形成厚獅⑽ 之氧化石夕作為間極絕緣膜。該間極絕緣膜係使用RF磁控濺 101111300 148 201248740 鍍裝置，於6吋之Si02鍍靶依投入電力·· l.〇kW(=3W/cm2；)、壓力：l.OPa、氣體：氬+〇2(50%)之成膜條件所形成。其後，藉光刻法形成光阻圖案後進行乾式蝕刻，實施閘極絕緣臈之圖案化。接著，於閘極絕緣膜上之整面蒸鍍厚100nm之鈦膜、鋁膜、IZO膜以作用源極電極、源極導線及汲極電極後，於藉光刻法形成光阻圖案後，藉過氧化氫水溶液、磷酸溶液連續地進行濕式蝕刻，將鈦膜圖案化為既定圖案而形成源極電極、源極導線及汲極電極。源極導線係形成為使導通部與源極電極連接。此時，源極電極及汲極電極係形成為在閘極絕緣膜上且離開至閘極電極之中央部正上方以外的圖案。接著，依被覆源極電極及汲·極電極的方式，整面地將In : Ga: Zn為1:1:1之InGaZnO系非晶型氧化物薄膜(inGaZn04) 形成為厚25nm。非晶型氧化物薄膜係使用RF磁控濺鍍裝置’於室溫(25。〇、將Ar : 02設為30 : 50的條件下，使用 4忖之InGaZnO(In : Ga : Zn=l : 1 : 1)鍍乾而形成。其後，於非晶型氧化物薄膜上藉光刻形成光阻圖案後，以草酸溶液進行濕式蝕刻’對該非晶型氧化物薄膜進行圖案化，形成由既定圖案所構成之非晶型氧化物薄膜。如此所得之非晶型氧化物薄膜係形成為於閘極絕緣膜上且依兩側接觸源極電極及沒極電極’並跨越該源極電極及汲極電極。接著，依被覆全體的方式，以RF磁控濺鍍法形成厚l〇〇nm之氧化矽作為保s蒦膜後，藉光刻法形成光阻圖案後施行乾式蝕刻。於大氣 101111300 149 201248740 中施行300°C、1小時之退火後，使用丙烯酸系之正型光阻形成EL之隔壁層，製作TFT基板。於上述TFT基板上依成為白色之方式蒸鍍el層後，蒸鍍 IZO膜作為電極，使用遮阻薄膜進行EL之密封，而製成可撓性對角5.9叶、解析度68dpi、320x240之主動矩陣驅動之單色EL顯示器。接著’於事先形成於背面的佈線部’安裝控制用之1C，針對所製成之單色EL顯示器，依掃瞄電壓 15V、β電壓 10V、電源電壓ιον確認作動。由針對所製成之單色El顯示器確認24小時之連續作動及製成後6個月後之作動，亦可確認基板之阻絕性。 [有機EL顯示裝置之比較例] 於縱 200mm、橫 l5〇mm、厚 100μηι 之 SUS304-HTA 板(小山鋼材公司製）上，使用上述聚醯亞胺前驅物溶液1，依醯亞胺化後之膜厚成為7μπ1±1μιη之方式藉模塗器進行塗佈，於100°c之加熱板供爐中，於大氣下乾燥6〇分鐘後，於氮環境下’依35〇t熱處理卜】、時(升溫速度1〇。〇/分鐘，自然放冷），形成聚酿亞胺層。接著，於聚醯亞胺層上，藉由濺鍍法(賴麼力G.2Pa(氬）、投人電力娜、朗時間1〇秒)依厚5nm形成作為第1密黏層之㈣。接著，藉由rf 磁控着法(成_力〇.3Pa(氬：氧=3 ·· 1}、投人電力咖、成膜時間3G分鐘)依厚刪請形成作為第2密㈣之氧化 101111300 150 201248740 矽膜。其後，除了於基板上部150mmxl5〇inm之區域，使各種佈線不連接至導通部’而連接至在設於基板表面側之基板下部剩餘之縱50mm，150mm之區域中所形成的佈線部以外°，其餘與上述元件之實施例同#進行，製駐動料驅動之單色EL顯示器。接著，於形成在表面的佈線部，安裝控制用之IC，針對所製成之單色EL顯示器，依掃瞄電壓15V、p電壓1〇v、電源電壓ιον確認作動。由針對所製成之單色EL顯示器確認24小時之連續作動及製成後6個月後之作動。 [評價] 藉由使用a又有導通部之基板作為元件所形成之電子元件用積層基板，則可將控制1C配置於背面，實現裝置的窄邊框化。 [有機EL元件之實施例] 藉由實施例4·1所記載之方法，如圖19(a)〜(f)所示般，於 400μιη<ί)之金屬層之開口部i3h内，形成2ΟΟμηι0之絕緣層貫通孔12h、第2絕緣層貫通孔l4h，於此等之絕緣層貫通孔12h及第2絕緣層貫通孔I4h中填充導通材料而形成導通部7。進而，在對Cu面進行圖案蝕刻時，形成銅佈線。該銅佈線係如圖19(g)所示般，依被覆400μιη(/)之金屬層之開口部13h的形式具有1〇〇〇μιη(/)之部分（圖中，由第2金 101111300 151 201248740 屬層16所示）者《如此，如圖28(a)、（b)所示般準備下述基板(B):於lOOmmxlOOmm之基板，分別設置作為陽極連接用的10個200μιη 0之透明電極層用導通部7b、作為陰極連接用的10個200μπΐ(ί)之背面電極層用導通部7a，具有於背面側（絕緣層2侧）形成銅佈線（陽極連接用佈線32b、陰極連接用佈線32a)之導通部。圖28(a)係由基板之第2絕緣層4 侧（表面側）觀看的平面圖，圖28(b)係由基板之絕緣層2側 (背面側)觀看的平面圖。圖28(a)中，以虛線所示區域E1係與有機EL元件之發光部接觸的部分。另外，準備於玻璃基板上使作為陽極之ITO被圖案化為 52mm寬之線狀的IT0基板。接著，於該IT〇基板上，將正型光阻(東京應化公司製TFRH)依乾燥膜厚成為Ιμιη之方式藉旋塗法予以塗佈後，以12〇°C烘烤2分鐘。其後，依發光區域成為50mm□之方式，經由光罩照射365nm之紫外光。對光阻使用有機鹼顯影液NMD3(東京應化公司製）進行顯影30秒後’以240¾進行烘烤30分鐘，而形成EL用絕緣層。接著，於該ITO基板上，於a_NPD(NN，-二[(丨-蔡基)_N，N’^苯基H，l’-聯苯基)-4,4，-二胺)與]^〇03之體積比為4 : 1、真空度1〇-5Pa的條件下，藉共蒸鍍，依丨从/⑽ 蒸鍍速度以膜厚成為4〇nm的方式進行成膜，形成電洞注入層。接著，將α·ΝΡΕ)於真空度l〇_5Pa之條件下，依l.〇A/sec 蒸錢速度以轉成為2Gnm之方式進行直空蒸鍍，形成電洞 101111300 152 201248740 輸送層。接著’使用Akb(參-(δ-經基酉昆琳)紹）作為基質材料，使用C545t作為綠色發光摻雜物，於上述電洞輸送層上，將A%及C545t，依C545t濃度成為3wt%的方式，於真空度l(T5Pa之條件下，以蒸鍍速度lA/sec藉真空蒸鍍進行成膜為35nm’形成發光層。接著，將Alqs於真空度i〇_5pa 條件下，以i.0A/sec蒸鍍速度進行真空蒸鍍為膜厚i〇nm，形成電子輸送層。接著，將Alqs及LiF藉共蒸鍍，於真空度l〇-5Pa之條件下，以蒸鍍速度〇 lA/sec藉真空蒸鍍成膜為15nm之厚度，形成電子注入層。最後，使用八丨作為陰極’於真空度1〇-5Pa之條件下，以5 〇A/sec蒸鍵速度進行真二蒸鑛為膜厚200nm。關於陽極(透明電極層24)與陰極（背面電極層22)，係如圖 28(c)所示般，形成為設置了具有導通部之基板B，並使透明電極層用導通部7b及背面電極層用導通部7a相對向。於圖 28(c)中，以虛線所示之區域E2為有機EL元件的發光部。於陰極之形成後，由真空蒸鍍裝置將有機EL元件搬送至設為水分濃度0.1ppm以下之氮環境下的手套箱中。又，將上述具有|通部的基板B於手套箱+進行加熱乾燥。其後，配置成使具有導通部之基板8之表面側與有機EL元件之险極侧相對向’位置對準成使具有導通部之基板B之陽極^ 接用之透明電極層用導通部與有機EL元件之陽極連接、使具有導通部之基板B之陰極連接用之背面電極層用導通部 101111300 153 201248740Minutes 'naturally cool' (Figure 19(c)). Next, the YAG laser was irradiated from the surface of the polyimide surface to form a through-hole in the insulating layer of the two layers, and the second layer composed of polyimine was obtained in such a manner that the through-hole portion for forming the conductive portion was removed. The polyimide layer was patterned with a polyimide layer and a stainless steel laminate (Fig. 19(e)). Thereafter, the laminated substrate 8-3 for electronic components was obtained in the same manner as in the above Example 7_丨. [Evaluation of Surface Flatness] Surface flatness was evaluated for the following three types. L by the coating of the polyimine (PI) surface formed (Examples 2-1-1 to 2-2_3, Examples 3-1 to 1 ο, 3 & Examples 4-1 to 4-3, implemented Examples 5-1-1 to 5-2-3, Examples 7-1 to 7-3) 2. The ρι surface formed by Cu etching of the PI-Cu laminate (Example 6-1 to Example 〜 6-4) The pi surface formed by the US laminate by sus residue (Comparative example) 101111300 147 201248740 [Table 7] --- Surface roughness Ra(nm) (Measurement area ΙΟμιηο) ____ PI formed by coating Surface 1.2 ___ Lu etched pi surface 8.4 __^ SUS etched PI surface 73.1 ____ SUS foil 71.9 __ [Example of organic EL display device] By the method described in Example 4-1, the following substrate A was prepared. On the 15 〇mm xl50 mm substrate, the conductive portions of 15 〇μηη0 were formed at intervals of 225 μm to form 240 vertical and 320 horizontal, and have conductive portions on which copper wirings were formed on the back side. Next, using a metal mask, the conductive portion is shielded and placed on the polyimide of the substrate having the conductive portion by DC sputtering (film formation pressure 〇 2 Pa (argon), input power 1 kw, The film formation time was 10 seconds. An aluminum film as a first dense layer was formed at a thickness of 5 nm. Then, by the RF magnetron sputtering method (film formation pressure: 0.3 Pa (argon: oxygen = 3:1), input power 2 kw, film formation time: 3 minutes), yttrium oxide as the second dense layer was formed at a thickness of 100 nm. membrane. A TFT having a bottom gate/bottom contact structure was formed in a region of l2 mmxl20 mm in the central portion of the substrate A having the conductive portion. First, it is difficult to form a film having a thickness of 100 nm as a gate electrode, and a light pattern is formed by a county method. Then, a wet solution is formed by an acid solution, and a domain is formed into a predetermined pattern to form a gate electrode and a gate electrode. The wire is formed such that the conduction portion is connected to the gate electrode. Next, the oxidized stone of the thick lion (10) is formed as a interlayer insulating film over the entire surface by the method of covering the interelectrode electrode. The interlayer insulating film is an RF magnetron sputtering 101111300 148 201248740 plating device, and the input voltage of the Si02 plating target of 6 · is 〇〇 ( (= 3 W / cm 2 ;), pressure: l. OPa, gas: argon + 〇 2 (50%) formed by film formation conditions. Thereafter, a photoresist pattern is formed by photolithography, and then dry etching is performed to pattern the gate insulating layer. Then, a titanium film, an aluminum film, and an IZO film having a thickness of 100 nm are deposited on the entire surface of the gate insulating film to act as a source electrode, a source wire, and a drain electrode, and then a photoresist pattern is formed by photolithography. The wet etching is continuously performed by a hydrogen peroxide aqueous solution or a phosphoric acid solution, and the titanium film is patterned into a predetermined pattern to form a source electrode, a source wire, and a drain electrode. The source lead is formed to connect the conductive portion to the source electrode. At this time, the source electrode and the drain electrode are formed in a pattern other than directly above the central portion of the gate electrode on the gate insulating film. Then, an InGaZnO-based amorphous oxide film (inGaZn04) having In:Ga:Zn of 1:1:1 was formed to have a thickness of 25 nm over the entire surface so as to cover the source electrode and the gate electrode. The amorphous oxide film was formed using an RF magnetron sputtering apparatus at room temperature (25 Å, Ar: 02 was set to 30:50, and 4 Å of InGaZnO (In : Ga : Zn=l : 1 : 1) formed by plating dry. Thereafter, a photoresist pattern is formed on the amorphous oxide film by photolithography, and then the amorphous oxide film is patterned by wet etching with an oxalic acid solution to form An amorphous oxide film formed by a predetermined pattern. The amorphous oxide film thus obtained is formed on the gate insulating film and contacts the source electrode and the electrodeless electrode 'on both sides and across the source electrode and Next, a ruthenium oxide having a thickness of 10 nm is formed as a samarium film by RF magnetron sputtering in a manner of coating the entire surface, and then a photoresist pattern is formed by photolithography, followed by dry etching. 101111300 149 201248740 After performing annealing at 300 ° C for 1 hour, a TFT substrate is formed by forming an EL barrier layer using an acrylic positive photoresist. The el layer is vapor-deposited on the TFT substrate in a white form, and then steamed. IZO film is used as an electrode, and a blocking film is used for EL density. A monochromatic EL display that is driven by an active matrix with a flexible diagonal of 5.9 leaves, a resolution of 68 dpi, and a resolution of 320 x 240. Next, '1C for control is mounted on the wiring portion previously formed on the back surface, for the prepared single The color EL display is activated according to the scanning voltage of 15V, β voltage of 10V, and the power supply voltage ιον. It can be confirmed by confirming the continuous operation for 24 hours and the operation after 6 months after the production. [Comparative example of the substrate] [Comparative example of the organic EL display device] The above-mentioned polyimine precursor solution 1 was used on a SUS304-HTA plate (manufactured by Hill Steel Co., Ltd.) of 200 mm in length, 15 mm in width, and 100 μm in thickness. After the imidization, the film thickness is 7μπ1±1μηη, and the coating is applied by a die coater, and then heated in a furnace at 100° C., dried in the atmosphere for 6 minutes, and then subjected to a nitrogen atmosphere. t heat treatment, when (heating rate of 1 〇. 〇 / min, naturally let cool), forming a layer of polyimine. Then, on the layer of polyimine, by sputtering method (Lai Mo Li G.2Pa (argon), investment in power Na, lang time 1 〇 second) formed by thickness 5nm It is the first dense layer (4). Then, by rf magnetron control method (成_力〇.3Pa (argon: oxygen = 3 · · 1}, investment power coffee, filming time 3G minutes) The oxide film 101111300 150 201248740 is formed as the second dense layer (4). Thereafter, in addition to the upper portion of the substrate 150 mm×l 5 〇inm, various wirings are not connected to the conductive portion ′ and are connected to the lower portion of the substrate provided on the surface side of the substrate. In the vertical direction of 50 mm and 150 mm, the wiring portion other than the wiring portion is formed, and the other embodiment is the same as the above-described device, and a monochromatic EL display driven by a carrier is used. Next, an IC for control is mounted on the wiring portion formed on the surface, and the operation is confirmed for the monochrome EL display produced by the scanning voltage 15V, the p voltage 1〇v, and the power supply voltage ιον. The continuous operation for 24 hours was confirmed for the monochrome EL display produced and the operation was performed 6 months after the production. [Evaluation] By using a laminated substrate for electronic components formed by using a substrate having a via portion as a device, the control 1C can be placed on the back surface, and the narrow side frame of the device can be realized. [Example of Organic EL Element] By the method described in Example 4·1, as shown in Figs. 19(a) to (f), 2ΟΟμηι0 was formed in the opening i3h of the metal layer of 400 μm The insulating layer through hole 12h and the second insulating layer through hole 14h are filled with a conductive material through the insulating layer through hole 12h and the second insulating layer through hole I4h to form the conductive portion 7. Further, when pattern etching is performed on the Cu surface, a copper wiring is formed. As shown in Fig. 19 (g), the copper wiring has a portion of 1 〇〇〇 μη (/) in the form of an opening 13h covering a metal layer of 400 μm (/), in the figure, by the second gold 101111300 151. As shown in Fig. 28 (a) and (b), the following substrate (B) was prepared as shown in Fig. 28 (a) and (b): 10 substrates of 100 μm 0 for anode connection were provided. The electrode layer-use conductive portion 7b and the ten-electrode-side conductive layer 7a for the cathode connection have a copper wiring (the anode connection wiring 32b and the cathode connection) on the back surface side (the insulating layer 2 side). The conductive portion of the wiring 32a). Fig. 28 (a) is a plan view seen from the second insulating layer 4 side (surface side) of the substrate, and Fig. 28 (b) is a plan view seen from the insulating layer 2 side (back side) of the substrate. In Fig. 28(a), a region E1 indicated by a broken line is a portion in contact with the light-emitting portion of the organic EL element. Further, an ITO as an anode was patterned on a glass substrate to form a linear 0 mm substrate. Then, on the IT substrate, a positive photoresist (TFRH manufactured by Tokyo Ohka Co., Ltd.) was applied by spin coating so that the dry film thickness became Ιμηη, and then baked at 12 ° C for 2 minutes. Thereafter, ultraviolet light of 365 nm was irradiated through the photomask so that the light-emitting region became 50 mm square. The organic alkali developing solution NMD3 (manufactured by Tokyo Ohka Co., Ltd.) was used for the development of the photoresist for 30 seconds, and then baked at 2,403⁄4 for 30 minutes to form an insulating layer for EL. Next, on the ITO substrate, a_NPD(NN,-bis[(丨-Caiji)_N,N'^phenyl H,l'-biphenyl)-4,4,-diamine) and ]^ 〇03 has a volume ratio of 4:1 and a vacuum of 1〇-5Pa. By co-evaporation, film formation is carried out at a vapor deposition rate of /(10) at a film thickness of 4 〇nm to form a hole injection. Floor. Next, α·ΝΡΕ) was subjected to direct vapor deposition at a vacuum degree of l〇_5 Pa at a vaporization rate of l.〇A/sec to form 2Gnm to form a hole 101111300 152 201248740 transport layer. Then use 'Akb (parameter-(δ- 酉酉酉)) as the matrix material, use C545t as the green luminescent dopant, and on the above-mentioned hole transport layer, A% and C545t, according to the concentration of C545t, become 3wt In the % method, the light-emitting layer was formed by vacuum deposition at a deposition rate of 1 A/sec at a vapor deposition rate of 1 A/sec to form a light-emitting layer. Then, Alqs was subjected to a vacuum degree i〇_5pa to i.0A/sec vapor deposition rate is vacuum-deposited to a film thickness i〇nm to form an electron transport layer. Then, Alqs and LiF are co-deposited at a vacuum degree of l〇-5Pa at a vapor deposition rate. 〇lA/sec is formed by vacuum evaporation to a thickness of 15 nm to form an electron injecting layer. Finally, using barium as a cathode 'under vacuum conditions of 1 〇 to 5 Pa, 5 〇A/sec steaming speed is used for true The second vaporized bed has a film thickness of 200 nm. The anode (transparent electrode layer 24) and the cathode (back electrode layer 22) are formed to have a substrate B having a conductive portion as shown in Fig. 28(c), and are transparent. The electrode layer conductive portion 7b and the back electrode layer conductive portion 7a face each other. In Fig. 28(c), the area E2 indicated by a broken line is After the formation of the cathode, the organic EL element is transferred to a glove box in a nitrogen atmosphere having a water concentration of 0.1 ppm or less by a vacuum vapor deposition apparatus. Further, the substrate having the above-mentioned portion is provided. B is heated and dried in the glove box +. Thereafter, the surface side of the substrate 8 having the conductive portion is arranged to be aligned with the dangerous electrode side of the organic EL element so that the anode of the substrate B having the conductive portion is connected The conductive portion for the transparent electrode layer is connected to the anode of the organic EL element, and the conductive portion for the back electrode layer for connecting the cathode of the substrate B having the conductive portion is 101111300 153 201248740

與有機EL元件之陰極連接、使有機EL·元件之發光部與具有導通部之錢B找緣層連接，在使具有導通部之基板B HEL %件導通後，予以貼合。對具有導通部之基化，得到有機扯⑽。錢料脂，藉紫外線使其硬【圖式簡單說明】圖1為表示本發明之電子元剖面圖及平面圖，積層基板之一例的概略圖2為表示本發明之電子元略剖面圖及平面圖。積層基板之其他例的概圖3為表示本發明之電子元略剖面圖。用積層基板之其他例的概圖4為表示本發明之電子元略剖面圖。用積層基板之其他例的概圖5為表示本發明之電子_ 略剖面圖及平面圖。件用積層基板之其他例的概元件（電；- %件部為有機EL元件圖6為表示本發明之電子元部的情況)之一例的概略剖面圖圖7為表示本發明之電子疋件（電子_ 部的情況)之其他例的概略剖面圖义件部為有機EL元件圖8為表示本發明之雷电子tl件用略剖面圖。層基板之其他例的概 101111300 154 201248740 圖9為表示本發明之電子_ ^ 义件（電子元件部為有機EL元件部的情況)之其他例的概略剖面_ 圖10為表示本發明之電 _ 略平面圖。元件用積層基板之其他例的概圖11為表示本發明之電子略平面圖。 &件用積層基板之其他例的概圖12為表示本發明之電子略平面圖 70件用積層基板之其他例的概圖13為表示本發明之電子略平面圖。 &件用積層基板之其他例的概圖14為表示本發明之電子_ 略平面圖。凡件用積層基板之其他例的概圖15為表示本發明之電子_ 略平面圖。疋件用積層基板之其他例的概圖16為表示本發明之電子_ 略剖面圖及平面圖。元件用積層基板之其他例的概圖17為表示本發明之電子_ 件部的情況)之其他例· Ρ件（電子元件部為錢EL元 % °1】面圖。圖18為表示本發明之電子_ 件部的情況)之其他例的概略電子元件部為有機EL元圖19為表示本發明之電子_ . 其他例的步驟圖。 %件用積層基板之製造方法的 101111300 155 201248740 圖20為表示本發明之電子元件用積層基板之製造方法的其他例的步驟圖。圖21為表示本發明之電子元件（電子元件部為有機EL元件部的情況)之其他例的概略剖面圖。圖22為表示本發明之電子元件（電子元件部為有機EL元件部的情況)之其他例的概略剖面圖。圖23為表示本發明之電子元件用積層基板之製造方法的一例的步驟圖。圖24為表示本發明之電子元件用積層基板之製造方法的其他例的步驟圖。圖25為表示本發明之電子元件用積層基板之製造方法的其他例的步驟圖。圖26為表示本發明之電子元件用積層基板之製造方法的其他例的步驟圖。圖27為表示本發明之電子元件用積層基板之製造方法的其他例的步驟圖。圖28為表示本發明之電子元件用積層基板之其他例的概略平面圖。【主要元件符號說明】 1 電子元件用積層基板 2 絕緣層 3 金屬層 101111300 156 201248740 4 第2絕緣層 5 電極·佈線 6 第1導通部 7 導通部 7a 背面電極層用導通部 7b 透明電極層用導通部 7g 閘極導線用導通部 7s 源極導線用導通部 8 導通部用金屬部 9 密黏層 10 第2導通部 11a 金屬層露出區域 lib 金屬層露出區域 12h 絕緣層貫通孔 13h 金屬層之開口部 13s 金屬層之圖案之端部 14h 第2絕緣層貫通孔 15 被覆層 16 第2金屬層 17 第3金屬層 19h 密黏層之開口部 20 有機EL元件部 101111300 157 201248740 21 有機EL元件 22 背面電極層 23 EL層 24 透明電極層 25 透明密封基板 26 密封部 27 透明基板 30 電子元件部 32a 陰極連接用佈線 32b 陽極連接用佈線 32g 閘極導線 32s 源極導線 32x X佈線 32y y佈線 33 佈線 35 驅動器（控制1C) 53 金屬層 55 金屬膜 56 金屬膜 57 金屬層 El 虛線所示區域 E2 虛線所不區域 101111300 158 201248740 L 發光 101111300 159The cathode of the organic EL element is connected, the light-emitting portion of the organic EL element is connected to the edge portion B having the conductive portion, and the substrate B HEL % having the conductive portion is turned on and then bonded. For the base with the conduction portion, organic entanglement (10) is obtained. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a cross-sectional view and a plan view showing an electron element of the present invention, and an outline of an example of a laminated substrate. Fig. 2 is a schematic cross-sectional view and a plan view showing an electronic unit according to the present invention. Fig. 3 of another example of a laminated substrate is a schematic cross-sectional view showing an electronic unit of the present invention. Fig. 4, which is another example of a laminated substrate, is a schematic cross-sectional view showing an electronic unit of the present invention. Fig. 5, which is another example of a laminated substrate, is a cross-sectional view and a plan view showing an electron of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 7 is a schematic cross-sectional view showing an example of another example of a laminated substrate (an electronic component is an organic EL device; FIG. 6 is a view showing an electronic component of the present invention). FIG. 7 is a view showing an electronic component of the present invention. (Embodiment of the electronic portion) is a schematic cross-sectional view of the organic EL device. Fig. 8 is a schematic cross-sectional view showing the lightning electron t1 of the present invention. FIG. 9 is a schematic cross-sectional view showing another example of the electronic component of the present invention (when the electronic component portion is an organic EL device portion). FIG. 10 is a view showing another example of the present invention. Slightly floor plan. Fig. 11 of another example of a laminated substrate for an element is an electronic plan view showing the present invention. FIG. 12 is a schematic plan view showing another embodiment of the laminated substrate for the present invention. FIG. 13 is a schematic plan view showing the electronic structure of the present invention. Fig. 14 of another example of a laminated substrate for a device is a schematic plan view showing an electron of the present invention. Fig. 15 of another example of a laminated substrate for a piece of material is a schematic view showing an electron of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 16 is a cross-sectional view and a plan view showing an electron according to another embodiment of the present invention. FIG. 18 is a view showing another example of the case where the electronic component unit of the present invention is shown in FIG. 17 (the electronic component portion is a money EL element %°1). FIG. The electronic component part of the other example of the case of the electronic component is an organic EL element. FIG. 19 is a step diagram showing an electron of the present invention. 101111300 155 201248740 A method of manufacturing a laminated substrate for a device is shown in FIG. 20 is a flow chart showing another example of the method for producing a laminated substrate for an electronic component of the present invention. Fig. 21 is a schematic cross-sectional view showing another example of the electronic component of the present invention (when the electronic component portion is an organic EL element portion). Fig. 22 is a schematic cross-sectional view showing another example of the electronic component of the present invention (when the electronic component portion is an organic EL element portion). Fig. 23 is a flow chart showing an example of a method of manufacturing a laminated substrate for an electronic component of the present invention. Fig. 24 is a flow chart showing another example of the method for producing a laminated substrate for an electronic component of the present invention. Fig. 25 is a flow chart showing another example of the method for producing a laminated substrate for an electronic component of the present invention. Fig. 26 is a flow chart showing another example of the method for producing a laminated substrate for an electronic component of the present invention. Fig. 27 is a flow chart showing another example of the method for producing a laminated substrate for an electronic component of the present invention. Fig. 28 is a schematic plan view showing another example of the build-up substrate for an electronic component of the present invention. [Description of main component symbols] 1 Multilayer substrate 2 for electronic components Insulation layer 3 Metal layer 101111300 156 201248740 4 Second insulating layer 5 Electrode/wiring 6 First conductive portion 7 Conducting portion 7a Conducting portion for back electrode layer 7b For transparent electrode layer Conduction portion 7g Conductor for gate wire 7s Conductor for source wire 8 Metal portion for conductive portion 9 Adhesive layer 10 Second conductive portion 11a Metal layer exposed region lib Metal layer exposed region 12h Insulating layer through hole 13h Metal layer Opening portion 13s End portion 14h of the metal layer pattern Second insulating layer through hole 15 Coating layer 16 Second metal layer 17 Third metal layer 19h Opening portion 20 of the adhesive layer Organic EL element portion 101111300 157 201248740 21 Organic EL element 22 Back electrode layer 23 EL layer 24 Transparent electrode layer 25 Transparent sealing substrate 26 Sealing portion 27 Transparent substrate 30 Electronic component portion 32a Cathodic connection wiring 32b Anode connection wiring 32g Gate wire 32s Source wire 32x X wiring 32y y wiring 33 wiring 35 drive (control 1C) 53 metal layer 55 metal film 56 metal film 57 metal layer El virtual FIG 101111300 158 201248740 L is not a light emitting region E2 region dashed lines 101,111,300,159

Claims

201248740 七、申請專利範圍： 1. 一種電子元件用積層基板，係用於電子元件者，其特徵為具有· 具有絕緣層貫通孔的絕緣層；填充於上述絕緣層貫通孔的第1導通部；於上述絕緣層上形成為圖案狀，於上述第1導通部上具有開口部的金屬層；與形成於上述電子元件用積層基板之厚度方向上，導通上述電子元件用積層基板之表背，至少具有上述第1導通部的導通部；上述導通部並未與上述金屬層導通。 2. 如申請專利範圍第1項之電子元件用積層基板，其中，上述絕緣層含有聚醯亞胺。 3. 如申請專利範圍第2項之電子元件用積層基板，其中，上述絕緣層係以聚醯亞胺作為主成分。 4. 如申請專利範圍第1至3項中任一項之電子元件用積層基板，其中，上述絕緣層之吸濕膨脹係數為 0ppm/%RH〜15ppm/%RH 的範圍内。 5. 如申請專利範圍第1至4項中任一項之電子元件用積層基板，其中，上述絕緣層之線熱膨脹係數為0ppm/°C 〜30ppm/°C之範圍内。 6. 如申請專利範圍第1至5項中任一項之電子元件用積層 101111300 160 201248740 基板，其中，上述絕緣層之線熱膨脹係數與上述金屬層之線熱膨脹係數的差為15ppm/〇c以下。 7. 如申請專利範圍第1至6項巾任-項之電子元件用積層基板’其中，上述金屬層之線熱膨脹係數為〇ppm/<t〜25ppm/ °C的範圍内。 8. 如申請專利範圍第1至7項中任一項之電子元件用積層基板其中，上述金屬層之圖案端部由被覆層所絕緣。 9. 如申請專利範ϋ第1至8項中任-項之電子元件用積層基板，其中，上述金屬層所形成之區域整體的面積，係在將上述電子元件用積層基板整體之面積設為100%時，為80% 以上且未滿100%。 10·如申請專利範圍第丨至9項中任_項之電子元件用積層基板’其中，進一步具有形成於上述金屬層之開口部内、並配置於上述導通部上、由與上述金屬層相同之材料所構成的導通部用金屬部，邛上述導通部係具有上述第1導通部與上述導通部用金屬 η.如申請專·圍第1G項之電衫制積層基板，其中’進一步具有形成於上述金屬層上、配置於上述導通部用金屬部上之具有第2絕緣層貫通孔的第2絕緣層。 12·如申請專利範圍第u項之電子元件用積層基板，里 _，進一步具有填充於上述第2絕緣層貫通孔的第2導通部， 101111300 161 201248740 上述導通部係具有上述第1導通部與上述導通部用金屬部與上述第2導通部。 13. 如申請專利範圍第1至9項中任一項之電子元件用積層基板，其中，進一步具有形成於上述金屬層上、配置於上述第1導通部上之具有第2絕緣層貫通孔的第2絕緣層，與填充於上述第2絕緣層貫通孔的第2導通部，上述導通部係具有上述第1導通部與上述第2導通部。 14. 如申請專利範圍第11至13項中任一項之電子元件用積層基板，其中，上述金屬層之圖案端部由上述絕緣層或上述第2絕緣層所絕緣。 15. 如申請專利範圍第11至14項中任一項之電子元件用積層基板，其中，進一步具有形成於上述第2絕緣層上、配置成被覆上述金屬層之開口部、與上述第2導通部導通的第 3金屬層。 16. 如申請專利範圍第1至15項中任一項之電子元件用積層基板，其中，進一步具有形成在上述絕緣層之與上述金屬層側為相反側的面、配置成被覆上述金屬層之開ΰ部、與上述第1導通部導通的第2金屬層。 17. 如申請專利範圍第11至15項中任一項之電子元件用積層基板，其中，上述第2絕緣層含有聚醯亞胺。 18. 如申請專利範圍第17項之電子元件用積層基板，其中，上述第2絕緣層係以聚醯亞胺作為主成分。 101111300 162 201248740 19. 如申請專利範圍第1至18項中任一項之電子元件用積層基板，其中，於上述絕緣層之與上述金屬層側為相反側的面上，形成含有無機化合物的密黏層。 20. —種電子元件，其特徵為具有：申請專利範圍第1至19項中任一項之電子元件用積層基板；形成於上述電子元件用積層基板之絕緣層上的電子元件部，與配置於上述電子元件部上的透明密封基板。 21. 如申請專利範圍第20項之電子元件，其中，上述電子元件部為薄膜電晶體元件部。 22. 如申請專利範圍第20項之電子元件，其中，上述電子元件部係具有形成於上述絕緣層上之背面電極層、形成於上述背面電極層上且至少含有有機發光層的電致發光層、與形成於上述電致發光層上之透明電極層的有機電致發光元件部；上述電子元件用積層基板之導通部係具有連接於上述透明電極層之透明電極層用導通部、與連接於上述背面電極層之背面電極層用導通部。 23. 如申請專利範圍第20項之電子元件，其中，上述電子元件部係具有形成於上述絕緣層上之背面電極層、形成於上述背面電極層上之顯示層、與形成於上述顯示層上之透明電 101111300 163 201248740 極層的電子紙元件部；上述電子元件用積層基板之導通部係具有連接於上述透明電極層之透明電極層用導通部、與連接於上述背面電極層之背面電極層用導通部。 24. —種有機電致發光顯示裝置，其特徵為具有：申請專利範圍第1至19項中任一項之電子元件用積層基板；形成於上述電子元件用積層基板之絕緣層上的薄膜電晶體元件部；具有形成於上述電子元件用積層基板之絕緣層上並連接於上述薄膜電晶體元件部的背面電極層、形成於上述背面電極層上並至少含有有機發光層的電致發光層、及形成於上述電致發光層上之透明電極層的有機電致發光元件部；與配置於上述有機電致發光元件部上之透明密封基板。 25. 一種電子紙，其特徵為具有：申請專利範1至19項巾任_項之電子元剌積層基板；形成於上述電子元件用積層基板之絕緣層上的薄膜電晶體元件部；具有形成於上述電子元件用積層基板之絕緣層上並連接於上述薄膜電晶體元件部的背面電極層、形成於上述背面電極層上之顯示層、及形成於上述顯示層上之透明電極層的電 101111300 164 201248740 子紙元件部；與配置於上述電子紙元件部上的透明密封基板。从一種電子元件用積層基板之製造方法，其特徵為具有：準備至少依序積層了絕緣層及金屬層之積層體的積層體準備步驟； ▲ 於上述絕緣層形成絕緣層貫通孔的絕緣層貫通孔形成步驟；與對上述金屬層進行圖案化，而同時形成於上述絕緣層貫通孔上，有開口部之金屬層、與配置於上述絕緣層貫通孔上之導通部用金屬部的金屬層圖案化步驟；依不同順序進行上述絕緣層貫通孔形成步驟及上述金屬層圖案化步驟。 27.如申請專利範圍第26項之電子元件用積層基板之製造方法，其中，於上述絕緣層貫通孔形成步驟後，於上述金屬層圖案化步驟之前或後，進一步具有於上述絕緣層貫通孔填充第1導通部的第1導通部形成步驟。 .如申μ專利範圍第26或27項之電子元件用積層基板之製造方法’其中，於上述金屬層圖案化形成步驟後，進一步具有於上述金屬層上形成第2絕緣層的第2絕緣層形成步驟、與於上述第2絕緣層上形成第2絕緣層貫通孔的第2 絕緣層貫通孔形成步驟；在上述絕緣層貫通孔形成步驟之前、後或同時，進行上述 101111300 165 201248740 第2絕緣層貫通孔形成步驟。 29.如申請專利範圍第28項之電子元件用積層基板之製造方法，其中，於上述第2絕緣層貫通孔形成步驟後，進一步具有於上述第2絕緣層貫通孔填充第2導通部的第2導通部形成步驟；在上述第1導通部形成步驟之前、後或同時，進行上述第 2導通部形成步驟。 101111300 166201248740 VII. Patent application scope: 1. A laminated substrate for an electronic component, which is used for an electronic component, characterized in that: an insulating layer having an insulating layer through-hole; and a first conductive portion filled in the insulating layer through-hole; a metal layer having an opening in the first conductive portion, and a front surface of the laminated substrate for the electronic component that is formed in the thickness direction of the electronic component multilayer substrate, at least a conductive portion having the first conductive portion; the conductive portion is not electrically connected to the metal layer. 2. The laminated substrate for electronic components according to claim 1, wherein the insulating layer contains polyimide. 3. The laminated substrate for electronic components according to the second aspect of the invention, wherein the insulating layer is made of polyimide. 4. The laminated substrate for electronic components according to any one of claims 1 to 3, wherein the insulating layer has a coefficient of hygroscopic expansion of 0 ppm/% RH to 15 ppm/% RH. 5. The laminated substrate for electronic components according to any one of claims 1 to 4, wherein the insulating layer has a linear thermal expansion coefficient in a range of from 0 ppm/°C to 30 ppm/°C. 6. The substrate 101111300 160 201248740 for an electronic component according to any one of claims 1 to 5, wherein a difference between a linear thermal expansion coefficient of the insulating layer and a linear thermal expansion coefficient of the metal layer is 15 ppm/cm or less. . 7. The laminated substrate for electronic components of the invention of claim 1 to 6 wherein the linear thermal expansion coefficient of the metal layer is in the range of 〇ppm/<t 25 ppm/°C. 8. The laminated substrate for an electronic component according to any one of claims 1 to 7, wherein the pattern end portion of the metal layer is insulated by a coating layer. 9. The laminated substrate for an electronic component according to any one of the first aspect of the invention, wherein the area of the entire region formed by the metal layer is set to an area of the entire laminated substrate for the electronic component. At 100%, it is 80% or more and less than 100%. The laminated substrate for electronic components according to any one of the above-mentioned claims, wherein the laminated substrate of the electronic component is further provided in the opening of the metal layer and disposed on the conductive portion, and is the same as the metal layer. a metal portion for a conductive portion formed of a material, wherein the conductive portion has the first conductive portion and the metal for the conductive portion η. a second insulating layer having a second insulating layer through-hole disposed on the metal portion of the conductive portion on the metal layer. 12. The laminated substrate for an electronic component according to the invention of claim 5, further comprising a second conductive portion filled in the through hole of the second insulating layer, 101111300 161 201248740, wherein the conductive portion has the first conductive portion and The conductive portion is a metal portion and the second conductive portion. The laminated substrate for electronic components according to any one of claims 1 to 9, further comprising a second insulating layer through hole formed in the metal layer and disposed on the first conductive portion The second insulating layer has a second conductive portion that is filled in the through hole of the second insulating layer, and the conductive portion has the first conductive portion and the second conductive portion. The laminated substrate for an electronic component according to any one of claims 11 to 13, wherein the pattern end portion of the metal layer is insulated by the insulating layer or the second insulating layer. The laminated substrate for electronic components according to any one of claims 11 to 14, further comprising an opening formed on the second insulating layer and disposed to cover the metal layer, and the second conductive portion The third metal layer that is turned on. The laminate substrate for an electronic component according to any one of the first aspect of the invention, further comprising a surface formed on the opposite side of the metal layer side of the insulating layer and disposed to cover the metal layer The opening portion and the second metal layer that is electrically connected to the first conductive portion. The laminate substrate for an electronic component according to any one of claims 11 to 15, wherein the second insulating layer contains polyimide. 18. The laminated substrate for electronic components according to claim 17, wherein the second insulating layer is made of polyimide. The laminate substrate for an electronic component according to any one of the first aspect of the invention, wherein the insulating layer has a surface containing an inorganic compound on a surface opposite to the side of the metal layer. Sticky layer. 20. An electronic component comprising: a laminated substrate for an electronic component according to any one of claims 1 to 19; and an electronic component portion formed on the insulating layer of the laminated substrate for the electronic component, and a configuration a transparent sealing substrate on the electronic component portion. 21. The electronic component of claim 20, wherein the electronic component portion is a thin film transistor component portion. 22. The electronic component according to claim 20, wherein the electronic component portion has a back electrode layer formed on the insulating layer, and an electroluminescent layer formed on the back electrode layer and containing at least an organic light-emitting layer And an organic electroluminescence device portion formed on the transparent electrode layer formed on the electroluminescent layer; the conduction portion of the multilayer substrate for the electronic component having a transparent electrode layer connection portion connected to the transparent electrode layer and connected to A conductive portion for the back electrode layer of the back electrode layer. 23. The electronic component according to claim 20, wherein the electronic component portion has a back electrode layer formed on the insulating layer, a display layer formed on the back electrode layer, and a display layer formed on the display layer The transparent electronic device 101111300 163 201248740 The electrode electronic component unit of the electrode layer; the conductive portion of the laminated substrate for the electronic component has a transparent electrode layer connecting portion connected to the transparent electrode layer and a back electrode layer connected to the back electrode layer Use the conduction part. An organic electroluminescence display device comprising: a laminate substrate for an electronic component according to any one of claims 1 to 19; and a thin film electricity formed on the insulating layer of the laminate substrate for the electronic component a crystal element portion; a back electrode layer formed on the insulating layer of the electronic device multilayer substrate and connected to the thin film transistor element portion; an electroluminescent layer formed on the back surface electrode layer and containing at least an organic light emitting layer, And an organic electroluminescence device portion formed on the transparent electrode layer on the electroluminescent layer; and a transparent sealing substrate disposed on the organic electroluminescent device portion. An electronic paper characterized by comprising: an electronic element germanium layer substrate of any one of claims 1 to 19; a thin film transistor element portion formed on an insulating layer of the above-mentioned electronic component laminated substrate; a back electrode layer connected to the thin film transistor element portion, a display layer formed on the back electrode layer, and a transparent electrode layer formed on the display layer on the insulating layer of the laminated substrate for electronic components. 164 201248740 A paper element portion; and a transparent sealing substrate disposed on the electronic paper element portion. A method for producing a laminated substrate for an electronic component, comprising: a step of preparing a laminated body in which a laminate of at least an insulating layer and a metal layer is laminated; ▲ an insulating layer forming an insulating layer through-hole in the insulating layer a hole forming step; and a metal layer pattern formed by patterning the metal layer and simultaneously forming the metal layer of the opening in the through hole of the insulating layer; and the metal portion for the conductive portion disposed on the through hole of the insulating layer The step of forming the insulating layer through hole and the step of patterning the metal layer are performed in different orders. [Claim 27] The method for producing a laminated substrate for an electronic component according to claim 26, further comprising the through hole of the insulating layer before or after the step of forming the insulating layer after the step of forming the insulating layer through hole The first conductive portion forming step of filling the first conductive portion. The method for producing a laminated substrate for an electronic component according to the invention of claim 26, wherein after the step of forming the metal layer, the second insulating layer having the second insulating layer formed on the metal layer a forming step and a second insulating layer through hole forming step of forming a second insulating layer through hole in the second insulating layer; and performing the 101111300 165 201248740 second insulating before, after or simultaneously with the insulating layer through hole forming step A layer through hole forming step. The method of manufacturing a laminated substrate for an electronic component according to the second aspect of the invention, wherein the second insulating layer through hole is filled with the second conductive portion after the second insulating layer through hole forming step 2 conductive portion forming step; the second conductive portion forming step is performed before, after or at the same time as the first conductive portion forming step. 101111300 166