201242073 六、發明說明： 【發明所屬之技術領域】 本發明係關於撓性高功率發光半導體裝置。 【先前技術】 習用發光半導體（LES)(包括發光二極體（led)及雷射二 極體）及LES裝置（LESD)以及含有LESD之封裝具有數個缺 點。尚功率LESD產生大量熱’該熱必須加以管理。熱管 理處理因熱耗散及熱應力產生之問題，目前此係限制發光 二極體之效能之一關鍵因素。 一般而言，LES裝置通常易於受損，該損害係由自裝置 内產生之熱的累積以及在外部照明應用之情形下來自陽光 之熱造成。過量熱累積可造成LES裝置中所用之材料（諸 如’ LESD之囊封劑）之劣化。在將LESD附接至挽性電路壓 層（其亦可包括其他電組件）時，極大地增大熱耗散問題。 另外，HLES裝置及封裝往往較厚，此限制其在低外 觀尺寸應用中之使用。目此，業内仍需要改良撓性㈣裝 置及封裝之設計以改良其熱耗散性f，以及容許其以低外 觀尺寸使用。 【發明内容】 :發明之至少一個態樣經由具有一薄介電質基板及她鄰 =導層之-撓性LESD構造為當前及未來高功率[娜構造 供一有成本效ϋ之熱管理解決方案撓性。高功率㈤陣 列之操作需要耗散大量埶$ # 之月“。根據本發明之至少一項 實施例’可藉由接近傳導材料定位撓性啦裝置之 I62148.doc 201242073 LESD(藉由控制介電質基板之整體（亦即，體）厚度）來管理 熱耗散8 諸多LED照射系統使用紅色、綠色及藍色LED之一組 合。在某些系統中’ LED必須係彼此毗鄰。本發明之至少 一項實施例允許不同類型之LED中之每一者獨立地熱連接 至散熱片以使得每一 led在一最佳溫度下操作。 本發明之至少一個態樣提供一種包含以下各項之物件： 一撓性熱耗散介電質層，其具有兩個主表面及最高約20微 米之一體厚度；一第一傳導層，其在該介電質層之—第一 主表面上，及一第二傳導層，其在該介電質層之一第二主 表面上，該第一傳導層具有包含至少一個傳導特徵之—圖 案；及至少-個發光半導體裝置（LESD)，其由該至少一個 傳導特徵支撐。 本發明之至少一個態樣提供一種包含以下各項之物件： 一撓性熱耗散介電質層，其具有第一主表面及第二主表 面、最高約職米之-體厚度及自該第一主表面延；之至 少-個突出部；-第-傳導層，其在該介電f層之該第一 主表面上’及-第二傳導層’其在該介電質層之該第二主 表面上； 该第一傳導層具有 叫盱彳付微〜一圃茱； 至少一個發光半導體裝置（LESD)，其s + ”，‘ 徵支撐；其中該至少一個突出部毗鄰至少一個。 本發明之至少一個態樣提供一種劍. ㈣作-撓性發光半& 裝置之方法，其包含：提供一埶耗 '耗散撓性介電質基板，^ 162148.doc -4 - 201242073 ， 熱耗散撓性介電質基板具有一第一主表面及一第二主表面 及最高約20微米之一體厚度且進一步具有在該第一主表面 上之第一傳導層及在該第二主表面上之一第二傳導層； 在該第一傳導層中形成至少一個傳導特徵；及 將一發光半導體直接或間接接合至該至少一個傳導特 徵。 ' 如本申請案中所用： 「體厚度」意指大部分介電質層之厚度； 「LES」意指發光半導體，包括發光二極體及雷射二極 體， 「LESD」意指發光半導體裝置，包括發光二極體裝置 及雷射二極體裝置。一 LESD可係一裸LES晶粒構造、一完 整經封裝LES構造，或包含多於裸晶粒，但少於一完整 LES封裝之所有組件的一中間LES構造，以使得術語les與 LESD可互換地使用且係指不同LES構造中之一者或全部。 術語「撓性LES裝置」或「撓性LESD」通常係指含有裸晶 粒發光半導體、經封裝LES構造或中間LES構造之撓性物 件。可適於在本發明之實施例中使用之類型之完整經封裝 LES構造之實例：Golden DRAGON LED(可自德國的201242073 VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a flexible high power light emitting semiconductor device. [Prior Art] Conventional light-emitting semiconductors (LES) (including light-emitting diodes (LEDs) and laser diodes) and LES devices (LESD) and packages containing LESD have several disadvantages. Still power LESD produces a lot of heat' that heat must be managed. Thermal management deals with problems due to heat dissipation and thermal stress, which is currently a key factor limiting the performance of light-emitting diodes. In general, LES devices are generally susceptible to damage resulting from the accumulation of heat generated within the device and from the heat of sunlight in the context of external lighting applications. Excessive heat build-up can cause degradation of materials used in LES devices, such as 'LESD's encapsulants. The heat dissipation problem is greatly increased when the LESD is attached to a pull-up circuit laminate (which may also include other electrical components). In addition, HLES devices and packages tend to be thicker, which limits their use in low profile applications. Accordingly, there is still a need in the industry to improve the design of flexible (4) devices and packages to improve their heat dissipation f and allow them to be used in low profile sizes. SUMMARY OF THE INVENTION At least one aspect of the invention is constructed for a current and future high power via a flexible LESD having a thin dielectric substrate and her neighboring layer. [Na's structure provides a cost effective thermal management solution. The flexibility of the scheme. The operation of the high power (five) array requires a large amount of 耗$# of the month. "At least one embodiment of the present invention can be used to position the flexible device by means of a conductive material. I62148.doc 201242073 LESD (by controlling the dielectric The overall (ie, body) thickness of the substrate is used to manage heat dissipation. 8 Many LED illumination systems use a combination of red, green, and blue LEDs. In some systems, 'LEDs must be adjacent to each other. At least the present invention. An embodiment allows each of the different types of LEDs to be independently thermally coupled to the heat sink such that each led operates at an optimal temperature. At least one aspect of the present invention provides an article comprising: a flexible heat dissipating dielectric layer having two major surfaces and a bulk thickness of up to about 20 microns; a first conductive layer on the first major surface of the dielectric layer, and a second a conductive layer on a second major surface of the dielectric layer, the first conductive layer having a pattern comprising at least one conductive feature; and at least one light emitting semiconductor device (LESD) conducted by the at least one At least one aspect of the present invention provides an article comprising: a flexible heat dissipating dielectric layer having a first major surface and a second major surface, a maximum body thickness of the body And at least one protrusion from the first major surface; a first conductive layer on the first major surface of the dielectric f layer and a second conductive layer on the dielectric a second main surface of the layer; the first conductive layer having a thickness of at least one light emitting semiconductor device (LESD), wherein the s + "," sign supports; wherein the at least one protrusion is adjacent at least one. At least one aspect of the present invention provides a method for a flexible light emitting half device, comprising: providing a lossy flexible dielectric substrate, ^ 162148.doc -4 - 201242073, The heat dissipating flexible dielectric substrate has a first major surface and a second major surface and a body thickness of up to about 20 microns and further having a first conductive layer on the first major surface and the second main a second conductive layer on the surface; forming at least one conductive feature in the first conductive layer; and bonding a light emitting semiconductor directly or indirectly to the at least one conductive feature. ' As used in this application: "body thickness" means the thickness of most dielectric layers; "LES" means light-emitting semiconductors, including light-emitting diodes and laser diodes, "LESD" means light-emitting semiconductors The device comprises a light emitting diode device and a laser diode device. A LESD may be a bare LES die configuration, a complete packaged LES configuration, or an intermediate LES configuration containing more than bare die, but less than all components of a complete LES package, such that the term les is interchangeable with LESD Used locally and refers to one or all of the different LES configurations. The term "flexible LES device" or "flexible LESD" generally refers to a flexible article comprising a bare crystalline light emitting semiconductor, a packaged LES construction, or an intermediate LES construction. An example of a complete packaged LES configuration of the type that may be suitable for use in embodiments of the present invention: Golden DRAGON LED (available from Germany)
OSRAM Opto Semiconductors GmbH 購得）；LUXI0N LED(可自美國的Philips Lumileds Lighting公司購得）；及 XLAMP LED(可自美國的Cree，Inc.購得）。 本發明之至少一項實施例之一優點係： 撓性LES裝置提供優良熱耗散，此特別適用於高功率 162148.doc 201242073 LESD。 薄介電質層可促進沿X、γ及z方向之熱分佈。 薄撓性介電質基板上之LESD可串聯、並聯或取決於所 需應用個別地線連接。 可以簡單或複合曲線使撓性LES裝置彎曲。 撓性LESD中之一撓性基板之使用消除與習用基台相關 聯之成本。 撓性LES裝置可給當前及未來高功率LESD構造提供一穩 健、有成本效益之熱管理解決方案。 本發明之上述發明内容並非意欲闡述本發明之每一所揭 不實施例或本發明之每一實施方案。下文之各圖及詳細說 明更特定地例示說明性實施例。 【實施方式】 在以下說明中，參照附圖，該等附圖形成本發明之說申 之一部分且其中以圖解說明方式展示數個具體實施例。肩 瞭解’涵蓋其他實施例’且可在不背離本發明之範鳴或相 神之情形下製作其他實施例。因此，以下詳細說明不應朝 為具有一限制意義。 除非另有說明，否則本說明書及申請專利範圍中所用之 表示特徵大小、量及實㈣f之所有數值在所有例項中皆 應理解為由術豸「約」修飾。因此，除非說明相反之惰 :’否則上述說明書及隨附中請專利範圍中所陳述之數僅 _數係近似值，其可取決於熟習此項技術者利用本文所揭 不之教不試圖獲得之所期望性質而改變。藉由端點所使用 62l48.doc 201242073 之數值範圍包括屬於彼範疇内之所有數值（例如，丨至5包 括1、1，5、2、2.75、3、3.80、4及5)及彼範圍内之任一範 圍。 示非另有說明，否則術語「塗佈」及諸如此類並不限於 一特定類型之施加方法，諸如喷塗、浸塗、覆塗⑺〇〇d coating)等，且可係指藉由適於所闡述之材料之任一方法 沈積之材料，該方法包括諸如汽相沈積方法等沈積方 電鍍方法塗佈方法等。另外，參照所闡述之各圖之 定向使用諸如「頂部」、「底部」、「前面」、「背面」、「上 面」下面」等方向性術語。由於可以若干不同定向來定 位各實施例之組件’因此方向性術語之使用係出於圖解說 明目的而絕非限制性目@。一般而言，在各種實施例中， 類似參考編號用於類似特徵。除非另有說明，否則此等類 :以特徵可包含相同材料，具有相同靠，且起相同或類似 功能。即使未明確闞明，若適當，針對一項實施例闡述之 額外或選用特徵亦可為其他實施例之額外或選用特徵。 月之至父項實施例提供一撓性結構，其具有兩個 導層及用於熱隔離安裝於該撓性結構上之半導電裝置之 一中間撓性熱耗散介電質層，其中該介電質層具有小於約 20樹半 小”、小於約10微米或小於約5微米之一體厚度。在至 胃貫施例中’介電質層具有介於約2微米與約1 〇微米 干1的II厚度。頂部傳導層經圖案化以包括一電路及若 導特徵，包含其上可安裝j^ESD之經電區 藉* ΐ 一鋼箔上塗佈介電質材料之一薄層或藉由以介電質 162l48.do< 201242073 材料之一厚層開始且將其厚度減小至所期望厚度（例如， 藉由化學蝕刻）來形成介電質層。薄介電質層促進高效地 耗散熱。 本發明之至少一項實施例提供藉由將傳導層添加至一介 電質基板而形成之一撓性LESD構造。傳導層可包含以任 何適合方式（諸如，塗佈、汽相沈積、電鍍等）沈積於其上 之傳導材料，但通常使用電鍍或無電極電鍍來電鍍傳導材 料》在至少一項實施例中，總銅厚度小於2〇〇微米，較佳 小於100微米’且最佳小於50微米。 作為將金屬沈積於介電質基板上之一替代方案，可使介 電質基板在-個或兩個側上包覆有一傳導層。若傳導層欲 形成為電路，則可對其進行預圖案化，或可在製作換性 LES襄置之製程期間對其進行圖案化。 傳導層可係任何適合材料，但通常係銅。至少一個傳導 層通常經@案化以形卜電路及若干傳導特徵，包含可將 LESD附接至其之經隔離傳導特徵。通常使用—習知晶粒 接合方法(諸如，共晶、焊料(包括用於覆晶安裝之焊料凸 塊）、黏合#丨及㈣接合）將LESD直接或間接㈣至傳導特 徵。在本發明之至少一項實施例中，一導熱且導電層位於 介電質基板之第二表面上且可使用習用撓性電路製造製程 而圖案化成一電路。^中圖解說明本發明之至少一項實 2圓1展不一撓性介電質基板12 ’撓性介電質基板12 、一：於其底部表面上之-傳導層16及位於其頂部表面上 之一傳導層Π。傳導層17經圖案化以包括傳導特徵⑽ 162148.doc 201242073 支撐LESD 24)及（通常）一導電電路。介電質基板12較佳係 薄的，具有約20微米或小於20微米、更佳1〇微米或小於ι〇 微米之一較佳厚度。在某些實施例中，介電質基板12之厚 度係介於約2微米與約1 〇微米之間。在某些實施例中，介 電質基板12之厚度係約5微米。在某些實施例中，舉例而 言’使用傳導凸塊20(其可係Au、AuSn、AuGe、八抓或其 他適合材料）將LESD 24線接合至一導電電路。傳導層16較 佳係導熱的且視情況係導電的。在某些實施例中，傳導層 16包含一導電電路。在某些實施例中，一鈍化或接合層22 位於LESD24下方以促進將LESD24接合至一下伏層。 用於本發明之適合介電質基板包括聚酯、聚碳酸酯、液 晶聚合物及聚醯亞胺。聚醯亞胺係較佳的。適合的聚醯亞 胺包括以下列商標名稱購得之聚醯亞胺：KAPTON，自OSRAM Opto Semiconductors GmbH is commercially available; LUXI0N LED (available from Philips Lumileds Lighting, USA); and XLAMP LED (available from Cree, Inc., USA). An advantage of at least one embodiment of the present invention is that the flexible LES device provides excellent heat dissipation, which is particularly suitable for high power 162148.doc 201242073 LESD. The thin dielectric layer promotes heat distribution along the X, γ, and z directions. The LESDs on the thin flexible dielectric substrate can be connected in series, in parallel, or individually ground depending on the desired application. The flexible LES device can be bent simply or in a composite curve. The use of a flexible substrate in a flexible LESD eliminates the costs associated with conventional abutments. Flexible LES devices provide a robust, cost-effective thermal management solution for current and future high power LESD configurations. The above summary of the present invention is not intended to describe each embodiment of the invention or the embodiments of the invention. The following figures and detailed description are more particularly illustrative of illustrative embodiments. BRIEF DESCRIPTION OF THE DRAWINGS In the following description, reference is made to the drawings Other embodiments may be made without departing from the scope of the invention. Therefore, the following detailed description should not be taken in a limiting sense. Unless otherwise stated, all numerical values expressing characteristic size, quantity, and actual (f)f used in the specification and claims are to be construed as being modified by the term "about". Therefore, unless the contrary inertia is stated: 'Other than the number stated in the above description and the accompanying claims, only the _ number is an approximation, which may be determined by those skilled in the art using the teachings disclosed herein. Change in the nature of expectations. The value range of 62l48.doc 201242073 used by the endpoints includes all values within the scope of the category (eg, 丨 to 5 including 1, 1, 5, 2, 2.75, 3, 3.80, 4 and 5) and within Any range. Unless otherwise stated, the terms "coating" and the like are not limited to a particular type of application method, such as spraying, dip coating, coating, etc., and may be referred to by A material deposited by any of the methods described, the method including a deposition method such as a vapor deposition method, and the like. In addition, directional terms such as "top", "bottom", "front", "back", and "above" are used with reference to the orientation of each of the illustrated figures. Since the components of the various embodiments can be positioned in a number of different orientations, the use of directional terminology is for illustrative purposes and is in no way limiting. In general, like reference numerals are used for like features in the various embodiments. Unless otherwise stated, such classes may include the same material, have the same, and function the same or similar. Additional or optional features set forth for one embodiment may be additional or optional features of other embodiments, if not explicitly stated. The monthly to parent embodiment provides a flexible structure having two conductive layers and an intermediate flexible heat dissipating dielectric layer for thermally isolating one of the semiconducting devices mounted on the flexible structure, wherein The dielectric layer has a body thickness of less than about 20 trees half a", less than about 10 microns, or less than about 5 microns. In the case of the stomach, the dielectric layer has a thickness of between about 2 microns and about 1 micron. The thickness of the II. The top conductive layer is patterned to include a circuit and a conductive feature, including a thin layer of a dielectric material coated on the steel plate on which the j^ESD can be mounted. The dielectric layer is formed by starting with a thick layer of dielectric 162l48.do < 201242073 material and reducing its thickness to a desired thickness (eg, by chemical etching). The thin dielectric layer promotes efficient Dissipating heat dissipation. At least one embodiment of the present invention provides a flexible LESD configuration formed by adding a conductive layer to a dielectric substrate. The conductive layer can comprise any suitable means (such as coating, vapor deposition) , electroplating, etc.) a conductive material deposited on it, but usually Plating a Conductive Material by Electroplating or Electroless Plating. In at least one embodiment, the total copper thickness is less than 2 Å, preferably less than 100 μ' and optimally less than 50 microns. As a metal deposition on a dielectric substrate In an alternative, the dielectric substrate may be coated with a conductive layer on one or both sides. If the conductive layer is to be formed into a circuit, it may be pre-patterned, or may be fabricated in a LES The device is patterned during the process of the device. The conductive layer can be any suitable material, but is typically copper. At least one of the conductive layers is typically patterned to shape the circuit and several conductive features, including the ability to attach the LESD to it. Isolated Conductive Features. The LESD is typically directly or indirectly (four) to conductive features using conventional grain bonding methods such as eutectic, solder (including solder bumps for flip chip mounting), bonding #丨 and (4) bonding. In at least one embodiment of the invention, a thermally conductive and electrically conductive layer is disposed on the second surface of the dielectric substrate and can be patterned into a circuit using conventional flexible circuit fabrication processes. At least one of the two flexible circles of the flexible dielectric substrate 12 'flexible dielectric substrate 12, one: on the bottom surface of the conductive layer 16 and a conductive layer on the top surface thereof The conductive layer 17 is patterned to include conductive features (10) 162148.doc 201242073 to support the LESD 24) and (usually) a conductive circuit. The dielectric substrate 12 is preferably thin, having about 20 microns or less, more preferably Preferably, the thickness of the dielectric substrate 12 is between about 2 microns and about 1 micron. In some embodiments, the thickness is between 1 micron and less than 1 micron. In some embodiments, the thickness of the dielectric substrate 12 is between about 2 microns and about 1 micron. The thickness of the electrolyte substrate 12 is about 5 microns. In certain embodiments, for example, the LESD 24 wire is bonded to the conductive bump 20 (which may be Au, AuSn, AuGe, eight-claw, or other suitable material). A conductive circuit. Conductive layer 16 is preferably thermally conductive and electrically conductive as appropriate. In some embodiments, conductive layer 16 includes a conductive circuit. In some embodiments, a passivation or bonding layer 22 is positioned under the LESD 24 to facilitate bonding the LESD 24 to the underlying layer. Suitable dielectric substrates for use in the present invention include polyesters, polycarbonates, liquid crystal polymers, and polyimines. Polyimine is preferred. Suitable polyamidiamines include the polyethylenimines available under the trade names of KAPTON, from
DuPont麟得；APICAL，自 Kaneka Texas公司購得；SKC Kolon PI，自 SKC Kolon PI Inc.購得；以及UPILEX 及 UPISEL，自日本的Ube-Nitto Kasei Industries購得。以商 標稱號 UPILEX S、UPILEX SN及 UPISEL VT(全部自 Ube-Nitto Kasei Industries購得）購得之聚醯亞胺係最佳的。此 等聚醯亞胺係由諸如聯苯四羧酸二酐（BBDA)及苯二胺 (PDA)等單體製成。 介電質基板可進一步以一適合量包含導熱粒子》適合的 導熱粒子之實例包括，但不限於氮化銘、氮化棚、碳化石夕 及其組合。 若開始之介電質基板比所期望厚，則可使用諸如化學蝕 I62l48.doc 201242073 刻電聚钮刻、聚焦離子束姓刻及雷射燒银之任何適合方 法使其薄化。在某些實施例令，化學钮刻可係較佳的。可 使用任何適合蚀刻劑且該触刻劑可取決於介電質基板材料 而變化。適合的触刻劑可包括驗金屬鹽（例如氫氧化鉀）； 具有增溶劑（例如胺）及醇（諸如乙二醇）中之一者或兩者之 驗金屬a用於本發明之某些實施例之適合化學钮刻劑包 括KOH/乙醇胺/乙二醇蝕刻劑，諸如更詳細闡述於美國專 利公開案第2007-0120089-A1號中之化學蝕刻劑，該案以 引用方式併入本文中。用於本發明之某些實施例之其他適 合化學蝕刻劑包括一 KOH/甘胺酸蝕刻劑，諸如更詳細闡 述於同在申請中之美國臨時專利申請案第61/409791號中 之化學蝕刻劑，該案以引用方式併入本文中。在蝕刻後， 可藉助一鹼性KOH/高錳酸鉀（PPM)溶液（例如，約〇·7重量 百分比至約1.0重量百分比KOH及約3重量百分比ΚΜη04之 一溶液）處理介電質基板。圖2Α至圖2Β圖解說明在一侧上 包覆有一銅層54之一UPISEL VT介電質基板（該結構在市場 上可以商標稱说UPILEX Ν自曰本的Ube 111<11181；1：丨68賭得）。 如圖2A中所展示，UPISEL VT由包含UPILEX S之一核心 層50及包含一熱塑性聚醯亞胺（TPPI)2薄外層52a ' 52b構 造。為產生一薄介電質基板，可使用諸如美國專利公開案 第2007-0120089-A1號中更詳細闡述之KOH/乙醇胺/乙二醇 等任何適合化學物質來蝕刻UPISEL VT。關於此蝕刻劑， 發現UPILEX S之疏水性質及較高模數藉由一溶解機制產 生蝕刻。由於此蝕刻劑調配物快速蝕刻UPILEX S，因此 162148.doc 201242073 在到達第二TPPI層之前停止蝕刻，然後藉助包含約〇·7重 量百分比至約1.0重量百分比K〇H及@ 3重量百分比KMn〇4 之ΚΟΗ/向錳酸鉀（ppm)溶液（其並非τρρΙ層之一有效蝕 刻劑）執行一後續蝕刻以移除upiLEX s核心之剩餘薄層， 藉此留下薄TPPI外層521)作為介電質基板，如圖2b中所展 示0 其他適合蝕刻劑化學物質係同在申請中之美國臨時專利 申凊案第61/409791號中更詳細闡述之K〇H/甘氨酸及k〇h/ 甘氨酸/乙二胺化學物質。K〇H/甘氨酸蝕刻劑提供一慢的 又控蚀刻。可藉由將乙二胺添加至钱刻劑調配物來增加触 刻速率。 作為化學姓刻之-替代方案，可藉由使用準分子雷射、 藉由電漿蝕刻或藉由其他適合方法來達成介電質基板之受 控薄化。 在本發明之另一實施例中，藉由在一傳導層上塗佈且固 化聚a材料來形成介電質基板。舉例而言，為在銅上形成 一聚醯亞胺層’可在一銅箔上塗佈聚酿胺酸樹脂至一所期 望厚度。隨後，可實施一亞胺化過程以形成一均勻聚醯亞 胺層。 可使介電質層（基板）在一側或兩側上包覆有一傳導層。 若傳導層欲形成為電路，則可對其進行預圖案化，或可在 製作撓性LES裝置之製程期間對其進行圖案化。一多層撓 生基板（具有介電質材料及傳導材料之多個層）亦可用作一 基板。傳導層可係任何適合材料，但通常係銅。 162148.doc -11 · 201242073 若欲在介電質層形成至所期望厚度之後將一傳導層添加 至該介電質層之一個或兩個側，則此可藉由將一金屬箔層 壓至該介電質來完成’但更通常藉由某一類型之金屬沈積 製程來完成。 可作為一金屬沈積製程之部分而形成傳導特徵及電路。 舉例而言，形成一電路之一標準半加性沈積方法將包括： 提供一汽相沈積之黏結層（通常係為Cr〇X、NiCr或 NiCrOx);在其上汽相沈積一金屬籽晶層，該金屬籽晶層 通常（但未必）包含與隨後電鍍之金屬層相同之金屬；使用 一傳統光微影製程在該籽晶層上圖案化一光遮罩；使用電 錄或無電極電鍍在該籽晶層之經曝露部分上電鑛一傳導材 料（任何適合材料，但通常係鋼）；剝去該光遮罩；以及移 除该籽晶層及該黏結層之剩餘的現在曝露之部分。 可實施LESD將接合至其上之傳導特徵之藉助金、錫、 銀等進行之後續鈍化以促進此接合。可使用任何適合接合 機制將個別LESD接合至傳導特徵上。可採用不同類型之 接合，諸如共晶、覆晶、熔融及黏合劑接合。LESD較佳 具有施加至其底部表面之一鈍化層（通常係金/錫，但可係 任何適合鈍化材料，例如，諸如Au等金屬及諸如AuSn、、 AuGe ' AuSi等金屬㈤合金）以促進將[咖接合至經 之傳導特徵。用於將LESD附接至傳導特徵之溫度通常係 介於約25(n^ 325t之間，最通f制於共晶接合（針對 Au/Sn)之約285t。可藉由其他方法（諸#，有機晶粒附 接，例如，使用银ί裒氧樹脂或焊接）來黏合lesd。可將共 162148.doc •12· 201242073 晶接合視為-直接接合方法’而將焊接視為—間接接合方 法。 本發明之撓性LES裝置之至少某些實施例提供優良熱管 理性質。至少部分地由於介電質基板較薄，因此由lesd 產生之熱可容易離開LESD而傳輸且傳輸至介電質基板之 底部側上之傳導層。該熱可然後沿多個方向(例如，向下z 方向及所有X及Y方向）散佈整個傳導層，此可提供遠離 LESD之較快速且較高效之熱耗散。另外，根據本發明之 至少一項實施例，可控制傳導層中之傳導材料之量以進一 步影響熱管理。舉例而言，增加傳導材料之量可增加用於 熱耗散之傳導層之容量。 圖3圖解說明其中傳導層16已經圖案化以提供延伸至介 電質層12傳導層17(LESD 24接合於其上）之傳導特徵抖之 間的開放區段26之本發明一實施例。此圖案化有助於熱隔 離她鄰傳導特徵且增強LESD之熱管理。舉例而言，若一 個LESD產生比一相鄰LESD多之熱，則熱可透過導熱層16 自較熱LESD行進至較冷LESD，藉此潛在地干擾較冷LESD 之功能。藉由熱隔離LESD，可個別地管理由每一 1^8]〇產 生之熱。 圖4圖解說明類似於圖3之本發明另一實施例。在圖4 中，已在介電質層12與傳導特徵14中之—者之間添加一絕 緣層30。舉例而言，此結構可藉由以下方式來形成：使用 一光微影方法圖案化介電質層12上之絕緣層，然後使用一 標準半加性製程將傳導層添加至該結構。產生比一 b比鄰 I62148.doc 13 201242073 LESD少之熱之一LESD將較佳放置於絕緣層3〇上面。絕緣 層30可包含任何適合材料，包括但不限於聚醯亞胺、環氧 樹脂、丙烯酸樹脂等。在至少一項替代實施例中，傳導層 16在毗鄰L E S D之位置之間係連續的（不同於圖3之開放區 段及圖4中所展示之開放區段）。在此實施例中，絕緣層“ 可提供LESD之間的熱隔離。 圖5圖解說明類似於圖3之實施例之本發明又一實施例。 在圖5中，薄介電質層12包括突出部32。此等突出部^通 常毗鄰於LESD接合於其上之傳導特徵或在該等傳導特徵 之間。該等突出部可提供毗鄰LESD之間的增強之熱隔離 且亦可改良介電質層及撓性LESD物件之整體機械強度。 突出部32之厚度可係任何厚度，但通常係薄介電質層12之 體厚度之約2倍至約20倍。舉例而言，可藉由以具有等於 突出部32之所期望高度之一厚度之一介電質基板開始、光 遮蔽其中期望突出部之區域且將介電f基板之經曝露部分 蝕刻至所期望體厚度來製作突出部3 2。在至少一項其他實 施例中，使用浮雕或微複製製程來形成突出部及具有一體 厚度之薄層1等突出部可係任何適合大小或形狀且可係 (舉例而言）角錐體、截角錐、立方體、半球體等。其可係 經個別化之特徵或可形成毗鄰於多個傳導特徵或在多個傳 導特徵之間的連續特徵。複數個突出部亦可以任何適合圖 案或組態（例如，柵格、蛇形、圓形等）位於撓性基板上。 在至少一項實施例中，介電質基板及其上之銅層為 LESD封裝提供薄且依從性支撐。可藉由（例如）在個別 162l48.doc 201242073 LESD或其上定位該等LESD之傳導特徵上方施加一囊封材 料，或藉由在一 LESD陣列及此等LESD周圍之傳導層上方 施加一囊封劑而直接在撓性基板上封裝該等LESD。該囊 封劑較佳係一透明（亦即，具有超過99%之一透射率）模製 化合物。在固化時，其可視情況適於充當一透鏡。聚矽氧 及環氧樹脂係適合的囊封化合物。其可進一步含有散佈於 其中之光學擴散粒子。適合的模製化合物可購自（例如）曰 本的Shin-Etsu Chemical Co·, Ltd·及加利福尼亞州聖塔巴 巴拉的NuSil Silicone Technology。若期望，可在囊封之前 在LESD之頂部上沈積一波長轉換材料（諸如，一磷光體塗 層）。可在囊封LESD之前視情況施加一底填充材料。亦可 將撓性LES裝置包封於一防水/耐候透明護套中，該護套可 由任何適合透明聚合材料製成。 可在一分批製程或一連續製程（諸如’經常用於製作撓 性電路之一輥對輥製程）中製作撓性LES裝置。LESD陣列 可以任何所期望圖案形成於撓性基板上。然後可視需要 (例如）藉由衝壓基板或藉由切割基板將LESD分割以獲得 LESD ’例如’單粒化成個別LESD、LESD條帶或LESD P車 列。因此’可運輸一撓性基板上之一整卷LESD而無需其 中通常在一載體帶之個別包袋中運送個別LESd之傳統卷 帶製程。 在形成個別LESD、LESD條帶或LESD陣列之前或之後， 舉例而言’可藉由利用.一導熱黏合劑將介電質基板之第二 主表面上之傳導層附接至一額外基板而將撓性LESD附接 162148.doc -15- 201242073 至一額外基板。導熱黏合劑可進一步促進遠離LESD之熱 傳送。另一選擇係，可用金屬或將促進其黏合至一額外基 板之其他材料處理介電質基板之第二主表面上之傳導層。 可取決於撓性LES裝置之既定用途而將其附接至任何所期 望基板。該額外基板可係導熱及/或導電的，或可係一半 導體、陶瓷或聚合基板，其可係或可不係導熱的。舉例而 言，該等額外基板可係撓性金屬基板、剛性金屬基板 '散 熱片、介電質基板、電路板等。 若LES裝置係供用於一電路板上，則撓性^以裝置（無論 係單粒化、條帶還是陣列形式）可直接附接至一終端使用 者之電路板，藉此消除對習用引線框架材料之需要。若 LES裝置係供用作一照明條帶，則其可包封於一防水/耐候 透明護套中，如上文所述。 若LESD係呈條帶或陣列形式，則可將leSD電連接至條 帶或陣列中之其他LESD中之一或多者。亦可在將LESD分 割成撓性LES裝置之前（例如）使用直接晶圓接合或覆晶製 程將諸如Zener二極體及Schottky二極體等額外元件添加至 LESD之頂部或底部表面。亦可將此等元件電連接至 LESD。 在本發明之至少一項實施例中，撓性LES裝置比習用單 個或多個LESD封裝薄，此乃因介電質基板比習用LESD封 裝基板薄》此使得本發明之撓性LES裝置能夠用於具有嚴 密體積限制之應用（諸如，蜂巢式電話及相機閃光燈）中》 舉例而言，本發明之撓性LES裝置可提供約0.7 mm至4 mm 162148.doc -16· 201242073 且在某些實施例中〇 7 _至2 _之—封裝輪廟，而習用 LESD封農輪靡通常大於4 _且係約* 8随至⑽_。此 外，在本發明之至少一項實施例中，若需要，挽性啦裝 置可經撓曲或彎曲α容易地裝配至—非線性或非平面總成 中。 實例 本發明係藉由以下實例進行圖解說明，但此等實例中所 列之特定材料及其量以及其他條件及細節不應理解為對本 發明之不適當限制。 蝕刻方法 用於製備蝕刻劑之一般程序包括首先藉由混合將37重量 百分比氫氧化鉀（ΚΟΗ)溶解於水中，接著後續添加35重量 百分比乙二醇及22重量百分比乙醇胺。使用水性光阻劑 (以商標稱號ΗΜ-4056自日本的Hitachi Chemicals購得）作為 一蚀刻遮罩使一側上包覆有3 μιη銅層之50 μηι聚醯亞胺介 電質基板之樣本（以商標稱號UPISEL-N自日本東京的Ube_ Nitto Kasei Co” Ltd. Industries講得）自PI側經受選擇性触 刻。藉由計時來控制蝕刻以形成具有一體厚度之一薄聚酿 亞胺層，此花費約15分鐘。 電路形成方法 首先將一 20英吋（50.8 cm)寬xlO m長之一側上包覆有3 μιη 銅之50 μηι聚醯亞胺的樣本（以商標稱號UPISEL-N自日本 東京的Ube-Nitto Kasei Co” Ltd. Industries購得）切割成一 13.4英吋（34.04 cm)寬度。在自銅（Cu)側移除18 μιη銅栽體 162148.doc • 17- 201242073 層之後’藉由在兩個側上層壓乾燥膜光阻劑（以商標稱號 HM4056自Hitachi Chemicals, Ltd.購得）並使用一光微影製 程在聚酿亞胺側上形成一經圖案化蝕刻遮罩而使聚醯亞胺 薄化至樣本中之一體厚度。然後使用上述蝕刻方法使樣本 經受一化學蝕刻製程達約15分鐘以形成具有約5 μιη之一體 厚度之一經薄化聚醢亞胺基板。在自兩個側移除光阻劑之 後’首先藉由真空沈積使樣本之經曝露ρι表面經受具有2 nm至20 nm之一厚度之一鉻黏結層之引晶，然後藉由真空 沈積將銅以約1 〇〇 nm之一厚度沈積於黏結層上以形成一傳 導塗層。然後使傳導塗層經受電電鍍以使傳導銅塗層累積 至約3 μιη之一最終厚度。此提供經蝕刻之經薄化ρι介電質 基板中之一傳導塗層之一結構。然後將光阻劑施加於包覆 有銅（在一側上）及塗佈有銅（在另一側上）之介電質基板之 兩個側上並藉由一再配準光微影蝕刻製程在塗佈有銅之側 上圖案化。將45 μιη銅電沈積至經蝕刻？1侧上之薄電沈積 銅之經曝露部分及包覆有銅之側兩者上。然後在自兩個側 移除光阻劑之後，移除3 μιη銅層之經曝露部分及鉻黏結層 以在介電質基板上形成電路圖案。此在經薄化聚醯亞胺基 板上產生具有45 μηι之一厚度之傳導電極。 實例1 以下係在一撓性基板上封裝LESD，具體而言利用有機 晶粒附接在一經薄化撓性介電質基板上安裝藍色lED之一 實例。 使用上述電路形成方法在一經薄化撓性介電質基板上形 162148.doc -18· 201242073 成傳導電路。該經薄化基板具有約5 μηι之一體厚度及約45 μπι之一電鍍銅傳導塗層。使用自美國聖地亞哥的QuantumDuPont Linde; APICAL, available from Kaneka Texas; SKC Kolon PI, available from SKC Kolon PI Inc.; and UPILEX and UPISEL, available from Ube-Nitto Kasei Industries of Japan. The polyimine products commercially available under the trade designations UPILEX S, UPILEX SN and UPISEL VT (all available from Ube-Nitto Kasei Industries) are the best. These polyimines are made of monomers such as biphenyltetracarboxylic dianhydride (BBDA) and phenylenediamine (PDA). Examples of dielectric particles that may further comprise thermally conductive particles in a suitable amount include, but are not limited to, nitriding, nitriding, carbon carbide, and combinations thereof. If the starting dielectric substrate is thicker than desired, it can be thinned using any suitable method such as chemical etching I62l48.doc 201242073 electro-convex engraving, focused ion beam surrogate, and laser burnt silver. In some embodiments, chemical buttoning may be preferred. Any suitable etchant can be used and the etchant can vary depending on the dielectric substrate material. Suitable tracing agents can include metal salts (eg, potassium hydroxide); metal having one or both of a solubilizing agent (eg, an amine) and an alcohol (such as ethylene glycol) for use in certain aspects of the invention Suitable chemical engraving agents for the examples include KOH/ethanolamine/glycol etchants, such as the chemical etchants described in more detail in U.S. Patent Publication No. 2007-0120089-A1, which is incorporated herein by reference. . Other suitable chemical etchants for use in certain embodiments of the present invention include a KOH/glycine etchant such as the chemical etchant described in more detail in U.S. Provisional Patent Application Serial No. 61/409,791, the entire disclosure of which application. This case is incorporated herein by reference. After etching, the dielectric substrate can be treated by means of an alkaline KOH/potassium permanganate (PPM) solution (e.g., from about 7 weight percent to about 1.0 weight percent KOH and about 3 weight percent ΚΜη04). 2A to 2B illustrate a UPISEL VT dielectric substrate coated with a copper layer 54 on one side (this structure can be marketed as UPILEX from the Ube 111<11181; 1: 丨68 Gambling). As shown in Figure 2A, UPISEL VT is constructed from a core layer 50 comprising UPILEX S and a thin outer layer 52a '52b comprising a thermoplastic polyimine (TPPI) 2. To produce a thin dielectric substrate, UPISEL VT can be etched using any suitable chemical such as KOH/ethanolamine/ethylene glycol as described in more detail in U.S. Patent Publication No. 2007-0120089-A1. With regard to this etchant, it was found that the hydrophobic properties of UPILEX S and the higher modulus were etched by a dissolution mechanism. Since this etchant formulation rapidly etches the UPILEX S, 162148.doc 201242073 stops etching before reaching the second TPPI layer, and then includes from about 重量7 wt% to about 1.0 wt% K〇H and @3 wt% KMn〇. 4 followed by a subsequent etch to remove the remaining thin layer of the upiLEX s core to a potassium manganate (ppm) solution (which is not an effective etchant for the τρρΙ layer), thereby leaving a thin TPPI outer layer 521) as a dielectric The substrate, as shown in Figure 2b, 0 other suitable etchant chemistries, K 〇 H / glycine and k 〇 h / glycine / are described in more detail in U.S. Provisional Patent Application Serial No. 61/409,791. Ethylenediamine chemical. The K〇H/glycine etchant provides a slow, controlled etch. The etch rate can be increased by adding ethylene diamine to the money encapsulating formulation. As an alternative to chemical surrogate, controlled thinning of the dielectric substrate can be achieved by using excimer lasers, by plasma etching, or by other suitable methods. In another embodiment of the invention, a dielectric substrate is formed by coating and curing a polya material on a conductive layer. For example, to form a polyimine layer on copper, the polylactoic acid resin can be coated onto a copper foil to a desired thickness. Subsequently, an imidization process can be carried out to form a uniform polyimine layer. The dielectric layer (substrate) may be coated with a conductive layer on one or both sides. If the conductive layer is to be formed into a circuit, it can be pre-patterned or patterned during the fabrication of the flexible LES device. A multilayer dummy substrate (having a plurality of layers of a dielectric material and a conductive material) can also be used as a substrate. The conductive layer can be any suitable material, but is typically copper. 162148.doc -11 · 201242073 If a conductive layer is to be added to one or both sides of the dielectric layer after the dielectric layer is formed to a desired thickness, this can be achieved by laminating a metal foil to The dielectric is done 'but more usually by a certain type of metal deposition process. Conductive features and circuitry can be formed as part of a metal deposition process. For example, forming a standard semi-additive deposition method of a circuit will include: providing a vapor phase deposition layer (generally Cr〇X, NiCr or NiCrOx); depositing a metal seed layer thereon; The metal seed layer typically (but not necessarily) comprises the same metal as the subsequently plated metal layer; a photomask is patterned over the seed layer using a conventional photolithography process; the seed is electroless or electrolessly plated The exposed portion of the crystalline layer is electrically charged with a conductive material (any suitable material, but typically a steel); the light mask is stripped; and the seed layer and the remaining exposed portions of the bonded layer are removed. Subsequent passivation by means of gold, tin, silver, etc., to which the LESD will be bonded, can be implemented to facilitate this bonding. Individual LEDS can be bonded to the conductive features using any suitable bonding mechanism. Different types of bonds can be used, such as eutectic, flip chip, melt, and bond bonding. The LESD preferably has a passivation layer applied to one of its bottom surfaces (usually gold/tin, but may be any suitable passivation material, such as a metal such as Au and a metal (f) alloy such as AuSn, AuGe 'AuSi) to facilitate [The coffee is bonded to the conductive characteristics. The temperature used to attach the LESD to the conductive features is typically between about 25 (n^325t) and the most common is about 285t for eutectic bonding (for Au/Sn). Other methods are available. , organic grain attachment, for example, using silver oxime resin or soldering) to bond lesd. A total of 162148.doc •12· 201242073 crystal bonding can be regarded as a -direct bonding method and welding is regarded as an indirect bonding method At least some embodiments of the flexible LES device of the present invention provide excellent thermal management properties. At least in part due to the thinner dielectric substrate, heat generated by the lesd can be easily transported away from the LESD and transmitted to the dielectric substrate. a conductive layer on the bottom side. The heat can then spread the entire conductive layer in multiple directions (eg, down z direction and all X and Y directions), which provides faster and more efficient heat dissipation away from the LESD Additionally, in accordance with at least one embodiment of the present invention, the amount of conductive material in the conductive layer can be controlled to further affect thermal management. For example, increasing the amount of conductive material can increase the capacity of the conductive layer for heat dissipation. Figure 3 illustrates An embodiment of the invention in which the conductive layer 16 has been patterned to provide an open section 26 extending between the conductive features of the dielectric layer 12 conductive layer 17 to which the LESD 24 is bonded. This patterning facilitates Thermally isolating her adjacent conduction characteristics and enhancing thermal management of the LESD. For example, if a LESD produces more heat than an adjacent LESD, the heat can travel through the thermally conductive layer 16 from the hotter LESD to the cooler LESD, thereby Potentially interferes with the function of the colder LESD. The heat generated by each of the LEDs can be individually managed by thermally isolating the LESD. Figure 4 illustrates another embodiment of the invention similar to Figure 3. An insulating layer 30 has been added between the dielectric layer 12 and the conductive features 14. For example, the structure can be formed by patterning a dielectric using a photolithography method. The insulating layer on layer 12 is then added to the structure using a standard semi-additive process. Produces a ratio closer to a b. I62148.doc 13 201242073 One of the less heats of LESD will be placed on top of the insulating layer 3 The insulating layer 30 can comprise any suitable material, including but not In polyimine, epoxy, acrylic, etc. In at least one alternative embodiment, the conductive layer 16 is continuous between locations adjacent to the LESD (unlike the open section of Figure 3 and Figure 4) An open section is shown. In this embodiment, the insulating layer "provides thermal isolation between the LESDs. Figure 5 illustrates yet another embodiment of the invention similar to the embodiment of Figure 3. In Figure 5, thin The dielectric layer 12 includes protrusions 32. These protrusions are generally adjacent to or between the conductive features to which the LESD is bonded. The protrusions provide enhanced thermal isolation between adjacent LESDs. It also improves the overall mechanical strength of the dielectric layer and the flexible LESD article. The thickness of the projections 32 can be any thickness, but is typically from about 2 times to about 20 times the thickness of the thin dielectric layer 12. For example, by exposing the exposed portion of the dielectric f substrate to a desired one starting with a dielectric substrate having a thickness equal to one of the desired heights of the protrusions 32, occluding the exposed portion of the dielectric f substrate therein The protrusion 3 2 is made in the body thickness. In at least one other embodiment, the protrusions using the embossing or micro-replication process to form the protrusions and the thin layer 1 having an integral thickness can be of any suitable size or shape and can be, for example, a pyramid, a truncated cone , cubes, hemispheres, etc. It may be characterized as individualized or may form a continuous feature that is adjacent to or within a plurality of conductive features. The plurality of projections can also be located on the flexible substrate in any suitable pattern or configuration (e.g., grid, serpentine, circular, etc.). In at least one embodiment, the dielectric substrate and the copper layer thereon provide a thin and compliant support for the LESD package. An encapsulation material can be applied, for example, over an individual 162l48.doc 201242073 LESD or a conductive feature on which the LESDs are positioned, or by applying an encapsulation over a LESD array and a conductive layer surrounding the LESD The LESDs are packaged directly on the flexible substrate. The encapsulant is preferably a transparent (i.e., having a transmittance of more than 99%) molding compound. When cured, it may be adapted to act as a lens. Polyoxymethylene and epoxy resins are suitable encapsulating compounds. It may further contain optically diffusing particles dispersed therein. Suitable molding compounds are commercially available, for example, from Shin-Etsu Chemical Co., Ltd. of 曰, and NuSil Silicone Technology of Santa Barbara, California. If desired, a wavelength converting material (such as a phosphor coating) can be deposited on top of the LESD prior to encapsulation. An underfill material can be applied as appropriate prior to encapsulation of the LESD. The flexible LES device can also be enclosed in a waterproof/weatherproof transparent sheath that can be made of any suitable transparent polymeric material. The flexible LES device can be fabricated in a batch process or a continuous process such as a roll-to-roll process that is often used to make flexible circuits. The LESD array can be formed on a flexible substrate in any desired pattern. The LESD can then be segmented, for example, by stamping the substrate or by cutting the substrate to obtain a LESD' such as 'single into individual LESD, LESD strips or LESD P trains. Thus, one of the LESDs on a flexible substrate can be transported without the need for a conventional tape winding process in which individual LESs are typically carried in individual bags in a carrier tape. Before or after forming individual LESD, LESD strips or LESD arrays, for example, by using a thermally conductive adhesive to attach a conductive layer on the second major surface of the dielectric substrate to an additional substrate The flexible LESD is attached to 162148.doc -15- 201242073 to an additional substrate. Thermally conductive adhesives further promote heat transfer away from the LESD. Alternatively, the conductive layer on the second major surface of the dielectric substrate can be treated with a metal or other material that will facilitate bonding to an additional substrate. It can be attached to any desired substrate depending on the intended use of the flexible LES device. The additional substrate may be thermally and/or electrically conductive, or may be a half conductor, ceramic or polymeric substrate, which may or may not be thermally conductive. For example, the additional substrates may be flexible metal substrates, rigid metal substrates, heat sinks, dielectric substrates, circuit boards, and the like. If the LES device is used on a circuit board, the flexible device (whether in the form of a single granulation, strip or array) can be directly attached to the circuit board of an end user, thereby eliminating the conventional lead frame The need for materials. If the LES device is intended for use as a lighting strip, it can be enclosed in a waterproof/weatherproof transparent sheath as described above. If the LESD is in the form of a strip or array, the leSD can be electrically connected to one or more of the strips or other LESDs in the array. Additional components such as Zener diodes and Schottky diodes can also be added to the top or bottom surface of the LESD prior to splitting the LESD into a flexible LES device, for example, using a direct wafer bonding or flip chip process. These components can also be electrically connected to the LESD. In at least one embodiment of the invention, the flexible LES device is thinner than conventional single or multiple LESD packages because the dielectric substrate is thinner than conventional LESD package substrates, thereby enabling the flexible LES device of the present invention to be used For applications with tight volume limitations (such as cellular phones and camera flashes), for example, the flexible LES device of the present invention can provide about 0.7 mm to 4 mm 162148.doc -16· 201242073 and in some implementations In the example, 〇7 _ to 2 _- encapsulates the wheel temple, while the conventional LESD rims are usually larger than 4 _ and are about * 8 to (10) _. Moreover, in at least one embodiment of the present invention, the pull-up device can be easily assembled into a non-linear or non-planar assembly via flexing or bending, if desired. The invention is illustrated by the following examples, but the particular materials and amounts thereof, as well as other conditions and details, are not to be construed as limiting the invention. Etching Method A general procedure for preparing an etchant involves first dissolving 37 weight percent potassium hydroxide (yttrium) in water by mixing followed by subsequent addition of 35 weight percent ethylene glycol and 22 weight percent ethanolamine. A water-based photoresist (available under the trade designation ΗΜ-4056 from Hitachi Chemicals, Japan) was used as an etch mask to sample a 50 μηι polyiminoimide dielectric substrate coated with a 3 μm copper layer on one side ( According to Ube_Nitto Kasei Co" Ltd. Industries, Tokyo, Japan, under the trademark designation UPISEL-N, it is subjected to selective lithography from the PI side. The etching is controlled by timing to form a thin polyimine layer having an integral thickness. This takes about 15 minutes. The circuit formation method firstly coated a sample of 3 μιη copper 50 μηι polyimine on one side of a 20-inch (50.8 cm) wide xlO m length (under the trademark UPISEL-N). Ube-Nitto Kasei Co" Ltd. of Tokyo, Japan, commercially available) cut into a width of 13.4 inches (34.04 cm). After removing the 18 μm copper carrier 162148.doc • 17- 201242073 layer from the copper (Cu) side, 'by drying the film photoresist on both sides (purchased under the trade name HM4056 from Hitachi Chemicals, Ltd.) And using a photolithography process to form a patterned etch mask on the side of the brewed imine to thin the polyimine to a thickness in the sample. The sample is then subjected to a chemical etching process for about 15 minutes using the etching method described above to form a thinned polyimide substrate having a thickness of about 5 μm. After removing the photoresist from both sides, the exposed surface of the sample is first subjected to seeding of a chromium bonding layer having a thickness of one of 2 nm to 20 nm by vacuum deposition, and then copper is deposited by vacuum deposition. A thickness of about 1 〇〇 nm is deposited on the bonding layer to form a conductive coating. The conductive coating is then subjected to electroplating to accumulate the conductive copper coating to a final thickness of about 3 μηη. This provides a structure of one of the conductive coatings in the etched thinned dielectric substrate. The photoresist is then applied to both sides of the dielectric substrate coated with copper (on one side) and coated with copper (on the other side) and processed by a re-registration photolithography process. Patterned on the side coated with copper. Electrodepositing 45 μιη copper to etched? Thin electrodeposited on the 1 side of both the exposed portion of the copper and the side coated with copper. Then, after removing the photoresist from both sides, the exposed portion of the 3 μm copper layer and the chrome bonding layer are removed to form a circuit pattern on the dielectric substrate. This produces a conductive electrode having a thickness of one of 45 μηι on the thinned polyimide substrate. Example 1 The following is an example of packaging a LESD on a flexible substrate, specifically using an organic die attached to a thinned flexible dielectric substrate to mount a blue lED. The above circuit formation method is used to form a conductive circuit on a thinned flexible dielectric substrate. The thinned substrate has a thickness of about 5 μm and a plated copper conductive coating of about 45 μm. Use Quantum from San Diego, USA
Materials購得之一銀環氧樹脂有機晶粒附接將一 Cree EZ 290 Gen II LED(以零件號碼 CA460EZ290-S2100-2 自美國 北卡羅來納州的Cree，Inc.，Durham購得）接合至傳導塗 層’其中在150°C下進行熱固化達1小時。使用一人工線接 合器（以商標稱號4524D自美國賓夕法尼亞州華盛頓堡的 Kulicke and Soffa Industries，Inc.購得）並使用 1密耳直徑之 金線藉助金接合墊將每一 LED線接合至介電質基板之頂部 表面上之傳導電路。使用以型號EX4210R(電壓額定值42 V、電流額定值10 A)自英國劍橋郡亨廷登的Thurlby Thandar Instruments Limited (Tti)購得之一電源來測試總 成。LED在點亮時係亮藍色且總成展示撓性。 實例2 以下係在一撓性基板上封裝LESD，具體而言利用間接 晶粒接合在一經薄化撓性介電質基板上安裝藍色lEE>之另 一實例。 使用上述電路形成方法在一經薄化撓性介電質基板上形 成傳導電路。該經薄化基板具有約5 μιη之一體厚度及約45 μηι之一電鍍銅傳導塗層。與傳導塗層之間使用焊料 將一 Cree ΕΖ 290 Gen II LED(以零件號碼 CA460EZ290- S2100-2自美國北卡羅來納州德罕的cree，inc.購得）接合至 傳導塗層。使用一人工線接合器（以商標稱號45241)自美國 賓夕法尼亞州華盛頓堡的Kulicke and Soffa Industries，Inc. 162148.doc •19· 201242073 購得）並使用1密耳直徑之金線透過金接合墊將每一 led線 接合至介電質基板之頂部表面上之傳導電路。使用以型號 EX4210R(電壓額定值42 V、電流額定值10 A)自英國劍橋 郡亨廷登的 Thurlby Thandar Instruments Limited (Tti)睛得 之一電源來測試總成。LED在點亮時係亮藍色且總成展示 撓性。 實例3 圖6展示經執行以複製本發明之撓性LESD裝置之熱傳送 的熱模型化之結果，該等撓性LESD裝置具有在LED與一 導熱層之間的薄介電質層。使用以商標稱號Pr〇/ENGINEER 自美國馬薩諸塞州尼德姆的PTC購得之一電腦輔助設計 (CAD)軟體程式進行熱模型化。用於模型化以計算具有約5 μιη之一體厚度之經薄化聚醯亞胺上之熱耗散之設計參數 如下： • 10 mmx 10 mm><2 mm紹板，夕卜邊緣保持在25°C之一十亙 定溫度下。 • 4 mm><4 mmx〇.05 mm金-錫共晶焊料。 • 4 mm><4 mmx〇.05 mm電鍍銅。 • 10 mmxlO mmx〇.05 mm聚醢亞胺電路（具有中心區域 厚度4χ4χΧ，其中X係0.05 mm)。使用UPILEX-S之材 料性質。 • 4><4><丫頂部銅電鍍，其中丫係5〇111111。 •石夕上之1 mmxl mmx0.2 mm薄GaN LED。使用石夕之熱 性質。不向銅焊料中添加矽，此乃因焊料之導熱性與 162148.doc •20- 201242073 矽之導熱性約相同。 • LED之頂部上之熱負荷係1500 mw(假定具有25%外部 光學效率之一 2瓦特LED)。 用於上述構造之模型化展示約6.3°C /W之一有效熱耗 散。 雖然本文係出於闡述較佳實施例之目的圖解說明並闡述 具體實施例，但熟習此項技術者應瞭解，可使用許各種各 樣之替代及/或等效實施方案來替換所展示及闞述之具體 實施例’此並不背離本發明之範疇。本申請案意欲涵蓋本 文所論述之較佳實施例之任何更改或變化形式。因此，本 發明明確地意欲僅由申請專利範圍及其等效物限制。 【圖式簡單說明】 圖1繪示本發明之一撓性LESD之一實施例。 圖2A至圖2B續·示用於製備本發明之一基板之一製程。 圖3繪示本發明之一撓性LESD之一實施例。 圖4繪示本發明之一撓性lesd之一實施例。 圖5繪示本發明之一撓性LESD之一實施例。 圖6續·示用於本發明之一撓性LES裝置之熱模型化之結 果。 【主要元件符號說明】 12 撓性介電質基板 14 傳導特徵 16 傳導層 17 傳導層 162148.doc -21 - 5 201242073 20 傳導凸塊 22 鈍化或接合層 24 發光半導體裝置 26 開放區段 30 絕緣層 32 突出部 50 核心層 52a 薄外層 52b 薄外層 54 銅層 162148.doc -22-One of the silver epoxy organic die attachments purchased by Materials was joined to a conductive coating by a Cree EZ 290 Gen II LED (available from Cree, Inc., Durham, North Carolina, part number CA460EZ290-S2100-2). The layer 'which was thermally cured at 150 ° C for 1 hour. A manual wire bonder (available from Kulicke and Soffa Industries, Inc., Fort Washington, PA, USA) was used and a 1 mil diameter gold wire was used to bond each LED wire to the dielectric with a gold bond pad. A conductive circuit on the top surface of the substrate. The test was purchased using one of the power supplies purchased from Thurlby Thandar Instruments Limited (Tti) in Huntingdon, Cambridgeshire, UK, model EX4210R (voltage rating 42 V, current rating 10 A). The LED is bright blue when illuminated and the assembly exhibits flexibility. Example 2 The following is another example of packaging a LESD on a flexible substrate, specifically using indirect die bonding to mount a blue lEE on a thinned flexible dielectric substrate. A conductive circuit is formed on a thinned flexible dielectric substrate using the above circuit forming method. The thinned substrate has a thickness of about 5 μm and a plated copper conductive coating of about 45 μm. Soldering with Conductive Coating A Cree® 290 Gen II LED (available as part number CA460EZ290-S2100-2 from Cree, Inc., Dehan, North Carolina, USA) was bonded to a conductive coating. Use a manual wire bonder (trademark 45241) from Kulicke and Soffa Industries, Inc., 162148.doc • 19· 201242073, Washington, PA, USA) and use a 1 mil diameter gold wire through the gold bond pad. Each of the LED lines is bonded to a conductive circuit on a top surface of the dielectric substrate. Test the assembly using one of the power supplies from the Thurlby Thandar Instruments Limited (Tti) in Huntingdon, Cambridgeshire, UK, model EX4210R (voltage rating 42 V, current rating 10 A). The LEDs are bright blue when illuminated and the assembly exhibits flexibility. Example 3 Figure 6 shows the results of thermal modeling performed to replicate the heat transfer of the flexible LESD apparatus of the present invention having a thin dielectric layer between the LED and a thermally conductive layer. Thermal modeling was performed using a computer-aided design (CAD) software program purchased under the trade name Pr〇/ENGINEER from PTC in Needham, Massachusetts, USA. The design parameters used to model the heat dissipation on the thinned polyimine having a thickness of about 5 μηη are as follows: • 10 mm x 10 mm > 2 mm plate, the edge is maintained at 25 One of °C is set at a temperature of ten. • 4 mm><4 mmx〇.05 mm gold-tin eutectic solder. • 4 mm><4 mmx〇.05 mm electroplated copper. • 10 mmxlO mmx〇.05 mm polyimine circuit (with a central region thickness of 4χ4χΧ, where X is 0.05 mm). The material properties of UPILEX-S are used. • 4><4><丫 top copper plating, where the system is 5〇111111. • 1 mmxl mmx0.2 mm thin GaN LED on Shi Xi. Use the nature of Shi Xizhi. The ruthenium is not added to the copper solder because the thermal conductivity of the solder is about the same as the thermal conductivity of 162148.doc •20-201242073. • The thermal load on the top of the LED is 1500 mw (assuming a 2 watt LED with 25% external optical efficiency). Modeling for the above construction demonstrates an effective heat dissipation of about 6.3 ° C /W. While the invention has been illustrated and described herein for the purposes of illustrating the preferred embodiments of the preferred embodiments DETAILED DESCRIPTION OF THE INVENTION 'This does not depart from the scope of the invention. This application is intended to cover any adaptations or variations of the preferred embodiments discussed herein. Therefore, the invention is intended to be limited only by the scope of the claims and their equivalents. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 illustrates an embodiment of a flexible LESD of the present invention. 2A to 2B are diagrams showing a process for preparing a substrate of the present invention. 3 illustrates an embodiment of a flexible LESD of the present invention. Figure 4 illustrates an embodiment of a flexible lesd of the present invention. Figure 5 illustrates an embodiment of a flexible LESD of the present invention. Figure 6 is a continuation of the results of thermal modeling for a flexible LES device of the present invention. [Major component symbol description] 12 Flexible dielectric substrate 14 Conductive features 16 Conductive layer 17 Conductive layer 162148.doc -21 - 5 201242073 20 Conductive bump 22 Passivation or bonding layer 24 Light-emitting semiconductor device 26 Open section 30 Insulation 32 protrusion 50 core layer 52a thin outer layer 52b thin outer layer 54 copper layer 162148.doc -22-