TW201222687A - Semiconductor device and method of forming penetrable film encapsulant around semiconductor die and interconnect structure - Google Patents

Semiconductor device and method of forming penetrable film encapsulant around semiconductor die and interconnect structure Download PDF

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Publication number
TW201222687A
TW201222687A TW100136916A TW100136916A TW201222687A TW 201222687 A TW201222687 A TW 201222687A TW 100136916 A TW100136916 A TW 100136916A TW 100136916 A TW100136916 A TW 100136916A TW 201222687 A TW201222687 A TW 201222687A
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Taiwan
Prior art keywords
layer
semiconductor die
interconnect structure
semiconductor
bumps
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TW100136916A
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English (en)
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TWI541913B (zh
Inventor
Byung-Tai Do
Reza A Pagaila
Linda Pei Ee Chua
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Stats Chippac Ltd
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Publication of TW201222687A publication Critical patent/TW201222687A/zh
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    • H01L21/568—Temporary substrate used as encapsulation process aid
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Description

201222687 六、發明說明： 【發明所屬之技術領域】 本發明係大致有關於半導體裝置，並且更具體而言係 有關於一種半導體裝置以及在一半導體晶粒和互連結構周 圍形成一可穿透的膜封裝材料之方法》 【先前技術】 半導體裝置係常見於現代的電子產品中。半導體裝置 係在電氣構件的數目及密度上變化。離散的半導體裝置一 般包含一類型的電氣構件，例如，發光二極體（LED)、小信 號電晶體、電阻器、電容器、電感器、以及功率金屬氧化 物半導體場效電晶體（MOSFET)。集積的半導體裝置通常包 含數百到數百萬個電氣構件。集積的半導體裝置的例子= 包含微控制器、微處理器、電荷搞合裝置（CCD)、太陽能電 池、以及數位微鏡裝置（DMD)。 古半導，裝置係執行廣範圍的功能，例如，信號處理、 Γ 2 :计#送及接收電磁信號、控制電子裝置、轉換 太陽光成為電力、以及產生 、 丰⑼# w r么曰 电优‘項不态的視覺投影。 牛導體装置係見於娛樂、 及消# I β ΛΑ 〇電力轉換、網路、電腦以 及4 .費者產品的領域中。丰導 航…4 ^ 牛導體裴置亦見於軍事的應用、 工:飞車工業用的控制器、以及辦公室 半導體裝置係利用半導材 〇又 。 叩〒·寺·體材科的電朝 料的原子結構係容許其導 m。丰導體材 的施加或是透過摻雜的製 “或基綠 往加以U綸。摻雜係將雜質帶入 201222687 ，半導體材料中，以操縱及控制半導體裝置的導電度。 ' —半導體裴置係包含主動及被動的電性結構。包含雙 載子及場效電晶體的主動結構係控制電流的流動。藉由改 ^摻雜的程度以及一電場或基極電流的施加，該電‘體不 是提升、就是限制電流的流動。包含電阻器、電容曰器曰及電 感器的被動結構係在電壓及電流之間產生執行各種電氣功 能所必要的一種關係。該被動及主動結構係電連接以形成 電路，此係使得該半導體裝置能夠執行高速的計算及其它 有用的功能。 半導體裝置-般是利用兩個複雜的製程，#即，前端 製造及後端製造來加以製造，每個製造潛在涉及數百道步 驟。前端製造係牵涉到複數個晶粒在一半導體晶圓的表面 上的形成。每個晶粒通常是相同的並且包含藉由電連接主 動及被動構件所形成的電路。後端製造係牵涉到從完成的 晶圓單粒化（singuUting)個別的晶粒並且封裝該晶粒以提供 結構的支揮以及環境的隔離。 半導體製造的-目標是產出較小的半導體裝置。較小 的裝置通常消耗較低的功率，具有較高的效能，並且可以 更有效率地加以生產。此外，較小的半導體裝置具有一較 小的覆蓋區，此係較小的終端產品所期望的。較小的晶粒 尺寸可藉由在產生具有較小且較高密度的主動及被動構件 之晶粒的前端製程中的改良來達成。後端製程可以藉由在 電互連及封裝材料上的改良來產生具有較小覆蓋區的半導 體裝置封裝。 201222687 在展開形式晶圓級晶片尺寸封裝(F〇_WLCSp)中，一半 導體晶粒通常是安裝到—臨時的載體。一封裝材料 (encapsulant)通常是藉由模具注入而沉積在該半導體晶粒 及載體之上。該載體係被移除以露出該半導體晶粒，並且 -積層的（buUd-up)互連結構係形成在該露出的半導體晶粒 之上。 半導體晶粒已知在封裝期間，尤其是在模具注入期間 會垂直及橫向地位移，此可能會造成該積層的互連結構的 失準冑將半導體晶粒固定到载體以減低晶粒位移的技 術係牽涉到在該載體$ μ并彡士、1 戰體之上形成可濕性（wettable)墊，並且利 用凸塊以將該半導體晶粒固定到該些可濕性塾。可濕性塾 的形成通常牵涉到微影、蝕刻 n w 』及電鍍，此係耗時且昂貴的 2。可濕性塾及凸塊係增加在半導體晶粒及積層的互連 V#構之間的互連電阻。 複數個導電的貫孔或柱通當 、 硯^穿過s亥封裝材料來加以形 成，以用於Z方向的垂亩雷Η、击 ^ . 電互連到堆疊的半導體裝置。該此 導電的貫孔通常是與該封裝材 4二 刊付共千面的。該導電的貫判 之最小露出的表面積传降低夺 可靠度。 面積糾低和堆4的半㈣裝置之接合的 【發明内容】 對於減低晶粒位移且 罪度係存在著需求。於是 製造一半導體裝置之方法 改善堆疊的半導體裝置之接合可 ，在—實施例中，本發明係一種 ’其係包括以下步驟··提供一臨 201222687 - 時載體，在該臨時載體之上形成複數個第一凸塊，在該些 • 第—凸塊之間安裝一半導體晶粒至該臨時載體，提供—包 -含一基底層、第一黏著層以及第二黏著層之可穿透的臈封 裝材料層，在該半導體晶粒及第一凸塊之上加壓該可穿透 的膜封裝材料層以將該半導體晶粒及第一凸塊嵌入在該第 -及第二黏著層之内，固化該可穿透的膜封裝材料層分 開該第一黏著層以及第二黏著層以移除該基底層以及第— 黏著層並且留下在該半導體晶粒及第一凸塊周圍的該第二 黏著層，移除該臨時載體，以及在該半導體晶粒以及第二 黏著層之上形成一互連結構。 在另一貫施例中，本發明係一種製造一半導體裝置之 方法，其係包括以下步礴：提供一載體，在該載體之上形 成一第一互連結構，安裝一半導體晶粒至該載體，提供— 可穿透的膜封裝材料層，在該半導體晶粒以及第一互連結 構之上加壓該可穿透的膜封裝材料層以將該半導體晶粒以 及第一互連結構嵌入在該可穿透的膜封裝材料層之内，移 除5亥可穿透的膜封裝材料層的一第一部分以露出該第—互 連結構而留下該半導體晶粒以及第一互連結構周圍的該可 穿透的膜封裝材料層的一第二部分，移除該載體，以^在 該半導體晶粒以及該可穿透的膜封裝材料層的第二部分之 上形成一第二互連結構。 在另一實施例中，本發明係一種製造一半導體裝置之 方法，其係包括以下步驟：提供一可穿透的膜封裝材料層， 在一半導體晶粒以及第一互連結構之上加壓該可穿透的膜 201222687 封裝材料層以將該半導體晶粒以及第一互連結構嵌入在該 可穿透的膜封裝材料層之内’以及移除該可穿透的膜封裝 材料層的一第一部分以露出該第一互連結構而留下該半導 體晶粒以及第一互連結構周圍的該可穿透的膜封裝材料層 的一第二部分。 在另一實施例中’本發明係一半導體裝置，其係包括 一半導體晶粒以及設置在該半導體晶粒周圍的第一互連結 構。一可穿透的膜封裝材料層係在該半導體晶粒以及第— 互連結構之上被加壓’以將該半導體晶粒以及第一互連結 構敌入在該可穿透的膜封裝材料層之内。一第二互連結構 係形成在該半導體晶粒以及可穿透的膜封裝材料層之上。 實施方式】 本發明係在以下參考該 實施例來加以描述，其中相 似的元件。儘管本發明係以 模式來加以描述，但熟習此 係欲涵蓋可内含在藉由所附 揭露内容及圖式所支持的等 範疇内的替換物'修改以及 半導體裝置一般是利用 後端製造來加以製造。前端 半導體晶圓的表面上的形成 含電連接以形成功能電路的 些圖式的說明中，以一或多個 同的元件符號係代表相同或類 用於達成本發明之目的之最佳 項技術者將會體認到的是，其 的申請專利範圍及其由以下的 同項所界定的本發明的精神與 等同物》 兩個複雜的製程：前端製造及 製造係牽涉到複數個晶粒在— 。在該晶圓上的每個晶粒係包 主動及被動電氣構件。例如是 201222687 電晶體及二極體的主動電氣構件係具有控制電流的流動之 月匕力例如疋電谷器、電感器、電阻器及變壓器的被動電 氣構件係產生執行電路功能所必要的電壓及電流之間的一 種關係。 被動及主動構件係藉由一系列的製程步驟而形成在半 導體晶圓的表面之上，該些製程步驟包含摻雜、沉積、微 影、敍刻及平坦化。摻雜係藉由例如是離子植入或熱擴散 的技術以將雜質帶入半導體材料中。該摻雜製程係修改主 動元件’的半導體材料的導電度’其係轉換該半導體材料 成為、，邑緣體、導體、或是響應於—電場或基極電流來動態 地改變該半導體材料的導電度。電晶體係包含具有不同類 型及程度的摻雜的區域，該些區域係以使得該電晶體在電 场或基極電流的施加時能夠提升或限制電流的流動所必要 的來加以配置。 、主動及被動構件係藉由具有不同電氣特性的材料層來 力:以形成。該些層可藉由各種沉積技術來形成，該技術部 =由被沉積的材料類型來決定的。例如，薄膜沉積可能 牵"到化學氣相沉積（CVD) 、）物理軋相沉積（PVD)、電解的 電鍍以及無電的電锻製海。 , I耘母個層一般是被圖案化，以形 成主動構件、被動構件或是構件間的電連接的部分。 §亥些層可利用微影 粗 圖案化，微影係牵涉到光敏材 科（例如’光阻）在待被 用# % r 茶化的層之上的沉積。一圖案係利 用先從一光罩轉印至井阻。兮上 刹田 九 該先阻圖案遭受到光的部分係 利用—溶劑來移除，以露出 出下面待破圖案化的層的部分。 201222687 該光阻的剩餘部分係被移除，留下一圖案化的層。或者是， 某些類型的材料係藉由利用例如是無電的電鑛及電解的電 鍵的技術來直接將該材料沉積到該些區域或是沉積到由一 先前的沉積/蝕刻製程所形成的空孔中而被圖案化。 在現有的圖案之上沉積一材料薄膜可能會擴大下面 ㈣案並且產生一非均勾平坦的表面。一均勾平坦的表面 疋產生較小且更緊密聚集的主動及被動構件所需的。平坦 化可被利用來從晶圓的表面移除材料並且產生一均句平坦 的表面。平坦化係牽涉到利用一拋光墊來拋光晶圓的表 面。一研磨劑材料及腐钮性化學品係在抛光期間被加到晶 圓的表面。該研磨劑的機械性作用以及該化學品的腐钮性 作用的組合係移除任何不規則的表面構形，產生—均勻平 坦的表面。 後端製造係指切割或單粒化完成的晶圓成為個別的晶 粒並士接著為了結構的支撐及環境的隔離來封裝該晶粒。曰 為了單粒化晶粒’晶圓係沿著該晶圓的非功能區域（稱為切 割道或劃線）來被劃線且截斷。該晶圓係利用一雷射切割工 具或鑛刀而被單粒化。在單粒化之後，該個別的晶粒係^ 安裝到一封裝基板’該封裝基板係包含用於和其它系統構 件互連的接腳或接觸塾。形成在半導體晶粒之上的接㈣ 係接著連接至該封裝内的接觸墊。該些電連接可以利用辉 料凸塊、柱形凸塊、導電膏、或是引線接合來做成。—封 裝材料（encapsulant)或是其它模製材料係沉積在該封裝之 上，以提供實體支樓及電氣隔離。該完成的封裝係接著被 10 201222687 ***一電氣系統中，並且使得該半導體裝置的功能為可供 其它糸統構件利用的。 圖1係描繪具有複數個安裝於其表面上之半導體封带 的晶片載體基板或印刷電路板（PCB)52之電子裝置5〇。視 應用而定，電子裝置50可具有一種類型之半導體封裝或多 種類型之半導體封裝。不同類型之半導體封裝係為了說明 之目的而展示於圖1中。 电千裝置50可以是一使用該些半導體封裝以執行一或 多種電功能之獨立的系統。或者，電子裝置5〇可以是一較 大系統之子構件。舉例而言，電子裝置5〇可以是行動電話、 個人數位助理（PDA)、數位視訊攝影機（DVC)、或是其它電 子通訊裝置的一部份。或者是’電子裝置5〇可以是—可插 入電腦中之顧示卡、網路介面卡或其它信號處理卡。該半 導體封裝可包括微處理器、記憶體、特殊應用積體電路 (ASIC)、邏輯電路、類比電路、RF電路、離散裝置或其它 半導體晶粒或電氣構件。小型化及重量減輕是這些產：能 夠被市場接受所不可少的。在半導體裝置間的距離必須 短以達到更高的密度。 、、-、 在圖1中’PCB 52係提供—般的基板以供安裝在該 上之半導體封裝的結構支似電氣互連 54係利用某鍍、雷組^ 守电…虎線路 一電解的電鍍、無電的電鍍、網版印刷、或 =匕&的金屬沉積製程而被形成在PCB S2的一一 或是在層内〇作號始朴 又之上 件、以及係提供在半導體封裝、安裳的構 八匕4的系統構件的每一個之間的電通訊。線 201222687 路5 4亦提供電源及接地連接給每個半導體封妒。 在某些實施例中，-半導體裝置具有兩個封裝層級。 第-層級的封裝是-種用於將半導體晶粒機械及電氣地附 接至-中間載體的技術。第二層級的封袭係牽涉到將該中 間載體機械及電氣地附接至PCB。在其它實施例中，一半 導體裝置可以只有該第一層級的封裝，其中晶粒是直接機 械及電氣地安裝到PCB上。 為了說明之目的，包含引線接合封裝56及覆晶58之 數種類型的第-層級的封襄係被展示在pCB 52i。此外， 包含球狀柵格陣列（BGA)60、凸塊晶片載體（Be·〗、雙排 型封裝(mP)64、平台栅格陣列(LGA)66、多晶片模組 (MCM)68、四邊扁平無引腳封裝（qfn)7〇及四邊扁平封裝 72之數種類型的第二層級的封|係被展示安襄在pcB ^ 上。視系統需求而定，以第—及第二層級的封襄類型的任 意組合來組態的半導體封裝的任何組合及其它電子構件可 連接至PCB52。在某些實施例中，電子裝置5〇包含單 接时導體封裝，而其它實施例需要多個互連的封裝。藉 由在早-基板之上組合一或多個半導體封裝，製造商可^ 預製的構件納入電子罗：晉月备 藉雜的B 電子裝置及系統卜由於半導體封裒包括 複雜的功能，因此可佶用勒^ 使用較便且構件及流線化製程來製造 電子裝置。所產生的劈罟义 ^置不太可能發生故障且製造費用較 低，從而降低消費者成本。 圖2a-2c係展示範例的半導體封裝。圖 在PCB 52上的mp 64之 牛 女哀 V的細郎。半導體晶粒74係 12 201222687 • 包括一含有類比或數位電路的主動區域，該些類比或數位 電路係被實施為形成在晶粒内之主動元件、被動元件導 電層及介電層並且根據該晶粒的電設計而電互連。例如， 。亥電路可包含形成在半導體晶粒74的主動區域内之—或多 個電晶體、二極體、電感器、電容器、電阻器、以及其： 電路元件。接觸墊7 6是一或多層的導電材料，例如鋁（)、 s ()锡（Sn)、鎳（Nl)、金（Au)或銀（Ag),並且電連接至 形成在半導體晶粒74内之電路元件。在㈣Μ的組裝期 .間’半導體晶粒74係利用—金⑪共晶層或例如是熱環氧樹 :的黏著材料而被安裝到一中間載體78。封裝主體係包含 —種例如是聚合物或陶竞的絕緣封裝材料。導線⑽及引線 接合82係在半導體晶粒74及pCB52之間提供電互連。封 裝材料Μ係為了環境保護而沉積在該封裝之上以防止濕氣 及微粒進入該封裝且污染晶粒74或引線接合U。 μ圖2b係描繪安裝在pCB 52上之bcc 62的進一步細 即。匕半導體晶粒88係利用一種底膠填充⑴或是環氧 樹脂黏著材料92而被安裝在載體9〇之上。引線接合94係 在接觸塾96及98之間提供第—層級的封裝互連。模製化 合物或封裝材料100係沉積在半導體晶粒88及引線接合％ 之上以提供實體支撐及電氣隔離給該震置。接觸# 102係 ::用-例如是電解的電鑛或無電的電鍍之合適的金屬沉積 製程而被形成在PCB 52的-表面之上以避免氣化。接觸墊 1〇2係電連接至PCB52中的一或多個導電信號線路54。凸 塊1〇4係形成在BCC62的接觸墊98以及pcB52的接觸墊 13 201222687 102之間。 在圖2C中’半導體晶粒58係以覆晶型第一層級的封裝 方式面向下安裝到中間載體106。半導體晶粒5 8的主動區 域1 08係包含類比或數位電路，該些類比或數位電路係被 實施為根據該晶粒的電設計所形成的主動元件被動元 件 '導電層及介電層。例如，該電路可包含一或多個電晶 體、一極體、電感器、電容器、電阻器以及主動區域108 内之其它電路元件。半導體晶粒58係透過凸塊n〇電氣及 機械地連接至載體1〇6。 BGA 60係以BGA型第二層級的封裝方式利用凸塊n2 電氣及機械地連接至PCB 52。半導體晶粒58係透過凸塊 110、仏號線114及凸塊ii2電連接至PcB 52中的導電信 號線路54。一種模製化合物或封裝材料i 16係沉積在半導 體晶粒58及載體1〇6之上以提供實體支撐及電氣隔離給該 裝置。該覆晶半導體裝置係提供從半導體晶粒5 8上的主動 元件到PCB 52上的導電跡線之短的導電路徑，以便縮短信 號傳遞距離、降低電容以及改善整體電路效能。在另一實 施例中，半導體晶粒5 8可在無中間載體丨〇6的情況下，利 用覆晶型第一層級的封裝直接機械及電連接至PCB 52。 圖3a係展示一具有一種例如是矽、鍺、砷化鎵、磷化 銦或矽碳化物的主體基板材料122以供結構支撐的半導體 晶圓12 0。如上所述，複數個半導體晶粒或構件12 4係形成 在晶圓120上且藉由切割道126分開。 圖3b係展示半導體晶圓120的一部份的橫截面圖。每 14 201222687 個半導體晶粒124係具有一背表面128以及一包含類比或 數位電路的主動表面130,該類比或數位電路被實施為形成 在該晶粒内且根據該晶粒的電設計及功能電互連的主動元 件、被動元件、導電層以及介電層。例如，該電路可包含 一或多個電晶體、二極體以及其它形成在主動表面13〇内 之電路元件以實施類比電路或數位電路，例如數位信號處 理器（DSP)、ASIC、記憶體或是其它信號處理電路。半導體 B曰粒124亦可包含整合被動裝置（IpD)，例如電感器、電容 器及電阻器，以供RF信號處理使用。在一實施例中，半導 體晶粒124是—覆晶類型的半導體晶粒。 一導電層132係利用PVD、CVD、電解的電鍍、無電 的電鍍製程、或是其它合適的金屬沉積製程而形成在主動 表面130之上。導電層132可以是一或多層的AbCu、k、 N” Au、Ag、或是其它合適的導電材料。導電層m係運 作為接觸塾’該些接觸塾係電連接至主動表面13G上的電 圖3c中，半導體晶圓12〇係利用鋸刀或雷射切割工 個另切割道126而被單粒化，以將該晶圓分開成為 個別的+導體晶粒124。 圖^係相關於圖來描繪—種在—半導體 互連結構周圍形成一可穿透的膜封裝 程。圖4a係显- J ^ 基底材料，i 或載體刚，其係包含臨時或犧牲 成本地歹如’矽、聚合物、鈹氧化物或其它適當的低 材料，以用於結構的支樓。—介面層或雙面帶142 15 201222687 係形成在載體 停止層。 140之上以作為— 臨時黏著的黏合膜或蝕刻 在圖4b中，-導電的凸塊材料係利用一蒸鍛、電解的 電錢、無電的電鐘、球式滴落(balldr〇p)或網版印刷製程而 沉積在載體140及介面層142之上。該凸塊材料可以是八卜 8^^、^、1>1)、則、（：11、焊料、及其組合，直且有 -選配的助熔(㈣溶劑。例如，該凸塊材料 n Pb、高鉛的焊料或是無鉛的桿料。在一實施例中該凸 塊材料係藉由加熱該材料超過其炼點來進行回焊以形:球 或凸塊144。凸塊M4係被設置在指定用於稍後安裝的半導 體晶粒的安裝位請的周圍。凸塊144係代表一種類型 的z方向垂直的互連結構，其可以形成在載體之上。古亥 互連結構亦可以使用柱形凸塊、微凸塊或是其它的電互連: 在圖4c-4d中，半導體晶粒124係從圖“士利用拾放 動作並且以主動表Φ 130朝向載體140及介面層142而被 安裝到凸請之間的位^ 146。在一實施例中，半導體晶 粒124係具有450微米(μηι)的厚度。凸塊144係具有大於 的高度以延伸超出半導體晶粒124的背表面128。圖 钓是形成在半導體晶粒124周圍的凸請的俯視圖。凸 塊144可以在安裝半導體晶粒124到載體14〇之後才形成。 圖係展示一利用導電柱148形成在載體14〇之上且 在半導體晶粒124周圍的替代實施例。導電柱148可以在 女裝半導體晶粒124之前或是之後，藉由沉積一光阻層在 載體140之上並且接著利用微影來圖案化該光阻以在該柱 16 201222687 - 位置中形成貫孔來加以形成。該些貫孔係利用電解的電 • 鍵、無電的電鍵製程、或是其它適當的金屬沉積製程而被 填入 A1、Cu、Sn、Ni、Au、Ag、Ti、鎢（W)、多晶矽、或 是其它適當的導電材料。該光阻係被移除，而留下z方向垂 直的導電柱148。導電柱148係延伸超出半導體晶粒丨24的 背表面128。 圖4g係展示一可穿透的膜封裝材料層15〇，其係包含 基底層152、紫外線（UV)B-階段膜黏著層154、以及熱凝黏 著膜層156。在一實施例中，基底層152係包含聚酯，並且 UV B -階段膜黏著層1 5 4係包含丙稀酸聚合物。該熱凝黏著 膜層156係具有大約20-45ppm/K之低的熱膨脹係數（CTE) 以及大約1000-34000MPa之高的模數（m〇dulus)，例如可見 於 Denko 的 AS-00(H、AS-0016 以及 AS-0036 黏著膜。該可 穿透的:膜封裝材料層1 50係被加熱到70°C以使得黏著層 154及156為軟的、有延展性的且為柔性的。 δ亥可穿透的膜封裝材料層1 5 0係被設置在半導體晶粒 124、凸塊144及載體14〇之上。該可穿透的膜封裝材料層 150係以一力F而被壓到半導體晶粒124及凸塊144之上， 以使得該半導體晶粒及凸塊穿透到黏著層丨54及丨56中。 在黏著層156來到接近或接觸介面層142的一頂表面之 後，该力F係被移去。圖4h係展示半導體晶粒丨24及凸塊 144被嵌入到黏著層154及156之中。凸塊144可接觸、或 是可不接觸到基底層152。該可穿透的膜封裝材料層15〇係 被固化以硬化黏著層156並且穩固地保持住半導體晶粒η# 17 201222687 及凸塊144。 在圖41中，基底層152及uv 3_階段膜黏著層154係 藉由在箭頭158的方向上的機械式剝離或機械式剝除而被 移除。該階段膜黏著層154係在uv照射下分離，而黏 著層156係留在半導體晶粒124及凸塊144的周圍，以作 為一用於該半導體裝置的結構支撐以及免於接觸到外部的 "°素及巧染物的環境保護之封裝層。凸塊144係從黏著層 =6露出以用於外部的電互連。基底層152及β階段膜黏 著層154亦可藉由化學品蝕刻、CMp、機械式研磨、熱烘 烤、UV光 '雷射掃描、或是濕式剝除而被移除。 在圖4j中，載體140及介面層142係藉由化學品姓刻、 拽械式剝離、CMP、機械式研磨、熱烘烤、UVs、雷射掃 描或疋濕式剝除而被移除，以露出主動表面130及凸塊 144。 在圖4k中，一底侧積層的互連結構1 6〇係形成在半導 體阳粒124的主動表φ 13〇以及黏著層156之上。該積層 的互連結構1 60係包含一導電層丨62，該導電層】62係利用 例如是濺鍍、電解的電鍍以及無電的電鍍之圖案化及金 屬儿積製程來加以形成。導電層1 62彳以是一或多個層的 A1、C Li、q -v τ · bn、Ni、Au、Ag、或是其它適當的導電材料。導 告:I62的一部分係電連接至凸塊144。導電層162的另— 係電連接至半導體晶粒丨24的接觸墊丄32。導電層162 妓”匕。卩分可以根據該半導體裝置的設計及功能而為電氣 共用的或是電氣隔離的。 〃 18 201222687 該積層的互連結構160進一步包含一形成在導電層162 之間的絕緣或保護層164，以用於電氣隔離。該絕緣層164 係包含一或多個層的二氧化矽（si〇2)、矽氮化物（Si3N4)、 氮氧化矽（SiON)、五氧化二鉅（Ta2〇5)、鋁氧化物（A12〇3)、 或是其它具有類似的絕緣及結構性質的材料❶該絕緣層164 係利用PVD、CVD、印刷、旋轉塗覆、喷霧塗覆、燒結或 熱氧化來加以形成。絕緣層丨64的一部分係藉由一蝕刻製 程而被移除以露出導電層162。 在圖41中，一導電的凸塊材料係利用一蒸鍍、電解的 電鍍、無電的電鍍、球式滴落或網版印刷製程而沉積在積 層的互連結構160之上並且電連接至該露出的導電層162。 該凸塊材料可以是八卜Sn、Ni、Au、Ag、Pb、Bi、Cu、焊 料、及其組合，其具有一選配的助熔溶劑。例如，該凸塊 材料Γ以疋共日日Sn/Pb、而錯的焊料或是無錯的焊料。該凸 塊材料係利用一適當的連結或接合製程而被接合到導電層 162。在一貫施例中，該凸塊材料係藉由加熱該材料超過其 熔點來進行回焊以形成球或凸塊i 66。在某些應用中，凸塊 166係二次進行回焊以改善至導電層162的電接觸❶該些凸 塊亦可以壓縮接合到導電層162。凸塊166係代表_種類型 的可形成在導電層162之上的互連結構。該互連結構亦可 以使用接合線、柱形凸塊、微凸塊或是其它的電互連。 半導體晶粒124係利用鋸刀或雷射切割工具168而被 早粒化為個別的Fo-WLCSP 170。圖5係展示在單粒化之後 的F0-WLCSP170。半導體晶粒124係電連接至積層的互連 19 201222687 結構160以及凸塊144及丨66。該具有黏著層i54及i56之 可穿透的膜封裝材料層150被加壓到半導體晶粒124及凸 塊144之上，此係降低橫向及垂直的晶粒位移。在移除基 底層152及UVB_階段膜黏著層154之後，黏著層156係留 在半導體晶粒周圍124及凸塊144的周圍，以作為一用於 該半導體裝置的結構支撐以及免於接觸到外部的元素及污 木物的％境保護之封裝層。藉由將黏著層丨5 6加壓到半導 體晶粒124以及凸塊144之上以作為該封裝層，因此沒有 如同在習知技術中所見的造成晶粒位移的封裝材料之注 入0 圖6係展示類似於圖5的WLCSP丨72的一實施例，其 中黏著層156係與半導體晶粒124的背表面128共平面。 圖7係展示類似於圖5的WLCSP 174的一實施例，其 中一導電層或重新分配層（RDl) 1 76係利用一例如是濺鍍、 電解的電鍍以及無電的電鍍之圖案化及金屬沉積製程而形 成在黏著層156之上。導電層〖76可以是一或多個層的A1、 Cu、Sn、Ni、AU、Ag、或是其它適當的導電材料。熱凝黏 著層1 56的固化製程係使得高溫金屬沉積成為可能的。導 電層176的一部分係電連接至凸塊144。導電層176的其它 部分可以根據該半導體裝置的設計及功能而為電氣共用的 或是電氣隔離的。
圖8係展示複數個堆疊的f〇-WLCSP 1 70，其係藉由凸 塊144、積層的互連結構16〇以及rdL 176來電連接。在凸 塊144延伸超出黏著層ι56的情形下，至相鄰的f〇_wLCSP 20 201222687 • 170的垂直電互連會有更大的接觸表面積及更高的接合可 - 靠度。 - 圖9係展示類似於圖5的WLCSP 180的一實施例，其 中凸塊1 82係形成在接觸墊丨32之上。接觸墊i 84係在安 褒半導體晶粒124之前的例如是在圖4b的製程步驟期間形 成在；I面層I42之上。類似於圖4C，具有凸塊182的半導 體晶粒124係被安裝到接觸墊丨84。 儘管本發明的一或多個實施例已經詳細地描述，本領 拷技術人員將會體認到可在不脫離本發明如以下申請專利 範圍中闡述的範疇下，對那些實施例進行修改及改編。 【圖式簡單說明】 的 圖1係描繪-具有不同類型的封裝安裝到其表面 PCB ; 圖2a-2c係描繪安裝到該pcB之代表性的半導體封裝 的進一步細節； 、 圖3a-3c係描繪一具有複數個藉由切割道分開的 體晶粒之半導體晶圓； 圖4“丨係描繪一種在一半導體晶粒及互連結構周圍形 成―可穿透的臈封裝材料層之製程； =係描繪具有形成在該半導體晶粒及互連結構周圍 、「穿透的膜封裝材料層之F0_WLCSP ; 料層圖6係描綠與半導體晶粒共平面的可穿透的膜封裂材 21 201222687 圖7係描繪一形成在該可穿透的膜封裝材料層之上的 RDL ； 圖8係描繪堆疊的Fo-WLCSP，每個f〇-WLCSP係具有 形成在该半導體晶粒以及互連結構周圍之可穿透的膜封裝 材料層；以及 圖9係描繪形成在半導體晶粒上的接觸墊之上的凸塊。 【主要元件符號說明】 50電子裝置 52晶片載體基板（印刷電路板） 5 4信號線路 6〇球狀柵格陣列（BGA) 62凸塊晶片載體（BCC) 64雙排型封裝（DIP) 66平台栅格陣列（LGA) 68多晶片模組（mcm) 70四邊扁平無引腳封裝（QFN) 72四邊扁平封裝 74半導體晶粒 7 6接觸墊 7 8中間載體 導線 82引線接合 84封裝材料 22 201222687 - 88半導體晶粒 . 90載體 92底膠填充材料（環氧樹脂黏著材料） 94引線接合 96、98接觸墊 100模製化合物（封裝材料） 102接觸墊 104凸塊 106中間載體 1 08主動區域 1 1 0、1 1 2 凸塊 1 1 4信號線 116模製化合物（封裝材料） 120半導體晶圓 122主體基板材料 124半導體晶粒（構件） 126切割道 128背表面 130主動表面 . 132導電層 134鋸刀（雷射切割工具） 140基板（載體） 142介面層（雙面帶） 144凸塊 23 201222687 146安裝位置 148導電柱 150可穿透的膜封裝材料層 152基底層. 154紫外線（UV)B-階段膜黏著層 156熱凝黏著膜層 158箭頭 160積層的互連結構 162導電層 164絕緣（保護）層 166球（凸塊） 168鋸刀（雷射切割工具）
170 Fo-WLCSP 172 WLCSP 174 WLCSP 176導電層（重新分配層） 180 WLCSP 182凸塊 184接觸墊 24

Claims (1)

  1. 201222687 七、申請專利範圍： - 1· 一種製造一半導體裝置之方法，其係包括： . 提供一臨時載體； 在該臨時載體之上形成複數個第一凸塊； 在該些第一凸塊之間安裝一半導體晶粒至該臨時載 體； 提供一包含一基底層、第一黏著層以及第二黏著層之 可穿透的膜封裝材料層； 在該半導體晶粒及第一凸塊之上加壓該可穿透的膜封 裝材料層’以將該半導體晶粒及第一凸塊嵌入在該第一及 第二黏著層之内； 固化該可穿透的膜封裝材料層； 分開該第一黏著層以及第二黏著層以移除該基底層以 及第一黏著層’並且留下在該半導體晶粒及第一凸塊周圍 的該第二黏著層； 移除該臨時載體；以及 在該半導體晶粒以及第二黏著層之上形成一互連結 構。 2. 如申凊專利範圍第1項之方法，其中該些第一凸塊係 延伸超出該第二黏著層。 3. 如申請專利範圍第丨項之方法，其進一步包含在該互 連結構之上形成複數個第二凸塊。 4·如申請專利範圍第丨項之方法，其中該第二黏著層係 與該半導體晶粒共平面。 25 201222687 5.如申請專利範圍第1項之方法，其進一步包含在電連 接至該些第一凸塊的該第二黏著層之上形成一導電層。 6 _如申請專利範圍第1項之方法，其進一步包含： 堆疊複數個半導體裝置；以及 透過該些第一凸塊及互連結構來電連接該些堆疊的半 導體裝置。 7. —種製造一半導體裝置之方法，其係包括： 提供一載體； 在該載體之上形成一第一互連結構； 安裝一半導體晶粒至該載體； 提供一可穿透的膜封裝材料層； 在该半導體晶粒以及第一互連結構之上加壓該可穿透 的獏封裝材料層，以將該半導體晶粒以及第一互連結構嵌 入在該可穿透的膜封裝材料層之内； 移除該可穿透的膜封褒材料層的一第一部分以露出該 第—互連結構，而留下該半導體晶粒以及第一互連結構周 圍的該可穿透的膜封裝材料層的一第二部分； 移除該載體；以及 部分之上形成一第二互連結構 ^ 8 ·如申請專利範圍第7項之方法，其中該可穿透的 羞材料層係包含一基底層、第—黏著層以及第二黏著 。9.如巾請專利範圍第7項之方法，其進一步包含固 可穿透的膜封裝材料層。 26 201222687 Π).如申請專利範圍第7項之方法，其進—步包 連接至該第-互連結構的該可穿透的膜封裝材 二部分之上形成一導電層。 乐 其中該第一互連結 其進一步包含： 11 ·如申請專利範圍第7項之方法 構係包含凸塊或導電柱。 12.如申請專利範圍第7項之方法 堆疊複數個半導體裝置；以及 透過該第-及第二互連結構來電連接該 體襞置。 二刃干等 13.如申請專利範圍第7項之方法，其進_步包含在安 敦該半導體晶粒到該載體之前，在該半導體晶粒上的接觸 墊之上形成凸塊。 \4. 一種製造一半導體裝置之方法，其係包括： 提供一可穿透的膜封裝材料層； 在一半導體晶粒以及第一互連結構之上加壓該可穿透 的膜封裳材料層，以將該半導體晶粒以及第—互連結構嵌 入在該可穿透的膜封裝材料層之内；以及 移除该可穿透的膜封裝#料層# 一第一部分以露出該 上、、、、°構而留下δ玄半導體晶粒以及第一互連結構周 圍的該可穿透的膜封裝材料層的一第二部分。 ,j·如申靖專利範圍第14項之方法，其進一步包含在該 半導體晶粒以及該可穿透的膜封裝材料層的第二部分之上 形成—第二互連結構。 6’如申请專利範圍第14項之方法，其中該可穿透的膜 27 201222687 封裝材料廣係包含一基底層、第一黏著層以及第二黏著層。 ▲ π·如中請專利範㈣14項之方法，其進_步包含固化 该可穿透的膜封裝材料層。 18_如申請專利範圍第Η項之方法，其進—步包含在該 可穿透的膜封裝材料層電連接至該第一互連結構的該第二 部分之上形成一導電層。 19.如申請專利範圍帛14項之方法，其中該第一互連緒 構係包含凸塊或導電柱。 2〇·如申請專利範圍第14項之方法，纟進_步包含： 堆疊複數個半導體裝置；以及 透過該第一互連結構來電連接該些堆疊的半導體裝 置。 21.—種半導體裝置，其係包括： —半導體晶粒； —设置在該半導體晶粒周圍的第一互連結構； —可穿透的膜封裝材料層，其係在該半導體晶粒以及 第互連結構之上被加壓，以將該半導體晶粒以及第一互 連結構礙人在該可穿透的膜封襄材料層之内；以及 第一互連結構’其係形成在該半導體晶粒以及可穿 透的骐封裝材料層之上。 .如申π專利範圍第21項之半導體裝置，其中該第一 互連結構係從該可穿透的膜封裝材料層露出。 23.如申請專利範圍第21項之半導體裝置，其進一步包 導電層，該導電層係形成在電連接至該第一互連結構 28 201222687 . 的該可穿透的膜封裝材料層之上。 24. 如申請專利範圍第2 1項之半導體裝置，其中該第一 互連結構係包含凸塊或導電柱。 25. 如申請專利範圍第21項之半導體裝置，其進一步包 含複數個透過該第一及第二互連結構電連接之堆疊的半導 體裝置。 八、圖式： (如次頁） 29
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