201202943 六、發明說明： 【發明所屬之技術領域】 ’特別是有關於一 [0001 ]本發明係有關於資料傳輸系統與方法 種串列（serial)裝置的資料傳輸系統與方法。 【先前技術】201202943 VI. Description of the Invention: [Technical Field of the Invention] ‘Specially related to a [0001] The present invention relates to a data transmission system and method for a serial transmission device of a data transmission system and method. [Prior Art]
host)與週邊裝置（device)之間。 n a 1 Bus，以下簡稱 用以傳輸資料於主機（ 間。USB版本1. 〇的資 料傳輸速度為1.5百萬位元/秒（低速’ 1〇w speed)及 12百萬位元/秒（全速，fuU speed)，usb版本2 〇的 資料傳輸速度為480百萬位元/秒（高速，high speed) 。目前更推出USB版本3. G，其資料傳輸速度為4. 8十億 位凡/秒（超高速’ super speed)，細節可參考“Host) is between the device and the device. Na 1 Bus, hereinafter referred to as the data transmission on the host (between USB version 1. 资料 data transmission speed is 1.5 million bits / sec (low speed ' 1 〇 w speed) and 12 million bits / sec (full speed , fuU speed), usb version 2 〇 data transmission speed is 480 million bits / sec (high speed, high speed). Currently, the USB version 3. G, the data transmission speed is 4. 8 billion yuan / Second (super speed 'super speed), details can refer to "
Universal Serial Bus 3.0 Specification” 。 [綱3]在USB 2.0協定中，USB 2.0的集線器（HUB)可相容於 USB 1. 〇的裝置。第1圖係顯示包含USB 2. 〇的集線器和 USB 3. 0的集線器之USB 3. 0系統示意圖。如第1圖所顯 示’在USB 2. 0集線器1〇1中包含usb 2. 0事務轉譯器（ transaction translator) 103，其可以將USB 1.0 格式的資料轉譯為USB 2.0格式的資料，使USB 1.0裝置 109能轉譯成USB 2. 0的裝置，以便與主機1〇7之間使用 USB 2. 0協定進行資料傳輸。而在USB 3 〇協定中，並未 規定USB 3. 0的集線器可以相容於USB 2. 0的裝置。亦即 在第1圖中’ USB 3. 0集線器105中並未包含類似於USB 2. 0事務轉譯器1〇3的事務轉譯器，USB 2 〇裝置1Ur 100112236 表單編號A0101 第4頁/共36頁 1002020462-0 201202943 此通過USB 2.G集線器1Gl以USB 2.G協定與主機107進 ❻料傳輸°由此可見’即使在支援以USB 3. G協定進行 資料傳輸的系射，USB 裝置仍舊無法以較高的速 率與主機間進行資料傳輸，咖2()裝置無法使用 3·0系統中10倍於USB 2.〇系統的頻寬（bandwidth)， 其將不利於USB 3.0系統性能的提高。因此，需要一種可 以將USB 2.G裝置轉譯為USB 3 {)裝置進行資料傳輸的系 ΟUniversal Serial Bus 3.0 Specification" [3] In the USB 2.0 protocol, a USB 2.0 hub (HUB) is compatible with USB 1. 。 devices. Figure 1 shows a hub with USB 2. 和 and USB 3 0. Hub USB 3. 0 system diagram. As shown in Figure 1, 'USB 2.0 0 hub 1〇1 contains usb 2. 0 transaction translator 103, which can be in USB 1.0 format The data is translated into USB 2.0 format data, enabling the USB 1.0 device 109 to be translated into a USB 2.0 device for data transfer between the host PC and the USB 2.0 protocol. In the USB 3 protocol, It is not specified that the USB 3. 0 hub can be compatible with USB 2.0 devices. That is, in Figure 1 'USB 3. 0 Hub 105 does not contain a USB 2. 0 Transaction Translator 1〇3 Transaction Translator, USB 2 〇 Device 1Ur 100112236 Form No. A0101 Page 4 / Total 36 Page 1002020462-0 201202943 This is transmitted via USB 2.G Hub 1Gl to the host 107 via USB 2.G protocol. 'Even if it supports the transmission of data by USB 3. G protocol, the USB device still Data transmission between the host and the host cannot be performed at a higher rate. The device cannot use the bandwidth of the USB 2.0 system in the 3·0 system, which is not conducive to the performance improvement of the USB 3.0 system. Therefore, there is a need for a system that can convert a USB 2.G device into a USB 3 {) device for data transmission.
統與方法，以提高USB 3.Q系統中 2Q裝置的傳輸速 度，提高USB 3.0系統的性能^ L贫明内容】 _]本發明提供-„料傳輸系統。該資料傳齡統包括： 第-控制電路耦接於第一裳置，用以解碼由該第一裝置 發出的一第-格式資料封包；轉譯電_接於該第—控 制電路，用以接收該解碼後的第—格式資料封包，並將 鱗碼後的第-格式資料封包轉譯為第二格式資料封包 ;以及第二控制電路’_於該轉譯電路，用以將該第 二格式資料封包傳送到主機。其中，該第一裝置的資料 傳輸速度低於-第二裝置的資料傳輸速度，該資料傳輸 系統向下相容於該第一裝置。 [0005] Μ，本發明提供-種㈣傳輪方法1㈣傳輸方法 ㈣以下步驟:解碼由第—裝置發出的第一格式資料封 包；接收該解魏的第-格式f料封包，並將該解瑪後 的第-格式資料封包轉譯為第二格式資料封包；以及將 該第二格式資料封包傳送到一主機。其中，該 的資料傳輸速度低於一第二裝置的資料傳輸速度，：， 100112236 表單編號A0101 第5頁/共36頁 1002020462-0 201202943 資料傳輸方法向下相容於該第一裝置。 [0006] [0007] 根據本發明又一實施例，通用串列匯流排（USB)事務轉 澤器包含裝置介面、主機介面、至少一缓衝記憶體、控 制益、訊框起始（SOF )定時器及訊框起始（s〇F )產生 器。裝置介面藉由裝置匯流排連接至裝置，主機介面藉 由主機匯流排連接至主機，其中，主機所規範的USB版本 向於裝置所規範的USB版本。緩衝記憶體設置於裝置介面 和主機介面之間’用以儲存數據，而控制器則用以將數 據儲存於緩衝記憶體。訊框起始（S0F)定時器自控制器 接收一動態調整之訊框起始（S〇F)封包的發送週期，以 進行定時控制，而訊框起始（S0F)產生器受控於控制器 ，以動態產生訊框起始（SOF)封包。 【實施方式】 為讓本發明之上述和其他目的、特徵、和優點能更明顯 易懂，下文特舉出較佳實施例，並配合所附圖式，作詳 細說明如下： 實施例： 第2圖係顯示根據本發明一實施例所述之USB 3. 〇事務轉 譯器的架構圖。如第2圖所示，USB 3.0事務轉譯器2〇包 括USB 2. 0控制電路2〇1、微控制單元（Micr〇 c〇ntr〇1System and method to improve the transmission speed of 2Q devices in USB 3.Q system, improve the performance of USB 3.0 system ^ L poor content] _] The present invention provides - "material transmission system. The data age system includes: The control circuit is coupled to the first skirt for decoding a first format data packet sent by the first device, and the translation circuit is coupled to the first control circuit for receiving the decoded first format data packet Translating, after the scale, the first format data packet into a second format data packet; and the second control circuit 'for the translation circuit, configured to transmit the second format data packet to the host. The first The data transmission speed of the device is lower than the data transmission speed of the second device, and the data transmission system is downward compatible with the first device. [0005] The present invention provides a method for transmitting (4) transmission method 1 (4) transmission method (4) Decoding a first format data packet sent by the first device; receiving the first format f packet of the deciphering, and translating the decoded first format data packet into a second format data packet; Two format data The packet is transmitted to a host, wherein the data transmission speed is lower than the data transmission speed of the second device:, 100112236 Form No. A0101 Page 5 / Total 36 Page 1002020462-0 201202943 The data transmission method is downward compatible with the [0006] According to still another embodiment of the present invention, a universal serial bus (USB) transaction switch includes a device interface, a host interface, at least one buffer memory, a control benefit, and a frame. a start (SOF) timer and a frame start (s〇F) generator. The device interface is connected to the device by a device bus, and the host interface is connected to the host through a host bus, wherein the USB version specified by the host is The USB version specified in the device. The buffer memory is disposed between the device interface and the host interface to store data, and the controller is used to store data in the buffer memory. The frame start (S0F) timer is The controller receives a dynamically adjusted frame start (S〇F) packet transmission period for timing control, and the frame start (S0F) generator is controlled by the controller to dynamically generate a frame start ( The above and other objects, features, and advantages of the present invention will become more apparent and understood. Example: Figure 2 is a block diagram showing a USB 3. 〇 Transaction Translator according to an embodiment of the present invention. As shown in Figure 2, the USB 3.0 Transaction Translator 2 includes a USB 2.0 control circuit. 1. Micro control unit (Micr〇c〇ntr〇1
Unit ’ MCU) 205、USB 3· 0轉譯電路209和USB 3. 〇控 制電路203。USB 2.0控制電路201叙接於USB 3.0事務 轉譯器20外部的USB 2.0裝置211，用以量測USB 2.0裝 置211的資料傳輸速度、解碼USB 2.0裝置211所發出的 USB 2.0格式的資料以及負責USB 3.〇轉譯電路2〇9與 100112236 表單編號A0101 第6頁/共36頁 1002020462-0 201202943 Ο USB 2.0裝置211之間的資料傳輸等。USB 3 〇轉譯電路 209耦接於USB 2.0控制電路201，用以進行協定轉譯（ protocol c〇nvert)，即將需要轉譯為Usb 3.0格式之 USB 2.0格式的資料進行轉譯、將需要轉譯為· 2 〇格 式之USB 3. G格式的資料進行轉譯以及暫存需要轉譯的資 料等。USB 3.0控制電路2〇3耦接於USB 3. 〇轉譯電路 2〇9 ’用以進行USB 3.0裝置的枚舉流程（emuiati〇n flow)以確認有正確的USB 3. 0裝置的連接，以及負責 USB 3.0轉譯電路209與主機207之間的資料傳輸等。微 控制早元205麵接於USB 2. 0控制電路201、USB 3 0轉 譯電路2^)9和USB 3. 0控制電路203，用以控制各模組之 間的資料傳輸。在一實施例中’可以由其他邏輯電路來 耗接於USB 2.0控制電路201、USB 3.0轉譯電路2Q9和 USB 3. 0控制電路203，用以控制各模組之間的資料傳輸 〇 [0008] ❹ 在一實施例中，每一USB 2· 0裝置211對應於一相應的 USB 3.0事務轉譯器20’該USB 3.0事務轉譯5|2〇負責 USB 2.0裝置211與主機207之間的資料傳輪，USB 3.〇 事務轉譯器20與第1圖中的USB 3.0集線器1〇5是相互獨 立的。在另一實施例中’ USB 3. 0事務轉譯器2〇位於USB 3. 0集線器105中，該USB 3_ 0事務轉譯器2〇可對多個 USB 2. 0裝置211進行轉譯。 在一實施例中’USB 3.0事務轉譯器可耦接於USB 1.〇的 裝置與主機之間，以便將USB 1.0的裝置（包括低速和全 速兩種）轉譯為USB 3. 0的裝置，以使USB 1. 0的裝置的 100112236 表單編號A0101 第7頁/共36頁 1002020462-0 [0009] 201202943 資料以較高的速度在USB 3. 〇系統中傳輸。 [0010] [0011] [0012] 100112236 第3圖係顯示本發明第2圖中USB 2〇控制電路2〇i的具體 實施例的架構圖。如第3圖所示，USB 2 〇控制電路2〇1 包括USB 2. 〇連接介面301、USB 2 〇埠控制器3〇3、ϋδβ 2.0串列連接介面引擎305和旁路開關313。Usb 2 〇連 接介面301耦接於USB 2_〇裝置211，用於USB 2 〇控制 電路201與USB 2.0裝置211之間的資料傳輸。 通常主機需要相容於多種USB裝置，因此其所輸出的信號 質量可以保證能和大多數的USB裝置進行正常通信但 疋卻無法為母個USB裝置都提供最好的信號鏈結。在一實 施例中’當母一USB 2.0裝置211對應到一相應的usb 3.0事務轉譯器20時，USB 2.0連接介面301中包括一對 應的信號質量調整電路307，該信號質量調整電路307可 根據該USB 3.0事務轉譯器20連接的USB 2.0裝置211的 具體情況’來調整信號傳輸的質量。例如，信號質量調 整電路307可以在微控制單元205的控制下編程（program) USB 2. 0裝 置的信 號參數 ，例如 ，信 號的 上升時 間’下降時間，時鐘恢復電路的參數等等，以使USB 2.0 控制電路201與USB 2. 0裝置211之間的介面傳輸更加穩 定，以減少傳輸錯誤的產生。信號質量調整電路307可以 大幅度地提高USB 2.0裝置的傳輸速度，使得USB 2.0裝 置的實際傳輸速度能進一步提高。 在一般的系統中，由於每一主機可對應於多個USB裝置， 因此多個資料封包之間的傳輸間隔是固定的，例如為5 u s ’若所連接的USB裝置資料傳輸速率較快，例如資料封包 表單編號AOiOi 第8頁/共36頁 1002020462-0 201202943 之間的傳輸間隔可以灸 序間隔是时的，因此資^^於多個資料封包之間的時 輪驗能則無法得到提高。若所 =的娜裝置㈣傳輸的迷率較慢 -資㈣心讀’咖裝置未能為下 輪做好準備，則咖裝置會發出未準傷（ 後=)信號，並經過復長的時間間隔，例如10us 二 行資料封包傳輸的重試，這也將對資料傳 Ο 裝置響在實施例中，當每一USB 2.0 USB 相應_ 3.G事務轉譯器20時， ^ 2.G控制電路2G1更包括時序控制電路_，該時序 Ο ㈣電路3咐__ u事務編觸連接之序 f32.—G裝置2U的具體情況，來對資料封包傳輸的時序 進订編程’這將會大大提高傳輸的性能。同時，時 序控制電路309更可編程域收到裝置未準備信號之後到 進行資料封包傳輸重試之_時《隔，❹裝置空閒 等待的時間’以獲得更好的傳輸性能。在一實施例中， 該時序控制電路_係位於_ 2.0串列連接介面引擎 305 中。 闺_ 2屬控制器3_接於_ 2 g連接介面训，用 以測量USB 2.0裝置211的資料傳輸速度。㈣2〇串列 連接介面引擎305耗接於USB 2.0埠控制器3〇3,其中 USB 2.0串列連接介面引擎3〇5可在微控制單元挪的控 制下，發送資料給USB 2. 0裝置211，並可對usb 2. 0裝 置211發出之USB 2.0格式的資料進行解碼。 100112236 表單編號A0101 第9頁/共36頁 1002020462-0 201202943 [0014] [0015] [0016] 旁路開關31 3轉接於USB 2.0連接介面301。當USB 3 0 事務轉譯器20不支援該USB 2,0裝置211時，USB 2,0裝 置211通過USB 2_ 0連接介面301耦接到旁路開關313， 並由旁路開關313直接耦接到主機207。此時，USB 2 0 裝置211無法由USB 3.0事務轉譯器20轉譯為USB 3.0裝 置，USB 2· 0裝置211只能以USB 2.0協定進行資料傳輸 。在一實施例中，當該USB 2.0裝置211為USB 2.0的集 線器時，USB 3.0事務轉譯器2〇不支援該USB 2〇裝置 211。 第4圖係顯示本發明第2圖中USB 3 〇轉譯電路2〇9和usb 3.0控制電路203的具體實施例的架構圖。如第4圖所示， USB 3. 0轉譯電路209包括USB 2. 0轉譯器4〇1，儲存單 兀403和USB 3.0轉譯器4〇5。USB 2.0轉譯器401耗接於 USB 2.0控制電路2〇1 ’用以將需要轉譯為USB 2 〇格式 的USB 3.0格式的資料進行轉譯。儲存單元綱麵接於 USB 2.0轉譯器401和USB 3.0轉譯器405之間，用以暫 存需要轉譯的資料4 —實_中，贿存單元包括 控制暫存單元（C〇ntro1 register file)和先進先出 儲存單το (FIFO)。讀存單元可以為任意類型的暫存 器及靜態記憶體（SRAM)。咖U轉譯器傷用以將需 要轉譯為USB 3. 0格式的USB 2 Q格式的資料進行轉澤。 第4圖中的⑽3. 〇控制電路203包括USB 3.〇控制器4〇7 和USB 3.0連接介面409。咖3 〇連接介面4〇9麵接於 機207 ’用於USB 3.0控制電路2〇3與主機2〇7之間的 貝料傳輸。USB 3. 0控制器衛叙接於微控制單元2〇5和 100112236 表單編號A0101 第10頁/共36頁 1002020462-0 201202943 USB 3.0轉譯電路209,其中USB 3. 0控制器407可以在 微控制單元205的控制下進行USB 3. 0裝置的枚舉流程， 以使該主機207認為有正確的USB 3. 0裝置之連接，USB 3. 0控制器407也可在微控制單元205的控制下向主機207 發出回應於USB 3.0格式的傳輸要求指令的回應指令。 [〇〇Π] 第5圖係使用本發明第2圖-第4圖中的裝置，將USB 2. 0 裝置轉譯為USB 3.0裝置，以使主機認為有USB 3.0裝置 連接的流程圖。 Ο [0018]在步驟501，將USB 2. 0裝置211連接到USB 2. 0連接介 面 301。 在步驟503, USB 2.0埠控制器303量測該USB 2.0裝置 211的傳輸速度，並將該傳輸迷度傳送給微控制單元2〇5 〇 在步驟505，USB 2. 0串列連接介面引擎3〇5在微控制單 兀205的控制下，發送一描述符（descript〇r)給11別 2. 〇裝置211。 〇 在步驟507 ’USB 2.0裝置211回應該描述符而發送一資 料封包（packet )給USB 2·〇串列連接介面引擎。 在步驟509，USB 2.0串列連接介面引擎3〇5將該資料封 包解碼以得到相應的裝置描述符，並將該裝置描述符儲 存到儲存單元403中。 在步驟51卜微控制單元205讀取儲存在储存單元4〇3中 的裝置描述符，並判斷此裝置描述符是否被_ 3 〇事務 轉譯器20支援。如果USB 3.〇事務轉譯器2〇不支援該卿 2· 〇裳置211 ’則流程進入到步驟513，在—實施例中， 100112236 表單編號A0101 第11頁/共36頁 1002020462-0 201202943 ¾s亥USB2.0裝置211為USB2.0的集線器時，USB30 事務轉譯器2〇不支援該USB 2·0裝置211。如果USB 3.〇 事務轉譯器20支援該USB 2.0裝置211，則流程進入到步 驟 515 〇 在步驟513, USB 2.0裝置211通過USB 2.0連接介面301 耦接到旁路開關313，並經由旁路開關313直接耦接到主 機207 ’此時’ USB 2· 0裝置211無法由USB 3 〇事務轉 譯器20轉譯為USB 3.0裝置，USB 2 〇裝置2U只能以 USB 2. 〇協定進行資料傳輪。 在步驟515, USB 3.0轉譯器405將儲存在儲存單元4〇3 中的裝置描述符轉譯成USB 3.0格式的資料封包，並將該 USB 3.0格式之資料封包傳送到USB 3.0控制器4〇7。 在步驟517 ’USB 3.0控制器407通過USB 3.0連接介面 409將該USB 3. 0格式資料封包傳送到主機2〇7，使主機 207判定到有USB 3.0裝置的連接。 在步驟519 ’ USB 3· 0控制器407在微控制單元2〇5的控 制下執行USB 3.0裝置的枚舉流程，並使該主機go?認為 有正破的USB 3.0裝置的連接。流程結束於步驟gig。 [0019] 第6圖係使用本發明第2圖-第4圖中的裝置，將USB 2. 0 裝置中的資料依據USB 3.0協定進行資料傳輸的流程圖。 在步驟601 ’在主機207認為有正瑞的USB 3.0裝置的連 接之後’主機207中發出一USB 3. 0格式的傳輸要求指令 (require token )。 在步驟603 ’USB 3.0控制器407通過USB 3.0連接介面 409接收該USB 3.0格式的傳輸要求指令，並將該usb 100112236 表單編號A0101 第12頁/共36頁 1002020462-0 201202943 3. 0格式的傳輸要求指令傳送到腿3. Q轉譯器他。 在步驟605’_3.0轉譯器405將該11別3〇格式的傳 輸要求指令解碼，並將解碼得到的該說3 q格式的傳輸 要求指令相應的封包識別（paeket ID)和相關資料等 内容儲存到儲存單元403。 在步麵7，USB Η控制器樹在微控制單元_的控 制下向主機207發出回應於該㈣3 〇格式的傳輸要求指 令的回應指令。Unit ' MCU) 205, USB 3.0 translation circuit 209 and USB 3. 〇 control circuit 203. The USB 2.0 control circuit 201 is connected to the USB 2.0 device 211 outside the USB 3.0 transaction translator 20 for measuring the data transmission speed of the USB 2.0 device 211, decoding the USB 2.0 format data sent by the USB 2.0 device 211, and being responsible for the USB. 3. 〇Translated Circuit 2〇9 and 100112236 Form No. A0101 Page 6/36 Page 1002020462-0 201202943 资料 Data transfer between USB 2.0 device 211, etc. The USB 3 〇 translation circuit 209 is coupled to the USB 2.0 control circuit 201 for protocol translation (protocol c〇nvert), which is to be translated into USB 2.0 format data in the Usb 3.0 format for translation, and will need to be translated into 2 〇 Format USB 3. G format data for translation and temporary storage of information that needs to be translated. The USB 3.0 control circuit 2〇3 is coupled to the USB 3. The translation circuit 2〇9' is used to perform an enumeration process (emuiati〇n flow) of the USB 3.0 device to confirm the connection of the correct USB 3. 0 device, and Responsible for data transmission between the USB 3.0 translation circuit 209 and the host 207. The micro-control early element 205 is connected to the USB 2.0 control circuit 201, the USB 30 translation circuit 2^)9 and the USB 3. 0 control circuit 203 for controlling the data transmission between the modules. In one embodiment, 'other logic circuits can be used to consume the USB 2.0 control circuit 201, the USB 3.0 translation circuit 2Q9, and the USB 3. 0 control circuit 203 for controlling data transmission between modules. [0008] In one embodiment, each USB 2.0 device 211 corresponds to a corresponding USB 3.0 transaction translator 20'. The USB 3.0 transaction translation 5|2 is responsible for data transfer between the USB 2.0 device 211 and the host 207. The USB 3.〇 Transaction Translator 20 is independent of the USB 3.0 Hub 1〇5 in Figure 1. In another embodiment, the 'USB 3. 0 Transaction Translator 2' is located in the USB 3. 0 Hub 105, which can translate a plurality of USB 2.0 devices 211. In one embodiment, the 'USB 3.0 Transaction Translator can be coupled between the USB 1. device and the host to translate the USB 1.0 device (both low speed and full speed) into a USB 3. 0 device. 100112236 Form number A0101 for USB 1. 0 device Page 7 of 361002020462-0 [0009] 201202943 Data is transmitted at a higher speed in the USB 3. 〇 system. [0012] FIG. 3 is a block diagram showing a specific embodiment of the USB 2〇 control circuit 2〇i in FIG. 2 of the present invention. As shown in FIG. 3, the USB 2 〇 control circuit 2〇1 includes a USB 2. 〇 connection interface 301, a USB 2 〇埠 controller 3〇3, a ϋδβ 2.0 serial connection interface engine 305, and a bypass switch 313. The USB interface 301 is coupled to the USB 2_device 211 for data transmission between the USB 2 control circuit 201 and the USB 2.0 device 211. Usually the host needs to be compatible with a variety of USB devices, so the quality of the signal output can be guaranteed to communicate with most USB devices, but it does not provide the best signal link for the parent USB device. In an embodiment, when the USB 2.0 device 211 corresponds to a corresponding USB 3.0 transaction translator 20, the USB 2.0 connection interface 301 includes a corresponding signal quality adjustment circuit 307, and the signal quality adjustment circuit 307 can be The USB 3.0 Transaction Translator 20 is connected to the USB 2.0 device 211 to adjust the quality of the signal transmission. For example, the signal quality adjustment circuit 307 can program the signal parameters of the USB 2.0 device under the control of the micro control unit 205, for example, the rise time of the signal, the fall time, the parameters of the clock recovery circuit, etc., so that the USB The interface transmission between the 2.0 control circuit 201 and the USB 2.0 device 211 is more stable to reduce the occurrence of transmission errors. The signal quality adjustment circuit 307 can greatly increase the transmission speed of the USB 2.0 device, so that the actual transmission speed of the USB 2.0 device can be further improved. In a typical system, since each host can correspond to multiple USB devices, the transmission interval between multiple data packets is fixed, for example, 5 us 'If the connected USB device has a faster data transmission rate, for example The data transmission form number AOiOi page 8 / total 36 pages 1002020462-0 201202943 between the transmission interval can be moxibustion interval is time, so the time wheel test energy between multiple data packets can not be improved. If the rate of transmission of the device (4) is slower than that of the device (4), the device will not be ready for the next round, and the device will issue an uninjury (post =) signal and relapse. Interval, for example, 10us two-line data packet transmission retry, which will also be used in the embodiment of the data transmission device, when each USB 2.0 USB corresponds to _ 3.G transaction translator 20, ^ 2.G control circuit 2G1 further includes a timing control circuit _, the timing Ο (four) circuit 3 咐 _ _ u transaction tracing connection order f32. - G device 2U specific case, to program the data packet transmission timing subscription 'this will greatly improve The performance of the transmission. At the same time, the timing control circuit 309 more programmable domain receives the signal unreported signal to the time when the data packet transmission retry is performed, and the time of the device idle waiting is obtained to obtain better transmission performance. In one embodiment, the timing control circuit is located in the _2.0 serial connection interface engine 305.闺 _ 2 controller 3_ is connected to _ 2 g connection interface to measure the data transmission speed of USB 2.0 device 211. (4) The 2-inch serial connection interface engine 305 is consumed by the USB 2.0 controller 3〇3, wherein the USB 2.0 serial connection interface engine 3〇5 can transmit data to the USB 2. 0 device 211 under the control of the micro control unit. The USB 2.0 format data sent by the usb 2.0 device 211 can be decoded. 100112236 Form No. A0101 Page 9 of 36 1002020462-0 201202943 [0015] [0016] The bypass switch 31 3 is switched to the USB 2.0 connection interface 301. When the USB 3 0 transaction translator 20 does not support the USB 2,0 device 211, the USB 2,0 device 211 is coupled to the bypass switch 313 through the USB 2_0 connection interface 301, and is directly coupled by the bypass switch 313. Host 207. At this time, the USB 20 device 211 cannot be translated into a USB 3.0 device by the USB 3.0 Transaction Translator 20, and the USB 2.0 device 211 can only perform data transfer using the USB 2.0 protocol. In one embodiment, when the USB 2.0 device 211 is a USB 2.0 hub, the USB 3.0 Transaction Translator 2 does not support the USB 2 device 211. Fig. 4 is a block diagram showing a specific embodiment of the USB 3 〇 translation circuit 2 〇 9 and the usb 3.0 control circuit 203 in Fig. 2 of the present invention. As shown in Fig. 4, the USB 3. 0 translation circuit 209 includes a USB 2.0 translator 4〇1, a storage unit 403, and a USB 3.0 translator 4〇5. The USB 2.0 Translator 401 is utilised by the USB 2.0 Control Circuit 2〇1' to translate data in USB 3.0 format that needs to be translated into USB 2 〇 format. The storage unit is connected between the USB 2.0 translator 401 and the USB 3.0 translator 405 for temporarily storing the data to be translated. The real bribe unit includes a control unit (C〇ntro1 register file) and First in first out storage list το (FIFO). The read memory unit can be any type of scratchpad and static memory (SRAM). The U-Translator tool is used to transfer data in USB 2 Q format that needs to be translated into USB 3. 0 format. The (10) 3. 〇 control circuit 203 in Fig. 4 includes a USB 3. 〇 controller 4 〇 7 and a USB 3.0 connection interface 409. The coffee 3 connection interface 4〇9 is connected to the machine 207' for the bead transfer between the USB 3.0 control circuit 2〇3 and the host 2〇7. USB 3. 0 controller is connected to the micro control unit 2〇5 and 100112236 Form No. A0101 Page 10 / Total 36 pages 1002020462-0 201202943 USB 3.0 translation circuit 209, where USB 3. 0 controller 407 can be in micro control The enumeration process of the USB 3. 0 device is performed under the control of the unit 205, so that the host 207 considers that there is a connection of the correct USB 3. 0 device, and the USB 3. 0 controller 407 can also be under the control of the micro control unit 205. A response command in response to the USB 3.0 format transfer request command is issued to the host 207. [〇〇Π] Fig. 5 is a flow chart for translating a USB 2.0 device into a USB 3.0 device using the apparatus of Figs. 2 to 4 of the present invention so that the host considers that there is a USB 3.0 device connection. [0018] At step 501, the USB 2.0 device 211 is connected to the USB 2.0 connection interface 301. In step 503, the USB 2.0 controller 303 measures the transmission speed of the USB 2.0 device 211, and transmits the transmission density to the micro control unit 2〇5. In step 505, the USB 2.0 serial interface engine 3 is connected. 〇5, under the control of the micro-control unit 205, sends a descriptor (descript〇r) to the other device 211. 〇 At step 507, the USB 2.0 device 211 returns a descriptor and sends a packet to the USB 2® serial interface engine. In step 509, the USB 2.0 serial connection interface engine 3〇5 decodes the data packet to obtain the corresponding device descriptor, and stores the device descriptor in the storage unit 403. At step 51, the micro control unit 205 reads the device descriptor stored in the storage unit 4〇3, and judges whether or not the device descriptor is supported by the transaction translator 20. If the USB 3.〇 Transaction Translator 2 does not support the Qing 2· 〇 置 211 ' then the flow proceeds to Step 513, in the embodiment, 100112236 Form No. A0101 Page 11 / Total 36 Page 1002020462-0 201202943 3⁄4s When the USB 2.0 device 211 is a USB 2.0 hub, the USB 30 Transaction Translator 2 does not support the USB 2.0 device 211. If the USB 3.〇 Transaction Translator 20 supports the USB 2.0 device 211, the flow proceeds to Step 515. In Step 513, the USB 2.0 device 211 is coupled to the Bypass Switch 313 via the USB 2.0 connection interface 301 and via the Bypass Switch. 313 is directly coupled to the host 207 'At this time' the USB 2.0 device 211 cannot be translated into a USB 3.0 device by the USB 3 〇 Transaction Translator 20, and the USB 2 〇 device 2U can only perform data transfer under the USB 2. 〇 protocol. At step 515, the USB 3.0 translator 405 translates the device descriptor stored in the storage unit 4〇3 into a data package in the USB 3.0 format, and transmits the USB 3.0 format data packet to the USB 3.0 controller 4〇7. At step 517, the USB 3.0 controller 407 transmits the USB 3.0 format data packet to the host computer 2 via the USB 3.0 connection interface 409, causing the host 207 to determine that there is a connection to the USB 3.0 device. At step 519', the USB 3.0 controller 407 executes the enumeration flow of the USB 3.0 device under the control of the micro control unit 2〇5, and causes the host go to consider the connection of the broken USB 3.0 device. The process ends at step gig. [0019] FIG. 6 is a flow chart showing the data transmission in the USB 2.0 device according to the USB 3.0 protocol using the apparatus of FIGS. 2 to 4 of the present invention. In step 601', after the host 207 considers that there is a USB 3.0 device connection, the host 207 issues a USB 3. 0 format request token. In step 603, the USB 3.0 controller 407 receives the USB 3.0 format transmission request command through the USB 3.0 connection interface 409, and transmits the usb 100112236 form number A0101 page 12/36 page 1002020462-0 201202943 3. 0 format. Request instructions to be sent to the leg 3. Q Translator. In step 605 '_3.0, the translator 405 decodes the transmission request instruction of the 11 other format, and decodes the corresponding packet identification (paeket ID) and related materials of the transmission request instruction of the said 3 q format. It is stored to the storage unit 403. At step 7, the USB® controller tree sends a response command to the host 207 in response to the (4) 3 〇 format transmission request command under the control of the micro control unit_.
在步驟6G9 ’ USB 2. 0轉譯器4G1將儲存在儲存單元4〇3 的』SB 3. 〇格式的傳輪要求指令相應的封包識別和相 關資料等内容轉譯成腿2· G格式的資料封包，並將該 卿2.G格式的資料封包傳送到 2G串列連接介面引 擎305。 在步驟611，USB 2.G串列連接介面引擎305經由USB 2.0連接介面301將該USB 2.〇格式的資料封包傳送到 USB 2. 0裝置211。In step 6G9 'USB 2. 0 Translator 4G1 will store the contents of the packet identification and related data of the SB 3. 〇 format of the storage unit 4〇3 in the storage unit 4〇3 into the leg 2·G format data packet And transmitting the data packet of the Qing 2.G format to the 2G serial connection interface engine 305. In step 611, the USB 2.G serial connection interface engine 305 transmits the USB 2.〇 format data packet to the USB 2.0 device 211 via the USB 2.0 connection interface 301.
在步驟613 ’USB 2.0裝置211接收該USB 2.0格式的資 料封包，並且發出回應於該USB go格式之資料封包的一 USB 2·0格式的傳輸回應（resp〇nse)。 在步驟615，USB 2. 0串列連接介面引擎3〇5通過湖 2.0連接介面301接收該USB 2 〇格式的傳輸回應，並將 該USB 2.0袼式的傳輸回應進行解碼，並將解碼得到的該 USB 2. 0格式的傳輸回應相應的封包識別和相關資料等内 容儲存到儲存單元4〇3。 在步驟617，微控制單元2〇5控制USB 2. D串列連接介面 引擎305發送一流程控制封包（fl〇w c〇ntr〇1 packet 100112236 表單編號A0101 第13頁/共36頁 1002020462-0 201202943 )給USB 2.0裝置211 ’並判斷兮楠 W傳輸回應是否需要被傳 輸到主機207 ’當該傳輸回應^要被傳輸到主機2〇7時 ’流程進人到步驟619，當該傳輪回應需要被傳輪到主機 207時，流程進入到步驟621。 在步驟619 ’微控制單元205執行重試流程 flow)並通知主機207有錯誤發生。 在步驟621 ’ USB 3. 0轉譯器405將儲存在儲存單元4〇3 中該USB 2. 0格式的傳輸回應之相應的封包識別和相關資 料等内容轉譯成USB 3. 0格式的資料封包，並將該usb 3. 0格式的資料封包傳送到USB 3. 0控制器407。 在步驟623，USB 3.0控制器407透過USB 3.0連接介面 409將該USB 3.0格式的資料封包傳送到主機207。 在步驟625，主機207接收該USB 3.0格式的資料封包， 並發出一確認信號（ACK)。流程結束於步驟625。 [0020] 使用本發明中的USB 3· 0事務轉譯器，可以使USB 2. 0裝 置與主機間以點對點方式（point to point)連接，從 而增加資料傳輸的帶寬。而使主機將USB 2. 0裝置識別成 USB 3. 0裝置’將會使USB 2. 0裝置享受到USB 3. 0裝置 的低功耗效能，其資料處理量（throughput)和傳輸性 能都會有大幅度的提高。將USB 2.0裝置轉譯為USB 3.0 裝置僅為本發明的一具體實施例，本領域的技術人員可 以想到’所有進行串列傳輸的裝置之間均可進行類似的 轉譯’以使低速傳輸的裝置可以轉譯為高速傳輸的裝置 ，以提高資料傳輪的性能。 [0021] 第7圖的方塊圖顯示本發明另一實施例的通用串列匯流排 100112236 表單編號A0101 第Μ頁/共36頁 1002020462-0 201202943 [0022] Ο (USB) 3. 0事務轉譯器（U3TT) 30Α，用以進行USB 3. 0主機32和USB 2. 〇裝置34之間的轉譯。事務轉譯器（ U3TT) 30A各組成方塊的連接關係並不限定於第7圖所示 者。本實施例雖以USB 3. 0事務轉譯器（U3TT) 30A為例 ，然而本發明也可適用於將來通用串列匯流排（USB)的 更高版本。 在本實施例中，事務轉譯器（U3TT) 30A包含USB 2. 0介 面（”裝置介面”）1301 ’其藉由USB 2. 0匯流排（” 裝置匯流排”）1302而連接至裝置34,作為事務轉譯器 (U3TT) 30A和裝置34之間的4s號介面。此外，事務轉 譯器（U3TT) 30A還包含USB 3.0介面（”主機介面”） 1 303，其藉由USB 3. 0匯流排（”主機匯流排，，）1304 而連接至主機32，作為事務轉譯器（U3TT) 30A和主機 32之間的信號介面。 [0023]Ο 事務轉譯器（U3TT) 30A包含至少一緩衝記憶體（buffer) 1305 ’ 其可由 一或多個緩衝記憶體所組成 ，設置於 USB 2.0介面1301和USB 3.0介面1303之間，用以儲存 數據。事務轉譯器（U3TT) 30A還包含暫存器（register) 1306 ， 用 以記錄USB 2· 0 裝置34 的配置信息 （ configuration)，例如描述符（descriptor)或帶寬 要求。再者事務轉譯器（U3TT) 30A的控制器1307不 但用以進行轉譯’還用來控制上述其他組成方塊的操作 與協調。 [0024] 100112236At step 613, the USB 2.0 device 211 receives the data packet in the USB 2.0 format and sends a USB 2.0 format transmission response (resp〇nse) in response to the USB go format data packet. In step 615, the USB 2.0 serial connection interface engine 3〇5 receives the USB 2〇 format transmission response through the lake 2.0 connection interface 301, and decodes the USB 2.0 format transmission response, and decodes the obtained The USB 2.0 format transmission is stored in the storage unit 4〇3 in response to the corresponding packet identification and related materials. In step 617, the micro control unit 2〇5 controls the USB 2.D serial connection interface engine 305 to send a flow control packet (fl〇wc〇ntr〇1 packet 100112236 form number A0101 page 13/36 pages 1002020462-0 201202943 ) to the USB 2.0 device 211 'and determine if the transmission response needs to be transmitted to the host 207 'When the transmission response ^ is to be transmitted to the host 2〇7, the flow proceeds to step 619 when the transmission responds to the need When it is passed to the host 207, the flow proceeds to step 621. At step 619, the micro control unit 205 performs a retry flow, and notifies the host 207 that an error has occurred. In step 621, the USB 3. 0 translator 405 translates the corresponding packet identification and related data stored in the storage unit 4〇3 in the USB 2.0 format response into a data packet of the USB 3. 0 format. The data packet of the usb 3. 0 format is transmitted to the USB 3. 0 controller 407. At step 623, the USB 3.0 controller 407 transmits the USB 3.0 format data packet to the host 207 via the USB 3.0 connection interface 409. At step 625, the host 207 receives the data packet in the USB 3.0 format and sends an acknowledgment signal (ACK). The process ends at step 625. [0020] Using the USB 3.0 Transaction Translator of the present invention, a USB 2.0 device can be connected to a host in a point-to-point manner, thereby increasing the bandwidth of data transmission. And the host will recognize the USB 2.0 device as a USB 3. 0 device' will enable the USB 2.0 device to enjoy the low power consumption of the USB 3. 0 device, and its data throughput and transmission performance will be Greatly improved. Translating a USB 2.0 device into a USB 3.0 device is only one embodiment of the present invention, and those skilled in the art will appreciate that 'all similar translations can be performed between devices performing serial transmissions' to enable low speed transmission devices. Translated into high-speed transmission devices to improve the performance of data transmission. [0021] FIG. 7 is a block diagram showing a universal serial bus bar 100112236 according to another embodiment of the present invention. Form No. A0101 Page 36/36 pages 1002020462-0 201202943 [0022] Ο (USB) 3. 0 Transaction Translator (U3TT) 30Α for translation between USB 3. 0 host 32 and USB 2. 〇 device 34. Transaction Translator (U3TT) 30A The connection relationship of each component block is not limited to that shown in Figure 7. Although the present embodiment uses the USB 3. 0 Transaction Translator (U3TT) 30A as an example, the present invention is also applicable to a later version of the Universal Serial Bus (USB). In the present embodiment, the Transaction Translator (U3TT) 30A includes a USB 2.0 interface ("device interface") 1301 'which is connected to the device 34 by a USB 2.0 bus ("device bus") 1302. As the 4s interface between the transaction translator (U3TT) 30A and the device 34. In addition, the Transaction Translator (U3TT) 30A also includes a USB 3.0 interface ("Host Interface") 1 303, which is connected to the host 32 via a USB 3. 0 bus ("Host Bus,") 1304 for transactional translation. (U3TT) 30A and the signal interface between the host 32. [0023] 事务 Transaction Translator (U3TT) 30A includes at least one buffer memory 1305' which may be composed of one or more buffer memories, The USB 2.0 interface 1301 and the USB 3.0 interface 1303 are used to store data. The Transaction Translator (U3TT) 30A further includes a register 1306 for recording the configuration information of the USB 2.0 device 34. For example, a descriptor or bandwidth requirement. The controller 1307 of the Transaction Translator (U3TT) 30A is used not only to translate but also to control the operation and coordination of the other constituent blocks described above. [0024] 100112236
根據本發明實施例的特徵之一，事務轉譯器（U3TT) 30A 包含一訊框起始（S0F)定時器ι3〇9Α及訊框起始（s〇F 表單編號A0101 第15頁/共％頁 1002020462-0 201202943 )產生器1 309B。其中，訊框起始（s〇F )定時器（ timer) 1309A自控制器1307接收一動態調整之訊框起始 (S0F)封包的發送週期，以進行定時控制；訊框起始（ S〇F)產生器1309B受控於控制器13〇7，可動態產生訊柜 起始（S0F)封包。根據本發明實施例的另—特徵，USB 2. 0介面1301内包含一時脈產生器1301A，其可動態調整 傳送於USB 2.0匯流排1302的數據位元率（bit rate) ο [0025] [0026] 第8圖顯示本發明實施例之通用串列匯流排（USB) 3· 〇傳 輸轉譯方法的流程圖。於步驟71，控制器1307判定信息 傳送（transfer )型態。該判定之根據可自裝置34取得 描述符或自暫存器1 306取得相關配置信息。如果步驟71 的判定結果為大量傳送（bu 1 k t rans f er )型態，則控 制器1307控制訊框起始（S0F)定時器13〇9A及訊框起始 (S0F )產生器1 309B ’使其停止訊框起始（sop·)封包 的發送（步驟72)。於大量傳送時，裝置34一般並不會 用到訊框起始（S0F)封包，因此，於步驟72停止訊框起 始（S0F)封包的發送，並不會影響到數據的傳送，但卻 能增進傳送效能。 如果步驟71的判定結果為同步傳送（is〇chr〇n〇us transfer)型態，則控制器1307控制訊框起始（s〇F) 定時器1 309A及訊框起始（S0F)產生器1 309B，使其進 行δίΐ框起始（s〇F)封包的發送。於發送之前，於步驟 ’控制器1307決定是否動態調整訊框起始（s〇f)封包的 發送週期，例如微訊框時間（micr〇_frame time)。 100112236 表單編號AOiOl 第16頁/共36頁 1002020462-0 201202943 如果不調整路送、 排規格書所^Γ，則於步驟Μ，依照通用串列匯流 發送訊框起框時間（其為125微秒），週期地 調降發送週期））封包。如果要調整發送週期（例如 則於步驟75，依照調整後的微訊框時 間（例如，12 5扭\ 〇微秒的百分之四十），週期地發送訊框起 始（SOF )封包。 [0027] Ο 第9 A圖例不依照規範的微訊框時間以發送訊框起始（S 0 F )封包的時序圖’第9B圖例示依照調整後的微訊框時間 以發送訊框起始（SOF)封包的時序圖。於一般的同步傳 送時’每一訊框週期時間僅有一部份（例如百分之四十 )時間是真正用來進行數據的同步傳送。如果依據第9B 圖所例示方式進行同步傳送，則可大量地增進傳送效能 。也就是說，第9a圖之上述訊框起始（SOF)封包的發送 週期為一微訊框時間（micr0-frame time) ’第9B圖 之上述調整後的發送週期為該微訊框時間的一部份。 [0028]Ο 無論是進行大量傳送（步驟7 2 )、依照所規範的微訊框 時間進行同步傳送（步驟74)或依照調整後的微訊框時 間進行同步傳送（步驟75)，本發明實施例還可於步驟 76，選擇是否藉由時脈產生器1301A以動態調整傳送於 USB 2. 0匯流排1302的數據位元率（bit rate)。如果 選擇不調整位元率，則依照所規範的常態（normal)位 元率以進行數據傳送（步驟77)。如果選擇要調整位元 率，則調整（調升）時脈產生器1301A的時脈頻率，並依 照調整後的位元率進行數據傳送（步驟78)。 [0029] 通用串列匯流排規格書所規範的位元率，一般都會界定 100112236 表單编號A0101 第17頁/共36頁 1002020462-0 201202943 一容許誤差（tolerance)，例如10%。鑑於此，本實施 例的時脈產生器1301A可將時脈頻率加快10%，則可提高 數據傳送效能，且能符合規範。於另一實施例中，時脈 產生器1301A更可將時脈頻率加快而超過所規範的容許誤 差，雖然減低了裝置的相容性，但可更加提高數據傳送 效能。 [0030] 雖然本發明已以較佳實施例揭露如上，然其並非用以限 定本發明，任何所屬技術領域中具有通常知識者，在不 脫離本發明之精神和範圍内，當可作些許之更動與潤飾 ，因此本發明之保護範圍當視後附之申請專利範圍所界 定者為準。 【圖式簡單說明】 [0031] 第1圖為包括USB 2. 0的集線器和USB 3. 0的集線器的 USB 3. 0系統示意圖； 第2圖係顯示本發明較佳實施例之USB 3. 0事務轉譯器的 架構圖； 第3圖係顯示本發明第2圖中USB 2. 0控制電路201的具體 實施例的架構圖； 第4圖係顯示本發明第2圖中USB 3. 0轉譯電路20 9和USB 3.0控制電路203的具體實施例的架構圖； 第5圖係使用本發明第2圖-第4圖中的裝置，將USB 2.0 裝置轉譯為USB 3.0裝置，以使主機認為有USB 3.0裝置 連接的流程圖；以及 第6圖係使用本發明第2圖-第4圖中的裝置，將USB 2.0 裝置中的資料依據USB 3.0協定進行資料傳輸的流程圖。 100112236 表單編號A0101 第18頁/共36頁 1002020462-0 201202943 第7圖的方塊圖顯示本發明另一實施例的通用串列匯流排 (USB) 3. 0事務轉譯器（U3TT)，用以進行USB 3.0主 機和USB 2.0裝置之間的轉譯。 第8圖顯示本發明實施例之通用串列匯流排（USB) 3. 0傳 輸轉譯方法的流程圖。 第9A圖例示依照規範的微訊框時間以發送訊框起始（SOF )封包的時序圖。 第9B圖例示依照調整後的微訊框時間以發送訊框起始（ SOF)封包的時序圖。 Ο [0032] 【主要元件符號說明】 101 〜USB 2. 0集線器； 103 〜USB 2. 0事務轉譯器； 105 〜USB 3. 0集線器； 107 、207 〜主機； 109 〜USB 1. 0裝置； 111 、211 〜USB 2. 0裝置； 113 〜USB 3. 0裝置； 20〜USB ； 3. 0事務轉譯器； 201 〜USB 2. 0控制電路； 203 〜USB 3. 0控制電路； 205 〜微控制單元； 209 〜USB 3. 0轉譯電路； 301 〜USB 2. 0連接介面； 303 〜USB 2. 0埠控制器； 305 〜USB 2.0串列連接介面引擎； 307 〜信號 :質量調整電路；According to one of the features of the embodiments of the present invention, the transaction translator (U3TT) 30A includes a frame start (S0F) timer ι3 〇 9 Α and frame start (s〇F form number A0101 page 15 / total % page 1002020462-0 201202943) Generator 1 309B. The frame start (s〇F) timer (timer) 1309A receives a dynamically adjusted frame start (S0F) packet transmission period from the controller 1307 for timing control; frame start (S〇 F) The generator 1309B is controlled by the controller 13A7 to dynamically generate a starter (S0F) packet. According to another feature of an embodiment of the present invention, the USB 2.0 interface 1301 includes a clock generator 1301A that dynamically adjusts the bit rate of the data transmitted to the USB 2.0 bus 1302. [0025] [0026 8 is a flow chart showing a general serial bus (USB) 3· 〇 transmission translation method according to an embodiment of the present invention. At step 71, the controller 1307 determines the information transfer type. The decision may be based on the descriptor being retrieved from device 34 or from the scratchpad 1 306. If the result of the determination in step 71 is a bulk transfer (bu 1 kt rans f er ) type, the controller 1307 controls the frame start (S0F) timer 13 〇 9A and the frame start (S0F ) generator 1 309B ' It stops the transmission of the frame start (sop·) packet (step 72). In the case of a large number of transmissions, the device 34 generally does not use the frame start (S0F) packet. Therefore, in step 72, the start of the frame start (S0F) packet is not affected, but the data transmission is not affected, but Can improve transmission efficiency. If the result of the determination in step 71 is the synchronous transfer (is〇chr〇n〇us transfer) type, the controller 1307 controls the frame start (s〇F) timer 1 309A and the frame start (S0F) generator. 1 309B, which causes the transmission of the δ ΐ box start (s〇F) packet. Before the transmission, the controller 1307 determines whether to dynamically adjust the transmission period of the frame start (s〇f) packet, for example, the frame time (micr〇_frame time). 100112236 Form number AOiOl Page 16 of 361002020462-0 201202943 If you do not adjust the routing and routing specifications, then in step Μ, send the frame frame time according to the universal serial bus (which is 125 microseconds) ), periodically reduce the transmission period)) packet. If the transmission period is to be adjusted (e.g., then at step 75, the frame start (SOF) packet is periodically transmitted in accordance with the adjusted microframe time (e.g., forty percent of 12 5 twists per microsecond). [0027] Ο FIG. 9A illustrates a timing chart of a frame start (S 0 F ) packet not according to the specification of the micro frame time, and FIG. 9B illustrates the frame start time according to the adjusted frame time to send the frame. (SOF) packet timing diagram. In general synchronous transmission, only a part (for example, 40% of the time) of each frame cycle time is actually used for synchronous transmission of data. If according to Figure 9B The synchronous transmission in the exemplary manner can greatly improve the transmission performance. That is, the transmission period of the frame start (SOF) packet in FIG. 9a is a micro frame time (micr0-frame time) '9B The adjusted transmission period is a part of the time of the micro frame. [0028] Ο whether a large number of transmissions are performed (step 7 2 ), synchronous transmission according to the specified micro frame time (step 74) or according to Adjusted micro frame time for simultaneous transmission (Step 75), the embodiment of the present invention may further select, in step 76, whether to dynamically adjust the bit rate of the data transmitted to the USB 2.0 bus 130 by the clock generator 1301A. If the selection is not adjusted The bit rate is then transmitted according to the normalized normal bit rate (step 77). If the bit rate is selected to be adjusted, the clock frequency of the clock generator 1301A is adjusted (adjusted), and Data transfer is performed according to the adjusted bit rate (step 78). [0029] The bit rate specified by the universal serial bus specification is generally defined as 100112236 Form No. A0101 Page 17 / Total 36 Page 1002020462-0 201202943 A tolerance, for example, 10%. In view of this, the clock generator 1301A of the present embodiment can increase the clock frequency by 10%, thereby improving data transmission performance and conforming to specifications. The clock generator 1301A can speed up the clock frequency beyond the specified tolerance, and although the compatibility of the device is reduced, the data transmission performance can be further improved. [0030] Although the present invention has been preferably implemented The above disclosure is not intended to limit the invention, and any one skilled in the art can make some modifications and refinements without departing from the spirit and scope of the invention. The scope of the patent application is defined as follows. [Simplified illustration] [0031] Figure 1 is a schematic diagram of the USB 3. 0 system including a USB 2.0 hub and a USB 3. 0 hub; The architecture diagram of the USB 3. 0 transaction translator of the preferred embodiment of the present invention is shown; FIG. 3 is a block diagram showing a specific embodiment of the USB 2.0 control circuit 201 of the second embodiment of the present invention; An architectural diagram showing a specific embodiment of the USB 3. 0 translation circuit 20 9 and the USB 3.0 control circuit 203 in Fig. 2 of the present invention; and Fig. 5 shows the USB 2.0 using the apparatus in the second to fourth embodiments of the present invention. The device is translated into a USB 3.0 device so that the host considers that there is a flow chart for USB 3.0 device connection; and Figure 6 uses the device in Figures 2 to 4 of the present invention to associate the data in the USB 2.0 device with the USB 3.0 protocol. Flow chart for data transfer. 100112236 Form No. A0101 Page 18 of 36 1002020462-0 201202943 The block diagram of Figure 7 shows a Universal Serial Bus (USB) 3. 0 Transaction Translator (U3TT) for another embodiment of the present invention. Translation between a USB 3.0 host and a USB 2.0 device. Figure 8 is a flow chart showing the general serial bus (USB) 3. 0 transmission translation method of the embodiment of the present invention. Figure 9A illustrates a timing diagram of a frame start (SOF) packet in accordance with the specification of the frame time. Figure 9B illustrates a timing diagram of the transmitted frame start (SOF) packet in accordance with the adjusted frame time. Ο [0032] [Main component symbol description] 101 ~ USB 2. 0 hub; 103 ~ USB 2. 0 transaction translator; 105 ~ USB 3. 0 hub; 107, 207 ~ host; 109 ~ USB 1. 0 device; 111, 211 ~ USB 2. 0 device; 113 ~ USB 3. 0 device; 20 ~ USB; 3. 0 transaction translator; 201 ~ USB 2. 0 control circuit; 203 ~ USB 3. 0 control circuit; 205 ~ micro Control unit; 209 ~ USB 3. 0 translation circuit; 301 ~ USB 2. 0 connection interface; 303 ~ USB 2. 0 埠 controller; 305 ~ USB 2.0 serial connection interface engine; 307 ~ signal: quality adjustment circuit;
100112236 表單編號A0101 第19頁/共36頁 1002020462-0 201202943 309〜時序控制電路； 313〜旁路開關； 401〜USB 2. 0轉譯器； 403〜儲存單元； 405〜USB 3. 0轉譯器； 407〜USB 3. 0控制器； 409〜USB 3. 0連接介面； 32〜USB 3. 0主機； 34〜USB 2. 0裝置； 30A〜USB 3.0事務轉譯器（U3TT); 1301 〜USB 2. 0介面； 1301A〜時脈產生器； 1 302〜USB 2. 0匯流排； 1 303〜USB 3. 0介面； 1 304〜USB 3. 0匯流排； 1 305〜緩衝記憶體； 1 306〜暫存器； 1 307〜控制器； 1 309A〜訊框起始（SOF)定時器； 1 309B〜訊框起始（SOF)產生器； 71-78〜步驟。 100112236 表單編號A0101 第20頁/共36頁 1002020462-0100112236 Form No. A0101 Page 19 / Total 36 Page 1002020462-0 201202943 309~ Timing Control Circuit; 313~ Bypass Switch; 401~USB 2. 0 Translator; 403~ Storage Unit; 405~USB 3. 0 Translator; 407~USB 3. 0 controller; 409~USB 3. 0 connection interface; 32~USB 3. 0 host; 34~USB 2. 0 device; 30A~USB 3.0 transaction translator (U3TT); 1301~USB 2. 0 interface; 1301A~ clock generator; 1 302~USB 2. 0 bus; 1 303~USB 3. 0 interface; 1 304~USB 3. 0 bus; 1 305~buffer memory; 1 306~ Memory; 1 307~ controller; 1 309A~ frame start (SOF) timer; 1 309B~ frame start (SOF) generator; 71-78~ step. 100112236 Form No. A0101 Page 20 of 36 1002020462-0