201201396 六、發明說明： 【發明所屬之技術領域】 本發明係有關於一種改良薄膜矽太陽能電池，及一種 用以在使用鍍氧化鋅（ZnO)玻璃做爲該太陽能板之基板 時’藉由減少製程室污染之影響，製造該太陽能電池之個 別方法》 【先前技術】 薄膜矽太陽能電池或模組係用以將光（例如，日光）轉 換成電能之光伏打轉換器裝置。由此知道薄膜矽太陽能電 池爲藉由物理或化學氣相沉積技術（PVD、CVD、PECVD、 APCVD)至少沉積吸收體層之電池。 習知技藝之第5圖顯示一基本簡單光伏打電池40，其 包括一在上面沉積有一透明導電氧化物（TC0，例如，ZnO、 SnCh)層42之透明基板41(例如，玻璃）。此層亦稱爲前接 點及作爲該光伏打元件之第一電極。基板4 1及前接點42 之組合亦稱爲上板（superstrate)。下一層43作爲主動光伏 打層及呈現3層構成p-i-n接面之子層。該層43包括氫化 微晶、奈米晶或非晶砂或其組合。子層44(相鄰於TC0前 接點42)係正摻雜的，相鄰子層45係本質的，以及最後子 層46係負摻雜的。最後，該電池包括一可以由氧化鋅、氧 化錫或IT0所製成之後接點層47(亦稱爲背面接點）及一反 射層4 8。在另一情況中，可以實現一金屬背面接點，其可 結合背面反射層48與背面接點47之物理特性。爲了描述， 201201396 箭頭表示入射光。 因此，一薄膜矽太陽能電池之基本觀念包括至少一夾在 一 P-摻雜矽層44與一 η-摻雜矽層46間之真實本質（無摻雜） 或實質本質矽吸收體層45，因而構成一 p-i-n接面。依據該 吸收體層之結晶性來區分非晶矽（a-Si)、微晶矽（MC-Si)、或 奈米晶矽Uc-Si)或（完全）結晶矽（C-Si)太陽能電池。. 爲了排放在操作期間所產生之電流，該p層及η層之 每一者與一電極電接觸。在設計一雙或三接面太陽能電池 情況下，以串聯方式電堆疊兩個或三個p-i-n接面，且該個 別最外P及η-層形成與該電極之接觸。 在一上板配置之薄膜太陽能模組中，通常在一塗佈有 一透明導電金屬氧化層（TCO)之玻璃基板上沉積該等太陽 能電池層。在矽薄膜太陽能電池之情況下，咸知用於矽沉 積之PECVD電漿製程可使這些TCO層大幅還原。特別地， 用於微晶矽（μ〇 Si)之沉積的強含氫電漿導致該TCO材料大 幅還原。在鍍Sn〇2玻璃情況下，該影響在該TC0表面上留 下一不透明金屬Sn膜，其在操作期間大大地減少光電流， 因而大幅降低該電池之效率。由於這個理由，pc-Sip接觸 層對於在SnCh基板上之電池造成問題。在鍍ZnO基板之情 況下，該結構類似的，但是甚至在施加一般用於pc - S i沉檳 之含氫PECVD電漿後，通常在該TCO上沒有不透明金屬 Zn層。 下面本發明提及在沉積於基板上之ZnO電極層的電黎 201201396 曝露期間所產生之金屬Zn的問題，會因製程室之Zn污染 而發生什麼問題，以及如何克服這些問題。 氧化鋅（ZnO)經察係應用於薄膜太陽能電池之極合適 TC0材料。它比覆蓋有SnO 2基板更透明，且更具導電性及 允許其材料成本比Sn〇2或IT0低。此外，描述它具有高的 抗例如用於gc-Si之沉積的強含氫電漿之能力。相較於與一 非晶P -層44輕易達成良好TCO p -接觸之SnCh，在ZnO情 況下，廣泛地描述一P-摻雜pc-Si/a-Si雙接觸層係強制的， 以便達到低串聯電阻、高FF(塡充因數）及V。。（電壓開路）。 換句話說，P-層44係由一相鄰於該TCO前接點42之p-摻 雜pc-Si及一後續a-Si層所構成。 串聯電阻、塡充因數及V。。之良好數値係良好TCO/p 接觸行爲之指標。只在非常少的範例中，才能以在ZnO上 使用簡單非晶矽接觸層的實驗室規模達成良好電池性能。 在這些情況下，實施TC0或TCO/p接面之特殊處理，以便 達成高Vw及FF。在另一情況下，只在lcm2或更小的極小 電池面積上顯示良好的電池結果。 待解決之問題 第1圖顯示該問題之實驗。於左邊，爲了在一PECVD 反應器中之電池沉積，將2個50 x 50cm2樣品之鍍ZnO玻璃 放置在一 1.4m2(未塗佈）載體玻璃上，其中該PECVD反應器 係設計成用以在1.4m2基板上沉積矽層（p-i-η結構）。爲了 比較，在右側所顯示之第二輪中，於一 1.4m2鍍ZnO玻璃 201201396 上沉積相同電池結構。在所有沉積步驟後，從相較於第一 實驗之ZnO樣品的位置之相同位置取出2個5 0x 50cm2工作 件。在所有這4個工作件上，藉由雷射（雷射切割）製備8 個lcm2電池。該電池設計包括一 pC-Si/a-Si雙p-接觸層及 在相同PECVD沉積室中依序沉積所有Si層。簡言之，兩 個實驗間之主要差異在於：ZnO層暴露至該矽沉積電漿的 有效面積。 第2圖顯示從實驗1及2所獲得之電池的代表1乂曲 線。可清楚看到，從該1.4m2ZnO基板所切割之實驗2的電 池相較於以相同電池配置在兩個小的鍍ZnO基板樣品上所 沉積之電池具有嚴重問題 〇 FF V〇c(m V) Jsc(mA/cm2) 0.7mm厚載體上之小電 池，實驗1 0.705 836 12.96 從大玻璃切割，實驗2 0.579 810 11.27 沒有 pc-Si(p)(簡單 a-Si P -接觸層） 0.686 83 1 12.97 上述表1提供第1圖所示之電池的電池IV參數的槪 要，另外，爲了比較，提供一只包含一簡單a-Si p -層之電 池。 可推出，如果在小的鍍ZnO基板上完成該電池沉積， 則具有pC-Si/a-Si雙p-層44之電池只顯示比一簡單非晶矽 P -層4 4組態高之性能。如果在一大面積基板上完成該μ c - S i 201201396 P層之沉積，則FF及V。。實質上是較低的，甚至比具有一 簡單a-Si p -層之電池低。因此，可清楚知道，在大面積鑛 ZnO基板上塗敷一 Hc-Si p-層會造成嚴重問題，其中該等嚴 重問題必須被克服，以便在大面積太陽能模組生產中使用 此單一室製程。然而，非常期望受益於該MC-Si p-層之電 位，以便進一步增加FF及V。。及因而增加電池效率。 上述可藉由第3a及3b圖所示之上述兩個實驗的電池 之QE曲線（量子效率）的比較來突顯。 在大面積基板上之具有Mc-Si/a-Si雙p-層的電池呈現 一主體（b u 1 k) i -層問題，此問題係因在整個可見波長範圍所 觀看到之不同順向偏壓（如右側參數所示）下的QE之劇烈下 降所造成。已發現到，對於在ZnO上之a-Si電池沉積，出 現會在順向偏壓下造成該IV曲線之最大功率點的下降及 總QE之減少的某些特殊影響，導致電池之不良電氣性能。 對於一般所使用之MC-Si/a-Si雙p-層，不可能在大面積 LPCVD-沉積鍍ZnO基板上獲得具有滿意性能之太陽能模 組。根據在用於pc - S i矽沉積之強含氫電漿中使ZnO大幅還 原之知識，我們將上述影響歸因於在μ〇 Si ρ·層之電漿沉積 製程期間該PECVD沉積室之Zn污染，接著是在相同PECVD 沉積室中所完成之矽 i-層的後續交叉污染 (cross-contamination)。此污染導致在該砂i-層中缺陷的嚴 重增加及因而在一個別太陽能板之操作期間促進光產生電 荷載子之復合。在個別PECVD室中完成該第一摻雜Si層 201201396 及該本質Si層情況下，將不會發生該交叉污染。然而，在 較佳用以縮短製程時間之單一室方法中，將發生該影響。 第4a及4b圖所示之實驗將直接證明此觀念。將一裸 矽晶圓放置在一1.4m2LPCVD鍍ZnO基板上。在兩個基板 上共同沉積一 a-Si層後，以SIMS測量在該a-Si層/Si晶圓 堆疊中之Zn濃度。在右側曲線圖（第4b圖）中顯示Zn信號。 顯然，相較於該矽晶圓，在該a-Si層中存在有高至少2個 數量級之Ζ η濃度。最可能之解釋是，該a - s i層在沉積期 間已受來自周圍鍍ZnO玻璃基板之Zn的污染。Zn進入該 i-層之均一倂入令人滿意地說明該QE之總下降，亦說明該 IV曲線的最大功率點之觀察的下降。在具有pC-Si p-層之 電池的情況下，該污染影響更大，因爲用於pc-Si沉積之富 氫電漿更大幅地將ZnO還原爲Zn及氧，並因而產生非常大 量之金屬鋅。 相關技藝 US 4,873，118描述在一氧化鋅膜上具有一或多個氫化 薄膜矽層之太陽能電池的製造程序之改良，其藉由在沉積 第一薄膜矽氫混合層至該氧化鋅膜上前，實施一含氫輝光 放電（glow discharge containing oxygen)來改善 ZnO/p 接觸。 【發明內容】 一種用以製造一光伏打轉換器堆疊之方法，包括下面 步驟：提供一至少部分覆蓋有一電極材料（例如，ZnO)之基 板：引進該基板至一可在其內產生電漿之製程室中；沉積 201201396 一供應有一第一摻雜劑之第一矽層及施加氧化電漿至該電 獎室。 在一替代實施例中，施加較寬鬆電漿條件來沉積該供 應有一第一摻雜劑之第一矽層，因而最小化ZnO至金屬Zn 之還原及避免該後續沉積i-層之Zn交叉污染。 【實施方式】 測試不同解決方式，以減少或避免該i-層與Zn之交叉 污染。 1. 於該電池沉積前，在該ZnO基板上施加一氧氣電 漿’以氧化在該Zn〇表面上之過量鋅及/或更能防止該ZnO 在下面氫氣電號中還原。 2. 在此室中沉積一p -層於ZnO上後，施加氧氣電榮至 該空PECVD室。可於一單a-Si p-層後、在該pC-Si/a-Si雙 P-層後及/或在該雙P-層之pc-Si部分後，施加該氧氣電漿。 3_在沉積該第一 Si層至該ZnO期間使用具有較低功率 及氫含量的較寬鬆電漿條件，以便最小化ZnO至Zn之還原 及該沉積室之後續Zn污染。可對pC_si或a-si p -層實施此 對策。因爲用於a-Si之電漿條件通常比用於MC_Si之電漿條 件更寬鬆，所以’另一解決方式可使用一單a_Si p -層作爲 在ZnO上之第一 Si-層，以取代—般使用之gC-Si/a_Si雙p_ 層。 已做出實驗來測試依據本發明之上述方法。具有在大 面積鍍ZnO基板上所沉積之一單非晶砂p -層或—gC_Si/a_Si -10- 201201396 雙P-層之電池施加及未施加不同電漿處理步驟。 第6及7圖顯示a-Si電池沉積前該PECVD系統中之 LPCVDZnO基板的〇2電漿處理對具有a-Sip-層之電池及通 常在？nO上具有pc-Si/a-Si雙p-層之電池的〇2電漿處理之 影響。表2提供該等對應電池之IV參數的槪要。 電漿處理 Ρ-層 Voc Isc FF STD a-Si 834 13.1 67.4 在ZnO上之α電漿 a-Si 820 13.2 63.6 在反應器中之α電漿 a-Si i 848. 13.3 70.7 在ZnO上之α電漿 μο-Si/a-Si 840 12.8 73.8 在反應器中之〇2電發 HC-Si/a-Si 789 12.1 57.7 表2:具有a-Si及Mc-Si/a-Sip-層及第6及7圖所示之 不同〇2電漿處理的a-Sip-i-n電池的IV參數。 解決方式1之發現： 依據本發明者之發現，不管p-層之型態爲何，只有p-層沉積前之ZnO基板的〇2電漿處理無法造成充分改善。第 6圖顯示該ZnO之〇2電漿處理導致比沒有任何〇2處理之標 準電池差的IV特性。我們推斷US4,873,118所述之該ZnO 基板對〇2電漿處理的暴露沒有解決Zn污染所引起之低 FF、V。。及高串聯電阻。第7圖對於提供導致更強Zn污染 影響之pc-Si/a.-Si雙p-層之a-Si電池的情況亦有這樣確認。 解決方式2之發現·· 如果於pc-Si/a-Si p-層沉積後實施該製程室之〇2電漿 -11 - 201201396 處理’在ZnO上之HC-Si/a-Si雙p-層只導致改良ρρ及v。。。 第6圖顯示該空PECVD室之〇2電漿處理大幅改善該iv特 性’特別是對於不具有處理之電池及具有該Zn〇基板之〇2 電漿處理的電池之FF及V。。。 解決方式3之發現 從第6及7圖之比較’明顯易知，在包括—με;_υρ-層 作爲Ζη0上所沉積之第一層的電池之情況下，該ζη污染問 題更加嚴重。可將具有一 a-Si ρ-層之太陽能電池的情況視 爲使用較寬鬆PECVD電漿條件之範例，以避免ZnO至金屬 鋅之還原及因而最小化該Ζη交叉污染影響。亦可至少在第 一成長階段中使用較低功率、較高壓力、氣體混合物中之 較低氫含量及較高激發頻率之組合對該pc-Si ρ-層之沉積 實施相同對策，直到完全覆蓋該ZnO表面爲止。 最後，在該pc-Si層沉積之強含氫電漿中使ZnO還原成 Ζη及◦。該Ζη散佈在該製程室中，且後來在後續沉積中污 染i-層，導致在該1-層之主體中形成缺陷。藉由在該Ρ-層 沉積後對該製程室實施氧化電漿，可避免此污染影響，因 而導致比具有簡單a-Si ρ-層之電池優之FF及。 可藉由施加300W之電漿功率至一能處理1.4m2基板之 電極系統（此等於約21mW/cm2) ’在一平行板PECVD電漿反 應器（例如，市場上可購得之Oerlikon Solar KAI)中實現在 此所述之氧化電漿。再者，建議100sccm氧氣流量及至少 60- 1 20s之電漿持續時間。可改變這些數値’以採取本發明 -12- 201201396 原理至其它系統及Zn污染之數量。重要的是，除了相對於 陰極面積或製程室體積的氧流量之外，還實質維持相同的 能量數量/陰極面積。 該氧化電漿的主要.目的是將在較早Si_沉積步驟中使 用之含氫電漿所釋放及/或還原之Zn殘留物再氧化。它因 而被固化及/或變換，以致於它被從製程室體積抽離及移 除。該氧化電獎可在一單a-Si p-層後、在該pc-Si/a-Si雙 P-層後及/或在該雙P-層之pc-Si部分後施加。 根據對該Zn污染影響之歷程的詳細了解，我們需要提 出對上述問題之不同解決方式。 —種用以在一真空製程室中製造一矽層之方法因而包 括： 1. 提供一至少部分覆蓋有一電極材料（例如，ZnO)之基 板； 2. 引進該基板至一能在其內產生電漿之製程室中； 3 .沉積一供應有一第一慘雜劑之第一砂層； 4.從該製程室移除該基板； 5 ·施加氧化電漿至該電漿室； 6. 再引進該基板；以及 7. 沉積另外的矽層。 在一第一實施例中，該第一砂層包括Mc-Si與a-Si之堆 疊。 在一第二實施例中’該第一砂層只包括a-Si。習慣上 -13- 201201396 以較少的氫沉積非晶矽及因而實施較少侵蝕性氫氣電漿。 在一第三實施例中，該第一矽層包括pc_Si及在步驟7 中所沉積之層最初是一 a-Sip -層。 一種用以在一真空製程室中製造一矽層之方法包括： 籲提供一至少部分覆蓋有一電極材料（例如，ZnO)之 基板； * 引進該基板至一能在其內產生電漿之製程室中： •沉積一供應有一第一摻雜劑之第一矽層，該第一層 包括μχ-Si…问時， •控制至少一電漿參數，以在一比用於可預見最高沉 積速率者低之數値下開始，該數値係指下列中之一 或多個：電漿功率、氫氣含量或流量、壓力；以及 * 階梯式或連續改變該數値，以在該結果層中產生該 數値之階化（graded)或梯度（gradient)剖面； ♦任選地：從該製程室移除該基板及隨後施加一氧化 電漿至該電漿室。 在一實施例中，上述可如下來實現：開始於一低電漿 功率値及增加該低電漿功率値；開始於一低氫氣流量及增 加該低氫氣流量；開始於一高製程室壓力及減少該高製程 室壓力。 另一種用以在一真空製程室中製造一矽層之方法包 括： •提供一至少部分覆蓋有—電極材料（例如’ Zn〇)之 -14- 201201396 基板； * 引進該基板至一能在其內產生電漿之製程室中； *沉積一供應有一第一摻雜劑之第一砂層，該第一層 包括pc-Si，同時； *選擇及實施可在一第一期間允許高速率層沉積之 第一製程設定； *選擇最佳製程設定，以導致沉積時間及層品質之最 佳平衡； •將該沉積速率從該等第一設定階梯式或連續減少 至該等最佳設定； *任選地：從該製程室移除該基板及隨後施加一氧化 電漿至該電漿室。 可以有利地使上述任何方法與在p -層沉積期間之高抽 取量（increased pumping effort)結合。 當然’亦可實施上述解決方式之不同組合。 所有上述解決方式能增加在大面積Zn〇基板上之模組 生產程序的長期穩定性及可協助進一步改善效率。 本發明亦可應用於其它型態之太陽能電池及模組。 【圖式簡單說明】 第1圖顯示基本問題之實際示範的實驗配置。 第2圖顯示依據第1圖之配置的結果。 第3a及3b圖顯示依據第1及2圖之實驗的對量子效 率之影響。 -15- 201201396 第4圖顯示在一矽層中之Zn污染。 第5圖顯示一基本薄膜光伏打電池。 電池 a-Si 【主 )層之a - S a - S i p層之 第6圖顯示一氧氣電漿處理對一具有a-Si ] 的IV曲線之影響。 第7圖顯示一氧氣電漿處理對一具有pc-Si / 電池的IV曲線之影響。 要元件符號說明】 40 光伏打電池 4 1 透明基板 42 透明導電氧化物層 43 主動光伏打層 44 子層 45 子層 46 子層 47 後接點層 48 反射層 -16 -201201396 VI. Description of the Invention: [Technical Field] The present invention relates to an improved thin film tantalum solar cell, and a method for reducing the use of zinc oxide (ZnO) glass as a substrate for the solar panel The effect of process chamber contamination, individual methods of manufacturing the solar cell. [Prior Art] A thin film tantalum solar cell or module is a photovoltaic converter device for converting light (eg, daylight) into electrical energy. It is thus known that the thin film tantalum solar cell is a battery in which at least an absorber layer is deposited by physical or chemical vapor deposition techniques (PVD, CVD, PECVD, APCVD). Figure 5 of the prior art shows a substantially simple photovoltaic cell 40 comprising a transparent substrate 41 (e.g., glass) having a transparent conductive oxide (TC0, e.g., ZnO, SnCh) layer 42 deposited thereon. This layer is also referred to as the front contact and as the first electrode of the photovoltaic element. The combination of substrate 41 and front contact 42 is also referred to as a superstrate. The next layer 43 acts as an active photovoltaic layer and presents three layers of sub-layers forming a p-i-n junction. This layer 43 comprises hydrogenated microcrystals, nanocrystals or amorphous sand or a combination thereof. Sublayer 44 (adjacent to TC0 pre-contact 42) is positively doped, adjacent sub-layer 45 is essential, and finally sub-layer 46 is negatively doped. Finally, the battery includes a contact layer 47 (also referred to as a back contact) and a reflective layer 48 which may be formed of zinc oxide, tin oxide or IT0. In another case, a metal back contact can be implemented that combines the physical characteristics of the backside reflective layer 48 with the backside contact 47. For the sake of description, the 201201396 arrow indicates incident light. Therefore, the basic concept of a thin film germanium solar cell includes at least one true nature (undoped) or substantially intrinsic absorber layer 45 sandwiched between a P-doped germanium layer 44 and an n-doped germanium layer 46. Form a pin joint. An amorphous germanium (a-Si), a microcrystalline germanium (MC-Si), or a nanocrystalline germanium Uc-Si) or a (complete) crystalline germanium (C-Si) solar cell is distinguished depending on the crystallinity of the absorber layer. Each of the p-layer and the n-layer is in electrical contact with an electrode in order to discharge the current generated during operation. In the case of designing a double or triple junction solar cell, two or three p-i-n junctions are electrically stacked in series, and the outermost P and η-layers form contact with the electrode. In a thin film solar module configured in a top plate, the solar cell layers are typically deposited on a glass substrate coated with a transparent conductive metal oxide layer (TCO). In the case of tantalum thin film solar cells, it is known that the PECVD plasma process for ruthenium deposition can greatly reduce these TCO layers. In particular, the strong hydrogen-containing plasma used for the deposition of microcrystalline germanium (μ〇 Si) results in a substantial reduction of the TCO material. In the case of Sn(R) plated glass, this effect leaves an opaque metal Sn film on the surface of the TC0 which greatly reduces the photocurrent during operation, thereby greatly reducing the efficiency of the cell. For this reason, the pc-Sip contact layer causes problems for the battery on the SnCh substrate. In the case of a ZnO-plated substrate, the structure is similar, but even after the application of a hydrogen-containing PECVD plasma generally used for pc-S i-pens, there is usually no opaque metal Zn layer on the TCO. The present invention refers to the problem of metal Zn generated during the exposure of the ZnO electrode layer deposited on the substrate during the exposure of the battery, which causes problems due to Zn contamination of the process chamber and how to overcome these problems. Zinc oxide (ZnO) has been found to be a very suitable TC0 material for thin film solar cells. It is more transparent than the substrate covered with SnO 2 and is more conductive and allows its material cost to be lower than Sn 〇 2 or IT0. Further, it is described as having a high resistance to, for example, a strong hydrogen-containing plasma for deposition of gc-Si. Compared with SnCh, which easily achieves good TCO p-contact with an amorphous P-layer 44, in the case of ZnO, a P-doped pc-Si/a-Si double contact layer system is extensively described in order to achieve Low series resistance, high FF (twist factor) and V. . (voltage open circuit). In other words, the P-layer 44 is comprised of a p-doped pc-Si adjacent to the TCO front contact 42 and a subsequent a-Si layer. Series resistance, 塡 charging factor and V. . The good number is a good indicator of TCO/p contact behavior. Good battery performance can only be achieved on a laboratory scale using a simple amorphous germanium contact layer on ZnO in very few examples. In these cases, special processing of the TC0 or TCO/p junction is implemented to achieve high Vw and FF. In another case, good battery results are shown only on a very small battery area of 1 cm 2 or less. Problems to be solved Figure 1 shows an experiment of this problem. On the left, two 50 x 50 cm2 samples of ZnO coated glass were placed on a 1.4 m2 (uncoated) carrier glass for cell deposition in a PECVD reactor, where the PECVD reactor was designed to A ruthenium layer (pi-η structure) was deposited on the 1.4 m2 substrate. For comparison, in the second round shown on the right, the same cell structure was deposited on a 1.4 m2 ZnO glass 201201396. After all deposition steps, two 50x50 cm2 workpieces were taken from the same position as the position of the ZnO sample of the first experiment. Eight lcm2 cells were prepared by laser (laser cutting) on all four working pieces. The cell design includes a pC-Si/a-Si double p-contact layer and sequentially deposits all Si layers in the same PECVD deposition chamber. In short, the main difference between the two experiments is that the ZnO layer is exposed to the effective area of the tantalum deposited plasma. Fig. 2 shows a representative one curve of the battery obtained from Experiments 1 and 2. It can be clearly seen that the battery of Experiment 2 cut from the 1.4 m2 ZnO substrate has a serious problem compared to the battery deposited on the two small ZnO substrate samples in the same battery configuration 〇FF V〇c(m V) Jsc (mA/cm2) small battery on 0.7mm thick carrier, experiment 1 0.705 836 12.96 cutting from large glass, experiment 2 0.579 810 11.27 without pc-Si(p) (simple a-Si P - contact layer) 0.686 83 1 12.97 Table 1 above provides a summary of the battery IV parameters of the battery shown in Figure 1, and, for comparison, provides a battery containing a simple a-Si p - layer. It can be deduced that if the cell deposition is completed on a small ZnO-plated substrate, the battery with the pC-Si/a-Si double p-layer 44 exhibits only higher performance than a simple amorphous 矽P-layer 44 configuration. . If the deposition of the μ c - S i 201201396 P layer is completed on a large area substrate, then FF and V. . It is essentially lower, even lower than a battery with a simple a-Si p-layer. Therefore, it is clear that the application of an Hc-Si p-layer on a large-area mineral ZnO substrate poses a serious problem, and such serious problems must be overcome in order to use this single chamber process in the production of large-area solar modules. However, it is highly desirable to benefit from the potential of the MC-Si p-layer in order to further increase FF and V. . And thus increase battery efficiency. The above can be highlighted by comparison of the QE curves (quantum efficiencies) of the batteries of the above two experiments shown in Figs. 3a and 3b. A cell with a Mc-Si/a-Si double p-layer on a large-area substrate exhibits a bulk (bu 1 k) i-layer problem, which is due to the different forward biases seen throughout the visible wavelength range. The pressure drop (as indicated by the right parameter) is caused by a sharp drop in QE. It has been found that for the deposition of a-Si cells on ZnO, there are some special effects that cause a decrease in the maximum power point of the IV curve and a decrease in the total QE under forward bias, resulting in poor electrical performance of the battery. . For the MC-Si/a-Si double p-layer generally used, it is impossible to obtain a solar module having satisfactory performance on a large-area LPCVD-deposited ZnO substrate. Based on the knowledge that ZnO is greatly reduced in the strong hydrogen-containing plasma for PC-S i矽 deposition, we attribute the above effects to the Zn in the PECVD deposition chamber during the plasma deposition process of the μ〇Si ρ· layer. Contamination followed by subsequent cross-contamination of the 矽i-layer completed in the same PECVD deposition chamber. This contamination results in a severe increase in defects in the sand i-layer and thus promotes recombination of light-generating charge carriers during operation of a different solar panel. This cross-contamination will not occur in the case where the first doped Si layer 201201396 and the intrinsic Si layer are completed in individual PECVD chambers. However, this effect will occur in a single chamber method that is preferably used to reduce process time. The experiments shown in Figures 4a and 4b will directly prove this concept. A bare enamel wafer was placed on a 1.4 m2 LPCVD ZnO substrate. After co-depositing an a-Si layer on the two substrates, the Zn concentration in the a-Si layer/Si wafer stack was measured by SIMS. The Zn signal is shown in the graph on the right (Fig. 4b). It is apparent that there is a concentration of Ζη at least 2 orders of magnitude higher in the a-Si layer than in the germanium wafer. The most likely explanation is that the a-s i layer has been contaminated by Zn from the surrounding ZnO-plated glass substrate during deposition. The uniform intrusion of Zn into the i-layer satisfactorily accounts for the overall decrease in the QE, as well as the observed decrease in the maximum power point of the IV curve. In the case of a battery with a pC-Si p-layer, the contamination is more affected because the hydrogen-rich plasma used for pc-Si deposition more greatly reduces ZnO to Zn and oxygen, and thus produces a very large amount of metal. Zinc. No. 4,873,118 describes an improvement in the manufacturing process of a solar cell having one or more hydrogenated film tantalum layers on a zinc oxide film by depositing a first thin film hydrogen-hydrogen mixed layer onto the zinc oxide film. A glow discharge containing oxygen is implemented to improve ZnO/p contact. SUMMARY OF THE INVENTION A method for fabricating a photovoltaic converter stack includes the steps of: providing a substrate at least partially covered with an electrode material (eg, ZnO): introducing the substrate to a plasma that can be generated therein In the process chamber; deposition 201201396 - a first layer of a first dopant is applied and an oxidizing plasma is applied to the chamber. In an alternate embodiment, a looser plasma condition is applied to deposit the first layer of germanium supplied with a first dopant, thereby minimizing the reduction of ZnO to metal Zn and avoiding Zn cross-contamination of the subsequently deposited i-layer . [Embodiment] Different solutions are tested to reduce or avoid cross-contamination of the i-layer and Zn. 1. Prior to deposition of the cell, an oxygen plasma is applied to the ZnO substrate to oxidize excess zinc on the surface of the Zn and/or to prevent reduction of the ZnO in the hydrogen number below. 2. After depositing a p-layer on the ZnO in this chamber, apply oxygen to the empty PECVD chamber. The oxygen plasma may be applied after a single a-Si p-layer, after the pC-Si/a-Si double P-layer, and/or after the pc-Si portion of the double P-layer. 3_ Use a looser plasma condition with lower power and hydrogen content during deposition of the first Si layer to the ZnO to minimize ZnO to Zn reduction and subsequent Zn contamination of the deposition chamber. This countermeasure can be implemented for the pC_si or a-si p - layer. Since the plasma conditions for a-Si are generally more relaxed than the plasma conditions for MC_Si, another solution can use a single a_Si p - layer as the first Si-layer on ZnO instead. The gP-Si/a_Si double p_ layer is used as usual. Experiments have been made to test the above method in accordance with the present invention. A battery having a single amorphous sand p-layer or a -gC_Si/a_Si-10-201201396 double P-layer deposited on a large-area ZnO substrate is applied without applying a different plasma treatment step. Figures 6 and 7 show the 〇2 plasma treatment of the LPCVD ZnO substrate in the PECVD system prior to deposition of the a-Si cell to the battery with the a-Sip-layer and is usually ? The effect of 〇2 plasma treatment on a cell with pc-Si/a-Si double p-layer on nO. Table 2 provides a summary of the IV parameters of these corresponding batteries. Plasma treatment Ρ-layer Voc Isc FF STD a-Si 834 13.1 67.4 α-plasma on ZnO a-Si 820 13.2 63.6 α-plasma in the reactor a-Si i 848. 13.3 70.7 α on ZnO μμο-Si/a-Si 840 12.8 73.8 电2 in the reactor 电2 electric hair HC-Si/a-Si 789 12.1 57.7 Table 2: with a-Si and Mc-Si/a-Sip-layer and The IV parameters of the different 〇2 plasma treated a-Sip-in batteries shown in Figures 6 and 7. Discovery of Solution 1 According to the findings of the present inventors, the 〇2 plasma treatment of the ZnO substrate before the p-layer deposition cannot be sufficiently improved regardless of the type of the p-layer. Figure 6 shows that the ZnO2 plasma treatment of the ZnO resulted in a lower IV characteristic than the standard cell without any 〇2 treatment. We conclude that the exposure of the ZnO substrate to the 电2 plasma treatment described in U.S. Patent No. 4,873,118 does not address the low FF, V caused by Zn contamination. . And high series resistance. Fig. 7 also confirms the case of the a-Si battery which provides the pc-Si/a.-Si double p-layer which causes the influence of stronger Zn contamination. Solution 2 Solution • If the process chamber is deposited after the pc-Si/a-Si p-layer deposition, 电2 plasma -11 - 201201396 treats 'HC-Si/a-Si double p- on ZnO The layer only leads to the improvement of ρρ and v. . . Figure 6 shows that the 电2 plasma treatment of the empty PECVD chamber substantially improved the iv characteristics', particularly for FFs and Vs of batteries that were not treated and that had plasma treated with the Zn2 substrate. . . Finding of Solution 3 From the comparison of Figures 6 and 7, it is apparent that the ζ contamination problem is more serious in the case of a battery including the -με; _υρ- layer as the first layer deposited on Ζη0. The case of a solar cell having an a-Si ρ-layer can be considered as an example of using a looser PECVD plasma condition to avoid the reduction of ZnO to metallic zinc and thus minimize the 交叉 cross-contamination effect. The same countermeasures can be applied to the deposition of the pc-Si ρ-layer using at least a combination of lower power, higher pressure, lower hydrogen content in the gas mixture, and higher excitation frequency in the first growth stage until complete coverage The ZnO surface is up to now. Finally, ZnO is reduced to Ζη and ◦ in the strong hydrogen-containing plasma deposited by the pc-Si layer. The Ζη is dispersed in the process chamber, and then the i-layer is contaminated in subsequent deposition, resulting in the formation of defects in the body of the 1-layer. By oxidizing the plasma of the process chamber after the ruthenium-layer deposition, the contamination effect can be avoided, resulting in a better FF than a battery having a simple a-Si ρ-layer. By applying 300W of plasma power to an electrode system capable of processing 1.4m2 substrate (this is equal to about 21mW/cm2) 'in a parallel plate PECVD plasma reactor (for example, commercially available Oerlikon Solar KAI) The oxidizing plasma described herein is implemented. Furthermore, a 100 sccm oxygen flow rate and a plasma duration of at least 60-1 20 s are recommended. These numbers can be varied to take the principles of the invention -12-201201396 to other systems and the amount of Zn contamination. It is important to maintain substantially the same amount of energy/cathode area in addition to the oxygen flow relative to the cathode area or process chamber volume. The main purpose of the oxidizing plasma is to reoxidize the Zn residue released and/or reduced by the hydrogen-containing plasma used in the earlier Si_deposition step. It is thus solidified and/or transformed so that it is removed and removed from the process chamber volume. The oxidized electric prize may be applied after a single a-Si p-layer, after the pc-Si/a-Si double P-layer, and/or after the pc-Si portion of the double P-layer. Based on a detailed understanding of the impact of this Zn pollution, we need to propose different solutions to the above problems. - A method for fabricating a layer of germanium in a vacuum process chamber thus comprising: 1. providing a substrate at least partially covered with an electrode material (eg, ZnO); 2. introducing the substrate to one capable of generating electricity therein In the process chamber of the slurry; 3. depositing a first sand layer supplied with a first doping agent; 4. removing the substrate from the process chamber; 5) applying an oxidizing plasma to the plasma chamber; a substrate; and 7. depositing additional layers of germanium. In a first embodiment, the first sand layer comprises a stack of Mc-Si and a-Si. In a second embodiment, the first sand layer comprises only a-Si. Conventionally -13- 201201396 deposits amorphous cesium with less hydrogen and thus implements less aggressive hydrogen plasma. In a third embodiment, the first layer of germanium comprises pc_Si and the layer deposited in step 7 is initially an a-Sip-layer. A method for fabricating a layer of germanium in a vacuum process chamber includes: providing a substrate at least partially covered with an electrode material (eg, ZnO); * introducing the substrate to a process chamber capable of generating plasma therein Medium: • depositing a first layer of germanium supplied with a first dopant, the first layer comprising μχ-Si..., controlling at least one plasma parameter to be used in a ratio for the foreseeable maximum deposition rate Starting at a low number, the number refers to one or more of the following: plasma power, hydrogen content or flow, pressure; and * stepwise or continuously changing the number to produce the result in the result layer A graduated or graduated profile; ♦ optionally: removing the substrate from the process chamber and subsequently applying an oxidizing plasma to the plasma chamber. In one embodiment, the above may be implemented as follows: starting at a low plasma power 値 and increasing the low plasma power 値; starting at a low hydrogen flow rate and increasing the low hydrogen flow rate; starting at a high process chamber pressure and Reduce the high process chamber pressure. Another method for fabricating a layer of germanium in a vacuum process chamber includes: • providing a substrate of at least partially covered with an electrode material (eg, 'Zn〇)-14-201201396; * introducing the substrate to one capable of a process chamber in which plasma is generated; * depositing a first sand layer supplied with a first dopant, the first layer comprising pc-Si, while; * selecting and implementing a high rate layer deposition during a first period The first process setting; * selecting the optimum process setting to result in an optimum balance of deposition time and layer quality; • reducing the deposition rate from the first set stepwise or continuously to the optimal settings; Grounding: The substrate is removed from the process chamber and subsequently an oxidizing plasma is applied to the plasma chamber. Any of the above methods can be advantageously combined with increased pumping effort during p-layer deposition. Of course, different combinations of the above solutions can also be implemented. All of the above solutions can increase the long-term stability of the module production process on large-area Zn〇 substrates and can help further improve efficiency. The invention can also be applied to other types of solar cells and modules. [Simple description of the diagram] Figure 1 shows the experimental configuration of the actual demonstration of the basic problem. Figure 2 shows the results of the configuration according to Figure 1. Figures 3a and 3b show the effect on the quantum efficiency of the experiments according to Figures 1 and 2. -15- 201201396 Figure 4 shows Zn contamination in a layer of ruthenium. Figure 5 shows a basic thin film photovoltaic cell. Battery a-Si [Main] layer a-S a - S i p layer Figure 6 shows the effect of an oxygen plasma treatment on an IV curve with a-Si]. Figure 7 shows the effect of an oxygen plasma treatment on an IV curve with a pc-Si / battery. Element symbol description] 40 Photovoltaic cell 4 1 Transparent substrate 42 Transparent conductive oxide layer 43 Active photovoltaic layering 44 Sublayer 45 Sublayer 46 Sublayer 47 Back contact layer 48 Reflective layer -16 -