TW201131724A - Package substrate and fabrication method thereof - Google Patents

Package substrate and fabrication method thereof Download PDF

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Publication number
TW201131724A
TW201131724A TW99106228A TW99106228A TW201131724A TW 201131724 A TW201131724 A TW 201131724A TW 99106228 A TW99106228 A TW 99106228A TW 99106228 A TW99106228 A TW 99106228A TW 201131724 A TW201131724 A TW 201131724A
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Taiwan
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layer
hole
core plate
package substrate
machine
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TW99106228A
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Chinese (zh)
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TWI416685B (en
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Kun-Chen Tsai
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Unimicron Technology Corp
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Abstract

A package substrate is disclosed, comprising a core board whereon first and second surfaces opposite one another are formed and having a drilling through hole, wherein the diameter of the drilling hole is larger than 150um and the depth thereof is larger than 120um; a circuit layer disposed on the first surface of the core board and having electrical contact pads formed thereon; a carrier board connecting to the second surface of the core board for sealing up one end of the drilling hole; and a solder mask layer disposed on both the first surface of the core board and the circuit layer and formed with an opening and a plurality of apertures, such that the drilling through hole and the electrical contact pads can be exposed from the opening and apertures respectively, thereby reducing the manufacturing time and costs with mechanical-drilling to form openings of larger sizes. The invention further provides a method for forming the substrate as described above.

Description

201131724 六、 [0001] [0002] [0003] 發明說明: 【發明所屬之技術領域】 本發明係有關一種封裝基板及其製法,尤指一種能 縮短製程時間及降低成本之封裝基板及其製法。 【先前技術】 隨著半導體封裝技術的演進’除傳統打線式(Wire bonding)及覆晶(Flip chip)之半導體封裝技術外,目 前半導體裝置(Semiconductor device)已開發出不同 的封裝型,% ’例如直接在一封農基板(package substrate) 中嵌埋並電性整合一微機電元件 ,此種封裝件 能縮減整體封裝結構之體積並提昇電性功能,遂成為一. 種封裝的趨勢。 請參閱第1圖,係為習知封裝基板的剖視示意圖。如 圖所示,先提供一具有相對之第一表面l〇a及第二表面 10b的核心板10,且該第二表面i〇b上具有銅層11 ;再於 該第一表面10a及銅層11上分別壓合第一介電層i3a及第 一介電層13b,接著於該第户介電層i3a上形成線路層12 ,且該線路層12具有電性接觸墊12〇,又藉由雷射鑽孔方 式’貝穿該第一介電層13a及核心板10以形成雷射穿孔 101 ;最後,於該第一介電層13a及線路層12上形成防焊 層14,且該防焊層14具有一開口 140及複數開孔hi,以 令該雷射穿孔101及電性接觸墊12 0分別經該開口 14 〇與 開孔141而外露’而於該電性接觸墊12〇上形成金屬表面 處理層15 ’且可將微機電元件16置於該雷射穿孔1〇1中之 銅層11上。 099106228 表單編號A0101 第4頁/共17頁 0992011294-0 201131724 [0004] 然,雷射鑽孔所形成之孔徑與孔深通常分別小於150 與120#111,其較佳用途係針對尺寸較小之導電盲孑L, 而該微機電元件16之置放空間(即穿孔101 )通常需要遠大 於上述尺寸之孔徑d及孔深h,習知封裝基板藉由雷射鑽 孔形成雷射穿孔101之方式,往往需要冗長之雷射燒熔, 也因此增加製程時間而無法增進產能。 [0005] 再者,雷射鑽孔方式對於矽材質有切割上之限制, 導致貫穿該第一介電層13a及核心板10所形成之雷射穿孔 ^ 101的孔壁不易平滑。 [0006] 又,習知之封裝基板需藉由該銅層11作為阻擋層, 以防止雷射貫穿該第二介電層13b,但於後續之切割製程 後,該銅層11之側邊卻會產生毛邊問題(Cu burr is-sue ),因而影響產品之品質。 [0007] 此外,習知技術需將該第一及第二介電層13a,13b壓 合於該核心板10上,若壓合製程處理不慎,亦會發生介 電層麵曲之缺失。 〇 [0008] 因此,如何避免習知封裝基板之缺失,實已成為目 前亟欲解決的課題。 【發明内容】 [0009] 鑑於上述習知技術之種種缺失,本發明之一目的係 在提供一種能縮短製程時間及降低成本之封裝基板。 [0010] 本發明之另一目的在於提供一種穿孔孔壁平滑之封. 裝基板。 [0011] 本發明之又一目的在於提供一種提升產品品質之封 099106228 表單編號A0101 第5頁/共17頁 0992011294-0 201131724 裝基板。 [0012] [0013] [0014] 為達上述及其他目的,本發明揭露一種封裝基板, 係包括:核心板,係具有相對之第一表面及第二表面, 且該核心板具有貫穿該第一及第二表面之機鑽穿孔,其 中,該機鑽穿孔之孔徑係大於150#m且該機鑽穿孔之孔 深大於120 /z m ;線路層,係設於該核心板之第一表面上 ,且該線路層具有電性接觸墊;承載板,係結合於該核 心板之第二表面上,以封住該機鑽穿孔之一端;以及防 焊層,係設於該核心板之第一表面及線路層上,且該防 焊層具有一開口及複數開孔,以令該機鑽穿孔及電性接 觸墊分別經該開口與開孔而外露。 前述之封裝基板中,該核心板之第二表面上具有黏 著層,以黏結該承載板;該電性'接觸墊表面覆有金屬表 面處理層;該機鑽穿孔中之承載板上設有微機電元件。 本發明復提供一種封裝基板之製法,係包括:提供 一具有相對之第一表面及第二表面之核心板;於該核心 板之第一表面上形成線路層;於該核心板上,以機鑽方 式形成貫穿該第一及第二表面之機鑽穿孔,其中,該機 鑽穿孔之孔徑係大於150 // m且該機鑽穿孔之孔深大於120 /zm ;於該核心板之第二表面上結合承載板,以封住該機 鑽穿孔之一端;以及於該核心板之第一表面及線路層上 形成防焊層,且於該防焊層中形成有一開口與複數開孔 ,令該機鑽穿孔及部分線路層分別經該開口與開孔而外 露。 099106228 表單編號A0101 第6頁/共17頁 0992011294-0 201131724 [0015] [0016] Ο [0017] [0018] 〇 [0019] [0020] 前述之製法中,形成該線路層之製程,係包括:於 該核心板之第一及第二表面上形成金屬層。於該核心板 之第一表面上之金屬層上形成阻層,且於該阻層中形成 複數開口區,以外露出該核心板之第一表面上之部分金 屬層;移除該開口區中及該核心板之第二表面上之金屬 層,以形成該線路層;以及移除該阻層。 前述之製法中,該核心板之第二表面上具有黏著層 ,以黏結該承載板;該線路層之外露部分係作為電性接 觸墊,且該電性接觸墊之表面形成有金屬表面處理層。 前述之製法復包括提供微機電元件置於該機鑽穿孔 中之承載板上。 由上可知,本發明封裝基板及其製法藉由機鑽方式 可避免如習知雷射鑽孔方式所受之材質限制,故該機鑽 穿孔之孔壁係為平滑;且當欲形成大尺寸之孔型時,藉 由機鑽方式可使製程時間縮短及成本降低。 再者,本發明使用機鑽方式鑽孔,因而不需銅層作 阻擋層,故於後續之切割製程後,該封裝基板側邊不會 產生毛邊,俾有效避免產品之品質受損,以達到提升產 品品質之目的。 又,相較於習知技術之核心板與介電層之結構,本 發明係用單層之核心板,不僅成本降低,且能避免習知 技術介電層翹曲之缺失。 實施方式】 以下藉由特定的具體實施例說明本發明之實施方式 099106228 表單編號Α0101 第7頁/共17頁 0992011294-0 [0021] 201131724 ,熟悉此技藝之人士可由本說明書所揭示之内容輕易地 瞭解本發明之其他優點及功效。 [0022] [0023] [0024] [0025] [0026] [0027] 099106228 請參閱第2A至2H圖,係為本發明封裝基板之製法的 剖視示意圖。 如第2A圖所示,首先,提供一具有相對之第一表面 20a及第二表面20b之核心板20,且於該核心板20之第一 及第二表面20a,20b上形成金屬層200。 如第2B圖所示,於該核心板20之第一表面20a上之金 f 屬層200上形成阻層21,且於該阻層21中形成複數開口區 210,以外露出該核心板20之第一表面20a上之部分金屬 層 200。 如第2C圖所示,移除該開口區210中及該核心板20之 第二表面20b上之全部金屬層200,以於該核心板20之第 一表面20a上形成線路層22。 如第2D圖所示,移除該阻層21。 1 如第2E圖所示,以機鑽方式,於該核心板20上形成 貫穿該第一及第二表面20a,20b之機鑽穿孔201 ;其中, 該機鑽穿孔201之孔徑D係大於150#ιη,且該機鑽穿孔 201之孔深Η大於120 /zm。再者,於該核心板20之第二表 面20b上形成黏著層202。 如第2F圖所示,藉由該黏著層202,於該核心板20之 第二表面20b上結合承載板23,以封住該機鑽穿孔201之 一端。 第8頁/共17頁 0992011294-0 表單編號A0101 [0028] 201131724 ,‘ [0029] 她於習知技術之雷射鑽孔,本發明藉由機鑽方式 可設計孔深Η較深及孔徑D較大之機鑽穿孔2〇1,以滿足 現今3D ^件、微機電元件及堆疊晶片之空間需求。 [〇酬 如第2G圖所示,於讀核心板20之第-表面2〇a及線路 層22上形成防焊屠24,且於該防焊層24中形成有-開口 240與複數開孔241 ’令該機鑽穿孔2Q1經該開口 24〇而外 露’而部分線路層22經各該開孔241而外露,俾該線路層 22之外露部分係作為電性接觸墊22〇。 〇 _1] 如第2H圖所示,該電性接觸塾22〇之表面形成有金屬 表面處理層25 ’再者,復包括提供微機電元件26置於該 機鑽穿孔201中之承載板23上。 圃 料韻裝基板藉由單層之心㈣及鋪穿孔201 ,以形成放置該微機電元件26之空間。 _] 本發明藉由機鐵方式可避免材質限制,因而該機鑽 穿孔201之孔壁係為平滑;且相較於習知雷射鐵孔係用於 Ο 針對小尺寸之_ ’若需形鼓財H藉由機鑽 方式可使製程時間縮短及成本降低成本降低。 [0034] 再者,相較於習知技術之核心板與介電層之結構, 本發明係用單層之核心板20,不僅成本降低,且能避免 習知技術介電層翹曲之缺失。 [0035] 又,本發明使用機鑽方式鑽孔,因而不需銅層作阻 擋層,故於後續之切割製程後,該封裝基板側邊不會產 生毛邊,俾有效避免產品之品質受損。 099106228 表單編號A0101 第9頁/共17頁 0992011294-0 201131724 [0036] [0037] [0038] [0039] [0040] [0041] 另外’相較於習知技術之介電層壓合製程,本發明 藉由該黏著層2〇2結合該核心板2〇及承載板23,可有效大 幅降低材料成本。 本發明復提供一種封裝基板,係包括:具有相對之 第表面20a及第二表面2〇b之核心板20、設於該核心板 2〇之第一表面20a上之線路層22、結合於該核心板20之 第二表面20b上之承載板23、以及設於該核心板20之第一 表面20a及線路層22上之防焊層24。 所述之核心板20具有貫穿該第一及第二表面 2〇a’ 20b之機鑽穿孔201,該機鑽穿孔2〇1之孔徑D係大於 150/zm ’且該機鑽穿孔2(π之孔深H大於12〇_。 所述之線路層22具有電性接觸墊22〇 ;所述之承載板 23用以封住該機鑽穿孔2〇1之一端;其中,該核心板2〇之 第二表面20b上具有黏著層202,以黏結該承載板23。 所述之防焊層24具有-開口 24〇及複數開孔241,以 令該機鑽穿孔2〇1及電性接觸梢〇分別經該開口 24〇與 開孔241而外露,並可於該電性接觸墊22〇表面覆有金屬 表面處理層25,而於該機鑽穿孔2〇1中之承载板23上設有 微機電元件26。 綜上所述’本㈣封裝基板及其製法係藉由機鑽方 式形成穿孔’以達到穿孔孔壁平滑之目的,且當欲形成 大尺寸之孔型時,藉由機鐵方式可達到縮短^時間及 降低成本之目的。再者,本發明藉由機鑽方式,故於後 續之切割製程後,該封裝基板之側邊不會產生毛邊,、有 099106228 表單編號A0101 第10頁/共17頁 0992011294-0 201131724 效達到提升產品品質之目的。 [0042] 上述實施例係用以例示性說明本發明之原理及其功 效,而非用於限制本發明。任何熟習此項技藝之人士均 可在不違背本發明之精神及範疇下,對上述實施例進行 修改。因此本發明之權利保護範圍,應如後述之申請專 利範圍所列。 【圖式簡單說明】 • [0043] 第1圖係為習知封裝基板的刳視示意圖;以及 〇 [0044] 第2A至2H圖係為本發明封裝基板之製法的剖視示意 圖。 【主要元件符號說明】 [0045] 10, 20 核心板 [0046] 10a,20a 第一表面 [0047] 10b,20b 第二表面 [0048] 101 雷射穿孔 [0049] 11 銅層 [0050] 12, 22 線路層 [0051] 120,220 電性接觸墊 [0052] 13a 第一介電層 [0053] 13b 第二介電層 [0054] 14, 24 防焊層 099106228 表單編號A0101 第11頁/共17頁 0992011294-0 201131724 [0055] 140, 240 開口 [0056] 141,241 開孔 [0057] 15, 25 金屬表面處理層 [0058] 16, 26 微機電元件 [0059] 200 金屬層 [0060] 201 機鑽穿孔 [0061] 202 黏著層 [0062] 21 阻層 [0063] 210 開口區 [0064] 23 承載板 [0065] D > d 孔徑 [0066] Η ' h 孔深 099106228 表單編號 A0101 第 12 頁/共 17 頁 0992011294-0BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a package substrate and a method of fabricating the same, and more particularly to a package substrate capable of shortening process time and reducing cost, and a method of fabricating the same. [Prior Art] With the evolution of semiconductor packaging technology, in addition to the conventional semiconductor technology of wire bonding and Flip chip, semiconductor devices have been developed in different package types, % ' For example, directly embedded in a package substrate and electrically integrated with a micro-electromechanical component, such a package can reduce the volume of the overall package structure and enhance the electrical function, which becomes a trend of packaging. Please refer to FIG. 1 , which is a cross-sectional view of a conventional package substrate. As shown, a core board 10 having a first surface 10a and a second surface 10b is provided, and the second surface ib has a copper layer 11; and the first surface 10a and the copper The first dielectric layer i3a and the first dielectric layer 13b are respectively laminated on the layer 11, and then the circuit layer 12 is formed on the first dielectric layer i3a, and the circuit layer 12 has an electrical contact pad 12〇. The first dielectric layer 13a and the core plate 10 are formed by a laser drilling method to form a laser through hole 101; finally, a solder resist layer 14 is formed on the first dielectric layer 13a and the circuit layer 12, and the The solder resist layer 14 has an opening 140 and a plurality of openings hi such that the laser through hole 101 and the electrical contact pad 120 are exposed through the opening 14 and the opening 141, respectively, and the electrical contact pad 12 is disposed. A metal surface treatment layer 15' is formed thereon and a microelectromechanical element 16 can be placed on the copper layer 11 in the laser vias 1〇1. 099106228 Form No. A0101 Page 4 of 17 0992011294-0 201131724 [0004] However, the hole diameter and hole depth formed by laser drilling are usually less than 150 and 120#111 respectively, and the preferred use is for smaller size. The conductive blind 孑L, and the placement space of the MEMS element 16 (ie, the through hole 101) generally needs to be much larger than the aperture d and the hole depth h of the above-mentioned size, and the conventional package substrate forms the laser through hole 101 by laser drilling. In this way, it is often necessary to lengthen the laser to melt, which also increases the processing time and cannot increase the production capacity. [0005] Furthermore, the laser drilling method has a limitation on the cutting of the crucible material, so that the hole walls of the laser perforations 101 formed through the first dielectric layer 13a and the core plate 10 are not easily smoothed. [0006] Moreover, the conventional package substrate needs to use the copper layer 11 as a barrier layer to prevent the laser from penetrating through the second dielectric layer 13b, but after the subsequent cutting process, the side of the copper layer 11 will Cu burr is-sue, which affects the quality of the product. In addition, the prior art requires the first and second dielectric layers 13a, 13b to be pressed against the core board 10. If the pressing process is inadvertently handled, the dielectric layer may be missing. 0008 [0008] Therefore, how to avoid the lack of the conventional package substrate has become a problem to be solved. SUMMARY OF THE INVENTION [0009] In view of the above-described deficiencies of the prior art, it is an object of the present invention to provide a package substrate that can reduce process time and cost. [0010] Another object of the present invention is to provide a sealed perforated hole wall. [0011] Another object of the present invention is to provide a seal for improving product quality. 099106228 Form No. A0101 Page 5 of 17 0992011294-0 201131724 Mounting substrate. [0014] In order to achieve the above and other objects, the present invention discloses a package substrate, comprising: a core plate having opposite first and second surfaces, and the core plate has a first through And the second surface of the machine drill perforation, wherein the hole diameter of the machine drill hole is greater than 150 #m and the hole depth of the machine drill hole is greater than 120 /zm; the circuit layer is disposed on the first surface of the core plate, And the circuit layer has an electrical contact pad; the carrier plate is coupled to the second surface of the core plate to seal one end of the drill hole; and the solder resist layer is disposed on the first surface of the core plate And the circuit layer, and the solder resist layer has an opening and a plurality of openings, so that the drill hole and the electrical contact pad are respectively exposed through the opening and the opening. In the foregoing package substrate, the second surface of the core plate has an adhesive layer for bonding the carrier plate; the electrical 'contact pad surface is covered with a metal surface treatment layer; and the carrier plate is provided with a micro on the carrier plate Electromechanical components. The invention provides a method for manufacturing a package substrate, comprising: providing a core plate having a first surface and a second surface; forming a circuit layer on the first surface of the core plate; The drilling method forms a perforation of the machine drill through the first and second surfaces, wherein the hole diameter of the machine drilling hole is greater than 150 // m and the hole depth of the machine drilling hole is greater than 120 /zm; the second of the core plate a carrier plate is coupled to the surface to seal one end of the drill hole; and a solder resist layer is formed on the first surface of the core plate and the circuit layer, and an opening and a plurality of openings are formed in the solder resist layer, The machine drill perforation and part of the circuit layer are exposed through the opening and the opening respectively. 000106228 Form No. A0101 Page 6 of 17 0992011294-0 201131724 [0016] [0019] [0020] In the foregoing method, the process of forming the circuit layer includes: A metal layer is formed on the first and second surfaces of the core plate. Forming a resist layer on the metal layer on the first surface of the core plate, and forming a plurality of open regions in the resist layer, exposing a portion of the metal layer on the first surface of the core plate; removing the open region a metal layer on the second surface of the core plate to form the wiring layer; and removing the resist layer. In the above method, the second surface of the core plate has an adhesive layer for bonding the carrier plate; the exposed portion of the circuit layer serves as an electrical contact pad, and the surface of the electrical contact pad is formed with a metal surface treatment layer. . The foregoing method includes providing a microelectromechanical component on a carrier plate that is placed in the perforation of the machine. It can be seen from the above that the package substrate of the present invention and the method for manufacturing the same can avoid the material limitation of the conventional laser drilling method by the machine drilling method, so that the hole wall of the machine drill hole is smooth; and when the large size is to be formed In the case of the hole type, the machining time can be shortened and the cost can be reduced by the machine drilling method. Furthermore, the present invention uses a machine drilling method to drill holes, so that a copper layer is not required as a barrier layer, so that after the subsequent cutting process, the side of the package substrate does not generate burrs, and the quality of the product is effectively prevented from being damaged. Improve the quality of products. Moreover, the present invention uses a single-layer core board as compared with the structure of the core board and the dielectric layer of the prior art, which not only reduces the cost, but also avoids the loss of the warpage of the conventional dielectric layer. BEST MODE FOR CARRYING OUT THE INVENTION Hereinafter, embodiments of the present invention will be described by way of specific embodiments. Form number Α0101, page 7 / page 17 0992011294-0 [0021] 201131724, those skilled in the art can easily easily disclose the contents disclosed in this specification. Other advantages and effects of the present invention are understood. [0027] [0027] [0027] 099106228 Please refer to FIGS. 2A to 2H, which are cross-sectional views showing the manufacturing method of the package substrate of the present invention. As shown in Fig. 2A, first, a core plate 20 having a first surface 20a and a second surface 20b opposite thereto is provided, and a metal layer 200 is formed on the first and second surfaces 20a, 20b of the core plate 20. As shown in FIG. 2B, a resist layer 21 is formed on the gold-based layer 200 on the first surface 20a of the core board 20, and a plurality of open regions 210 are formed in the resist layer 21, and the core board 20 is exposed. A portion of the metal layer 200 on the first surface 20a. As shown in FIG. 2C, all of the metal layers 200 in the open region 210 and the second surface 20b of the core plate 20 are removed to form a wiring layer 22 on the first surface 20a of the core plate 20. The resist layer 21 is removed as shown in FIG. 2D. 1 as shown in FIG. 2E, a machine drill hole 201 is formed in the core plate 20 through the first and second surfaces 20a, 20b in a machine drilling manner; wherein the machine drill hole 201 has an aperture D of more than 150 #ιη, and the hole depth of the drill hole 201 of the machine is greater than 120 /zm. Furthermore, an adhesive layer 202 is formed on the second surface 20b of the core board 20. As shown in FIG. 2F, the carrier layer 23 is bonded to the second surface 20b of the core board 20 by the adhesive layer 202 to seal one end of the drill hole 201. Page 8 of 17 0992011294-0 Form No. A0101 [0028] 201131724, '[0029] She is a laser drilling method of the prior art, and the present invention can design a deep hole depth and an aperture D by a machine drilling method. Larger machines drill perforated 2〇1 to meet the space requirements of today's 3D components, MEMS components and stacked wafers. [As shown in FIG. 2G, a solder resist 24 is formed on the first surface 2A of the read core board 20 and the circuit layer 22, and an opening 240 and a plurality of openings are formed in the solder resist layer 24. 241 'The drill hole 2Q1 is exposed through the opening 24' and the partial circuit layer 22 is exposed through each of the openings 241, and the exposed portion of the circuit layer 22 serves as the electrical contact pad 22'. 〇_1] As shown in FIG. 2H, the surface of the electrical contact 塾22〇 is formed with a metal surface treatment layer 25', and further includes a carrier plate 23 for providing the microelectromechanical element 26 in the machine drill hole 201. on. The substrate is formed by a single layer of cores (4) and perforations 201 to form a space in which the microelectromechanical elements 26 are placed. _] The invention can avoid the material limitation by the iron method, so that the hole wall of the machine drilling perforation 201 is smooth; and compared with the conventional laser iron hole system for the small size _ ' Drilling H can reduce the process time and cost reduction by machine drilling. [0034] Furthermore, compared with the structure of the core board and the dielectric layer of the prior art, the present invention uses the single-layer core board 20, which not only reduces the cost, but also avoids the lack of the warpage of the dielectric layer of the prior art. . [0035] Moreover, the present invention uses a machine drill method to drill holes, so that a copper layer is not required as a barrier layer, so that the side of the package substrate does not generate burrs after the subsequent cutting process, and the quality of the product is effectively prevented from being damaged. 099106228 Form No. A0101 Page 9 of 17 0992011294-0 201131724 [0036] [0040] [0041] In addition, compared to the dielectric lamination process of the prior art, this The invention combines the core plate 2 and the carrier plate 23 by the adhesive layer 2〇2, which can effectively reduce the material cost. The present invention further provides a package substrate comprising: a core board 20 having a first surface 20a and a second surface 2〇b, and a circuit layer 22 disposed on the first surface 20a of the core board 2 A carrier plate 23 on the second surface 20b of the core board 20, and a solder resist layer 24 disposed on the first surface 20a of the core board 20 and the circuit layer 22. The core plate 20 has a machine drill perforation 201 extending through the first and second surfaces 2〇a' 20b, the bore D of the machine drill perforation 2〇1 is greater than 150/zm′ and the machine drills a perforation 2 (π The hole depth H is greater than 12 〇. The circuit layer 22 has an electrical contact pad 22 〇; the carrier plate 23 is used to seal one end of the machine drill hole 2 〇 1; wherein the core plate 2 〇 The second surface 20b has an adhesive layer 202 for bonding the carrier plate 23. The solder resist layer 24 has an opening 24〇 and a plurality of openings 241 for drilling the hole 2〇1 and the electrical contact tip. The 〇 is exposed through the opening 24 〇 and the opening 241, and the surface of the electrical contact pad 22 is covered with the metal surface treatment layer 25, and is disposed on the carrier 23 of the machine drill hole 2〇1. Microelectromechanical component 26. In summary, the 'fourth package substrate and its manufacturing method form a perforation by means of a machine drill to achieve the purpose of smoothing the perforated hole wall, and when the large-sized hole type is to be formed, the machine iron is used. The method can achieve the purpose of shortening the time and reducing the cost. Furthermore, the invention is machine drilled, so after the subsequent cutting process, The side of the package substrate does not produce burrs, and there are 099106228 Form No. A0101, page 10 / page 17 0992011294-0 201131724 to achieve the purpose of improving product quality. [0042] The above embodiments are used to exemplify the present invention. The present invention is not limited by the spirit and scope of the present invention, and the scope of the present invention should be modified. [0023] FIG. 1 is a schematic view of a conventional package substrate; and [0044] FIGS. 2A to 2H are the package substrates of the present invention. Schematic diagram of the manufacturing method. [Main component symbol description] [0045] 10, 20 core board [0046] 10a, 20a first surface [0047] 10b, 20b second surface [0048] 101 laser perforation [0049] 11 copper Layer [0050] 12, 22 circuit layer [0051] 120, 220 electrical contact pad [0052] 13a first dielectric layer [0053] 13b second dielectric layer [0054] 14, 24 solder mask 099106228 Form No. A0101 No. 11 Page / Total 17 Pages 099201129 4-0 201131724 [0055] 140, 240 opening [0056] 141, 241 opening [0057] 15, 25 metal surface treatment layer [0058] 16, 26 microelectromechanical components [0059] 200 metal layer [0060] 201 machine drill Perforation [0061] 202 Adhesive layer [0062] 21 Resistive layer [0063] 210 Open area [0064] 23 Carrier plate [0065] D > d Aperture [0066] Η ' h Hole depth 099106228 Form number A0101 Page 12 / Total 17 pages 0992011294-0

Claims (1)

201131724 七、申請專利範圍: 1 . 一種封裝基板,係包括: 核心板,係具有相對之第一表面及第二表面,且該核 心板具有貫穿該第一及第二表面之機鑽穿孔,其中,該機 鑽穿孔之孔徑係大於150 /zm且該機鑽穿孔之孔深大於120 β m ; 線路層,係設於該核心板之第一表面上,且該線路層 具有電性接觸墊; 0 承載板,係結合於該核心板之第二表面上,以封住該 機鑽穿孔之一端;以及 防焊層,係設於該核心板之第一表面及線路層上,且 該防焊層具有一開口及複數開孔,以令該機鑽穿孔及電性 接觸墊分別經該開口與開孔而外露。 2 .如申請專利範圍第1項之封裝基板,其中,該核心板之第 二表面上具有黏著層,以黏結該承載板。 3 .如申請專利範圍第1項之封裝基板,其中,該電性接觸墊 ^ 表面覆有金屬表面處理層。 4 .如申請專利範圍第1、2或3項之封裝基板,其中,該機鑽 穿孔中之承載板上設有微機電元件。 5 . —種封裝基板之製法,係包括: 提供一具有相對之第一表面及第二表面之核心板; 於該核心板之第一表面上形成線路層; 於該核心板上,以機鑽方式形成貫穿該第一及第二表 面之機鑽穿孔,其中,該機鑽穿孔之孔徑係大於15〇em 且該機鑽穿孔之孔深大於120//m ; 099106228 表單編號A0101 第13頁/共17頁 0992011294-0 201131724 於該核心板之第二表面上結合承載板,以封住該機鑽 穿孔之一端;以及 於該核心板之第一表面及線路層上形成防焊層,且於 該防焊層中形成有一開口與複數開孔,令該機鑽穿孔及部 分線路層分別經該開口與開孔而外露。 6 .如申請專利範圍第5項之封裝基板之製法,其中,形成該 線路層之製程,係包括: 於該核心板之第一及第二表面上形成金屬層; 於該核心板之第一表面上之金屬層上形成阻層,且於 該阻層中形成複數開口區,以外露出該核心板之第一表面 上之部分金屬層; 移除該開口區中及該核心板之第二表面上之金屬層, 以形成該線路層;以及 移除該阻層。 7 .如申請專利範圍第5項之封裝基板之製法,其中,該核心 板之第二表面上具有黏著層,以黏結該承載板。 8 .如申請專利範圍第5項之封裝基板之製法,其中,該線路 層之外露部分係作為電性接觸墊,該電性接觸墊之表面形 成有金屬表面處理層。 9 .如申請專利範圍第5、6、7或8項之封裝基板之製法,復 包括提供微機電元件置於該機鑽穿孔中之承載板上。 099106228 表單編號A0101 第14頁/共17頁 0992011294-0201131724 VII. Patent application scope: 1. A package substrate, comprising: a core plate having a first surface and a second surface opposite to each other, wherein the core plate has a machine drill perforation extending through the first and second surfaces, wherein The hole diameter of the drill hole is greater than 150 /zm and the hole depth of the drill hole is greater than 120 β m; the circuit layer is disposed on the first surface of the core plate, and the circuit layer has an electrical contact pad; a carrier plate coupled to the second surface of the core plate to seal one end of the machine drill hole; and a solder resist layer disposed on the first surface of the core plate and the circuit layer, and the solder resist The layer has an opening and a plurality of openings for exposing the machine through hole and the electrical contact pad respectively through the opening and the opening. 2. The package substrate of claim 1, wherein the core plate has an adhesive layer on the second surface to bond the carrier. 3. The package substrate of claim 1, wherein the electrical contact pad is coated with a metal surface treatment layer. 4. The package substrate of claim 1, 2 or 3, wherein the carrier plate in the drill hole is provided with a microelectromechanical component. 5 . The method for manufacturing a package substrate, comprising: providing a core plate having a first surface and a second surface; forming a circuit layer on the first surface of the core plate; and drilling the core plate The method forms a machine drill perforation extending through the first and second surfaces, wherein the hole diameter of the machine drilling hole is greater than 15 〇em and the hole depth of the machine drilling hole is greater than 120//m; 099106228 Form No. A0101 Page 13/ A total of 17 pages 0992011294-0 201131724 are combined with a carrier plate on the second surface of the core plate to seal one end of the machine drill hole; and a solder resist layer is formed on the first surface of the core plate and the circuit layer, and An opening and a plurality of openings are formed in the solder resist layer, so that the drill hole and part of the circuit layer are exposed through the opening and the opening respectively. 6. The method of manufacturing a package substrate according to claim 5, wherein the process of forming the circuit layer comprises: forming a metal layer on the first and second surfaces of the core board; Forming a resist layer on the metal layer on the surface, and forming a plurality of open regions in the resist layer to expose a portion of the metal layer on the first surface of the core plate; removing the second surface of the open region and the core plate a metal layer thereon to form the wiring layer; and removing the resist layer. 7. The method of claim 5, wherein the second surface of the core sheet has an adhesive layer to bond the carrier sheet. 8. The method of claim 5, wherein the exposed portion of the wiring layer serves as an electrical contact pad, and the surface of the electrical contact pad is formed with a metal surface treatment layer. 9. A method of fabricating a package substrate according to claim 5, 6, 7, or 8, further comprising providing a microelectromechanical component on a carrier plate in the perforation of the machine. 099106228 Form No. A0101 Page 14 of 17 0992011294-0
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TWI582918B (en) * 2014-11-12 2017-05-11 精材科技股份有限公司 Chip package and manufacturing method thereof

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TWI311452B (en) * 2005-03-30 2009-06-21 Advanced Semiconductor Eng Method of fabricating a device-containing substrate

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Publication number Priority date Publication date Assignee Title
TWI582918B (en) * 2014-11-12 2017-05-11 精材科技股份有限公司 Chip package and manufacturing method thereof
US9721911B2 (en) 2014-11-12 2017-08-01 Xintec Inc. Chip package and manufacturing method thereof

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