201131267 AU0910165 33693twf.doc/n 六、發明說明： 【發明所屬之技術領域】 動 本發明是有關於一種基板，且特別3 元件陣列純。 ’ h有關於-種主 【先前技術】 液晶顯示面板主要是由主動元 ^ 陣列基板以及液晶層所構成，其中 =、衫色濾光 多條掃描線、多條資料線以及多個陣列:二:二板= 應，Γ線及資料線連接。-般來說 列基板上通常會設置有共i 平行於掃=_合_錢容。❹卜，共通線通常會 此丑掃描線通常是由同一金屬層所形成’因 =大般來說，為卿 發生短路的確切位置並°^•導致共通線與掃描線 使共通線與掃描線不再^割的方式進行修補，以 短路的位置在領示金而由么…、、而，共通線與知描線發生 能確定短路位置是二生在^現線缺陷(linedefeet)，故僅 路的確切位置。如卻無法確定發生短 板的瑕錄出率不s传光學檢測工具對於顯示面 本升高。 而無法降低因報廢所導致的製造成 3 201131267 AU〇yiul65 33693twf.doc/n 【發明内容】 本發明提供一種主動元件陣列基板，有助於檢測 通線與掃描線發生短路的位置。 /、 本發明提出一種主動元件陣列基板，其包括基板、夕 條掃描線、多條資料線、多個晝素以及多個共通線組。^ 條掃描線設置於基板上。多條資料線設置於基板上。各二 素包括N個子晝素’其中各子晝素係與對應的資料線^ 對應的掃描線電性連接。多個共通線組設置於基板上， 共通線組分別對應於晝素之一，其中各共通線組與相鄰之 共通線組係僅藉由Μ個連接線電性連接，M小於N，M 連接線與共通線組係由不同膜層形成。 =發明提出另—種主動元件_基板，其包括基板、 描線、多條資料線、多個晝素以及多個共通線組。 ^條掃描線設置於基板上。多條資料線設置於基板上。各 旦$匕括N個子晝素，其中各子晝素係與對應的資料線以 及對應的掃描線電性連接。多個共通線組設置於美板上 各^線組分別對應於畫素之―，其中各共通線^相鄰 之，、通線組係僅藉由M個連接線電性連接，M小於n，其 中Μ個連接線係連接同一行中兩鄰接的共通線組。 夕明提出又—種主航件陣列基板，其包括基板、 素、多條掃描線、多條資料線以及多條共通線。基 -顯示區域以及一與顯示區域鄰接的非顯示區域。 ς固旦素陣列排列於顯示區域内，各晝素包括多個子晝 素。多條掃描線配置於基板上，其巾各掃赠分別與排列 201131267 AU0910165 33693twf.d〇c/n 在同 其中各資連接。多條資料線配置於基板上， 條共通線配置行的子晝素電性連接。多 f描線電性絕入共通線麵= Ϊ交 線僅在非顯示區域内彼此連接。 其中實施例中’上述之各共通線分別^201131267 AU0910165 33693twf.doc/n VI. Description of the Invention: [Technical Field of the Invention] The present invention relates to a substrate, and in particular, a 3-element array is pure. 'h has a related - the main [previous technology] The liquid crystal display panel is mainly composed of an active element array substrate and a liquid crystal layer, wherein =, shirt color filter multiple scan lines, multiple data lines and multiple arrays: : Two boards = Yes, Γ line and data line connection. In general, the column substrate is usually set with a total of i parallel to the sweep = _ _ _ _ capacity. In other words, the common line usually has this ugly scan line usually formed by the same metal layer. No longer cut in the way of cutting, the location of the short circuit is in the lead of the gold..., and the common line and the known line can determine that the short-circuit position is the second line in the linedefeet, so only the road The exact location. For example, it is not certain that the recording rate of the short board is not transmitted. The optical inspection tool is raised for the display surface. However, the manufacturing process due to scrapping cannot be reduced. 3 201131267 AU〇yiul65 33693twf.doc/n SUMMARY OF THE INVENTION The present invention provides an active device array substrate that facilitates detecting a position where a through line and a scan line are short-circuited. The present invention provides an active device array substrate including a substrate, a square scan line, a plurality of data lines, a plurality of halogen elements, and a plurality of common line groups. ^ The scanning lines are placed on the substrate. A plurality of data lines are disposed on the substrate. Each of the two elements includes N sub-stimuli, wherein each of the sub-systems is electrically connected to a scanning line corresponding to the corresponding data line ^. The plurality of common line groups are disposed on the substrate, and the common line group respectively corresponds to one of the pixels, wherein each common line group and the adjacent common line group are electrically connected only by one connecting line, and M is smaller than N, M The connection line and the common line group are formed by different film layers. The invention proposes another active element_substrate comprising a substrate, a trace, a plurality of data lines, a plurality of elements, and a plurality of common line groups. The ^ scan lines are disposed on the substrate. A plurality of data lines are disposed on the substrate. Each of the sub-units is electrically connected to the corresponding data line and the corresponding scanning line. The plurality of common line groups are disposed on the US board, and each of the groups of wires corresponds to a pixel of the pixel, wherein each common line is adjacent to each other, and the line group is electrically connected only by M connecting lines, and M is less than n. , wherein one of the connecting lines is connected to two adjacent common line groups in the same row. Xi Ming proposes another type of main aircraft array substrate, which comprises a substrate, a prime, a plurality of scanning lines, a plurality of data lines and a plurality of common lines. Base - a display area and a non-display area adjacent to the display area. The ruthenium array is arranged in the display area, and each element includes a plurality of sub-smectins. A plurality of scanning lines are arranged on the substrate, and each of the towels is separately connected with the arrangement of 201131267 AU0910165 33693twf.d〇c/n. A plurality of data lines are disposed on the substrate, and the sub-halogens of the common lines of the strips are electrically connected. Multi-f-line electrical penetrating common line surface = Ϊ intersection line is connected to each other only in the non-display area. In the embodiment, the above common lines are respectively ^
其中ί = 中，上述之各共通線分別分佈於 ❼曰基^述’本發明之主動元件陣列基板包括多個共通 ί接’ 同一行且相鄰的兩共通線組僅藉由連接線 易地檢測岐生短路的確切位置，關後續修復進行1 而提升主動7L件陣列基板的良率。 為讓本發明之上述特徵和優點能更明顯易懂，下文特 舉實施例，並配合所關式作詳細朗如下。 ’ 【實施方式】 在主動元件陣列基板的製程中，由於共通線與掃描線 通常是由同-金顧所形成，因此聽線與掃描線可能會 因為製程上的械而意外發生短路。由於發生短路的位^ 會在顯示晝面上呈現線缺陷，使得現有的光學檢測工具對 顯示面板的贼檢出率不高，造成顯示面板必須報廢。因 此，以下實施例提出-種转元件陣職板，使檢測工且 能輕易地確定共通線與掃描線發生短路的確切位置，以利 201131267 /vuuy u；165 33693twf.doc/n 修復的進行，進而提升主動元件陣列基板的良率以及避免 報廢所造成的成本大幅增加。 圖1A是根據本發明一實施例之主動元件陣列基板的 上視示意圖，圖1B是圖1A之晝素12〇的上視示意圖，而 圖1C是沿圖1B之1-1’及ii_;q，的剖面示意圖。請同時參照 ，1A及圖1B ’本實施例之主動元件陣列基板1〇〇包括基 反102、多條掃描線110、多條資料線112、多個畫素12〇 以及多條共通線M0。在本實施例中，基板1〇2具有一顯 =區域104以及一與顯示區域1〇4鄰接的非顯示區域 條掃描線110與多條資料線m配置於基板1〇2 。夕個畫f 120 P車列排列於顯示刚 =括_子畫㈣，各子畫素喝舆對應= '娃以及對應的掃描線110電性 線112分別與排列在同一行=按各貧枓 =u。與排列在同—列的122電J 土 貝枓線112的延伸方向例如 =連接，且 延伸方向。 疋貫貝上垂直於柃描線110的 在本實施例中，一個書 122,分別為紅色子畫素、〇例如是包括三個子晝素 就曰〜|、、彔色子晝素以及藍色子夺去. 就疋說，本實施例為Ν=3 Α監已千！素，也 所包括的子晝素！22數目實^然而，本發明未對晝素 實施例中，N可以是其他自铁^仃=制。換言之’在其他 122包括一開關元件124及」°如圖1B所示，子畫素 與對應的資料線112及針靡:電極134，開關元件124 及對應的掃描線110電性連接。開關 201131267 i υ i 65 33693twf.doc/n 元件124例如是薄膜電晶體’其包括閘極126、通道層128、 源極130以及沒極132。晝素電極134藉由絕緣層1〇8中 的接觸窗109與開關元件124之汲極132電性連接。 共通線140配置於基板1〇2上，共通線14〇與掃描線 110交錯並與掃描線110電性絕緣，共通線14〇在顯示區 域104内彼此分離，而共通線140僅在非顯示區域1〇6内 彼此連接，且各共通線140分別分佈於其中一行書素12〇 下方。詳言之’共通線140包括多個共通線組142及多個 連接線144。共通線組142設置於基板1〇2上，各共通線 組142分別對應於一個晝素120，其中各共通線組與 相鄰之共通線組142僅藉由Μ個連接線144電性連接/Μ 小於Ν。在本實施例中，共通線組142例如是分別對應於 晝素120且位於顯示區域1〇4内’且同一行的共通線組μ〕 在顯示區域104内僅藉由連接線144彼此連接，位於不 行的共通線組142在顯示區域104内彼此分離而僅在鞀 示區域106内藉由導、線158彼此連接。其中，共通線纪^ 例如是包括一第一條狀圖案142a與多個f二條狀 職。第-條狀圖案似的延伸方向實質上平行於= 11〇的延伸方向，第二條狀圖案與第—條狀圖案$ 連接，且第二條狀圖案142b的延伸方向實質上单"二 a 線144的延伸方向。 、桌千仃於連接 在本實施例中，連接線U4例如是連接同 接的共通線組142，且連接線144與對應的掃描線〇 ^ 錯並藉由絕緣層108彼此電性絕緣。如圖ία所示 父 共通線組142例如是對應於包括三個子晝素12『’、二個 、 的畫素 201131267 ^ v 165 33693twf.doc/n 120’而同一行中兩鄰接的共通線組142例如是藉由一個連 接線144連接，換言之，本實施例為N=3且M==l的實例。 然而，在另一實施例中，當N=3時，熥也可以是2，也就 疋以兩個連接線144來連接同一行中兩鄰接的共通線組 142特別注思的疋，在本實施例中，Μ個連接線144與 共通線組142舉例係由不同膜層形成。舉例來說，共通^ 組142與掃描線no例如是由同一金屬層 ^ 例如是金屬或合金，如絡、錮、銘或上述之合^。連^ M4與晝素電極134例如是由同—材料層所形成，其材料 例如是銦錫氧化物、銦鋅氧化物或是其他金屬氧化物。當 在另—實施射，共通線組142與掃描線UG也有^ 能是由同一金屬層所形成。 此外，如圖1C所示，本實施例之主動元件陣列基板 1㈧更包括閘絕緣層107與絕緣層1〇8，閘絕緣層1〇7覆蓋 掃描線110及共通線組142，絕緣層108覆蓋資料線112 及連接線144。因此，共通療組142及連接線144藉由絕 緣層108而為不同膜層。再者，如圖u所示，在非顯示 ，域104中，奇數條掃描線11〇與偶數條掃描線】1〇分別 错由導線152a、152b連接至—導線⑽、⑽，多條資 料線Π2的-端分別對應於其所連接的子晝素】22而連接 導線156a、156b、156〇’以及多條資料線112的另一 端連接至導線m ’以及多條共通線14〇分別連接至一導 、，⑼’使位於不同行的共通線組142在非顯示區域1〇6 内連接。必須說明的是，圖1A所示之導線】.52a、側、 201131267 Αυυν i υ 165 33693twf.doc/n 導線 154a、154b、導線 156a、156b、15& 以 的配置方式及構形都僅是—種例示，任何所屬 具有通常知識者可以根據實際應収 肩域中 線’本發明未對其加以關。 ^«沒些導 特別說明的是，在圖1A所示的實施例中是 通線組142對應於包括三個子晝素122的晝素12〇固共Where ί = , each of the above common lines is respectively distributed on the ❼曰 ^ ' 'The active device array substrate of the present invention includes a plurality of common tongs 'the same row and the adjacent two common line groups are only connected by the connection line The exact position of the twin short circuit is detected, and the subsequent repair is performed to improve the yield of the active 7L piece array substrate. The above described features and advantages of the present invention will become more apparent from the following description. [Embodiment] In the process of the active device array substrate, since the common line and the scan line are usually formed by the same-Golden, the listener and the scan line may be accidentally short-circuited due to the mechanical process on the process. Since the short-circuited bit will present a line defect on the display surface, the existing optical inspection tool has a low detection rate for the display panel, and the display panel must be scrapped. Therefore, the following embodiment proposes a kind of rotating component array board, so that the inspection worker can easily determine the exact position of the short circuit between the common line and the scanning line, so as to facilitate the repair of 201131267 /vuuy u;165 33693twf.doc/n, In turn, the yield of the active device array substrate is improved, and the cost caused by avoiding scrap is greatly increased. 1A is a top plan view of an active device array substrate according to an embodiment of the present invention, FIG. 1B is a top view of the pixel 12 of FIG. 1A, and FIG. 1C is taken along 1-1' and ii_;q of FIG. 1B. , a schematic view of the section. Referring to FIG. 1A and FIG. 1B, the active device array substrate 1 of the present embodiment includes a base reverse 102, a plurality of scan lines 110, a plurality of data lines 112, a plurality of pixels 12 〇, and a plurality of common lines M0. In the present embodiment, the substrate 1〇2 has a display area 104 and a non-display area adjacent to the display area 1〇4. The strip scan line 110 and the plurality of data lines m are disposed on the substrate 1〇2.夕画 f 120 P car array is arranged in the display just = bracket _ sub painting (four), each sub-picture is drinking 舆 corresponding = 'Wa and the corresponding scan line 110 electrical line 112 are arranged in the same line respectively = according to each barren =u. The direction of extension of the 122 electric J-belly line 112 arranged in the same column is, for example, connected and extended. In the present embodiment, a book 122, which is a red sub-pixel, for example, includes three sub-small elements, such as 曰~|, 彔色昼素, and blue sub- Take it away. Just say, this example is Ν=3 Α 已 has been thousands! Prime, also included as a child! The number of 22 is practical. However, the present invention is not directed to the halogen. In the embodiment, N may be other from the iron. In other words, the other pixels 122 include a switching element 124 and the sub-pixels are electrically connected to the corresponding data line 112 and the pin: electrode 134, the switching element 124 and the corresponding scanning line 110. Switch 201131267 i υ i 65 33693twf.doc/n Element 124 is, for example, a thin film transistor 'which includes a gate 126, a channel layer 128, a source 130, and a gate 132. The halogen electrode 134 is electrically connected to the drain 132 of the switching element 124 via the contact window 109 in the insulating layer 1〇8. The common line 140 is disposed on the substrate 1〇2, the common line 14〇 is interleaved with the scan line 110 and electrically insulated from the scan line 110, and the common line 14〇 is separated from each other in the display area 104, and the common line 140 is only in the non-display area. 1〇6 are connected to each other, and each common line 140 is respectively distributed under one of the rows of pixels 12〇. The 'common line 140' includes a plurality of common line sets 142 and a plurality of connecting lines 144. The common line group 142 is disposed on the substrate 1〇2, and each common line group 142 corresponds to one pixel 120, wherein each common line group and the adjacent common line group 142 are electrically connected only by one connection line 144/ Μ Less than Ν. In the present embodiment, the common line group 142 is, for example, corresponding to the pixel 120 and located in the display area 1〇4 and the common line group μ in the same row is connected to each other only by the connecting line 144 in the display area 104. The common line groups 142 that are not located are separated from each other in the display area 104 and are connected to each other only by the guide wire 158 in the display area 106. The common line segment ^ includes, for example, a first strip pattern 142a and a plurality of f strips. The extending direction of the first strip-like pattern is substantially parallel to the extending direction of =11〇, the second strip pattern is connected to the first strip pattern $, and the extending direction of the second strip pattern 142b is substantially single" The direction in which a line 144 extends. In the present embodiment, the connection line U4 is, for example, connected to the common common line group 142, and the connection line 144 is offset from the corresponding scanning line and electrically insulated from each other by the insulating layer 108. The parent common line group 142 shown in FIG. ία is, for example, a common line group corresponding to two adjacent ones in the same line including three sub-primary elements 12′′, two, pixels 201131267 ^ v 165 33693twf.doc/n 120′. 142 is, for example, connected by a connection line 144, in other words, this embodiment is an example of N=3 and M==l. However, in another embodiment, when N=3, the 熥 may also be 2, that is, the two connection lines 144 are used to connect the two adjacent common line groups 142 in the same row. In the embodiment, one of the connection lines 144 and the common line group 142 are formed by different film layers. For example, the common group 142 and the scan line no are, for example, made of the same metal layer, such as a metal or an alloy, such as a network, a germanium, a metal, or the like. The M4 and the halogen electrode 134 are formed, for example, of the same material layer, and the material thereof is, for example, indium tin oxide, indium zinc oxide or other metal oxide. When the other is performed, the common line group 142 and the scanning line UG are also formed by the same metal layer. In addition, as shown in FIG. 1C, the active device array substrate 1 (8) of the present embodiment further includes a gate insulating layer 107 and an insulating layer 1〇8, and the gate insulating layer 1〇7 covers the scan line 110 and the common line group 142, and the insulating layer 108 covers Data line 112 and connection line 144. Therefore, the common treatment group 142 and the connection line 144 are different film layers by the insulating layer 108. Furthermore, as shown in FIG. 5, in the non-display, in the field 104, the odd-numbered scan lines 11〇 and the even-numbered scan lines are respectively connected by the wires 152a and 152b to the wires (10), (10), and the plurality of data lines. The ends of the Π2 correspond to the connected sub-stimuli 22, and the connecting wires 156a, 156b, 156〇' and the other ends of the plurality of data lines 112 are connected to the wires m' and the plurality of common lines 14〇 are respectively connected to A guide, (9)' connects the common line groups 142 located in different rows in the non-display area 1〇6. It should be noted that the wires shown in Fig. 1A].52a, side, 201131267 Αυυν i υ 165 33693twf.doc/n wires 154a, 154b, wires 156a, 156b, 15& are arranged and configured only as By way of example, any person with the usual knowledge may be based on the actual receivable shoulder line 'the invention is not related to it. ^«不导导 Specifically, in the embodiment shown in Fig. 1A, the pass group 142 corresponds to the alizarin 12 including the three sub-halogens 122.
但如同前文所述’本發明未限織素m所包括之j， 122數目。.因此’如圖2Α與圖2Β所示 ^ 基板⑽a中，-個晝素12Q也可以僅包括— = 122’也就疋各共通線14〇分別分佈於其中一行子畫素 下方° # S之’在共通線14G中，—個共通線組142 上對應於-個子晝素122，其中位於同一行且相鄰共= 組H2猎由-個連接線144連接，而位於不同行的共通 f 僅在非顯不區域1〇6内藉由導線彼此連接。特別注 意的是’軸在上述的實施财都是以梳形的共通線組 142為例，但任何所屬技術領域中具有通常知識者可以理 解共通線組142與連麟H4也可以具有其他構形，本發 明未對其加以限制。 x 在上述的實施例中，主動元件陣列基板100、100a包 括夕個線組142 ’其中位於同―行且相鄰的兩共通線 組M2僅藉由連接線m連接，錄料同行的共通線組 142僅在非顯示區域1〇6内彼此連接。如此一來，當共通 線^ 142與掃描線110發生短路時，因為共通線組142係 以刀、、且的方式设置，其不在顯示區域104内彼此在列(row) 201131267 AU0910165 33693twf.doc/n 方向連接，或是不在顯示區域1〇4内同時以列(r〇w)方向和 行(column)方向連接，故在顯示晝面上能清楚觀察到縱向 線瑕疵(line defect)與/或橫向線瑕疵，而縱向線瑕疵與橫向 線瑕疵父叉處即為短路發生處。換言之，本實施例之共通 線組142的設計有助於光學檢測工具檢測出發生短路的確 切位置，以利後續修復的進行。如此一來，能大幅提升主 動元件陣列基板的良率並避免因報廢主動元件陣列基板所 造成的浪費。 良τ、上所述，本發明藉由在主動元件陣列基板中設計共 φ 通線組及連接共通線組的連接線，使位於同一行且相鄰的 兩共通線組僅藉由連接線連接，且位於不同行的共通線組 僅在非顯示區域内彼此連接。如此一來，即使由同一金屬 層所形成的共通線組與掃描線因為製程上的瑕疵而意外發 生短路時，由於顯示晝面上會呈現出縱向線瑕疵與橫向線 瑕疵，而縱向線瑕疵與橫向線瑕疵交叉處即為短路發生 處，因此短路的確切位置可以輕易地被檢測出，以利後續 修復的進行。承上述，本發明能大幅提升主動元件陣列基 鲁 板的良率並避免因報廢主動元件陣列基板所造成的浪費。 此外，實務上，在主動元件陣列基板的製程中，共用 線組與掃描線仍可由同一金屬層所形成，因此無需增加額 外的步驟，而不會造成製造成本的大幅提升。再者，本發 =能大幅提升現有的檢測工具與檢測方法的檢出率，而無 品頜外添購檢測工具或使用新的檢測方法，故能大幅提升 主動元件陣列基板的檢測效率、良率並避免因報廢主動元 10 201131267 Auuyiui65 33693twf.doc/n 件陣列基板所造成的成本增加。 雖然本發明已以實施例揭露如上 =明’任何所屬技術領域中具有通常知識;非 本發明之精神和範圍内，當可作些許之 發明之保護範圍當視後附之申請專利範圍所界為:本 【圖式簡單說明】 圖=是根據本發明一實施例之主動元件陣列基板的 上視不意圖。 圖是圖1A之晝素的上視示意圖。 圖1C是沿圖iB2I4，及π_π，的剖面示意圖。 的上據本發明另一實施例之主動元件陣列基板 圖2Β是圖2Α之晝素的上視示意圖。 【主要元件符號說明】 100、100a :主動元件陣列基板 1〇2 :基板 104 :顯示區域 106 :非顯示區域 107 :閘絕緣層 108 :絕緣層 109 :接觸窗 110 :掃描線 201131267 165 33693twf.doc/n 112 :資料線 120 :晝素 122 :子晝素 124 :開關元件 126 :閘極 128 :通道層 130 :源極 132 :汲極 134 :晝素電極 140 :共通線 142 :共通線組 142a、142b :條狀圖案 144 :連接線 152a、152b、154a、154b、156a、156b、156c、157、 158 :導線However, as described above, the present invention does not limit the number of j, 122 included in the woven m. Therefore, as shown in Fig. 2Α and Fig. 2Β, in the substrate (10)a, the individual halogen 12Q may also include only -= 122', and the common lines 14〇 are respectively distributed under one of the sub-pixels. 'In the common line 14G, the common line group 142 corresponds to - a sub-cell 122, which is located in the same row and adjacent to the group = H2 is connected by a connecting line 144, and the common f in different rows is only The wires are connected to each other in the non-display area 1〇6. It is to be noted that the 'axis in the above implementation is a comb-shaped common line group 142 as an example, but any one of ordinary skill in the art can understand that the common line group 142 and the Lianlin H4 can have other configurations. The invention is not limited thereto. In the above embodiment, the active device array substrate 100, 100a includes the same line group 142', wherein the two common line groups M2 located in the same row and adjacent are connected by only the connecting line m, and the common line of the recording peers The groups 142 are connected to each other only in the non-display area 1〇6. In this way, when the common line 142 and the scan line 110 are short-circuited, since the common line group 142 is disposed in the form of a knife, and is not in the display area 104, they are in a row (row) 201131267 AU0910165 33693twf.doc/ The n-direction is connected, or is not connected in the column (r〇w) direction and the column direction in the display area 1〇4, so the line defect and/or the line defect can be clearly observed on the display surface. The transverse line 瑕疵, and the longitudinal line 瑕疵 and the transverse line 瑕疵 the parent fork is the occurrence of a short circuit. In other words, the design of the common line set 142 of the present embodiment helps the optical detecting tool detect the exact position at which the short circuit occurs to facilitate the subsequent repair. As a result, the yield of the active device array substrate can be greatly improved and the waste caused by the waste active device array substrate can be avoided. As described above, the present invention designs the common φ line group and the connection line connecting the common line groups in the active device array substrate, so that the two common line groups located in the same row and connected by only the connection line are connected. And the common line groups located in different rows are connected to each other only in the non-display area. In this way, even if the common line group and the scan line formed by the same metal layer are accidentally short-circuited due to flaws in the process, the longitudinal line 瑕疵 and the horizontal line 瑕疵 are displayed on the display 瑕疵 surface, and the vertical line 瑕疵The intersection of the transverse turns is the occurrence of the short circuit, so the exact position of the short circuit can be easily detected to facilitate the subsequent repair. In view of the above, the present invention can greatly improve the yield of the active device array substrate and avoid the waste caused by the scrapped active device array substrate. In addition, in practice, in the process of the active device array substrate, the common line group and the scan line can still be formed by the same metal layer, so that no additional steps are required, and the manufacturing cost is not greatly increased. Furthermore, this issue can greatly improve the detection rate of existing detection tools and detection methods, and the detection tool of the product can be greatly improved, and the detection efficiency of the active device array substrate can be greatly improved. Rate and avoid the cost increase caused by the scrapping of the active substrate 10 201131267 Auuyiui65 33693twf.doc / n pieces of array substrate. The present invention has been disclosed in the above-described embodiments by way of example only, and the scope of the invention is to be construed as limited by the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a top view of an active device array substrate according to an embodiment of the present invention. The figure is a top view of the element of Figure 1A. 1C is a schematic cross-sectional view taken along line iB2I4 and π_π. The active device array substrate according to another embodiment of the present invention is a top view of the pixel of Fig. 2. [Description of main component symbols] 100, 100a: Active device array substrate 1〇2: Substrate 104: Display region 106: Non-display region 107: Gate insulating layer 108: Insulating layer 109: Contact window 110: Scanning line 201131267 165 33693twf.doc /n 112 : data line 120 : halogen 122 : sub-element 124 : switching element 126 : gate 128 : channel layer 130 : source 132 : drain 134 : halogen electrode 140 : common line 142 : common line group 142a , 142b: strip pattern 144: connecting lines 152a, 152b, 154a, 154b, 156a, 156b, 156c, 157, 158: wires
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