201130732H / —......t.doc/n 六、發明說明： 【發明所屬之技術領域】 本發明是有_—種奈米結構的製造方法及奈米結 構於三維結構之·’且特別是有關於-種結晶性佳之超 長奈米結_製造方法及此超長奈米結構於三維 【先前技術】 時代逐步進1尺由微米 ==、機械及化學等許多性質便；為二二 .=:性獲得不同材料應 料㊉心i/ 步猎由控制㈣的大小盘 ，狀而巧會操控同—種材料的基本特性，如炫點、声員 的南性能/^或技術將有機會在奈米科技的領域中實=成 材料m太奈米材料的種類相當多，包含了金屬夺米 η—心米材料、結構奈米陶甍、奈米材： 專’而其結構可分為零維、一維、二維、^4 構的名詞包括尺寸為奈米等級的所有鲁如 (_叫、奈米管(nanotube)、奈米柱(職⑽d)、二^ (nanocone)及奈米球(_〇响批）等。 不、木錐 目月'J ’已知傳統成長奈米線的方式’容易由 體流量控制不當、微波或電漿功率輸出過大、成長時^ )c/n 201130732 = 物输不佳。除此之 的成長益法持嘖進：面聚：二：結晶原子團’使得奈米線 度終達二:::而造成長時間成長的奈米線，其長 β 疋 :行:;=續增長丄==性 現仃W私上需克服的重大挑戰。 竹注 【發明内容】 形二二i發:r—種奈米結構的製造方法，可 不未…構亚使其結晶性能獲得良好的控制。 本么明另提供一種三維結構及苴萝甘目士“ 用多段式成長之超長奈米結構W方法，其具有利 驟^發明提出-種奈米結構的製造方法，其包括下列步 進行i提供基板；（b)於基板上軸雜金屬層；⑷ =丁第1段成長，以於催化金屬層表面織奈米結.構； 長奈米、纟補處理；以及（e)進行帛二階段成長 ，以增 =、本發明—實施例所述之奈米結構的製造方法，在 丁乂弥（e)之後，更包括重複步驟（d)與步驟（趸 ，一次。 - 步驟，I明—貫施例所述之奈米結構的製造方法，在進行 y^(d)時，包括通入還原氣體或氧化性氣體等可修補缺 201130732" ^ w w ^< t.Q〇o/n 陷、還原或氧化非結晶原子團之氣體，其中還原氣體例如 疋氫氣(HO或氨氣(nh3) ’氧化性氣體如氧氣(〇2)或氣氣 (Cl2)。 依照本發明一實施例所述之奈米結構的製造方法，利 用化學氣相沈積法分別進行步驟（c)與步驟（e)。上述 之化學氣相沈積法包括熱化學氣相沈積(Thermal Chemical Vapor Deposition，T-CVD)、微波電漿化學氣相沈積 (Microwave Plasma-Chemical Vapor Deposition ， MP-CVD)、等離子增強化學氣相沈積（piasma Enhance Chemical Vapor Deposition，PECVD)、電子迴旋共振式化 學氣相沈積(Electron Cyclotron Resonance-Chemical Vapor Deposition，ECR-CVD)、電感式耦合電漿化學氣相沈積 (Inductively Coupled Plasma-Chemical Vapor Deposition } ICP-CVD)、低壓化學氣相沈積（Low Pressure Chemical Vapor Deposition ’ LPCVD)、常壓化學氣相沈積 (Atmospheric Pressure Chemical Vapor Deposition5 APCVD) 或金屬有機化學氣相沈積(Mqtal Organic Chemical V^por Deposition，MOCVD)。 依照本發明一實施例所述之奈米結構的製造方法，當 奈米結構為奈米碳管(carbon nanotube，CNT)時，所通入的 反應氣體為選自於由甲烷(CH4)、乙烷(C2H6)、丙烷(C3H8)、 乙烯(C2H4)、乙炔(C2H2)、甲醇(CH3OH)及乙醇(C2H5OH) 所組成之群組。 依照本發明一實施例所述之奈米結構的製造方法，當 201130732 ?c/n 奈来結構為矽奈米線時，所通入的反應氣體為選自於由矽 院(Si%)、二氯矽烷(siH2Cl2)及三氯矽烷(SiHCl3)所組成之 群組。 依照本發明一實施例所述之奈米結構的製造方法，當 奈米結構為鍺奈米線時，所通入的反應氣體為選自於由四 氣化鍺（GeCl4)及笨基三氯化錯(phenyl-GeCl3)所組成之群 組。 依照本發明一實施例所述之奈米結構的製造方法，當 奈米結構為氮化鎵奈米線時，所通入的反應氣體為含有氮 源，，源反應之氣體’或者是利用氨氣(Nib)與鎵金屬（Ga) 或鎵氧化物的反應而成長氮化鎵奈米線。 、，依照本發明一實施例所述之奈米結構的製造方法，當 示米、構為氧化鋅奈米線時，所通入的反應氣體為含有鋅 源=氣體與氧氣(〇2)反應而成長氧化鋅奈米線，或者是利 用=乳與鋅金屬（Zn)的反應而成長氧化鋅奈米線。此外， 鋅不米線的製造方式尚有以鋅或氧化鋅粉末於石墨粉末， 在爐管中進行化學氣相沈積。 一依,¾本發明—實施例所述之奈米結構的製造方法，在 、一 ^驟（b)日寸，包括於基板上形成一層催化金屬材料， 催化金屬材料形成尺寸為奈米等級的顆粒。促使催 =S材料形成尺寸為奈米等級的顆粒例如是進行加熱、 :、（anneal)、彳政波、電装或透過還原氣體的還原作用。上 5催化金屬材料為選自於由鐵㈣、钻(Co)、錄(Ni)、金 钔(In)鈀(pd)及其合金所組成之群組。上述形成催 201130732 -一 w。v”’f.d〇c/n 化金屬材料的方法為蒸鐘、賤錢、化學氣相沈積法或溶液 塗佈法。 、依照本發明一實施例所述之奈米結構的製造方法，在 進行步驟（b)之鈿，更包括於基板與催化金屬層之間形成 緩衝層（buffer layer)。上述之缓衝層的材料包括鈇(Ti)、鋁 (A1)、纽(Ta)、銘(Pt)、|目(Mo)、氮化鈦(τιν)或氮化組(丁祝）。 依照本發明一實施例所述之奈米結構的製造方法，增 長奈米結構至長度介於80 μιη至loooo μπι之間。 依Ρ、?、本發明一貫施例所述之奈米結構的製造方法，上 述之奈米結構為奈米碳管(carbon nanotube，CNT；)、破 奈米線、鍺(Ge)奈米線、氮化鎵(GaN)奈米線、氧化鋅(Zn〇) 奈米線、辞奈米線，或者是三族、四族、五族的純元素與 化合物之奈米線。 依照本發明一實施例所述之奈米結構的製造方法，上 述之基板的材質包括半導體、玻璃、氧化鋁、金屬或合金。 本發明另提出一種三維結構，其包括第一基板以及第 φ 一基板。第一基板具有至少一個第一孔洞，第一孔洞中填 充有第一奈米結構Λ第.二基板具有至少一個第二孔洞，第 一孔洞中填充有第二奈米結構。第一基板與第二基板為堆 宜配置且經由第一奈米結構與第二奈米結構而相連接。 依照本發明一實施例所述之三維結構，上述之第一奈 米結構直接連接第二奈米結構。 依照本發明一實施例所述之三維結構，上述之第一奈 米結構經由連接部連接第二奈米結構。 201130732』 依照本發明一實施例所述之三維結構，上述之第一奈 米結構與第二奈米結構分別為奈米碳管、矽奈米線、鍺奈 米線、氮化鎵奈米線、氧化鋅奈米線、鋅奈米線，或者是 三族、四族、五族的純元素與化合物之奈米線。 依照本發明一實施例所述之三維結構，上述之第一奈 米結構與第二奈米結構的長度為介於80 /2 m至10000 y m之間。 本發明又提出一種三維結構的製造方法，其包括下列 步驟。於第一導電部上提供至少一基板，基板上已形成有 半導體元件與内連線。對應第一導電部，於基板中形成至 少一個孔洞。利用上述之奈米結構的成長方法，於孔洞中 形成奈米結構。於奈米結構上形成第二導電部。 依照本發明一實施例所述之三維結構的製造方法，上 述之奈米結構為奈米碳管、矽奈米線、鍺奈米線、氮化鎵 奈米線、氧化鋅奈米線、鋅奈米線，或者是三族、四族、 五族的純元素與化合物之奈米線。 依照本發明一實施例所述之三維結構的製造方法，上 述之奈米結構的長度為介於80 μπι至10000 μιη之間。 基於上述，本發明之奈米結構的製造方法藉由催化金 屬層的催化作用，以多段式成長形成結晶性佳的超長奈米 結構。利用修補處理促使已飽和之催化金屬層還原或氧化 而重新具有活性，並清除表面結構的缺陷，因此可有助於 進行多階段式成長超長奈米結構。藉由本發明之方法可以 使成長的奈米結構結晶性佳、長度可持續增長，且成長之 201130732 --------t.doc/n 奈米結構的場發射、光電與熱傳導特性等均可獲得相告 度的提升。 ° ° 再者，本發明之三維結構及其製造方法應用上述成長 方法所成長之奈米結構，因而在整合成三維結構時亦能多^ 提供高導電、導熱、連結與機械強度之特性。 為讓本發明之上述特徵和優點能更明顯易懂，下文特 舉實施例’並配合所附圖式作詳細說明如下。 • … 【貫施方式】 以下描述請參照隨附圖式來，以便更為充分地描瞭解 本發明，其中隨附圖式展示本發明之實施例。然而，本發 明可以許多不同形式來體現，且不應將其解釋為限於下文 所述之實施例。實際上，提供這些實施例只是為了使本發 明的揭i备更為詳盡、完整，且將本發明之範_完全傳達至 所屬技術領域中具有通常知識者。而在圖式中，為明確起 見可能將各層以及區域的尺寸以及相對尺寸作誇張的描 • 繪。： 本發明主要是提出一種利用多段式成長之超長奈米 結構的製造方式與其應用，且製造出的超長奈米結構的材 料結晶性亦優於利用習知之方法所製得的奈米結構。利用 本發明之方法所成長之奈米結構例如是奈米碳管（c arb 〇 η nanotube ^CNT)、梦(Si)奈米線、鍺(Ge)奈米線、氮化鎵(⑽) 奈米線、氧化鋅(ZnO)奈米線、辞奈米線，或者是其他三族、 四族、五族的純元素與化合物之奈米線，但本發明並不以 201130732 , OV/1 VT 1 . U〇C/n 此為限。 接下來進一步以流程圖及剖面圖的方式說明本發明 之實施例。圖1是依照本發明之一實施例之奈米結構^製 造方法之步驟流程圖。圖2A至圖2D是依照本發明夕一實 施例之奈米結構的製造方法之剖面示意圖。 本發明之奈米結構的製造方法包括以下步驟。請同時 參照圖1與圖2A，首先，提供基板2〇〇 (步驟。基板 200的材質可為半導體、玻璃、氧化紹、金屬或合金。此 外’基板200可以是半導體晶圓、金屬導線或合金導線， 其中半導體晶圓例如是石夕晶圓或三五族半導體晶圓。而 且，當基板200為石夕基板時，也可以先進行熱氧化製程或 沈積製程’以於基板200的表面上形成二氧化石夕。基板200 的外形可以是塊狀、板狀、條狀、柱狀或任意不規則之形 狀0 接著’於基板200上形成催化金屬層204 (步驟 S110)。在一實施例中，在基板2⑻上形成催化金屬層2〇4 之前’還可以選擇性地清洗基板2〇〇表面以及在基板200 表面上形成緩衝層（buffer layer)202。缓衝層202可有助於 增加基板200與催化金屬層204之間的附著力，並可降低 後續預形成之奈米結構與基板200之間的接觸電阻。緩衝 層202的材料例如是鈦(丁丨）、铭(a])、组(Ta) '翻(ρ〖）、銦 (Mo)、氮化鈦(TiN)或氮化!s(TaN)等。 催化金屬層204例如是以顆粒的形式而形成於基板 200上。詳言之，催化金屬層204的形成方法例如是先在 10 r.doc/n 201130732 基板2〇G上喊-層催化金屬㈣(未♦示） 行加熱、退火(繼㈣、微波、電装、透==進 作用或利用任何其他物理作用、化學 f、虱肢的遇原 化金屬材料的表面張力，而促使催化金；改變催 奈米等級的顆粒。催化金屬材料的形成可^ = m 用或化學反應而獲得。在-實施例中物理作 是利用蒸鍍、賴等固態沈積方式而形成於二：:如 者是利用化㈣減積法化氣體源中取得而 板200上？一實施例中，催化 液塗佈法，错由自組裝(Self_assembly)等方式從溶液中 催化金屬。催化金屬層2G4的材料可以是鐵㈣、銘 鎳(Ni)、金(An)、銦(In)、鈀(Pd)或其相關之合金。 特別說明的是，緩衝層202與催化金屬層2〇4例如是 構成雙層薄膜金屬層，其中—部分的材質是可成長奈米結 構之催化金屬f 204,另-部分的材質是不可成長奈米結 構之緩衝層2〇2。雙層薄膜金屬層主要可利用調變不可成 長奈米結構之緩衝層202的金屬比例來控制奈米結構的密 度，因此除了可以更進一步提升附著力外，還可以降低接 觸電1並避免不必要的合金相（c〇mp〇und phase)。 清繼續參照圖1與圖2B，進行第一階段成長，以於 催化金屬層204表面上形成奈米結構2〇6a (步驟 S120)。於 催化金屬層204表面合成奈米結構206a的方法例如是利用 化本氣相此積法(Chemical Vapor Deposition，CVD)，以導 入反應氣體進行分解而成長奈米結構2〇6a。化學氣相沈積 201130732 32886twf.doc/n 法可以是熱化學氣相沈積（Thermal Chemical Vapor Deposition，T-CVD)、微波電漿化學氣相沈積(Microwave P]asma-Chemical Vapor Deposition，MP-CVD)、等離子增 強化學氣相沈積（Plasma Enhance Chemical Vapor Deposition，PECVD)、電子迴旋共振式化學氣相沈積 (Electron Cyclotron Resonance-Chemical Vapor Deposition ’ ECR-CVD)、電感式耦合電聚化學氣相沈積 (Inductively Coupled Plasma-Chemical Vapor Deposition， ICP-CVD)、低壓化學裁i相沈積（Low Pressure Chemical Vapor Deposition，LPCVD)、常壓化學氣相沈積 (Atmospheric Pressure Chemical Vapor Deposition > APCVD) 或金屬有機化學氣相沈積(Metal Organic Chemical Vapor Deposition，MOCVD)等。 承上述，進行化學氣相沈積法的製程溫度例如是介於 約200°C至90CTC之間，以於催化金屬層204表面合成奈米 結構206a。在進行化學氣相沈積法時，除了反應氣體外， 可通入氫氣0¾)、氨氣(NF!3)或其他合適之氣體作為還原氣 體。另外，在通入還原氣體時，還可以加入氮氣(N2)、氬 氣(Ar)或氦氣(He)等惰性氣體以作為稀釋氣體及載氣之 用。 在此說明的是，由於本發明所形成之奈米結構可以是 奈米奴官，或者是矽、鍺、氮化鎵、氧化辞、鋅或其他三 族、四族、五族的純元素與化合物之奈米線，因此在步驟 S120中進行化學氣相沈積法時所通入的反應氣體源也須 20113072¾“ 隨之調整。在一實施例中，成長奈米碳管時所通入的反應 氣體可以是甲烷(ch4)、乙烷(c2h6)、丙烷(c3h8)、乙烯 (c2h4)、乙炔(c2h2)、曱醇(ch3oh)、乙醇(c2h5oh)或任何201130732H / -......t.doc/n VI. Description of the Invention: [Technical Field of the Invention] The present invention has a method for manufacturing a nanostructure and a nanostructure in a three-dimensional structure. In particular, there are many kinds of ultra-long nano-junctions that are excellent in crystallinity. The manufacturing method and the ultra-long nanostructure are gradually advanced into one-dimensional by micron==, mechanical and chemical, etc. in the three-dimensional [prior art] era; II.=: Sexually obtained different materials should be expected to be ten hearts i/ step hunting by the control (four) of the size of the disk, the shape and skill will control the same characteristics of the same material, such as dazzling, voice of the South performance / ^ or technology will There are many kinds of materials in the field of nanotechnology. There are quite a few types of materials, including metal rice η-heart rice materials, structural nano-ceramics, and nano-materials: The nouns that are divided into zero-dimensional, one-dimensional, two-dimensional, and ^4 consist of all Lu Ru (n., nanotube, nanocolumn (10)d), and two (nanocone). And the nano ball (_〇响批), etc. No, the wood cone eye month 'J 'known to the traditional way of growing the nanowire' is easy to flow by body flow Improper amount control, microwave or plasma power output is too large, when growing ^ ^ c / n 201130732 = poor material input. In addition to this, the growth and benefits are carried forward: face-to-face: two: crystalline atomic group' makes the nanometer line up to two::: and causes the long-term growth of the nanowire, its length β 疋: line:; = continued growth丄== Sexuality is a major challenge that needs to be overcome privately. Bamboo Note [Summary of the Invention] The shape of the second generation: the production method of the r-type nanostructure can be controlled without good conditions. The present invention further provides a three-dimensional structure and a dill-Ganshi "multi-stage growth of the ultra-long nanostructure W method, which has the advantages of the invention, and the production method of the nanostructure, which includes the following steps: Providing a substrate; (b) a metal-doped layer on the substrate; (4) = a first stage of growth of the butyl layer, a surface of the catalytic metal layer, a nano-knot structure; a long nanometer, a ruthenium treatment; and (e) a second Stage growth, to increase =, the method of manufacturing the nanostructure of the present invention - the embodiment, after Ding Yi (e), further comprises repeating steps (d) and steps (趸, once. - Step, I Ming - The method for producing a nanostructure according to the embodiment, when y^(d) is carried out, includes a reducing gas such as a reducing gas or an oxidizing gas, and a repairable defect, 201130732 " ^ ww ^< tQ〇o/n A gas for reducing or oxidizing a non-crystalline atomic group, wherein a reducing gas such as helium hydrogen (HO or ammonia (nh3)' oxidizing gas such as oxygen (〇2) or gas (Cl2). According to an embodiment of the present invention Method for manufacturing rice structure, step (c) and step respectively by chemical vapor deposition (e) The above chemical vapor deposition methods include Thermal Chemical Vapor Deposition (T-CVD), Microwave Plasma-Chemical Vapor Deposition (MP-CVD), plasma enhancement. Piasma Enhance Chemical Vapor Deposition (PECVD), Electron Cyclotron Resonance-Chemical Vapor Deposition (ECR-CVD), Inductively Coupled Plasma-Chemical Vapor Deposition (ECR-CVD) Chemical Vapor Deposition } ICP-CVD), Low Pressure Chemical Vapor Deposition 'LPCVD, Atmospheric Pressure Chemical Vapor Deposition 5 APCVD or Metal Organic Chemical V (Mqtal Organic Chemical V) A method for producing a nanostructure according to an embodiment of the present invention, when the nanostructure is a carbon nanotube (CNT), the reaction gas introduced is selected from the group consisting of From methane (CH4), ethane (C2H6), propane (C3H8), ethylene (C2H4), acetylene (C2H2), methanol (C A group consisting of H3OH) and ethanol (C2H5OH). According to the method for manufacturing a nanostructure according to an embodiment of the present invention, when the 201130732 ?c/n structure is a nanowire, the reaction gas introduced is selected from a brothel (Si%). A group consisting of dichlorodecane (siH2Cl2) and trichlorosilane (SiHCl3). According to the method for fabricating a nanostructure according to an embodiment of the invention, when the nanostructure is a nanowire, the reaction gas introduced is selected from the group consisting of tetragas hydride (GeCl4) and stupid trichloride. A group consisting of phenyl-GeCl3. According to the method for fabricating a nanostructure according to an embodiment of the invention, when the nanostructure is a gallium nitride nanowire, the reactive gas introduced is a nitrogen source, and the source reacts gas or utilizes ammonia. The gas (Nib) reacts with gallium metal (Ga) or gallium oxide to grow a gallium nitride nanowire. According to the method for manufacturing a nanostructure according to an embodiment of the present invention, when the rice is configured as a zinc oxide nanowire, the reaction gas introduced is a reaction containing a zinc source=gas and oxygen (〇2). The zinc oxide nanowire is grown, or the zinc oxide nanowire is grown by the reaction of = milk with zinc metal (Zn). In addition, zinc non-rice wire is produced by chemical vapor deposition in a furnace tube using zinc or zinc oxide powder in graphite powder. The invention relates to a method for fabricating a nanostructure according to the invention, which comprises forming a layer of catalytic metal material on a substrate, and forming a catalytic metal material having a size of nanometer in a step (b). Particles. The granules which cause the stimulating material to form a nanometer grade are, for example, heated, :anneal, 彳,, The upper 5 catalytic metal material is selected from the group consisting of iron (tetra), diamond (Co), nickel (Ni), gold (In) palladium (pd) and alloys thereof. The above formation reminds 201130732 - one w. The method for manufacturing a metal structure according to an embodiment of the present invention is carried out by a method of steaming, saving, chemical vapor deposition or solution coating. After the step (b), a buffer layer is further formed between the substrate and the catalytic metal layer. The material of the buffer layer includes bismuth (Ti), aluminum (A1), neon (Ta), and Pt), | mesh (Mo), titanium nitride (τιν) or nitrided group (Ding Zhu). According to an embodiment of the invention, the nanostructure is grown to a length of 80 μm. Between loooo μπι. According to the method for producing a nanostructure according to the consistent embodiment of the present invention, the above nanostructure is a carbon nanotube (CNT), a nanowire, and a ruthenium. (Ge) nanowire, gallium nitride (GaN) nanowire, zinc oxide (Zn〇) nanowire, nanowire, or pure element of compound of tri, tetra, and clan According to a method of manufacturing a nanostructure according to an embodiment of the invention, the material of the substrate comprises semiconductor, glass, aluminum oxide, metal or The present invention further provides a three-dimensional structure comprising a first substrate and a φ-th substrate. The first substrate has at least one first hole, the first hole is filled with a first nano-structure, and the second substrate has at least one a second hole, the first hole is filled with a second nanostructure. The first substrate and the second substrate are stacked and connected to the second nanostructure via the first nanostructure. According to an embodiment of the invention In the three-dimensional structure, the first nanostructure is directly connected to the second nanostructure. According to the three-dimensional structure according to an embodiment of the invention, the first nanostructure is connected to the second nanostructure via the connecting portion. According to an embodiment of the present invention, the first nanostructure and the second nanostructure are respectively a carbon nanotube, a nanowire, a nanowire, or a gallium nitride nanowire. a zinc oxide nanowire, a zinc nanowire, or a nanowire of a tri-, tetra-, or 5-family pure element and a compound. The three-dimensional structure according to an embodiment of the present invention, the first nanometer described above Structure and The length of the second nanostructure is between 80 /2 m and 10000 ym. The invention further provides a method for manufacturing a three-dimensional structure, comprising the steps of: providing at least one substrate on the first conductive portion, the substrate has been Forming a semiconductor element and an interconnecting line. Corresponding to the first conductive portion, at least one hole is formed in the substrate. The nanostructure is formed in the hole by the growth method of the nanostructure described above. The second conductive is formed on the nanostructure. According to a method of manufacturing a three-dimensional structure according to an embodiment of the present invention, the nano structure is a carbon nanotube, a nanowire, a nanowire, a gallium nitride nanowire, or a zinc oxide nanowire. , zinc nanowire, or the pure element of the tri-, tetra-, and c-group and the nanowire of the compound. According to a method of fabricating a three-dimensional structure according to an embodiment of the invention, the length of the nanostructure is between 80 μm and 10000 μm. Based on the above, the method for producing a nanostructure of the present invention grows in a multistage manner to form a super-long nanostructure having good crystallinity by catalyzing the catalytic action of the metal layer. The repair process is used to promote the reduction or oxidation of the saturated catalytic metal layer to reactivate and remove the defects of the surface structure, thereby facilitating the multi-stage growth of the ultra-long nanostructure. The method of the invention can make the grown nanostructure have good crystallinity, the length can be continuously increased, and the field emission, photoelectricity and heat conduction characteristics of the 201130732-------t.doc/n nanostructure are grown. You can get an increase in the degree of notice. Further, the three-dimensional structure of the present invention and the method of manufacturing the same are applied to the nanostructure grown by the above-described growth method, thereby providing high conductivity, heat conduction, bonding, and mechanical strength characteristics when integrated into a three-dimensional structure. The above described features and advantages of the present invention will become more apparent from the description of the appended claims. The present invention will be described more fully hereinafter with reference to the accompanying drawings in which FIG. However, the invention may be embodied in many different forms and should not be construed as being limited to the embodiments described below. Rather, these embodiments are provided only to provide a more complete and complete description of the invention, and to fully convey the scope of the invention to those of ordinary skill in the art. In the drawings, the dimensions and relative dimensions of the layers and regions may be exaggerated for clarity. The present invention mainly proposes a manufacturing method and application thereof using a multi-stage growth ultra-long nano structure, and the material crystallinity of the manufactured ultra-long nano structure is superior to the nano structure obtained by the conventional method. . The nanostructure grown by the method of the present invention is, for example, a carbon nanotube (c arb 〇n nanotube ^CNT), a dream (Si) nanowire, a germanium (Ge) nanowire, or a gallium nitride ((10)) naphthalene. Rice noodles, zinc oxide (ZnO) nanowires, nanowires, or other tri-, tetra-, and 5-family pure elements and compound nanowires, but the present invention does not use 201130732, OV/1 VT 1. U〇C/n This is the limit. Next, embodiments of the present invention will be further described in the form of a flowchart and a cross-sectional view. BRIEF DESCRIPTION OF THE DRAWINGS Figure 1 is a flow chart showing the steps of a method for fabricating a nanostructure according to an embodiment of the present invention. 2A through 2D are schematic cross-sectional views showing a method of fabricating a nanostructure according to an embodiment of the present invention. The method for producing a nanostructure of the present invention comprises the following steps. Referring to FIG. 1 and FIG. 2A simultaneously, firstly, a substrate 2 is provided (step. The material of the substrate 200 may be semiconductor, glass, oxide, metal or alloy. Further, the substrate 200 may be a semiconductor wafer, a metal wire or an alloy) The wire, wherein the semiconductor wafer is, for example, a Shihua wafer or a three-five semiconductor wafer. Moreover, when the substrate 200 is a Shihua substrate, the thermal oxidation process or the deposition process may be performed first to form on the surface of the substrate 200. The shape of the substrate 200 may be a block shape, a plate shape, a strip shape, a column shape or an arbitrary irregular shape. Then, a catalytic metal layer 204 is formed on the substrate 200 (step S110). In an embodiment Before the formation of the catalytic metal layer 2〇4 on the substrate 2(8), the surface of the substrate 2 can be selectively cleaned and a buffer layer 202 formed on the surface of the substrate 200. The buffer layer 202 can help to increase the substrate. The adhesion between the metal layer 204 and the catalytic metal layer 204 can reduce the contact resistance between the subsequently preformed nanostructure and the substrate 200. The material of the buffer layer 202 is, for example, titanium (Bing), Ming (a), (Ta) 'turning (ρ), indium (Mo), titanium nitride (TiN) or nitriding!s (TaN), etc. The catalytic metal layer 204 is formed on the substrate 200, for example, in the form of particles. For example, the method for forming the catalytic metal layer 204 is first performed on a substrate of 2 r.doc/n 201130732 2〇G, a layer of catalytic metal (4) (not shown), heating, annealing (following (four), microwave, electric equipment, penetration = =Initiation or use of any other physical effects, chemical f, the surface tension of the progenitor metal material of the limb, to promote the catalytic gold; change the particles of the nanometer level. The formation of the catalytic metal material can be used or chemical In the embodiment, the physical solution is formed by a solid-state deposition method such as vapor deposition or leaching, and is obtained by using a chemical (four) subtractive gas source in the plate 200. In an embodiment, Catalytic liquid coating method, the metal is catalyzed from the solution by self-assembly (Self_assembly), etc. The material of the catalytic metal layer 2G4 may be iron (tetra), nickel (An), gold (An), indium (In), palladium. (Pd) or an alloy thereof. Specifically, the buffer layer 202 and the catalytic metal layer 2〇4 are, for example, constituted. a thin film metal layer, wherein the material of the portion is a catalytic metal f 204 of a growthable nanostructure, and the material of the other portion is a buffer layer 2〇2 of a non-growth nanostructure. The double-layer thin metal layer can mainly utilize modulation The metal ratio of the buffer layer 202 of the non-growth nanostructure is used to control the density of the nanostructure, so that in addition to further improving the adhesion, the contact electric power 1 can be reduced and unnecessary alloy phases can be avoided (c〇mp〇und phase With continued reference to FIGS. 1 and 2B, the first stage of growth is performed to form a nanostructure 2〇6a on the surface of the catalytic metal layer 204 (step S120). The method for synthesizing the nanostructure 206a on the surface of the catalytic metal layer 204 is, for example, by using a chemical vapor deposition method (CVD) to decompose the reaction gas to grow the nanostructure 2?6a. Chemical vapor deposition 201130732 32886twf.doc/n method can be thermal chemical vapor deposition (T-CVD), microwave plasma chemical vapor deposition (Microwave P] asma-Chemical Vapor Deposition (MP-CVD) , Plasma Enhanced Chemical Vapor Deposition (PECVD), Electron Cyclotron Resonance-Chemical Vapor Deposition (ECR-CVD), Inductively Coupled Electrochemical Vapor Deposition (Inductively) Coupled Plasma-Chemical Vapor Deposition (ICP-CVD), Low Pressure Chemical Vapor Deposition (LPCVD), Atmospheric Pressure Chemical Vapor Deposition (APCVD) or Metal Organic Chemical Vapor Phase Metal Organic Chemical Vapor Deposition (MOCVD) and the like. In view of the above, the process temperature for performing the chemical vapor deposition method is, for example, between about 200 ° C and 90 CTC to synthesize the nanostructure 206a on the surface of the catalytic metal layer 204. In the chemical vapor deposition process, in addition to the reaction gas, hydrogen gas (3⁄4), ammonia (NF! 3) or other suitable gas may be introduced as the reducing gas. Further, when a reducing gas is introduced, an inert gas such as nitrogen (N2), argon (Ar) or helium (He) may be added as a diluent gas and a carrier gas. It is explained here that the nanostructure formed by the present invention may be a nano slave, or a pure element of yttrium, lanthanum, gallium nitride, oxidized, zinc or other tri, tetra, and clan The nanowire of the compound, therefore, the source of the reactive gas that is introduced during the chemical vapor deposition process in step S120 is also required to be adjusted accordingly. In one embodiment, the reaction is carried out when the carbon nanotube is grown. The gas may be methane (ch4), ethane (c2h6), propane (c3h8), ethylene (c2h4), acetylene (c2h2), decyl alcohol (ch3oh), ethanol (c2h5oh) or any
含有碳源之氣體。在一實施例中，成長矽奈米線時所通入 的反應氣體可以是矽烷(SiHU)、二氯矽烷(SiH2Cl2)、三氯矽 烷(SiHCy或任何含有矽源之氣體。在一實施例中，成長 鍺奈米線時所通入的反應氣體可以是四氯化鍺(GeCl4)、笨 基二氯化錯(phenyl-GeCl；3)或任何含有鍺源之氣體。在一實 施例中’成長氮化鎵奈米線時的反應可以是氨氣(NH3)與鎵 (Ga)金屬或鎵氧化物的反應’或是通入任何含有氮源與鎵 源反應之氣體。在一實施例中，成長氧化鋅奈米線的反應 可以是氧氣(〇2)與鋅(Zn)金屬的反應，或是通入任何含有 鋅源之氣體與氧氣反應而成長奈米線。此外，鋅奈米線的 製造方式尚有以鋅或氧化鋅粉末於石墨粉末，在爐管中進 行化學氣相沈積。 請參照圖1與圖2C，在完成第一階段成長之奈米結 構206a之後，進行修補處理2〇8 (步驟§13〇)。在—實施 中，修補處理208可透過氧化或還原反應來達成。亦=， 在進行步驟S13G時，可以通人還原氣體或氧化性氣體 任何可修補龍、魏化非結晶料團之氣體 修補處理·，其中還原氣體例如是氫氣( : (丽3)，氧化性氣體如氧氣(〇2)或氯氣仙）。 十; 以還原作用為例’透過還原氣體以類似退火： 订修補處理208可峰補奈米、賴成長财巾的缺陷二並 201130732 ; ___________DC/n 可幫助去除非結晶的奈米結構。而且，還原氣體還可促使 已飽和之催化金屬奈米顆粒還原，使尺寸為奈米等級的催 化金屬顆粒重新具有活性而能作用，以進行下一階段的奈 米結構成長。詳細而言，利用還原氣體來進行修補處理208 例如是關閉步驟S120中用以成長奈米結構206a之反應氣 體源，並持續通入還原氣體。在溫度約介於20(TC至900。(： 之間的環境下，藉由通入還原氣體將累積在催化金屬層 204週遭的原子團帶走，或是將過多的反應氣體帶走，並 同時可修補已成長奈米結構206a之缺陷。進行修補處理 208的時間可視飽和的催化金屬層204之還原狀態而定， 於此技術領域具有通常知識者可視製程需求而逕行調整。 然而，不論是從反應氣體源而來或是另外添加的還原 氣體’過氣體可能會造成奈米結構的成長速打 構ϋ:壞。因此’在另-實施例中，還 氣體的氧化作用亦可去除麵晶態的 性 是，還原氣體與氧化性氣體的添加应否?=的 調控有相當的關係；亦即可 /、衣私條件上的 氣化性氣體，或者也可以在此==入還原氣體及 長奈求結構，當視製程需求而調整1中擇—添加皆可成 έ月荃照圖1與圖2D，接著， 增長奈米結構（步驟SH0)。在步驟進&^階段成長， 以成長奈米結構之反應氣體 I，再次通八 式利用化學氣相沈積法合成奈米結驟sm之 再2〇6b。須注意的是 201130732 -—w w w»，，j", doc/π 階段所成長之奈米結構2嶋形成在第 品二成長不米結構2·的上方為例來進行說明，然 —發明對此不作任何限制。也就是說，步驟s⑽中的 弟4段歧只要使奈米結難體長度增長即可，至於 成長之奈米結構的位置當為本衝具有通常知 識者所熟知，故於此不再贅述。 在一實施例中，在完成步驟S140之後，還可以重複 步驟S140這個循環至少-次，以獲得具 佳之奈米結構。補歧覆進行上述 二S13())' #"^長(步驟si4〇)之循環後，可 :于長度、.勺，丨於80㈣至1〇〇〇〇 _之間的超長夺米祛 ==1步驟S13G至步驟S14G循環的重複次數可二 —:屬曰204之活性或是依所需奈米結構之長度而決 ^的^上述實施狀找不輯反紐行成長、修補處 。、、=私，而達到成長結晶性佳的超長奈米結構。因此， 目則成長的奈米結構結晶性差、長度無法持續增 長的問題，進而改善奈米結構之特性。 另外’在上述實施例中，為方便說明，是以在基板2〇〇 的p刀區域形成超長奈米結構為例來進行說缺 3並不祕此。在其他實關巾，本制之奈綠構^ 為整個基板的成長、具有定義圖案的成長或陣列 =勺成，’其中所定義之圖案可以是長方形、正方形、橢 二圓形或任意不規則之圖案，且可以定義單個圖案或 疋疋義陣列的圖案。 201130732 4叫…，1…OC/n 超导B提的是’由於利用本發明所提出之方法可成長 埶7 、、去晶性佳的奈米結構，因此可藉以提高其導電、導 =°^積_械強度等特性，且對於應用在場發射、 j H熱傳導、光電、能源、連維結構等 均有大幅之幫助。 接下來將繼續說明利用本發明之奈米結構的形成方 〉所形成之超長奈米結構的實際應用。躲意的是，以下 ，述之結構是以基板接合結構為例 ，其主要是為了詳細說 明，長奈米結構實際應用於三維結構，以使熟習此項技術 者此夠據以實施，但並非用以限定本發明之範圍。至於基 板上的其它元件或構件等的配置，均可依所屬技術領域中 具有通常知識者所知的技術製作，而不限於下述實施例所 述。圖3A及圖3B分別是依照本發明之一實施例之三維結 構的剖面示意圖。須注意的是，在圖3 B中，與圖3A相同 的構件則使用相同的標號並省略其說明。 請參照圖3A，三維結構300包括第一基板302、第二 基板304以及奈米結構306，其中三維結構300例如是利 用奈米結構306來接合第一基板302與第二基板304之基 板接合結構。弟一基板302與第二基板304是以堆疊的方 式而配置’上述堆豐的方式例如是以晶圓接合（Wafei* bonding)之技術進行第一基板302與第二基板304的堆 疊。第一基板302與第二基板304例如分別為有機物、| #'»\ 機物、導體、絕緣體或半導體之基板，且上述基板材料可 為純元素、化合物、經掺雜或經化學處理後之材料。在— 201130732 ^^.oooiwf.doc/n 實施例中，第一基板302與第二基板304可以分別獨立是 石夕晶圓或三五族半導體晶圓等半導體晶圓，且第一基板 302與第二基板3〇4可分別連接有導電部308、310或一般 熟知的半導體元件。導電部308、310例如是導線或插塞， 且其材料可為鋁、鎢或銅等金屬。 第一基板302具有孔洞302a ’第二基板304具有孔洞 304a ’而奈米結構306填充於孔洞302a、304a中。透過在 相對應之孔洞302a、304a中填充導電的奈米結構306，整 合第一基板302與第二基板304,因而可直接貫穿兩基板 以電性連接第一基板302下的導電部308與第二基板304 上的導電部310，完成連結兩基板並具有導電、導熱與增 加機械強度特性之三維結構體。孔洞3〇2a、3〇4a中所填充 之奈米結構306的材質可為金屬、導體或半導體，特別是 使用以本發明上述實施例所述之方式所成長的超長奈米結 構可達到導電、散熱、連結及強化結構的最佳效果。 在此說明的是，第一基板302與第二基板304可以是 • 同質材料或異質材料。詳言之，同質基板接合例如是整合 同一種材質之第一基板302與第二基板304而組成三維結 構300，其中同質基板可包含兩基板間摻雜濃度、導電型 恶或經由化學處理的不同；而異質基板接合則例如是整合 不同材質之第一基板302與第二基板3〇4而組成三維結構 300。此外，上述整合之三維結構可應用於矽穿孔伸_幼 sil_vla，TSV)、光機電、微機電或其他基板整合的電路 中。 17 201130732 如圖3A所示，在三維結構中，除了可以達到同質其 =1:亦可以實現異質基板之串接技術，針對未來: 產業與子術上均有莫大之幫助。A gas containing a carbon source. In one embodiment, the reaction gas introduced when growing the nanowire may be silane (SiHU), dichlorosilane (SiH2Cl2), trichlorosilane (SiHCy or any gas containing cerium source. In an embodiment) The reaction gas introduced when growing the nanowire may be ruthenium tetrachloride (GeCl4), phenyl-GeCl (3) or any gas containing ruthenium source. In an embodiment The reaction when growing the gallium nitride nanowire may be the reaction of ammonia (NH3) with gallium (Ga) metal or gallium oxide' or any gas containing a nitrogen source and a gallium source. In an embodiment The reaction of growing the zinc oxide nanowire may be the reaction of oxygen (〇2) with zinc (Zn) metal, or the reaction of any gas containing a zinc source with oxygen to grow the nanowire. In addition, the zinc nanowire In the manufacturing method, zinc or zinc oxide powder is used in the graphite powder, and chemical vapor deposition is performed in the furnace tube. Referring to FIG. 1 and FIG. 2C, after the first stage of the nanostructure 206a is completed, the repair process is performed. 〇 8 (step § 13 〇). In the implementation, the repair process 208 can be oxidized or reduced The reaction can be achieved. Also, when the step S13G is performed, a gas repairing process can be performed for any repairable dragon or Weihua non-crystalline mass of the reducing gas or the oxidizing gas, wherein the reducing gas is, for example, hydrogen ( : (Li 3), Oxidizing gas such as oxygen (〇2) or chlorine gas.) X; Taking reduction as an example of 'passing the reducing gas to similar annealing: repairing 208 can be used to fill the defect of nanometer, Lai growth candy and 201130732; ___________DC /n can help to remove the amorphous nanostructure. Moreover, the reducing gas can also promote the reduction of the saturated catalytic metal nanoparticles, so that the catalytic metal particles of the nanometer size can be reactivated and can be used for the next step. The nanostructure growth of the stage. Specifically, the repair treatment 208 using the reducing gas is, for example, closing the reaction gas source for growing the nanostructure 206a in step S120, and continuously introducing the reducing gas. The temperature is about 20 (TC to 900. (between the environment, the atomic group accumulated around the catalytic metal layer 204 is carried away by introducing a reducing gas, or excessive reaction gas It is carried away and at the same time repairs the defects of the grown nanostructure 206a. The time for the repair process 208 can be determined by the state of reduction of the saturated catalytic metal layer 204, which is generally adjusted by the skilled person in view of the process requirements. However, the reducing gas 'over-gas from either the source of the reactive gas or the additional gas may cause the growth rate of the nanostructure to be degraded. Therefore, in another embodiment, the oxidation of the gas is also The nature of the surface crystal can be removed, and the addition of the reducing gas and the oxidizing gas should have a considerable relationship with the regulation of the oxidizing gas; or the gasifying gas in the condition of the clothing, or it can be here == Into the reducing gas and the long-term structure, when the process needs to be adjusted 1 to select - add can be seen in Figure 1 and Figure 2D, and then grow the nanostructure (step SH0). In the step of the & ^ step, to grow the reaction gas I of the nanostructure, again by the chemical vapor deposition method to synthesize the nano-junction sm 2 〇 6b. It should be noted that the nanostructures 2嶋 grown in the 201130732--www», j", doc/π phase are formed on the top of the second product growth structure 2, for example, and No restrictions are imposed. That is to say, in the step s (10), the length of the nano-section is as long as the length of the nano-junction is increased. As for the position of the grown nanostructure, the position of the nano-structure is well known to those skilled in the art, and therefore will not be described herein. In an embodiment, after the step S140 is completed, the cycle of step S140 may be repeated at least once to obtain a favorable nanostructure. After the cycle of the above two S13())' #"^长(step si4〇), the length can be: the length, the spoon, and the super long rice between 80 (four) and 1〇〇〇〇_祛==1 The number of repetitions of the steps S13G to S14G can be two--: the activity of the 曰204 or the length of the desired nanostructure is determined by the above-mentioned implementation. . ,, = private, and achieve a super long nano structure with good crystal growth. Therefore, the growth of the nanostructure is poor in crystallinity and the length cannot be continuously increased, thereby improving the characteristics of the nanostructure. Further, in the above-described embodiment, for convenience of explanation, it is not the case that the ultra-long nanostructure is formed in the p-knife region of the substrate 2A. In other real-cut towels, the system is made of green, the growth of the entire substrate, the growth of the defined pattern, or the array = spoon, 'the defined pattern can be rectangular, square, elliptical or any irregular The pattern, and a single pattern or a pattern of derogatory arrays can be defined. 201130732 4 is called..., 1...OC/n Superconducting B is a 'semiconductor structure that can grow 埶7 and has good crystallinity by the method proposed by the present invention, so that it can improve its conductivity and conductance. ^Integral_Mechanical strength and other characteristics, and for the application of field emission, j H heat conduction, optoelectronics, energy, continuous structure and so on have greatly helped. Next, the practical application of the ultra-long nanostructure formed by the formation of the nanostructure of the present invention will be described. It is concealed that, hereinafter, the structure is a substrate joint structure, which is mainly for the detailed description, and the long nano structure is actually applied to the three-dimensional structure, so that those skilled in the art can implement this, but not It is intended to define the scope of the invention. As for the configuration of other components or members and the like on the substrate, it can be made according to a technique known to those skilled in the art, and is not limited to the following embodiments. 3A and 3B are cross-sectional views, respectively, of a three-dimensional structure in accordance with an embodiment of the present invention. It is to be noted that in Fig. 3B, the same members as those in Fig. 3A are denoted by the same reference numerals and the description thereof will be omitted. Referring to FIG. 3A , the three-dimensional structure 300 includes a first substrate 302 , a second substrate 304 , and a nanostructure 306 . The three-dimensional structure 300 is used to bond the substrate bonding structure of the first substrate 302 and the second substrate 304 by using the nano structure 306 . . The substrate-substrate 302 and the second substrate 304 are arranged in a stacked manner. The above-described stacking method is performed by stacking the first substrate 302 and the second substrate 304, for example, by a wafer bonding technique. The first substrate 302 and the second substrate 304 are, for example, substrates of organic matter, |#'»\, materials, conductors, insulators or semiconductors, and the substrate materials may be pure elements, compounds, doped or chemically treated. material. In the embodiment, the first substrate 302 and the second substrate 304 may be independently semiconductor wafers such as Shi Xi wafers or tri-five semiconductor wafers, and the first substrate 302 and The second substrate 3〇4 may be respectively connected with conductive portions 308, 310 or generally known semiconductor elements. The conductive portions 308, 310 are, for example, wires or plugs, and the material thereof may be a metal such as aluminum, tungsten or copper. The first substrate 302 has holes 302a' and the second substrate 304 has holes 304a' and the nanostructures 306 are filled in the holes 302a, 304a. The first substrate 302 and the second substrate 304 are integrated by filling the corresponding holes 302a, 304a with the conductive nanostructures 306, so that the conductive portions 308 and the first portion of the first substrate 302 can be electrically connected directly through the two substrates. The conductive portion 310 on the two substrates 304 completes a three-dimensional structure that connects the two substrates and has electrical conduction, heat conduction, and mechanical strength enhancement. The material of the nanostructure 306 filled in the holes 3〇2a, 3〇4a may be a metal, a conductor or a semiconductor, and in particular, an ultra-long nanostructure grown in the manner described in the above embodiments of the present invention can be used to achieve electrical conductivity. The best results for heat dissipation, bonding and reinforcement. It is explained herein that the first substrate 302 and the second substrate 304 may be a homogenous material or a heterogeneous material. In detail, the homogenous substrate is bonded, for example, by integrating the first substrate 302 and the second substrate 304 of the same material to form a three-dimensional structure 300, wherein the homogenous substrate may include doping concentration between the two substrates, conductivity type or chemical treatment. The hetero-substrate bonding is formed by, for example, integrating the first substrate 302 and the second substrate 3〇4 of different materials to form a three-dimensional structure 300. In addition, the integrated three-dimensional structure described above can be applied to circuits in which 矽 矽 _ 幼 幼 幼 幼 幼 幼 幼 幼 幼 幼 。 。 。 。 。 。 。 。 。 。 。 。 。 。 17 201130732 As shown in Figure 3A, in the three-dimensional structure, in addition to the homogenous =1: can also achieve the heterogeneous substrate tandem technology, for the future: industry and sub-technology have great help.
為方便5兒明，在圖3A所繪示之實施例中，是以貫穿 兩基板之二維結構3〇〇為例來進行說明，亦即在第一基板 302的孔洞302a與對應之第二基板3〇4的孔洞3〇知中直 接形成連接兩基板之奈米結構挪，㈣本發明並不限於 此。請參照圖3B，在另一實施例中，也可以先分別在第一 基板302的孔洞3〇2a中形成奈米結構306a，以及在第二 基板304的孔洞304a中形成另一奈米結構3〇沾，接著再 利用連接部312接合第一基板3〇2與第二基板3〇4而完成 二維結構300'。也就是說，三維結構3〇〇’是以分別形成貫 穿各單一基板的奈米結構3〇6a、3〇6b的方式來接合兩基 板。上述利用連接部312接合第一基板302與第二基板304For the sake of convenience, in the embodiment shown in FIG. 3A, the two-dimensional structure 3〇〇 passing through the two substrates is taken as an example, that is, the hole 302a of the first substrate 302 and the corresponding second. The hole 3 of the substrate 3〇4 directly forms a nanostructure for connecting the two substrates, and (4) The present invention is not limited thereto. Referring to FIG. 3B, in another embodiment, the nanostructure 306a may be formed in the hole 3〇2a of the first substrate 302, and another nanostructure 3 may be formed in the hole 304a of the second substrate 304. Then, the first substrate 3〇2 and the second substrate 3〇4 are joined by the connection portion 312 to complete the two-dimensional structure 300'. That is, the three-dimensional structure 3〇〇' is to join the two substrates so as to form the nanostructures 3〇6a and 3〇6b which penetrate the respective single substrates. Bonding the first substrate 302 and the second substrate 304 by the connection portion 312
的方法例如是利用錫球或凸塊（bunip)等方式連接孔洞 302a中的奈米結構306a與孔洞304a中的奈米結構306b， 或者疋利用如銅接合（COppei- bonding)、聚合物接合 (polymer bonding)、氧化物接合(oxide bonding)或混合接合 (hybrid bonding)等晶圓接合技術。在一實施例中，在3D 1C 中較常直接以導電部310、：3〇8同時也用作晶圓接合的連 接’因此連接部312的材料可為銅金屬，即所謂之銅接合 (Cu bonding) ° 圖4是將圖3A及圖3B所示之三維結構應用於矽穿孔 接合技術的剖面示意圖。舉例而言，如圖4所示，基板 18 201130732H , ________t.doc/n 400a、400b、400c上形成有一般熟知的半導體元件4〇2a、 402b、402c、介電層 410a、410b、41〇c 及内連線 412a、 412b、412c。基板400a、400b、400c例如是絕緣層上覆矽 (silicon on insulator，SOI)基板。半導體元件 4〇2a、4〇2b、 402c例如分別為金屬氧化物半導體電晶體。詳細地說，半 導體元件402a、402b、402c分別包括形成於基板4〇〇a、 400b、400c 上的閘介電層 404a、404b、404c 與閘極 406a、 406b、406c ’以及包括位於閘極406a、4〇6b、4〇6c兩侧的 基板 400a、400b、400c 中的摻雜區 4〇8a、4〇8b、4〇8c， 其中摻雜區408a、408b、408c是作為源極與汲極。介電層 410a、410b、410c例如是分別由多層介電材料(未繪示)所 組成，而内連線412a、412b、412c分別包括位於不同層介 電材料中的導線與插塞。半導體元件4〇2a、402b、402c、 介電層 410a、410b、410c 與内連線 412a、412b、412c 的 材料與形成方法皆為本領域中具有通常知識者所熟知，於 此不另行說明。 在此特別說明的一點是’矽穿孔接合可透過奈米結構 414、416來電性連接任兩層基板上的内連線或半導體元 件。詳言之，奈米結構414是以如圖；3A所示之貫穿兩基 板的三維結構300來電性連接基板4〇〇a上内連線412a的 最上層導線與基板40〇c上内連線412c的最上層導線。而 奈米結構416則是以如圖3B所示之貫穿單一個基板的三 維結構300'來電性連接基板4〇〇a上内連線412a的最上層 導線與基板400b上内連線412b的最上層導線，或者電性 19 201130732 32886twf.cioc/n 連接基板4_上内連線㈣的最上層導線與基板嫌 上内連線412c的最上層導線。 接下來將利用剖面示意圖來說明形成上述三維結構 的製造流程。須注意的是，以下所述之三維結構的製造流 程主要是絲說明將奈綠錢勘基板的形成方 法’以使熟習此項技術者能夠據以實施，但並非用以限定 本發明之範圍。圖5A至圖5B是依照本發明之一實施例之 一種三維結構的製造流程示意圖。 請參照圖5八，於導電部5〇4上方提供基板5〇2，基板 # 502上例如已形成有半導體元件及/或内連線。然後，於基 板502中形成孔洞506，以暴露出導電部5〇4。孔洞5〇6 的形成方法例如是依序進行微影製程與蝕刻製程。接著， 於孔洞506的側壁表面形成鈍化層5〇8，以避免後續形成 於孔洞506中的金屬或其他污染物進入到基板5〇2令而影 響元件特性。在一實施例中，鈍化層508的材料例如是鈦、 氮化鈦、组、氮化輕等阻障材料，其形成方法可以利用化 學氣相沈積法。在一實施例中，鈍化層508的材料例如是 氧化矽，其形成方法可以利用化學氣相沈積法或熱氧化法。 籲 請參照圖5B，於基板502的孔洞506中形成奈米結 構510，並填滿孔洞506。奈米結構510的形成方法例如是 利用化學氣相沈積法。特別一提的是，可以利用前述之奈 米結構的製造方法(如圖]所述之流程）來成長超長且結晶 性佳的奈米結構510。之後，於孔洞506中的奈米結構51〇 上形成導電部512。導電部512的形成方法例如是先於基 20 201130732idoc/n 板502上形成導體層，之後依序進行微影製程與蝕刻製程 來圖案化此導體層而形成具有所需圖案之導電部512,因 而可利用奈米結構51〇貫穿基板502完成連結導電部之三 維結構。 在圖5A至圖5B所繪示之實施例中，是以形成貫穿單 一基板之孔洞為例來進行說明。當然，在其他實例中，也The method is, for example, connecting the nanostructures 306a in the holes 302a and the nanostructures 306b in the holes 304a by means of solder balls or bunips, or by using, for example, copper bonding (COppei-bonding), polymer bonding ( Wafer bonding technology such as polymer bonding, oxide bonding, or hybrid bonding. In an embodiment, in the 3D 1C, the conductive portions 310, 3〇8 are also used as the connection of the wafer bonding at the same time. Therefore, the material of the connecting portion 312 may be copper metal, so-called copper bonding (Cu). Bonding) FIG. 4 is a schematic cross-sectional view showing the technique of applying the three-dimensional structure shown in FIGS. 3A and 3B to the boring and perforating bonding technique. For example, as shown in FIG. 4, generally known semiconductor elements 4〇2a, 402b, 402c, dielectric layers 410a, 410b, 41〇c are formed on the substrate 18 201130732H , ________t.doc/n 400a, 400b, 400c. And interconnects 412a, 412b, 412c. The substrates 400a, 400b, and 400c are, for example, silicon-on-insulator (SOI) substrates. The semiconductor elements 4A, 2a, 2b, and 402c are, for example, metal oxide semiconductor transistors, respectively. In detail, the semiconductor elements 402a, 402b, 402c respectively include gate dielectric layers 404a, 404b, 404c and gates 406a, 406b, 406c' formed on the substrates 4a, 400b, 400c and included in the gate 406a Doped regions 4〇8a, 4〇8b, 4〇8c in the substrates 400a, 400b, 400c on both sides of 4〇6b, 4〇6c, wherein the doped regions 408a, 408b, 408c serve as source and drain . The dielectric layers 410a, 410b, 410c are, for example, composed of a plurality of dielectric materials (not shown), respectively, and the interconnects 412a, 412b, 412c respectively include wires and plugs in different layers of dielectric material. The materials and formation methods of the semiconductor elements 4a, 2b, 402b, 402c, the dielectric layers 410a, 410b, 410c and the interconnects 412a, 412b, 412c are well known to those of ordinary skill in the art and will not be described. One point specifically noted herein is that the '矽-punch joints can be electrically connected to the interconnects or semiconductor components on either of the two layers of substrates via the nanostructures 414,416. In detail, the nanostructure 414 is a three-dimensional structure 300 extending through the two substrates as shown in FIG. 3A to electrically connect the uppermost wire of the inner wire 412a on the substrate 4A to the inner wire of the substrate 40〇c. The topmost wire of the 412c. The nanostructure 416 is the topmost wire of the interconnecting wire 412a on the three-dimensional structure 300' of the single substrate as shown in FIG. 3B, and the inner wire 412b of the substrate 400b. The upper layer conductor, or the electrical 19 1913030 32886 twf.cioc / n connection substrate 4_ upper interconnect (4) of the uppermost conductor and the substrate is the uppermost conductor of the interconnect 412c. Next, a cross-sectional schematic view will be used to explain the manufacturing flow for forming the above three-dimensional structure. It should be noted that the manufacturing process of the three-dimensional structure described below is mainly to illustrate the method of forming the substrate for the purpose of enabling the skilled artisan to implement it, but is not intended to limit the scope of the invention. 5A-5B are schematic diagrams showing a manufacturing process of a three-dimensional structure in accordance with an embodiment of the present invention. Referring to FIG. 5, a substrate 5〇2 is provided over the conductive portion 5〇4, and a semiconductor element and/or an interconnect is formed on the substrate #502, for example. Then, a hole 506 is formed in the substrate 502 to expose the conductive portion 5〇4. The formation method of the holes 5〇6 is, for example, a lithography process and an etching process in sequence. Next, a passivation layer 5〇8 is formed on the sidewall surface of the hole 506 to prevent metal or other contaminants subsequently formed in the hole 506 from entering the substrate 5 to affect the device characteristics. In one embodiment, the material of the passivation layer 508 is, for example, a barrier material such as titanium, titanium nitride, a group, or a light nitride, and the formation method thereof may utilize a chemical vapor deposition method. In one embodiment, the material of the passivation layer 508 is, for example, hafnium oxide, which may be formed by chemical vapor deposition or thermal oxidation. Referring to Figure 5B, a nanostructure 510 is formed in the aperture 506 of the substrate 502 and fills the aperture 506. The method of forming the nanostructure 510 is, for example, a chemical vapor deposition method. In particular, it is possible to grow the nanostructure 510 which is extremely long and has good crystallinity by the above-described process for manufacturing a nanostructure (as shown in the figure). Thereafter, a conductive portion 512 is formed on the nanostructure 51A in the hole 506. The conductive portion 512 is formed by, for example, forming a conductor layer on the base 20 201130732idoc/n board 502, and then sequentially performing a lithography process and an etching process to pattern the conductor layer to form a conductive portion 512 having a desired pattern. The three-dimensional structure of the connection conductive portion can be completed through the substrate 502 by using the nanostructure 51. In the embodiment shown in Figs. 5A to 5B, the hole formed through the single substrate will be described as an example. Of course, in other instances, too
可以在多個堆豐的基板中形成貫穿兩基板或多個基板之孔 洞，並於孔洞中形成奈米結構，本領域中具有通常知識者 當可依據刖述實施例而知其應用及變化，故於此不再贅述。 綜上所述，本發明之奈米結構的製造方法在基板上形 成催化金屬層並利用化學氣相沈積法進行奈米結構的第二 階段成長之後，進行修補處理，接著再次通入反應氣體以 才J不木、、，〇稱的冉成長，不斷地反覆進行成長、修補處理的 步驟，而達到成長超長奈米結構。修補處理藉由適當、適 時的通入還原氣體或氧化性氣體帶走累積在催化金^層= 遭的原子團或是過多的反應氣體，並同時修補已成長^ 結構之缺陷，因此所成長之超長奈米結構的結晶性 本發明之奈米結構的製造方法不僅可採用簡^ 長方式超長奈米結構，且可以應用在多種奈米結構 製程中,，並能夠與現有的製程相整合，因此製 ^ 有效改善奈米結構的結晶性。再者，彻本發 ° 構的製造方法所成長的超長奈米結構結晶I 不木結 在熱傳導、光電、照明、能源、場發射、二 三維結構等相關應用。 逆接線或 21 υϋ/η 201130732 所的=Γ 4之二維結構及其製造方法透過整合同質或異 22基板，填充導電的奈米結構於各基板的孔洞，因 凡成連結、導電、導熱與增加機械強度的三維結構體。 义雖;名本發明已以實施例揭露如上，然其並非用以限定 本散明’任何所屬技術領域中具有通常知識者，在不脫離 本發明之精神和範圍内，當可作些許之更動與潤飾，故本 發明之保S蔓範圍當視後附之申請專利範圍所界定者為準。Holes penetrating the two substrates or the plurality of substrates may be formed in the plurality of stacked substrates, and the nanostructures may be formed in the holes, and those skilled in the art may know the application and changes according to the embodiments. Therefore, it will not be repeated here. In summary, the method for producing a nanostructure of the present invention forms a catalytic metal layer on a substrate and performs a second-stage growth of the nanostructure by chemical vapor deposition, and then performs a repair process, and then re-introduces the reaction gas. Only J, not wood, and nicknames grow up, constantly repeating the steps of growth and repair, and achieve growth of long nano structure. The repair process is carried out by appropriate or timely introduction of a reducing gas or an oxidizing gas to remove the atomic group accumulated in the catalytic gold layer or excessive reaction gas, and simultaneously repair the defects of the grown structure, thereby growing up Crystallinity of the long nanostructure The method for producing the nanostructure of the present invention can be applied not only to the ultra-long nanostructure in a simple manner, but also to various nanostructure processes, and can be integrated with existing processes. Therefore, the system effectively improves the crystallinity of the nanostructure. Furthermore, the ultra-long nanostructured crystal I grown in the manufacturing method of the present invention does not have wood junctions in heat conduction, optoelectronics, illumination, energy, field emission, and two-dimensional structures. The two-dimensional structure of the reverse line or 21 υϋ / η 201130732 = Γ 4 and its manufacturing method by filling the homogenous or different 22 substrates, filling the conductive nanostructures in the holes of each substrate, due to the connection, conduction, heat conduction and A three-dimensional structure that increases mechanical strength. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the scope of the present invention, and it is possible to make a few changes without departing from the spirit and scope of the invention. And the retouching, the scope of the invention is defined by the scope of the patent application.
【圖式簡單說明;J 圖1是依照本發明之一實施例之奈米結構的製造方法 之步驟流程圖。 圖2Α至圖2D是依照本發明之一實施例之奈米結構 的製造方法之剖面示意圖。 圖3Α及圖3Β分別是依照本發明之一實施例之三維結 構的剖面示意圖。 圖4是將圖3Α及圖3Β所示之三維結構應用於矽穿孔 接合技術的剖面示意圖。 圖5Α至圖5Β是依照本發明之一實施例之一種三維結 構的製造流程示意圖。 【主要元件符號說明】 200、400a、400b、4〇〇c ' 502 :基板 202 :緩衝層 204 :催化金屬層 201130732idoc/n 206a、206b、306、306a、306b、414、416、510 :奈 米結構 208 :修補處理 300、300':三維結構 302 :第一基板 304 :第二基板 302a、304a、506 :孔洞 308、310、504、512 :導電部 • 312 :連接部 402a、402b、402c :半導體元件 404a、404b、404c :閘介電層 406a、406b、406c :閘極 408a、408b、408c :摻雜區 410a、410b、410c :介電層 412a、412b、412c :内連線 508 :純化層 赢 S100、S110、S120、S130、S140 :步驟 23BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a flow chart showing the steps of a method for fabricating a nanostructure according to an embodiment of the present invention. 2A to 2D are schematic cross-sectional views showing a method of fabricating a nanostructure according to an embodiment of the present invention. 3A and 3B are respectively schematic cross-sectional views of a three-dimensional structure in accordance with an embodiment of the present invention. Fig. 4 is a schematic cross-sectional view showing the technique of applying the three-dimensional structure shown in Figs. 3A and 3B to the boring and perforating bonding technique. 5A through 5B are schematic views showing a manufacturing process of a three-dimensional structure in accordance with an embodiment of the present invention. [Description of main component symbols] 200, 400a, 400b, 4〇〇c ' 502 : substrate 202 : buffer layer 204 : catalytic metal layer 201130732idoc / n 206a, 206b, 306, 306a, 306b, 414, 416, 510: nano Structure 208: repair process 300, 300': three-dimensional structure 302: first substrate 304: second substrate 302a, 304a, 506: holes 308, 310, 504, 512: conductive portion 312: connection portions 402a, 402b, 402c: Semiconductor elements 404a, 404b, 404c: gate dielectric layers 406a, 406b, 406c: gates 408a, 408b, 408c: doped regions 410a, 410b, 410c: dielectric layers 412a, 412b, 412c: interconnects 508: purification Layer wins S100, S110, S120, S130, S140: Step 23