201118546 090477.TW 31918twf.doc/n 六、發明說明： 【發明所屬之技術領域】 可以關於一種電源電路，且特別是有關於-種 了以防止漏電壓的電源電路。 【先前技術】 古主灸日^日不為白知之飼服器系統令的電源電路方塊圖。 圖^習知的電源電路100包括電源供應器102，其 104 1^服器系統红作模式下運作時，從電壓輸出端 電壓，使彳槪^純可膽據此工作 工作楔竹t t換句話說，電壓輸出端⑽的電位在 下，Ϊ式為㊣電位。相對地’當伺服器系統在禁能模式 雷供應器1G2就會停止從電壓輸出端1G4輸出工作 二D。此時，電壓輸出端104的電位就會被下拉至低 寬位’例如是接地電位。 工你^卜電源供應器102除了會從電壓輸出端104輸出 -$地壓eVDD之外，還可以從另一電屋輸出端106輸出 Vstby。待機電壓Vstby經待機電壓切換器ιι〇 後’會轉換為經調整的待機電壓Vstby，。&於待機電 =y，在缝模式下，還是被持續的提供，因此待機電 stby’在禁能模式下會不斷的提供給伺服器系統。 簡摇ίΐ服器系統中，可以具有—主機板管理控制器（以下 的雷厭^ 108。其中，BMC 108可以麵接電源供應器 的電壓輸出端106。另外，BMC108的—通用輸入輸 201118546 imm/.TW 31918twf.doc/n 出端GHO也可以透過電阻m而輕接電源 〇 電壓輸出端104。藉此，當伺服哭牵 ° 02的 ⑽就可以依據工作麵VDD來進行運作 = 下時，BMC⑽也可以接收待機電覆％%,。不讀式 BMC 108的通用輸人輸出端側 供應卯102之外還可以麵接其他的電路元件，例如—此 開關兀件等。理論上來說，當祠服器系統在 二 電源供應器102之·輸出端刚的電位岸續為t位$， 亚使得BMC⑽的通用輸入輸出端Gp 低電位。然而，在實際的愔W * 也應该被下拉至 式下還可以接收待機電mmeiQ8·能模 循著聽_内部二二：此待軸秘，會 ί 輸入輪出端Gpi〇的電位不是低電 位，而疋待機電壓Vstbv，的^ _ 入給屮〜ΡτηΜ 電位，這就可能會導致通用輪 入輸“谢〇_接的電路元件發生誤動作。玢 【發明内容】 種電源電路，可以在禁能模 有鐾·於此，本發明提供 式下防止漏電壓的發生。 源管理方法 誤動作 ΐ:法本Γ月提供一種電腦系統和-種電腦系統的電 σ以防止在禁能模式下因為漏電壓而造成的 有-種電源電路，包括-電源供應器，其具 有弟電堡輪出端和-控制端，可以分別用以輸出一工 201118546 090477.TW 31918twf.doc/n 作電壓和一控制訊號。另外，一二極體可以與一第一電阻 並聯，並且二極體的陰極端則可以透過電容接地。此外， 一電晶體的汲極端可以耦接第一電壓輸出端、其源極端接 地，而其閘極端則耗接二極體的陰極端。 哭 -工作模式期間，其可以將具有低電位的控制訊號：該控 制端輸出至該二極體的陽極端，並從第—電壓端輸出工作 電壓。而當電源供應器在-禁能模式期間，則可以從控制 1輸出高電位的控伽號，並將其偏壓至二極體的陽極 =而使得電晶體導通。藉此，第_電麗輸出端的電位就 會被固定在接地雷仂。 從为一觀點來看 斗&月吧杈供一種電腦系統，包括 ，電路和—電源供應。其巾，電源供應器具有一第一 端二第二電壓輸出端和—控制端，可以分別用 可二2作電壓、一待機電壓和一控制訊號。而主電路 以減電源供應器的第—電壓輸出端和第二電 二二依據:作電壓和待輸而運作。另外，—二極: 電容接地弟此Γ且並：，並且二極體的陰極端則可以透過 t Γη 體軌極端可以雛第—電壓輪 控制訊號從該控制端輪出：間極==有低電位的 _端輸出工作電壓。而C極端’並從第- 使侍電晶體導通。藉此，第-電壓 201118546 uyu4//.TW 31918twf.doc/n 輸出端的電位就會被gj定在接地電位。 _ 本發明中，在禁能模式期間可以將輸出工作電 2=輪_之電位固定在接地電位。因此，就可= 在電月：糸統中’因為漏電壓所導致的誤動作發生。 下文特 為讓本發明之上述特徵和優點能更明顯易懂 舉實施例，並配合所卩式作詳細說明如下。 【實施方式】 圖2緣禾為依照本發明之-較佳實施例的-種電腦系 統的系統方塊圖。請參照圖2，電腦系統·例如限 定是飼服器主機，其包括電源電路202和主電路20—4。I ^電源電路搬可以提供纟電路204運作所需的電源；; 貫=例中，主電路2〇4可以具有一主機板管理控制 為’可以接收由電源電路2〇2所供應的電源。 ，源電路2G2包括電源供應器212，其具有第一電壓 二2，、第三電壓輸出端216、第二電壓輸出端218 口二制端220,其中第一電壓輸出端可以輸出工 VDD’弟三電Μ輸出端216及第二電壓輸出端218 祕機電壓vstby，控制端22G可以控制訊號s卜在本f 位工Π壓:加和待機電壓，的電位都高於 接地電位。其中，弟—電壓輸出端214 綱’以將工作電壓VDD供應給主電路綱。另外，= 供應器212還可以輕接配置在電腦系統200外殼上的= 作介面單元242 ’並且依據操作介面單元Μ2的狀態來^ 201118546 090477.TW 31918twf.doc/n 作。在本實施财，操作介面單元242可以是-電源按鍵。 在電源電路202 t，還包括二極體222,其與電阻224 彼，並聯。另外，二極體222的陽極端可以耦接至電源供 應态212的控制端220 ’並且還可以透過電阻226耦接至 電源供應器212的第三電麼輸出端216。另一方面，二極 體222的陰極端則可以透過電容228接地，並且耦接至一 ，晶體230的閘極端。另外’電晶體23〇例如是顧〇§電 晶體，其汲極端可以耦接至電源供應器212的第一電壓輸 出端214，而其源極端則可以接地。 除此之外，在一些實施例中，電源電路202還可以包 括待機電壓切換器232，可以搞接至電源供應器212的第 一電壓輸出端218。在一些實施例中，待機電壓切換器232 例如是-位準偏移器，其可以接收從第二電壓輸出、端218 所輪出的待機電壓Vs%，並絲其準位轉換後，而產生 新的待機電壓Vstby，後，再提供給主電路2〇4。 ^圖3繪示為圖2之電腦系統200中各訊號的時序圖。 參照圖2和圖3，在時間t〇時，電源供應器212可 以一輪出端輸出待機電壓Vstby，並且送至待機電壓 =器232。此時，電腦系統2〇〇進入禁能模式。當待機 :堅切換器232接收到待機電壓Vstby後，可以在時間t2 寸輸出調整後的待機電壓Vstb>y，給主電路2〇4。 方面，電源供應器212也會從第三電壓輸出端216 輸出待機電壓Vstby，並將其偏壓至二極體222的陽極端， 使仔二極體222會被導通。當二極體222導通時，會形成 201118546 uyu^/ /.TW 31918twf.doc/n 一導通阻抗。眾所皆知地’二極體222的導通阻抗非常小。 另外，在本實施例中’二極體222的導通阻抗會與電阻224 並聯’其所帶來的結果就是形成比二極體222之導通阻抗 還小的等效組抗，這使得二極體222兩端幾乎是短路。〇 味*，電谷228充電的速度會加快，並且導致電晶體23〇的 閘極電壓Vg快速上升。201118546 090477.TW 31918twf.doc/n VI. Description of the Invention: [Technical Field] The present invention relates to a power supply circuit, and more particularly to a power supply circuit for preventing leakage voltage. [Prior Art] The ancient moxibustion day ^ day is not the power circuit block diagram of the Baizhizhi feeding device system. The conventional power supply circuit 100 includes a power supply 102, which operates from a voltage output terminal when the servo system operates in a red mode, so that the 彳槪^ pure can be used according to the work. In other words, the potential of the voltage output terminal (10) is lower, and the Ϊ is a positive potential. Relatively when the servo system is in the disable mode, the lightning supply 1G2 stops outputting the operation 2D from the voltage output terminal 1G4. At this time, the potential of the voltage output terminal 104 is pulled down to the low-width bit', for example, the ground potential. In addition to outputting the -$ ground voltage eVDD from the voltage output terminal 104, the power supply 102 can also output Vstby from another electric house output terminal 106. The standby voltage Vstby is converted to the adjusted standby voltage Vstby after the standby voltage switcher ιι〇. & standby power = y, in the seam mode, is still provided continuously, so standby power stby' will be continuously provided to the server system in the disable mode. In the simple shaker system, there may be a motherboard management controller (the following is a Thunderbolt 108. The BMC 108 can be connected to the voltage output 106 of the power supply. In addition, the BMC108 - universal input and output 201118546 imm /.TW 31918twf.doc/n The out-end GHO can also be connected to the power supply voltage output terminal 104 through the resistor m. Therefore, when the servo is crying, the (10) can be operated according to the working surface VDD = The BMC (10) can also receive the standby power cover %%. The non-read BMC 108 can also be connected to other circuit components in addition to the universal input output side supply port 102, for example, this switch element, etc. In theory, when The potential of the server system at the output of the two power supplies 102 is t-bit, and the general-purpose input and output terminal Gp of the BMC (10) is low. However, the actual 愔W* should also be pulled down to Under the type, you can also receive the standby power mmeiQ8. The mode can follow the listener. _Internal 2: This is the axis of the axis, and the input potential of the input terminal Gpi〇 is not low, and the standby voltage Vstbv, ^ _ is given to 屮~ΡτηΜ potential, this may be The general circuit input and output "Xie Wei _ connected circuit components malfunction. 玢 [Summary] A power supply circuit, can be in the disable mode 鐾 于此 , , , , , , , , , , , , , 于此 于此 。 。 。 。 。 源 源 源 源 源 源 源 源 源Malfunction 法: Famoto provides a computer system and a computer system's electric sigma to prevent the power supply circuit caused by the leakage voltage in the disable mode, including the power supply, which has the electric power wheel The output terminal and the control terminal can be respectively used to output a voltage and a control signal for 201118546 090477.TW 31918twf.doc/n. In addition, a diode can be connected in parallel with a first resistor, and the diode is cloudy. The extreme can be grounded through the capacitor. In addition, the 汲 terminal of a transistor can be coupled to the first voltage output terminal, the source terminal is grounded, and the gate terminal of the diode is consuming the cathode terminal of the diode. During the crying-operating mode, The control signal having a low potential can be output to the anode end of the diode and output the operating voltage from the first voltage terminal, and when the power supply is in the - disable mode, Controlling the output high-potential control gamma and biasing it to the anode of the diode = causing the transistor to conduct. Thereby, the potential at the output of the _ _ _ _ _ _ _ _ _ _ _ _ _ _ From the point of view, the bucket & month is for a computer system, including, circuit and power supply. Its towel, power supply has a first end two second voltage output and - control, can be used separately The voltage, a standby voltage, and a control signal, and the main circuit operates according to the first voltage output terminal of the power supply minus the second power supply and the second power supply. In addition, the two poles: the capacitor is grounded, and the cathode end of the diode can pass through the t Γ η body rail terminal. The voltage wheel control signal is rotated from the control terminal: the pole == The low potential _ terminal outputs the operating voltage. And the C terminal 'and from the first - makes the transistor crystal conduction. Therefore, the potential of the output voltage of the first voltage 201118546 uyu4//.TW 31918twf.doc/n is set to the ground potential by gj. In the present invention, the potential of the output operating power 2 = wheel can be fixed to the ground potential during the disable mode. Therefore, it is possible to = in the electric moon: in the system, because of the leakage caused by the leakage voltage. The above-described features and advantages of the present invention will become more apparent from the following description. [Embodiment] FIG. 2 is a system block diagram of a computer system in accordance with a preferred embodiment of the present invention. Referring to Figure 2, the computer system is, for example, limited to a feeder host that includes a power circuit 202 and a main circuit 20-4. The I ^ power circuit can provide the power required for the operation of the circuit 204; in the example, the main circuit 2〇4 can have a board management control to receive the power supplied by the power circuit 2〇2. The source circuit 2G2 includes a power supply 212 having a first voltage 2, a third voltage output 216, and a second voltage output 218. The first voltage output terminal can output a power VDD' The three-electrode output terminal 216 and the second voltage output terminal 218 have a secret voltage vstby, and the control terminal 22G can control the signal s in the f-bit operation voltage: the summing standby voltage is higher than the ground potential. Wherein, the voltage output terminal 214 is used to supply the operating voltage VDD to the main circuit. In addition, the = supplier 212 can also be lightly connected to the interface unit 242' disposed on the casing of the computer system 200 and according to the state of the operation interface unit Μ2, 201118546 090477.TW 31918twf.doc/n. In this implementation, the operating interface unit 242 can be a - power button. In the power supply circuit 202 t, a diode 222 is further included, which is connected in parallel with the resistor 224. In addition, the anode end of the diode 222 can be coupled to the control terminal 220' of the power supply state 212 and can also be coupled to the third electrical output terminal 216 of the power supply 212 via the resistor 226. On the other hand, the cathode terminal of the diode 222 can be grounded through the capacitor 228 and coupled to the gate terminal of the crystal 230. Further, the 'transistor 23' is, for example, a transistor, the 汲 terminal of which can be coupled to the first voltage output terminal 214 of the power supply 212, and the source terminal thereof can be grounded. In addition, in some embodiments, the power circuit 202 can also include a standby voltage switch 232 that can be coupled to the first voltage output 218 of the power supply 212. In some embodiments, the standby voltage switch 232 is, for example, a level shifter that can receive the standby voltage Vs% that is rotated from the second voltage output, terminal 218, and is converted after the level is generated. The new standby voltage Vstby is supplied to the main circuit 2〇4. FIG. 3 is a timing diagram of signals in the computer system 200 of FIG. 2. Referring to Figures 2 and 3, at time t, the power supply 212 can output the standby voltage Vstby at one round and output to the standby voltage = 232. At this point, the computer system 2 enters the disable mode. When the standby switch 232 receives the standby voltage Vstby, it can output the adjusted standby voltage Vstb > y at time t2 to the main circuit 2〇4. In the aspect, the power supply 212 also outputs the standby voltage Vstby from the third voltage output terminal 216 and biases it to the anode terminal of the diode 222, so that the diode diode 222 is turned on. When the diode 222 is turned on, a turn-on impedance of 201118546 uyu^/ /.TW 31918twf.doc/n is formed. It is well known that the on-resistance of the diode 222 is very small. In addition, in the present embodiment, the 'on-resistance of the diode 222 will be in parallel with the resistor 224', which results in an equivalent group resistance which is smaller than the on-resistance of the diode 222, which makes the diode The ends of 222 are almost short circuits. 〇 **, the charging speed of the electric valley 228 will increase, and the gate voltage Vg of the transistor 23〇 will rise rapidly.
假設閘極電壓Vg在tl時超過電晶體230的臨界電 壓，此時電晶體230就可以在時間t2之前導通。當電晶體 230導通時，電源供應器212的第一電壓輸出端214 =合 被下拉並且ϋ定在接地電位。目此，較在t2時 壓Vstby被达至主電路2〇4 ’然而第一電塵輸出端a =持|接地電位。換言之，電晶體23()可在待_ ΓΓ題 ㈣導通，因此材㈣可轉決漏電塵 施，例如按 時間㈣，從第-電=二=源供應器212會名 主電路綱。然而，若是電工作電麼_髮 輸出工作電壓彻後持電顯出端a 2H的電位將會被固定輪出端 發生誤動作。 a位’ _導致主電路204 因此，在時間t5時，雷谓征座„ 220輸出一具有低電 /,w、應态212就會從控制端 .電位的控制訊號幻至二極體222的陽極 201118546 090477.TW 31918twf.doc/n 二=:ίΓ陽極端會被下拉至低電位’導致二 if ν時’電容228開始放電，導致間極 電壓vg開始下降。假設在t7時，閑極電壓々低 體230的臨界電壓，則電晶體23〇就會關閉。此時，主； 路ΓΙΓ"以正f地接收從第—電壓輸出端214所輸出的 工料壓卿。在本實施例中，由於電晶體挪是在工作 電壓VDD輸4後才關，亦即電晶體23G可在:l作電壓 VDD上升至穩態後才關，因此本實闕也可以確實地避 免主電路2〇4在進入工作模式時’因為待機電壓乂晰所 造成之漏電屢而發生的誤動作。 綜上所述，由於本發明可以在電腦系統進入禁能模式 時’將輸出工作電壓的電壓輸出端下拉並且維持在接地電 位。因此，本發明就可以有效地解決因為待機電壓所產生 之漏電流而發生的誤動作。 雖然本發明已以實施例揭露如上，然其並非用以限定 本發明，任何所屬技術領域中具有通常知識者，在不脫離 本發明之精神和範圍内，當可作些許之更動與潤飾，故本 發明之保護範圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 圖1繪示為習知之伺服器系統中的電源電路方塊圖。 圖2繪示為依照本發明之一較佳實施例的—種電^系 統的系統方塊圖。 圖3繪示為圖2之電腦系統中各訊號的時序圖。 201118546 7.TW 31918twf.doc/n 【主要元件符號說明】 100 :電源電路 102、212 :電源供應器 104、106、214、216、218 :電壓輸出端 108 :主機板管理控制器(BMC) 110、232 :待機電壓切換器 200 :電腦系統 202 :電源電路 # 204 :主電路 220 :控制端 222 :二極體 224、226 :電阻 228 :電容 230 :電晶體 242 :操作介面單元 GPIO:通用輸入輸出端 ^ S1 :控制訊號 tl、t2、t3、t4、t5、t6、t7 :時間點 VDD :工作電壓Assuming that the gate voltage Vg exceeds the critical voltage of the transistor 230 at t1, the transistor 230 can be turned on before time t2. When the transistor 230 is turned on, the first voltage output 214 of the power supply 212 is pulled down and set at the ground potential. For this reason, the voltage Vstby is reached to the main circuit 2〇4' at t2, however the first electric dust output terminal a = holding | ground potential. In other words, the transistor 23() can be turned on in the event (4), so the material (4) can be turned over to the leakage dust, for example, according to time (4), from the first-electric=second=source supplier 212 will be named main circuit. However, if it is an electric working power, the potential of the holding terminal a 2H will be malfunctioned by the fixed wheel output. The a bit ' _ leads to the main circuit 204. Therefore, at time t5, the lightning stalk „ 220 output has a low power /, w, the state 212 will be from the control terminal. The potential control signal phantom to the diode 222 Anode 201118546 090477.TW 31918twf.doc/n Two =: Γ The anode end will be pulled down to a low potential 'causes two if ν' capacitor 228 begins to discharge, causing the interpole voltage vg to begin to fall. Assume that at t7, the idle voltage When the threshold voltage of the body 230 is lowered, the transistor 23 is turned off. At this time, the main; path " receives the material output from the first voltage output terminal 214 in a positive f. In this embodiment, Since the transistor is turned off after the operating voltage VDD is 4, that is, the transistor 23G can be turned off after the voltage VDD rises to the steady state, so the present embodiment can surely avoid the main circuit 2〇4. When entering the working mode, the leakage caused by the leakage of the standby voltage is repeated. In summary, the present invention can pull down and maintain the voltage output of the output operating voltage when the computer system enters the disable mode. Ground potential. Therefore, the present invention The malfunction caused by the leakage current generated by the standby voltage can be effectively solved. Although the present invention has been disclosed in the above embodiments, it is not intended to limit the present invention, and any one of ordinary skill in the art does not deviate from the present invention. In the spirit and scope of the invention, the scope of protection of the present invention is subject to the definition of the scope of the appended claims. [FIG. 1 shows a conventional servo. Figure 2 is a block diagram of a system of a power system in accordance with a preferred embodiment of the present invention. Figure 3 is a timing diagram of signals in the computer system of Figure 2. 201118546 7.TW 31918twf.doc/n [Main component symbol description] 100: Power supply circuit 102, 212: Power supply 104, 106, 214, 216, 218: Voltage output terminal 108: Motherboard management controller (BMC) 110, 232: standby voltage switcher 200: computer system 202: power supply circuit #204: main circuit 220: control terminal 222: diode 224, 226: resistor 228: capacitor 230: transistor 242: operation interface unit GPIO: General-purpose input and output terminal ^ S1 : Control signal tl, t2, t3, t4, t5, t6, t7: time point VDD: operating voltage
Vg:閘極電壓Vg: gate voltage
Vstby、Vstby’ ：待機電壓 11Vstby, Vstby’: standby voltage 11