201041104 六、發明說明： 【發明所屬之技術領域】 、本發有齡止焊料在基板焊塾上溢流之封裝結構， 尤其是利祕墊壩或焊塾絲降低溢流現象。 【先前技術】 在電子產品朝向微型化的趨勢下，覆晶（FlipChip)製 程在系統級（SIP)封裝的應用漸趨普遍，因此在封裝製程上 面臨到了新關題’也就是焊料（sg1㈣在大焊墊會有自然 〇 散錫縣.導致迴焊(讀後焊闕搭橋稿量;ί；足逕而影 響信賴性。 ~ 參閱第-圖’傳統覆糾裝結構示意圖，其中該傳統覆 晶封裝結構1 ’係包括複數個晶片接腳15、焊料40以及複數 個基板焊墊30。該等晶片接腳15係包含於一晶片1〇，且該 等晶片接腳15位於該晶片1 〇的下方。該等基板焊墊3 〇 含於-基板2G，且料基板㈣3〇储由_雜刻的方 式形成於一基板20上表面，焊料4〇係用以連接晶片接腳15 q 與相對應之基板焊墊30。 然而習知技術中將覆晶製程應用在系統級封裝時，有部 份的大面積的基板焊墊30由於考慮到接地及同時具有多; 接點的要求，因此在封裝時，焊料40容易在較大面積的基板 焊墊30上溢流，如圖中的區域a所示，焊料4〇因溢流而無 法將晶片接腳15連接到基板焊墊30上，進而形成空接，^ 封裝造成嚴重的可靠度問題。 目前現有的阻擋焊料40溢流且不影響電性的方式主要 以綠漆堤(SolderMaskDam)為主，但由於此為覆晶設計因 此在晶片墊(DiePad)上印刷綠漆’容易因綠漆過厚而造成晶 201041104 片10與基板間因距離過小而直接影響灌膠(molding ; undeirfill)製程良率’若將綠漆厚度降低則會有綠漆剝落 (Solder Mask peeling)的問題，造成可靠度問題。 【發明内容】 ^本發明之主要目的在提供一種防止焊料在基板焊墊上溢 /瓜之封裝結構，係包括複數個晶片接腳、焊料以及複數個基 板^墊。該等晶片接腳係位於該晶片的下方，該等基板焊塾 〇 係藉由鑛銅或姓刻的方式形成於一基板上，該等基板焊塾中 的每-個基板焊墊具有—個或複數個焊墊接點。焊料則用以 連接晶片接腳與相對應之焊墊接點，其中該等焊塾接點中的 母一焊塾接點具有一對焊塾塌或一對焊墊溝，該對焊墊壩係 用以阻擋覆晶(Flip Chip )時焊料發生溢流的現象而該對 焊墊溝則是被焊料填滿，焊料本身的崎力使來減緩焊 料溢流的現象’或是於焊墊制塗佈樹脂以覆蓋焊塾溝，利 用樹脂的表面材料不同於焊料的特性，來阻止焊料溢流。 明可解決上述f知技術的缺失，彻具有一高度 〇與-寬度的焊_或於具_深度與—寬度 1 = 料或樹絲防止覆晶贿料發生歸的現象， 之良率。 4 201041104 【實施方式】 以下配合圖式及元件符號對本發明之實施方式做更詳 >、’田的說明，俾使沾習該項技藝者在研讀本說明書後能據以實201041104 VI. Description of the invention: [Technical field of the invention] The package structure of the age-old solder overflowing on the substrate pad, especially the sluice pad or the wire to reduce the overflow phenomenon. [Prior Art] In the trend toward miniaturization of electronic products, the application of FlipChip process in system-level (SIP) packaging is becoming more and more popular, so there is a new issue in the packaging process, that is, solder (sg1 (four) in The large solder pad will naturally scatter the tin county. Lead to reflow (read the post-weld bridge draft; ί; foot diameter and affect the reliability. ~ Refer to the figure - the traditional overlay structure diagram, where the traditional flip chip The package structure 1' includes a plurality of wafer pins 15, solder 40, and a plurality of substrate pads 30. The wafer pins 15 are included in a wafer 1 and the wafer pins 15 are located on the wafer 1 The substrate pads 3 are contained in the substrate 2G, and the substrate (4) 3 is formed on the upper surface of the substrate 20 by means of a pattern, and the solder 4 is used to connect the wafer pins 15 q. The substrate pad 30. However, in the prior art, when the flip chip process is applied in the system-level package, a part of the large-area substrate pad 30 is considered to be grounded and has many contacts at the same time; When the solder 40 is easy to be in a large area The substrate pad 30 overflows, as shown by the area a in the figure, the solder 4 is unable to connect the wafer pin 15 to the substrate pad 30 due to overflow, thereby forming a blank connection, and the package causes severe reliability. At present, the existing way to block the solder 40 overflow and not affect the electrical properties is mainly based on the green paint dyke (SolderMaskDam), but since this is a flip chip design, the green lacquer is printed on the wafer pad (DiePad). If the paint is too thick, the distance between the film 201041104 10 and the substrate is too small, which directly affects the yield of the mold; if the thickness of the green paint is lowered, there will be a problem of the green paint peeling (Solder Mask Peeling). SUMMARY OF THE INVENTION The main object of the present invention is to provide a package structure for preventing solder from overflowing on a substrate pad, comprising a plurality of wafer pins, solder, and a plurality of substrate pads. The foot system is located under the wafer, and the substrate soldering is formed on the substrate by a copper or a surname. Each of the substrate pads has one or a plurality of soldering pads. Mat joint The solder is used to connect the wafer pins to the corresponding pad contacts, wherein the mother-weld joints of the solder joints have a pair of solder bumps or a pair of pad trenches, the pair of pad pads It is used to block the phenomenon of solder overflow during Flip Chip, and the pad groove is filled with solder, and the sacrificial force of the solder itself slows down the solder overflow phenomenon. The resin is coated to cover the solder ditch, and the surface material of the resin is different from the characteristics of the solder to prevent the solder from overflowing. The above-mentioned defect of the above-mentioned technology can be solved, and the solder has a high degree of 〇-width. _Depth and - Width 1 = The rate at which the material or tree filaments prevent the occurrence of re-bridging bribes. 4 201041104 [Embodiment] The following description of the embodiments of the present invention will be described in more detail with reference to the drawings and the component symbols, and the description of the field can be made to enable the person skilled in the art to study the specification.
〇 參閱第二圖，本發明防止焊料於基板焊墊上溢流之封裝 結構的第—實補示細，並相第三圖，係第二圖之俯視 圖，此防止焊料於基板焊墊上溢流之封裝結構2係包括複數 個晶片接腳15、焊料40以及複數個基板焊墊3〇。該等晶片 腳15係包各於晶片，且該等晶片接腳位於該晶片 j下方。該等基板 30係藉由鍍銅絲刻的方式形成 ^一基板20上表面’該等基板焊塾30中的每-個基板焊塾 ϋ具有一個或複數個焊墊接點32。 焊料40係用以連接晶片接腳15與相對應之蟬墊接點 叛1其中該等焊墊接點32中的每1墊接點32具有-對焊 一 =34 ’該對焊墊壩34係位於該焊墊接點32的兩側，如第 該f焊墊壩％具有—寬度和—高度用以阻撞覆晶 料可」P)㈣料4G發生溢流的現象。該辦墊壩34之材 的方式來控 1Γ。焊墊壩34之寬度與高度都可藉由魏或钱刻 圖，本發明防止焊料於基板溢流之_ 圖，第示意圖’並參閱第五圖’係第四圖之俯視 4传輪輯齡級料上溢紅封襄結構 板烊塾圖及第三圖的第—實關巾的社焊料於基 焊塾賴其編靖觸6來取代 第五—-、作塾溝36係位於該焊墊接點32的兩側，如 不。該對焊塾溝36具有一寬度和一深度係被焊料 5 201041104 二填:用雜4G本身的内聚力使來 象^㈣36之材料可為銅，該等焊墊溝 深度都可義钱或編i的方縣㈣。 之寬度與 參閱第六® ’本發明防止 結構的第三實施例示Μ 一 之封裝 墊上#、4㈣’本魏射的防止焊料於基板焊 墊上/贼之職結構6 _似 例中的防止焊辦缺焊虹歸之賊簡差一里Γ Ο ΐί^Γΐ焊塾溝36中塗佈樹脂90以覆蓋焊塾溝、，而 7 轉料40填滿焊墊溝。該樹脂9G由於本身 、隹1材料柯於焊料40，因此焊料4G不祕其表面溢流， 進而達到阻止焊料溢流的功效。 議!ίΐΐΐ者僅為用以解釋本發明之較佳實施例，並非企 式上之關，ΪΓ凡有在相同之 太恭Β立7乍有關本發明之任何修飾或變更’皆仍應包括 尽I明思圖保護之範嘴。Referring to the second figure, the first embodiment of the present invention prevents the solder from overflowing on the substrate pad, and the third figure is a top view of the second figure, which prevents the solder from overflowing on the substrate pad. The package structure 2 includes a plurality of wafer pins 15, solder 40, and a plurality of substrate pads 3A. The wafer pins 15 are each packaged on a wafer, and the wafer pins are located below the wafer j. The substrates 30 are formed by copper plating to form a top surface of the substrate 20. Each of the substrate pads 30 has one or a plurality of pad contacts 32. The solder 40 is used to connect the wafer pins 15 with the corresponding pad contacts. Each of the pad contacts 32 has a butt weld = 34 ' the pair of pad dams 34 It is located on both sides of the pad joint 32. For example, the f-pad dam has a width--height for blocking the flip-chip material. P) (4) The material 4G overflows. The way to do the dam 34 is to control 1 Γ. The width and height of the pad dam 34 can be engraved by Wei or Qian. The present invention prevents the solder from overflowing on the substrate. The figure is 'see the fifth figure' and the fourth figure is the top view of the 4th wheel. The graded material overflows the red seal structure plate and the third figure of the first solid cover towel. The base solder is used to replace the fifth one. Both sides of the pad 32, if not. The butt weld ditch 36 has a width and a depth which is filled by the solder 5 201041104. The cohesive force of the miscellaneous 4G itself makes the material of the (4) 36 copper, and the depth of the pad can be used for money or edit. Fang County (four). Width and refer to the sixth embodiment of the third embodiment of the present invention to prevent the structure of the package pad #, 4 (four) 'this anti-fire on the substrate pad / thief's job structure 6 _ example of the prevention of welding The thief of the ruined ruined 虹 Γΐ Γΐ Γΐ Γΐ Γΐ Γΐ Γΐ 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 36 Since the resin 9G itself and the material of the crucible 1 are bonded to the solder 40, the solder 4G does not secretly overflow the surface thereof, thereby achieving the effect of preventing the solder from overflowing. The present invention is only for the purpose of explaining the preferred embodiments of the present invention, and is not intended to be a matter of sufficiency. I Mingsi protection of the mouth.
6 201041104 【圖式簡單說明】 第一圖為傳統覆晶封裝結構示意圖。 第二圖為本發明防止焊料於基板焊墊上溢流之封 一實施例示意圖。 裝、、、吉構的第 第三圖為第二圖之俯視圖。 之封裝結構的第 第四圖為本發明防止焊料於基板焊墊上溢流 二實施例示意圖。 第五圖為第四圖之俯視圖。6 201041104 [Simple description of the diagram] The first picture is a schematic diagram of the traditional flip-chip package structure. The second figure is a schematic view of an embodiment of the invention for preventing overflow of solder on a substrate pad. The third picture of the assembly, the structure, and the structure is the top view of the second figure. The fourth figure of the package structure is a schematic view of an embodiment of the present invention for preventing solder from overflowing on a substrate pad. The fifth picture is a top view of the fourth figure.
流之封裝結構的第 第六圖為本發明防止焊料於基板焊墊上溢 二實施例示意圖。 【主要元件符號說明】 1傳統覆晶封裳結構 2防止料錄板·上毅之封裝結構 4防止焊料於基板料上溢流之封裝結構 6防止焊料於基板上歸之封裝結構 10晶片 15晶片接腳 基板 基板焊墊 32焊墊接點 34焊塾壩 36焊墊溝 40焊料 90樹脂 A區域 7A sixth diagram of the package structure of the flow is a schematic view of an embodiment of the present invention for preventing solder from overflowing on a substrate pad. [Main component symbol description] 1 conventional flip-chip sealing structure 2 to prevent the recording board · Shang Yi's package structure 4 to prevent solder from overflowing on the substrate material package structure 6 to prevent solder on the substrate to return to the package structure 10 wafer 15 wafer connection Foot substrate substrate pad 32 pad contact 34 soldering dam 36 pad groove 40 solder 90 resin A area 7