201021625 六、發明說明： 【發明所屬之技術領域】 本發明係關於各種背光等之冷陰極管所使用之壓電變 壓器之驅動電路以及其驅動方法。 【先前技術】 近年來，液晶顯示螢幕作爲筆記型電腦等之液晶顯示 Φ 裝置被安裝。在如此之液晶顯示螢幕，使用壓電變壓器’ 以作爲用以驅動背光等之冷陰極管之昇壓變壓器。壓電變 壓器爲對壓電元件之一次電極供給輸入交替電壓而利用壓 電效果產生機械振動，從二次側電極取出藉由以壓電變壓 器之形狀所決定之昇壓比被電壓放大之電壓的電壓變換元 ' 件。 該壓電變壓器因並非利用繞線使磁能介於中間而予以 變壓之方法，故不會有產生漏磁通之情形。因此，有不將 Φ 雜音釋放出於反相器之外部的優點。除此之外，壓電變壓 器因僅選擇以外形尺寸決定之共振頻率而予以輸出，故輸 出波形接近於正弦波，也有較少產生高頻雜音之優點。並 且，壓電變壓器因爲燒成陶瓷材料之無機質，.故具有不會 發煙或起火之危險的優點。 壓電變壓器具有共振特性，因應被輸入至一次側電極 之交流電壓之頻率而自二次側電極所取得之輸出爲不同。 因此，爲了將液晶顯示器等之亮度保持一定，藉由控制被 輸入至壓電變壓器之交流電壓之頻率，可以將自二次側電 -5- 201021625 極所輸出之電壓調整至所欲之位準。 以往之壓電變壓器之驅動電路係藉由類比電路所構成 ，使用類比振盪器，控制電壓之頻率。另外，壓電變壓器 具有由於周圍溫度或壓電變壓器本身之溫度變化，使得頻 率特性變化之情形，或因壓電變壓器之尺寸或壓電特性之 偏差程度，使得頻率特性變化之現象。此時，必須對應於 變化之頻率特性調節供給至壓電變壓器之電壓的頻率。但 是，在以往之類比振盪器中，要以適當之時序控制輸出電 壓之頻率則有困難。在此，期待以可以自由控制自振盪器 輸出之電壓之頻率，將輸出電壓之頻率改變成任意之形狀 的數位振盪器，取代類比振盪器來進行控制。 但是，對於將以類比方式所構成之以往壓電變壓器之 驅動電路予以數位化，爲了取得控制壓電變壓器所需之頻 率精度，需要輸出500 MHz〜1 GHz之時脈訊號的Cpu。但 是，如此高之時脈頻率當考慮輻射干擾或供給電力等時， 作爲驅動冷陰極管之壓電變壓器用，並非係實用性的時脈 頻率。 在此’在專利文獻1中，提案使低頻率之時脈訊號之 驅動脈衝分頻，決定對其分頻之比率，依此取得提升平均 頻率之分解能，控制壓電變壓器所需之頻率精度的方法。 〔先行技術文獻〕 專利文獻 專利文獻1 :日本特開2000-133485號公報 201021625 【發明內容】 〔發明之槪要〕 〔發明所欲解決之課題〕 但是，在專利文獻1之方法中，使時脈訊號分頻之比 率也有界限，無法控制對應於分解能以下之頻率的電壓。 再者，也有分頻用電路要求複雜之構成的問題。本發明之 目的係爲了解決上述問題，提供使用數位振盪器，可以較 Φ 使時脈訊號分頻更簡單之手段取得任意輸出電壓之壓電變 壓器之驅動電路及驅動方法。 〔用以解決課題之手段〕 爲了達成上述目的，本發明係一種壓電變壓器之驅動 ' 電路，具備具有特定共振頻率特性之壓電變壓器；對該壓 電變壓器，輸出特定頻率之電壓的數位振盪器；檢測出上 述壓電變壓器之輸出電壓V,’的輸出檢測部；和根據來自 Φ 上述輸出檢測器之檢測訊號，控制上述數位振盪器輸出之 頻率F!’的控制部，其特徵爲：上述控制部具備有輸出電 壓設定部，用以根據來自上述輸出檢測部之檢測訊號，設 定壓電變壓器之輸出電壓V〆；對應頻率檢測部，用以於 上述數位振盪器無法輸出對應於上述輸出電壓Vi ’之頻率 Fi’之時，決定夾著對應之頻率FT之可輸出的兩個頻率Fi 、F2;頻率輸出部，將上述兩個頻率Fi、F2交替輸出至壓 電變壓器；交替比率設定部，設定使對應於上述兩個頻率 Fi、F2之壓電變壓器之輸出電壓交替產生之比率；和交替 201021625 間隔控制部，將用以根據藉由上述交替比率設定部所設定 之交替比率而輸出上述兩個頻率F,、F2之控制訊號，輸 出至上述頻率輸出部。 本發明之其他態樣係一種壓電變壓器之驅動電路，具 備具有特定共振頻率特性之壓電變壓器；對該壓電變壓器 ，輸出特定頻率之電壓的數位振盪器；檢測出上述壓電變 壓器之輸出電壓V1’的輸出檢測部；和根據來自上述輸出 檢測器之檢測訊號，控制上述數位振盪器輸出之頻率F , ’ 的控制部，其特徵爲：上述控制部具備有輸出電壓設定部 ，用以根據來自上述輸出檢測部之檢測訊號，設定壓電變 壓器之輸出電壓VT ;對應頻率檢測部，檢測上述數位振 盪器是否可以輸出對應於上述輸出電壓設定部所設定之輸 出電壓V1’之頻率F，’並且於上述數位振盪器無法輸出對 應於輸出電壓 V,’之頻率Fi’之時，決定夾著對應之頻率 FT之可輸出的兩個頻率Fi、F2;頻率輸出部，於可以輸 出對應於輸出電壓VT之頻率Fi’時，將其頻率F,’輸出至 壓電變壓器，於無法輸出對應於輸出電壓V,’之頻率F,’時 ，將夾著其頻率Fi’之兩個頻率F!、F2交替輸出至壓電變 壓器；交替比率設定部，設定使對應於上述對應頻率檢測 部所檢測之兩個頻率F1、F2之壓電變壓器之輸出電壓交 替產生之比率；和交替間隔控制部’將用以根據藉由上述 交替比率設定部所設定之交替比率而輸出上述頻率輸出部 中之兩個頻率Fi'F2之控制訊號’輸出至上述頻率輸出 部。 -8- 201021625 在本發明中，上述交替比率設定部所設定之交替比率 係可由對應於上述對應頻率檢測部所決定之頻率f!'F2 之輸出電壓和所設定之輸出電壓VT’藉由Δν2-V〆：AVT-Vi之比率決定。 在本發明中，上述交替比率設定部亦可以設定事先所 決定之設定値以當作交替比率。 在具有如此構成之本發明中，藉由將驅動壓電變壓器 之電壓設爲時間變化電壓，即使非高性能之CPU ’亦可控 制對應於壓電變壓器之共振頻率的電壓。 在此，產生之時間變化電壓係藉由使對應於壓電變壓 器之輸出電壓V"之前後之電壓ν,、ν2之頻率Ft'Fa交 替產生，在上述壓電變壓器產生近似電壓。壓電變壓器電 路因電容成分多，故電壓之變化反應慢。依此，被積分之 間的電壓被輸出。藉由使頻率交替，可以產生幾乎與放入 控制壓電變壓器之輸出電壓之頻率之狀態相同的電壓。 並且，使用上述各種壓電變壓器之驅動電路，產生對 應於控制電路之分解能以下之頻率之電壓時，藉由使對應 於其電壓之前後之電壓的頻率交替產生，使上述壓電變壓 器產生近似電壓之方法也爲本發明之一態樣。 〔發明效果〕 若藉由上述般之本發明，於以數位電路驅動壓電變壓 器之時，藉由使對應於壓電變壓器之輸出電壓vr之共振 頻率F〆之前後之頻率Fi和頻率F2交替產生，由壓電變 -9 - 201021625 壓器交替輸出對應於該頻率之輸出電壓 其結果兩輸出電壓被平均化可以產生幾乎與輸出電壓vr 相等之電壓。依此，不需要經常產生與壓電變壓器之共振 頻率相同之頻率。依此，當考慮輻射干擾或供給電力等時 ，不需要無實用性之高性能CPU，即使爲比較容易操作之 CPU，亦可以對應於因壓電變壓器之偏差程度所引起之頻 率偏離，因負荷及動作溫度等所引起之壓電變壓器之變化 ，並產生所期待之輸出電壓。 【實施方式】 [本實施型態] [1_構成] 第1圖之方塊圖表示本實施型態之壓電變壓器之驅動 電路之構成。第2圖爲表示第1圖之控制部4之內部之方 塊圖，第3圖爲表示數位振盪器5之內部的方塊圖。 本實施型態之電路爲驅動壓電變壓器1之數位電路， 在本實施型態中爲包含冷陰極管之電路。壓電變壓器1爲 用以取出被放大之電壓的變壓元件，對冷陰極管2施加由 壓電變壓器1所輸出之電壓。輸出檢測部3檢測出流動於 冷陰極管2之電流，變換成電壓訊號。控制部4係根據輸 出檢測部3所檢測出之電壓訊號而對數位振盪器5決定設 定値η輸出其訊號。數位振盪器5係根據藉由控制部4所 送出之設定値η之訊號作成特定頻率之時間變化電壓，並 使時間變化電壓輸入至壓電變壓器1，依此可以依照壓電 -10- 201021625 變壓器1所持有之頻率一電壓特性’輸出對應於輸入頻率 之所期待的電壓。 ❹[Technical Field] The present invention relates to a driving circuit of a piezoelectric transformer used in a cold cathode tube of various backlights and the like, and a driving method therefor. [Prior Art] In recent years, a liquid crystal display screen has been installed as a liquid crystal display Φ device such as a notebook computer. In such a liquid crystal display screen, a piezoelectric transformer is used as a step-up transformer for driving a cold cathode tube of a backlight or the like. The piezoelectric transformer generates an alternating voltage by supplying an alternating voltage to the primary electrode of the piezoelectric element, and generates a mechanical vibration by a piezoelectric effect, and extracts a voltage amplified by the voltage by a voltage-dependent ratio determined by the shape of the piezoelectric transformer from the secondary side electrode. Voltage conversion element'. Since the piezoelectric transformer is not subjected to a method of transforming magnetic energy by using a winding, the leakage magnetic flux does not occur. Therefore, there is an advantage that the Φ noise is not released outside the inverter. In addition, since the piezoelectric transformer is output by selecting only the resonance frequency determined by the external dimensions, the output waveform is close to a sine wave, and there is also an advantage that low-frequency noise is less generated. Moreover, since the piezoelectric transformer is fired into the inorganic material of the ceramic material, it has the advantage of not smouldering or igniting. The piezoelectric transformer has a resonance characteristic, and the output obtained from the secondary side electrode is different depending on the frequency of the alternating voltage input to the primary side electrode. Therefore, in order to keep the brightness of the liquid crystal display or the like constant, by controlling the frequency of the AC voltage input to the piezoelectric transformer, the voltage output from the secondary side power -5,216,216,25 can be adjusted to a desired level. . In the past, the driving circuit of the piezoelectric transformer was constructed by an analog circuit, and an analog oscillator was used to control the frequency of the voltage. Further, the piezoelectric transformer has a phenomenon in which the frequency characteristics are changed due to the ambient temperature or the temperature change of the piezoelectric transformer itself, or the frequency characteristics are changed due to the degree of deviation of the piezoelectric transformer or the piezoelectric characteristics. At this time, the frequency of the voltage supplied to the piezoelectric transformer must be adjusted corresponding to the varying frequency characteristics. However, in the conventional analog oscillators, it is difficult to control the frequency of the output voltage at an appropriate timing. Here, it is expected that a digital oscillator that can freely control the frequency of the voltage output from the oscillator to change the frequency of the output voltage to an arbitrary shape is used instead of the analog oscillator. However, in order to digitize the driving circuit of the conventional piezoelectric transformer which is formed in an analogy manner, in order to obtain the frequency accuracy required for controlling the piezoelectric transformer, it is necessary to output a CPU of a clock signal of 500 MHz to 1 GHz. However, such a high clock frequency is not a practical clock frequency as a piezoelectric transformer for driving a cold cathode tube when considering radiation interference or supplying electric power or the like. Here, in Patent Document 1, it is proposed to divide the drive pulse of the low-frequency clock signal to determine the ratio of the frequency division thereof, thereby obtaining the decomposition energy of the average frequency and controlling the frequency precision required for the piezoelectric transformer. method. [Provisions of the Invention] [Patent Document 1] Japanese Patent Laid-Open Publication No. 2000-133485 No. 201021625 [Summary of the Invention] [Problems to be Solved by the Invention] However, in the method of Patent Document 1, the time is The ratio of the frequency division of the pulse signal also has a limit, and it is impossible to control the voltage corresponding to the frequency below the decomposition energy. Furthermore, there is also a problem that a circuit for frequency division requires a complicated configuration. SUMMARY OF THE INVENTION An object of the present invention is to provide a driving circuit and a driving method for a piezoelectric transformer which can obtain an arbitrary output voltage by using a digital oscillator and using a digital oscillator to make the frequency division of the clock signal simpler. [Means for Solving the Problem] In order to achieve the above object, the present invention is a piezoelectric transformer driving circuit having a piezoelectric transformer having a specific resonance frequency characteristic; for the piezoelectric transformer, outputting a digital oscillation of a voltage of a specific frequency An output detecting unit that detects an output voltage V, ' of the piezoelectric transformer; and a control unit that controls a frequency F!' of the digital oscillator output based on a detection signal from the output detector of the Φ, wherein: The control unit includes an output voltage setting unit configured to set an output voltage V〆 of the piezoelectric transformer based on a detection signal from the output detection unit, and a corresponding frequency detection unit for outputting the output corresponding to the digital oscillator When the frequency Vi' is at the frequency Fi', the two frequencies Fi and F2 that can be outputted with the corresponding frequency FT are determined; the frequency output unit alternately outputs the two frequencies Fi and F2 to the piezoelectric transformer; a portion that sets an output ratio of alternating output voltages of the piezoelectric transformers corresponding to the two frequencies Fi and F2; and Alternate 201021625 The interval control unit outputs a control signal for outputting the two frequencies F and F2 based on the alternate ratio set by the alternation ratio setting unit, and outputs the control signal to the frequency output unit. Another aspect of the present invention is a driving circuit of a piezoelectric transformer, comprising a piezoelectric transformer having a specific resonant frequency characteristic; a piezoelectric oscillator that outputs a voltage of a specific frequency; and an output of the piezoelectric transformer is detected An output detecting unit of the voltage V1'; and a control unit for controlling the frequency F, ' of the digital oscillator output based on the detection signal from the output detector, wherein the control unit includes an output voltage setting unit for And setting an output voltage VT of the piezoelectric transformer according to the detection signal from the output detecting unit; and the corresponding frequency detecting unit detects whether the digital oscillator can output the frequency F corresponding to the output voltage V1′ set by the output voltage setting unit, 'When the above-mentioned digital oscillator cannot output the frequency Fi' corresponding to the output voltage V,', the two frequencies Fi and F2 that can be outputted with the corresponding frequency FT are determined; the frequency output portion can be output corresponding to When the frequency of the output voltage VT is Fi', the frequency F, ' is output to the piezoelectric transformer, and cannot be output. When the output voltage V, 'the frequency F,', the two frequencies F! and F2 sandwiching the frequency Fi' are alternately output to the piezoelectric transformer; the alternating ratio setting unit is set to correspond to the corresponding frequency detecting unit. a ratio at which the output voltages of the piezoelectric transformers of the two detected frequencies F1 and F2 are alternately generated; and an alternate interval control unit 'to be outputted to the frequency output portion according to an alternate ratio set by the alternating ratio setting unit The two control signals of the frequency Fi'F2 are output to the above-mentioned frequency output unit. -8- 201021625 In the present invention, the alternation ratio set by the alternation ratio setting unit may be an output voltage corresponding to the frequency f!'F2 determined by the corresponding frequency detecting unit and the set output voltage VT' by Δν2 -V〆: The ratio of AVT-Vi is determined. In the present invention, the alternation ratio setting unit may set a setting determined in advance to be an alternating ratio. In the invention having such a configuration, by setting the voltage for driving the piezoelectric transformer to a time varying voltage, even a non-high performance CPU' can control the voltage corresponding to the resonance frequency of the piezoelectric transformer. Here, the generated time varying voltage is generated by alternately generating the voltage Ft'Fa corresponding to the output voltage V" of the piezoelectric transformer before and after the voltage ν, ν2, and the piezoelectric transformer generates an approximate voltage. Since the piezoelectric transformer circuit has many capacitance components, the voltage change is slow. Accordingly, the voltage between the points is output. By alternating the frequencies, it is possible to generate a voltage which is almost the same as the state of the frequency at which the output voltage of the piezoelectric transformer is controlled. Further, when the voltages of the frequencies corresponding to the decomposition energy of the control circuit are generated using the drive circuits of the various piezoelectric transformers described above, the piezoelectric transformers are caused to generate an approximate voltage by alternately generating frequencies corresponding to voltages before and after the voltages thereof. The method is also an aspect of the invention. [Effect of the Invention] According to the present invention as described above, when the piezoelectric transformer is driven by the digital circuit, the frequency Fi and the frequency F2 before and after the resonance frequency F 对应 corresponding to the output voltage vr of the piezoelectric transformer are alternated. Produced by the piezoelectric transformer -9 - 201021625 The voltage regulator alternately outputs an output voltage corresponding to the frequency. As a result, the two output voltages are averaged to generate a voltage almost equal to the output voltage vr. Accordingly, it is not necessary to frequently generate the same frequency as the resonant frequency of the piezoelectric transformer. Accordingly, when considering radiation interference or supplying power, etc., there is no need for a high-performance CPU that is not practical, and even for a CPU that is relatively easy to operate, it can correspond to a frequency deviation caused by the degree of deviation of the piezoelectric transformer, due to the load. And changes in the piezoelectric transformer caused by the operating temperature, etc., and produce the desired output voltage. [Embodiment] [This embodiment] [1_Configuration] Fig. 1 is a block diagram showing the configuration of a driving circuit of a piezoelectric transformer of this embodiment. Fig. 2 is a block diagram showing the inside of the control unit 4 in Fig. 1, and Fig. 3 is a block diagram showing the inside of the digital oscillator 5. The circuit of this embodiment is a digital circuit for driving the piezoelectric transformer 1. In the present embodiment, it is a circuit including a cold cathode tube. The piezoelectric transformer 1 is a transformer element for taking out the amplified voltage, and the voltage output from the piezoelectric transformer 1 is applied to the cold cathode tube 2. The output detecting unit 3 detects the current flowing in the cold cathode tube 2 and converts it into a voltage signal. The control unit 4 determines the setting 値η to output the signal to the digital oscillator 5 based on the voltage signal detected by the output detecting unit 3. The digital oscillator 5 generates a time-varying voltage of a specific frequency based on the signal of the setting 送N sent from the control unit 4, and inputs a time-varying voltage to the piezoelectric transformer 1, whereby the transformer can be used according to the piezoelectric-10-201021625 transformer. The frequency-voltage characteristic held by 1 'outputs the expected voltage corresponding to the input frequency. ❹
如第2圖所示般，控制部4具備設定壓電變壓器1之 輸出電壓V!’之輸出電壓設定部41。輸出電壓設定部41 係根據輸出檢測部3所檢測之電壓訊號’設定壓電變壓器 1之輸出電壓vr。再者，不僅來自壓電變壓器1之輸出 電壓之資訊，亦可以根據來自操作部6之指令’設定輸出 電壓V，，該操作部6係輸出用以設定亮度調整訊號等之 輸出電壓之訊號。 控制部4具備檢測數位振盪器5是否可以輸出對應於 所設定之輸出電壓Vi’之頻率Fi’之對應頻率檢測部42。 該對應頻率檢測部42於數位振盪器5無法輸出對應於壓 電變壓器1之輸出電壓VT的頻率FT之時，決定夾著對應 之頻率FT之可輸出的頻率F!、F2。 控制部4具備於數位振盪器5可以輸出對應於壓電變 壓器1之輸出電壓V,’之頻率F,’之時，將用以對數位振盪 器輸出頻率Fi’之設定値η輸出至數位振盪器的頻率輸出 部45。並且，頻率輸出部45係根據交替比率設定部43所 設定之交替比率，將用以對數位振盪器5輸出時間變化電 壓之設定値η輸出至數位振盪器5。 控制部4具備決定交替頻率？,、？2之比率的交替比 率設定部43，和藉由該交替比率設定部43，依照所設定 之比率，輸出切換頻率F,、F2之訊號的交替間隔控制部 44。 -11 - 201021625 如第3圖所示般，數位振盪器5具備屬於產生基準頻 率fs之電路的時脈產生電路51，和常時計算在時脈產生 電路所產生之頻率fs之基準時脈^的計數器52。再者， 藉由自時脈基準頻率fs和控制器4之設定値η，輸出分頻 脈衝之Π的比較器53，和正反器電路54，其屬於用以整 形自比較器53輸出之訊號邊緣的重定時電路。 ❹ [2.作用效果] [2·1·槪略]As shown in Fig. 2, the control unit 4 includes an output voltage setting unit 41 that sets the output voltage V!' of the piezoelectric transformer 1. The output voltage setting unit 41 sets the output voltage vr of the piezoelectric transformer 1 based on the voltage signal detected by the output detecting unit 3. Further, not only the information on the output voltage of the piezoelectric transformer 1, but also the output voltage V may be set based on the command from the operation unit 6, and the operation unit 6 outputs a signal for setting the output voltage of the brightness adjustment signal or the like. The control unit 4 includes a corresponding frequency detecting unit 42 that detects whether or not the digital oscillator 5 can output a frequency Fi' corresponding to the set output voltage Vi'. When the digital oscillator 5 cannot output the frequency FT corresponding to the output voltage VT of the piezoelectric transformer 1, the corresponding frequency detecting unit 42 determines the frequencies F! and F2 that can be output with the corresponding frequency FT interposed therebetween. The control unit 4 is provided when the digital oscillator 5 can output the frequency F, ' corresponding to the output voltage V, ' of the piezoelectric transformer 1, and outputs the setting 値η for the digital oscillator output frequency Fi' to the digital oscillation. The frequency output unit 45 of the device. Further, the frequency output unit 45 outputs a setting 値η for outputting the time varying voltage to the digital oscillator 5 to the digital oscillator 5 in accordance with the alternation ratio set by the alternation ratio setting unit 43. The control unit 4 has a determination of the alternate frequency? ,,? The alternate ratio setting unit 43 of the ratio of 2 and the alternate ratio setting unit 43 output the alternate interval control unit 44 for switching the signals of the frequency F and F2 in accordance with the set ratio. -11 - 201021625 As shown in Fig. 3, the digital oscillator 5 is provided with a clock generation circuit 51 belonging to a circuit for generating a reference frequency fs, and a reference clock for calculating the frequency fs generated by the clock generation circuit at all times. Counter 52. Furthermore, by means of the clock reference frequency fs and the setting 控制器η of the controller 4, the comparator 53 of the divided pulse is output, and the flip-flop circuit 54 belongs to the signal for shaping the output from the comparator 53. Edge retiming circuit. ❹ [2. Effect] [2·1·槪略]
第5圖爲表示壓電變壓1之輸出電壓和共振頻率之關 係圖。如第5圖所示般，壓電變壓器1之輸出電壓對所輸 入之電壓之頻率決定輸出電壓。但是，壓電變壓器1因藉 由溫度或負荷等之環境變化，共振頻率變化，故當以一定 頻率驅動壓電變壓器1時，共振頻率和所輸入之電壓之頻 率之相對關係則變化。即是，所輸入之電壓之頻率離壓電 變壓器1之共振頻率很遠時，依據壓電變壓器1之電壓昇 壓比明顯下降。因此，於屬於負荷之冷陰極管2無法流動 充分之電流，無法保持冷陰極管2之亮度。 因此，爲了對應於壓電變壓器1之特性之變化，在第 1圖之電路中，藉由輸出檢測部3，檢測流入冷陰極管2 之電流。藉由溫度或負荷等之環境變化，壓電變壓器1之 共振頻率之特性變化時，流入冷陰極管2之電流則變化。 輸出檢測部3檢測其變化，對控制部4發送訊號。 控制部4係以流動於冷陰極管2之電流成爲一定之方 -12- 201021625 式，對數位振盪器5輸出訊號。數位振盪器5係藉由根據 其訊號之頻率’驅動壓電變壓器1。藉由該控制，冷陰極 管2以幾乎一定之亮度點燈。 但是，於以數位電路驅動壓電變壓器1之時，則有無 法產生對應於CPU分解能之關係上輸出電壓之輸入電壓 的頻率之情形。此時’藉由使對應於壓電變壓器1之輸出 電壓VT之共振頻率F!’之前後之頻率F,和頻率F2交替產 φ 生，而產生幾乎與輸出電壓V，相等之電壓。 [2.2_詳細] 接著’依照第4圖之流程圖具體說明第1圖至第3圖 所示之本實施型態之控制部4之動作。該處理係根據輸出 ' 檢測部3所檢測出之電壓訊號或來自操作部6之指示，自 壓電變壓器1輸出所期待之輸出電壓的處理。 首先，就以步驟1而言，根據輸出檢測部3所檢測出 φ 之訊號’藉由輸出電壓設定部41設定壓電變壓器1之輸 出電壓V〆，或藉由來自操作部6之指示來設定。就以來 自此時之操作部6之指示而言，僅壓電變壓器1之輸出電 壓Vi’之値，並不需要交替電壓交替比率之値等。 然後，就以步驟2而言，係檢測出對應於在步驟1所 設定之輸出電壓V!’之頻率FT。此時於使用分解能大之 CPU之時，當位於可以輸出頻率Fl’之頻率和頻率之間時 ’因分解能之關係，無法輸出頻率FT。藉由步驟3執行 其判定。數位振盪器5若可以產生頻率FT時，則前進至 -13- 201021625 步驟4’於無法產生之時，則前進至步驟7。 控制部4爲數位振盪器5可以輸出對應於所設定之輸 出電壓V!’之頻率F,’之時的步驟。在該步驟中，藉由對應 頻率檢測部42，設定數位振盪器5用以輸出頻率F Γ之設 定値η。然後，藉由頻率輸出部45，將設定値η輸出至數 位振盪器5。 在步驟5中，根據在步驟4中所設定之設定値η，藉 由數位振盪器5產生頻率F,’之電壓。在該步驟中，於數 位振盪器5之內部，藉由時脈產生電路產生基準頻率fs。 藉由計數器52常時計數該基準頻率fs之基準時脈es。該 計數値和藉由控制部4所設定之設定値n被輸入至比較器 5 3。然後，每計數値和設定値η —致之時，比較器5 3則 動作’重置計數器52，並且輸出分頻脈衝el。此時之分 頻脈衝el之頻率Π成爲fl= fs/n。數位振盪器5係將分 頻脈衝el之頻率Π當作對應於電壓Vi ’之頻率FT，對壓 電變壓器1輸出。 步驟6輸出根據數位振盪器5所輸出之頻率FT之電 壓的輸出電壓V"。 另外，在上述步驟3中，因數位振盪器5之分解能大 而無法輸出對應於所設定之輸出電壓V!’之頻率F"之時， 則前進至步驟7。在該步驟7中，對應頻率檢測部42夾著 F〆，決定可輸出之兩個頻率F,、F2。然後，在步驟8中 ，設定數位振盪器5用以輸出頻率F,和頻率F22設定値 η 1 、η 2 〇 -14- 201021625 在步驟9中，藉由交替比率設定部43 ’計算 率F!和頻率f2之電壓Vl和電壓V2’自輸出電壓 △ V2-V〆，。然後，在步驟1〇中，交替 部44以對應於Δν2: V,，： Δν^-V】之交替比率 値ηΐ、Π2輸出至數位振盪器5。 步驟11係在數位振盪器5中’以在步驟1〇 交替比率，使根據在步驟8所設定之設定値nl、 φ 率F1、F25替產生。之後，在步驟12中’輸出 振盪器5所輸出之頻率F i和頻率F2之時間變化 出電壓V,，。 藉由以上之動作，即使無法輸出對應於壓電 之輸出電壓VT之頻率FT之時，藉由使夾著對, • FT之兩個頻率Fi和頻率F2交替產生，則可近似 電變壓器1之輸出電壓。尤其，因壓電變壓器1 般以電容成分爲多，故電壓變化之反應慢，所以 ❹ h和頻率F2交替產生而近似性使電壓V!和電壓 的輸出電壓V〆產生。 依此，因不需要直接產生對應於輸出電壓之 即使不使用輸出500MHz〜1GHz之時脈訊號的高' ，亦可控制對應於壓電變壓器之共振頻率的電壓' [3.其他實施型態] 在本發明之其他實施型態中，即使將在交替 部中事先設定之設定値當作交替比率而予以設定Fig. 5 is a graph showing the relationship between the output voltage of the piezoelectric transformer 1 and the resonance frequency. As shown in Fig. 5, the output voltage of the piezoelectric transformer 1 determines the output voltage with respect to the frequency of the input voltage. However, since the piezoelectric transformer 1 changes its resonance frequency due to environmental changes such as temperature or load, when the piezoelectric transformer 1 is driven at a constant frequency, the relative relationship between the resonance frequency and the frequency of the input voltage changes. That is, when the frequency of the input voltage is far from the resonance frequency of the piezoelectric transformer 1, the voltage-to-voltage ratio of the piezoelectric transformer 1 is significantly lowered. Therefore, the cold cathode tube 2 belonging to the load cannot flow a sufficient current, and the brightness of the cold cathode tube 2 cannot be maintained. Therefore, in order to cope with the change in the characteristics of the piezoelectric transformer 1, in the circuit of Fig. 1, the current flowing into the cold cathode tube 2 is detected by the output detecting portion 3. When the characteristics of the resonance frequency of the piezoelectric transformer 1 change due to environmental changes such as temperature or load, the current flowing into the cold cathode tube 2 changes. The output detecting unit 3 detects the change and transmits a signal to the control unit 4. The control unit 4 outputs a signal to the digital oscillator 5 in such a manner that the current flowing through the cold cathode tube 2 becomes constant -12-201021625. The digital oscillator 5 drives the piezoelectric transformer 1 by the frequency ' according to its signal. With this control, the cold cathode tube 2 is lit with almost constant brightness. However, when the piezoelectric transformer 1 is driven by a digital circuit, there is a case where a frequency corresponding to the input voltage of the output voltage in the relationship of the CPU decomposition energy is generated. At this time, a voltage which is almost equal to the output voltage V is generated by alternately generating the frequency F and the frequency F2 which are before and after the resonance frequency F!' corresponding to the output voltage VT of the piezoelectric transformer 1. [2.2_Details] Next, the operation of the control unit 4 of the present embodiment shown in Figs. 1 to 3 will be specifically described in accordance with the flowchart of Fig. 4. This processing is a process of outputting a desired output voltage from the piezoelectric transformer 1 based on the output of the voltage signal detected by the detecting unit 3 or an instruction from the operation unit 6. First, in step 1, the output voltage V〆 of the piezoelectric transformer 1 is set by the output voltage setting unit 41 based on the signal φ detected by the output detecting unit 3, or is set by an instruction from the operation unit 6. . Since the indication of the operation unit 6 at this time, only the output voltage Vi' of the piezoelectric transformer 1 is not required to alternate between the voltage alternating ratios. Then, in the case of step 2, the frequency FT corresponding to the output voltage V!' set in step 1 is detected. At this time, when using a CPU having a large decomposition power, when it is located between the frequency and the frequency at which the frequency F1' can be output, the frequency FT cannot be output due to the relationship of the decomposition energy. The decision is performed by step 3. When the digital oscillator 5 can generate the frequency FT, the process proceeds to -13-201021625. If the step 4' cannot be generated, the process proceeds to step 7. The control unit 4 is a step when the digital oscillator 5 can output a frequency F,' corresponding to the set output voltage V!'. In this step, the digital oscillator 5 is set by the corresponding frequency detecting unit 42 to output the set value 频率 of the frequency F 。 . Then, the setting 値η is output to the digital oscillator 5 by the frequency output unit 45. In step 5, the voltage of the frequency F,' is generated by the digital oscillator 5 in accordance with the setting ?n set in the step 4. In this step, inside the digital oscillator 5, the reference frequency fs is generated by the clock generating circuit. The reference clock es of the reference frequency fs is constantly counted by the counter 52. The count 値 and the setting 値n set by the control unit 4 are input to the comparator 53. Then, each time 値 and the setting — are made, the comparator 53 operates to reset the counter 52 and output the divided pulse el. At this time, the frequency Π of the frequency-divided pulse Π becomes fl=fs/n. The digital oscillator 5 outputs the frequency of the frequency-divided pulse el as the frequency FT corresponding to the voltage Vi' to the piezoelectric transformer 1. Step 6 outputs an output voltage V" according to the voltage of the frequency FT output from the digital oscillator 5. Further, in the above step 3, when the factor bit oscillator 5 is decomposed to be large and the frequency F" corresponding to the set output voltage V!' cannot be output, the process proceeds to step 7. In the step 7, the corresponding frequency detecting unit 42 determines the two frequencies F and F2 that can be output, with F〆 interposed therebetween. Then, in step 8, the digital oscillator 5 is set to output the frequency F, and the frequency F22 is set to 値η1, η2 〇-14- 201021625. In step 9, the ratio F is calculated by the alternation ratio setting unit 43'! And the voltage V1 of the frequency f2 and the voltage V2' are self-output voltage ΔV2-V〆. Then, in step 1A, the alternating portion 44 is output to the digital oscillator 5 at an alternating ratio 値ηΐ, Π2 corresponding to Δν2: V,,: Δν^-V]. Step 11 is performed in the digital oscillator 5' by alternating ratios in step 1 , so that the settings 値nl, φ rates F1, F25 set in step 8 are generated. Thereafter, in step 12, the frequency V i and the frequency F2 outputted from the oscillator 5 are outputted to change the voltage V, . With the above operation, even if the frequency FT corresponding to the piezoelectric output voltage VT cannot be output, by alternately generating the two frequencies Fi and the frequency F2 of the FT, the electric transformer 1 can be approximated. The output voltage. In particular, since the piezoelectric transformer 1 has a large capacitance component, the response of the voltage change is slow, so that ❹ h and the frequency F2 are alternately generated, and the voltage V! and the voltage output voltage V〆 are similarly generated. Accordingly, since it is not necessary to directly generate a high voltage corresponding to the output voltage regardless of the output of the 500 MHz to 1 GHz clock signal, the voltage corresponding to the resonant frequency of the piezoelectric transformer can be controlled. [3. Other embodiments] In other embodiments of the present invention, even if the setting 事先 set in advance in the alternating portion is set as an alternating ratio
對應於頻 ! V!’運算 間隔控制 ，將設定 所設定之 n2之頻 根據數位 電壓的輸 變壓器1 應之頻率 性產生壓 之電路一 可使頻率 V 2之間 頻率，故 注會g CPU 比率設定 亦可。藉 -15- 201021625 由以1 : 1之比率使頻率F!和頻率F2交替產生’藉此即使 未運算交替比率，亦可以使數位振盪器之分解能設爲1/2 。依此，可以更簡單之方法輸出接近對應於輸出電壓vr 之頻率FT的頻率。 【圖式簡單說明】 第1圖爲表示本發明之一實施型態之構成的方塊圖。 第2圖爲表示第1圖之實施型態中之控制部4之內部 構成之方塊圖。 第3圖爲表示第1圖之實施型態中之數位振盪器5之 內部構成之方塊圖。 第4圖爲表示第1圖之實施型態之流程圖。 第5圖爲表示第1圖之實施型態中之壓電變壓器之輸 出電壓和共振頻率之關係圖。 【主要元件符號說明】 1 :壓電變壓器 2 :冷陰極管 3 :輸出檢測部 4 :控制部 5 :數位振盪器 6 :操作部 41 :輸出電壓設定部 42 :對應頻率檢測部 -16- 201021625 43 :交替比率設定部 44 ‘·交替間隔控制部 45 =頻率輸出部 51 :時脈產生電路 52 :計數器 5 3 :比較器 54 :正反器電路Corresponding to the frequency! V!' arithmetic interval control, will set the frequency of the set n2 according to the digital voltage of the transformer 1 to generate the voltage of the circuit, the frequency can be between the frequency V 2, so the rate will be g CPU ratio Settings are also available. By -15-201021625, the frequency F! and the frequency F2 are alternately generated by a ratio of 1:1. Thus, even if the alternating ratio is not calculated, the decomposition energy of the digital oscillator can be set to 1/2. Accordingly, the frequency close to the frequency FT corresponding to the output voltage vr can be output in a simpler manner. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a block diagram showing the configuration of an embodiment of the present invention. Fig. 2 is a block diagram showing the internal structure of the control unit 4 in the embodiment of Fig. 1. Fig. 3 is a block diagram showing the internal configuration of the digital oscillator 5 in the embodiment of Fig. 1. Fig. 4 is a flow chart showing the embodiment of Fig. 1. Fig. 5 is a graph showing the relationship between the output voltage and the resonance frequency of the piezoelectric transformer in the embodiment of Fig. 1. [Description of main component symbols] 1 : Piezoelectric transformer 2 : Cold cathode tube 3 : Output detection unit 4 : Control unit 5 : Digital oscillator 6 : Operation unit 41 : Output voltage setting unit 42 : Corresponding frequency detection unit - 16 - 201021625 43 : Alternating ratio setting unit 44 '· Alternating interval control unit 45 = Frequency output unit 51 : Clock generation circuit 52 : Counter 5 3 : Comparator 54 : Flip-flop circuit
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