201017302 九、發明說明： 【發明所屬之技術領域】 本發明關於一種薄膜電晶體基板、顯示面板、顯示裝 置及其製造方法。 【先前技術】 請同時參考圖1A及圖1B，其中圖1A為習知之薄膜 電晶體基板1的俯視圖，圖1B為圖1A中沿A-A線的剖 〇 面示意圖。薄膜電晶體基板1具有一畫素電極11、一儲存 電極12、一介電層13及一基板14。儲存電極12設置於 基板14上，畫素電極11設置於儲存電極12之上，而介 電層13設置於畫素電極11及儲存電極12之間，使得畫 素電極11及儲存電極12之間形成一儲存電容。 由於儲存電容之電容值會影響畫面品質好壞，例如當 電容值太小時晝面容易產生閃爍（flicker )及串音 (cross-talk )等現象，因此，如何維持足夠之電容值係為 必要之考量設計。常見的做法係利用不透光的金屬作為儲 存電極，以提高儲存電容值，然而不透光的金屬將會導致 畫素的開口率下降，進而對影像的顯示效果與品質造成影 響。 > 【發明内容】 有鑑於上述課題，本發明之目的為提供一種能提高電 容值及開口率的薄膜電晶體基板、顯示面板、顯示裝置及 5 201017302 其製造方法。 A為達^目的，依據本發明之—㈣膜電晶體 含複數行㈣線錢複數__。該些線與該^ 描線定義出複數個晝素區域，其中每一畫素區域包含至小 ::素電:二至少一儲存電極以及一介電層，存電極二 畫素電極相對而設，且儲存電極具有一透光部及1光 部。介電層設置於儲存電極與畫素電極之間。 ❹201017302 IX. Description of the Invention: [Technical Field] The present invention relates to a thin film transistor substrate, a display panel, a display device, and a method of fabricating the same. [Prior Art] Please refer to FIG. 1A and FIG. 1B together, wherein FIG. 1A is a plan view of a conventional thin film transistor substrate 1, and FIG. 1B is a cross-sectional view taken along line A-A of FIG. 1A. The thin film transistor substrate 1 has a pixel electrode 11, a storage electrode 12, a dielectric layer 13, and a substrate 14. The storage electrode 12 is disposed on the substrate 14, the pixel electrode 11 is disposed on the storage electrode 12, and the dielectric layer 13 is disposed between the pixel electrode 11 and the storage electrode 12, such that the pixel electrode 11 and the storage electrode 12 are disposed. A storage capacitor is formed. Since the capacitance value of the storage capacitor affects the quality of the picture, for example, when the capacitance value is too small, flicker and cross-talk are likely to occur, so how to maintain sufficient capacitance is necessary. Consider the design. A common practice is to use an opaque metal as a storage electrode to increase the storage capacitance value. However, an opaque metal will cause a decrease in the aperture ratio of the pixel, which in turn affects the display effect and quality of the image. SUMMARY OF THE INVENTION In view of the above problems, an object of the present invention is to provide a thin film transistor substrate, a display panel, a display device, and a method for manufacturing the same that can improve a capacitance value and an aperture ratio. A is a purpose, according to the invention - (iv) film transistor containing a plurality of lines (four) line money plural __. The lines and the lines define a plurality of pixel regions, wherein each of the pixel regions comprises a small: a plurality of memory electrodes: at least one storage electrode and a dielectric layer, and the storage electrode two pixels are oppositely disposed. And the storage electrode has a light transmitting portion and a light portion. The dielectric layer is disposed between the storage electrode and the pixel electrode. ❹
為達上述目的，依據本發明之一種顯示面板包含 向基板及-薄膜電晶體基板。薄棋電晶體基板與對板 相對而設’且薄膜電晶體基板具有複數行資料線及複數列 掃描線，㈣賴線與該些㈣複數個畫素區 其中母一畫素區域内包含至少一畫素電極、至少一儲 ，電極及-介電層。儲存電極與畫素電極相對而設，且儲 存電極具有—錢部及—非透光部。介電層設置於儲存電 極與畫素電極之間。 …為達上述目的’依據本發明之—種顯示裝置包含一背 光模組及—顯示面板。顯示面板係鄰設於背光模組，其中 顯不面板包含-對向基板及—薄膜電晶體基板。薄膜電晶 體基板與對向基板相對而設，且薄膜電晶體基板包含至少 -畫素電極、至少1存電極及_介電層。儲存電極與畫 素電極相對而又’且儲存電極具有一透光部及一非透光 部。介電層設置於儲麵極與畫素電極之I。 為達上述目的，依據本發明之一種薄膜電晶體基板的 製造方法包含以下步驟：於—基板上形成—儲存電極，其 201017302 中儲存電極具有一透光部及一非透光部；以及形成一畫素 電極於儲存電極之上。 為達上述目的，依據本發明之一種顯示面板的製造方 法包含以下步驟：於一基板上形成一儲存電極，其中儲存 電極具有一透光部及一非透光部；以及形成一畫素電極於 儲存電極之上。 為達上述目的，依據本發明之一種顯示裝置的製造方 法包含以下步驟：於一基板上形成一儲存電極，其中儲存 ❹ 電極具有一透光部及一非透光部；以及形成一畫素電極於 儲存電極之上。 承上所述，依據本發明之一種薄膜電晶體基板、顯示 面板、顯示裝置及其製造方法，係將儲存電極與畫素電極 相對而設，使得儲存電極的透光部及非透光部分別與畫素 電極形成一儲存電容。本發明利用透光部以提高儲存電容 值，相對地非透光部的面積可縮小，進而可提高晝素的開 口率。 【實施方式】 以下將參照相關圖式，說明依本發明較佳實施例之薄 膜電晶體基板、顯示面板、顯示裝置及其製造方法，其中 相同的元件將以相同的參照符號加以說明。 圖2為本發明較佳實施例之一種薄膜電晶體基板2的 示意圖。薄膜電晶體基板2包含複數行資料線DLi-DLm 及複數列掃描線SI^-SLn，該些資料線DLi-DLm與該些 7 201017302 掃描線定義出複數個畫素區域，其中每一畫素區 域包含至少—畫素電極21及至少一儲存電極22。 請參照圖3Α所示，為簡化說明’於此係以資料線DL〗 及知·描線SL!及其所構成的畫素區域為例說明。21資料線 DL〗及掃描線SI^鄰設於畫素電極21，且資料線Dq係提 供一資料電壓\予一薄膜電晶體TFTl，並與畫素電極21 電性連接。畫素電極21與掃描線SL】的距離畫素電 極21與資料線Dq的距離〇2分別約大於等於3.5微米， ❹ 以避免耦合電容效應過大而導致串音（crosstalk)問題產 生。 請再參考圖3B所示，其係為圖3A之薄膜電晶體基板 2中沿B-B線的剖面圖，薄膜電晶體基板2包含—晝素電 極21及一儲存電極22。儲存電極22與畫素電極21相對 而設，儲存電極22具有一透光部221及一非透光部222。 本實施例中，錯存電極22設置於一基板23之上，而畫素 ❹ 電極21设置於儲存電極22之上，儲存電極22與畫素電 極21形成一健存電容。 儲存電極22之非透光部222設置於透光部221之上， 並相互接觸，當然，透光部221亦可設置於非透光部222 之上，在此並不加以限制。其中透光部221的材質包含銦 錫氧化物（ITO )、銦鋅氧化物（IZ0 )、鋁鋅氧化物（AZ〇 )、 鎵鋅氧化物（GZ0)或氧化鋅（Zn〇)，而非透光部222的 材質包含銅、鋁、鉬、銀、鉻、鈦、鎢或其組合。 薄膜電晶體基板2更包含一介電層24，其係設置於儲 201017302 存電極22與畫素電極21之間，介電層24至少包含一第 絕緣層241及一第二絕緣層242。於本實施例中，介電 層24係以包含第一絕緣層241及第二絕緣層242為例， ^第一絕緣層241的材質包含氧化梦、氮化石夕、氮氧化 石夕、氧化紹、氮化铭、氧化叙、氧化釕或氧化銀，而第二 f緣層242的材質包含氧化碎、氮化咬、氮氧化麥、氧化 敍或氧化纽。 係·^用再參考® 3A’需特別說明的是，透光部221的面積 度:C畫素電極21的面積，且透光物的長 實施於或等於畫素電極21的的長度與寬度。本 逯光部22，Λ透光部221及畫素電極21投影至同-平面， 邻21與部分畫素電極21重疊。由於儲存 子電極之面積成正比且儲存 、 不同的應用下^⑽一+^ 電容值在 鬌 主::二的比例。由於本實施例中，儲存電容值 要由儲存電極22中之透光部221 之控制 電為與透光部電性連接以提供儲存電:-部3 =的面積僅需大於足夠提：電存壓電:二非透光部 可，同時亦可維持足夠的铸存電容=透光部的 畫素的開口率。 、，進而提 由於考慮卽能需求為未來之 面板設計過程的考量將更加重=^口率的増知 胥以下凊參照圖4八只 201017302 圖4B以說明增加開口率的實施態樣。如圖4A所示，與上 述實施例不同的是，畫素電極21以及儲存電極22的透光 部221可同時與資料線DL!部分重合。而再如圖4B所示， 與前述實施例不同的是，僅有畫素電極21與資料線Dh 部分重合。承上述，如此一來將能有效的增加開口率。 請再參照圖4A所示，其中兩相鄰畫素區域中之儲存 電極22的透光部221相距一距離D3，而兩相鄰晝素區域 的畫素電極21之間相距一距離D4,其中距離D4小於等於 ❹ 距離D3，且距離D3與距離D4之範圍均大於等於2微米， 而在較佳實施例中，距離D4為3到3.5微米。 另外，在本實施例中，儲存電極22的非透光部221 的邊界仍然位於畫素電極21之内，也就是儲存電極22的 透光部221的長度與寬度均小於等於晝素電極21的長度 與寬度。 另外，依據本發明較佳實施例之一種顯示面板，例如 係為一液晶顯示面板，其係具有一對向基板及一薄膜電晶 ® 體基板。薄膜電晶體基板與對向基板相對而設，其中薄膜 電晶體基板包含一畫素電極及一儲存電極。儲存電極與畫 素電極相對而設，儲存電極具有一透光部及一非透光部。 由於薄膜電晶體基板之特徵已詳述於上，故不再贅述。 • 再者，依據本發明較佳實施例之一種顯示裝置，其例 - 如係為一液晶顯示裝置，其係具有一背光模組及一顯示面 板。顯示面板係鄰設於背光模組，其中顯示面板包含一對 向基板及一薄膜電晶體基板。薄膜電晶體基板與對向基板 201017302 相對而設，其中薄膜電晶體基板包含一畫素電極及一儲存 電極。儲存電極與畫素電極相對而設，儲存電極具有一透 光部及一非透光部。由於薄膜電晶體基板之特徵已詳述於 上，故不再贅述。 接著，請參考圖5所示，依據本發明較佳實施例之薄 ‘膜電晶體基板的製造方法係包含步驟S11至步驟S13。請 參照圖5及圖6A至圖6C以進一步說明本實施例之薄膜電 晶體基板2的製造方法，其中圖6A至圖6E為薄膜電晶體 ❹ 基板的製造流程圖。 如圖6A所示，步驟S11為於一基板23上形成一儲存 電極22，其中儲存電極22具有一透光部221及一非透光 部 222。 如圖6B所示，步驟S12為於儲存電極22上形成一介 電層24。其中介電層24包含一第一絕緣層241及一第二 絕緣層242。 如圖6C所示，步驟S13為形成一畫素電極21於儲存 ⑩電極22之上。 在此需特別說明的是，步驟S11中，在形成儲存電極 22的同時亦形成一薄膜電晶體的一閘極於基板23 (圖未 示），也就是說儲存電極22與薄膜電晶體之閘極位於同一 層。以下請參照圖7及圖8A至圖8E，以更詳細的說明儲 • 存電極的製造流程（即步驟S11 )。如圖7所示，步驟S1 更包含步驟S111至步驟S114，圖8A至圖8E為儲存電極 的製造方法的製造流程示意圖。 Π 201017302 請同時參考圖7及圖8A，步驟sui為於基板23上形 成一透光導電層q。 如圖8A所示，步驟如2為於透光導電層Ll上形成 一非透光導電層L2。其中透光導電層L】及非透光導電層 …^形成_序亦可對調，在此並不加以限制。 .、如圖8B所示，步驟S113為於非透光導電層l2上形 成圖案化光阻層l3。於本實施例中’係於非透光導電層 L2上㈣-光阻層（圖未顯^)，並湘半色調網點光單 M (Halftone mask)技術對非透光導電層進行曝光與顯 影製程，以形成圖案化光阻層L3。值得—提的是，圖案化 光阻層l3亦可利用狹縫型光罩（驗職k)技術對非透光 導電層L2進行曝光與顯影製程而形成。 如圖8C所示，步驟S114為姓刻部分透光導電層^ 及非透光導電層L2以形成透光部221及非透光部222。於 本實施例中，首先對圖案化光阻層L3以外的部分，意即透 光導電層及非透光導電層L2周圍未受圖案化光阻層L3 覆蓋的部分，進行姓刻製程，以姓刻透光部221及非透光 部222周圍的部分，接著蝕刻圖案化光阻層“及部分非透 光部222，以形成透光部221及非透光部222。 圖9顯不儲存電極的另一種製造方法的流程圖。如圖 9所示，步驟S11更包含步驟S121至步驟S126，圖1〇A 至圖10F為儲存電極的製造方法的製造流程示意圖。 如圖10A所示，步驟S121為於基板23上形成一非透 光導電層L2。 12 201017302 如圖10A所示，步驟S122為於非透光導電層L2上形 成一第一圖案化光阻層L4。於本實施例中，於非透光導電 層L2部分表面上塗佈一光阻層（圖未顯示），對非透光導 電層L2進行曝光與顯影製程，以形成第一圖案化光阻層 U ° 如圖10B所示，步驟S123為蝕刻部分非透光導電層 L2W形成非透光部222。於本實施例中，對第一圖案化光 阻層L4及非透光導電層L2進行蝕刻製程，以形成非透光 ❹ 部222。 如圖10C所示，步驟S124為於基板23及非透光部222 上形成一透光導電層。 如圖10C所示，步驟S125為於透光導電層L!上形成 一第二圖案化光阻層L5。 如圖10D所示，步驟S126為蝕刻部分透光導電層L! 以形成透光部221。於本實施例中，對第二圖案化光阻層 L5及透光導電層h進行蝕刻製程，以形成透光部221。 以上透光部221及非透光部222形成的順序（即步驟 S121至步驟S123及步驟S124至步驟S126)亦可對調， 在此並不加以限制。 另外，依據本發明較佳實施例一種顯示面板的製造方 '法包含以下步驟：於一基板上形成一儲存電極，其中儲存 •電極具有一透光部及一非透光部；以及形成一畫素電極於 儲存電極之上。其中，顯示面板的製造方法更包含以下步 驟：將一對向基板與基板相對而設；以及將一液晶層設置 13 201017302 於基板及對向基板之間。由於薄膜電晶體基板的製造方法 已詳述於上，故不再贅述。 再者，依據本發明較佳實施例之一種顯示裝置的製造 方法包含以下步驟：於一基板上形成一儲存電極，其中儲 存電極具有一透光部及一非透光部；以及形成一畫素電極 於儲存電極之上。其中，顯示裳置的製造方法更包含以下 步驟.將-對向基板與基板相對而設；將一液晶層設置於 基板及對向基板之間；以及將―背光模組鄰設於基板。由 ❹於薄膜電晶體基板的製造方法已詳述於上，故不再資述。 综上所述，依據本發明之一種薄膜電晶體基板、顯示 面板'顯示裝置及其製造方法，係將儲存電極與畫素電極 相對而設，其中儲存電極的透光部及非透光部與畫素電極 形成-儲存電容’由於儲存電極的面積增加，進而可提高 儲存電容值。另外’由於可藉由透光部來使得儲存電容值 提咼，因此非透光部的面積可縮小，進而可提高畫素的開 口率。 ❹ 以上所述僅為舉例性，而非為限制性者。任何未脫離 本發明之精神與範疇，而對其進行之等效修改或變更，均 應包含於後附之申請專利範圍中。 【圖式簡單說明】 _ 圖1A為一種習知薄骐電晶體基板的示意圖； 圖1B為圖1A之A-A線的剖面圖； 圖2為為依據本發明較佳實施例之一種薄膜電晶體基 201017302 板的示意圖； 圖3A為依據本發明較佳實施例之一種薄膜電晶體基 板之一畫素區域的示意圖； 圖3B為圖3A之B-B線的剖面圖， 圖4A及圖4B為依據本發明較佳實施例之一種薄膜電 晶體基板之畫素區域的變化態樣示意圖； 圖5為依據本發明較佳實施例之一種薄膜電晶體基板 的製造方法的流程圖； 〇 圖6A至圖6C為圖5之薄膜電晶體基板的製造示意 圖； 圖7為圖5之形成儲存電極的製造方法的流程圖； 圖8A至圖8E為圖7之薄膜電晶體基板的製造流程示 意圖； 圖9為圖5之形成儲存電極的另一種製造方法的流程 圖；以及 圖10A至圖10F為圖9之薄膜電晶體基板的製造流程 ❿示意圖。 【主要元件符號說明】 1、2 :薄膜電晶體基板 _ 11、21 :畫素電極 - 12、22 :儲存電極 13、 24 :介電層 14、 23 :基板 15 201017302 241 :第一絕緣層 242 :第二絕緣層 14、23 :基板 221 :透光部 222:非透光部 DLi〜DLm :貧料線 D】、D2、D3、D4 :距離 SL]〜SLn .掃描線 © q:透光導電層 12 :非透光導電層 13 :圖案化光阻層 14 :第一圖案化光阻層 15 :第二圖案化光阻層 Μ :半色調網點光罩 TFT}:薄膜電晶體 S11〜S13:薄膜電晶體基板的製造方法之步驟 ❿ S111〜S114、S121〜S126:儲存電極的製造方法之步驟To achieve the above object, a display panel according to the present invention comprises a substrate and a thin film transistor substrate. The thin chess transistor substrate is opposite to the opposite plate; and the thin film transistor substrate has a plurality of rows of data lines and a plurality of columns of scan lines, (4) a plurality of pixel regions and the plurality of pixel regions, wherein the mother pixel region includes at least one A pixel electrode, at least one reservoir, an electrode, and a dielectric layer. The storage electrode is disposed opposite to the pixel electrode, and the storage electrode has a money portion and a non-light transmitting portion. A dielectric layer is disposed between the storage electrode and the pixel electrode. In order to achieve the above object, a display device according to the present invention comprises a backlight module and a display panel. The display panel is disposed adjacent to the backlight module, wherein the display panel comprises an opposite substrate and a thin film transistor substrate. The thin film transistor substrate is opposed to the counter substrate, and the thin film transistor substrate includes at least a pixel electrode, at least one electrode electrode, and a dielectric layer. The storage electrode is opposite to the pixel electrode and the storage electrode has a light transmitting portion and a non-light transmitting portion. The dielectric layer is disposed on the surface of the reservoir and the pixel of the pixel. In order to achieve the above object, a method for fabricating a thin film transistor substrate according to the present invention comprises the steps of: forming a storage electrode on a substrate, wherein the storage electrode of 201017302 has a light transmitting portion and a non-light transmitting portion; and forming a The pixel electrode is above the storage electrode. In order to achieve the above object, a method for manufacturing a display panel according to the present invention includes the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a light transmitting portion and a non-light transmitting portion; and forming a pixel electrode Above the storage electrode. To achieve the above object, a method of fabricating a display device according to the present invention comprises the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a light transmitting portion and a non-light transmitting portion; and forming a pixel electrode Above the storage electrode. According to the present invention, a thin film transistor substrate, a display panel, a display device, and a method of fabricating the same are provided, wherein the storage electrode is opposite to the pixel electrode, so that the light transmitting portion and the non-light transmitting portion of the storage electrode are respectively Forming a storage capacitor with the pixel electrode. In the present invention, the light-transmitting portion is used to increase the storage capacitance value, and the area of the non-light-transmitting portion can be reduced, thereby increasing the opening ratio of the halogen. [Embodiment] Hereinafter, a film transistor substrate, a display panel, a display device, and a method of manufacturing the same according to a preferred embodiment of the present invention will be described with reference to the accompanying drawings, wherein the same elements will be described with the same reference numerals. 2 is a schematic view of a thin film transistor substrate 2 in accordance with a preferred embodiment of the present invention. The thin film transistor substrate 2 includes a plurality of rows of data lines DLi-DLm and a plurality of columns of scan lines SI^-SLn, and the data lines DLi-DLm and the 7 201017302 scan lines define a plurality of pixel regions, wherein each pixel The region includes at least a pixel electrode 21 and at least one storage electrode 22. Referring to FIG. 3A, in order to simplify the description, the data line DL and the known line SL and the pixel area formed therein will be described as an example. The data line DL and the scan line SI^ are adjacent to the pixel electrode 21, and the data line Dq provides a data voltage to a thin film transistor TFT1 and is electrically connected to the pixel electrode 21. The distance 〇2 between the pixel electrode 21 and the scanning line SL] is approximately 3.5 μm or more between the pixel electrode 21 and the data line Dq, respectively, to avoid crosstalk problems caused by excessive coupling capacitance effects. Referring to FIG. 3B, which is a cross-sectional view taken along line B-B of the thin film transistor substrate 2 of FIG. 3A, the thin film transistor substrate 2 includes a halogen electrode 21 and a storage electrode 22. The storage electrode 22 is opposite to the pixel electrode 21. The storage electrode 22 has a light transmitting portion 221 and a non-light transmitting portion 222. In this embodiment, the stray electrode 22 is disposed on a substrate 23, and the pixel electrode 21 is disposed on the storage electrode 22. The storage electrode 22 forms a storage capacitor with the pixel electrode 21. The non-transmissive portion 222 of the storage electrode 22 is disposed on the transparent portion 221 and is in contact with each other. Of course, the transparent portion 221 may be disposed on the non-transmissive portion 222, which is not limited herein. The material of the light transmitting portion 221 includes indium tin oxide (ITO), indium zinc oxide (IZ0), aluminum zinc oxide (AZ〇), gallium zinc oxide (GZ0) or zinc oxide (Zn〇), instead of The material of the light transmitting portion 222 includes copper, aluminum, molybdenum, silver, chromium, titanium, tungsten or a combination thereof. The thin film transistor substrate 2 further includes a dielectric layer 24 disposed between the memory electrode 22 and the pixel electrode 21, and the dielectric layer 24 includes at least a first insulating layer 241 and a second insulating layer 242. In this embodiment, the dielectric layer 24 is exemplified by the first insulating layer 241 and the second insulating layer 242. The material of the first insulating layer 241 includes oxidized dream, nitriding stone, nitrogen oxynitride, and oxidized. The material of the second f-edge layer 242 comprises oxidized pulverized, nitrided, oxidized wheat, oxidized or oxidized. In addition, the area of the light transmitting portion 221 is the area of the C pixel electrode 21, and the length of the light transmitting material is implemented at or equal to the length and width of the pixel electrode 21. . In the present light-emitting portion 22, the light-transmitting portion 221 and the pixel electrode 21 are projected onto the same plane, and the adjacent portion 21 overlaps with the partial pixel electrode 21. Since the area of the storage sub-electrodes is proportional and stored, the capacitance value of ^(10)-+^ in different applications is in the ratio of 鬌::2. In this embodiment, the storage capacitor value is electrically connected to the light transmitting portion by the control portion of the transparent portion 221 of the storage electrode 22 to provide storage power: the area of the portion 3 = only needs to be larger than enough: Piezoelectric: The two non-transmissive portions can be maintained, and at the same time, sufficient casting capacitance can be maintained = the aperture ratio of the pixels of the light transmitting portion. Furthermore, considering the consideration of the energy demand for the future panel design process, the consideration of the panel design process will be more important. 胥 Refer to Figure 4 for the eight 201017302 Figure 4B to illustrate the implementation of increasing the aperture ratio. As shown in Fig. 4A, unlike the above embodiment, the pixel electrode 21 and the light transmitting portion 221 of the storage electrode 22 can simultaneously coincide with the data line DL!. Further, as shown in Fig. 4B, unlike the foregoing embodiment, only the pixel electrode 21 and the data line Dh partially overlap. In view of the above, it will effectively increase the aperture ratio. Referring to FIG. 4A again, the light transmitting portions 221 of the storage electrodes 22 in the two adjacent pixel regions are separated by a distance D3, and the pixel electrodes 21 of the two adjacent pixel regions are separated by a distance D4, wherein The distance D4 is less than or equal to the ❹ distance D3, and the range of the distance D3 and the distance D4 is greater than or equal to 2 microns, and in the preferred embodiment, the distance D4 is 3 to 3.5 microns. In addition, in the present embodiment, the boundary of the non-transmissive portion 221 of the storage electrode 22 is still located within the pixel electrode 21, that is, the length and width of the transparent portion 221 of the storage electrode 22 are both less than or equal to that of the halogen electrode 21. Length and width. Further, a display panel according to a preferred embodiment of the present invention is, for example, a liquid crystal display panel having a pair of substrates and a thin film electro-optical substrate. The thin film transistor substrate is disposed opposite to the opposite substrate, wherein the thin film transistor substrate comprises a pixel electrode and a storage electrode. The storage electrode is disposed opposite to the pixel electrode, and the storage electrode has a light transmitting portion and a non-light transmitting portion. Since the features of the thin film transistor substrate have been described in detail above, they will not be described again. Further, a display device according to a preferred embodiment of the present invention, for example, is a liquid crystal display device having a backlight module and a display panel. The display panel is adjacent to the backlight module, wherein the display panel comprises a pair of substrates and a thin film transistor substrate. The thin film transistor substrate is disposed opposite to the opposite substrate 201017302, wherein the thin film transistor substrate comprises a pixel electrode and a storage electrode. The storage electrode is disposed opposite to the pixel electrode, and the storage electrode has a light transmitting portion and a non-light transmitting portion. Since the features of the thin film transistor substrate have been described in detail, they will not be described again. Next, referring to FIG. 5, a method of manufacturing a thin 'film transistor substrate according to a preferred embodiment of the present invention includes steps S11 to S13. Referring to FIG. 5 and FIG. 6A to FIG. 6C, a method of manufacturing the thin film transistor substrate 2 of the present embodiment will be further described. FIGS. 6A to 6E are flowcharts showing the manufacture of the thin film transistor ❹ substrate. As shown in FIG. 6A, a storage electrode 22 is formed on a substrate 23, wherein the storage electrode 22 has a light transmitting portion 221 and a non-light transmitting portion 222. As shown in FIG. 6B, step S12 is to form a dielectric layer 24 on the storage electrode 22. The dielectric layer 24 includes a first insulating layer 241 and a second insulating layer 242. As shown in Fig. 6C, step S13 is to form a pixel electrode 21 above the storage 10 electrode 22. Specifically, in step S11, a gate of a thin film transistor is formed on the substrate 23 (not shown) while forming the storage electrode 22, that is, the gate of the storage electrode 22 and the thin film transistor. Extremely located on the same floor. Referring to Fig. 7 and Figs. 8A to 8E, the manufacturing flow of the storage electrode (i.e., step S11) will be described in more detail. As shown in Fig. 7, step S1 further includes steps S111 to S114, and Figs. 8A to 8E are schematic diagrams showing a manufacturing process of the method of manufacturing the storage electrode. Π 201017302 Please refer to FIG. 7 and FIG. 8A simultaneously, the step sui is to form a light-transmissive conductive layer q on the substrate 23. As shown in FIG. 8A, the step 2 is to form a non-transmissive conductive layer L2 on the light-transmitting conductive layer L1. The light-transmissive conductive layer L and the non-transmissive conductive layer may be reversed, and are not limited herein. As shown in Fig. 8B, step S113 is to form a patterned photoresist layer 13 on the non-transmissive conductive layer 12. In the present embodiment, the light-shielding conductive layer is exposed and developed on the non-transmissive conductive layer L2 (four)-photoresist layer (not shown) and the halftone mask M (Halftone mask) technology. The process is performed to form a patterned photoresist layer L3. It is worth mentioning that the patterned photoresist layer 13 can also be formed by exposing and developing the non-transmissive conductive layer L2 by a slit type photomask (Inspection k) technique. As shown in FIG. 8C, in step S114, the partially transparent conductive layer and the non-transmissive conductive layer L2 are formed to form the light transmitting portion 221 and the non-light transmitting portion 222. In this embodiment, first, the portion other than the patterned photoresist layer L3, that is, the portion of the light-transmitting conductive layer and the non-transmissive conductive layer L2 that is not covered by the patterned photoresist layer L3, is firstly processed to The portion of the light transmissive portion 221 and the non-light transmitting portion 222 is pasted, and then the patterned photoresist layer "and a portion of the non-light transmitting portion 222 are etched to form the light transmitting portion 221 and the non-light transmitting portion 222. FIG. 9 is not stored. A flow chart of another manufacturing method of the electrode. As shown in FIG. 9, step S11 further includes steps S121 to S126, and FIGS. 1A to 10F are schematic diagrams showing a manufacturing process of the method for manufacturing the storage electrode. As shown in FIG. 10A, In step S121, a non-transmissive conductive layer L2 is formed on the substrate 23. 12 201017302 As shown in FIG. 10A, step S122 is to form a first patterned photoresist layer L4 on the non-transmissive conductive layer L2. A photoresist layer (not shown) is coated on the surface of the non-transmissive conductive layer L2, and the non-transmissive conductive layer L2 is exposed and developed to form a first patterned photoresist layer U°. As shown in FIG. 10B, step S123 forms an etched portion of the non-transmissive conductive layer L2W. In the embodiment, the first patterned photoresist layer L4 and the non-transmissive conductive layer L2 are etched to form the non-transmissive germanium portion 222. As shown in FIG. 10C, step S124 is A light-transmissive conductive layer is formed on the substrate 23 and the non-transmissive portion 222. As shown in FIG. 10C, a second patterned photoresist layer L5 is formed on the transparent conductive layer L! as shown in FIG. 10D. Step S126 is to etch a portion of the light-transmissive conductive layer L! to form the light-transmitting portion 221. In the embodiment, the second patterned photoresist layer L5 and the light-transmitting conductive layer h are etched to form the light-transmitting portion 221. The order in which the light transmitting portion 221 and the non-light transmitting portion 222 are formed (ie, step S121 to step S123 and step S124 to step S126) may be reversed, and is not limited thereto. Further, according to a preferred embodiment of the present invention, a display is provided. The method of manufacturing a panel includes the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a light transmitting portion and a non-light transmitting portion; and forming a pixel electrode on the storage electrode. The manufacturing method of the panel further includes the following steps: The substrate is disposed opposite to the substrate; and a liquid crystal layer is disposed between the substrate and the opposite substrate. Since the method for manufacturing the thin film transistor substrate has been described in detail above, it will not be described again. Further, according to the present invention, A method for manufacturing a display device according to a preferred embodiment comprises the steps of: forming a storage electrode on a substrate, wherein the storage electrode has a light transmitting portion and a non-light transmitting portion; and forming a pixel electrode on the storage electrode. The method for manufacturing the display device further includes the steps of: facing the opposite substrate and the substrate; placing a liquid crystal layer between the substrate and the opposite substrate; and positioning the backlight module adjacent to the substrate. Since the manufacturing method of the thin film transistor substrate has been described in detail above, it will not be described. In summary, a thin film transistor substrate, a display panel 'display device, and a method of fabricating the same according to the present invention are provided with a storage electrode and a pixel electrode, wherein the light transmitting portion and the non-light transmitting portion of the storage electrode are The pixel forming-storage capacitor 'increased the storage capacitor value due to the increased area of the storage electrode. Further, since the storage capacitor value can be improved by the light transmitting portion, the area of the non-light transmitting portion can be reduced, and the opening ratio of the pixel can be improved. ❹ The above description is for illustrative purposes only and not as a limitation. Any equivalent modifications or alterations to the spirit and scope of the present invention are intended to be included in the scope of the appended claims. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1A is a schematic view of a conventional thin germanium transistor substrate; FIG. 1B is a cross-sectional view taken along line AA of FIG. 1A; FIG. 2 is a thin film transistor base according to a preferred embodiment of the present invention. 3A is a schematic view of a pixel region of a thin film transistor substrate according to a preferred embodiment of the present invention; FIG. 3B is a cross-sectional view taken along line BB of FIG. 3A, and FIGS. 4A and 4B are diagrams according to the present invention; FIG. 5 is a flow chart showing a method of fabricating a thin film transistor substrate according to a preferred embodiment of the present invention; FIG. 6A to FIG. 6C are diagrams showing a variation of a pixel region of a thin film transistor substrate according to a preferred embodiment of the present invention; FIG. FIG. 7 is a flow chart showing the manufacturing method of the thin film transistor substrate of FIG. 5; FIG. 7 is a flow chart showing the manufacturing process of the thin film transistor substrate of FIG. 7; FIG. 9 is a schematic view of the manufacturing process of the thin film transistor substrate of FIG. A flow chart of another manufacturing method for forming a storage electrode; and FIGS. 10A to 10F are schematic views showing a manufacturing process of the thin film transistor substrate of FIG. [Description of main component symbols] 1, 2: thin film transistor substrate _ 11, 21: pixel electrode - 12, 22: storage electrode 13, 24: dielectric layer 14, 23: substrate 15 201017302 241: first insulating layer 242 : second insulating layer 14 , 23 : substrate 221 : light transmitting portion 222 : non-light transmitting portion DLi DL DLm : poor material line D], D2, D3, D4 : distance SL] to SLn . scanning line © q: light transmission Conductive layer 12: non-transmissive conductive layer 13: patterned photoresist layer 14: first patterned photoresist layer 15: second patterned photoresist layer Μ: halftone dot mask TFT}: thin film transistor S11~S13 : Step of Manufacturing Method of Thin Film Transistor Substrate ❿ S111 to S114, S121 to S126: Steps of Manufacturing Method of Storage Electrode
Vd :資料電壓 16Vd : data voltage 16