TW201009309A - Temperature sensing circuit - Google Patents

Abstract

A temperature sensing circuit is provided, which includes a bandgap reference voltage generator and a comparison module. The bandgap reference voltage generator outputs a reference voltage and a reference current. The comparison module generates a sensing voltage corresponding to a temperature variation according to the reference current and then outputs a stop signal corresponding to a specific temperature by comparing the sensing voltage with the reference voltage. Thereby, the temperature sensing error caused by process variations is compensated and the temperature sensing accuracy and the sensitivity are increased.

Description

^<5934twf.doc/n 201009309 九、發明說明： 【發明所屬之技術領域】 本發明是有關於-種溫度價測電路，且特別是有關於 利用能隙參考電壓產生器所產生的電流來可克服製程盘電 壓差異的溫度偵測電路。 μ 【先前技術】 隨著資訊時代的到來，不僅加速個人電腦的普及化， φ 也活絡電腦及其周邊設備的市場。因此，各式各樣的資訊 產品不斷地推陳出新，且各類的資訊設備也以多樣化為走 向0 然而，隨著電子系統的效能提升以及越趨輕薄的設計 需求，首當其衝的問題即是工作時所散發出來的熱量也就 愈來愈多。例如，在目前科技的發展趨勢中，中央處理器 (Central Processing Unit ’ CPU )、圖形處理單元（Graphics Processing Unit’ GPU)以及其周邊電路的操作頻率不斷的 在提升’其產生的熱能也就越來越向。為了確保上述之中 • 央處理器、圖形處理單元以及其周邊之積體電路 (Integrated Circuit，1C )能夠正常工作而不至於因高溫而 燒毁’因此溫度的監控已經是變成一件非常重要的事。 在一般的主機板或顯示卡上會有一顆硬體監控ic (Hardware Monitor 1C)進行此工作。其原理是利用溫度 感測二極體（Thermal diode)兩端電壓差會隨不同的溫度 而改變’大約是每改變1°C即一極體兩端電壓差減少 2mV。因此，藉由量測溫度感測二極體之兩端電壓差即可 5 201009309 ,8934twf.doc/n 間接得知目前之環境溫度，例如獲得中央處理器之目前溫 度。 狐 然而，上述溫度感測二極體兩端電壓差2_2ιην/。^之 關係式會隨製程因素*有所改變。隨著積體電 變，會出現不同的偏移電壓（滿et讀age)，這對= 壓與/孤度的對照關係之建立是一個非常大的困擾。 【發明内容】 ❹ 本發明提供-種溫度偵測電路，利用能隙參考電壓產 生器（bandgap reference v〇ltagegenerat〇r)内部的電流 產生溫度偵測電路工作時所需的電流，藉此補償因 ^所造成的溫度_縣，提升溫度侧的正確性與靈敏 述’本發明提出_種溫度_電路，包括一能隙 參考電壓產生器以及一比較模組，其中能 1 第一參考電流;比較模組= β '考電"'1·產生4貞’則電壓，並比較該參考電壓與該福 =電壓以輪I停機·u ’其中該停機信號對應於一 ^寺: 在=明—實施例中’上述能隙參考電壓経 二第-電流源，用以產生—第二參考電流；以及f 接於上述第-電麵，並根據上 2 :::考電流;其中’上述能隙參考電壓產生= 逑弟一參考電流產生上述參考電壓。 在本發明一實施例中，上述比較模組包括一溫度感測電 201009309溯_η =以及-比較益，射溫度感測電阻輕接於上 與-接地端之間，針上述溫度4測電_上二 隙貞測輕；以及比較器_於上述能 述參考縣與上述偵測賴以輸出上述停機信號。比車乂上 正溫 在本發Θ ^施例中，上述溫度感測電阻具有一 度係數。^<5934twf.doc/n 201009309 IX. Description of the Invention: [Technical Field of the Invention] The present invention relates to a temperature measuring circuit, and more particularly to the use of a current generated by a bandgap reference voltage generator. A temperature detection circuit that overcomes the voltage difference of the process disk. μ [Prior Art] With the advent of the information age, not only has the popularity of personal computers been accelerated, but φ has also spurred the market for computers and peripheral devices. Therefore, all kinds of information products are constantly being updated, and various types of information equipment are also diversified. However, with the improvement of the performance of electronic systems and the increasingly thin design requirements, the first problem is the working hours. More and more heat is emitted. For example, in the current trend of technology, the operating frequency of the Central Processing Unit 'CPU, the Graphics Processing Unit' GPU, and its peripheral circuits is constantly increasing. Come to the more. In order to ensure that the above-mentioned central processing unit, graphics processing unit and its integrated integrated circuit (1C) can work normally without being burnt due to high temperature, the monitoring of temperature has become a very important one. thing. There is a hardware monitor ic (Hardware Monitor 1C) on a typical motherboard or display card for this task. The principle is that the voltage difference across the temperature sensing diode will change with different temperatures'. About every 1 °C change, the voltage difference between the two poles is reduced by 2mV. Therefore, by measuring the temperature difference between the two ends of the temperature sensing diode 5 201009309 ,8934twf.doc / n indirectly know the current ambient temperature, for example, to obtain the current temperature of the central processing unit. However, the temperature difference between the above temperature sensing diodes is 2_2ιην/. The relationship of ^ will change with the process factor*. As the body changes, there will be different offset voltages (full et read), which is a very big problem for the establishment of the control relationship between = and / or. SUMMARY OF THE INVENTION The present invention provides a temperature detecting circuit that utilizes a current inside a bandgap reference voltage generator (bandgap reference v〇ltagegenerat〇r) to generate a current required for operation of a temperature detecting circuit, thereby compensating for a cause ^The resulting temperature_county, the correctness and sensitivity of the temperature side is improved. The present invention proposes a temperature_circuit comprising a bandgap reference voltage generator and a comparison module, wherein the first reference current can be compared; Module = β 'test electricity' "1 · generate 4 贞 ' voltage, and compare the reference voltage with the b = voltage to stop I · u ' where the stop signal corresponds to a ^ temple: in = Ming - In the embodiment, the above-mentioned energy gap reference voltage 経 second current source is used to generate a second reference current; and f is connected to the first electrical surface, and according to the upper 2::: test current; wherein the above energy gap The reference voltage is generated = the reference current is generated by the reference current. In an embodiment of the invention, the comparison module includes a temperature sensing circuit 201009309 _η = and - comparative benefit, the radiation temperature sensing resistor is lightly connected between the upper and the ground terminals, and the pin temperature is 4 _ upper two gaps 贞 light; and comparator _ in the above mentioned reference county and the above detection depends on outputting the above stop signal. It is higher than the temperature on the rut. In the example, the temperature sensing resistor has a one-degree coefficient.

在本發明-實施例中，上述能隙參考電壓產生器更包 ^ 能隙參考電路’ _於上述第—電流源與上述接地 知之,Β 用以產生—第—節點電麼與—第二節點電壓；以 及二運算放大n 於上述能隙參考電路並根據上述第 -節點電壓與上述第二節點電壓輸出—調整電壓至上述第 一電流源以調整上述第二參考電流。 在本發明-實施例令，上述運算放大器包括一第三電 流源’触於上述第―電流源，絲據上述第二參考電流產 生-第三參考電流；—差動放All，接於上述第三電流源 ，上述接地端之間，並根據上述第一節點電壓與上述第二 節點電壓輸出-差動電壓；以及—輸出級電路，搞接於上 述差，放大器，並根據上述差動電壓輸出上述調整電壓至 上述第一、二以及第三電流源以調整上述第一、二以及第 二參考電流。In the embodiment of the present invention, the bandgap reference voltage generator further includes a band gap reference circuit _ for the first current source and the grounding, and the second node is used to generate the first node and the second node. And the second operational amplifier is configured to adjust the voltage to the first current source to adjust the second reference current according to the first node voltage and the second node voltage output. In an embodiment of the invention, the operational amplifier includes a third current source 'contacting the first current source, and the second reference current is generated by the second reference current; the differential current is connected to the first a three current source, between the ground terminals, and according to the first node voltage and the second node voltage output-differential voltage; and an output stage circuit, connected to the difference, the amplifier, and according to the differential voltage output The adjusting voltage is applied to the first, second and third current sources to adjust the first, second and second reference currents.

在本發明一實施例中，上述輸出級電路包括一PM0S 電日日體(P channel metal oxide semiconductor transistor)與一 NMOS 電晶體（N channel metal 〇xide semic〇nduct〇r 7 ^8934twf.doc/n 201009309 transistor)，其中上述PM〇s電晶體的一端耦接於一電壓 源’上述PMQS電晶體關極雛上述第—電流源以 對應於上述第二參考電流之一第四參考電流；而上 NM〇S電晶體則輕接於上述PMOS電晶體的另一端與上述 接地端之間，且上述聰〇8電晶體的閘極耦接於上述差動 電壓八中上述PMOS電晶體與上述nm〇S電晶體的 一第二共用節點耦接於上述PMOS電晶體的閘極，且上述 第一共用節點用以輸出上述調整電壓。 在本發明一實施例中，上述能隙參考電壓產生器更包 括一 PMOS電晶體以及一雙極性電晶體，其巾曰 體柄接於—電壓源與—電阻之間4上述PMOS電晶體: ? 接於上述第一電流源’而上述雙極性電晶體則耦接於 體一端與上述接地端之間’且上述雙極性電晶 t接地端’針，上述電_上述 電曰曰體之一第二共用節點輸出上述參考電壓。 發明一實施例中’上述第-電流源為-第- 且^·、η^述第二電流源為一第二職電晶體， 體與上述第二pmos電晶體的閑極 相互耦接以形成一電流鏡。 在本發明一實施例中，上述能隙參考電路包括.一第 JL V 電机源與一苐一雙極性電晶體之間， 端.以及5 :體的另-端與基極皆耦接於上述接地 細，从及一第二電阻，與—笛— 、β企外一 第二電阻串聯耦接於上述第一電流 一弟-雙極性電晶體之間，且上述第二雙極性電晶體的另 ^8934twf.doc/n 201009309 一端與基極皆雛於上述接地端，其中，上述第—電阻盘上 第-雙極性電晶體之一第二共用節點輸出上述第一節 壓’上述第一電阻與上述第二雙極性電一二 輸出上述第二節點電壓。 曰曰體之第一共用即點 .在本發明另-實施例中，上述能隙參考電壓產生 括.一第一 PM〇S電晶體’柄接於一電壓源與-第- N]^〇s ^曰曰體之間卜第二PM〇s電晶體，耗接於上述電壓源盘一 :一：OS電晶體之間’且上述第一觸電晶體與上述 電T _極相互_以形成上述第—電流源； 雙極性電晶體’雛於上述第—觀〇 =且上T雙極性電晶體的另一端與基極皆輪二 T以及-第二雙極性電晶體，接於上述第一電阻： Ϊ端且上私"雙錄電晶體的另—端絲極皆_於上述接 其中’上述第- PM0S電晶體的閘極輕接於 趣電晶體與上述第一 NM0S電晶體的—第二 =上述第一 NM0S電晶體與上述第二NMos電晶體： 】第接，且上述第二NM0S電晶體的閘極耦接於2 晶體與上述第二卿sf晶體的—第三共 在—實施射上述㈣參考電壓產生 =夕„ ^PM〇s電晶體’雜接於一電壓源與-第二恭 B ’且上述第二PMQS電晶體的難祕於上述第二 9 ^8934twf.doc/nIn an embodiment of the invention, the output stage circuit includes a PMOS metal oxide semiconductor transistor and an NMOS transistor (N channel metal 〇xide semic〇nduct〇r 7 ^8934twf.doc/n 201009309 transistor), wherein one end of the PM〇s transistor is coupled to a voltage source 'the PMQS transistor closes the first current source to correspond to one of the second reference currents and a fourth reference current; and the upper NM The 〇S transistor is lightly connected between the other end of the PMOS transistor and the grounding end, and the gate of the 〇8 transistor is coupled to the PMOS transistor and the above-mentioned nm〇S in the differential voltage VIII A second common node of the transistor is coupled to the gate of the PMOS transistor, and the first common node is configured to output the adjusted voltage. In an embodiment of the invention, the energy gap reference voltage generator further includes a PMOS transistor and a bipolar transistor, and the handle body is connected between the voltage source and the resistor. 4 The PMOS transistor: Connected to the first current source ′ and the bipolar transistor is coupled between the one end of the body and the ground end and the bipolar electro-optic t grounding end pin, the electric _ one of the electric 曰曰The two shared nodes output the above reference voltage. In one embodiment, the first current source is -the first and the second current source is a second occupational crystal, and the body is coupled to the idle pole of the second pmos transistor to form A current mirror. In an embodiment of the invention, the gap reference circuit includes: a JL V motor source and a bipolar transistor, and the other end and the base of the 5: body are coupled to each other. The grounding is fine, and a second resistor is coupled in series with the second resistor of the flute and the second resistor, and is coupled between the first current and the bipolar transistor, and the second bipolar transistor is Another ^8934twf.doc/n 201009309 one end and the base are both at the grounding end, wherein a second common node of the first bipolar transistor on the first resistive disk outputs the first voltage step 'the first resistance And outputting the second node voltage by the second bipolar electric one or two. In the other embodiment of the present invention, the energy gap reference voltage is generated by a first PM〇S transistor, and the handle is connected to a voltage source and a -N-^ Between the 曰曰 ^ 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二a first current source; the bipolar transistor is entangled in the above-mentioned first-view 〇= and the other end of the upper T bipolar transistor and the base are both the second T and the second bipolar transistor, connected to the first resistor : Ϊ端和上私"The other end of the double-recording transistor is _ in the above-mentioned "the gate of the above-mentioned -PM0S transistor is lightly connected to the interesting transistor and the first NM0S transistor" The first NMOS transistor and the second NMos transistor are connected to each other, and the gate of the second NMOS transistor is coupled to the second crystal and the second sf crystal. Shooting the above (four) reference voltage generation = 夕 „ ^ PM〇s transistor 'hybrids connected to a voltage source and - second Christine B ' and the above second PMQS transistor Hard secret to the second 9 ^ 8934twf.doc / n

201009309 PMOS電晶體的閘極；以及一第三雙極性電晶體，糕 述第二電_另-端與上述接地端之間，且 晶體的基極耦接於上述接地端，其中，上述第三電阻與上述第 二PMOS電晶體之一第四共用節點輸出上述參考電壓^ 在本發明一實施例，上述第二參考電流與上述第一夂 考電流相等 > 在本發明一實施例中，上述雙極性電晶體皆為pN?雙 極性電晶體(bipolar junction transistor)。 本發明因採用能隙參考電壓產生器的參考電壓以及 根據其内部所產生的參考電流來偵測溫度，因此可藉由其 參考電流來補償製程差異所造成的電流、電壓漂移問題， 以增加溫度偵測的正確性與其靈敏度。 為讓本發明之上述特徵和優點能更明顯易懂，下文特 舉較佳實施例，麵合所附圖式，作詳細說明如下。 【實施方式】 能隙參考電墨產生器主要是用來產生與溫度、製程益 關（受其影響較小)的參考，—般的能隙參考電壓產^ 器主要是利用兩條電流路徑以及pNp雙極性電曰體 (biP〇lar junction transist〇r)的基_射極電壓(Μ的負溫曰^係201009309 PMOS transistor gate; and a third bipolar transistor, between the second electric_the other end and the grounding end, and the base of the crystal is coupled to the grounding end, wherein the third The resistor and the fourth common node of the second PMOS transistor output the reference voltage. In an embodiment of the invention, the second reference current is equal to the first reference current. In an embodiment of the present invention, The bipolar transistors are all pN? bipolar junction transistors. The invention detects the temperature by using the reference voltage of the bandgap reference voltage generator and the reference current generated therein, so that the current and voltage drift caused by the process difference can be compensated by the reference current to increase the temperature. The correctness of detection and its sensitivity. The above described features and advantages of the present invention will be more apparent from the following description. [Embodiment] The energy gap reference ink generator is mainly used to generate a reference with temperature and process benefit (which is less affected by it). The general energy gap reference voltage generator mainly utilizes two current paths and The base-emitter voltage of the pNp bipolar electric junction (biP〇lar junction transist〇r)

數來產生與溫度無_參考電壓U 關的參考電壓，其内部的兩條電流路徑上的參考電流 因應製私減而自動調整以使得所輸出的參考電壓維 Ϊ。換言之，㈣參考·產生ϋ的㈣參考電流會隨著 皿度、製糾及工作電壓而調整。本實施卿是根據能隙 ^934twf.d〇c/n 201009309 參考電壓產生器的内部參考電流來產生溫度偵測電路的工 作電流來降低因製程差異所造成的溫度偵測誤差。 第一實施例 請參照圖1，圖丨為根據本發明第—實施例之溫度偵 測電路。溫度偵測電路100包括能隙參考電壓產生器11〇 與比較模組120,其中能隙參考電壓產生器11〇用以產生 參考電壓VBGR與參考電流I，比較模組12〇則根據參考 φ 電机產生一偵測電壓ντ，並比較參考電壓VBGR與偵測 電壓VT以輸出一停機信號STP。 比較模組120包括溫度感測電阻Rii〇以及比較器 請。能隙參考電壓產生器UG _ pM〇s電晶體接 於電壓源VDD與溫度感測電阻％ 閘 t參考電壓細llG⑽圓= 胁t應的參考電流l2 Ο溫度感測電阻km的另一端輕 接於接地端GND，溫度感測電阻“與pM〇s電晶體 之間的共用節點則輸出對應溫度的感應The reference voltage is generated with a temperature-free reference voltage U, and the reference currents in the two internal current paths are automatically adjusted to reduce the output reference voltage. In other words, (4) Reference (generated) The (IV) reference current is adjusted with the degree of the dish, the correction and the operating voltage. The implementation is based on the internal reference current of the energy gap ^934twf.d〇c/n 201009309 reference voltage generator to generate the working current of the temperature detecting circuit to reduce the temperature detection error caused by the process difference. First Embodiment Referring to Figure 1, there is shown a temperature detecting circuit in accordance with a first embodiment of the present invention. The temperature detecting circuit 100 includes a bandgap reference voltage generator 11 and a comparison module 120, wherein the bandgap reference voltage generator 11 is used to generate a reference voltage VBGR and a reference current I, and the comparison module 12 is based on a reference voltage The machine generates a detection voltage ντ, and compares the reference voltage VBGR with the detection voltage VT to output a shutdown signal STP. The comparison module 120 includes a temperature sensing resistor Rii and a comparator. Bandgap reference voltage generator UG _ pM〇s transistor connected to voltage source VDD and temperature sensing resistor % gate t reference voltage fine llG (10) circle = threat t should be reference current l2 Ο temperature sensing resistor km at the other end of the light At the ground GND, the temperature sensing resistor "and the common node between the pM〇s transistors outputs the corresponding temperature sensing.

• m _於溫度感測電阻^與職電晶體P 共用郎點與Μ參考電壓產生器11G的 =自 測電壓VT與參者雷懕vpm 出用乂比車乂偵 述停機信號對應於一特二=出—停機信號STP ’上 主要=:體：=，的_路 體VOS電晶體Pi4 、PM〇S電晶 電路U2、差動放大器114、議sHPl5、能隙參考 電晶體n13、電阻r14 11 ▲3934twfd〇c/n• m _ in the temperature sensing resistance ^ with the occupational crystal P common lang point and Μ reference voltage generator 11G = self-test voltage VT and the participant thunder vpm out 乂 than the rut detection stop signal corresponds to a special Two = out - stop signal STP 'on main =: body: =, _ road body VOS transistor Pi4, PM 〇 S electric crystal circuit U2, differential amplifier 114, sHPl5, energy gap reference transistor n13, resistor r14 11 ▲3934twfd〇c/n

201009309 以及腳雙極性電晶體Bl3所構成。其中，能隙參考電路 112尚包括電阻Ru、Rl2、Ri3、以及pNp雙極性電晶 Bn、Bl2 ’ *差動放大器114貝仏括pM〇s電晶體^ 以及NMOS電晶體Nll、Nl”其卜ρ_電晶體 差動放大器m、m〇s電晶體Pi4以及NM〇s電晶體^ -運算放大器，而PM0S電晶體PM以及電3 晶體ΝΠ則可視為運算放大器的輪出級電路。 ^ 在能隙參考電路m中，PMQS f晶體 源VDD與電阻Rn、R】2之間，用以提供能隙參考電 =f2 考電流L。電阻於電阻^的另—端與 性電晶體Bl2之間，雙極性電晶體Bi2的射_ 基_接於接地端GND。雙極性電晶體Bu則耦接阻 Ru的另-端與接地端GND之間，其基極也同_接於接 = 。雙極性電晶體Bu與電阻&的共用節點輸出 =-即點電壓V卜而雙極性電晶體％與電阻〜的政 用即點則輸出一第二節點電壓V2。 ’、 動放大器114中，PM0S電晶體接電壓源 /、PMOS電晶體P16、p17之間，用以提供差動放大器 =所需的參考電流l3。PM0S電晶體&、Pi7的閘極分別 輕接於第-節點電壓vi與第二節點電壓V2，而nm〇s 電晶體Νπ、N12則分別轉接於PM0S電晶體pi6、pi7的另 -端與接地端GND之間，且NM0S電晶體Nu、&的閘 極相互輕接’其中NMOS電晶體Nn的閑極更輕接於pM〇s 電晶體P i6與NMO S電晶體N!】的共用節點。 12 -8934twf.doc/n 201009309 由mos電晶體Pl4以及NMOS電晶體Ni3所 輸出級電路則麵接於差動放大器114輪出，根據差 器m所輸出的差動電壓DV輸出一調整電壓^至恤⑽ 電晶體Pn〜Pls的閘極以調整其產生的參考電壓。 電路結構而言，運算放大器所輪出的調整電壓Μ主5要^ 用來調整PMOS電減Pll所產生的參考電流h以減^ 程差異對能隙參考電壓產生H 11G的影響。然而 PMOS電晶體Pll〜Pl5的閘極皆相互輕接，並形成法 鏡，所以當參考電流^改變時，其餘的參考電流i4〜is^J 隨之改變。換言之，PMOS電晶體Pl2所導通的參考^ 工2也會隨製程差異而自行調整其電流值。pM〇s電晶^ Pu〜P!5可分別視為一電流源，且其產生的參考電汽0曰 =具有對應_或辦，參考電流W5的電航值分別由5 八PMOS電晶體pu〜pls的元件尺寸所決定。 能隙參考電壓產生器110中的PM〇s電晶體 阻〜與酿> 雙極性電晶體Βπ則串雜接於電壓源vdd ==端GND之間，且PNp雙極性電晶體&的基極同 樣耦接於接地端GND。電阻與PM〇s電晶體p丘 用節點則用以輸出參考電壓VBGR。參考電壓νΒ‘二 與溫度無關的電壓。能隙參考電廢產生器110利用正溫产201009309 and the foot bipolar transistor Bl3. The bandgap reference circuit 112 further includes resistors Ru, Rl2, Ri3, and pNp bipolar transistor Bn, Bl2 '* differential amplifier 114, including pM〇s transistor ^ and NMOS transistor N11, N1" ρ_Optical crystal differential amplifier m, m〇s transistor Pi4 and NM〇s transistor ^ - operational amplifier, while PM0S transistor PM and electric 3 crystal ΝΠ can be regarded as the operational amplifier's wheel-out stage circuit. In the gap reference circuit m, the PMQS f crystal source VDD and the resistors Rn, R 2 are used to provide a bandgap reference voltage = f2 test current L. The resistor is between the other end of the resistor ^ and the transistor B12. The emitter_base_ of the bipolar transistor Bi2 is connected to the ground GND. The bipolar transistor Bu is coupled between the other end of the resistor Ru and the ground GND, and the base is also connected to the ground. The common node output of the transistor Bu and the resistor & is the point voltage V, and the bipolar transistor % and the voltage of the resistor ~ point to output a second node voltage V2. ', the dynamic amplifier 114, PM0S Between the crystal voltage source / PMOS transistor P16, p17, to provide the differential amplifier = the required reference current l3. The gates of the M0S transistors &Pi7 are respectively connected to the first node voltage vi and the second node voltage V2, and the nm〇s transistors Νπ and N12 are respectively switched to the other ends of the PM0S transistors pi6 and pi7. Between the ground and the ground GND, and the gates of the NM0S transistors Nu, & are lightly connected to each other' wherein the idler of the NMOS transistor Nn is lighter than the pM〇s transistor P i6 and the NMO S transistor N! 12 -8934twf.doc/n 201009309 The output circuit of the MOS transistor Pl4 and the NMOS transistor Ni3 is connected to the differential amplifier 114, and the output is adjusted according to the differential voltage DV output from the differential m. Voltage ^ to the shirt (10) The gate of the transistor Pn ~ Pls to adjust the reference voltage generated by it. In terms of circuit structure, the adjustment voltage of the operational amplifier is used to adjust the reference generated by the PMOS reduction P11. The current h affects the energy gap reference voltage by H 11G. However, the gates of the PMOS transistors P11 to Pl5 are connected to each other and form a mirror, so when the reference current ^ changes, the remaining reference current I4~is^J changes accordingly. In other words, the reference of the PMOS transistor P12 is turned on. It will also adjust its current value according to the process difference. pM〇s electro-crystal ^ Pu~P!5 can be regarded as a current source respectively, and the reference electric steam generated by it 0曰= has corresponding _ or do, reference current W5 The electric yaw value is determined by the component size of the 5 PMOS PMOS transistor pu~pls respectively. The PM 〇s transistor resistance in the bandgap reference voltage generator 110 is mixed with the brewing > bipolar transistor Βπ The voltage source vdd == between the terminals GND, and the base of the PNp bipolar transistor & is also coupled to the ground GND. The resistor and the PM〇s transistor are used to output the reference voltage VBGR. The reference voltage ν Β 'two temperature-independent voltage. Energy gap reference electric waste generator 110 utilizes positive temperature production

電壓與具有負溫度係數ΡΝΡ雙極性電晶體來S =度無_參考電壓VBGR。嚴格來說，應該是理論上 文溫度影響較小的參考電壓VBGR。 值侍注意的是，在本實施例中，能隙參考電壓產生器 13 201009309 8934twf.doc/n 勺大^中所使用的參考電流13會隨著參考電 回授調整參考電壓的運算放大器是採獨立;計，：差2 大器所使㈣參考電流奸會隨 ς，放 110中的參考電流I〗而變。耆4、參考電壓產生器 係數具有正溫度 著溫度而變。只要設定偵測電壓ντ與參考=壓^ 應關係，即可債測相對應的特定溫度。值得注专的是，^ 施例中’PM0S電晶體匕所產生的參考電流\會隨著4 ，因_觀ντ也物财電流i2而影響 :it:藉此，利用能隙參考電壓產生器u〇會隨著製程差 二調整〜考電流l的特性來對應調整參考電流i2，以降低 製程差異對偵測電壓ντ的影響，使偵測輕ντ可更為準確 的對應至預先歧_定溫度值。換言之，本實施例即是利用 一個會隨著製程差異做反向調整的參考電流l2來產生偵測電 壓VT，藉此抵銷製程差異所造成的影響。 比較器130則用來比較偵測電壓VT與參考電壓 VBGR以輪出一停機信號STp，該停機信號STp對應於一特The voltage has a negative temperature coefficient ΡΝΡ bipolar transistor to S = degrees without _ reference voltage VBGR. Strictly speaking, it should be the theoretical reference voltage VBGR with less temperature influence. It should be noted that in the present embodiment, the reference current 13 used in the bandgap reference voltage generator 13 201009309 8934twf.doc/n is used as an operational amplifier for adjusting the reference voltage with reference power feedback. Independence; count, the difference between the two major devices (4) reference current rap will follow, put 110 reference current I〗.耆 4. The reference voltage generator coefficient has a positive temperature and changes with temperature. As long as the detection voltage ντ is set to the reference = voltage relationship, the corresponding specific temperature can be measured. It is worth noting that the reference current generated by the 'PM0S transistor 施 in the example will be affected by 4, because νττ is also the material current i2: it: by using the bandgap reference voltage generator U〇 will adjust the reference current i2 according to the difference of the process difference 2 to test the current l to reduce the influence of the process difference on the detection voltage ντ, so that the detection light ντ can more accurately correspond to the pre-discrimination Temperature value. In other words, in this embodiment, the detection voltage VT is generated by using a reference current l2 which is inversely adjusted with the process difference, thereby offsetting the influence of the process variation. The comparator 130 is configured to compare the detection voltage VT with the reference voltage VBGR to rotate a shutdown signal STp, and the shutdown signal STp corresponds to a special

疋溫度。當偵測電壓VT大於參考電壓VBGR時，停機信 號STP為邏輯高電位’表示電路溫度已經超過預設的溫度。 當偵測電壓VT小於參考電壓VBGR時，停機信號STP為 邏輯低電位，表示電路溫度尚未達到預設的溫度。當然’在本 發明另一實施例中，也可將偵測電壓ντ與參考電壓VBGR 201009309 ,J934twf.doc/n 對調，以產生不同電壓位準的停機信號STp，本實施例 受限。 第二實施例 由於能隙參考電壓產生器有多種作法，並不限定於上 述第-實施例，請參照圖2，圖2為根據本發明第二實施 例之溫度偵測電路200，其中圖2與圖j主要的差異在於 能隙參考電壓產生器210的内部電路結構。在圖2中，能 # 隙參考電壓產生器210内的參考電流l21、l22戶斤是由PMOS 電晶體PZ1、P22所纪成的電流鏡所產生。其中，PM〇s電晶 體Pu辆接於電壓源VDD與NM0S電晶體N21之間，PM〇s 電晶體P22耦接於電壓源VDD與電阻R〗3之間，且PM〇s電 晶體P21與PMOS電晶體p22的閘極滅輕接以形成一電流源 以產生參考電流〗21與I22。 PNP雙極性電晶體Bll耦接於麵呢電晶體％的另一 端’且PNP雙極性電晶體B„㈣一端與基極皆祕於接地端 GND。PNP雙極性電晶體Bi2耗接於電阻％的另一端且聊 • 雙極性電晶體Bl2的另一端與基極皆麵接於接地端GND。其 中’ PMOS電晶體P21的閘極耦接於該pM〇s電晶體匕與 NMOS電晶體N21的共用節點，讀〇8電晶體％與刪〇8 電晶體N22的閘極相互麵接，且NM〇s電晶體A〗的閉極 柄接於PMOS電晶體P22與NM〇s電晶體N22的共用節點。 而PMOS電晶體P15、電阻‘與磨雙雛電晶體 B!3的電路架構則與圖i相同，不再贅述。值得注意 在圖2中，PMOS電晶體p12的閘極是輕接於應⑽電晶 15 z8934twf.doc/n 201009309 ，的閘極，以電流鏡的方式產生相對應的參考電 流I23。換言之，在本實施例中，通過溫度感測電阻R仙的 參1電流I23同樣會隨著能隙參考電壓產生器210内的參考 ，流IZ1、I22而變，藉此可產生與製程以及溫度相關的參考 電流la，使偵測電壓VT與溫度的對應關係可以更為準確， 亚且不受製程差異的影響。關於圖2的其餘技術細節，則請參 照上述圖1實施例的說明，在此不加贅述。 鬌 一圖3為根據上述實施例的溫度偵測波形圖，如圖3 測電壓VT大於參考電壓VBGR時，停機信號_ 為迷輯面電位，表示電路溫度已經超顧特定溫度L。 =則電壓VT小於參考電壓VBGR時，停機信號STP為 邏輯低電位，絲電路溫度尚未達卿特定溫度τ 於债利電壓VT與溫度之間的關係貞彳可依照n計需求，执 置不同溫度係數的溫度感測電阻即可。 久 此，，值得㈣的是，鎌參考電麵生㈣設計方 二，t種類，本發明並不受限於上述圖1與圖2實施例， ^此隙參考電壓產生器均會產生隨製程差異而變的參考 题U要讓溫度感測電阻所導通的電流隨著能隙參考電 此、的内部電流而變’即可隨之調整_電壓，並雜 匕減V製程差異對温度感測結果的影響。 曰 ，上所述’本發明利用能隙參考電壓產生器的内 仙來偵測溫度變化，由於能隙參考電壓產生 會因庫製藉#^W私 的内部電流 知枯;^核自_整其錢值，因此相較於習 何以固疋電流來偵測溫度變化的方式，本發明可抵 16 201009309 屬· c/n 電壓、電流變異，大幅提高溫度偵 消因製程差異所造成的 測的準確性與靈敏度。 雖…:本發明已以較佳實施例揭露如上，然盆並 限定本發明，任何所屬技術領域巾具有通常知識者，在不 脫離本發明之精神和範_，當可作些狀更動與潤飾， =此本發明之倾範圍當視後附之巾請專利範圍所界定者 為準。疋 Temperature. When the detection voltage VT is greater than the reference voltage VBGR, the shutdown signal STP is at a logic high potential ' indicating that the circuit temperature has exceeded the preset temperature. When the detection voltage VT is less than the reference voltage VBGR, the shutdown signal STP is logic low, indicating that the circuit temperature has not reached the preset temperature. Of course, in another embodiment of the present invention, the detection voltage ντ may be reversed with the reference voltages VBGR 201009309 , J934twf.doc/n to generate the shutdown signal STp of different voltage levels, which is limited in this embodiment. The second embodiment has a plurality of methods for the energy gap reference voltage generator, and is not limited to the above-described first embodiment. Please refer to FIG. 2, which is a temperature detecting circuit 200 according to a second embodiment of the present invention, wherein FIG. 2 The main difference from FIG. j is the internal circuit structure of the bandgap reference voltage generator 210. In Fig. 2, the reference currents l21, l22 in the energy gap reference voltage generator 210 are generated by current mirrors formed by the PMOS transistors PZ1, P22. The PM〇s transistor Pu is connected between the voltage source VDD and the NM0S transistor N21, and the PM〇s transistor P22 is coupled between the voltage source VDD and the resistor R3, and the PM〇s transistor P21 and The gate of PMOS transistor p22 is decoupled to form a current source to generate reference currents 21 and I22. The PNP bipolar transistor B11 is coupled to the other end of the facet transistor %' and the PNP bipolar transistor B„(4) is secluded to the ground GND. The PNP bipolar transistor Bi2 is consumed by the resistor. The other end of the bipolar transistor B12 is connected to the ground GND. The gate of the PMOS transistor P21 is coupled to the pM〇s transistor 匕 and the NMOS transistor N21. The node, the read 电8 transistor % and the 〇8 transistor N22 gate are mutually connected, and the closed-pole handle of the NM〇s transistor A is connected to the common node of the PMOS transistor P22 and the NM〇s transistor N22. The circuit structure of the PMOS transistor P15, the resistor 'and the double crystal transistor B!3 is the same as that of the figure i, and will not be described again. It is worth noting that in Fig. 2, the gate of the PMOS transistor p12 is lightly connected. (10) The gate of the transistor 15 z8934twf.doc/n 201009309, generates a corresponding reference current I23 in the form of a current mirror. In other words, in the present embodiment, the current I23 through the temperature sensing resistor R is also the same. As the reference within the bandgap reference voltage generator 210, the streams IZ1, I22 change, thereby generating And the temperature-dependent reference current la, the correspondence between the detection voltage VT and the temperature can be more accurate, and is not affected by the process difference. For the remaining technical details of FIG. 2, please refer to the above embodiment of FIG. Note that FIG. 3 is a temperature detecting waveform diagram according to the above embodiment. When the measured voltage VT is greater than the reference voltage VBGR, the shutdown signal _ is the fascinating surface potential, indicating that the circuit temperature has exceeded Considering the specific temperature L. = When the voltage VT is less than the reference voltage VBGR, the shutdown signal STP is at a logic low level, and the temperature of the wire circuit has not yet reached a specific temperature τ. The relationship between the debt voltage VT and the temperature can be determined according to the demand of n It is sufficient to apply temperature sensing resistors with different temperature coefficients. For a long time, it is worthwhile (4), 镰 reference electric surface (4) design side 2, t type, the present invention is not limited to the above-mentioned FIG. 1 and FIG. For example, ^ this gap reference voltage generator will produce a reference U that varies with the process variation. The current that the temperature sensing resistor turns on will change according to the internal current of the energy gap reference. _ Pressure, and the effect of the difference between the V process and the V process variation on the temperature sensing result. 曰, the above description uses the inner band of the bandgap reference voltage generator to detect the temperature change, due to the energy gap reference voltage generation The internal current of the #^W private is known to be dry; the core is self-contained, so the present invention can be compared with the way of detecting the temperature change by the solid current, the invention can offset the voltage of 16 201009309 · c / n The current variability greatly improves the accuracy and sensitivity of the temperature detection caused by the difference in the process. Although the present invention has been disclosed in the preferred embodiments as above, the invention is defined by the present invention, and any technical field of the invention has the usual Those skilled in the art will be able to make changes and refinements without departing from the spirit and scope of the present invention. The scope of the present invention is defined by the scope of the patent application.

【圖式簡單說明】 圖1為根據本發明第一實施例之溫度偵測電路。 圖2為根據本發明第二實施例之溫度偵測電路。 圖3為根據本發明第一實施例與第二實施例的溫度偵 測波形圖。 、 【主要元件符號說明】 100、200 :溫度偵測電路 110、210 :能隙參考電壓產生器 112 :能隙參考電路 114 :差動放大器 120 :比較模組 130 :比較器BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a temperature detecting circuit according to a first embodiment of the present invention. 2 is a temperature detecting circuit in accordance with a second embodiment of the present invention. Fig. 3 is a diagram showing temperature detection waveforms according to the first embodiment and the second embodiment of the present invention. [Main component symbol description] 100, 200: Temperature detecting circuit 110, 210: Bandgap reference voltage generator 112: Bandgap reference circuit 114: Differential amplifier 120: Comparison module 130: Comparator

Rll〇 .溫度感測電阻Rll〇. Temperature sensing resistor

Ru、R12、R13、R14 :電阻Ru, R12, R13, R14: resistance

Pll〜Pl7、P21 〜P22 : PMOS 電晶體 Νιι、N12、N13、Ν2ι、N22 : NMOS 電晶體Pll~Pl7, P21~P22: PMOS transistor Νιι, N12, N13, Ν2ι, N22 : NMOS transistor

Bn、Bu、B13 : PNP雙極性電晶體 17 201009309 』934twf.doc/n 201009309 』934twf.doc/n 參考電流 工1 〜I5、工21、I22、！23 . VDD :電壓源 VT :偵測電壓 VBGR :參考電壓 VI :第一節點電壓 V2 :第二節點電壓 STTP :停機信號 DV :差動電壓 AV :調整電壓Bn, Bu, B13: PNP bipolar transistor 17 201009309 』934twf.doc/n 201009309 』934twf.doc/n Reference current Worker 1 ~ I5, work 21, I22,! 23 . VDD : Voltage source VT : Detection voltage VBGR : Reference voltage VI : First node voltage V2 : Second node voltage STTP : Stop signal DV : Differential voltage AV : Adjust voltage

1818

Claims (1)

201009309 .-8934twf.doc/n 十、申請專利範圍： 1. 一種溫度偵測電路，包括： 一能隙參考電壓產生器，用以產生一參考電壓與一第 一參考電流；以及 一比較模組，根據該第一參考電流產生一偵測電壓， 並比較該參考電壓與該偵測電壓以輸出一停機信號， 其中該停機信號對應於一特定溫度。 2. 如申請專利範圍第1項所述之溫度偵測電路，其中 ® 該能隙參考電壓產生器包括： 一第一電流源，用以產生一第二參考電流；以及 *·~弟二電流源，柄接於該弟' —電流源，並根據該弟二參 考電流產生該第一參考電流， 其中，該能隙參考電壓產生器根據該第二參考電流產 生該參考電壓。 3. 如申請專利範圍第2項所述之溫度偵測電路，其中 該比較模組包括： φ 一溫度感測電阻，耦接於該第二電流源與一接地端之 間，其中該溫度感測電阻與該第二電流源之一第一共用節點產 生該偵測電壓；以及 一比較器，耦接於該能隙參考電壓產生器的輸出與該 第一共用節點，用以比較該參考電壓與該偵測電壓以輸出該 停機信號。 4. 如申請專利範圍第3項所述之溫度偵測電路，其中 該溫度感測電阻具有一正溫度係數。 19 ^934twf.doc/n 201009309 5.如申請專利範圍第2項所述之溫度偵測電路，其令 該能隙參考電壓產生器更包括·· -能隙參考電路，接於該第—電流源與該接地端之 門用以ί生第一節點電壓與一第二節點電壓；以及 …-運算放大器，輕接於該能隙參考電路並根據該第一 郎點電壓與該第二節點電壓輸出—調整電壓至該第一電流 源以調整該第二參考電流。 6. 如申請專利範圍第5項所述之溫度侧電路， 該運算放大器包括： 、 去二第三電流源’耦接於該第一電流源，並根據該第二參 考電流產生一第三參考電流； -差2放大H，_於該第三電麵與該接地端之 間’並根據該第-節點電壓與該第二節點電 電壓；以及 莉 -輸出級電路，迪於該絲放大器 電壓輸出該雜電壓至該第―、像这差動 奸域 〇 茨弟一以及第二電流源以調整 該弟二、一以及第三參考電流。 7. 如中請專利_第6項所述之溫度細電路 該輸出級電路包括： 丹甲 - PMOS t該PM()S電晶體的 一平 愿源’該PMOS電晶體的閘極耦接該第—電流=:二: 應於該第二參考電流之一第四參考電流；以及’、產生對 一 NMOS電晶體，耦接於該pM〇s 與該接地端之間’且該碰0S電晶體的閘麵:接於::: 20 201009309 ,J934twf.doc/n 電壓， f中，該PMOS電晶體與該NMOS電晶體的一第二 共用節點耦接於該PM0S電晶體的閘極，且該第二共用節 點輸出該調整電壓。 、 8. 如申請專利範圍第$項所述之溫度偵測電路，其中 該能隙參考電壓產生器更包括： 一 一 PMOS電晶體，耦接於一電壓源與一電阻之間，且 φ 該PMOS電晶體的閘極耦接於該第一電流源；以及 一雙極性電晶體’耦接於該電阻的另一端與該接地端之 間，且該雙極性電晶體的基極耦接於該接地端， 其中，該電阻與該PMOS電晶體之一第二共用節點輪 出該參考電壓。 9. 如申請專利範圍第8項所述之溫度偵測電路，其 該雙極性電晶體為一 PNP雙極性電晶體。 10. 如申請專利範圍第5項所述之溫度偵測電路並 該能隙參考電路包括： # ㊃^第—電阻，祕於該第—電流源與—第—雙極性電晶 地ί ϋ該第—雙極性電晶體的另—端與基極綠接於該接 -笛-—f二電阻’與—第三電阻串聯_於該第—電流源與 其^又極性電晶體之間’且該第二雙極性電晶體的另一端盘 基極皆耦接於該接地端， /、 "其中，該第-電阻與該第-雙極性電晶體之—第二 即點輸出該第-節點電壓，該第二電阻與該第二雙極性電^體 21 ▲3934twf.doc/n 201009309 之-第三共用節點輪岭第 中請專利範園第1G項所述之溫度制電路，其 Μ -雙極性電晶體與該第二雙極性電晶體皆為一 PNP 極性電晶體。 >12·如t請專利範圍第2柄述之溫度躺電路，其中 3二電流源包括-第—pM〇 s電晶體，該第二電流源包201009309 .-8934twf.doc/n X. Patent application scope: 1. A temperature detecting circuit comprising: a bandgap reference voltage generator for generating a reference voltage and a first reference current; and a comparison module And generating a detection voltage according to the first reference current, and comparing the reference voltage with the detection voltage to output a shutdown signal, wherein the shutdown signal corresponds to a specific temperature. 2. The temperature detecting circuit of claim 1, wherein the bandgap reference voltage generator comprises: a first current source for generating a second reference current; and a second current a source, a handle connected to the current source, and generating the first reference current according to the second reference current, wherein the bandgap reference voltage generator generates the reference voltage according to the second reference current. 3. The temperature detecting circuit of claim 2, wherein the comparing module comprises: φ a temperature sensing resistor coupled between the second current source and a ground, wherein the temperature sense And detecting, by the first common node of the second current source, the detection voltage; and a comparator coupled to the output of the bandgap reference voltage generator and the first common node for comparing the reference voltage And detecting the voltage to output the shutdown signal. 4. The temperature detecting circuit of claim 3, wherein the temperature sensing resistor has a positive temperature coefficient. 19 ^934twf.doc/n 201009309 5. The temperature detecting circuit according to claim 2, wherein the bandgap reference voltage generator further comprises a band gap reference circuit connected to the first current a source and a gate of the ground are used to generate a first node voltage and a second node voltage; and an operational amplifier is connected to the bandgap reference circuit and according to the first Lang voltage and the second node voltage Output—Adjust voltage to the first current source to adjust the second reference current. 6. The temperature side circuit according to claim 5, wherein the operational amplifier comprises: a second and a third current source coupled to the first current source, and generating a third reference according to the second reference current. Current; - difference 2 is amplified by H, _ between the third electrical surface and the ground terminal 'and according to the first node voltage and the second node electrical voltage; and the lee-output stage circuit, the voltage of the wire amplifier The hybrid voltage is output to the first, and the second current source is adjusted to adjust the second, first, and third reference currents. 7. The temperature-precision circuit as described in the patent _6, the output stage circuit includes: Dan A - PMOS t a preferred source of the PM () S transistor 'The gate of the PMOS transistor is coupled to the first - current =: two: a fourth reference current corresponding to the second reference current; and ', generating an NMOS transistor coupled between the pM 〇s and the ground terminal' and the touch 0S transistor The gate surface is connected to::: 20 201009309, J934twf.doc/n voltage, f, the PMOS transistor and a second common node of the NMOS transistor are coupled to the gate of the PMOS transistor, and the The second sharing node outputs the adjustment voltage. 8. The temperature detecting circuit of claim 1, wherein the bandgap voltage generator further comprises: a PMOS transistor coupled between a voltage source and a resistor, and φ a gate of the PMOS transistor is coupled to the first current source; and a bipolar transistor is coupled between the other end of the resistor and the ground, and a base of the bipolar transistor is coupled to the gate a ground terminal, wherein the resistor and the second common node of the PMOS transistor rotate the reference voltage. 9. The temperature detecting circuit of claim 8, wherein the bipolar transistor is a PNP bipolar transistor. 10. The temperature detecting circuit according to claim 5, wherein the energy gap reference circuit comprises: #四^第—resistance, secretive to the first current source and the first-dipolar electric crystal ground ί The other end of the first-bipolar transistor is connected to the base green, and the third-resistor is connected in series with the third resistor - between the first current source and its polarity transistor The other end of the second bipolar transistor is coupled to the ground, and the first resistor and the second bipolar transistor output the first node voltage. The second resistor and the second bipolar electrode 21 ▲ 3934 twf. doc / n 201009309 - the third common node, the ridge, the patent system, the garden system, the temperature system, the 制 - double Both the polar transistor and the second bipolar transistor are a PNP polar transistor. >12·Please refer to the temperature range of the second handle of the patent range, wherein the two current sources include a -pM〇 s transistor, the second current source package 第—PM〇S電晶體’且該第—PMOS電晶體與該第二 PMOS電晶體的閘極相互㈣妾⑽成—電流鏡。 13.如申明專利範圍第2項所述之溫度偵測電路，其中 該能隙參考電壓產生器包括： 、 第一 PMOS電晶體，耦接於一電壓源與一第一 電晶體之間； 曰-第二PMOS電晶體，輕接於該電壓源與一第二刪呢 電晶體之間，且該第—PM〇s電晶體無第二pM〇s電晶體 的閘極相互耦接以形成該第一電流源； 弟雙極性電晶體’编接於該第一 NMOS電晶體的另 一端與該接地端之間，且該第—雙極性f晶體的基極賴接於該 接地端； —第一電阻，耦接於該第二_08電晶體的 以及 一第二雙極性電晶體，耦接於該第一電阻的另一端與該 接地端之間’且該第二雙極性電晶體的基極耦接於該接地/端^ 其中，該第一 PM0S電晶體的閘極耦接於該第」 PMOS電晶體與該第一 NM〇s電晶體的一第二共'用^點， 22 201009309 ]934twfdoc/n 該第一 NMOS電晶體與該第二刪⑽電 稱接，且該第二NM0S電晶體的間_接於該相互 電晶體與該第二綱〇S電晶體的一第三共用^點。〇s Η.如申請專利範圍第13項所述之溫度偵測 中該能隙參考電壓產生器更包括： 、電路，其 電晶體的閘極；以及體的間軸接於該第—⑽OS —第三雙極性電晶體，輕接於該第 接地::間，且該雙極性電晶體的基極_於=‘與该 用節點輸出該參考電壓。 第四共 中該f 13 _咖_電路’其 晶體。 及弟二雙極性電晶體皆為—ΡΝΡ雙極性電 中該^電路，其 電晶髀弟—PM〇S電晶體，該第三PM〇S 晶體的•耦二亥:與模組之間’且該三麵電 , 弟一PMOS電晶體的閘極。 該第—㈣2項所狀溫賴職路，其中 第參考電流触第二參考電流相等。 23The first-PM〇S transistor ′ and the gates of the first PMOS transistor and the second PMOS transistor are mutually (four) 妾(10) into a current mirror. 13. The temperature detecting circuit of claim 2, wherein the bandgap reference voltage generator comprises: a first PMOS transistor coupled between a voltage source and a first transistor; a second PMOS transistor coupled between the voltage source and a second transistor, and the gate of the first PM〇s transistor without the second pM〇s transistor is coupled to each other to form the a first current source; a bipolar transistor is coupled between the other end of the first NMOS transistor and the ground, and a base of the first bipolar f crystal is connected to the ground; a resistor coupled between the second _08 transistor and a second bipolar transistor coupled between the other end of the first resistor and the ground terminal and the base of the second bipolar transistor The gate of the first PMOS transistor is coupled to a second common point of the first PMOS transistor and the first NM 〇s transistor, 22 201009309 ] 934 twfdoc / n the first NMOS transistor is electrically connected to the second singular (10), and the second NMOS transistor is connected The electrically common the third transistor and a second transistor of ^ 〇S outline point. 〇s Η. The temperature-gap reference voltage generator according to claim 13 further includes: a circuit, a gate of the transistor; and a body axis connected to the first (10) OS — The third bipolar transistor is lightly connected to the ground::, and the base of the bipolar transistor outputs the reference voltage with the node. In the fourth total, the f 13 _ _ _ circuit 'its crystal. And the two-polar crystals of the two brothers are - ΡΝΡ bipolar electric in the ^ circuit, its electro-crystal 髀 — - PM 〇 S transistor, the third PM 〇 S crystal • coupling two: between the module And the three sides of the electricity, the gate of a PMOS transistor. In the second item of (4), the first reference current is equal to the second reference current. twenty three