TW201008097A - Buck converter with surge protection - Google Patents

Abstract

A switching regulator, comprising: a transistor coupled to a input voltage; a voltage clamp circuit having a Zener diode, said Zener diode being coupled to said transistor for limiting gate-to-source voltage of said transistor; a control circuit for maintaining a constant output voltage independently of variance of said input voltage; a rectifier diode for commutating current maintained by said electromotive force generating at both terminals of said inductor; an inductor for storing energy according to said current flowing from said input voltage via said transistor; an output capacitor for smoothing a voltage of said inductor; and a resistor being applied said smoothed voltage.

Description

201008097 七、指定代表圖： (一） 本案指定代表圖為：第（2 )圖。 (二) 本代表圖之元件符號簡單說明：201008097 VII. Designated representative map: (1) The representative representative of the case is: (2). (2) A brief description of the symbol of the representative figure:

VlN 輸入電壓 12 N 通道 M0SFET 14 齊納二極體 16 負載 28 電阻 30 直流-直流電源轉換器 34 钳壓電路 38 NM0S 40 控制電路 42 整流二極體 44 電感 46 輸出電容 48 電阻VlN input voltage 12 N channel M0SFET 14 Zener diode 16 load 28 resistor 30 DC-DC power converter 34 clamp circuit 38 NM0S 40 control circuit 42 rectifier diode 44 inductor 46 output capacitor 48 resistor

八、本案若有化學式時，請揭示最能顯示發明特徵的化學式·· 九、發明說明： 【發明所屬之技術領域】 本發明係相關於一種突波保護裝置，尤指一種具有突波保護功 能的降壓轉換器。 【先前技術】 201008097 ’ 於一實施例中，該輸入電壓瞬變時，該nm〇S隔離高於稽納崩潰電 壓的電壓。 於一實施例中，該腿〇S導通時，電流自該輸入電壓流經NM0S。 於一實施例中，該NM0S截止時’電動勢於電感兩端產生。 於一實施例中，該控制電路控制脈寬調變(pulse width modulation ； PWM) ° 於一實施例中，該輸入電源發生突波電壓時，電路具有線性穩壓 器之功能，將輸入電源之突波予以吸收。 •於一實施例中，該輸入電源回復為原來之電源電壓時，電路即進 入切換式直流-直流轉換器。 【實施方式】 請參考第2圖，第2圖為根據本發明之一實施例中一降壓轉換器 之示意圖。本發明使用一級的直流轉換電路，降壓轉換器包含一 鉗壓電路34、一 NM0S 38、一控制電路4〇、一整流二極體42、一 201008097 電感44、一輸出電容46以及一電阻48。 輸入電壓Vin之正端耦接剛0S 38之汲極，負端接地。鉗壓電 路34具有一稽納二極體。稽納二極體限制NM〇s 38之閘源極 (Gate to Source)電壓在VGS(max)以下。輸入電壓Vin在稽納 二極體的崩潰電壓以下時，NM0S 38操作在飽和區。輸入電壓 瞬變時，NM0S 38隔離高於稽納崩溃電壓的電壓。 圖中之鉗壓電路34具有一稽納二極體，而，稽納二極體亦可 以一線性穩壓(Linear Regulator) LD0代替。線性穩壓ld〇 一端耦接NM0S 38之閘極，一端接地。輸入電壓yin亦耦接於 LD0〇 本發明之另一實施例中鉗壓電路34，可以一運算放大器 (Operational Amplifier)以及一 npn BJT代替。運算放大 器之輸入端麵接NM0S 38之閘極，反相輸入端耦接一基準電壓 Vref。輸出端與叩n BJT之基極連接。npn BJT之射極接地， 集極連接NM0S 38之閘極。 M0S 38導通時，電流自直流輸入電壓vin ’流經順〇S 38，電 201008097 荷儲存於電感44。輸出電容46可平滑施加至電阻48之電感 44上之電壓。NM0S 38截止時，電動勢於電感44兩端產生。 整流二極體42整流電動勢，儲存之電荷供應電阻佔。控制電 路40保持在與輸入電壓Vin變化無關的固定輸出電壓，控制 脈寬調變(pulse width modulation ; PWM)。 由上可知，本發明提供具寬輸入電屢範圍之降壓式直流—直流 電源轉換器，當輸入電源發生突波電壓時，電路具有線性穩壓 器之功能，將輸入電源之突波予以吸收，待輸入電源回復為原 來之電源電壓時’電路即進入切換式直流-直流轉換器。 本發明可以將整體電路簡化，提高電路轉換效率，並減少元 件數目。 以上所述僅為本發明之較佳實施例，凡依本發明申請專利範圍所 做之均等變化與修飾，皆應屬本發明之涵蓋範圍。 【圖式簡單說明】 第1圖為目前交換式電源轉換器之示意圖。 第2圖為根據本發明之一實施例中具有突波保護功能的降壓轉換 器之示意圖。 9 201008097 【主要元件符號說明】8. If there is a chemical formula in this case, please disclose the chemical formula that best shows the characteristics of the invention. IX. Description of the invention: [Technical field of the invention] The present invention relates to a surge protection device, especially a surge protection function. Buck converter. [Prior Art] 201008097 In one embodiment, when the input voltage is transient, the nm 〇 S isolates the voltage higher than the magnitude of the breakdown voltage. In one embodiment, when the leg 〇S is turned on, current flows from the input voltage through the NMOS. In one embodiment, the NM0S is turned off when the electromotive force is generated across the inductor. In an embodiment, the control circuit controls a pulse width modulation (PWM). In an embodiment, when the input power source generates a surge voltage, the circuit has the function of a linear regulator, and the input power source is The surge is absorbed. • In one embodiment, when the input power returns to the original supply voltage, the circuit enters the switched DC-DC converter. [Embodiment] Please refer to FIG. 2, which is a schematic diagram of a buck converter according to an embodiment of the present invention. The invention uses a first-level DC conversion circuit, and the buck converter comprises a clamping circuit 34, an NM0S 38, a control circuit 4A, a rectifying diode 42, a 201008097 inductor 44, an output capacitor 46 and a resistor. 48. The positive terminal of the input voltage Vin is coupled to the drain of just 0S 38, and the negative terminal is grounded. The clamp piezoelectric circuit 34 has a spanner diode. The Gena diode limits the gate to source voltage of NM〇s 38 below VGS(max). When the input voltage Vin is below the breakdown voltage of the dipole, the NM0S 38 operates in the saturation region. When the input voltage is transient, the NM0S 38 isolates the voltage above the breakdown voltage. The clamp circuit 34 in the figure has a Zener diode, and the output diode can be replaced by a Linear Regulator LD0. The linear regulator ld〇 is coupled to the gate of the NM0S 38 at one end and grounded at one end. The input voltage yin is also coupled to the LD0. In another embodiment of the present invention, the clamping circuit 34 can be replaced by an operational amplifier (Aperture Amplifier) and an npn BJT. The input end of the operational amplifier is connected to the gate of NM0S 38, and the inverting input is coupled to a reference voltage Vref. The output is connected to the base of 叩n BJT. The emitter of npn BJT is grounded and the collector is connected to the gate of NM0S 38. When the M0S 38 is turned on, the current flows from the DC input voltage vin ' through the S 38 , and the charge 201008097 is stored in the inductor 44 . Output capacitor 46 smoothes the voltage applied to inductor 44 of resistor 48. When the NM0S 38 is turned off, an electromotive force is generated across the inductor 44. The rectifying diode 42 rectifies the electromotive force, and the stored charge supply resistor occupies. The control circuit 40 maintains a fixed output voltage independent of the change in the input voltage Vin, and controls pulse width modulation (PWM). It can be seen from the above that the present invention provides a buck DC-DC power converter with a wide input and output range. When the input power source has a surge voltage, the circuit has the function of a linear regulator, which absorbs the surge of the input power. When the input power returns to the original power supply voltage, the circuit enters the switched DC-DC converter. The present invention can simplify the overall circuit, improve circuit conversion efficiency, and reduce the number of components. The above are only the preferred embodiments of the present invention, and all changes and modifications made to the scope of the present invention should fall within the scope of the present invention. [Simple diagram of the diagram] Figure 1 is a schematic diagram of the current switching power converter. Fig. 2 is a schematic diagram of a buck converter having a surge protection function according to an embodiment of the present invention. 9 201008097 [Main component symbol description]

VlN 輸入電壓 12 14 16 28 30 34 • 38 40 42 44 46 48 N 通道 M0SFET 齊納二極體 負載 電阻 直流-直流電源轉換器 钳壓電路VlN input voltage 12 14 16 28 30 34 • 38 40 42 44 46 48 N channel M0SFET Zener diode load resistance DC-DC power converter Clamping circuit

NM0S 控制電路 整流二極體 電感 輸出電容 電阻NM0S Control Circuit Rectifier Diode Inductor Output Capacitor Resistor

Claims (1)

201008097 十、申請專利範圍： 1. -種降壓轉換器，其包含—電晶體一鉗壓電路、—控制電路、 -整流二極體、一電感、一輪出電容以及一負載，該電晶體耦接 -輸入電壓’該稽納二極_接職晶體，絲限軸電晶體之 閘源極電壓’該電感用來儲存流經該電晶體之電荷，該輪出電容 用來平滑該賴上之電壓’該平狀電壓施加至該貞載，該整流 • 一極體整流該電感兩端產生電動勢之電流，該控制電路保持在與 輸入電壓變化無關的固定輸出電壓。 2. 如申請專利範圍第！項所述之降壓轉換器，其中該電晶體係為 一 NM0S電晶體’該負載係為一電阻。 3·如申請專利範圍第2項所述之降壓轉換器，其中該輸入電壓之 _ 正端搞接該NM0S之汲極，負端接地。 4. 如申請專利範圍第2項所述之降壓轉換器，其中該鉗壓電路限 制該NM0S之閘源極(Gate to Source)電麗在VGS(max)以下。 5. 如申請專利範圍第2項所述之降壓轉換器，其中該輸入電壓在 該钳壓電路的崩潰電壓以下時’該NM〇S操作在飽和區。 11 201008097 6.如申請專利範圍第2項所述之降壓轉換器，其中該輸入電壓瞬 ' 變時，該NM0S隔離高於崩潰電壓的電壓。 7·如申請專利範圍第2項所述之降壓轉換器’其中該導通 時，電流自該輸入電壓流經NM0S。 8·如申請專利範圍第2項所述之降壓轉換器，其中該NM〇s截止 ® 時，電動勢於電感兩端產生。 9. 如申請專利範圍第2項所述之降壓轉換器，其中該控制電路控 制脈寬調變(pulse width modulation ; PWM)。 10. 如申請專利範圍第2項所述之降壓轉換器，其中該輸入電 源發生突波電壓時’電路具有線性穩壓器之功能，將輸入電源 ® 之突波予以吸收。 11. 如申請專利範圍第2項所述之降壓轉換器，其中該輸入電 源回復為原來之電源電壓時，電路即進入切換式直流_直流轉換 器。、 12. 如申請專利範圍第2項所述之降壓轉換器，其中該甜壓電 12 201008097 • 路係為一稽納二極體。 13. 如申請專利範圍第2項所述之降壓轉換器，其中該鉗壓電 路係為一線性穩壓電路。 14. 如申請專利範圍第2項所述之降壓轉換器，其中該鉗壓電 路係為一運算放大器（Operational Amplifier)以及一 BJT。 Φ 13201008097 X. Patent application scope: 1. A buck converter comprising: a transistor-clamping circuit, a control circuit, a rectifying diode, an inductor, a wheel discharging capacitor and a load, the transistor Coupling-input voltage 'the sub-polar _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The voltage 'the flat voltage is applied to the load, the rectification• one pole rectifies the current generated by the electromotive force across the inductor, and the control circuit maintains a fixed output voltage independent of the input voltage change. 2. If you apply for a patent scope! The buck converter of the above, wherein the electro-emissive system is an NMOS transistor. The load is a resistor. 3. The buck converter of claim 2, wherein the positive terminal of the input voltage is connected to the drain of the NM0S, and the negative terminal is grounded. 4. The buck converter of claim 2, wherein the clamping circuit limits the Gate to Source of the NM0S to be below VGS(max). 5. The buck converter of claim 2, wherein the input voltage is below a breakdown voltage of the clamping circuit and the NM〇S operates in a saturation region. 11. 201008097 6. The buck converter of claim 2, wherein the input voltage is transient, the NM0S isolates a voltage higher than a breakdown voltage. 7. The buck converter of claim 2, wherein the current flows from the input voltage through the NM0S when the conduction is turned on. 8. The buck converter of claim 2, wherein the NM〇s cutoff ® occurs when an electromotive force is generated across the inductor. 9. The buck converter of claim 2, wherein the control circuit controls pulse width modulation (PWM). 10. The buck converter of claim 2, wherein the input power source has a surge voltage, the circuit has a linear regulator function to absorb the surge of the input power source ® . 11. The buck converter of claim 2, wherein the input power returns to the original supply voltage, the circuit enters the switching DC-DC converter. 12. The buck converter of claim 2, wherein the sweet piezoelectric 12 201008097 • the path is a sigma diode. 13. The buck converter of claim 2, wherein the tongs piezoelectric circuit is a linear regulator circuit. 14. The buck converter of claim 2, wherein the tongs piezoelectric circuit is an operational amplifier (Aperture Amplifier) and a BJT. Φ 13