201005704 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種時序控制器、驅動器、驅動單 元、顯示器及資料傳輸方法，且特別是有關於一種使用低 擺幅差動訊號資料之形式來傳輸指令訊號之時序控制 器、驅動器、驅動單元、顯示器及資料傳輸方法。 【先前技術】 ⑩ 請參照第1圖’其繪示乃傳統顯示器之示意圖，顯示 器10包括面板11、時序控制器13及多個資料驅動器^ 141〜14η。在傳統的資料傳輸結構中，時序控制器13與資 料驅動器141〜14η之間的傳輸訊號形式可分為電晶體邏輯 (Transistor-transistor Logic，TTL)訊號與低擺幅差動訊號 (Reduced Swing Differential Signal，RSDS)兩類。其中， 於第1圖中，係以複數對訊號線之形式來表達所傳輸訊號 之形式為低擺幅差動訊號，與單條訊號線所表達之電晶體 邏輯訊號做區隔。 ❹ 其中，時脈訊號RSDS—CLK以及與畫素相關聯之資 料訊號，例如紅光資料訊號Data一R、綠光資料訊號Data G 及藍光資料訊號Data_B，是以低擺幅差動訊號的形式由時 序控制器13經複數對訊號線傳送至資料驅動器141〜i4n， 依顯示器所能顯示的色彩多寡而定，前述紅光、綠光、藍 光資料可能各需要三對或三對以上的訊號線傳送資料。而 時序控制器13中用以控制資料驅動器141〜Ι4η之控制訊 號，例如由時序控制器13傳送至資料驅動器141〜14η的 6 201005704 i rv / -τι rv 時序控制訊號TP1、電壓極性控制訊號P0L、由時序控制 器13傳至資料驅動器141的起始控制訊號STH以及資料 驅動器141〜14η間之致能訊號Enb一X(X=1〜η-I)則是以電 晶體邏輯訊號之形式進行傳遞。 當資料驅動器141接收到起始控制訊號STH後，資 料驅動器141開始接收從時序控制器13傳送而來的資料 訊號Data一R、Data一G及Data_B。當資料驅動器141完成 資料的接收之後’資料驅動器141發出致能訊號Enb_l至 資料驅動器142，以使資料驅動器142開始接收從時序控 ❹制13傳送而來得資料訊號Data_R、Data_G及Data B。 而當資料驅動器142完成資料的接收之後，資料驅動器142 發出致能訊號Enb—2至資料驅動器143。其餘的資料驅動 器143〜14η的操作方式亦同，於此不予贅述。 然而’為了得以正確地對控制訊號進行判斷，電晶體 邏輯訊號於時脈訊號上升緣(rising edge)或下降緣（falling edge)產生前必須具有足夠之建立時間（setUp time)，且於時 脈訊號上升緣或下降緣產生後必須維持足夠之保持時間 ❹（hold time)。如此，當系統運作速度加快時，電晶體邏輯 訊號之建立時間及保持時間將會過短，不足以配合系統運 作速度’故容易讀取到不正確的控制訊號，致使顯示器10 顯示不正確的晝面。 除此之外，資料驅動器141〜14η間之致能訊號Enb_X 亦為電晶體邏輯訊號，於高頻時在傳遞上易產生失真或延 遲。甚且，基於致能訊號Enb_X係於資料驅動器完成接收 資料之後，才發送給下一個資料驅動器。故資料驅動器所 需之處理時間亦會讓致能訊號Enb_X有延遲產生。如此一 7 201005704 Λ. *Τ t ΤΙ ΓΧ 來將會導致資料驅動器141〜14η無法於正確的時間被致能 以讀取資料驅動器141〜14η所應讀取之資料訊號，而讀取 到錯誤之資料訊號，進而使得顯示器10顯示不正確之畫 面。 【發明内容】 本發明係有關於一種時序控制器、驅動器、驅動單 元、顯示器及資料傳輸方法，在時序控制器藉由使用低擺 〇 幅差動訊號之形式來傳輸指令訊號，使得系統在高頻操作 時，每個驅動器間所接收到之控制訊號與時序控制器所送 出之資料訊號能夠同步，以使驅動器可以讀取正確之資料 訊號，顯示器能顯示正確之晝面。 根據本發明之第一方面，提出一種時序控制器，用以 配置在顯示器中，顯示器包括面板及複數個驅動器，驅動 器根據至少一控制訊號進行操作，時序控制器包括訊號接 收器、邏輯單元以及訊號處理單元。訊號接收器接收外部 ®訊號，邏輯單元耦接至訊號接收器，並根據外部訊號產生 内部資料訊號及至少一控制訊號。訊號處理單元將内部資 料訊號轉換成差動資料訊號，並將差動資料訊號輸出至該 複數個驅動器，訊號處理單元並根據至少一控制訊號產生 至少一差動指令訊號，訊號處理單元將至少一差動指令訊 號輸出至該複數個驅動器。 根據本發明之第二方面，提出一種資料傳輸方法，包 括，首先，接收複數個外部訊號。接著，根據此複數個外 8 201005704 部訊號產生一内部資料訊號及至少一控制訊號。然後，將 内部資料訊號轉換成一差動資料訊號，並輸出差動資料訊 號，且根據至少一控制訊號產生至少一差動指令訊號並 輸出至少一差動指令訊號。 根據本發明之第三方面，提出一種驅動器，用以配置 在顯示器中，顯示器包括時序控制器與面板，驅動器包括 訊號處理單元以及驅動器主電路單元。訊號處理單元接收 由時序控制器輸出之差動資料訊號及至少一差動指令訊 ©號，訊號處理單元並將差動資料訊號轉換成内部資料訊 號，且根據至少一差動指令訊號產生至少一控制訊號，訊 號處理單元更判斷至少一控制訊號是否為用以控制驅動 器之控制訊號。驅動器主電路單元用以驅動面板。其中， 當至少一控制訊號之一為用以控制驅動器之控制訊號 時，驅動器主電路單元根據至少一控制訊號進行操作。 根據本發明之第四方面，提出一種資料傳輸方法，包 括，首先，接收一差動資料訊號及至少一差動指令訊號， 參並將差動資料訊號轉換成一内部資料訊號，且根據至少— 差動指令訊號產生至少一控制訊號。接著，判斷至少一控 制訊號是否為用以控制一驅動器之控制訊號。然後，當至 少一控制訊號之一為用以控制驅動器之控制訊號時，根據 至少一控制訊號驅動一面板。 根據本發明之第五方面，提出一種驅動單元，用以裴 置在顯示器中’顯示器包括面板，驅動單元包括複數個驅 動器以及時序控制器。時序控制器包括訊號接收器、邏輯 9 201005704 ι vv /*tr rv 單元及第一訊號處理單元。訊號接收器接收外部訊號，邏 輯單元耦接訊號接收器，並根據外部訊號產生内部資料訊 號及至少一第一控制訊號。第一訊號處理單元將内部資料 訊號轉換成差動資料訊號，並將差動資料訊號輸出至該複 數個驅動器，第一訊號處理單元並根據至少一第一控制訊 號產生至少一差動指令訊號，第一訊號處理單元將至少一 差動指令訊號輸出至該複數個驅動器。其中，驅動器包括 第二訊號處理單元及驅動器主電路單元。第二訊號處理單 Φ 元接收由時序控制器輸出之差動資料訊號及至少一差動 指令訊號，第二訊號處理單元並將差動資料訊號轉換成内 部資料訊號，且根據至少一差動指令訊號產生至少一第二 控制訊號，第二訊號處理單元更判斷至少一第二控制訊號 是否為用以控制驅動器之控制訊號。驅動器主電路單元驅 動面板。其中，當至少一第二控制訊號之一為用以控制驅 動器之控制訊號時，驅動器主電路單元根據至少一第二控 制訊號進行操作。 β 根據本發明之第六方面，提出一種顯示器，包括面板 以及驅動單元。驅動單元包括時序控制器及多個驅動器。 時序控制器包括訊號接收器、邏輯單元及第一訊號處理單 元。訊號接收器接收外部訊號，邏輯單元耦接訊號接收 器，並根據外部訊號產生内部資料訊號及至少一第一控制 訊號。第一訊號處理單元將内部資料訊號轉換成差動資料 訊號，並將差動資料訊號輸出至該複數個驅動器，第一訊 號處理單元並根據至少一第一控制訊號產生至少一差動 201005704 屋▼▼ ί T4 指令訊號’第-訊號處理單元將至少一差動指令訊號輸出 至該複數個驅動器。驅動器包括第二訊號處理單元及驅動 器主電路單元。第二訊號處理單元接收由時序控制器輸出 之差動貧料訊號及至少一差動指令訊號，第二訊號處理單 元並將差動資料訊號轉換成内部資料訊號，且根據至少一 差動指令訊號產生至少一第二控制訊號，第二訊號處理單 元更判斷至少一第二控制訊號是否為用以控制驅動器之 控制訊號。驅動器主電路單元驅動面板。其中，當至少一 0第一控制訊號之一為用以控制驅動器之控制訊號時，驅動 器主電路單元根據至少一第二控制訊號進行操作。 根據本發明之第七方面，提出一種資料傳輸方法包 括，首先，接收複數個外部訊號。接著，根據此複數個外 部訊號產生一内部資料訊號及至少一第一控制訊號。再 來，將内部資料訊號轉換成一差動資料訊號，且根據至少 一第一控制訊號產生一差動指令訊號。之後，將差動資料 訊號轉換成内部資料訊號，且根據至少一差動指令訊號產 ❿生至少一第二控制訊號。接著，判斷至少一第二控制訊號 是否為用以控制一驅動器之控制訊號。然後，當至少一第 二控制訊號之一為用以控制驅動器之控制訊號時，根據至 少'第 '一控制訊號驅動一面板。 為讓本發明之上述内容能更明顯易懂，下文特舉一較 佳實施例，並配合所附圖式’作詳細說明如下： 【實施方式】 11 201005704 1 /11 一 α本，明提出一種時序控制器、驅動器、驅動單元、顯 =器及貝料傳輸方法，時序控制器藉由使用低擺幅差動訊 號之=式來傳輸指令訊號，使得系統在高頻操作時，每個 驅所接收到之控制訊號與時序控制器所送出之資料 訊號f夠同步’以使驅動器可以讀取正確之資料訊號，顯 示器能顯示正確之畫面。 次請參照第2圖，其繪示乃依照本發明之較佳實施例之 負料傳輪方法之流程圖。首先，於步驟201中，接收複數 ❹，外。卩訊號。接著，於步驟202中，根據此複數個外部訊 號產生一内部資料訊號及至少一控制訊號。然後，於步驟 203中，將内部資料訊號轉換成一差動資料訊號，並輸出 此差動資料訊號，且根據至少一控制訊號產生至少一差動 指令訊號，並輸出至少一差動指令訊號。其中，此複數個 外部訊號係為低壓差動訊號(Low v〇Uage Diffei>ential201005704 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present invention relates to a timing controller, a driver, a driving unit, a display, and a data transmission method, and more particularly to a form of using low swing differential signal data. A timing controller, driver, drive unit, display, and data transmission method for transmitting command signals. [Prior Art] 10 Referring to Fig. 1 which is a schematic view of a conventional display, the display 10 includes a panel 11, a timing controller 13, and a plurality of data drivers 141 to 14n. In the conventional data transmission structure, the transmission signal form between the timing controller 13 and the data drivers 141 14 14n can be divided into a Transistor-Transistor Logic (TTL) signal and a Low Swing Differential signal (Reduced Swing Differential). Signal, RSDS) two categories. In the first figure, the signal transmitted in the form of a plurality of signal lines is expressed as a low-swing differential signal, which is distinguished from the transistor logic signal expressed by a single signal line. ❹ The clock signal RSDS_CLK and the data signal associated with the pixel, such as the red data signal Data-R, the green data signal Data G and the blue light data signal Data_B, are in the form of low-swing differential signals. The timing controller 13 transmits the signal lines to the data drivers 141 to i4n through a plurality of signals, and the red, green, and blue light data may each require three or more pairs of signal lines depending on the color of the display. Transfer data. The control signals for controlling the data drivers 141 to η4n in the timing controller 13, for example, are transmitted from the timing controller 13 to the data drivers 141 to 14n. 6 201005704 i rv / -τι rv timing control signal TP1, voltage polarity control signal P0L The enable signal STH transmitted from the timing controller 13 to the data driver 141 and the enable signals Enb_X (X=1~η-I) between the data drivers 141 14 14 n are in the form of transistor logic signals. transfer. When the data driver 141 receives the start control signal STH, the data driver 141 starts receiving the data signals Data_R, Data_G, and Data_B transmitted from the timing controller 13. After the data driver 141 completes the reception of the data, the data driver 141 issues the enable signal Enb_1 to the data driver 142 to cause the data driver 142 to start receiving the data signals Data_R, Data_G and Data B transmitted from the timing control system 13. When the data driver 142 completes the reception of the data, the data driver 142 issues the enable signal Enb-2 to the data driver 143. The operation modes of the remaining data drivers 143 to 14n are also the same, and will not be described herein. However, in order to correctly judge the control signal, the transistor logic signal must have sufficient settling time (setUp time) before the generation of the rising edge or falling edge of the clock signal. A sufficient hold time must be maintained after the rising or falling edge of the signal is generated. In this way, when the system operates faster, the setup time and hold time of the transistor logic signal will be too short to match the operating speed of the system, so it is easy to read the incorrect control signal, causing the display 10 to display incorrectly. surface. In addition, the enable signal Enb_X between the data drivers 141 to 14n is also a transistor logic signal, which is susceptible to distortion or delay in transmission at high frequencies. Moreover, the enabling signal Enb_X is sent to the next data drive after the data driver completes receiving the data. Therefore, the processing time required by the data driver will also cause delay in the enable signal Enb_X. Such a 7 201005704 Λ. *Τ t ΤΙ ΓΧ will cause the data drivers 141~14n to be disabled at the correct time to read the data signals to be read by the data drivers 141~14n, and read the error. The data signal, in turn, causes the display 10 to display an incorrect picture. SUMMARY OF THE INVENTION The present invention relates to a timing controller, a driver, a driving unit, a display, and a data transmission method. The timing controller transmits a command signal in the form of a low swing amplitude differential signal, so that the system is high. During frequency operation, the control signal received between each driver and the data signal sent by the timing controller can be synchronized, so that the driver can read the correct data signal, and the display can display the correct picture. According to a first aspect of the present invention, a timing controller is provided for configuring in a display, the display includes a panel and a plurality of drivers, the driver operates according to at least one control signal, and the timing controller includes a signal receiver, a logic unit, and a signal Processing unit. The signal receiver receives the external ® signal, and the logic unit is coupled to the signal receiver, and generates an internal data signal and at least one control signal according to the external signal. The signal processing unit converts the internal data signal into a differential data signal, and outputs the differential data signal to the plurality of drivers, and the signal processing unit generates at least one differential command signal according to the at least one control signal, and the signal processing unit will at least one The differential command signal is output to the plurality of drivers. According to a second aspect of the present invention, a data transmission method is provided, comprising, firstly, receiving a plurality of external signals. Then, according to the plurality of external 8 201005704 signals, an internal data signal and at least one control signal are generated. Then, the internal data signal is converted into a differential data signal, and the differential data signal is output, and at least one differential command signal is generated according to the at least one control signal and at least one differential command signal is output. According to a third aspect of the present invention, a driver is provided for being disposed in a display, the display including a timing controller and a panel, the driver including a signal processing unit and a driver main circuit unit. The signal processing unit receives the differential data signal output by the timing controller and the at least one differential command signal number, and the signal processing unit converts the differential data signal into an internal data signal, and generates at least one according to the at least one differential command signal. The control signal, the signal processing unit further determines whether the at least one control signal is a control signal for controlling the driver. The driver main circuit unit is used to drive the panel. Wherein, when one of the at least one control signal is a control signal for controlling the driver, the driver main circuit unit operates according to the at least one control signal. According to a fourth aspect of the present invention, a data transmission method is provided, comprising: first receiving a differential data signal and at least one differential command signal, and converting the differential data signal into an internal data signal, and according to at least one difference The command signal generates at least one control signal. Next, it is determined whether the at least one control signal is a control signal for controlling a driver. Then, when at least one of the control signals is a control signal for controlling the driver, a panel is driven according to at least one control signal. According to a fifth aspect of the present invention, a drive unit is provided for mounting in a display. The display includes a panel, and the drive unit includes a plurality of drivers and a timing controller. The timing controller includes a signal receiver, a logic 9 201005704 ι vv /*tr rv unit, and a first signal processing unit. The signal receiver receives the external signal, and the logic unit is coupled to the signal receiver, and generates an internal data signal and at least a first control signal according to the external signal. The first signal processing unit converts the internal data signal into a differential data signal, and outputs the differential data signal to the plurality of drivers, and the first signal processing unit generates at least one differential command signal according to the at least one first control signal. The first signal processing unit outputs at least one differential command signal to the plurality of drivers. The driver includes a second signal processing unit and a driver main circuit unit. The second signal processing unit Φ element receives the differential data signal output by the timing controller and the at least one differential command signal, and the second signal processing unit converts the differential data signal into an internal data signal, and according to at least one differential command The signal generates at least one second control signal, and the second signal processing unit further determines whether the at least one second control signal is a control signal for controlling the driver. The drive main circuit unit drives the panel. Wherein, when one of the at least one second control signal is a control signal for controlling the driver, the driver main circuit unit operates according to the at least one second control signal. According to a sixth aspect of the invention, a display is provided comprising a panel and a drive unit. The drive unit includes a timing controller and a plurality of drivers. The timing controller includes a signal receiver, a logic unit, and a first signal processing unit. The signal receiver receives the external signal, and the logic unit is coupled to the signal receiver, and generates an internal data signal and at least a first control signal according to the external signal. The first signal processing unit converts the internal data signal into a differential data signal, and outputs the differential data signal to the plurality of drivers, and the first signal processing unit generates at least one differential according to the at least one first control signal. ▼ ί T4 command signal 'the first signal processing unit outputs at least one differential command signal to the plurality of drivers. The driver includes a second signal processing unit and a driver main circuit unit. The second signal processing unit receives the differential poor signal and the at least one differential command signal output by the timing controller, and the second signal processing unit converts the differential data signal into an internal data signal, and according to the at least one differential command signal The second signal processing unit further determines whether the at least one second control signal is a control signal for controlling the driver. The drive main circuit unit drives the panel. Wherein, when at least one of the first control signals is a control signal for controlling the driver, the driver main circuit unit operates according to the at least one second control signal. According to a seventh aspect of the present invention, a data transmission method is provided, which first comprises receiving a plurality of external signals. Then, an internal data signal and at least one first control signal are generated according to the plurality of external signals. Then, the internal data signal is converted into a differential data signal, and a differential command signal is generated according to the at least one first control signal. Thereafter, the differential data signal is converted into an internal data signal, and at least one second control signal is generated based on the at least one differential command signal. Then, it is determined whether the at least one second control signal is a control signal for controlling a driver. Then, when one of the at least one second control signal is a control signal for controlling the driver, a panel is driven according to at least the 'first' control signal. In order to make the above description of the present invention more comprehensible, a preferred embodiment will be described below, and the detailed description of the present invention will be described as follows: [Embodiment] 11 201005704 1 /11 The timing controller, the driver, the driving unit, the display unit, and the bait transmission method, the timing controller transmits the command signal by using the low swing differential signal, so that the system operates at a high frequency, each drive The received control signal is synchronized with the data signal f sent by the timing controller to enable the driver to read the correct data signal, and the display can display the correct picture. Referring to Figure 2, there is shown a flow chart of a negative transfer method in accordance with a preferred embodiment of the present invention. First, in step 201, a plurality of ❹ are received.卩 signal. Then, in step 202, an internal data signal and at least one control signal are generated according to the plurality of external signals. Then, in step 203, the internal data signal is converted into a differential data signal, and the differential data signal is output, and at least one differential command signal is generated according to the at least one control signal, and at least one differential command signal is output. Among them, the plurality of external signals are low voltage differential signals (Low v〇Uage Diffei> ential
Signal，LVDS)，差動資料訊號與至少一差動指令訊號係 為低擺幅差動訊號(Reduced Swing Differential signa卜 RSDS) 〇 ❿—請參照第3圖，其繪示乃依照本發明之較佳實施例之 顯示器之示意圖》顯示器30包括面板31以及驅動單元 32 :驅動單元32包括時序控制器33以及多個驅動器，驅 動器例如為資料驅動器341〜34η。於本實施例中，此多個 驅動器係以資料驅動器為例做說明，但其他類型驅動器， 如知描驅動器，亦可應用於本實施例中。此外，於第3圖 中，係以複數對訊號線之形式來表達所傳輸訊號之形式為 低擺幅差動訊號，與單條訊號線所表達之電晶體邏輯訊號 做區隔。 12 201005704 1 I ΤΙ Γ\ 時序控制器33係用以經由複數對訊號線送出低擺幅 差動時脈訊號RSDS_CLK和資料訊號，包括紅光資料訊號 Data_R、綠光資料訊號Data_G及藍光資料訊號Data_B， 至資料驅動器341〜34η。時序控制器33更用以經由一對訊 號線送出低擺幅差動指令訊號RSDS—CMD’至資料驅動器 341〜34η。包含不同的控制碼的低擺幅差動指令訊號 RSDS一CMD係用以代表不同的控制訊號，例如用以代表起 始控制訊號STH、時序控制訊號ΤΡ1或電壓極性控制訊號 POL。 ® 其中’起始控制訊號STH係用以指示資料驅動器 341〜34η開始接收從時序控制器33傳送而來的資料訊號 Data—R、Data一G及Data—Β。而當時序控制訊號τρ 1為致 能時’資料驅動器341〜34η將對應至所接收的資料訊號 Data—R、Data—G及Data—Β的畫素電壓輸出至面板3卜電 壓極性控制訊號POL係用以決定對應至所接收之資料訊 號之晝素電壓的極性。 請參照表1 ’其所緣示乃當n=3時，上述之用以代表 參起始控制訊號STH、時序控制訊號TP1及電壓極性控制▲ 號POL之低擺幅差動指令訊號RSDS_CMD的指令< 之一例。本實施例係根據所要輸出之控制訊號，根據表值 產生12位元(bit)之指令，然後以數位傳輸之形式，串1 地將低擺幅差動指令訊號RSDS—CMD輸出至所有的次， 驅動器341〜34η。其中，不同的控制訊號之狀態（高位 低位準之狀態）係可由不同的控制碼來區別之。 或 起始 零欄 控制碼 零攔 終止攔 代表之控 13 201005704 參 欄 1111 0 00000 0 1 資料驅動341之 STH 1111 0 00001 0 1 資料驅動器342之 STH 1111 0 00010 0 1 資料驅動器343之 STH 1111 0 00011 0 1 資料驅動器341之高 位準的訊號TP1 1111 0 00100 0 1 資料驅動裔342之南 位準的訊號TP1 1111 0 00101 0 1 資料驅動器343之高 位準的訊號TP1 1111 0 00110 0 1 資料驅動器341之低 位準的訊號TP1 1111 0 00111 0 1 資料驅動器342之低 位準的訊號TP1 1111 0 01000 0 1 資料驅動器343之低 位準的訊號TP1 1111 0 01001 0 1 資料驅動器341之高 位準的訊號POL 1111 0 01010 0 1 資料驅動器342之高 位準的訊號POL 1111 0 01011 0 1 資料驅動器343之高 位準的訊號POL 1111 0 01100 0 1 資料驅動器341之低 201005704 位準的訊號POL 1111 0 01101 0 1 資料驅動342之低 位準的訊號POL 1111 0 01110 0 1 資料驅動器343之低 位準的訊號POL 1111 0 01111 0 1 保留 表1 此外，差動資料訊號之調整方式亦可同時應用於低擺 幅差動訊號指令對。偏斜控制之調整方式係於時序控制器 ❹ 33上之三個偏斜控制腳位（pin)輸入偏斜控制值，以調整低 擺幅差動資料訊號及低擺幅差動指令訊號之建立時間及 保持時間。偏斜控制值及所對應之建立時間及保持時間的 關係請參照表2，其中T代表低擺幅差動資料訊號及低擺 幅差動指令訊號之訊號週期，而此建立時間及保持時間例 如是參考時序控制器33之系統時脈訊號計算得之。 偏斜控制值 建立時間 保持時間 000 T/4 T/4 001 T/4-T/16 T/4 + T/16 010 T/4-2T/16 T/4 + 2T/16 011 T/4-3T/16 T/4 + 3T/16 100 T/4 T/4 101 T/4+T/16 T/4-T/16 110 T/4 + 2T/16 T/4-2T/16 111 T/4 + 3T/16 T/4-3T/16 表2 15 〇 由於對應至所有資料驅動器341〜34η的起始控制訊 號^ΤΗ的低擺幅差動指令訊號RSDS_CMD皆是由時序控 制。器33所產生’時序控制器33可以根據所要輸出之資料 訊，/於正確的時間點依序輸出每個資料驅動器之起始控 制訊5虎STH所對應的低擺幅差動指令訊號RSDS—CMD。 因此’本實施例解決了傳統作法中，由資料驅動器輸出起 始控制訊號以控制下一個資料驅動器，而造成起始控制訊 號傳遞㈣’而使得資料驅動器讀取到錯誤之資料訊號， ®進而使/寻顯示器顯示不正確之晝面之問題。 兹針對時序控制器33做更進一步之說明。請參照第 4圖’其續'示乃依照本發明之較佳實施例之時序控制器之 方塊圖。時序控制器33包括訊號接收器331、邏輯單元 332以及第一訊號處理單元333。訊號接收器331係用以 接收低壓差動訊號（Low Voltage Differential Signal， LVDS)形式之外部資料訊號並將其轉換成電晶體邏輯訊號 之形式。邏輯單元332辆接訊號接收器331，並根據外部 ❹訊號產生内部資料訊號及控制訊號STH、TP1或POL。第 一訊號處理單元333係將内部資料訊號轉換成差動資料訊 號 Data_R、Data_G、Data—B 及 RSDS_CLK，並將差動資 料訊號 Data一R、Data_G、Data_B 及 RSDS_CLK 輸出至如 第3圖所示之資料驅動器341〜34n。第一訊號處理單元333 並根據控制訊號STH、TP1或POL產生低擺幅差動指令訊 號RSDS—CMD ’且將低擺幅差動指令訊號RSDS_CMD輸 出至如第3圖所示之資料驅動器341〜34η。 請參照第5圖，其所繪示乃資料驅動器341〜34η所接 201005704 收之一低擺幅差動時脈訊號RSDS—CLK、低擺幅差動指令 訊號RSDS—CMD、及低擺幅差動指令訊號rsDS_CMD所 對應之控制訊號STH/POL/TP1之時序圖。12位元之低擺 幅差動指令訊號RSDS一CMD以數位形式串列式地輸出至 資料驅動器341〜34η後，資料驅動器341〜34η可以採用雙 緣（double edge)觸發的方式以接收低擺幅差動指令訊號 RSDS—CMD ’並參照表1進行解碼。如此一來，在第七個 低擺幅差動時脈訊號RSDS_CLK之時脈週期後，資料驅動 器即可解碼出12位元之指令内容值所代表之控制訊號 © STH/P0L/TP1 〇 此外，第一訊號處理單元333包括資料傳送器334、 編碼器335以及指令傳送器336。資料傳送器334接收内 部資料訊號’且將内部資料訊號轉換成差動資料訊號並輸 出至如第3圖所示之資料驅動器341〜34η，差動資料訊號 包括紅光資料訊號Data_R、綠光資料訊號Data G、藍光 資料訊號Data—Β及時脈訊號RSDS—CLK。編碼器335接 收控制訊號STH、TP 1或POL並將之編瑪成低擺幅差動指 ❹令訊號RSDS—CMD’指令傳送器336將低擺幅差動指令訊 號RSDS_CMD傳送至如第3圖所示之資料驅動器 341〜34η 〇 請參照第6圖’其繪示乃依照本發明之較佳實施例之 資料傳輸方法之另一例之流程圖。首先，於步驟6〇1中， 接收一差動資料訊號及至少一差動指令訊號，並將差動資 料訊號轉換成一内部資料訊號，且根據至少一差動指令訊 號產生至少一控制訊號。接著，於步驟6〇2中，判斷此至 少一控制訊號是否為用以控制一驅動器之控制訊號，此驅 17 201005704 動器係為一資料驅動器。然後，於步驟603中，當至少一 控制訊號之一為用以控制驅動器之控制訊號時，根據至少 一控制訊號驅動一面板。其中，差動資料訊號與至少一差 動指令訊號為低擺幅差動訊號（Reduced Swing Differential Signal，RSDS)。 於上述之步驟603中，實質上更具有多個較細微的步 驟’包括’首先，暫存内部資料訊號及至少一控制訊號。 接著，根據至少一控制訊號將内部資料訊號轉換為一類比 訊號。然後，將類比訊號輸出至面板以驅動面板。 ® 請參照第7圖’其繪示乃依照本發明之較佳實施例之 資料驅動器之方塊圖。資料驅動器34X(X=1〜η)包括第二 訊號處理單元360以及驅動器主電路單元361，第二訊號 處理單元360係接收由時序控制器33輸出之差動資料訊 號 Data_R、Data_G 及 Data_B、時脈訊號 RSDS_CLK 及低 擺幅差動指令訊號RSDS_CMD，第二訊號處理單元360 並將差動資料訊號Data_R、Data_G及Data_B以及時脈訊 號RSDS_CLK轉換成内部資料訊號，且根據低擺幅差動指 φ令訊號RSDS—CMD產生控制訊號STH、TP1或POL，第 二訊號處理單元360更判斷控制訊號STH、TP1或POL是 否為用以控制資料驅動器34X之控制訊號，其中，因為資 料驅動器34X(X=1〜η)皆接收相同的控制訊號TP1、POL， 製造時需事先將資料驅動器的相對位置關係（X=l〜N)儲存 至控制驅動器，此外’亦可採用由外界輸入另一個設定訊 號（未繪示於圖）至第二訊號處理單元360，例如在設計資 料驅動器1C時，留以輸入腳位，使資料驅動器1C能根據 輸入腳位的電位決定資料驅動器的相對位置關係 201005704 (X=l 〜η) 〇 驅動器主電路單元361用以驅動面板31。其中，當 控制訊號STH、TP1或POL之一為用以控制驅動器之控制 訊號時，驅動器主電路單元361係根據該控制訊號進行操 作。 ❹ 此外，第二訊號處理單元360包括資料接收器362、 指令接收器363以及解碼器364。資料接收器362接收差 動資料訊號’且將差動資料訊號轉換成内部資料訊號，指 令接收器363接收低擺幅差動指令訊號rsDS—CMD，解碼 器364輕接至指令接收器363 ’並將低擺幅差動指令訊號 RSDS_CMD解碼成控制訊號sTH、TP1或POL。 驅動器主電路單元361包括資料緩衝器365、數位類 比轉換器366以及輸出多工器367，資料緩衝器3幻根據 控制信號STH或致能訊號Enb—χ暫存内部資料訊號及控 制说號TP1或pOL ’數位類比轉換器366係根據控制訊號 TP1或POL將内部資料訊號轉換為類比訊號，輸出多工器 ^輕接數位類比轉換11飾，並將類比訊號輸出至面板 動單二:上器述 擺幅差動訊號之形式時序控制器藉由使用低 器傳輸至資料驅動器之號，將習知從時序控制 差動指令訊號，待資料驅輯讯號編碼成-低擺幅 使得系統在高頻操作時，之後再進行解碼動作， 訊號與時序控制H所 料驅動11所純到之控制 會有延遲現像產生，以係甚 資料訊號能夠同步而不 使資料驅動器可以讀取正確之資料 19 201005704 訊號，顯示器能顯示正確之晝面，增加了整體系統讀取資 料之正確性。 另外，由於時序控制器對每一個資料驅動器均作控 制，故可以個別控制起始控制訊號STH、時序控制訊號 TP1及電壓極性控制訊號POL，是故，不管未來有多少新 增的控制訊號，都可以編碼成低擺幅差動指令訊號 RSDS—CMD，由現有之一對傳輸線傳輸而不需新的傳輸 線，印刷電路板上佈線面積將可縮小至兩條線，故不會增 @ 加成本，且低擺幅差動訊號是一個很成熟的通訊協定，很 容易即可實現。 綜上所述，雖然本發明已以一較佳實施例揭露如上， 然其並非用以限定本發明。本發明所屬技術領域中具有通 常知識者，在不脫離本發明之精神和範圍内，當可作各種 之更動與潤飾。因此，本發明之保護範圍當視後附之申請 專利範圍所界定者為準。Signal, LVDS), the differential data signal and the at least one differential command signal are reduced Swing Differential signa (RSDS) 〇❿ - please refer to FIG. 3, which is a comparison according to the present invention. A schematic diagram of a display of a preferred embodiment includes a panel 31 and a drive unit 32. The drive unit 32 includes a timing controller 33 and a plurality of drivers, such as data drivers 341-34n. In this embodiment, the plurality of drivers are described by taking a data driver as an example, but other types of drivers, such as a known driver, can also be applied in this embodiment. In addition, in Figure 3, the form of the transmitted signal is expressed as a low-swing differential signal in the form of a complex signal line, which is distinguished from the transistor logic signal represented by a single signal line. 12 201005704 1 I ΤΙ Γ \ The timing controller 33 is used to send low swing differential clock signals RSDS_CLK and data signals through the complex pair of signal lines, including red data signal Data_R, green data signal Data_G and blue data signal Data_B , to data drives 341~34n. The timing controller 33 is further configured to send the low swing differential command signal RSDS_CMD' to the data drivers 341~34n via a pair of signal lines. Low swing differential command signal with different control codes RSDS-CMD is used to represent different control signals, for example, to represent the start control signal STH, the timing control signal ΤΡ1 or the voltage polarity control signal POL. The 'start control signal STH' is used to instruct the data drivers 341 to 34n to start receiving the data signals Data_R, Data_G, and Data_Β transmitted from the timing controller 33. When the timing control signal τρ 1 is enabled, the data drivers 341 to 34η output the pixel voltages corresponding to the received data signals Data_R, Data_G, and Data_ to the panel 3 voltage polarity control signal POL. It is used to determine the polarity of the pixel voltage corresponding to the received data signal. Please refer to Table 1 'The reason is that when n=3, the above-mentioned instructions for representing the low-swing differential command signal RSDS_CMD of the start control signal STH, the timing control signal TP1 and the voltage polarity control ▲ number POL < An example. In this embodiment, according to the control signal to be output, a 12-bit instruction is generated according to the table value, and then the low-swing differential command signal RSDS_CMD is output to all times in the form of digital transmission. , drivers 341~34n. Among them, the state of the different control signals (the state of the high level and low level) can be distinguished by different control codes. Or the starting zero column control code zero stop termination control representative 13 201005704 column 1111 0 00000 0 1 data drive 341 STH 1111 0 00001 0 1 data driver 342 STH 1111 0 00010 0 1 data driver 343 STH 1111 0 00011 0 1 Data driver 341 high level signal TP1 1111 0 00100 0 1 Data driven 342 south level signal TP1 1111 0 00101 0 1 Data driver 343 high level signal TP1 1111 0 00110 0 1 Data driver 341 Low level signal TP1 1111 0 00111 0 1 Data driver 342 low level signal TP1 1111 0 01000 0 1 Data driver 343 low level signal TP1 1111 0 01001 0 1 Data driver 341 high level signal POL 1111 0 01010 0 1 Data driver 342 high level signal POL 1111 0 01011 0 1 Data driver 343 high level signal POL 1111 0 01100 0 1 Data driver 341 low 201005704 level signal POL 1111 0 01101 0 1 data drive 342 Low level signal POL 1111 0 01110 0 1 Low level signal of data driver 343 POL 1111 0 01111 0 1 Reserved Table 1 Adjusting the differential mode data signals is also applied to both the low swing differential signal instruction pair. The adjustment method of the skew control is based on the three skew control pin (pin) input skew control values on the timing controller ❹ 33 to adjust the low swing differential data signal and the low swing differential command signal. Time and hold time. For the relationship between the skew control value and the corresponding setup time and hold time, refer to Table 2, where T represents the signal period of the low swing differential data signal and the low swing differential command signal, and the setup time and hold time are, for example. It is calculated by referring to the system clock signal of the timing controller 33. Skew control value settling time retention time 000 T/4 T/4 001 T/4-T/16 T/4 + T/16 010 T/4-2T/16 T/4 + 2T/16 011 T/4- 3T/16 T/4 + 3T/16 100 T/4 T/4 101 T/4+T/16 T/4-T/16 110 T/4 + 2T/16 T/4-2T/16 111 T/ 4 + 3T/16 T/4-3T/16 Table 2 15 〇 Since the low-swing differential command signal RSDS_CMD corresponding to the start control signal of all data drivers 341~34η is controlled by timing. The timing controller 33 generated by the device 33 can output the low swing amplitude differential command signal RSDS corresponding to the initial control signal of each data driver according to the data to be outputted at the correct time point. CMD. Therefore, the present embodiment solves the conventional method in which the data driver outputs a start control signal to control the next data driver, thereby causing the initial control signal transmission (4) to cause the data driver to read the wrong data signal, and thus / Looking for the display shows the problem of incorrect face. Further explanation is given to the timing controller 33. 4 is a block diagram of a timing controller in accordance with a preferred embodiment of the present invention. The timing controller 33 includes a signal receiver 331, a logic unit 332, and a first signal processing unit 333. The signal receiver 331 is configured to receive an external data signal in the form of a low voltage differential signal (LVDS) and convert it into a transistor logic signal. The logic unit 332 receives the signal receiver 331 and generates an internal data signal and a control signal STH, TP1 or POL according to the external signal. The first signal processing unit 333 converts the internal data signals into the differential data signals Data_R, Data_G, Data_B, and RSDS_CLK, and outputs the differential data signals Data_R, Data_G, Data_B, and RSDS_CLK to FIG. The data drivers 341 to 34n. The first signal processing unit 333 generates a low swing differential command signal RSDS_CMD ' according to the control signal STH, TP1 or POL and outputs the low swing differential command signal RSDS_CMD to the data driver 341 as shown in FIG. 34η. Please refer to FIG. 5, which shows that the data driver 341~34η is connected to the 201005704 receiving a low swing differential clock signal RSDS_CLK, a low swing differential command signal RSDS-CMD, and a low swing difference. Timing diagram of the control signal STH/POL/TP1 corresponding to the command signal rsDS_CMD. After the 12-bit low-swing differential command signal RSDS-CMD is serially outputted to the data drivers 341~34n in digital form, the data drivers 341~34n can be double-edge triggered to receive the low pendulum. The amplitude differential command signal RSDS_CMD' is decoded with reference to Table 1. In this way, after the clock cycle of the seventh low swing differential clock signal RSDS_CLK, the data driver can decode the control signal represented by the 12-bit instruction content value © STH/P0L/TP1 〇 The first signal processing unit 333 includes a data transmitter 334, an encoder 335, and an instruction transmitter 336. The data transmitter 334 receives the internal data signal ' and converts the internal data signal into a differential data signal and outputs it to the data drivers 341 to 34η as shown in FIG. 3. The differential data signal includes the red data signal Data_R and the green light data. Signal Data G, Blu-ray data signal Data - Β time pulse signal RSDS - CLK. The encoder 335 receives the control signal STH, TP 1 or POL and encodes it into a low swing differential command signal RSDS_CMD' command transmitter 336 transmits the low swing differential command signal RSDS_CMD to FIG. 3 The data drivers 341 to 34n shown are referred to in FIG. 6 for a flow chart showing another example of the data transmission method according to the preferred embodiment of the present invention. First, in step 6.1, a differential data signal and at least one differential command signal are received, and the differential data signal is converted into an internal data signal, and at least one control signal is generated according to the at least one differential command signal. Next, in step 6〇2, it is determined whether the at least one control signal is a control signal for controlling a driver, and the driver is a data driver. Then, in step 603, when one of the at least one control signal is a control signal for controlling the driver, a panel is driven according to the at least one control signal. The differential data signal and the at least one differential command signal are reduced Swing Differential Signals (RSDS). In the above step 603, there are substantially more than a few subtle steps 'including' first, temporarily storing the internal data signal and at least one control signal. Then, the internal data signal is converted into an analog signal according to at least one control signal. The analog signal is then output to the panel to drive the panel. ® Referring to Figure 7, a block diagram of a data driver in accordance with a preferred embodiment of the present invention is shown. The data driver 34X (X=1 to η) includes a second signal processing unit 360 and a driver main circuit unit 361. The second signal processing unit 360 receives the differential data signals Data_R, Data_G, and Data_B output by the timing controller 33. The pulse signal RSDS_CLK and the low swing differential command signal RSDS_CMD, the second signal processing unit 360 converts the differential data signals Data_R, Data_G and Data_B and the clock signal RSDS_CLK into internal data signals, and according to the low swing differential finger φ The signal RSDS-CMD generates the control signal STH, TP1 or POL, and the second signal processing unit 360 further determines whether the control signal STH, TP1 or POL is a control signal for controlling the data driver 34X, wherein the data driver 34X (X= 1~η) all receive the same control signals TP1, POL. The relative positional relationship (X=l~N) of the data driver must be stored in the control driver beforehand. In addition, another setting signal can be input from the outside world. Not shown in the figure) to the second signal processing unit 360, for example, when designing the data driver 1C, leaving the input pin to enable the data driver 1C The relative positional relationship 201005704 (X = l ~η) square drive the main circuit unit determines the potential of the input pin 361 of drive data for driving the panel 31. Wherein, when one of the control signals STH, TP1 or POL is a control signal for controlling the driver, the driver main circuit unit 361 operates according to the control signal. Further, the second signal processing unit 360 includes a data receiver 362, an instruction receiver 363, and a decoder 364. The data receiver 362 receives the differential data signal 'and converts the differential data signal into an internal data signal, the command receiver 363 receives the low swing differential command signal rsDS_CMD, and the decoder 364 is lightly connected to the command receiver 363'. The low swing differential command signal RSDS_CMD is decoded into the control signal sTH, TP1 or POL. The driver main circuit unit 361 includes a data buffer 365, a digital analog converter 366, and an output multiplexer 367. The data buffer 3 phantoms the internal data signal and the control number TP1 according to the control signal STH or the enable signal Enb. The pOL 'digital analog converter 366 converts the internal data signal into an analog signal according to the control signal TP1 or POL, the output multiplexer ^ lightly connects the analog analogy 11 and outputs the analog signal to the panel. The form timing controller of the swing differential signal transmits the signal to the data driver by using the lower device, and the conventional control signals the differential command signal from the timing control to the data drive signal to a low swing so that the system is at a high frequency. During operation, the decoding operation will be performed later, and the signal and timing control H will drive the control of the pure 11 to have a delayed image generation, so that the data signal can be synchronized without enabling the data driver to read the correct data. 19 201005704 The display can display the correct face, which increases the correctness of the overall system reading data. In addition, since the timing controller controls each data driver, the initial control signal STH, the timing control signal TP1, and the voltage polarity control signal POL can be individually controlled, so that no matter how many new control signals are added in the future, It can be coded into a low swing differential command signal RSDS-CMD, which can be transmitted from one of the existing transmission lines without a new transmission line. The wiring area on the printed circuit board can be reduced to two lines, so the cost will not increase. And the low swing differential signal is a very mature communication protocol that is easy to implement. In view of the above, the present invention has been disclosed in a preferred embodiment, and is not intended to limit the present invention. It will be apparent to those skilled in the art that various changes and modifications can be made without departing from the spirit and scope of the invention. Therefore, the scope of the invention is defined by the scope of the appended claims.
20 201005704 【圖式簡單說明】 第1圖繪示傳統顯示器之示意圖。 第2圖繪示依照本發明之較佳實施例之資料傳輪方 法之流程圖。 第3圖繪示依照本發明之較佳實施例之顯示器之示 意圖。 第4圖繪示依照本發明之較佳實施例之時序控制器 之方塊圖。 ❹ 第5圖緣示資料驅動器241〜24η所接收之一低擺幅差 動時脈訊號RSDS_CLK、低擺幅差動指令訊號 RSDS—CMD、及低擺幅差動指令訊號RSDS—CMD所對庶 之控制訊號STH/POL/TP1之時序圖。 ~ 第6圖繪示依照本發明之較佳實施例之資料傳輪方 法之另一例之流程圖。 第7圖繪示依照本發明之較佳實施例之資料驅動 之方塊圖。 【主要元件符號說明】 10、30 :顯示器 31 :面板 32 :驅動單元 33、33 :時序控制器 141〜14η、341〜34η :資料驅動器 331 :訊號接收器 21 201005704 i vy/^tr r\ 332 ： 邏輯單元 333 ： 第一訊號處理單元 334 ： 資料傳送器 335 ： 編碼器 336 ： 指令傳送器 360 ： 第二訊號處理單元 361 ： 驅動器主電路單元 362 ： 資料接收器 363 : 指令接收器 364 ： 解碼器 365 ： 資料緩衝器 366 ： 數位類比轉換器 367 ： 輸出多工器 2220 201005704 [Simple description of the diagram] Figure 1 shows a schematic diagram of a conventional display. Figure 2 is a flow chart showing the data transfer method in accordance with a preferred embodiment of the present invention. Figure 3 is a schematic illustration of a display in accordance with a preferred embodiment of the present invention. Figure 4 is a block diagram of a timing controller in accordance with a preferred embodiment of the present invention. ❹ Figure 5 shows that the data driver 241~24η receives a low swing differential clock signal RSDS_CLK, a low swing differential command signal RSDS_CMD, and a low swing differential command signal RSDS-CMD. The timing diagram of the control signal STH/POL/TP1. ~ Figure 6 is a flow chart showing another example of a data transfer method in accordance with a preferred embodiment of the present invention. Figure 7 is a block diagram showing data driving in accordance with a preferred embodiment of the present invention. [Description of main component symbols] 10, 30: Display 31: Panel 32: Driving units 33, 33: Timing controllers 141~14n, 341~34n: Data driver 331: Signal receiver 21 201005704 i vy/^tr r\ 332 : Logic unit 333 : First signal processing unit 334 : Data transmitter 335 : Encoder 336 : Command transmitter 360 : Second signal processing unit 361 : Driver main circuit unit 362 : Data receiver 363 : Command receiver 364 : Decoding 365 : Data buffer 366 : Digital analog converter 367 : Output multiplexer 22