200910553 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種電子元件’且特別是有關於一種 銲錫不破壞晶粒主體的電子元件裝置及其製程。 【先前技術】 參照第1圖，一種現有的發光二極體裝置1〇〇，包含 第一支架110、一第二支架120、一晶粒130以及一封裝 體 140。 該第一支架no’包含一錫焊區lu與一打線區112。 該弟二支架120’包含一錫焊區121、一打線區122 與一固晶區123。 該晶粒130 ’載設於該第二支架12〇的固晶區123， 並藉打線（即兩條導線150)方式分別連結於該第一支架j i〇 的打線區112與該第二支架12〇的打線區i22。 該封裝體140係以模壓成形方式，包覆該晶粒丨％以 及第一支架110的打線區112與該第二支架12〇的打線區 122於其中。 現有的發光二極體裝置100利用高科技製程技術，雖 可製造出一微小化的電子零件❶但是，當此發光二極體裝 置100欲組裝於一 SMT(表面黏著技術）的電路基板（圖未揭 示）上時，融溶狀態的銲錫1易滲入該封裝體丨4〇與該等 支架110、120之間結合的一細缝16〇中，導致晶粒或導線 被銲錫破壞，造成電子元件毀損。 200910553 【發明内容】 因此本發明的目的就是在提供-種電子元件裝置及 其製程^利用雷射加工方式在電 離部，當施以鲜錫銲固於電路基板時，熱錫料之延二僅: ;此隔離部’不會渗入電子元件内部，以防止電子= 根據本發明所提出之-種電子元件裝置，包含—第一 支架、一第二支架與一晶粒。 第一 該第一支架包含-錫痒區、—打線區，BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an electronic component and, more particularly, to an electronic component device in which solder does not damage a die body and a process therefor. [Prior Art] Referring to Fig. 1, a conventional light emitting diode device 1A includes a first holder 110, a second holder 120, a die 130, and a package body 140. The first bracket no' includes a solder joint area lu and a tapping area 112. The second bracket 120' includes a solder pad 121, a tapping region 122 and a die bonding region 123. The die 130 ′ is mounted on the die bonding region 123 of the second bracket 12 , and is respectively connected to the wire bonding region 112 and the second bracket 12 of the first bracket 借 by means of a wire (ie, two wires 150 ). 〇's line area i22. The package body 140 is formed by molding, and covers the die 丨% and the wire bonding region 112 of the first bracket 110 and the wire bonding region 122 of the second bracket 12 。. The existing light-emitting diode device 100 utilizes high-tech process technology to manufacture a miniaturized electronic component. However, when the light-emitting diode device 100 is to be assembled on an SMT (surface adhesion technology) circuit substrate (Fig. When not disclosed, the molten solder 1 easily penetrates into a slit 16 of the package 丨4〇 and the brackets 110 and 120, causing the die or the wire to be broken by the solder, resulting in electronic components. damage. Therefore, the object of the present invention is to provide an electronic component device and a process thereof using a laser processing method in an ionization portion. When applying a tin solder to a circuit substrate, the hot solder material is extended only The spacer ' does not penetrate into the interior of the electronic component to prevent electrons = an electronic component device according to the present invention, comprising - a first bracket, a second bracket and a die. First, the first bracket comprises a tin-itch zone, a wire-punching zone,
離部。 乐丨W 該第二支架，包含一錫焊區、一 以及-第二隔離部。 ㈣、-固晶區’ 該晶粒載設於該第二支架的固晶區 於該第-支架與該第二支㈣打職。 ^生& 根據本發明所提出一種電子元件裝置 下步驟： 匕3以 步驟（A):準備—第一支架與一第二支架。 步驟(B):將一晶粒植設於在該第二支架的一固曰 ，’將該晶粒分別電性連結於該第—支架與該第二支架: 一打線區。 V Λ 步驟（C)··制_成型m封裝 晶粒與該等打線區。 匕復㈣ 步驟⑼··在該第一支架與該第二支架之分別鄰靠於 200910553 該封裝體一側形成有—隔離部。 本發明藉由雷射加工方式在支架鄰靠於封裝體處形 成隔離部，隔離部可為一個凹溝型態，以構成兩道防銲結 構。當電子元件裝置進行錫銲作業時’熱錫料僅止於此隔 離凹槽，以防止銲錫滲入晶粒與打線區，以提高電子元件 於組裝上之良率。 【實施方式】 參照第2圖，本發明之電子元件裝置包含一第一支架 200、一第二支架3〇〇、—晶粒4〇〇以及一隔絕膠層則。Departure. The second bracket includes a soldering zone, a and a second spacer. (4) - - solid crystal region ' The crystal grain is placed on the solid crystal region of the second support and the second support (four) is engaged. ^Life & An electronic component device according to the present invention. The following steps: 匕3 to Step (A): Prepare - a first support and a second support. Step (B): implanting a die in a solid state of the second bracket, and electrically connecting the die to the first bracket and the second bracket: a hitting area. V Λ Step (C) · _ Form m package die and these wire bonding areas. Step (9): The first bracket and the second bracket are respectively adjacent to the 200910553, and a side of the package body is formed with a partition. The invention forms a partition at the bracket adjacent to the package by laser processing, and the partition portion can be a groove type to form two solder resist structures. When the electronic component device performs the soldering operation, the hot solder only stops at the isolation groove to prevent the solder from infiltrating into the die and the wire bonding region, so as to improve the assembly yield of the electronic component. [Embodiment] Referring to Fig. 2, the electronic component device of the present invention comprises a first holder 200, a second holder 3, a die 4, and an insulating layer.
參照第2圖、第3圖與第4圖，該第一支架扇，其 主體是由一第一抗氧化層21〇、-第二抗氧化層22〇與一 可氧化層23G所組成。該第—支架·包含—錫焊區跡 一打線區250以及-隔離部。該隔離部26()係以雷射 加工方式_該可氧化層謂，此隔離部形成—可使 該可氧化層230顯露於外部的凹溝，而此凹溝的—槽底即 為該可氧化層230。 參照第4圖，在本實施例中，該第一抗氧化層21〇為 -錄=，該第二抗氧化層22〇為一鍍錄層，該可氧化層 0為'鍛銅層。 參照第2圖與第3冑’該第二支架3〇〇，其主體是由 一第一抗氧化層310、—第二抗氧化層320與—可氧化層 33〇所組成。該第二支架3〇〇包含—錫焊區34〇、一打線 區350、一固晶區36〇以及一隔離部37〇。該隔離部谓 200910553 二、二雷射加卫方式刻敍該可氧化層规，此隔離部370形 一'可使4可氧化層33()顯露於外部的凹溝，而此凹溝的 一槽底即為該可氧化層330。 一 >第4圖，在本實施例中，該第二抗氧化層gw為 鑛金層’該第二抗氧化層33〇為一鍛騎，該可氧化声 330為一鍍鋼層。 s 〇參照第2圖與第3圖。該晶粒400，载設於該第二支 架300的固晶區36〇,並藉打線方式（即為兩條導線刪） 分別連結於該第-支架細的打線區25()與該第二支架 300的打線區350。 該封裝體500，係利用模壓成型方式，包覆於 400以及與該第一支架200的打線區25〇與該第二支架3〇〇 的打線區350於其中。 參照第3圖與第5圖，經由上述說明，當本發明之電 子元件裝置欲组裝於一 SMT(表面黏著技術）的電路基板 (圖未揭示）上時’因該第一支架2〇〇與該第二支架3〇〇之 鄰罪於該封裝體500處’已形成一個隔離部260、370(即 凹溝），而此隔離部260、370的槽底係為鐘銅層（可氧化 層）。所以’裸露在外的鏟銅層’因與空氣接觸而氧化，而 使該第一、二支架200、300的隔離部260、370形成一有 效的隔離區。因此’支架在吃錫過程，熱熔狀態的錫料不 會溢過此隔離部260、370故可防止銲錫7〇〇渗入封裝體 500與打線區250、350 ’因而可確保電子零件不被毀損。 參照第6圖，本發明之一種電子元件裝置的製程， 8 ° 200910553 含以下步驟： 步驟一：如流程90卜準備一第一支架與一第二支架。 步驟二：如流程902，將一晶粒植設於在該第二支架 的。固晶區，將晶粒分別電性連結於該第一支架盥該第二 =的-打線區。在本實施财，是財線方式讓晶粒= 該弟—支架及該第二支架連結。 步驟三：如流程903，利用模壓成型方式，將一封裝 體包覆該晶粒與該等打線區。 、步驟四：如流程904’利在該第一支架與該第二支架 之刀別鄰靠於該封裝體一側形成有一隔離部。 中’是利用雷射加工方式形成此隔離部。 ，歸納上述，依照本發明的一實施例，藉由雷射加工方 式在該等支架200、300鄰靠於該封裝體5〇〇處形成一個 凹溝型態的隔離部260、27〇，以構成兩道防銲結構。當電 =元件裝置進行錫作業時，即可避免熱溶狀態的輝錫:入 晶粒與打線區，故可確保電子元件於組裝上之良率。 雖然本發明已以-實施例揭露如上，然其並非用以限 =本發明’任何熟習此技藝者’在不脫離本發明之精神和 範圍内w可作各種之更動與潤飾，因此本發明之保護範 圍當視後附之申請專利範圍所界定者為準。 【圖式簡單說明】 ▲為讓本發明之上述和其他目的、特徵、優點與實施例 能更明顯易懂，所附圖式之詳細說明如下： 200910553 第1圖係為現有發光二極體裝置的組合剖視圖。 第2圖係為本發明一實施例之電子元件裝置的立體透 視圖。 第3圖係為該實施例之組合剖視圖。 第4圖係為該第-支架或該第二支架的詳細剖視圖。 第5圖係為第3圖中加設錫料的局部剖視放大圖。 第6圖係為本發明一實施例之電子元件裝置的製程之 步驟流程圖。 【主要元件符號說明】 100 ： 發光二極體裝置 111 ： 锡鲜區 120 ： 第二支架 122 ： 打線區 130 ： 晶粒 150 : 導線 170 ： 銲錫 210 ： 第一抗氧化層 230 ： 可氧化層 250 ： 打線區 300 ： 第二支架 320 ： 第二抗氧化層 340 ： 锡鲜區 110 :第一支架 112 :打線區 121 .錫銲區 123 :固晶區 140 :封裝體 160 :細縫 200 :第一支架 220 :第二抗氧化層 240 ·錫鲜區 260 :隔離部 31〇:第一抗氧化層 330 :可氧化層 350 :打線區 200910553 360 ： 固晶區 370 ： 400 ： 晶粒 500 ： 600 : 導線 700 : 901 ： 流程 902 ： 903 ： 流程 904 ： 隔離部 封裝體 銲錫 流程 流程Referring to Figures 2, 3 and 4, the first stent fan is composed of a first anti-oxidation layer 21, a second anti-oxidation layer 22 and an oxidizable layer 23G. The first bracket includes a soldering zone trace area 250 and a partition. The partition portion 26() is in a laser processing manner, the oxidizable layer is formed, and the partition portion is formed to expose the oxidizable layer 230 to the outer groove, and the groove bottom of the groove is the Oxide layer 230. Referring to Fig. 4, in the present embodiment, the first anti-oxidation layer 21 is -recorded, the second anti-oxidation layer 22 is a plated layer, and the oxidizable layer 0 is a 'wrought copper layer. Referring to Figures 2 and 3, the second holder 3 is composed of a first oxidation resistant layer 310, a second oxidation resistant layer 320 and an oxidizable layer 33〇. The second bracket 3 includes a solder pad 34, a tapping region 350, a die bonding region 36A, and a spacer portion 37A. The isolation portion is referred to as 200910553. The second and second laser illuminating means describe the oxidizable layer gauge, and the partition portion 370 forms a recess which can expose the 4 oxidizable layer 33() to the outer groove, and the groove The oxidizable layer 330 is the bottom of the groove. In the fourth embodiment, in the present embodiment, the second oxidation resistant layer gw is a gold ore layer. The second oxidation resistant layer 33 is a forged rider, and the oxidizable sound 330 is a plated steel layer. s 〇 Refer to Figures 2 and 3. The die 400 is mounted on the die bonding region 36〇 of the second bracket 300, and is connected to the first bracket thin wire bonding region 25() and the second by wire bonding method (that is, two wires are deleted). The wire bonding area 350 of the bracket 300. The package body 500 is covered by the molding and sealing means 400 and the wire bonding zone 25 of the first bracket 200 and the wire bonding zone 350 of the second bracket 3''. Referring to FIGS. 3 and 5, through the above description, when the electronic component device of the present invention is to be assembled on a circuit substrate (not disclosed) of an SMT (Surface Adhesion Technology), A spacer 260, 370 (ie, a groove) is formed in the package body 500 by the second bracket 3, and the bottom of the spacer 260, 370 is a copper layer (oxidizable) Floor). Therefore, the 'exposed bare shovel copper layer' is oxidized by contact with air, and the partition portions 260, 370 of the first and second brackets 200, 300 form an effective isolation region. Therefore, the solder in the hot-melt state does not overflow the spacers 260, 370 during the soldering process, thereby preventing the solder 7 from penetrating into the package 500 and the wiring regions 250, 350', thereby ensuring that the electronic components are not damaged. . Referring to Figure 6, the process of an electronic component device of the present invention, 8 ° 200910553, comprises the following steps: Step 1: As shown in the process 90, a first support and a second support are prepared. Step 2: As in process 902, a die is implanted in the second bracket. In the solid crystal region, the crystal grains are electrically connected to the first bracket and the second wire-bonding region, respectively. In this implementation, it is the financial line mode that allows the die = the bracket - the second bracket to be connected. Step 3: As in Process 903, a package is coated with the die and the wire bonding regions by a press molding method. Step 4: If the first bracket and the second bracket are adjacent to the side of the package, a spacer is formed. Medium' is the use of laser processing to form this isolation. According to an embodiment of the present invention, in the laser processing manner, the brackets 200, 300 are adjacent to the package 5 形成 to form a groove-shaped partition 260, 27 〇, Form two welding structure. When the electrical component device performs the tin operation, it can avoid the hot-melting tin oxide: entering the die and the wire bonding area, thus ensuring the yield of the electronic component in assembly. The present invention has been disclosed in the above-described embodiments, but it is not intended to limit the invention to the invention, and the invention may be modified and modified without departing from the spirit and scope of the invention. The scope of protection is subject to the definition of the scope of the patent application attached. BRIEF DESCRIPTION OF THE DRAWINGS The above and other objects, features, advantages and embodiments of the present invention will become more apparent and understood. A sectional view of the combination. Fig. 2 is a perspective perspective view of an electronic component device according to an embodiment of the present invention. Figure 3 is a combined cross-sectional view of the embodiment. Figure 4 is a detailed cross-sectional view of the first stent or the second stent. Figure 5 is a partial cross-sectional enlarged view of the tin material added in Figure 3. Fig. 6 is a flow chart showing the steps of the process of the electronic component device according to an embodiment of the present invention. [Main component symbol description] 100 : Light-emitting diode device 111 : Tin-damp region 120 : Second bracket 122 : Wire-bonding region 130 : Die 150 : Wire 170 : Solder 210 : First oxidation resistant layer 230 : Oxidizable layer 250 : Wire-bonding zone 300: second bracket 320: second anti-oxidation layer 340: tin-sand zone 110: first bracket 112: wire-bonding zone 121. soldering zone 123: die-bonding zone 140: package body 160: slit 200: a holder 220: a second oxidation resistant layer 240, a tin fresh region 260: a spacer portion 31: a first oxidation resistant layer 330: an oxidizable layer 350: a wire bonding region 200910553 360: a die bonding region 370: 400: a grain 500: 600 : Wire 700 : 901 : Process 902 : 903 : Process 904 : Isolation Process Package Solder Process Flow
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