TW200905915A - LED element and method of making the same - Google Patents

LED element and method of making the same Download PDF

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Publication number
TW200905915A
TW200905915A TW96127390A TW96127390A TW200905915A TW 200905915 A TW200905915 A TW 200905915A TW 96127390 A TW96127390 A TW 96127390A TW 96127390 A TW96127390 A TW 96127390A TW 200905915 A TW200905915 A TW 200905915A
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Taiwan
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light
emitting diode
layer
type
substrate
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TW96127390A
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Chinese (zh)
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TWI355757B (en
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Hong-Cheng Lin
Jia-Ming Li
zhen-ying Qi
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Tekcore Co Ltd
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Publication of TWI355757B publication Critical patent/TWI355757B/zh

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Abstract

This invention is to provide an LED element and method of making the same by which the light extraction efficiency of the LED can be increased. In this invention, a substrate is etched to form grooves with natural lattice inclines, and an LED epitaxy layer is selectively formed in the grooves to provide an LED element with multi-edge inclines. Therefore, the total reflection in the LED element can be prevented by the multi-edge inclines, largely increasing the light extraction efficiency of the LED.

Description

200905915 九、發明說明: _ 【發明所屬之技術領域】 本發明係有關於發光二極體元件及其製造方法,尤指 關於一種高光取出率的發光二極體元件及其製造方法。曰 【先前技術】 傳統發光二極體的製作為標準的矩型外觀,因為一 般半導體材料與封裝材料的折射率相差甚多,使得^反 射角小,所以發光二極體所產生的光到達與空氣的界面 (時,大於臨界角的光將產生全反射回到發光二極體晶粒 内部。此外,矩形的四個截面互相平行,光子在交界面 離開半導體的機率變小,讓光子只能在内部全反射直到 被吸收殆盡,使光轉成熱的形式,造成發光效果不佳。 因此,改變發光二極體形狀是一個有效提升發光效 率的方法,例如美國專利US6229160,Ηρ與Lumileds 公司所揭露的倒金字塔型(Truncated Inverted Pyramid, TIP)的發光二極體晶粒結構,將磷化鋁鎵銦/磷化鎵 -(A1GaInp/Gap)發光二極體晶粒側面機械加工,藉此使 四個截面不再是互相平行,藉此發光二極體元件的光就 可以很有效地被引出來,外部量子效率則大幅提升至 55%,發光效率高達1001m/w,是第一個達到此目標的 發光二極體。然而,此專利中所提出TIp型晶粒結構, 只能適用於使用磷化鋁鎵銦/磷化鎵(Amalnp/Gap)的紅 色光二極體上,並不適用於一般的氮化鎵發光二極體, 因為氮化鎵一般產業是磊晶於藍寳石(Sapphire)基板 上,由於藍寳石非常堅硬,要對其進行機械加工相當困 難’所以該專利技術的商業化生產依然無法突破。 5 200905915 所以,依據前述機械加工技術,美國專利US6768136 揭露一種以碳化矽(SiC)或氮化鎵(GaN)為基板, 利用其加工比藍寶石容易的特性,改變發光二極體的晶 體形狀以提升發光效率,其中氮化銦鎵(InGaN)及氮化 鎵(GaN)這兩者的發光效率可提升為傳統結構的二倍, 但是碳化矽(SiC)、氮化鎵(GaN)等基板的價格相當 昂貴,使的發光二極體晶粒製造成本較高,因此目前該 技術難以使用於商用產品。 另外,台灣專利公告第565957號,揭露一種利用 氫化物氣相遙晶成長(Hydride Vapor Phase Epitaxy, HVPE)技術,於基板上形成具有自然斜面之厚膜氮化鎵 蟲晶層材料’再使用有機金屬化學氣相蟲晶(Metal organic chemical vapor deposition, MOCVD)技術,將發 光二極體成長於其上方,此元件具有較佳之發光效率。 然而此技術雖然改進機械加工與基板成本的問題,但是 需要二次磊晶成長的製程,使得製造過程較為繁瑣。 【發明内容】 於是為解決上述之缺失,本發明係提供一種發光二 極體元件及其製造方法,係利用蝕刻基板的技術,於基 板上形成具有自然晶格斜面·圖案之凹槽,再將發光二極 體磊晶層選擇性成長於其中,直接形成一種多邊斜面之 發光二極體,無須機械加工或二次磊晶成長的製造。 本發明的發光二極體製造方法,其步驟包括有:(a) 提供一基板,於該基板表面形成一鈍化層,並定義出複 數個多邊形的蝕刻區域;其中該基板係為藍寶石 (Sapphire)、石炭化石夕(SiC)、石夕(Si)、石申化嫁(GaAs)和氮化 6 200905915 反其中之一;該鈍化層的寬度為5微米至50 ^ ’雜刻區域的内徑為2〇〇微米至2〇〇〇微米,該 的四,、圓形、三角形、星形及多邊形所組 φ之一。(b)對該基板進行蝕刻,於前述蝕刻 :域:刻出複數具有自然晶格斜面與; =的深度為0.5微未至5。微米。製作上也可;;: ^刻時間’直職鈍化輕除去。或進 r 行圖案化姓刻,钱刻出-凹凸表面,用以增: 二取=⑷於前述凹槽的底面形成一發光二極體結 化人:i極體結構係依序磊晶結合-n型冚-v族 物i,i中與一 P型瓜々族化合 务人仏a “ a作為备光區形成於該η型IE _ V族 m 口ρ型瓜^族化合物層之間’且該ρ型 都m二A 層與一p型歐姆接觸電極電性連接,該η 用以提:化合物層與一 η型歐姆接觸電極電性連接, 割崩偏麗;及⑷最後將該基板研磨,並切 -I朋·^形成發先二極體晶粒。 了由上述方法所形成的發光二極體元 且該基板表面進⑽刻形成—具有自 :與底面的凹槽;及一發光二極體結構, m 面,邊發光一極體結構係依序結合—n型 層-V^化合物層、一活性層與—p _々族化合物 :物二舌性層作為發光區形成於該n型瓜4族化 物層與該P型ΠΙ_ν族化合物層 Π气物層與一 Ρ型歐姆接觸電極電性連接Ρ該:·: 無化合物層與一 η型歐姆接觸電極電性連接,用 200905915 以提供一順向偏壓。 其中該活性層係為雙異質接面構 結構(SQW)及多量子井結構(MQW)其中之一。 卞开 另外’該發光二極體結構也可藉由該p型歐姆接觸 電極與:㈣姆钱電極電性連接於—散熱反射基板 上,該散熱反射基板係包含—反射金屬層與—導敎基 板,該反射金屬層-表面與該發光二極體結構電性連 接’其另-表面與該導熱基板連接。其中該反射金屬層 係選自金(Au)、鋁(A1)及銅(Cu)等其中一種及其組合; 該導熱基板係選自金(Au)、鋁(A1)、銅(Cu)、邦^碟 化鎵(GaP)及碳化矽(Sic)等其中一種及其組合。200905915 IX. Description of the Invention: _ Technical Field of the Invention The present invention relates to a light-emitting diode element and a method of manufacturing the same, and more particularly to a light-emitting diode element having a high light extraction rate and a method of manufacturing the same.曰[Prior Art] The fabrication of conventional light-emitting diodes is a standard rectangular appearance. Because the refractive indices of semiconductor materials and packaging materials are quite different, the reflection angle is small, so the light generated by the LEDs reaches and At the interface of the air (when the light is larger than the critical angle, the total reflection will return to the inside of the illuminating diode. In addition, the four sections of the rectangle are parallel to each other, and the probability of photons leaving the semiconductor at the interface becomes smaller, so that the photons can only It is totally reflected inside until it is absorbed, turning the light into a hot form, resulting in poor luminescence. Therefore, changing the shape of the LED is an effective way to improve the luminous efficiency, such as US Patent No. 6,229,160, Ηρ and Lumileds The exposed light-emitting diode structure of the Truncated Inverted Pyramid (TIP) is machined by the side surface of the gallium phosphide-indium gallium phosphide-(A1GaInp/Gap) light-emitting diode. The four sections are no longer parallel to each other, whereby the light of the light-emitting diode element can be effectively extracted, and the external quantum efficiency is greatly increased to 55%. The luminous efficiency is as high as 1001m/w, which is the first light-emitting diode to achieve this goal. However, the TIp-type grain structure proposed in this patent can only be applied to the use of aluminum gallium indium phosphide/gallium phosphide (Amalnp/ Gap) is not suitable for general gallium nitride light-emitting diodes because the general industry of GaN is epitaxial on sapphire substrates. Since sapphire is very hard, it must be It is quite difficult to carry out machining. Therefore, the commercial production of this patented technology is still unable to break through. 5 200905915 Therefore, according to the aforementioned mechanical processing technology, US Pat. No. 6,768,136 discloses a substrate using lanthanum carbide (SiC) or gallium nitride (GaN). It is easier to process than sapphire, changing the crystal shape of the light-emitting diode to improve the luminous efficiency, and the luminous efficiency of both indium gallium nitride (InGaN) and gallium nitride (GaN) can be doubled that of the conventional structure. However, substrates such as tantalum carbide (SiC) and gallium nitride (GaN) are relatively expensive, and the manufacturing cost of the light-emitting diode crystal grains is high. Therefore, the technology is currently difficult to use in commercial production. In addition, Taiwan Patent Publication No. 565957 discloses a method of forming a thick-film gallium nitride worm layer material having a natural bevel on a substrate by using a Hydride Vapor Phase Epitaxy (HVPE) technique. The use of an organometallic chemical vapor deposition (MOCVD) technique to grow a light-emitting diode above it has a better luminous efficiency. However, although this technique improves the problem of machining and substrate cost, However, a process requiring secondary epitaxial growth makes the manufacturing process cumbersome. SUMMARY OF THE INVENTION Therefore, in order to solve the above-mentioned defects, the present invention provides a light-emitting diode element and a manufacturing method thereof, which are formed by forming a groove having a natural lattice bevel pattern on a substrate by a technique of etching a substrate. The epitaxial layer of the light-emitting diode selectively grows therein to directly form a light-emitting diode of a polygonal slope, which does not require mechanical processing or secondary epitaxial growth. The method for manufacturing a light-emitting diode of the present invention comprises the steps of: (a) providing a substrate, forming a passivation layer on the surface of the substrate, and defining an etching region of a plurality of polygons; wherein the substrate is sapphire (Sapphire) , Carboniferous Fossil (SiC), Shi Xi (Si), Shi Shenhua (GaAs) and Nitriding 6 200905915 one of them; the passivation layer has a width of 5 μm to 50 ^ ' 2 〇〇 to 2 μm, one of the φ of the four, the circle, the triangle, the star, and the polygon. (b) etching the substrate in the etching: field: the complex has a natural lattice slope and the depth of = is 0.5 micro to 5. Micron. Can also be produced;;: ^ Engraved time 'direct duty passivation light removal. Or enter the r line to pattern the surname, and the money is engraved - the surface of the bump is used to increase: two take = (4) form a light-emitting diode on the bottom surface of the groove to form a person: i-pole structure is sequentially epitaxially bonded -n type 冚-v group i, i and a P type 々 化 化 “ “ a " a as a light-preserving area formed between the n-type IE _ V group m-port ρ-type compound And the p-type m-A layer is electrically connected to a p-type ohmic contact electrode, wherein the η is used to: the compound layer is electrically connected to an n-type ohmic contact electrode, and is cautious; and (4) The substrate is ground, and the first-order diode crystal grains are formed by cutting the first-order diode. The light-emitting diode body formed by the above method is formed on the surface of the substrate (10) and has a groove from the bottom surface; A light-emitting diode structure, m-plane, edge-emitting one-pole structure is sequentially bonded—n-type layer-V^ compound layer, an active layer and —p _ steroid: the two-tongue layer is formed as a light-emitting region The n-type melon 4 group layer and the P-type ΠΙ ν compound layer germanium layer are electrically connected to a Ρ-type ohmic contact electrode::: no compound layer and The n-type ohmic contact electrode is electrically connected, and is used to provide a forward bias voltage with 200905915. The active layer is one of a double heterojunction structure (SQW) and a multiple quantum well structure (MQW). The light-emitting diode structure can also be electrically connected to the heat-dissipating reflective substrate by the p-type ohmic contact electrode and the (four) money electrode, and the heat-dissipating reflective substrate comprises a reflective metal layer and a guiding substrate, and the reflection The metal layer-surface is electrically connected to the light-emitting diode structure, and the other surface thereof is connected to the heat-conductive substrate, wherein the reflective metal layer is selected from the group consisting of gold (Au), aluminum (A1), and copper (Cu). And a combination thereof; the thermally conductive substrate is selected from the group consisting of gold (Au), aluminum (A1), copper (Cu), gallium (GaP), and tantalum carbide (Sic).

本發明之發光二極冑元件及其製造方法另可 移除該基板,其方法步驟包括有:⑷提供—基板,於 該基板表面形成-鈍化層,並定義出複數個多邊形的钱 刻區域。(b)對該基板進行㈣,於前述㈣區域兹刻 出複數具有自然晶格斜面與底面的凹槽,並對凹槽的底 面進行圖案化㈣’姓刻出―凹凸表面。⑷於前述凹 槽的底面形成-發光二極體結構,該發光二極體結構係 依序磊晶結合一 n型冚-v族化合物層、一活性層與一 型Π·ν族化合物層’其中該活性層作為發光區形成於 5亥η型冚-v族化合物層與該ρ型冚族化合物層之 間(d)蒸錢一 Ρ型歐姆接觸金屬層於該ρ型羾_ν族化 合物層上,並將該Ρ型歐姆接觸金屬層接合於一導熱基 板其中6亥導熱基板係選自金(Au)、銘(A〗)、銅(Cu)、 矽(Si)、磷化鎵(GaP)及碳化矽(Sic)等其中一種及其組 合。0)移除該基板,移除該基板的方法可以是濕式蝕 8 200905915 ,二乾式蝕刻、雷射剝離法(Laser 〗ift 〇ff)及利用熱膨脹 系數之差異於升降溫中自然分離法其中—種。⑺蒸鑛一 N型歐姆接觸金屬於該η型]Π-V族化合物層上。(g)最 後就可切割崩裂形成發光二極體晶粒。 一經由上述移除該基板的方法所形成的發光二極體 =件,其包括一具有斜面之發光二極體結構,其斜面係 =由前述方法的基板表面進行㈣形成具有自然晶格 斜面與底面的凹槽’於該凹槽的底面上依序蟲晶結合一 η型nr-v族化合物層、—活性層(aetive ia^)*一 p型 二-V族化合物層所形成’其中該活性層作為發光區形 成於該族化合物層與該口型瓜^族化合物層 之間,了 P型歐姆接觸金屬層位於該p型瓜_v族化合 物層上,|熱基板接合於胃P㉟歐姆接觸金屬層表 面;及一 N型歐姆接觸金屬位於該於該n型冚_v族化 合物層上。 其中該η型Π-V族化合物層的表面為一凹凸表面。 ,本發明的優點在於利用蝕刻基板的技術於基板上 形成具有自然晶格斜面圖案之凹槽,再將發光二極體磊 :層選擇性成長於凹槽中,直接形成一種多邊斜面的發 先二極體,藉由多邊斜面可減少發光二極體元件内部全 2的機率’提高發光二極體之絲出率。財發明因 為製成簡單,可降低生產成本,適合 【實施方式】 座 茲有關本發明之詳細内容及技術說明,現以 =進-步說明’但應瞭解的是,該等實施例僅為例示 】 說月之用,而不應被解釋為本發明實施之限制。 200905915 梦曰明㈣㈣基板的技術,於基板上形成具有自 =斜:圖案之凹槽,再將發光二極體蟲晶層選擇性 直接形成多邊斜面之發光二極體,藉此 1作出先取出率尚的發光二極體元件。 言:參閱「第Μ圖至第“圖」’為本發明的 意圖。本發明的製造步驟包括有:⑷提供_ Ϊ?中: 板1〇0表面形成-鈍化層…,並 義出複數個多邊形的_區域叫如「第Μ圖」所 二)°〜中該基板100為藍寶石(Sapphire)、碳化石夕 • ^夕(Sl)、砷化鎵(GaAs)和氮化鋁(A1N)基板其中 該純化層11G的寬度為5微米至5()微米, 徑為200微米至2000微米,該㈣區 域111為四邊形、圓形、二角 族群其中之一。 —角开/星形及多邊形所組的 刻出基^反古100進行姓刻’於前述钱刻區域111钱 叫如「第^圖」所示);其中該凹槽12的= =微米至5G微米。近年來,濕式㈣(wetet=j =貝石基板技術已經被廣為發展研究,所以㈣藍寶石 ίΓ:再是、項困難工作,本發明可利用蝕刻如藍 土板4基板成具有自然晶格斜面圖案的凹槽120。 f如可使用濕式钱刻溶液,硫酸:鱗酸=5:2,加熱至溫 :約27〇〇C’即可兹刻藍寶石基板’當該純化層no之 :向平行藍寶石基板之平邊時,可以蝕刻出對稱的複合 ^面’此複合接面與底s 121的角度約43〇;當該純化 曰110的方向垂直藍寶石基板之平邊時,可以蝕刻出一 200905915 自然晶格斜面,此晶格斜面與底面121的角度約32〇, 以及晶格斜面的複合面,複合面與底面121的角度約 60〇 ° (0於前述凹槽120的底面121形成一發光二極體 了構130,δ亥發光二極體結構13〇可使用有機金屬化學 氣相磊晶法(Metal organic chemical vap〇r dep〇shi〇n mocvd)選則性成長依序蟲晶結合—n龍_v族化合 物層131、一活性層(active 〗ayer)132與一 p型冚々族 化合物層132(如「第」_3圖」所示)。其中該活性層132 作為發光區形成於該n型瓜_v族化合物層]3ι與 型f-V族化合物層132之間。該發光二極體結構: 只會選擇性成長於凹槽120的底面⑵,並不會成專長於0 ,刻所形成自然晶格面,也不會成長於凹槽12〇週邊凸 二::110上方。再以乾式蝕刻定義歐姆接觸區域, 用以形成一 p型歐姆接觸電極134與該 合物層⑴電性連接,及1型歐姆接觸電極13= ϋ η里m-v族化合物層131電性連接 ϋ 壓(如「第1·4圖」所示)。 從仏順向偏 發弁後Γ該基板1GG研磨,並切割崩裂形成所要的 發先發先一極體凡件晶粒(如「第丨_5圖」所示)。 經由上述方法所形成的發光二極體元 圖」所示),其包括有該基板100,且該基板〇〇/面谁5 侧形成具自然晶格斜面與底面121的板00= ,二極體結構130,其遙晶形成於槽1二 底面⑵,該發光二極體結構13 ^120的 Π-ν族化合物層131、該活 二该η型 # 興该ρ型m-v族 200905915 n Jin [r/入八令該活性们32作為發光區形成於該 間m Λ 層131與該p^-v族化合物層之 單量子共社f活性層U2係為雙異質接面構造(DH)、 -。(SQW)及多量子井結構_w)其中之 電椏nH Γ 51妒無化合物層】33與該p型歐姆接觸 電極134電性連接,該η型ΙΠ-V族化合物層131盥該n 型歐姆接觸電極135電性 太鉻mai , 电『玍連接,用以提供一順向偏壓。 門直到可增加對該絲_騎姓刻的時 化層110。請參閱「第…至第Μ圖」 的方法〜程不意圖。如同 長對該基板100進扞铋心“ 在步驟5延 移除,作二二f 丁钱刻的時間’直到該鈍化層110被 曰格钭而盥:〃蝕刻區域111蝕刻出複數個具有自然 曰曰格斜面與底面121的凹槽12〇(如「第2 後續的製程步驟e(如「第2_ θ」= 驟d(如「第2-5圖」所干hf::弟2-4圖」所不)與步 切割崩裂形成所要的發:M:體'面:, 圖」所示)與前述「第晶粒(如「第2_5 ^ nni* )1〇 ^ 圖」的不同,在於該基板100 的凹槽,緣將不會有該鈍化層11〇的存在。 120的VI作法上進一步可以包括-步驟b·1對凹槽 122的用“ 121進行圖案化蝕刻,蝕刻出一凹凸表面 122,用以增加光取出率。 :表面 圖」其製造方法流程示咅圖。如1圖至第3·4 b增加-蝕刻製程對凹;;2〇 =則述作法,但在步驟 刻,钱刻出一凹凸表面^ f底* 121進行圖案化钱 3-2圖與第3_3圖 =續的製程步驟c(如「第 丁)>*·、步驟 d (如「望 14岡 ^ci — \ 就如前面所述相同。但最後切割崩(裂形=」::) 12 200905915 . 極體元件晶粒如「第3-4圖」所示。與前述「第丨_5圖」 • 所示不同之處在於該對凹槽120的底面121已變成為該 凹凸表面122,該凹凸表面122可以用來增加發光二= 體元件的光取出率。 ° 請參閱「第4圖」,該發光二極體結構130也可藉 由該P型歐姆接觸電極134與11型歐姆接觸電極134^ 過導電柱210與220電性連接於一散熱反射基板3〇〇 上。3亥放熱反射基板3〇〇係包含一反射金屬層與一 Γ 導熱基板320,該反射金屬層310—表面透過導電柱21〇 與220與該發光二極體結構13〇電性連接,而另一表面 與該導熱基板320連接,形成一種覆晶封裝(FHp(:hip) 發光二極體元件。其中該反射金屬層310係選自金 (Au)銘(A1)及銅(Cu)等其中一種及其組合;該導熱基 板320係選自金(Au)、鋁(A1)、銅(Cu)、矽⑻)、磷化鎵 (GaP)及碳化矽(Sic)等其申一種及其組合。 々本發明作法上另可移除基板,請參閱「第5-1 圖至第5-5圖」為本發明除去基板的製造方法流程示意 β 圖。其方法步驟包括有: (a)提供一基板400,於該基板4〇〇表面形成一鈍化 層410並疋義出複數個為四邊形、圓形、三角形、星 形及夕邊形所組的族群其中之一的蝕刻區域。其中該基 才,400為藍寶石(Sapphire)、碳化矽(sic)、矽(^)、砷化 鎵(^aAS)和氮化鋁(A1N)基板其中之一;該鈍化層410 的見度為5微米至50微米,該蝕刻區域的内徑為2〇〇 微米至2000微米’該蝕刻區域為四邊形、圓形、三角 形、星形及多邊形所組的族群其中之一。⑻對該基板 13 200905915 匕於前述㈣m域㈣出具有自然晶格斜 凹槽420’並對凹槽42。的底面 : =韻刻出一凹凸表面421(如「第5-1圖」。 ί = 广0的深度為。·5微米至50微米。⑷於前 二極二二形成一發光二極體結構430,該發光 ^構430係依序蟲晶結合一 化合物 =:一活性層432與- Ρ型瓜-V族化合物層433, 中該活性層432作為發光區形成於該η型瓜族化 5物層431與該卩型皿—妒族化合物層433之間(如「第 ^2圖」所示)。(旬蒸鍍一 Ρ型歐姆接觸金屬層44〇於 邊發光二極體結構43〇的p型瓜_v族化合物層上, 並將該P型歐姆接觸金屬層44〇接合於一導埶基板 450(如「第5_3圖」所示)。其中該導熱基板45〇係選自 金(Au)、鋁(A1)、銅(Cu)、矽(Si)、磷化鎵(Gap)及碳化 矽(S!C)等其中一種及其組合。(e)移除該基板4〇〇,移除 該基板400的方法可以是濕式蝕刻、乾式蝕刻、雷射剝 離法(Laser lift off)及利用熱膨脹系數之差異於升降溫 中自然分離法其中一種。然後(f)蒸鍍一 N型歐姆接= 金屬460該發光二極體結構430的於該η型ΠΙ - V族化 合物層431上,而此接合面因為前述的凹凸表面421, 所以在移除該基板400後也為一凹凸表面434(如「第 5-4圖」所示)。(g)最後就可切割崩裂形成發光二極體 晶粒(如「第5-5圖」所示)。 經由上述移除基板400的方法所形成的發光二極體 元件如「第5-5圖」所示,其包括一具有斜面之發光二 極體結構430 ’其斜面係藉由前述基板400表面進行餘 14 200905915The LED device of the present invention and the method of fabricating the same can further remove the substrate. The method steps include: (4) providing a substrate, forming a passivation layer on the surface of the substrate, and defining a plurality of polygonal moiré regions. (b) performing (4) on the substrate, and engraving a plurality of grooves having a natural lattice slope and a bottom surface in the (4) region, and patterning the bottom surface of the groove (4). (4) forming a light-emitting diode structure on the bottom surface of the groove, the light-emitting diode structure sequentially epitaxially bonding an n-type y-v compound layer, an active layer and a type Π·ν compound layer Wherein the active layer is formed as a light-emitting region between the 5 η-type 冚-ν compound layer and the p-type steroid layer (d) a money-type ohmic contact metal layer in the p-type 羾 ν ν compound And bonding the 欧姆-type ohmic contact metal layer to a heat-conducting substrate, wherein the 6-well heat-conductive substrate is selected from the group consisting of gold (Au), Ming (A), copper (Cu), bismuth (Si), and gallium phosphide ( GaP) and strontium carbide (Sic), and the like. 0) removing the substrate, the method of removing the substrate may be wet etching 8 200905915, two dry etching, laser stripping method (Laser 〖 ift 〇 ff) and utilizing the difference of thermal expansion coefficient in the natural separation method of lifting temperature - kind. (7) Steaming an N-type ohmic contact metal on the n-type] Π-V compound layer. (g) Finally, the chipping can be cut to form a light-emitting diode crystal. A light-emitting diode=component formed by the above method for removing the substrate, comprising a light-emitting diode structure having a slope, wherein the slope surface is formed by the surface of the substrate of the foregoing method (4) having a natural lattice slope and The groove on the bottom surface is formed on the bottom surface of the groove by sequential incorporation of an n-type nr-v compound layer, an active layer (aetive ia^)*-p-type di-V compound layer. The active layer is formed as a light-emitting region between the group of the compound layer and the die-shaped compound layer, and the P-type ohmic contact metal layer is on the p-type melon-v compound layer, and the hot substrate is bonded to the stomach P35 ohm. Contacting the surface of the metal layer; and an N-type ohmic contact metal is located on the n-type 冚_ν compound layer. Wherein the surface of the n-type yttrium-V compound layer is a concave-convex surface. The invention has the advantages that the groove having the natural lattice bevel pattern is formed on the substrate by the technique of etching the substrate, and then the light-emitting diode is selectively grown in the groove to directly form a multilateral bevel. The diode can reduce the probability of all 2 inside the light-emitting diode element by the polygonal bevel, and increase the wire-out rate of the light-emitting diode. Because the manufacturing method is simple, the production cost can be reduced, and it is suitable for the [embodiment]. The details and technical description of the present invention are now described in the following steps. However, it should be understood that the embodiments are merely illustrative. 】 Use of the month, and should not be construed as limiting the implementation of the invention. 200905915 梦曰明(4) (4) The technology of the substrate, forming a groove having a self-slope: pattern on the substrate, and then selectively forming a light-emitting diode of the polygonal slope directly by the light-emitting diode layer, thereby taking the first extraction A luminous LED component. Words: Refer to "Grade to Diagram" as an intent of the present invention. The manufacturing steps of the present invention include: (4) providing _ Ϊ 中 : 板 板 板 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面 表面100 is a sapphire, a carbonized stone, a GaAs, and an aluminum nitride (A1N) substrate, wherein the purified layer 11G has a width of 5 μm to 5 μm and a diameter of 200 From micrometers to 2000 micrometers, the (four) region 111 is one of a quadrilateral, circular, and dichotomous group. - the corner opening / star and polygon group of engraving base ^ anti-ancient 100 to carry the name engraved 'in the aforementioned money engraving area 111 money called as "the second figure"); wherein the groove 12 = = micron to 5G Micron. In recent years, wet (four) (wetet = j = stone substrate technology has been widely studied, so (four) sapphire Γ: again, difficult work, the invention can be etched such as slab 4 substrate into a natural lattice Groove pattern groove 120. f If wet etching solution can be used, sulfuric acid: squaric acid = 5:2, heated to temperature: about 27 〇〇 C' can be engraved sapphire substrate 'When the purification layer no: When the flat side of the parallel sapphire substrate is etched, a symmetrical composite surface can be etched. The angle of the composite joint to the bottom s 121 is about 43 〇; when the direction of the purified crucible 110 is perpendicular to the flat side of the sapphire substrate, it can be etched. A 200905915 natural crystal lattice bevel, the angle between the lattice slope and the bottom surface 121 is about 32 〇, and the composite surface of the lattice slope, the angle of the composite surface and the bottom surface 121 is about 60 〇 (0 is formed on the bottom surface 121 of the groove 120) A light-emitting diode structure 130, δ hai light-emitting diode structure 13 〇 can use organic metal chemical vapor deposition (Metal organic chemical vap〇r dep〇shi〇n mocvd) selective growth sequential crystal Combining -n long _v compound layer 131, an active layer (activ e ayer) 132 and a p-type steroid layer 132 (shown as "Grade 3"), wherein the active layer 132 is formed as a light-emitting region in the n-type gull-v compound layer] Between the fV compound layer 132. The light-emitting diode structure: only selectively grows on the bottom surface (2) of the groove 120, and does not become specialized in 0, forms a natural lattice surface, and does not grow in a concave shape. The trench 12 is surrounded by a convex surface:: 110. The ohmic contact region is defined by dry etching to form a p-type ohmic contact electrode 134 electrically connected to the layer (1), and the type 1 ohmic contact electrode 13 = ϋ η The mv compound layer 131 is electrically connected to the pressure (as shown in "Fig. 1-4"). After the 偏 偏 偏 弁 Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ Γ The body die (as shown in the "Fig. 5"). The light-emitting diode diagram formed by the above method") includes the substrate 100, and the substrate/face 5 side forms a plate 00= with a natural lattice slope and a bottom surface 121, a diode structure 130, and a telecrystal formed on the bottom surface (2) of the groove 1 The Π-ν compound layer 131 of the light-emitting diode structure 13 ^ 120, the η-type η-type ρ-type mv group 200905915 n Jin [r / into the eight of the active members 32 as a light-emitting region formed in the The inter-m Λ layer 131 and the p--v compound layer of the single quantum co-active layer U2 are double heterojunction structures (DH), - (SQW) and multi-quantum well structures _w)桠nH Γ 51 妒 no compound layer 33 is electrically connected to the p-type ohmic contact electrode 134, the n-type ΙΠ-V compound layer 131 盥 the n-type ohmic contact electrode 135 is electrically too chrome mai, electrically connected To provide a forward bias. The door can be increased until the time zone 110 of the wire is added. Please refer to the "...to" diagram method. As long as the substrate 100 is immersed in the substrate, "the time is removed in step 5, and the time is made" until the passivation layer 110 is smashed and 盥: the etched region 111 is etched into a plurality of natural曰曰 斜 与 与 底面 底面 121 121 121 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 〇 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 2-4 The difference between the figure and the step-cutting cracking: M: body 'face:, as shown in the figure, is different from the above-mentioned "first grain (such as "2_5 ^ nni* ) 1〇^ figure" The recess of the substrate 100, the edge will not have the presence of the passivation layer 11 。. The VI method of 120 may further include - step b · 1 of the groove 122 is patterned by etching 121, etching a bump The surface 122 is used to increase the light extraction rate. The surface pattern is shown in the flow chart of the manufacturing method. As shown in Fig. 1 to Fig. 3·4 b, the etching process is concave; and 2 〇 = the method, but in the step , the money engraved a concave surface ^ f bottom * 121 to pattern the money 3-2 map and the third 3_3 = continued process steps c (such as "Ding Ding" > * ·, step d (such as "Wang 14 Gang ^ Ci \ is the same as described above, but the final cut collapse (split = "::) 12 200905915 . The polar body die is shown in Figure 3-4. The above "丨_5图" The difference is that the bottom surface 121 of the pair of grooves 120 has become the concave-convex surface 122, and the concave-convex surface 122 can be used to increase the light extraction rate of the light-emitting body element. ° See "Fig. 4", the light emission The diode structure 130 can also be electrically connected to the heat-dissipating reflective substrate 3 through the P-type ohmic contact electrode 134 and the 11-type ohmic contact electrode 134 and the conductive columns 210 and 220. The lanthanide system comprises a reflective metal layer and a thermal conductive substrate 320. The reflective metal layer 310 is electrically connected to the light emitting diode structure 13 through the conductive pillars 21 and 220, and the other surface and the heat conductive substrate 320 are connected. Connecting, forming a flip chip package (FHp (:hip) light emitting diode element, wherein the reflective metal layer 310 is selected from one of a combination of gold (Au) Ming (A1) and copper (Cu); The substrate 320 is selected from the group consisting of gold (Au), aluminum (A1), copper (Cu), bismuth (8), and gallium phosphide (GaP). And samarium carbide (Sic), etc., and a combination thereof. The substrate can be removed by the method of the present invention. Please refer to "Fig. 5-1 to Fig. 5-5" for the process of manufacturing the substrate for removing the substrate of the present invention. The method steps include: (a) providing a substrate 400, forming a passivation layer 410 on the surface of the substrate 4 and deciphering a plurality of quadrilateral, circular, triangular, star, and sigmoid shapes The etched area of one of the groups of groups. Wherein the base is 400, one of a sapphire, a sic, a bismuth (^), a gallium arsenide (^aAS), and an aluminum nitride (A1N) substrate; the passivation layer 410 has a visibility of 5 micrometers to 50 micrometers, the etched region has an inner diameter of 2 〇〇 micrometers to 2000 micrometers. The etched region is one of a group of quadrilateral, circular, triangular, star, and polygonal groups. (8) The substrate 13 200905915 has a natural lattice oblique groove 420' and a groove 42 in the aforementioned (4) m-domain (4). Bottom surface: = rhyme engraves a concave-convex surface 421 (such as "5-1". ί = wide 0 is -5 microns to 50 microns. (4) Forming a light-emitting diode structure on the first two poles 430, the light-emitting structure 430 is sequentially bonded to a compound = an active layer 432 and a Ρ-type melon-V compound layer 433, wherein the active layer 432 is formed as a light-emitting region in the n-type quaternization 5 The layer 431 is interposed between the layer 431 and the lanthanum compound layer 433 (as shown in Fig. 2). (The vapor-deposited ohmic contact metal layer 44 is formed on the edge-emitting diode structure 43〇 And bonding the P-type ohmic contact metal layer 44 to a germanium substrate 450 (as shown in "5-3"). The heat conductive substrate 45 is selected from gold. (Au), aluminum (A1), copper (Cu), bismuth (Si), gallium phosphide (Gap), and tantalum carbide (S!C), and the like. (e) removing the substrate 4〇〇 The method of removing the substrate 400 may be wet etching, dry etching, laser lift off, and utilizing a difference in thermal expansion coefficient between the natural separation method in the temperature rise and fall. (f) vapor deposition of an N-type ohmic connection = metal 460 of the light-emitting diode structure 430 on the n-type ΠΙ-V compound layer 431, and the bonding surface is removed due to the aforementioned uneven surface 421 The substrate 400 is also followed by a concave-convex surface 434 (as shown in "Fig. 5-4"). (g) Finally, the chip can be cut and cracked to form a light-emitting diode die (as shown in "Fig. 5-5"). The light-emitting diode element formed by the method of removing the substrate 400 is as shown in FIG. 5-5, and includes a light-emitting diode structure 430 having a sloped surface. The slope is performed by the surface of the substrate 400.余14 200905915

^ 具有自然晶格斜面與凹凸表面421的底面的凹 • 二,於該凹槽420的凹凸表面421上依序磊晶結合 η型1族化合物層431、該活性層432與該ρ型 族化合物層433所形成。其中該活性層432作為 發光區&形成於該η型ΠΙ_ν族化合物層431與該p型 诅-'知化合物層433之間;該p型歐姆接觸金屬層44〇 位於該?型瓜-乂族化合物層433上,其中該活性層432 係為雙異質接面構造(DH)、單量子井結構(sqw)及多量 f 子井結構(MQW)其中之一。該導熱基板450接合於該P 型歐姆接觸金屬層44〇表面,且該N型歐姆接觸金屬 460位於該於該η型m-v族化合物層431上,其中該n 型m-V族化合物層431的表面為一凹凸表面434。 惟上述僅為本發明之較佳實施例而已,並非用來限 定本發明實施之範圍。即凡依本發明申請專利範圍所做 的均等變化與修飾’皆為本發明專利範圍所涵蓋。a recess having a natural lattice bevel and a bottom surface of the concave-convex surface 421. Second, the n-type 1 compound layer 431, the active layer 432, and the p-type compound are sequentially epitaxially bonded to the uneven surface 421 of the recess 420. Layer 433 is formed. Wherein the active layer 432 is formed as a light-emitting region & between the n-type germanium-ν compound layer 431 and the p-type germanium compound compound layer 433; is the p-type ohmic contact metal layer 44? The type of melon-steroid compound layer 433, wherein the active layer 432 is one of a double heterojunction structure (DH), a single quantum well structure (sqw), and a plurality of f subwell structures (MQW). The thermally conductive substrate 450 is bonded to the surface of the P-type ohmic contact metal layer 44, and the N-type ohmic contact metal 460 is located on the n-type mv compound layer 431, wherein the surface of the n-type mV compound layer 431 is A concave surface 434. The above is only the preferred embodiment of the invention, and is not intended to limit the scope of the invention. That is, the equivalent changes and modifications made by the scope of the present invention are covered by the scope of the invention.

15 200905915 【圖式簡單說明】 > _。 • 第1_ 1至u圖為本發明的製造方法流择齐旅择系β 第2-1至2-5圖為本發明無鈍化層的製造方, 圖。 第3_1至3_4圖為本發明具凹凸表面的製造方法流程示 意圖。 第4圖為本發明的覆晶封裝結構示意圖。 第5-1至5-5圖為本發明除去基板的製造方法流程示意 f 圖0 \ 【主要元件符號說明】 100、400 :基板 110、410 :鈍化層 111 :蝕刻區域 120、420 :凹槽 121 :底面 122、421、434 :凹凸表面 130、430 :發光二極體結構 1 131、431 : η型IE-V族化合物層 132、 432 :活性層 133、 433 : ρ型ni-V族化合物層 134 :ρ型歐姆接觸電極 135 : η型歐姆接觸電極 210、220 :導電柱 300 :散熱反射基板 310 :反射金屬層 320、450 :導熱基板 16 200905915 . 440 : P型歐姆接觸金屬層 460 : N型歐姆接觸金屬15 200905915 [Simplified illustration] > _. • The first to the first drawings are the manufacturing method of the present invention. Figs. 2-1 to 2-5 are diagrams showing the manufacturing of the passivation layer of the present invention. 3_1 to 3_4 are schematic views showing the flow of the manufacturing method of the uneven surface of the present invention. Figure 4 is a schematic view of the flip chip package structure of the present invention. FIGS. 5-1 to 5-5 are schematic flowcharts showing a manufacturing method for removing a substrate according to the present invention. FIG. 0 \ [Major component symbol description] 100, 400: substrate 110, 410: passivation layer 111: etching region 120, 420: groove 121: bottom surface 122, 421, 434: uneven surface 130, 430: light-emitting diode structure 1 131, 431: n-type IE-V compound layer 132, 432: active layer 133, 433: p-type ni-V compound Layer 134: p-type ohmic contact electrode 135: n-type ohmic contact electrode 210, 220: conductive pillar 300: heat-dissipating reflective substrate 310: reflective metal layer 320, 450: thermally conductive substrate 16 200905915 . 440: P-type ohmic contact metal layer 460: N-type ohmic contact metal

1717

Claims (1)

200905915 十、申請專利範園: 1.,發光二極體製造方法,其步驟包括有: (基板,於該基板表面形成一純化層,並定義 出複數個多邊形的蝕刻區域; ⑻,該基板進彳讀刻,於前述㈣區域㈣出複數具 有自然晶格斜面與底面的凹槽; ⑷於前述凹槽的底面形成—發光二極體結構,該發光 :極體結構係依序蟲晶結合—n __v族化合物 3、一活性層與一 Psm_v族化合物層,其中該活 ’生層作為發光區形成於該nSjjj.V族化合^ m化合物層之間,且該p型瓜-V族化:: 層與一 P型歐姆接觸電極電性連接,該n型瓜-v 化合物層與—n S歐姆接觸電極電性 接 供-順向偏壓;及 妖用以k 2(1)=2:磨,並切割崩裂形成發光二極體晶粒。 •申明專利辄圍第1項所述之發光二極體 其中該基板係為藍寶石(Sapphire) 1 去, 3. =申請專利範圍第i項所述之發光二 其中該鈍化層的寬度為5微米至方法, 的内徑為200微米至2000微米。” μ蝕刻區域 極體製造方法, 角形、星形及多 4. 如申請專利範圍第丨項所述之發光 其中該蝕刻區域為四邊形、圓形、」 邊形所組的族群其中之一。 7申請專利範圍第!項所述之發光二極體製造 ,、中該凹槽的深度為〇.5微米至5〇微米。 去, 18 200905915 6.如’請專利範園第】項所 ― f中該步驟b可以延長蝕極體製造方法’ 去。 直到遠純化層被除 7.如申請專利範圍第丨 其t該步驟b更包括一牛驟'之广先二極體製造方法, 凹槽的底面進行圖案化二出步驟凹:對 以增加光取出率。 蝕“出一凹凸表面,用 8.—種發光二極體奥 ㈣徂* 其步驟包括有: ⑷^-基板,於該基板表面形成一純化層 出禝數個多邊形的蝕刻區域; a並疋義 (b)二基:反於前糊區域韻刻出複數具 = 袼斜面與底面的凹槽,並對該些凹槽的底 1仃圖案化蝕刻,蝕刻出一凹凸表面; _ ⑷於前述凹槽的底面形成一 二極體結構俜依序蠢曰έ士人 口構該發光 偁你依序磊日日結合一 η型m-v族化合物 曰、一活性層與一 p型!π_ν族化合物層,其中該活 性層作為發光區形成於該η型m-v族化合物層與該 p型m- V族化合物層之間; η 〇 (d)蒸鍍一 ρ型歐姆接觸金屬層於該1)型瓜_从族化合物 層上,並將該p型歐姆接觸金屬層接合於—導^基 板; ”、、i (e) 移除該基板; (f) 条鑛一 N型歐姆接觸金屬於該^型]π - V族化人物吳 上;及 、口曰 (g) 切割崩裂形成發光二極體晶粒。 9.如申请專利範圍第8項所述之發光二極體製造方法, 19 200905915 其中6亥基板係為藍寶石(Sapphire)、碳化石夕(SiC)、石夕 (Si)、石申化鎵(GaAs)和氮化銘(Ain)基板其中之一。 10. 如申請專利範圍第8項所述之發光二極體製造方 法,其中該鈍化層的寬度為5微米至5〇微米,該蝕 刻區域的内徑為200微米至2〇〇〇微米。 11. 如申請專利範圍第8項所述之發光二極體製造方 法,其中該蝕刻區域為四邊形、圓形、二 及多邊形所組的族群其中之―。―㈣星$200905915 X. Patent application garden: 1. The method for manufacturing a light-emitting diode, the steps comprising: (a substrate, forming a purification layer on the surface of the substrate, and defining an etching region of a plurality of polygons; (8), the substrate is advanced In the above-mentioned (4) region (4), a plurality of grooves having a natural lattice slope and a bottom surface are formed; (4) a light-emitting diode structure is formed on the bottom surface of the groove, and the light-emitting body structure is sequentially bonded to the crystal body- n __v compound 3, an active layer and a Psm_v compound layer, wherein the living layer is formed as a light-emitting region between the nSjjj.V group compound layer, and the p-type melon-V group: : The layer is electrically connected to a P-type ohmic contact electrode, and the n-type melon-v compound layer is electrically connected to the -n S ohmic contact electrode-forward bias; and the demon is used for k 2(1)=2: Grinding and cutting to form a light-emitting diode grain. • The light-emitting diode described in Item 1 of the patent, wherein the substrate is Sapphire 1 , 3. = Patent Application No. i The light-emitting layer 2 wherein the passivation layer has a width of 5 micrometers to the square The inner diameter of the method is from 200 micrometers to 2000 micrometers." μ etching region pole body manufacturing method, angular shape, star shape, and more. 4. The light-emitting method as described in the scope of the patent application, wherein the etching region is quadrangular, circular, One of the ethnic groups in the shape of the edge. 7 The invention is applied to the manufacture of the light-emitting diode according to the scope of the invention, wherein the depth of the groove is 〇5 μm to 5 μm. Go, 18 200905915 6. For example, in the case of 'Request Patent Fanyuan', the step b can extend the method of manufacturing the polar body. Until the far purification layer is removed. 7. As in the scope of the patent application, the step b includes a bolus. 'The method of manufacturing the first diode, the bottom surface of the groove is patterned and the second step is concave: the pair is used to increase the light extraction rate. The etch "exposes a concave-convex surface, using a light-emitting diode (A) 徂* The steps include: (4) ^-substrate, forming a purified layer on the surface of the substrate with a plurality of polygonal etching regions; a and meaning (b) two bases: opposite to the front paste region, engraving the plural number = slanting surface and a groove on the bottom surface and a bottom pattern of the grooves Etching, etching a concave-convex surface; _ (4) forming a diode structure on the bottom surface of the groove, followed by the stupid gentleman population to form the luminescence, and you are bound to combine a η-type mv compound 曰, one An active layer and a p-type!π_ν compound layer, wherein the active layer is formed as a light-emitting region between the n-type mv compound layer and the p-type m-V compound layer; η 〇(d) is vapor-deposited a type ohmic contact metal layer on the 1) type melon-slave compound layer, and bonding the p-type ohmic contact metal layer to the substrate; ",, i (e) removing the substrate; (f) The mine-N-type ohmic contact metal is in the shape of the π-V group of characters; and the mouth 曰 (g) is cut and cracked to form the luminescent diode crystal. 9. The method for manufacturing a light-emitting diode according to claim 8, 19 200905915 wherein the substrate is a sapphire, a carbon stone (SiC), a stone (Si), a stone (a) One of GaAs) and nitrided (Ain) substrates. 10. The method of fabricating a light-emitting diode according to claim 8, wherein the passivation layer has a width of from 5 micrometers to 5 micrometers, and the etching region has an inner diameter of from 200 micrometers to 2 micrometers. 11. The method for fabricating a light-emitting diode according to claim 8, wherein the etched region is one of a group of quadrilateral, circular, di-, and polygonal groups. ―(四)星$ 12·、如申明專利範圍第8項所述之發光二極體製造方 法,其中該凹槽的深度為05微米至5〇微米。 13:Γ,申Λ專,第8項所述之發光二極體製造方 / ,、該導熱基板係選自金(Au)、鋁(Ai)、銅(Cu)、 矽(si)、磷化鎵(GaP)及碳化矽(Sic)等其中一種及其 14.如申請專利範圍第 〜。π 延夂發光二極 法’其中移除該基板的方法係為濕式㈣式兹 f、雷射卿法(Laser lift Gff)及利用熱膨脹系數^ 異於升降溫中自然分離法其中一種。 ” 15.—種發光二極體元件,其包括有: 一基板,且該基板表面進行蝕刻形成—且 斜面與底面的凹槽;及 、有自日日格 二發光二極體結構,其蟲晶形成於前 Γ光構係依序結合-n型么物 層、一活性層(active layer)盥一 、化。物 :丄其中該活性層作為發光區形成於該:二化= 化合物層與該P型心V族化合物層之間, 20 200905915 化合物層與一 ρ型歐姆 連接Γ 層與一n型歐姆接觸電極電性 連接,用以提供一順向偏壓。 电位•生 16中如範圍第15項所述之發光二極體元件,1 i為藍寶石(Sapphire)、破化邦❿、; j 7.如由=^iGaAs)和氮化鋁(ain)基板其中之一。 Γ 中誃其月;t Γ1耗圍帛15項所述之發光二極體元件,其 μ 土板表面設有一鈍化層於該凹槽週緣。 八 中Ί專第15項所述之發光二極體元件,其 中:凹槽為四邊形、圓形、三角形 組的族群其_之一。 义運办所 19.如申請專利範圍第15項所述之發光二極體元件,盆 2槽的深度為0.5微米至5〇微米,内徑為· 微未至2000微米。 瓜如申請專利範圍第15項所述之發光二極體元件,其 中該凹槽的底面為一凹凸表面。 21=申請專利範圍第15項所述之發光二極體元件,其 該活性層係為雙異質接面構造(DH)、單量子井結構 (SQW)及多量子井結構(Mqw)其中之一。 22.如^申凊專利範圍第15項所述之發光二極體元件,其 中》亥毛光一極體結構係藉由該型歐姆接觸電 型歐姆接觸電極電性連接於—散熱反射基板上。 3·如申请專利範圍第22項所述之發光二極體元件,其 u政”、、反射基板係包含一反射金屬層與一導熱基 板’邊反射金屬層一表面與該發光二極體結構電性連 接,其另一表面與該導熱基板連接。 21 200905915 24.如申吻專利範圍第23項所述之發光二極體元件,其 中該反射金屬層係選自金(Au)、鋁(A1)及銅(Cu)等其 中一種及其組合。 〃 26. 如申明專利範圍第23項所述之發光二極體元件,其 中該導熱基板係選自金(Au)、鋁(A1)、銅(Cu)、矽(Si)'、 磷化鎵(GaP)及碳化矽(Sic)等其中一種及其組合。 27. —種發光二極體元件,其包括有: 一具有斜面之發光二極體結構,其斜面係藉由一基 板表面進行蝕刻形成一具有自然晶格斜面與底面的 凹槽,再依序磊晶結合一 n型皿_ v族化合物層、一 活性層與一 Ρ型rn_v族化合物層所形成,其中該活 性層作為發光區形成於該n型冚_v族化合物 P型ΠΓ - V族化合物層之間; ,、 一 P型歐姆接觸金屬層,其位於該p型冚_v族化人 物層上; σ 一導熱基板,其接合於該Ρ型歐姆接觸金屬層表 面;及 a 一 N型歐姆接觸金屬,其位於該於該n型瓜_v族 化合物層上。 ' 28·如申請專利範圍第27項所述之發光二極體元件,其 中该發光二極體結構為四邊形、圓形、三角形、星形 及多邊形所組的族群其中之一。 29. 如申請專利範圍第27項所述之發光二極體元件,其 中該發光二極體結構的厚度為0.5微米至5〇微米了 半徑大小為200微米至2000微米。 30. 如申請專利範圍第27項所述之發光二極體元件,其 22 200905915 中該η型!Π-V族化合物層的表面為一凹凸表面。 31.如申請專利範圍第27項所述之發光二極體元件,其 中該活性層係為雙異質接面構造(DH)、單量子井結構 (SQW)及多量子井結構(MQW)其中之一。12. The method of fabricating a light-emitting diode according to claim 8, wherein the groove has a depth of from 05 micrometers to 5 micrometers. 13: Γ,申Λ专, the light-emitting diode manufacturing method according to item 8, /, the heat-conducting substrate is selected from the group consisting of gold (Au), aluminum (Ai), copper (Cu), bismuth (si), phosphorus One of gallium (GaP) and strontium carbide (Sic) and the like. The π-delayed light-emitting diode method is one in which the method of removing the substrate is a wet type (four) type, a laser lift GW, and a thermal expansion coefficient is different from a natural separation method in the temperature rise and fall. 15. A light-emitting diode element comprising: a substrate, wherein the surface of the substrate is etched and formed by a groove of a slope and a bottom surface; and a structure of the light-emitting diode from the day and the day, the insect The crystal is formed in the pre-calendering system, and the n-type layer, an active layer, and the active layer are sequentially formed. The active layer is formed as a light-emitting region: the chemical layer and the compound layer are Between the P-type core V compound layer, 20 200905915 compound layer and a p-type ohmic connection layer are electrically connected to an n-type ohmic contact electrode to provide a forward bias voltage. The light-emitting diode element according to item 15, wherein 1 i is one of sapphire, sinusoidal, j 7. and GaAs, and one of aluminum nitride (ain) substrates. The illuminating diode component of the fifteenth item is provided with a passivation layer on the periphery of the groove. The illuminating diode component described in Item 15 of Among them: the groove is a group of quadrilateral, circular, and triangular groups. 19. The light-emitting diode element according to claim 15, wherein the depth of the groove of the bowl 2 is from 0.5 micrometer to 5 micrometers, and the inner diameter is from less than 2000 micrometers. The light-emitting diode element, wherein the bottom surface of the groove is a concave-convex surface. 21 = The light-emitting diode element according to claim 15 wherein the active layer is a double heterojunction structure (DH) One of the single quantum well structure (SQW) and the multi-quantum well structure (Mqw). 22. The light-emitting diode element according to claim 15 of the patent application, wherein the "Heiling Light Body Structure" The ohmic contact type ohmic contact electrode is electrically connected to the heat-dissipating reflective substrate. 3. The light-emitting diode element according to claim 22, wherein the reflective substrate comprises a reflection The surface of the metal layer and the heat-conducting substrate 'side-reflecting metal layer is electrically connected to the light-emitting diode structure, and the other surface thereof is connected to the heat-conductive substrate. The light-emitting diode element according to claim 23, wherein the reflective metal layer is selected from the group consisting of gold (Au), aluminum (A1), and copper (Cu), and combinations thereof. The light-emitting diode element according to claim 23, wherein the heat-conductive substrate is selected from the group consisting of gold (Au), aluminum (A1), copper (Cu), bismuth (Si), and gallium phosphide. (GaP) and bismuth carbide (Sic), and the like. 27. A light-emitting diode device comprising: a light-emitting diode structure having a sloped surface, wherein the slope is etched by a substrate surface to form a groove having a natural lattice slope and a bottom surface, and then sequentially The epitaxial crystal is formed by combining an n-type dish _ v compound layer, an active layer and a Ρ-type rn_v compound layer, wherein the active layer is formed as a light-emitting region in the n-type 冚_v compound P-type ΠΓ-V group Between the compound layers; a P-type ohmic contact metal layer on the p-type 冚_v group of the person; σ a thermally conductive substrate bonded to the surface of the Ρ-type ohmic contact metal layer; and a-N A type of ohmic contact metal that is located on the n-type melon-v compound layer. The light-emitting diode element according to claim 27, wherein the light-emitting diode structure is one of a group of a quadrangle, a circle, a triangle, a star, and a polygon. 29. The light-emitting diode component of claim 27, wherein the light-emitting diode structure has a thickness of from 0.5 micrometers to 5 micrometers and a radius of from 200 micrometers to 2000 micrometers. 30. The light-emitting diode element according to claim 27 of the patent application, the n-type of 22 200905915! The surface of the Π-V compound layer is a concave-convex surface. The light-emitting diode element according to claim 27, wherein the active layer is a double heterojunction structure (DH), a single quantum well structure (SQW), and a multiple quantum well structure (MQW). One.
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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI403008B (en) * 2009-12-04 2013-07-21 Just Innovation Corp Method for fabricating light emitting diode chip

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI403008B (en) * 2009-12-04 2013-07-21 Just Innovation Corp Method for fabricating light emitting diode chip

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