TW200903686A - In-line lithography and etch system - Google Patents
In-line lithography and etch system Download PDFInfo
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- TW200903686A TW200903686A TW097111696A TW97111696A TW200903686A TW 200903686 A TW200903686 A TW 200903686A TW 097111696 A TW097111696 A TW 097111696A TW 97111696 A TW97111696 A TW 97111696A TW 200903686 A TW200903686 A TW 200903686A
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Classifications
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- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B19/00—Programme-control systems
- G05B19/02—Programme-control systems electric
- G05B19/418—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM]
- G05B19/41865—Total factory control, i.e. centrally controlling a plurality of machines, e.g. direct or distributed numerical control [DNC], flexible manufacturing systems [FMS], integrated manufacturing systems [IMS] or computer integrated manufacturing [CIM] characterised by job scheduling, process planning, material flow
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/67—Apparatus specially adapted for handling semiconductor or electric solid state devices during manufacture or treatment thereof; Apparatus specially adapted for handling wafers during manufacture or treatment of semiconductor or electric solid state devices or components ; Apparatus not specifically provided for elsewhere
- H01L21/67005—Apparatus not specifically provided for elsewhere
- H01L21/67242—Apparatus for monitoring, sorting or marking
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/10—Measuring as part of the manufacturing process
- H01L22/14—Measuring as part of the manufacturing process for electrical parameters, e.g. resistance, deep-levels, CV, diffusions by electrical means
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L22/00—Testing or measuring during manufacture or treatment; Reliability measurements, i.e. testing of parts without further processing to modify the parts as such; Structural arrangements therefor
- H01L22/30—Structural arrangements specially adapted for testing or measuring during manufacture or treatment, or specially adapted for reliability measurements
- H01L22/34—Circuits for electrically characterising or monitoring manufacturing processes, e. g. whole test die, wafers filled with test structures, on-board-devices incorporated on each die, process control monitors or pad structures thereof, devices in scribe line
-
- G—PHYSICS
- G05—CONTROLLING; REGULATING
- G05B—CONTROL OR REGULATING SYSTEMS IN GENERAL; FUNCTIONAL ELEMENTS OF SUCH SYSTEMS; MONITORING OR TESTING ARRANGEMENTS FOR SUCH SYSTEMS OR ELEMENTS
- G05B2219/00—Program-control systems
- G05B2219/30—Nc systems
- G05B2219/45—Nc applications
- G05B2219/45031—Manufacturing semiconductor wafers
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/02—Total factory control, e.g. smart factories, flexible manufacturing systems [FMS] or integrated manufacturing systems [IMS]
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
- Y02P90/00—Enabling technologies with a potential contribution to greenhouse gas [GHG] emissions mitigation
- Y02P90/80—Management or planning
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- Engineering & Computer Science (AREA)
- Manufacturing & Machinery (AREA)
- Microelectronics & Electronic Packaging (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- Power Engineering (AREA)
- Automation & Control Theory (AREA)
- General Engineering & Computer Science (AREA)
- Quality & Reliability (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
- Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
- Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)
- General Factory Administration (AREA)
Abstract
Description
200903686 九、發明說明： 【發明所屬之技術領域】 本發明係有關於晶圓處理，更特定地係有關於使用位置相依 性程序與次系統來改善晶圓處理。 【交又參考之相關申請案】 、本申請案與下列有關：於2〇〇7年3月30日在美國共同申請 之美國專利申請案第Π/730283號，其發明名稱為「驗證位置相 依性晶圓之方法與設備」（Me*thod and Apparatus for Verifying a Site-Dependent Wafer);於2007年3月30日在美國共同申請 之美國專利申請案第11/730284號，其發明名稱為「驗證位置相 依性私序之方法與設備」（Method and Apparatus for Verifying a Site-Dependent Procedure);於 2007 年 3 月 30 日在美國共同 申請之美國專辦請案第H/7難丨號，其發明名稱為「'用以建 構位置相依性評估程式庫之方法與設備」（Meth〇d and Apparatus for Creating a Site-Dependent Evaluation Procedure);於 2007 年3月30日在美國共同申請之美國專利申請案第11/73〇279號， 其發明名稱為「用以執行位置相依性雙重金屬鑲嵌之方法與設備」 (Method and Apparatus for Performing a Site-Dependent DualBACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to wafer processing, and more particularly to the use of position dependency programs and subsystems to improve wafer processing. [Related application for reference] This application is related to the following: U.S. Patent Application Serial No. 730/283, filed on March 30, 2007, the entire disclosure of which is entitled (Me*thod and Apparatus for Verifying a Site-Dependent Wafer); U.S. Patent Application Serial No. 11/730,284, filed on Mar. "Method and Apparatus for Verifying a Site-Dependent Procedure"; the United States Special Application No. H/7, which was jointly filed in the United States on March 30, 2007, The invention is entitled "Meth〇d and Apparatus for Creating a Site-Dependent Evaluation Procedure"; a US patent application filed in the United States on March 30, 2007 Case No. 11/73〇279, entitled "Method and Apparatus for Performing a Site-Dependent Dual"
Damascene Procedure);以及，於2007年3月30日在美國丘同 申請之美國專财請案第11/73()339號，其發明名稱為「'用;;執 行位置相依性雙圖案化程序之方法與設備」（Meth〇d and Apparatus for Performing a site-Dependent Dual Patterning Procedure)。這些申請案之個別完整内容於此併入本案以供參考。 【先前技術】 、當前積體·的製造方法與廠房設計需要許多卫具設置成獨 立式平台或聚集於一般區域，彼此間通常隔有2〇〇〇英尺戋更遠。 使用這些工具的設備便因此亦必須廣泛遍佈於廠房中。這些平台 200903686 π^η能是：基板塗布（黏著劑塗布、底層抗反射塗布 .L条i'J1層抗反射塗布（TARC)、抗姓劑塗布、頂蓋層塗布）；烘 及曝光後洪烤）；成像(曝光）；量測（疊對量 後、、主考.及及I厚i ’·使用以浸潰式處理的曝光前與曝光 ί #膜之圖案)及钱刻後清潔（聚合物及其 此。針對低於32 nm閘極長度的技術將需要重複這 =完體晶_單—啟動層，亦即，二次抗反 射底層、一次或二次圖案化、二次或三次成像等。 年國際半導體技術準則（itrs 2〇05蝴_)，對 時ri =所f求之光閘層級的缺陷密度在尺寸為1〇 nm 制將^大5在、广。，對烟後的閘極元件’臨界尺寸的控 標準差)。至今沒有既存的微廳 维^ίϊΐίΐϊί要製Ϊ在上游做即時、晶圓間的調整，以 ΐ^ίίΐΐ 因為晶圓在廠房内工具間的移動會增加 ，lty requi™s) 些曝光工具製造商所宣稱 【發明内容】 本發明提供一即時處理晶圓的方法Damascene Procedure); and the US Treasury Application No. 11/73() No. 339, filed on March 30, 2007 in the United States, whose invention name is "use;; implementation of position dependence double patterning procedure Meth〇d and Apparatus for Performing a site-Dependent Dual Patterning Procedure. The individual contents of these applications are incorporated herein by reference. [Prior Art] The current manufacturing method and plant design require that many fixtures be placed in a stand-alone platform or gathered in a general area, usually between 2 feet and a foot apart. Devices using these tools must therefore be widely distributed throughout the plant. These platforms 200903686 π^η can be: substrate coating (adhesive coating, underlying anti-reflective coating. L i'J1 layer anti-reflective coating (TARC), anti-surname coating, cap coating); drying and exposure Bake); imaging (exposure); measurement (after stacking, priming, and I thickness i '· using pre-exposure and exposure ί #膜 patterns) and money cleaning (polymerization) And the technology for the gate length below 32 nm will need to repeat this = complete crystal-single-starting layer, ie, secondary anti-reflective underlayer, primary or secondary patterning, secondary or tertiary imaging Et. The International Semiconductor Technical Guidelines (itrs 2〇05 Butterfly_), the defect density of the sluice level at the time ri = s = 1 is in the range of 1 〇 nm. Gate element 'standard deviation of critical dimensions'). So far there is no existing micro-room dimension ^ίϊΐίΐϊί to make immediate, inter-wafer adjustments in the upstream, to ΐ^ίίΐΐ because the movement of wafers between the tools in the plant will increase, lty requiTMs) Claimed that the present invention provides a method for processing wafers on the fly
Site_Dependent>f_n 在某 ^ 更多個次糸統及/或系統中之一個或更多 二2例中’—或 數來執行S-D輕程序及/或S_D評即#S-D參 及/或S-D量測程序可用歷史資料來操作。 ，-D處理程序 在其他某些實施例中，本發明提供用來驗證W晶圓的方法 200903686 與設備。在一步驟中，第—έ日Q_n a 丄 統^-或更^固S-D處理元件來接二且一或次系 件能連接到-或更多個S__D傳齡統。每 晶圓資料，且晶圓資料可包括歷史及/或即時^有的 中，藉使用一或更多個S_D處理元件來執行第 能夠產生在各未驗㈣晶圓上的;之評， 包括各未驗㈣晶圓之r需能 Γ關，並且第- s切估程序能4第未:， ! 估元件能建構有第一操作性狀元;數 弟一數罝能用一或更多個S_D烊杜 引用砰估兀件之 定，且利_資料、S-D晶_資# 來決 ==用評估晶圓之第—數量，或上述組日m 輸次序能加以建構。當S—D評估 口上3傳 估元件之第-數量時，藉使用第一 S®D之或^^評 圓卜或更多個評估次系統之第-組數 用夕h ' 作另外’本發明提供-驗證S-D曰in = 個;理次系統之用以=Site_Dependent>f_n performs SD light program and/or S_D evaluation #SD participation and/or SD measurement in one or more of two or more systems in a certain system and/or system. The program can be operated with historical data. , -D Process In some other embodiments, the present invention provides a method for verifying a W wafer 200903686 with a device. In one step, the first day-to-day Q_n a system or the second-order S-D processing element can be connected to one or more subsystems to be connected to - or more than one S__D age system. Each wafer material, and the wafer material may include history and/or instant, by using one or more S_D processing elements to perform the evaluation that can be generated on each of the untested (four) wafers, including Each of the untested (four) wafers needs to be able to pass the test, and the first-s-sampling procedure can be 4th:, ! The estimated component can be constructed with the first operational feature; the number of the first can be used by one or more S_D烊 砰 砰 砰 砰 砰 砰 砰 砰 砰 砰 砰 砰 砰 砰 砰 砰 砰 , , , , , , , , , , , , , , , , , , , , , , , 资料 资料 资料 资料 资料 资料When the S-D evaluation port 3 estimates the number-number of components, the first S®D or ^^ evaluation circle or the number of the first group of the evaluation subsystem is used as the other Invention provided - verify SD曰in = one;
個S-D處理元件的! J二::f =:以及連接到-或更多 產生程序，-妓多個s #傳輸-人祕。藉執行第- S-DS-D processing elements! J two::f =: and connected to - or more to generate programs, - 妓 multiple s # transmission - human secret. By executing the first - S-D
晶圓，1由巧個S—D處凡件能用以產生第一組未驗證S-D 及連接到—;袖q_D童，/兀件的一或更多個控制器，以 -更夕個S-D傳輪二人系統的該等控制器。—或更多個 200903686 控制器能：用以建構各未驗證S_D晶圓的s—D =’ S-D晶圓狀態資料包含各未驗證S_D晶圓之所^其Wafer, 1 by the S-D can be used to generate the first set of unverified SD and connected to - sleeve q_D children, / one or more controllers, to - SD These controllers of the transfer two-person system. - or more 200903686 Controllers: s-D =' S-D wafer state data used to construct each unverified S_D wafer contains each unverified S_D wafer
晶圓的第一組評估晶圓，第一組評估^圓S—D 在連接到-或更多個S_D傳輸次系統之—或U ^序 '、先中’用以建構複數個s—D評估元件的第一操 ^ 一-人糸 -或更多個S-D評估元件的第—操作性狀態，、使用 估元件之第一數量；藉使用晶圓資料、S-D晶圓狀離、^評 估晶圓之第-數量或可利用評估元件之 旦Ύ : S-D評 合，用以建構第—S-D傳輸次序；以及，^任何組 多於可利用評估元件的第一數量時:曰曰圓的數量 外，當S-D評估晶圓的數量少於或等，口 :：土動作。此 量時，藉使用第-S-D傳輪次庠用汗估疋件的第—數 用以傳輸第一組s-d評估晶圓至一“ 能 數量可利用評估元件。 又夕財估-人糸統中的第- 絲^分額^實施财，本發日供用來驗證S-D程序之方 ，與5又備。—已驗證S_D產生程序能在受處理 能減少，且^;;直:口:產月ξ要:的:置數量亦 圓能由連接到一或更多個處理戈糸絲6+ /更夕個S D Β日 件的-或更多個欠;;多個S—D處理元 晶圓資料，且晶圓』包;；有== 中，能為各晶圓決定S-D晶圓狀態資料第一租驗 晶圓資料來_組驗 ί 能為各個驗證晶圓決定所 /7幻下之w位置的數篁。接著，針對第—組驗證 10 200903686The first set of evaluation wafers of the wafer, the first set of evaluations, the round S-D, is connected to - or more of the S_D transmission subsystems - or U ^ ', "first" to construct a plurality of s-D Evaluating the first operational state of the component - the first operational state of the component or the plurality of SD evaluation components, using the first number of components; using the wafer data, SD wafer-like separation, and evaluating the crystal Round-number or available evaluation component: SD evaluation to construct the first-SD transmission order; and, ^ any group more than the first number of available evaluation elements: the number of rounds When the number of SD evaluation wafers is less than or equal, the mouth:: soil action. In this amount, the first number of sd evaluation wafers is transmitted to the first set of sd evaluation wafers by using the first-SD pass-to-sense evaluation component. In the first - silk ^ share ^ implementation of the money, this is the date used to verify the SD program, and 5 is ready. - Verified S_D generation program can be reduced in processing, and ^;; Straight: mouth: production Months:: The number of rounds can also be connected to one or more of the processing of the Goose 6+ / 夕 SD Β 件 或更 或更 或更 ; ; ; ; ; ; ;; Circular data, and wafer package;; ===, can determine the SD wafer status data for each wafer, the first lease wafer data to _ group inspection ί can be determined for each verification wafer The number of positions in the w. Next, for the first group verification 10 200903686
晶圓中之第-驗證晶圓，藉使用晶圓資料、S—D =證=置的數量、所造訪驗證位置的數量或所^ 或上述任何組合’第—程序驗證次序能二〜置的 f $程序驗證次序，第-S_D驗證程序:圓^ ’ 以決定，並能包括-或更多個處理程序。# '，：日日固來加 利用時，藉使用連接到第-處理次系統的s 驗證晶圓能傳輸至第-處理次系統中的第—s’ ^一 了 S-D處理元件無法_時，第—驗 J第 來延遲第一段時間。 口此用Sj傳輸次系統 又在其他實施射’本發明提供—方法來雜 式庫，且該方法能包含：藉使用S_D處理 '^估私 多個層中建構- S-D參照結構；藉使用評估 上一或更 構取得S-D評估資料，比較S_D評估資 S~D參照結 =’為評估資料建立信賴度#料及風險評估、、以g =制時Γί照結構辨識為已驗證結構;將== 的貝枓以一 S_D組的波長為特徵U庫裡 匹配情況有關之S-D評估程式庫資料來，能使用與 提供-系統來建構S-D評估程式庫，且^ J ^ f外，本發明 資料與預測資料、辨識出已驗辦’用以比較評估 儲存與已驗證參赌構有關之^r在S—D評估程式庫中 產生ί庠藉使:S~D處理元件、 方法，來執行雙重金屬鑲嵌程序。、°本發月棱权糸統與 用來’11使用複數個w程序，本發明提供 來執订雙重圖案化處理次序的方法。該方法能包括藉由處g 11 200903686 '二ΐ 糸統來接收第—組晶圓。處理系統能包括： = 先、—或更多_描器次系統、一或更多個 ΐΐ ΐ ί f Γ 熱處理次系統、—或更多個評估次系統、 徊彳錢、—或衫個靖改製次系統或一或更多 個"L積-人糸統，或上述任何組合。 ，發明其他的實施_從下文描述與隨騎此之圖式更能加 以了解。 【實施方式】 本發明提則以處理晶圓的設備與方法，該等晶圓在其等之 ^具，大I半導體裝置’ *該設備與方法使用位置相依性(s_D, 的程序、次序及/或次系統。晶圓在接收時，該等晶 0被此辨識為位置相依性(S_D)晶圓或非位置相依性(n_s_d 。在各式實細巾，所·的設備及方法 ^來執订S-D傳輸次序、處理S_D曰曰曰圓、建構S_D評估程式庫、 或更多個^產生程序及7或—或更多個評估程序的 S-D處理次序、執行S_D驗證程序。 處理系統能包括S-D處理元件、S_D評估元件及連接到 ，多個S-D處理耕及-或更多個S_D評估元件的—或更多個 S-D傳輸次系統 除此之外，可採用其他配置。 S_D θθ圓上，在各區位可設置一或更多個位置。位置能是 =里相關的’且-或更多個位置能用於S_D評估及/或驗證程序。 S-D評估及/或驗證程序能用來評估及/或驗證S_D傳輸次序、s_d BHlS_D程序、仰評估程式庫、S_D處理次序或處理步驟中使 用的特定位置，或上述任何組合。 丁尤 日士盘能具有與其錢之晶圓資料，^'晶31資料能包括即 ί 二晶圓資料能是S侃7或N_S_D資料。此外，晶圓 貝枓此包括晶圓的信賴度資料及/或風險資料。S_D晶圓能具 其有關之位置資料，且該等位置資料包括所需位置之數量、所造 12 200903686 訪位置之數量、一或更多個位置之信賴度資料及/或風險資料、位 置排franking)資料、傳輸次序資料、處理相關資料或評估/驗證 相關資料，或上述任何組合。晶圓資料能包括能用來建構s_d ς 輸次序屬性的一或更多個傳輸次序變數。S_D傳輸次序能 變’以最佳化產能、最大化處理元件的使用、最大化評估元^ 使用、儘速重新改製不良晶圓。晶圓資料能包括能用來建 ^ 處理次序屬性的-或更多個處理次序變數。S_D傳輪 改變，以最佳趙能、最大域狀件的細、最 的使用、儘速重新改製不良晶圓、避免離線及/或故障 — 或更多個位置已被評估及/或驗證後傳輸晶圓。 或S_D處理次序亦能使用晶圓㈣來為各S-D曰 Ξίϋ處理次序能在描述於此之各種狀況下建構，且二 傳輸-人序此在描述於此之各種狀況下建構。 基於各晶圓所需之位置的數量、需要處理之 利用S-D處理元件的數量及S_D傳輸 里、可The first-verified wafer in the wafer, by using the wafer data, S-D = the number of proofs, the number of verified verification locations, or any combination of the above - the first program verification order can be set f $ program verification order, the -S_D verifier: circle ^ ' to decide, and can include - or more handlers. # ',: When the day is used, it is verified that the wafer can be transferred to the first-s' in the first-processing system by using the s connected to the first-processing subsystem. The first - check J first delayed the first period. The Sj transmission sub-system uses the Sj transmission sub-system in other implementations to provide the method to the heterogeneous library, and the method can include: by using the S_D processing '^ to evaluate the private layer construction - the SD reference structure; The previous or more structure obtains the SD evaluation data, compares the S_D evaluation capital S~D reference junction = 'establishing the reliability information and risk assessment for the evaluation data, and identifying the structure as the verified structure by g = system ; 照 照 structure; will == The Bellows uses the S_D group wavelength as the characteristic of the SD evaluation library data related to the U-Curie matching situation, and can use the system to construct the SD evaluation library, and the data and prediction data of the present invention Identifying the checked-out 'Compared with the evaluation of the store and the verified gambling structure ^r generated in the S-D evaluation library 庠 庠: S~D processing components, methods to perform dual metal damascene procedures . The present invention provides a method for binding a double patterning processing sequence. The method can include receiving the first set of wafers by using the g 11 200903686 'diode system. The processing system can include: = first, - or more, the system, one or more 热处理 ΐ ί f Γ heat treatment subsystems, or more evaluation subsystems, money, or shirts Restructure the secondary system or one or more "L-products, or any combination of the above. Other inventions are invented _ from the following description and the accompanying figure can be more understood. [Embodiment] The present invention provides a device and a method for processing a wafer, such a wafer, etc., a large I semiconductor device' * the device and method use position dependence (s_D, the program, the order and / or secondary system. When the wafer is received, the crystal 0 is identified as position dependent (S_D) wafer or non-positional dependence (n_s_d. In various types of fine towels, equipment and methods ^ Binding the SD transmission order, processing the S_D circle, constructing the S_D evaluation library, or more generating programs, and 7 or more or more evaluating the SD processing order, executing the S_D verification program. The processing system can include SD processing elements, S_D evaluation elements, and connections to, multiple SD processing and/or multiple S_D evaluation elements - or more SD transmission subsystems may be used in addition to other configurations. S_D θθ circle, One or more locations may be set in each location. Locations can be associated with 'and' or more locations can be used for S_D assessment and/or verification procedures. SD assessment and/or verification procedures can be used to evaluate and / or verify the S_D transmission order, s_d BHlS_D program, elevation evaluation Library, S_D processing order or specific position used in the processing steps, or any combination of the above. Ding You Ris can have wafer data with its money, ^' crystal 31 data can include ί 2 wafer data can be S侃7 or N_S_D data. In addition, wafers include wafer reliability data and/or risk data. S_D wafers can have their associated location data, and the location data includes the number of locations required. 12 200903686 Number of visits, reliability data and/or risk data for one or more locations, franking data, transmission order data, processing related data or evaluation/verification related materials, or any combination of the above. The data can include one or more transmission order variables that can be used to construct the s_d 输 order order attribute. The S_D transmission order can be changed to 'optimize throughput, maximize processing element usage, maximize evaluation elements ^ use, as fast as possible Re-engineering bad wafers. Wafer data can include - or more processing order variables that can be used to create processing order attributes. S_D transfer changes to best Zhao energy, maximum domain size The most use, re-engineering bad wafers as quickly as possible, avoiding offline and/or failures - or more locations have been evaluated and/or verified to transfer wafers. Or S_D processing order can also use wafers (4) for each SD The processing sequence can be constructed under the various conditions described herein, and the second transmission-human sequence is constructed under the various conditions described herein. The number of locations required for each wafer, the need to process the SD processing component Quantity and S_D transmission, available
傳輸次序能加以建構。 人糸顧的載入讀，S_D 第序f能加以建構，並用以：在最短時 弟a曰囫上之第一個所需位置的信賴度資粗、^門侍到在 在f 一晶圓上之—或更多個所需位置的信賴度資料f =内得到 内”在第—晶圓上之全部所需位置的信賴f料、，短時間 2得到在-或更多個額外晶圓上之第一個'“署t紐時間 料、在最短時間内得到在一或更多個額外而 賴度資 需位置的信賴度資料、在最短時間内得到或更多個所 上之全部所需位置的信賴度資料、在最^二ϋ個額外晶圓 2晶圓上之第一個所需位置的信賴度資料第—組之 在第-組之全部晶圓上之—或更多個所 間内得到 在最短時間内得到在第—組之全部 ^的域度資料、或 度資料，或上述任何組合。 之王部所需位置的信賴 以·在最 在其他實施例中，S_D傳輸次序能加以建構，並用 13 200903686 短時間内得到望—曰 個額外晶圓的風料、在最短時間内得到一或更多 的風險資料，或上过、;壬^^最短時間内得到第-組之全部晶圓 用以：在最短時間二U二^卜，傳輸次序能加以建構，並 得到一或更多 —日日0的新晶圓資料、在最短時間内 —組之全部曰°的新晶圓貧料、或在最短時間内得到第 使用新晶圓資料，或上述任何組合。舉例而言，ί 及能得到及/_度資料 最短時^内::口:序二二^加以建立’並用以:在 更容袖減二弟&序用的風險純、在最短時間内得到-或 中之第-心if Ϊ風險資料、或在最短時間内得到第一程式庠 所有程序㈣風險資料，或上述任何組合。 ^實施例中，>s_d傳輸次序能加以建立，並用以：在 式庫^到第—程式庫相關資料、在最短時間内得到額外程 H資料、或在最短時間内得到第—程式庫之第一子集矛合 处1ς，所有&式庫相關資料’或上述任何組合。舉例而言， 月匕獲件S-D及/或N_s_D程式庫相關資料。The transmission order can be constructed. The load-reading of the person, S_D can be constructed and used to: the trustworthiness of the first required position on the shortest time brother, the waiter is on the f-wafer Above - or more of the required location of the reliability data f = within the "received" of all the required locations on the first wafer, short time 2 is obtained in - or more additional wafers The first one of the above-mentioned “receiving the time of the company, obtaining the reliability data of one or more additional resources in the shortest time, getting all the required information in the shortest time or more The reliability data of the location, the reliability data of the first required location on the 2nd additional wafer 2 wafers, the group on the entire wafer of the first group - or more Within the shortest time, the domain data, or the degree data of all the groups in the first group are obtained, or any combination thereof. The trust of the position required by the king is in the most other embodiments, the S_D transmission order can be constructed, and 13 200903686 can be used in a short time to obtain an additional wafer of wind, get one or the shortest time More risk data, or over, 壬^^ get the first group of all wafers in the shortest time: in the shortest time two U two ^ Bu, the transmission order can be constructed, and get one or more - New wafer data for day 0, new wafers in the shortest time - all in the group, or new wafer data in the shortest time, or any combination of the above. For example, ί and can get the shortest time and / / degree information ^:: mouth: order two two ^ to establish 'and used: in the more sleeves to reduce the second brother & the use of the risk pure, in the shortest time Get - or the first - heart if Ϊ risk data, or get the first program in the shortest time, all procedures (4) risk data, or any combination of the above. In the embodiment, the >s_d transmission order can be established and used to: obtain the additional H data in the shortest time in the library, to obtain the additional H data in the shortest time, or obtain the first library in the shortest time. The first subset of spears is 1 ς, all & library related materials' or any combination of the above. For example, the S-D and/or N_s_D library related information is obtained.
此外’ S-D傳輸次序能建立來傳輸晶圓至：—或更多個指定 70件及/或評估元件、—或更多個可湘的處理元件及/或評 ^件、至—或更多個「最佳」(“_en”)處理藉及/或評估元件、 /更多個低風險處理元件及/或評估元件、一或更多個高信賴度 處理兀件及/或評估元件。舉例而言，能使用S_D及/或泳S_D晶圓， 及/或勵處理元件，且能使㈣及/鑛D評 、在額外的實施例中’當一或更多個處理元件及/或評估元件無 法利用時，S-D傳輸次序能建立來用S_D傳輸次系統在一最短時 間内「延遲」及/或「儲存」晶圓；或當一或更多個處理元件及/ 或§平估元件無法用時’ S-D傳輸次序能建立來用S_D傳輸次系統 在一預定時間内「延遲」及/或「儲存」晶圓；或當一或更多個處 14 200903686 理兀件及/或評估it件在第一次系統中無法利用時，s ^建立來使用S-D傳輸次系統在最短時間内傳輸晶圓至 S-D傳輸次序亦能建立來傳輸該等受「延遲」及/ 的晶圓.在最短時間内至一或更多個處理元件及/或評估元件、子」 一或更多個剛才可利用（neWly_available)之處理元件及/社至 件、在-段時間後至-或更多個可利用處理元件及/或評估^疋 至一或更多個低風險處理元件及/或評估元件、或一 ^二 賴度處理元件及/或評估元件。 ’夕個间k 在其他額外的實施例中，S_D傳輸次序能建立來傳輸 及/或儲存」的晶圓：在最短時間内至一或更多個處理 ^ ，，件、至-或更多個剛才可利用之處理元件及/或評^ 件、在-段時’至-或更多個可糊處理元件及/或評估元 至一或更多個低風險處理元件及/或評估元件、或一或 賴度處理元件及/或評估元件。 夕個同仏 S-D傳輸次序能建立來傳輸晶圓至用以預先及/ 多個，統。舉例而言，在預先及/或事後處理期間%^ 付二D晶圓^•料’如晶圓剖面輪廓資料、晶圓厚度資料、二 度貝料或光學滅’或上述任恤合。當錯誤發生時，s = 次序在最短時_能建絲傳輸晶圓至—或更多健新改製次^ 統0 S-D傳輸次序能建立來：允許晶圓在其之上至少有 裝置時持續進行處理以最大化產能、允許操作員介人、允許主^ ^統介入或最小化崎描器次系統導致的延遲，或上述任何电 讀房系統不包括傳輸晶圓用的S_D傳輸次系統及/或處理 曰曰，用的S-D處理次系統。此外，現行廠房系統不包括 用及/或在晶圓處理完後將S_D晶圓資料從一次系統通訊到另一 糸統用的S-D程序。因晶圓製程導致的S_D變 曰 圓均句的’且S-D變化能包括處理室到處理室間的變二 15 200903686 時間、、，處理化學品及處理室隨時間之偏移。 _^特!^的尺寸大小縮小到65 11111節點以下時，正確的處理 變得更為重要，且更難㈣。S_D程序能用來更正 制限^且當有違反運舰騎，缝生警鈴財處糊題。产 十_Ιϊϊ據本發明之實施例，緣示處5里系統的例示性方塊圖。 I 、男、轭例中，處理系統忉〇包含系統控制器195、第一忾 影次系統no、掃描器次系統115、第二微影次系統12〇、 影次糸統125、熱處理處理次系統13〇、檢驗次***135、钱刻欠 糸統140、沉積次线145及重新改製次系統155。單—次 g、10、1丄5、120、125、130、135、140、145、150、155)繪示公所 說明之J施例中；然而，多重次系統亦能加以使用。舉例而言， 在某些實施例中，多重次系統⑽、115、12G、125、13Q、13°5、 140/ 145、150、155)可用於處理系統100中。此外，一或更多個 次系統(110、115、120、125、130、135、140、145、150、155) 能包^能用來執行一或更多個處理的一或更多個處理元件。 ^ f使用資料傳輸次系統1〇6,系統控制器195能連接到第—微 影統110、掃描器次系統115、第二微影次系統12〇、第三微 ，次系統125、熱處理處理次系統13〇、檢驗次系統135、蝕刻次 系統140、沉積次系統丨45、評估次系統150及重新改製次系統 155。舉例而言，第二微影次系統丨2〇能包括(浸潰後)清潔次系統 繪示）。 第一微影次系統110能連接Ilia到第一 S-D傳輸次系統1〇1， 且連接111b到第二S-D傳輸次系統102。掃描器次系統115能連 接116a到第一 S-D傳輸次系統101，且連接116b到第二S-D傳輸 次系統102。第二微影次系統能連接121a到第一 S-D傳輸次系統 101 ’且連接121b到第二S-D傳輸次糸統102。第三微影次系統 125能連接126a到第一 S-D傳輸次系統101，且連接126b到第二 S-D傳輸次系統1〇2。熱處理處理次系統130能連接nia到第— 16 200903686 S-D傳輸次系統101，且連接131b到第二s_D傳輸次系統。 檢驗次系統135能連接136a到第一 S-D傳輸次系統ιοί，且連接 136b到第一 S-D傳輸次系統1〇2。钱刻次系統14〇能連接i4ia到 第一 S-D傳輸次系統1〇1 ’且連接141b到第二S_D傳輸次系統 102。/儿積认糸統145此連接146a到第一 S-D傳輸次系統;[〇/，、且 連接146b到第二S-D傳輸次系統1 〇2。評估次系統i 5〇能連接丨5 i & 到第一 S-D傳輸次系統1〇1，且連接151b到第二S_D傳輸次系統 102。重新改製次系統155能連接156a到第一 S_D傳輸次系統 101 ’且連接156b到第二S-D傳輸次系統1〇2。或者，其他連接 配置能加以利用。 ^ 此外，第三傳輸次系統1〇3能連接到第一 S_D傳輸次系統 KU ’並連接到第：S-D傳輸次系統102；3第三傳輸次系統1〇3能 連接到其他傳輸系統及/或處理系統(未繪示）。舉例而言，傳輸系 統(1(Π :1〇2、1〇3)能使用連接到遞送元件1〇5的傳輸元件1〇4以 接收晶圓、傳輸晶圓、對準晶圓、儲存晶圓及/或延遲晶圓。或者， 其他傳輸裝置可加以使用。 次製造執行系統(MES，manufacturing execution system)180 利用 貢料傳輸次系統106能連接_統控制n 195。或者，可使用薇房 層=/或主機系統’並可使用其他連接技術。在替代的實施例中，In addition, the 'SD transfer order can be established to transfer wafers to: - or more than 70 designated and/or evaluation components, - or more of the processing elements and/or evaluations, to - or more "Best" ("_en") handles borrowing and/or evaluation components, / more low risk processing components and/or evaluation components, one or more high reliability processing components and/or evaluation components. For example, S_D and/or swimming S_D wafers, and/or excitation processing elements can be used, and (4) and/or mine D ratings can be used, in additional embodiments, when one or more processing elements and/or When the evaluation component is not available, the SD transmission sequence can be established to "delay" and/or "storage" the wafer in the shortest time with the S_D transmission subsystem; or when one or more processing elements and/or § evaluation components Unusable 'SD transmission order can be established to use the S_D transmission subsystem to "delay" and/or "storage" wafers for a predetermined period of time; or when one or more locations are 2009/2009 and/or evaluate it When the device is not available in the first system, the s ^ is established to use the SD transmission subsystem to transmit the wafer to the SD transmission sequence in the shortest time. The transmission sequence can also be established to transmit the "delayed" and / or the shortest. Time to one or more processing elements and/or evaluation elements, one or more of the neWly_available processing elements and/or social components, after a period of time to - or more Utilize processing elements and/or evaluations to one or more low risk processing elements And / or evaluation device, or a bum ^ of processing elements and / or evaluation device. In the other additional embodiments, the S_D transmission order can be established to transfer and/or store wafers: in the shortest time to one or more processes, parts, to-or more Processing elements and/or evaluations that have just been available, 'to-or more viscous processing elements and/or evaluation elements to one or more low-risk processing elements and/or evaluation elements, Or one or more processing elements and/or evaluation elements. The same S-D transmission order can be established to transfer the wafer to the pre-and/or multiple. For example, during the pre- and/or post-processing period, the % D wafers, such as wafer profile data, wafer thickness data, second-degree batten or optical extinction, or the above-mentioned shirts. When an error occurs, s = the order is at the shortest time _ can be used to build the wafer to - or more new modified system 0 system 0 SD transmission order can be established: allows the wafer to continue on at least the device above it Processing to maximize throughput, allow operators to intervene, allow master intervention or minimize delays caused by the sub-system, or any of the above-mentioned electrical reading systems do not include S_D transmission subsystems for transporting wafers and/or Or deal with 曰曰, using the SD processing subsystem. In addition, current plant systems do not include S-D procedures for communicating S_D wafer data from one system to another after wafer processing. The S_D change due to the wafer process and the S-D change can include the change from the processing chamber to the processing chamber, and the processing chemicals and the processing chamber are offset with time. When the size of _^ special!^ is reduced to below 65 11111, the correct processing becomes more important and more difficult (4). The S_D program can be used to correct the limit ^ and when there is a violation of the ship's ride, the seam is alarmed. Manufactured According to an embodiment of the present invention, an exemplary block diagram of the system at 5 is shown. In the I, male, and yoke examples, the processing system includes a system controller 195, a first shadow system no, a scanner subsystem 115, a second lithography system 12, a shadow system 125, and a heat treatment process. The system 13A, the inspection subsystem 135, the money system 140, the deposition secondary line 145, and the re-engineering subsystem 155. Single-time g, 10, 1, 5, 120, 125, 130, 135, 140, 145, 150, 155) are shown in the J example described by the public; however, multiple subsystems can also be used. For example, in some embodiments, multiple subsystems (10), 115, 12G, 125, 13Q, 13° 5, 140/145, 150, 155) may be used in processing system 100. Moreover, one or more secondary systems (110, 115, 120, 125, 130, 135, 140, 145, 150, 155) can include one or more processes that can be used to perform one or more processes. element. ^ f uses the data transmission subsystem 1〇6, the system controller 195 can be connected to the first lithography system 110, the scanner subsystem 115, the second lithography subsystem 12 〇, the third micro, the subsystem 125, the heat treatment The secondary system 13A, the inspection subsystem 135, the etching subsystem 140, the deposition subsystem 丨45, the evaluation subsystem 150, and the re-engineering subsystem 155. For example, the second lithography system can include (after impregnation) cleaning subsystems). The first lithography subsystem 110 can connect Ilia to the first S-D transmission subsystem 1〇1 and connect 111b to the second S-D transmission subsystem 102. Scanner subsystem 115 can connect 116a to first S-D transmission subsystem 101 and connection 116b to second S-D transmission subsystem 102. The second lithography subsystem can connect 121a to the first S-D transmission subsystem 101' and the connection 121b to the second S-D transmission subsystem 102. The third lithography subsystem 125 can connect 126a to the first S-D transmission subsystem 101 and connect 126b to the second S-D transmission subsystem 1〇2. The heat treatment processing subsystem 130 can connect the nia to the -16 200903686 S-D transmission subsystem 101 and connect 131b to the second s_D transmission subsystem. The inspection subsystem 135 can connect 136a to the first S-D transmission subsystem ιοί and connect 136b to the first S-D transmission subsystem 1〇2. The money engraving system 14 can connect i4ia to the first S-D transmission subsystem 1〇1' and connect 141b to the second S_D transmission subsystem 102. / 积 糸 145 145 this connection 146a to the first S-D transmission subsystem; [〇 /,, and connection 146b to the second S-D transmission subsystem 1 〇 2. The evaluation subsystem i 5〇 can connect 丨5 i & to the first S-D transmission subsystem 1〇1, and the connection 151b to the second S_D transmission subsystem 102. The remodeling subsystem 155 can connect 156a to the first S_D transmission subsystem 101' and connect 156b to the second S-D transmission subsystem 1〇2. Alternatively, other connection configurations can be utilized. ^ In addition, the third transmission subsystem 1〇3 can be connected to the first S_D transmission subsystem KU' and connected to the: SD transmission subsystem 102; 3 the third transmission subsystem 1〇3 can be connected to other transmission systems and/or Or processing system (not shown). For example, the transmission system (1:1〇2,1〇3) can use the transmission element 1〇4 connected to the delivery element 1〇5 to receive the wafer, transfer the wafer, align the wafer, store the crystal Round and / or delayed wafers. Alternatively, other transmission devices can be used. MES (manufacturing execution system) 180 can be used to connect n 195 with the tributary transmission subsystem 102. Alternatively, Weifang can be used. Layer = / or host system 'and other connection techniques may be used. In an alternative embodiment,
Ιΐ需ί —或更多個額外次系統。舉例而言，系統控制器195可 罢^^f*處理系統及/或次系統(未緣示）。或者，可使用其他配 置，並可使用其他連接技術。 饰-影次系統110能包含一或更多個處理元件112，該等處 =:連接_部傳輸裝置113及/或能連接lna到第—S_D傳 =人掃描器次系、统115能包含一或更多個處理元件 列埜件能連接到内部傳輸裝置118及/或能連接116a 夕袖幸理輸次系統101。第二微影次系統120能包含一或更 二122J該等處理元件能連接勒部傳輸裝置123及/ 5此 a到第一 S_D傳輪次系統101。第三微影次系統125 17 200903686 =包含一或更多個處理元件127，該等處理元件能連接到内部傳輸 裝置128及/或能連接126a到第一 S_D傳輸次系統m。熱處理處 理次系統130能包含一或更多個處理元件132，該等處理元件能連 接到内部傳輸裝置133及/或能連接131a到第一 S_D傳輸次系統 1〇1。仏驗次系統135能包含一或更多個評估元件137，該等 評估元件能連接到内部傳輸裝置138及/或能連接136a到第一 S_D 系統1。卜侧:欠_ 14。能包含—錢多個處理元件 y，該等處理元件142能連接到内部傳輸裝置143及/或能連接 夕^到第一 S-D傳輸次系統1〇1。沉積次系統145能包含一或更 元件147，處理元件能連接_部傳輸裝置148及域 2 ί _!4如到第一 S-D傳輸次系統101。評估次系統150能包含 個S_D膽元件152，該料估元件能連接助部傳輸 J J 153及/或能連接151a到第一 S_D傳輸次系統ι()ι。重新改製 先i55 %包含—或更？個處理元件157,該等處理元件能連接 置L58及/或能連接156a到第一 S_D傳輸次系統 /或放辦μ·*·理元件可祕次祕巾。處理元件能以串聯及 ^出、與广f? ’且能具有一或更多個輪入埠及/或一或更多個 ^及i其+他’處理元件可包括1具、模組、處理室、感應 ㈣ΐΐίίϊί中，次緖能包含額外傳輸裝置。第一微影次 2Γ連接11 lb到第二S_D傳輸次系統102的一或更 ίHi: 3 °掃描11次系統115能包含能連接到 的一或更多個内部傳輸裝置ιΐ8。第二微 ΐΐί'ίΐt能連接121b到第二抑傳輸次系統102的一 ‘夕到第:m置123/第三微影次系統125能包含能連接 198 # &一傳輸次系統102的一或更多個内部傳輸裝置 次系^系統130能包含能連接131b到第二S_D傳輸 含r遠拉· 乡細部傳輸裝置133。檢驗次彡統135能包 b 弟一 S-D傳輸次系統1〇2的一或更多個内部傳輸 18 200903686 裝置138。蝕刻次系統140能包含能連接141b到第二s_d 系統102的一或更多個内部傳輸裝置143。沉積次系^ ι 能連接離到第二S-D傳輸次系統！〇2的一或更多 =There is no need for ί — or more additional subsystems. For example, system controller 195 can handle the system and/or secondary system (not shown). Alternatively, other configurations can be used and other connection techniques can be used. The decoration-shadow system 110 can include one or more processing elements 112, such as: connection_partial transmission device 113 and/or connectable lna to the first-S_D transmission=human scanner sub-system, system 115 can contain One or more processing element columns can be connected to the internal transport device 118 and/or can be coupled to the 116a sleeving system. The second lithography subsystem 120 can include one or two 122Js of processing elements that can connect the Lexus transmission devices 123 and /5 to the first S_D transmission sub-system 101. The third lithography subsystem 125 17 200903686 = includes one or more processing elements 127 that can be coupled to the internal transmission device 128 and/or to the connection 126a to the first S_D transmission subsystem m. The heat treatment processing subsystem 130 can include one or more processing elements 132 that can be coupled to the internal transfer device 133 and/or to the connection 131a to the first S_D transfer subsystem 1〇1. The inspection subsystem 135 can include one or more evaluation components 137 that can be coupled to the internal transmission 138 and/or can be coupled 136a to the first S_D system 1. Side: owe _ 14. It is possible to include a plurality of processing elements y that can be connected to the internal transmission device 143 and/or can be connected to the first S-D transmission subsystem 1〇1. The deposition subsystem 145 can include one or more components 147 that can be coupled to the _transmission device 148 and the domain 2 ί _! 4 to the first S-D transmission subsystem 101. The evaluation subsystem 150 can include an S_D bile element 152 that can be coupled to the auxiliary unit to transmit J J 153 and/or to connect 151a to the first S_D transmission sub-system ι(). Re-engineering i5%% included—or more? Processing elements 157, which can be coupled to L58 and/or can be connected 156a to the first S_D transmission subsystem/or to the μ. The processing elements can be connected in series, in a wide range, and can have one or more wheel turns and/or one or more and i + he's processing elements can include one, module, In the processing room, sensing (four) ΐΐ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ ̄ The first lithography 2 Γ connects 11 lb to the second S_D transmission subsystem 102 for one or more HI: 3° scan 11 times the system 115 can include one or more internal transport devices ι 8 that can be connected. The second micro ΐΐ ' ' 能 能 能 能 能 能 能 能 能 能 能 能 能 能 能 能 能 能 / / / / / / / / / / / / / / / / / / / / / / / / / / / / / The or more internal transmission device subsystems 130 can include a connection 131b to a second S_D transmission including a remote transfer device 133. Verify that the secondary system 135 can package one or more internal transmissions of the S-D transmission subsystem 1〇18 200903686 Device 138. The etch subsystem 400 can include one or more internal transfer devices 143 that can connect 141b to the second s_d system 102. The deposition sub-system ^ ι can be connected to the second S-D transmission subsystem! One or more of 〇2 =
置148。評估次系統150能包含能連接151b到第二S_D 統102的-或更多個内部傳輪裝置153。重新改製次系統155能包 含能連接156b到第二S-D傳輸次系統！ 〇2的一或更多個内部 ，置158。或者’能使用其他連接配置。在某些實施射，任 1的傳輸裝置及/或傳輸次系統可用於系統中。傳輸裝置及/ 次系統能以串聯及/或並聯的方式連接，並能具有—個二 埠及/或一或更多個輸出埠。 刖 第一微影次系統110能包含一或更多個控制器114，該 器能1用資料傳輸次系統106而連接到系統控制器195及//或^他 控制器。掃描斋次糸統Π5能包含一或更多個控制器119，該等和 制态此利用資料傳輸次系統1〇6而連接到系統控制器195及/或豆 ，控制态。第二微影次系統12〇能包含一或更多個控制器124，該 #控制益此利用負料傳輸次系統而連接到系統控制器I%及/ 或”他巧制态。苐二微影次系統125能包含一或更多個控制器 129,該等控制器能利用資料傳輸次系統1〇6 = 195，其他控制器。熱處理處理次系統13Q能包二 控=态134，該等控制器能利用資料傳輸次系統1〇6連接到系統控 制，195及/或其他控制器。檢驗次系統135能包含一或更多個^ =器139,該等控制器能利用資料傳輸次系統1〇6連接到系 ^ =195及/或其他控制器。蝕刻次系統14〇能包含一或更多個^制 器144，該等控制器能利用資料傳輸次系統1〇6連接到系統控^器 =5及/$其他控制器。沉積次系統145能包含一或更多個控制^ ^ ’該等控制器能利用資料傳輸次系統1〇6連接到系統控制^ 及其他控制器。評估次系統15〇能包含一或更多個控制^ 該等控制益能利用資料傳輸次系統1 %連接到系統控制器 及/或其他控制器。重新改製次系統155能包含一或更多個& 19 200903686 等控制器能連接到系統控制器195及/或其他押制哭 接配置。在其他實施例中，任何數量的“°可 ^多個輸入埠及/或一或更多個輸出埠。舉例而言， 括位兀、16位元、％位元及/或64位元的處理器。^匕 ㈣、崎網路及有線及/或無線連接，次 系，-克(110、115、120、125、130、135、140、U5、15〇、 g連$ ’並能與其他裝置連接。控㈣⑽、119 ^相 139、:'149、154、心195)在必要時能相互連接。9134' 124 程序時’能使用一或更多個控制器(114、Η 9、 即時資料’以更新次系統、處理元件、處理、製) 料。如在此所述，-或更多個控制器(114、119、124: "、士 134、139、144、149、154、159、195)能利用即時資料爽勃 了7 S-D程序，並提供即時S_D資料 例中^ ίί ,/ΓΓ EqUipment C〇«cations Standard) =息、項取及/或移除S_D資訊、前授及/或回 ） Π9^2ΐ -ς-η 4- & 149、154、159、195)能利用即時資料來執 1 外，控制器（114、119、124、129、134、139、144、149、 r去終％、195)能包括所需之記憶體(未繪示）。舉例而令，纪t音體 未/會示)能用來儲存資訊與控制器(m、m、124、= 134 ^ 144、，154、159)準備要執行的指令’且在處理***1〇〇之各 執’記憶體可用來儲存臨時變數或其 5中間貝訊。-或更多個控制器⑽、119、124、129、134、139、 9、、⑼)或其他紐元件能包含用以從電腦可讀媒體 20 200903686 的膨规含職寫入触/或指令至電 及域=====二或容納在記憶體 本發明一部份或全部=理^此能執行 腦、電腦可讀媒體或網路連接來接收。Ά”可I另—電 儲存在任一個或任何組合的電腦 體，該軟體用以控制處理季统、用的本發明包括軟 巧置及用以促使處理系統！⑻與人類使 么 ^但不限制於裝置驅動程式、作業系統、開發工具及 匕二般電腦可讀媒體更包括本發明之電腦程式產品，該電ς 王式ΐίίϊ執彳7全部或部分(若分散_的處理來實施本發明。 此處，及之「電腦可讀媒體」（“c〇mpute而daWemediu 與處理器之執行的媒體。電腦可讀媒體可以 媒^ Γ式王見’匕括但不党限於不變性媒體、依電性媒體及傳輸 a 次系統(110、115、120、125、130、135、140、145、150、155) ，包含處理J1具(糖示）。在某些實施财，—整合系統利 f力科創股份有限公司(Tokyo Electron Limited, TEL)的系統元件 能進行配置。在其他實施例中，可包括外部次系統及/或工具。處 理工具及/或處理元件能包括一或更多之蝕刻工具、沉積工具、原 子層沉積(ALD，atomic layer deposition)工具、量測工具、游離化工 具、拋光工具、塗布工具、顯影工具、清潔工具、曝光工具及熱 處理工具。此外，能夠提供的量測工具能包括臨界尺寸掃描電子 顯微(CDSEM，CD-Scanning Electron Microscopy)工具、透射電子顯 微(TEM，Transmission Electron Microscopy)工具、聚焦離子束(fib focused ion beam)工具、光學數位測定（〇DP, Optical DigitalSet 148. The evaluation subsystem 150 can include - or more internal transfer devices 153 that can connect 151b to the second S_D system 102. The re-engineering subsystem 155 can include a connection system 156b to the second S-D transmission subsystem! One or more of the interiors of 〇2, set 158. Or 'can use other connection configurations. In some implementations, any of the transmission devices and/or transmission subsystems can be used in the system. The transmission device and/or the secondary system can be connected in series and/or in parallel and can have one and/or one or more output ports. The first lithography subsystem 110 can include one or more controllers 114 that can be coupled to the system controller 195 and/or the controller by the data transmission subsystem 106. The scanning system 5 can include one or more controllers 119 that are coupled to the system controller 195 and/or the bean control state using the data transmission subsystems 〇6. The second lithography subsystem 12 can include one or more controllers 124 that are connected to the system controller I% and/or "he is in a state of mind" using a negative transmission secondary system. The shadow system 125 can include one or more controllers 129 that can utilize the data transmission subsystem 1 〇 6 = 195, other controllers. The heat treatment processing subsystem 13Q can include two control states 134, such The controller can be coupled to system control, 195 and/or other controllers by means of a data transfer subsystem 1〇 6. The inspection subsystem 135 can include one or more ^= 139s that can utilize the data transfer subsystem 1〇6 is connected to the system ^=195 and/or other controllers. The etching subsystem 14 can include one or more controllers 144 that can be connected to the system control using the data transmission subsystem 1〇6 ^器=5 and /$Other controllers. The deposition subsystem 145 can contain one or more controls ^ ^ 'The controllers can be connected to the system control ^ and other controllers using the data transfer subsystem 1〇6. Sub-system 15〇 can contain one or more controls ^ These control benefits can be used to transmit data The system 1 is connected to the system controller and/or other controllers. The re-engineering subsystem 155 can include one or more & 19 200903686 controllers can be connected to the system controller 195 and/or other forced crying configurations In other embodiments, any number of "° may be multiple inputs" and/or one or more output ports. For example, a processor with bits, 16 bits, % bits, and/or 64 bits. ^匕(4), Saki network and wired and / or wireless connection, sub-system, - gram (110, 115, 120, 125, 130, 135, 140, U5, 15 〇, g even $ ' and can be connected with other devices Control (4) (10), 119 ^ phase 139,: '149, 154, heart 195) can be connected to each other when necessary. 9134' 124 Programs can use one or more controllers (114, Η 9, real-time data) to update subsystems, processing components, processing, manufacturing. As described herein, - or more controllers (114, 119, 124: ", 134, 139, 144, 149, 154, 159, 195) can utilize the instant data to refresh the 7 SD program, and Provide instant S_D data in the case of ^ ίί , /ΓΓ EqUipment C〇 «cations Standard) = information, items to take and / or remove S_D information, pre-grant and / or back) Π9^2ΐ -ς-η 4- & 149 , 154, 159, 195) can use the real-time data to perform, the controller (114, 119, 124, 129, 134, 139, 144, 149, r to the end%, 195) can include the required memory ( Not shown). For example, the t sound body is not/shown) can be used to store information and controllers (m, m, 124, = 134 ^ 144, 154, 159) to prepare the instructions to be executed 'and in the processing system 1〇 Each of the 'memory' can be used to store temporary variables or its 5 intermediate. - or more controllers (10), 119, 124, 129, 134, 139, 9, (9)) or other button elements can include write instructions or instructions for use from the computer readable medium 20 200903686 To the power and domain ===== two or accommodated in the memory Some or all of the invention can be executed by brain, computer readable media or network connection. Ά 可 可 可 可 可 另 另 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电 电The device driver, the operating system, the development tool, and the second computer-readable medium further include the computer program product of the present invention, which is implemented in whole or in part (if distributed) to implement the present invention. Here, and "computer-readable media" ("c〇mpute and daWemediu and the processor's execution of the media. Computer-readable media can be media-like Wang see" but not limited to the invariant media, according to electricity Sexual media and transmission a sub-system (110, 115, 120, 125, 130, 135, 140, 145, 150, 155), including processing J1 (sugar display). In some implementations, the integration system benefits System components of Tokyo Electron Limited (TEL) can be configured. In other embodiments, external subsystems and/or tools can be included. Processing tools and/or processing elements can include one or more etches Tools, deposition tools Atomic layer deposition (ALD) tools, measurement tools, release tools, polishing tools, coating tools, development tools, cleaning tools, exposure tools, and heat treatment tools. In addition, measurement tools can be provided to include critical dimensions. Scanning Electron Microscopy (CDSEM, CD-Scanning Electron Microscopy) Tool, Transmission Electron Microscopy (TEM) Tool, Focused Ion Beam (fib), Optical Digital Measurement (〇DP, Optical Digital)
Profllometry)工具、原子力顯微鏡（AFM，Atomic Force Microscope) 工具或另外光學量測工具。次系統及/或處理元件能具有不同介面 21 200903686 需求丄且控制器能用以献這些不同介面需求。 】sn、^ίί 多個次系統⑽、115、120'125、130、135、140、145、 T . ' 包含控制元件、圖形使用者介面(GUI, Graphical User ϋΤ二I牛ϋ或資料庫元件(未緣示〕。舉例而言，GUI元件(未 簡祕作介面，讓使用者^檢視狀態；新建/檢視/ 始丨产、次j ^性及非位置相依性之程序、策略、計晝、錯誤、 ®早蕾iH、規範、製程配方、模式應㊉、模擬及/或試算表應 ^牛矾息及診斷螢幕。如同習知本技藝者所應明白的， 而要為所有功能提供介面，而可提供介面給這些功能 的任何子集功能或其他未列於此的功能。 一或更多個控制器（114、119、124、129、134、139、144、149、 154、159、195)及/或系統控制器195能連接到資料傳齡統196， 以MES 180及其他次系統交換資訊。資料傳輸充丄 固線與無線元件。 次系統(110、115、120、125、130、135、140、145、150、155)、 控制器（114、119、124、129、134、139、144、149、154、159) 及/或系統控制器195能包括先進製程控制⑽^她繼此沉哪 C〇ntr〇1)的應用、故障偵測與分類(FDC, Fault Detection and glassification)及/或批次間控制(R2R，Run_t〇_Run)的應用。在某些 貫施例中’ S-D APC應用、S-D FDC應用及/或S-D R2R應用能加 以執行。 在某些實施例中’一或更多個控制器(114、119、124、129、Profllometry) tools, Atomic Force Microscope (AFM) tools or additional optical metrology tools. The subsystems and/or processing components can have different interfaces 21 200903686 and the controller can be used to address these different interface requirements. 】sn, ^ίί multiple subsystems (10), 115, 120'125, 130, 135, 140, 145, T. ' Contains control elements, graphical user interface (GUI, Graphical User I 二I ϋ or database components (not shown). For example, the GUI component (not a simple interface, let the user ^ view state; new / view / start production, sub-j ^ and non-location dependencies procedures, strategies, planning , error, ® early lei iH, specification, process recipe, mode should be ten, simulation and / or spreadsheet should be suffocating and diagnostic screen. As the art knows, it should be understood for all functions. And may provide an interface to any subset of these functions or other functions not listed herein. One or more controllers (114, 119, 124, 129, 134, 139, 144, 149, 154, 159, 195) and/or system controller 195 can be connected to data ageing system 196 to exchange information with MES 180 and other secondary systems. Data transmission is filled with tamping lines and wireless components. Sub-system (110, 115, 120, 125, 130) , 135, 140, 145, 150, 155), controller (114, 119, 124, 129, 134, 139, 144 149, 154, 159) and / or system controller 195 can include advanced process control (10) ^ her application, fault detection and classification (FDC, Fault Detection and Glassification) and / or Application of inter-batch control (R2R, Run_t〇_Run). In some embodiments, 'SD APC applications, SD FDC applications and/or SD R2R applications can be implemented. In some embodiments 'one or more Multiple controllers (114, 119, 124, 129,
134、139、144、149、154、159)能執行 S-D 處理最佳化程序、S_D 模型最佳化私序’或能執行S-D程式庫最佳化程序或上述任何组 合。S-D最佳化程序能使用晶圓資料、模型、製程配方、剖面輪 廓資料’以更新及/或最佳化一程序。舉例而言，S_D最佳化程序 能即時操作。藉由使用即時S-D最佳化，能達成更多正確處理結 果。在低於65 nm節點的較小幾何技術中，需要更正確的處理結 果0 22 200903686 能影響製程配方、剖面輪廓、模型及/或處理結果之材料及/ 或處理的變化能夠產生改變，此係晶圓中之位置與位置間、晶圓 與晶圓間及批貨與批貨間的改變。這些變化能由一或更多個次系 統(110、115、120、125、130、135、140、145、150、155)之改變 及/或問題所導致。非均勻薄膜及/或非均勻處理能導致問題。此 外，工具與工具間的變化、處理室與處理室間的變化及處理室的 偏移能隨時間增加而導致問題。在蝕刻處理期間’因為使用終點 才曰示(end pointing)及犧牲薄膜(sacriflciai祉⑽)來控制底部臨界尺 寸的本貝，尽度及/或均勻性能在晶圓内位置與位置間、晶圓與晶 圓間及批貨與批貨間改變。此外，厚度的變化能導致光學屬性盥 其他物理屬性的改變。S_D程序能用來消除或最小化^度姓刻' (“over-etching”)所導致的問題。 源自S-D程序的輸出資料及/或訊息能用於後續程序中，以最 佳化處理之正確性與精密性。作為即時變數參數的資料能即時傳 送給S-D計算程序，，覆蓋現行模型預設值，並縮小搜尋空間來 ，成正確結果。為了最佳化一程序，資訊能與程式庫為主之系統 或在即時回歸步驟中，或上述任何組合一同使用。 如134, 139, 144, 149, 154, 159) can perform S-D processing optimization procedures, S_D model optimization private order' or can execute S-D library optimization program or any combination of the above. The S-D optimization program can use wafer data, models, process recipes, profile profile data to update and/or optimize a program. For example, the S_D optimization program can operate instantly. By using instant S-D optimization, more correct processing results can be achieved. In smaller geometries below the 65 nm node, more accurate processing results are needed. 0 22 200903686 Materials and/or processing changes that can affect process recipes, profile profiles, models, and/or processing results can change. Changes in position and position between wafers, between wafers and wafers, and between batches and shipments. These changes can be caused by changes and/or problems with one or more subsystems (110, 115, 120, 125, 130, 135, 140, 145, 150, 155). Non-uniform films and/or non-uniform processing can cause problems. In addition, changes between tools and tools, changes between the process chamber and the process chamber, and offsets in the process chamber can cause problems over time. During the etching process, 'end pointing' and sacrificial film (sacriflciai(10)) are used to control the bottom critical dimension of the bottom, and the end and/or uniform performance is between the position and position of the wafer, the wafer. Change from inter-wafer and between batch and delivery. In addition, variations in thickness can result in changes in optical properties and other physical properties. The S_D program can be used to eliminate or minimize problems caused by "over-etching". Output data and/or messages from the S-D program can be used in subsequent procedures to optimize the correctness and precision of the processing. The data as an instantaneous variable parameter can be immediately transmitted to the S-D calculation program, overwriting the current model preset value, and narrowing the search space to become a correct result. To optimize a program, the information can be used with a library-based system or in an instant regression step, or any combination of the above. Such as
. 13υ之汗估\系統能包括整合光學數位測定（i0DP mtegrated Optical Digital Profiling)系統(未繪示）。或者 ’The 13 υ sweat estimation system can include an integrated optical digital measurement (i0DP integrated optical Digital Profiling) system (not shown). Or ’
他置測系統。lODP 工具可從 Timbre Techn〇1〇gies Inc“一間 tel 的公司）獲得。舉例而言’ QDP _可絲得到臨界尺 crmcal dmiensicm)資訊、結構剖面輪廓資訊或通孔資訊，且i〇Dp t之波長f ®能從少於約2GGnm涵蓋到大於約_麵。例示性 kof—，匕，括ς〇〇Ρ測定器程式庫、測定器應用伺服器(PAS， =含光譜及其對應之铸體勤輪廓、臨界財與 至少—連接到光學儀器與電腦網路連接 ΐ Γ ^處+通訊、01)1>程式庫操作、量測處理、結果 產生、、、、。果分析與結果輪出。0DP測定器軟體包括安震在撕之 23 200903686 軟體，用來管理量測製程配方、〇Dp測定器程式庫、〇Dp測定器 負料、ODP測疋器結果之檢索/配對、〇DP測定器結果之計管/分 析、資料通訊及PAS與各式量測工具與電腦網路的介面。 如150之評估次系統能使用偏振反射量測術⑦〇larizing reflectometry)、橢圓偏光量測術(spectrosc〇pic ellips〇m_)、反射 量測術或其他光學量測技術來測量正確裝置剖面輪廓、正確臨界 尺寸及晶圓多層膜厚。整合量測處理(i0DP)能在線上執行，如此 消除了打斷晶圓處理來分析或長時等待源自外部工且之資料的必 要。ODP技術能與既有薄膜量測工具一同使用，用以做線上剖面 輪廓與臨界尺寸的量測，且能與TEL的處理工具及/或微影系統整 合，以提供即時處理的監視與控制。一例示性光學量測系統描述 於頒證於2005年9月13日之美國專利第6,943,9〇〇號，其發明名 稱為「週期式格柵板繞射信號之資料庫產生」（“Generati〇n # & ^rary of periodic grating diffraction signal”)，發明人為 Nui 等人， 其全部内容在此併入作為參考。 ’ 、 .二用來產生模擬繞射信號之S-D程式庫的替代程序能包括使 ，機斋學習系統(MLS，machine leaming system)。在產生模擬繞射 減的程式庫之前’ MLS使用已知的輸人與輸出資料來訓練。在 一例示性實施例中，模擬繞射信號能使用一採用機器學習演管法 的機器學習系統來產生，該機器學f演算法諸如反向傳播^向 基底函數、支撐向量、核迴歸及其他類似演算法。欲知機器學習 系統及其演算法的更詳細描述，參見1999年抱^版、 ^mionHaykin所著的「神經網絡」（“NeuralNetw〇rks，，），其全部内 谷在此併入作為參考；亦參見於2〇〇3年6月27日提出申靖之美 國專辦請案第1獅8，·號，其發明名稱為「形成於半導體上 結構之使用機器學習系、统的光學量測」（〇ptical metiO_ d structures formed on semiconductor wafers using machine learning systems) ’其全部内容在此併入作為參考。 名人知里測模型最佳化的詳細描述，則參考：於2002年6月27 24 200903686 曰提出申請之美國專利申請案第10/206,491號，其發明名稱為「光 學量測用之最佳化的模型與參數選擇」（0ptimized m()dd' and parameter selection for optical metrology)，發明人為 Vu〇ng 等人； 於2004年9月21日提出申請之美國專利申請案第10/946,729號， 其發明名稱為「目標導向之光學量測模型最佳化」（〇pticUai metrology model optimization based on goals)，發明人為 Vu〇 等 人，及於2004年4月27日提出申請之美國專利申請安篦 11/061,303號，其發明名稱為「重複結構之光學量測最佳: (Optical metrology optimization for repetitive structures)，發明人 1 Vuong等人；所有内容在此併入作為參考。 x '、、 ，訪料主的處辦，從圖案化結構測量出之所 射“號能無擬繞射信舰比較。基魏組的剖 ^ 算而產生，以達到剖面輪摩=組ί-ί ^值’而產生與·量之繞射錢轉下最接近之模擬适射ί ，欲知^歸為主之處理的詳細描述，參見頒證於2()()4 =之吴國專利第6,785,638號，其發明 f生過程㈣態學f之方法與⑽」_d由=== dynamic learning through a regression-based library generation pr〇cess)，全部内容在此併入作為參考。 —g eratoiHe placed the test system. The lODP tool is available from Timbre Techn〇1〇gies Inc., a tel company. For example, 'QDP _ can get crmcal dmiensicm' information, structural profile information or through-hole information, and i〇Dp t The wavelength f ® can cover from less than about 2 GGnm to more than about _ face. Exemplary kof-, 匕, ς〇〇Ρ ς〇〇Ρ ς〇〇Ρ ς〇〇Ρ 、, 器 器 server (PAS, = containing spectrum and its corresponding casting Physical and mental contours, critical wealth and at least—connected to optical instruments and computer network connections ΐ 处 ^ at + communication, 01) 1> library operation, measurement processing, result generation, , , , fruit analysis and result rotation The 0DP analyzer software includes An Zhen in tearing 23 200903686 software for managing the measurement process recipe, 〇Dp measuring instrument library, 〇Dp measuring device negative material, ODP measuring device result retrieval/pairing, 〇DP determination The results of the calculation / analysis, data communication and PAS and various measurement tools and computer network interface. Such as the evaluation system of 150 can use the polarization reflectometry 7 〇 larizing reflectometry), ellipsometry ( Spectrosc〇pic ellips〇m_) , reflectometry or other optical metrology techniques to measure the correct device profile, correct critical dimensions, and multilayer film thickness. Integrated measurement processing (i0DP) can be performed on-line, eliminating the need to interrupt wafer processing for analysis Or long-term waiting for information from external work. ODP technology can be used with existing film measuring tools to measure line profile and critical dimensions, and can be used with TEL processing tools and / or The lithography system is integrated to provide real-time monitoring and control. An exemplary optical measurement system is described in U.S. Patent No. 6,943,9, issued on September 13, 2005, entitled "Cyclic ("Generati〇n # & ^rary of nuclear grating diffraction signal"), the inventor of Nui et al., the entire disclosure of which is incorporated herein by reference. An alternative to the S-D library used to generate the simulated diffracted signal can include a machine leaming system (MLS). Before the library that produces the simulated diffractive subtraction, the MLS uses known input and output data to train. In an exemplary embodiment, the simulated diffracted signal can be generated using a machine learning system using machine learning trajectories such as backpropagation, basis vectors, support vectors, kernel regression, and others. Similar algorithm. For a more detailed description of the machine learning system and its algorithms, see "Nerural Netw〇rks," by "mionHaykin", 1999, which is incorporated herein by reference. See also the 1st Lions No. 8 of the US Special Appeal for Shen Jing on June 27, 2003. The invention title is "Optical Measurement of the Machine Learning System and System Used in Semiconductor Structures" (〇ptical metiO_d structures formed on semiconductor wafers using machine learning systems) 'the entire contents of which are incorporated herein by reference. For a detailed description of the optimization of the celebrity model, refer to the U.S. Patent Application Serial No. 10/206,491, filed on Jun. 27, 2002, the entire disclosure of which is incorporated herein by reference. U.S. Patent Application Serial No. 10/946,729, filed on Sep. 21, 2004, the disclosure of which is hereby incorporated by reference. The name is "pticUai metrology model optimization based on goals", the inventor is Vu〇 et al., and the US patent application filed on April 27, 2004, Ampoule 11/ No. 061,303, entitled "Optical metrology optimization for repetitive structures", inventor 1 Vuong et al; all of which is incorporated herein by reference. x ', , , The office, measured from the patterned structure, can be compared with the number of non-circular letters. The basic Wei group is generated by the calculation of the section, so as to achieve the section wheel friction = group ί-ί ^ value, and the amount of the diffraction of the amount is the closest to the simulation. For a detailed description, see the award of 2 () () 4 = Wu Guo patent No. 6,785,638, the invention of the process of f (four) state f method and (10)"_d by === dynamic learning through a regression-based library Generation pr〇cess), the entire contents of which are incorporated herein by reference. —g eratoi
氺與旦、日欠丄丨Y丄士 座生及/或加強光學I測資料程式座。 ===:==應二 數組的程式庫，描二證 =年= •action Signal，，)，發明人為 Nui 等人' ί考。迴歸粒⑽蝴物㈣i 25 200903686 154 ' 119'124'129'134'139'^ 149 . ί:作為;策略、控制計晝、控制模型及/或製程配方管 ^ 多重處理步驟，且能用來分析即時及域所4 讲=乂料建立錯誤狀況。當脈絡情境符合時，能執行S-D ^ ίΪί資分析程序綱，能執行—或更多個分析計晝。 料收集計晝及/或分析計‘“ j，t/7· 貝料，或因為Μ程序失效而拒絕資料。舉例 °動，S_D脈絡情境配對允許各位置的客製化配置。 在-^施例中，S-D程序失效可能不會終結該奶程 在限時’ S①程序能表示為失效。成功的沾 %序此在迫近極限時產生警告訊息。S_D程序錯誤之 動能儲存在-資料庫中，並當錯誤發生時，能從該^料庫 在某些貫施例中，一或更多個次系統(110、115、120、125 130、135、140、145、150、155)，能使用透過資 、 而接收的S-D資料來執行S_D程序。 糊Ή 196 當在處理系統中處理一 25個晶圓的批次時，可藉由提 個平，的處理路徑來增進處理量，但這是不實際的。3然而厂s_d 處理系統100能用來有效率且具成本效益地處理一或 晶圓的批次。此外，S-D處理系統能用來有效率且呈成 處理較小及/或較大的晶圓批次。 傳輸次系統(101、102、103)及傳輪裝置(113、118、123、 133、138、143、148、153、158)能使用S_D傳輸次序及/或程來 有效率且具成本效益地在一或更多個晶圓批次之中傳輪、對準、 延遲及/或儲存-或更多個晶圓。部分S-D程序能是晶圓相依性 的、批次相依性的及/或產品相依性的程序。 26 200903686 處理f株系統U。能包含—或更多個處理树112,而該等 ί ίίΓ^Γί非S_D程序，係能處理、測量、檢氺 旦 、 日 日 日 日 日 丄丨 丄丨 丄丨 丄丨 及 及 及 及 及 及 及 及 及 及 及 及 及===:== should be two arrays of libraries, depicting two certificates = year = • action Signal,,), the inventor Nui et al. Regression Grain (10) Butterfly (4) i 25 200903686 154 ' 119'124'129'134'139'^ 149 . ί: as a strategy, control plan, control model and / or process recipe tube ^ multiple processing steps, and can be used Analyze the real-time and domain 4 乂 = 建立 establishment error status. When the context is met, the S-D ^ ^ 分析 analysis program can be executed, and more than one analysis can be performed. Material collection and/or analysis meter ''j, t/7· bedding material, or rejected data due to Μ program failure. For example, S_D context matching allows for customized configuration of each location. In the example, the failure of the SD program may not end the milk process in the time limit. The S1 program can be indicated as invalid. The successful smear sequence generates a warning message when the limit is reached. The stimuli of the S_D program error are stored in the database, and When an error occurs, it can be used from the library. In some embodiments, one or more subsystems (110, 115, 120, 125 130, 135, 140, 145, 150, 155) can be used. And receive the SD data to execute the S_D program. Paste 196 When processing a batch of 25 wafers in the processing system, the processing amount can be increased by raising a flat processing path, but this is not Practical. 3 However, the factory s_d processing system 100 can be used to efficiently and cost-effectively process batches of one or wafer. In addition, SD processing systems can be used to be efficient and process small and/or larger. Wafer batch. Transmission subsystem (101, 102, 103) and transfer device (113, 118) , 123, 133, 138, 143, 148, 153, 158) can use the S_D transmission sequence and/or process to efficiently, cost-effectively pass, align, or align among one or more wafer lots Delay and/or storage - or more wafers. Some SD programs can be wafer dependent, batch dependent, and/or product dependent. 26 200903686 Processing f strain system U. Can contain - or More processing trees 112, and these ί ίίΓ^Γί non-S_D programs can process, measure, and check
程序，ί輸更晶圓。藉使用s-D程序及/或非S-D 輸次系統“能傳夂輸次系統101及/或第二S_D傳 圓。在羊此每力〜專f f里、板驗、對準及/或儲存一或更多個晶 理元件Ϊι7貝&歹’，第一微影次系統110能包含一或更多個處 传等處理元件藉使用s韻序及/或非s_d程序， 多個晶圓執行塗布程序、熱處理程序、量測程序、 ir严:準程序及/或儲存程序。舉例而言，-或更多理 inc a2 f 1來沉積—或更多個能包括光阻材料及/或抗反射塗層 =coating麵的幕罩層，且一或更多個處理元 j來熱處理(烘烤)一或更多個幕罩層。此外，一或更多個 件112能用來測量及/或檢驗一或更多個幕罩層。S-D程序 或非S-D程序能用來測量及/或檢驗一 晶 個控制器m能執行S_D程序及/或非s姆^，固=定曰 sum，·要重新改製程序。内部傳^置 傳r右伽傳曰輸认系統101及/或第二S_D傳輸次系統102能 傅輸一有缺陷之晶圓到重新改製次系統。 執行ίί，實Π，第—微影次系統11G能包含-或更多個能 ίίίΐΐ 處理的處理元件112。—或更多個處理元件⑴ 能的：i ’如此能提供較低的缺陷率及最小化可 木。—妓多個處理元件112能包含空浮粒子計數哭，該 粒子計數器能建立在晶圓路徑及/或在臨界處理區域，以監 度。警告及/或警鈴狀況能建立有偵測程度。舉例ς 、:廷二處理能包括「不潔」（“崎，，)烘烤處理，如此讓 其餘ί統中隔離出來。此外，-或更多個;新ΐ 衣％序可猎由處理從其他次系統隔離出的元件來執行。 掃描器次系統115能包含一或更多個處理元件117， 里兀件藉使用S_D程序及/或非S_D程序，係能處理、測量、^處 27 200903686Program, ί loses more wafers. By using the sD program and/or the non-SD input system, the system can transmit the system 101 and/or the second S_D. In the sheep, each force, board, alignment, and/or storage More of the crystallographic components Ϊι7 贝 & 歹 ', the first lithography subsystem 110 can include one or more processing elements such as transfer by using s rhyme and/or non-s_d program, multiple wafers are coated Procedure, heat treatment procedure, measurement procedure, ir strict: quasi-procedure and/or storage procedure. For example, - or more, inc a2 f 1 to deposit - or more can include photoresist materials and / or anti-reflection Coating = masking layer of the coating surface, and one or more processing elements j to heat treat (bake) one or more mask layers. Additionally, one or more of the pieces 112 can be used to measure and/or Examine one or more mask layers. SD programs or non-SD programs can be used to measure and/or verify that a crystal controller m can execute S_D programs and/or non-sm ^, solid = fixed 曰 sum, · Re-structuring the program. The internal transfer r right gamma transmission system 101 and/or the second S_D transmission subsystem 102 can transfer a defective wafer to the re-engineering subsystem. Execution, in particular, the lithography subsystem 11G can include - or more processing elements 112 that can be processed. - or more processing elements (1) capable: i' can provide a lower defect rate And minimizing the wood. - The plurality of processing elements 112 can contain empty floating particle counts crying, the particle counter can be established in the wafer path and/or in the critical processing area for monitoring. Warning and / or alarm conditions can The degree of detection is established. For example, the treatment of Ting Er can include “unclean” (“Saki,”) baking treatment, so that the rest can be isolated. In addition, - or more; Hunting can be performed by processing components that are isolated from other subsystems. The scanner subsystem 115 can include one or more processing components 117 that can be processed and measured using S_D programs and/or non-S_D programs. , ^ at 27 200903686
，準及/或儲存-或更多個晶圓。藉使用S_D程序 Ϊ二，裝置118、第，傳輸次系統101及:第s S 日日囫在某些實施例中，掃描器次系'统115能包含% 理^件〗Π，、而該等處理元件藉使用S_D程序及=處 或更多個晶圓執行曝絲序、熱處理程序、乾烊^序’、 ^序、檢驗程序、對準程序 f『乾=序、 處理次序中，掃描器次系統115能用來執行r是他 (BUX e：feme ul.avio,^〇 料的材料及/或抗反射ί層ί 2 一或更多個處理元件112能欲來測量及/或 或檢驗-ί更多非S_D程序能用來測量及/ 二，確處理，或是否需要 次錢102能傳輸不良晶圓到重新改製次系統。 理元件藉= 包含一或更多個處理元件112,該等處 對準及/1儲存或非S_D程序，係能處理、測量、檢驗、 序，内固/曰圓。藉使用s七程序及/或非s-d程 次系統102能‘軒、’丨旦苐於傳輸次系統101及/或第二傳輸 在苹此别’、里、檢驗、對準及/或儲存一或更多個晶圓。 St中’第二微影次系，統120能包含一或更多個處理元 一或更多個ί ^讀藉使用S.D程序及/或非S-D程序，係能對 序、ίίίτί!1行清潔程序、熱處理程序、量測程序、檢驗程 能用來執二浸舉例而言’ 一或更多個處理元件122 熱處理(乾彈)二、3,程序，且一或更多個處理元件122能用來 诛）或更多個晶圓。此外，一或更多個處理元件122能 28 200903686 用來測量及/或檢驗一或更多切 f及/或非沾程序能用來測量^晶圓。S-D程 製次系統。 g人糸、先02此傳輸不良晶圓到重新改 127 驗、對準及/或儲存-或更多=圓=吏序用’, and/or store - or more wafers. By using the S_D program, the device 118, the first transmission sub-system 101, and the s s day, in some embodiments, the scanner sub-system 115 can include the % device, and the The processing component performs the exposure sequence, the heat treatment process, the dry sequence, the sequence, the inspection program, the alignment program f, the dry sequence, the processing sequence, the scan by using the S_D program and the = or more wafers. The subsystem system 115 can be used to perform r (BUX e: feme ul.avio, material and/or anti-reflection layer 2) one or more processing elements 112 can be measured and/or Verify that - more non-S_D programs can be used to measure and /, do, or require the second money 102 to transfer bad wafers to re-engineer the secondary system. The component borrows = contains one or more processing elements 112, These alignments and /1 storage or non-S_D procedures can be processed, measured, inspected, sequenced, internally fixed / rounded. By using the s seven program and / or non-sd program system 102 can 'xuan, '丨Once in the transmission subsystem 101 and/or the second transmission, inspect, align, and/or store one or more wafers. The second lithography system, the system 120 can contain one or more processing elements, one or more ί. Using the SD program and/or the non-SD program, the system can be used to sequence, ίίίίί, 1 line cleaning program, heat treatment program. The measurement procedure, the inspection procedure can be used to perform the dip immersion example 'one or more processing elements 122 heat treatment (dry bomb) 2, 3, the program, and one or more processing elements 122 can be used for 诛) Or more wafers. In addition, one or more processing elements 122 can be used to measure and/or verify that one or more cuts and/or non-stick processes can be used to measure the wafer. S-D process system. g people, first 02 to transfer bad wafers to re-test, alignment and / or storage - or more = circle = order used
程序，内部傳輸裝置128、第_ ^ 私序及/或非S-DProgram, internal transmission device 128, _ ^ private sequence and / or non-S-D
傳輸次系統U)2能.^ 傳輸次系、统101及/或第二S-D 該曰等處理元“二 _序%+ifiaBI執订顯影程序、熱處理程序、測量程序、檢 的圖案化幕罩層，丄光阻材料及/或抗反射塗層材料 -或更多個圖i化篡ΐΐ更夕個處理70件127能用來熱處理(烘烤） 贿幕罩層。此外，—或更多個處理元件127能用 及/或檢驗-或更多個圖案化幕罩層。S_D程序及/或非沾 1;二來或檢驗一或更多個晶圓。一或更多個控制器 地卢‘ 2 3王序及/或非S_D程序’以決定晶圓*否已經正確 =理，或疋否需要重新改製程序。内部傳輸裝置128、第一 s_d 及/或第二S.D傳輪次系統102能傳輸不良晶圓到 —在其他實施例中，第三微影次系統125能包含一或更多個能 ，=有潛在污染之處理的處理元件127。一或更多個處理元件127 能，其他次系統隔離出來，如此提供較低缺陷率並最小化可能的 污染。一或更多個處理元件127能包含空浮粒子計數器，該等空 29 200903686 ittt計數11能建立在晶目路徑及/或臨界處理區域，以監視環境 二度的。警告及/或警鈴狀況能建立有偵測程度。舉例而言， 理能包括「不潔」（“dirty，，你烤處理，如此讓這些「不潔」 理從其餘系統中隔離出來。此外，一或更多個重新改製程 序可糟由處理從其他次系統隔離出的元件來執行。 卢搜熱處理次系統13Q能包含—或更多個處理元件132,該等 ί ί Ϊ 用S_D程序及/或非沾程序，能處理、測量、檢驗、 i Γ或更多個晶圓。藉使用S-D程序及/或非S-D程 僂於^專輸叙置133、第一 S_D傳輸次系統101及/或第二S_D Ϊ人3能傳輸、測量、檢驗、對準及/或儲存—或更多個 130The transmission sub-system U)2 can transmit the sub-system, the system 101 and/or the second SD, and the processing elements such as the second-order %+ifiaBI binding development program, the heat treatment program, the measurement program, and the patterned mask Layer, tantalum photoresist material and / or anti-reflective coating material - or more than 70 pieces of 127 can be used to heat treatment (baking) briber cover. In addition, - or more Processing elements 127 can use and/or verify - or more patterned mask layers. S_D procedures and / or non-stick 1; two or test one or more wafers. One or more controllers Lu '2 3 king order and / or non-S_D program ' to determine whether the wafer * has been correct = or, or need to re-engineer the program. Internal transmission device 128, first s_d and / or second SD transmission sub-system 102 can transmit poor wafers - in other embodiments, the third lithography subsystem 125 can include one or more processing elements 127 capable of processing potentially contaminated. One or more processing elements 127 can Other subsystems are isolated, thus providing a lower defect rate and minimizing possible contamination. One or more processing elements 127 can be packaged With an empty floating particle counter, the equal space 29 200903686 ittt count 11 can be established in the crystal path and / or critical processing area to monitor the environment twice. Warning and / or alarm conditions can establish the degree of detection. For example Words, the abilities include "dirty" ("dirty," you bake, so that these "unclean" quarantines are isolated from the rest of the system. In addition, one or more re-engineering procedures can be handled by other subsystems. Executing components to perform. Lu search heat treatment subsystem 13Q can include - or more processing components 132, which can process, measure, verify, i Γ or more using S_D procedures and/or non-stick procedures Wafers. By using SD programs and/or non-SD programs, the first S_D transmission subsystem 101 and/or the second S_D can transmit, measure, inspect, align and/or Or store—or more than 130
r對j夕/ °亥4處理兀件猎使用S-D程序及/或非S_D程序， j-或衫個晶B1執行輯程序、退 H 、量測程序、對準程序及_存2序:序一 度昇及/或控制—或更多個晶圓的溫 晶圓的溫ΐ 來^;f或控制—或更多個 檢:====較製次系統。 S-D評估元件藉使用S_D程序及 J估讀l37，該等 檢驗、對準、驗證及/或儲存'或^·^序:能評估、處理、 /或非S-D程序，内部傳輸裳置^、第:用S-D程序及 或第二S-D傳輸次系統1〇2能傳輸 ^輪-人系統101及/ 一或更多個晶圓。在某些實施例中，對準及/或館存 更多個S.D評細以 30 200903686 或非S-D程序，能對一或更多個 微粒偵测程序、量測程序、對準 執二丁3平估程序、檢驗程序、 舉例而言一或更多個及/或儲存程序。 且一或更多個S-D評估元件能用來執行光學檢驗， 短波長來執行檢驗。此外，一或更*3多個 或更多個晶圓上以較 在一或更多個晶圓上铜微粒:S_D及印能用來 測量及/或檢驗-或更多個晶圓表面。=程序能用來 f = ί序及/或非S_D程序，以決定·是執 或疋否需要重新改製程序。 t、，工正確地處理， 101 S-D S-D/^ 製次系統。 丁 π1UZ此得翰不良晶圓到重新改 钱刻次系統140能包含一或更多個處理元件14 # S：° ^ ^ ίί :啫存或更夕個晶圓。藉使用S_D序^^ ^ ^ ^ 部傳輸裝置⑷、第一 S_D傳輸次系統 、測量、檢驗、對準及/或儲存一或更多個曰 142某;中杜钮刻次系統140能包含一或更多個處理元件 以專處理凡件猎使用s_D程序及/或非S_D程序，能對一 行^程序、化學氧化物移除(C〇R，ehemieal oxide 對準^序錄序、錄改製程序、量測程序、 序。舉例而言，一或更多個處理元件142藉 /纽夕個s-d及/或非s~°電漿钱刻程序，係能用來產生及 圖案化晶圓，且一或更多個處理元件142藉使用一或更多 =及/或非S_D非電漿姓刻程序，係能用來產生及/或修改圖案 曰曰圓。，外，一或更多個處理元件142能用來從一或更多個晶 ，士移，薄層材料及/或處理殘留物。S_D程序及/或非沾程序能 =來，量及/或檢驗—或更多個晶圓表面。一或更多個控制器144 ^執行，-D程序及/或非S_D程序，以決定晶圓是否已經正確地處 5，或是否需要重新改製程序。内部傳輸裝置143、第一 S_D傳 31 200903686 ㈡=班第：叫輸蝴陶晴不良晶圓到重 沉積次系、统I45能包含-或更多個處理元件147，該等處理元 猎使用S-D程序及/或非S-D程序，能處理、測量、檢驗 存一或更多個晶圓。藉使用S_D程序及/或非仰程序，内 4傳輸裝置148、第- S-D傳輸次系統1G1及/或第二S_D次 測量、檢驗、對準及/或儲存—或更多個晶圓ί某 例中，沉積次系統145能包含—或更多個處理树147，該 ίί 2藉Ϊ用S—D程序及/或非S_D程序’能對一或更多個晶 ^執仃儿積％序、檢驗程序、量測程序、對準 學乳相沉積(CVD)程序、游離化細㈣物理氣相 序、原子層沉積(ALD)程序、電漿強化原子層“(把= 相=========_化化學氣 争定曰^ 制為149錢行S_D程序及/或非S-D程庠，以 傳輸或是否需要重f文製程序。内部 統能傳輸不良晶圓到重新改:。1及’或第二S-D傳輸次系 評估次系統15〇能包含一劣p， 估元件藉使用S-D程序及/’該等評 S D長序，内部傳輪装置153 %序及/或非 ==次系統搬能傳輸、測量 更夕個曰曰Η。在某些實施例中 ^次倚存-或 200903686 該等光學ί測牛日 152能用來執行光學量測程序’ 更多個S_D評话^1用=頁晶圓上的特徵及/或結構，且一或 或更多個S-D評估元件15匕用，行晶圓表面的量測。此外，-驗一或更多個晶圓夺而。二^來決定晶圓曲率，制量及/或檢 及/或非S-D評估程^。°一戍152能執行S-D評估程序 /或非S-D f呈序，以J 制11 15斗能執行S-D程序及 新改製程序。响傳魏處理，或是否需要重 第二s-d傳輸次置:、弟一紐傳輸次系統1〇1及/或 重新改製次系統155 改製次系統。 理元件藉使用S-D程序及/或非s 個處理70件157’該等處 更多個晶圓。藉二 序，内部傳輪裝置158、第一 s>n庶认斤夂/次非b U耘 傳輸次系統能傳輸、測量、檢驗、對準第二S-D 在某些實_巾，*較“ 序，-或更多個處理元件157能用來從 ^ ^ s.D^# s-D；：® -或更多個處理元件157制錢〜蚊多材 157 Ϊί H Ϊ非沾程序㈣來測量及/或檢驗一 非s-d程序，以決定晶圓是否已經正確地處理，r on j eve / ° hai 4 processing 猎 猎 使用 using SD program and / or non-S_D program, j- or shirt crystal B1 execution program, back H, measurement program, alignment program and _ save 2 order: preface Once elevated and / or controlled - or more than a wafer of warm wafer temperature / ^ or control - or more than: = = = = compared to the system. The SD evaluation component uses the S_D program and J to evaluate l37, such inspection, alignment, verification, and/or storage 'or ^' sequence: can evaluate, process, and/or non-SD programs, internal transmissions, ^, : The wheel-human system 101 and/or one or more wafers can be transferred using the SD program and or the second SD transmission subsystem 1〇2. In some embodiments, the alignment and/or library has more SD ratings to 30 200903686 or non-SD programs, and can be used for one or more particle detection programs, measurement programs, and alignments. A flattening procedure, an inspection procedure, for example one or more and/or a stored procedure. And one or more S-D evaluation components can be used to perform optical inspections, short wavelengths to perform inspections. In addition, one or more than three or more wafers may be used to measure and/or verify - or more of the wafer surface than copper particles on one or more wafers: S_D and Imprint. = The program can be used to f = ü and / or non-S_D programs to determine whether it is OK or not to re-program the program. t,, work correctly, 101 S-D S-D/^ system. Ding π1UZ This is a bad wafer to re-make the system 128 can contain one or more processing elements 14 # S: ° ^ ^ ίί : 啫 or a wafer. By using the S_D sequence ^^ ^ ^ ^ part transmission device (4), the first S_D transmission subsystem, measuring, verifying, aligning, and/or storing one or more 曰 142; the middle du button engraving system 140 can include a Or more processing elements to specifically use the s_D program and/or non-S_D program to remove the program, chemical oxide removal (C〇R, ehemieal oxide alignment, sequence, recording and modification program) , measuring program, sequence. For example, one or more processing elements 142 can be used to generate and pattern wafers by using a sd and/or non-s~° plasma etching process. The one or more processing elements 142 can be used to generate and/or modify a pattern circle by using one or more = and/or non-S_D non-plasma surrogate programs. Element 142 can be used to remove residues from one or more crystals, thin layers of material, and/or process. S_D program and/or non-stick process energy = quantity, and / or inspection - or more wafers Surface. One or more controllers 144^ execute, -D program and/or non-S_D program to determine if the wafer has been correctly located 5, or if it needs to be re Modification procedure. Internal transmission device 143, first S_D transmission 31 200903686 (2) = Bandi: called the lost wafer to the re-deposition subsystem, the system I45 can contain - or more processing elements 147, the processing elements Hunting uses SD programs and/or non-SD programs to process, measure, and verify one or more wafers. By using S_D program and/or non-inclination program, internal 4 transmission device 148, first-SD transmission subsystem 1G1 And/or a second S_D measurement, inspection, alignment, and/or storage—or more than one wafer ί, in which the deposition subsystem 145 can include—or more than one processing tree 147, The S-D program and/or the non-S_D program can be used to program one or more crystals, test procedures, measurement procedures, alignment emulsion deposition (CVD) procedures, and free (4) physics. Gas phase, atomic layer deposition (ALD) program, plasma-enhanced atomic layer "(================================================================================ SD program, to transfer or whether it needs to re-program the program. The internal system can transmit bad wafers to re-change: 1 and 'or the second SD transmission sub-system evaluation sub-system 15〇 can contain a bad p, the estimated components use the SD program and / 'the evaluation of the SD long-order, the internal transfer device 153 % order and / or non == sub-system transfer energy transmission, measurement even more In some embodiments, the reliance - or 200,903,686 optical zen 152 can be used to perform optical metrology procedures. 'More S_D critics ^1 with = page features and/or The structure, and one or more of the SD evaluation elements 15 are used to measure the surface of the wafer. In addition, one or more wafers are taken. Determine the wafer curvature, throughput and / or inspection and / or non-S-D evaluation process ^. ° 戍 152 can perform S-D evaluation program / or non-S-D f sequence, can execute S-D program and new modification program with J 11 15 bucket. The transmission of Wei Wei, or whether it is necessary to repeat the second s-d transmission sub-set:, the brother-one transmission sub-system 1〇1 and / or re-engineering the sub-system 155 to rebuild the sub-system. The processing component uses 70-pieces of 157' to process more wafers using S-D programs and/or non-s. By means of the second sequence, the internal transfer device 158, the first s>n庶 庶/夂 non-b U耘 transmission subsystem can transmit, measure, inspect, and align the second SD in some real _ 巾, * The sequence, or more processing elements 157 can be used to measure and/or from ^^ sD^# sD;:®- or more processing elements 157 to make money~ mosquito 157 Ϊί H Ϊ non-stick procedure (4) Verify a non-sd program to determine if the wafer has been processed correctly,
?-Γ^4ρΐΤ〇ί ί ^ S-D 一 S-D傳輸-人系、、克102此傳輸不良晶圓到重新改製次系 各次系統能平行處理-或更多個晶圓，且能執行二或更多的 200903686 S-D程序及/或非S、D程序。 息錢iJi:格交換。控制器能處理訊 2新目_於晶圓抵次之製程配方、^新貝t ^ ^ 万σ]面輪廓及/或模型能在處理現行曰®夕义Φ & ====== ㈣ 行處理。舉例二之製程配f、剖面_及/或模型來進 ii，S-D_製程配方、剖面輪_或模 程配方、===控制器可決定何時使用新s蝴製 料;;多程序能提供S_D損壞評估資料及/或非S-D損 ΐΐ=特能包括在不同位置、晶圓、晶圓批次之 或構一或更多個處理次系統能使用損壞評 最佳化處理餘财㈣、處理剖面輪廓資料 來^及例而言’蝕刻次系統140能使用損壞評估資料 及/或取佳化侧化學反應及/或姓刻時間。此外，沉積次系 微影次緣⑽、12Q、125)能使關壞評估資料來更 新及/或私化製程配讀料、剖面輪肺料及/或模型資料。 斗同時間及/或位置上’s-D程序能用來產生、修改及/或評 +:%及/或套豎(nested)之結構。舉例而言，在靠近隔離出及/ 之結構的晶圓厚度資料會林同，且在靠近_區域及/或 溝朱陣列區域的晶圓厚度資料會有*同。針對隔離出及/或套疊結 構’處理次系統能使用新S_D資料，以更新及/或最佳化s_D製程 配方及/或製程時間。S_D程序能使用終點偵測(EPD, end_p〇int 34 200903686 製程時間資料來改善運算正確度。當—晶圓及/或 曰曰0批X正文處理時’ S_D資料能產生，並 者二:用更新處理、量測及/或模擬之製程配方。或 ΪH # EPD資料用來停止S_D程序時，EPD ίϋ 料能絲計算及7或估計s①膜厚。在處理期 and“rifieatu)n wa㈣能定期執 ,及勒#▲ 1 &序之錢/或之後，如蝴、沉積、微影、清 办及抛社序，S_D測量程序能用來驗證沾膜厚。 構有ΓίΪΪ|ϊ： =資料能包括與S'D圖案化結構或未圖案化結 =ίί 夏i ί所f擬的信號，且S~D信號藉使用處理狀態 :^二 製程配方、_晶圓區位資料來儲存。 圖案化結構剖面輪#有關之變數、量測裝置類 ‘η、及模型中浮點之值變數的範圍以及模型中固定的 ^式庫剖面輪#資料、S_D資料可包括固定及/或可變剖 m數(如料尺寸、側則度、舰蝴班量測裝^ 數(如波長、入射角及/或方位角）。 " 结如施例中’ s_d程序能使用所測量、預測及/或模擬的 UHs絲最佳化光學量測製程配方、結構及/或模型。s_ =用内容/辨識資絲作為整理、索引㈣的方法，該内容 貝讯如位置ID、晶圓ID、晶槽ID、批次ID、製程配方、狀熊_ ^ 、y斗衣σ口衣置、晶圓、程序、批次、製程配方、位置、 區位、圖案化及/或未圖案化結構。S_D資料可包括下層薄膜資 f S-D、l序可用下層薄膜資料來進行即時更新及/或修正 打’因為下g薄膜及/或結構的干擾，部分量測位置會是非 的(non-measurable)。S-D干擾類型的地圖能加以建構，並 ，能=來測量的位置區位。此外，S_D干擾剖面輪廓及/或模型倉: 加以建構，並用來客服這些問題。 、b 35 200903686 及直Ξΐ之新建、更新及/或最佳化s_D信號的資料庫 πΐ-,ιΐίs-a面輪廓參數組。S_D程序可新建、更新及/或最佳 資料i子器學習系統(mls)的資料組’且mls可用程式庫 來改盖效：練。已改變的及/或已更新的數值能儲存及/或用 二t犯0及/或非S-D程式庫及資料庫皆能使用。 策略、計晝、模型、次系統、元件或程序中，能界定 規範就見Γ °每當遭遇一匹配脈絡情境時’干預及/或判斷 干預及/或判斷規範能針對各式程序，並能 且廠ίΪΪΪϋ中’製造執行系統⑽可用以監視部分系統程序， 如何管理資料。此外，製造執行系統 SECS通鶴絲 =錢S_D更訊。資舰藉使用 態，品之處理狀 步設定時，能由處理_緣絲決定^卜或刀 S-D程序的控制階層。規範能 ^ =里在暫停及/或停止時該做什i。 要執行什麼修正動作。處理次序規範及卜傳二欠 亦此用來決定什麼晶圓需要接受處 理曰辄 性方法能包括接收-錢㈣s 輪處理晶圓的例示 圓建立處理次序及/或==曰。關的晶圓資料，並為各晶 數。能從處理次序決定的定序狀態(SQ請)變 ί不甘j理次序能從製造執行系統1⑽中獲得， 且定及/或處理修改f理f序， 變。舉例而言’額外次序狀態之改變的起始作 36 200903686 外處理步驟；在執行處理步驟時 固持住晶圓，·在-工呈曰固持住晶®，在執行計算時， 域修正賊分析故障===== 不同工具；及 S_D資料及/或訊息時，額卜、傳运及/或接收 持及/或再運送(re-r〇ute)I^序步驟及/或延遲起始時間可用來固 減iifi例中，s_d傳輸次系統能使用載入資料來決定曰圓 s_D傳輸次系統能使 :;r卿料來決定晶圓將傳輸二 賴度資料能包括對已在晶圓μ拥 > 七々士巾 ?程序，理資料报接近預測值時订該s二賴:!、 !二:】口：的處理資料不接近預測值時，該s_; ίίΪ。舉例而言’信賴值能從零涵蓋到九，零 代表失效狀況，九代表正確執行。 v 曰^圓狀態資料能包括晶圓數量(WN，wafer n_㈣資料、處理 ί處理seq職e)f料、步驟計數(sc，step e_㈣資 ΐ料"f)㈣、處理狀態(PS, ~s敝） i 二 t pendency)資料、狀態(st，她胸 ί 1 i貝枓此用來辨識晶圓的處理步驟數量；處理類型(PT)資料 3來步驟執行的處理類型;位置相依性㈣資料 此疋-位置相依性號碼’且能用來建立— = 料能用絲明處理步驟是否已執行過 里 :遲：ΤΓ);料能包括計時 延遲Β日圓的疋序、计异、處理及/或量測。 在某些實施例中，晶圓資料能包括變數資料。舉例而言，當 37 200903686 前授變數為第一值時，資料及/或訊息能前授；而當前授變數 二值時，資料及/或訊息則不會前授。當S_D變數為第一值時'，' At 執行S-D程序；而當S-D變數為第二值時，能執行非S_D程此 在某些實施例中，輸入及輸出訊息能包括故障訊自、1 息、錯誤訊息、S-D訊息、回饋訊息、非S_D訊息、= 外部訊息、最佳化訊息、狀態訊息、計時訊息、處理結訊^ 或其他訊息。此外，訊息能包括即時命令、配置、 ° ^ 資訊。該等賴：能作為S-D程序變數/參數來即時使; ，寫現行製程配方資料、剖面輪就/或模翻 ^ ，序資料、覆寫現行起始時間；及能用來緊縮 疋製程配方二剖面輪廓及/或模型與其等有關之正確性的，’、 在各式實施例中，一或更多個輪自 ΚΠ4 ^ Π9 . 124 . 129 ^ 134 /或處理，或更多個輪出訊息 及 119、124、129、m、139、U4、149、154=f 控制斋(114、 在某些範例中，輪入訊息能是包含s_ 生及/或送出。 之較小的剖面輪廓空間。;外、使^貧^厂^識程^空間中 且S-D程序能使用此等資料 予叉及/或溫度資料， 面輪靡，藉此減少量測時間加、=自=面輪廓程式庫的剖 制⑽決定如何即時擷取ms七讯息’及/或控 SML袼式。對於正在為多重次t、訊息 =使用XML格式及/或 的S-D訊息而言系’、二迗、为割及/或進行語言剖析 舉例而言，某=!;:理例外處置。 且所生產的每個晶圓切口好Γΐί/0〜30 nm的間極結構， 月匕有好幾百萬個這些結構。S-D處理能 38 200903686 用來要執仙擔保結構正麵測試量。 處理次序亦能依賴其他包括掃描哭 S-D傳輸系、统能用以最大化整體產量。;=之次系統的產量。 加以建立，並用來最小化由較牛#而/，S-D傳輪次序能 產量問題。在某些實施例中上人器次系統所導 賴值及/或較高風險的晶圓。 在其他Si統;;;3較低信 序能在相對短時間内加以建立並 j中田重新改製處理次 送具有較低信賴值及/或較高風險的晶_重==統能立刻傳 T程序能在晶圓上—特定區位產生—特&^糸， 成熟時，信賴值應該是高的，且有最少 果。當-處理 晶圓上的-位置能用來宣示_晶圓及 ^日^圓，評估，- 時，源自晶圓上所有位置的處理^果庫f Ba® °當—處理成熟 之内）。正以懷一制口 π士 果應胃疋相同的(在均勾性限制 用來建立減險’眾纽4上的評估伽雜/結構能 處理系統100能用來驗證一或更多個 在某些實施例中，—或更多個晶圓能由 次糸聊卜102)接收，且S_D傳輸次系統 ，糸統l(K)t的-或更多個次系統⑽、115、12G、125二·^ 40、145、150、155)。各晶圓在其之上能有 關料’而晶圓資料能 ㈣行歧(軸外_時，這些商 舉例而言，「最佳晶圓」lden Mfeq 次^处、、、口 ΐ罪I或更夕個閘極結構。在這些區位上，CDSEM 利^第料來處理’且第—信賴度資料能在做比較 旦、又付彳°賴度資料此與指賴極限比較。若第一信賴極限不符一 里測差異平均數(delta) ’便能改變晶圓的處理(量測)次序，且能從 39 200903686 日士更多個額外位置獲得量測資料。若仁結” 犄，日日il忐進行重新改製。 十右传賴度貢料不佳 改製。若多過-個晶ί二賴$林佳時， 個群組此進行重新改製。 稩度身料不佳時，整 =傳輪系統能用以最大化 ，加以建立，並用以最小化，s_D傳輸次 ff產量問題。在某些實_中，S_D 器次系統所導 低信賴值及/或較高風_晶圓。在其他絲延遲具有較 理次序能以相對短之時間加以建立並執行'’ ^重新改製處 :具有較低信賴值及/或較高風險的晶圓立即傳送= 處理序;亡，:特定區位產生-特定結果。當一 估，上之的，要評 晶圓上全部位置的處理結果應該是ΐΐ的(ns 來建開發時，眾多位置上.的評估特徵/屬性/結構能用 衫個s_d處理程序。 次李统〇〇"^1^胁’—或更多個晶圓能由—或更多個S'D傳輸 更多個次_1()、115、i2G、125 ,、m、 Z有i之Γ_15日5)二f晶圓在其之上能具有—或更多個薄層， 料。S-D、值於i的曰曰！3貝料，而晶圓資料能包括歷史及/或即時資 改製-欠能侧·規格來決定何時傳送晶圓至重新 些商業規格會有^區位。晶_行處理(獲得額外薄層)時，這 -或更多個控制器(114、119、124、129、134、139、⑷、149、 159、195)能用以決定每個晶圓的晶圓狀態資料，並利用晶圓 40 200903686 貢料及/或晶圓狀,4貢料決定第—未驗證S_D程序。第一未驗證 S-D程序使用-或更多個次系統⑽、115、12〇、125、13〇、135、 140、145、150、155)來執行。 一或更多個控制盗（114、119、124、129、134、139、144、149、 154、159、195)能用以：藉使用第一未驗證S_D程序，建立欲處 理之S-D晶圓的第一數量；藉使用晶圓資料及第一未驗證S_D程 序^針對各個S-D晶圓建立所需驗證位置的數量；決定第一處理 次系統中之-或更多個S-D處理元件的操作性狀態資料；決定一 或更多個S-D傳輸次系統(1〇卜1〇2)中之一或更多個S_D傳輸元 巧04)的載人資料；藉使用晶圓資料、晶圓狀態資料、操作性狀 =資料、載人㈣或所需驗證位置賊量，或上述任何組合，為 數量的S-D晶圓中之第—S_D晶圓建立第—傳輸次序；及當 第- S-D處理元件無法利用日寺，藉使用連接到第一處理次系統的 S-D傳輸次系統，以第一段時間延遲第一 S_D晶圓。 。一或更多個S-D傳輸次系統(1〇1、1〇2)能用以傳輪第一 S_D 日日圓至一或更多個次系統(HO、U5、120、125、130、135、140、 U5、15〇、155)中之其中一個 S_D 處理元件(112、117、122、127、 132、142、147、157)。此外，藉使用S_D傳輸次系統(謝、1〇2) 中之，輸7L件104，-或更多個S_D傳輸次系統(皿、搬)能用以 延遲第- S-D晶圓-第一段日夺間，且傳輸元件1〇4能支持二或更 多個晶1。在第一段時間之後’延遲的第一 S_D晶圓能在一或更 多個次系統(110、115、120、125、130、135、140、145、150、155) 中受處理。 弟S-D晶圓傳輸完成後，第一未驗證程序能使用第一 S-D晶圓來執行，且在第一未驗證S_D程序期間，第一组§。驗 證特徵能，生在第-已處理S_D晶圓上。第—組S_D驗證特徵能 包括位^第一已處理S_D晶圓上之第一位置的第一驗證特徵。 虽第一未驗證S-D程序在第一晶圓上執行時，能產生第一已 處理S_D晶圓；當第一 S-D評估元件(137、152)可利用時，藉使 41 200903686?-Γ^4ρΐΤ〇ί ί ^ SD-SD transmission-human system, gram 102 This transmission of bad wafers to re-engineering sub-systems can be processed in parallel - or more than one wafer, and can perform two or more More than 200,903,686 SD programs and / or non-S, D programs. Interest money iJi: grid exchange. The controller can process the new target of the wafer 2, the process recipe of the wafer, the surface contour of the wafer, and/or the model can handle the current 曰® Φ &; = ===== (4) Line processing. Example 2 process with f, profile _ and / or model to enter ii, S-D_ process recipe, profile wheel _ or mold recipe, === controller can decide when to use the new s butterfly material;; multi-program Can provide S_D damage assessment data and / or non-SD damage = special can be included in different locations, wafers, wafer batches or one or more processing subsystems can use damage assessment to optimize the processing surplus (4) The profile profile data is processed and the 'etching subsystem 140 can use the damage assessment data and/or take the chemical side reaction and/or the time of the last name. In addition, the deposition of secondary lithography sub-edges (10), 12Q, and 125) can be used to update the assessment data to update and/or privately process the read material, profile wheel, and/or model data. The bucket's simultaneous and/or positional 's-D program can be used to generate, modify, and/or evaluate +: and/or nested structures. For example, the wafer thickness data near the isolated and/or structures will be the same, and the wafer thickness data near the _ region and/or the trench array region will be the same. The new S_D data can be used for the isolated and/or nested structure processing subsystem to update and/or optimize the s_D process recipe and/or process time. The S_D program can use endpoint detection (EPD, end_p〇int 34 200903686 process time data to improve the accuracy of the operation. When the wafer and / or 批 0 batch X text processing 'S_D data can be generated, and two: use Update process, measurement and/or simulation process recipes. Or ΪH # EPD data is used to stop the S_D program, EPD ίϋ material can be calculated and 7 or estimated s1 film thickness. During the processing period and “rifieatu” n wa (four) can be regular The S_D measurement program can be used to verify the thickness of the film. For example, if the butterfly, the deposition, the lithography, the clearing, and the throwing order, the S_D measurement program can be used to verify the thickness of the film. The signal can be included with the S'D patterned structure or the unpatterned junction = ίί, and the S~D signal is stored by using the processing state: ^ two-process recipe, _ wafer location data. The structure profile wheel # related variables, the measurement device class 'η, and the range of value variables of the floating point in the model, and the fixed ^ type library profile wheel # data, S_D data in the model may include fixed and / or variable section m Number (such as material size, side degree, ship size measurement) (such as wavelength, angle of incidence and / or The s_d program can use the measured, predicted and/or simulated UHs wire to optimize the optical measurement process recipe, structure and/or model. s_ = use content / identify the wire As a method of sorting and indexing (4), the content such as position ID, wafer ID, crystal slot ID, batch ID, process recipe, shape bear _ ^, y 衣衣 口 置 置, wafer, program, batch Sub-process recipe, location, location, patterning and/or unpatterned structure. S_D data may include the underlying film, f SD, and the order of the underlying film data for immediate update and/or correction. / or structural interference, part of the measurement position will be non-measurable. The map of the SD interference type can be constructed and can be used to measure the location location. In addition, the S_D interference profile profile and / or model bin: It is constructed and used to support these problems. b 35 200903686 and the database of new, updated and / or optimized s_D signals πΐ-, ιΐίs-a surface contour parameter group. S_D program can be newly created, updated and / Or the best information i sub-learning system (mls) The group 'and the mls can be used to change the effect: practice. The changed and / or updated values can be stored and / or used with 2 and / or non-SD libraries and databases can be used. In the case of a plan, a sub-system, a component, or a program, the specification can be defined. 每 ° Whenever a matching context is encountered, 'intervention and/or judgment interventions and/or judgment specifications can be applied to various procedures, and The factory's manufacturing execution system (10) can be used to monitor part of the system program and how to manage the data. In addition, the manufacturing execution system SECS Tonghesi = money S_D news. When the asset is used, the processing level of the product can be determined by the processing _ edge wire or the control level of the S-D program. The specification can be ^ in the pause and / or stop. What corrective action to perform. The processing order specification and the deflation are also used to determine what wafers need to be processed. The method can include receiving-money (four) s round processing wafers to process the order of the circle and/or ==曰. Close the wafer data and for each crystal number. The ordering state (SQ request) that can be determined from the processing order can be obtained from the manufacturing execution system 1 (10), and the modification and/or processing can be modified. For example, the start of the change of the additional order state is 36 200903686 external processing step; the wafer is held while the processing step is being executed, and the crystal is held in the work, and the domain corrects the thief to analyze the fault when performing the calculation. ===== Different tools; and S_D data and/or messages, forehead, transport and/or receive and/or reship (re-r〇ute) I step and/or delay start time Can be used to reduce the iifi example, the s_d transmission subsystem can use the loading data to determine the round s_D transmission subsystem can: • r material to determine the wafer will transmit the secondary data can include the抱> Seven gentlemen's towel? The program, when the data report is close to the predicted value, the singer: !, ! 2: 】 mouth: when the processing data is not close to the predicted value, the s_; ίίΪ. For example, the 'trust value can range from zero to nine, zero for failure status, and nine for correct execution. v 曰 ^ circle status data can include the number of wafers (WN, wafer n_ (four) data, processing ί processing seq job e) f material, step count (sc, step e_ (four) information " f) (four), processing status (PS, ~ s敝) i two t pendency) data, status (st, her chest ί 1 i 枓 this number of processing steps used to identify the wafer; processing type (PT) data 3 to the type of processing performed by the step; position dependence (4) The data can be used to establish the data - and can be used to establish - = whether the material can be processed in the past: late: ΤΓ); the material can include the timing delay, the order of the yen, the calculation, the processing and / or measurement. In some embodiments, the wafer material can include variable data. For example, when 37 200903686 is the first value, the data and / or message can be pre-authorized; and when the current variable is binary, the data and / or message will not be pre-authorized. When the S_D variable is the first value, ',' At executes the SD program; and when the SD variable is the second value, the non-S_D process can be performed. In some embodiments, the input and output messages can include the fault message, 1 Information, error messages, SD messages, feedback messages, non-S_D messages, = external messages, optimized messages, status messages, timed messages, processing messages ^ or other messages. In addition, the message can include instant commands, configuration, and information. This can be used as an SD program variable/parameter to make an instant; to write the current process recipe data, the profile wheel, or the mold turnover, the sequence data, overwrite the current start time; and can be used to tighten the recipe recipe 2 The cross-sectional profile and/or the correctness of the model related to it, ', in various embodiments, one or more rounds from ΚΠ4 ^ Π9. 124 . 129 ^ 134 / or processing, or more rounds of information And 119, 124, 129, m, 139, U4, 149, 154 = f control fast (114, in some examples, the round-in message can be a smaller profile contour space containing s_ raw and / or sent. ; outside, make ^ poor ^ factory ^ know the process ^ space and SD program can use this information to fork and / or temperature data, face rim, thereby reducing the measurement time plus, = self-face profile library Section (10) decides how to instantly retrieve the ms7 message 'and/or control the SML mode. For the multiple times t, message = use XML format and / or SD message for the ', two, cut and / Or for language profiling, for example, a =!;: exception handling. And each wafer incision produced is good Γΐί/0~30 nm Inter-polar structure, there are millions of these structures in the Lunar New Year. SD processing energy 38 200903686 is used to guarantee the positive test quantity of the structure. The processing order can also depend on other scans including the SD SD transmission system. The overall output of the system; = the production of the secondary system. It is established and used to minimize the problem of the yield of the output by the syllabus. In some embodiments, the value of the system is / or higher risk wafers. In other Si systems;;; 3 lower order can be established in a relatively short time and j Zhongtian re-engineered to send crystals with lower confidence and / or higher risk _重== can immediately pass the T program can be generated on the wafer - specific location - special & ^ 糸, when mature, the value of the trust should be high, and have the least effect. When - processing the position on the wafer Can be used to declare _ wafer and ^ day ^ circle, evaluation, -, from all positions on the wafer processing ^ fruit bank f Ba ® ° when - processing mature. The evaluation of the gamma/structural energy processing system 100 can be used to verify one or more in the same way that the sputum is the same as the stomach sputum (the uniformity is used to establish the risk reduction) In some embodiments, - or more wafers can be received by the secondary chat 102, and the S_D transmits the secondary system, the system of the system (1) or more (10), 115, 12G, 125 2·^ 40, 145, 150, 155). Each wafer can be related to the material's and the wafer data can be misidentified (off-axis _, these quotients, for example, "best wafer" lden Mfeq times ^,, ΐ ΐ I I or On the other hand, the CDSEM is used to deal with 'the first-reliability data can be compared with the limit of the data. The limit does not match the difference between the average number of deltas (delta) 'can change the order of processing (measuring) of the wafer, and can get more measurement data from 39 200903686 Japanese extra position. If the knot is ”, day Il 忐 忐 re-reform. Ten right pass Lai tribute poorly modified. If more than a ί 二 二 $ $ 林佳, the group will be re-reformed. When the body is not good, the whole = pass The wheel system can be used to maximize, build, and minimize the s_D transmission yield problem. In some real-world, the S_D sub-system leads to low confidence and/or higher wind_wafer. Other silk delays can be established in a relatively short time and executed in a relatively short time. ''Re-reform: lower letter Value and / or higher risk wafer immediate transfer = processing order; death, specific location generation - specific results. When an estimate, the results of the evaluation of all positions on the wafer should be ΐΐ (ns At the time of construction, the evaluation features/attributes/structures of many locations can be used to process the s_d process. Sub-Li 〇〇 〇〇 "^1^ threat' - or more wafers can be - or more S'D transmits more times_1(), 115, i2G, 125, m, Z have i _15 days 5) The two f wafers can have - or more thin layers on top of them. SD, value of i! 3 shell material, and wafer data can include historical and / or real-time restructuring - inferior side · specifications to determine when to transfer wafers to re-commercial specifications will have ^ location. This row or more controllers (114, 119, 124, 129, 134, 139, (4), 149, 159, 195) can be used to determine the wafer for each wafer when processing (to obtain additional thin layers) Status data, and use wafer 40 200903686 tribute and / or wafer, 4 tribute to determine the first - unverified S_D program. The first unverified SD program uses - or more subsystems (10), 115, 12 〇 125, 13〇, 135, 140, 145, 150, 155) are executed. One or more control thieves (114, 119, 124, 129, 134, 139, 144, 149, 154, 159, 195) can be used To establish the first number of SD wafers to be processed by using the first unverified S_D program; to establish the number of required verification locations for each SD wafer by using the wafer data and the first unverified S_D program; The operational status data of the first processing subsystem or more of the SD processing elements; determining one or more of the one or more SD transmission subsystems (1〇2) 04) Manned data; by using wafer data, wafer status data, operational traits = data, manned (four) or required verification location thief volume, or any combination of the above, the number of SD wafers - S_D The wafer establishes a first transmission sequence; and when the first-SD processing component cannot utilize the Japanese temple, the first S_D wafer is delayed for a first time by using an SD transmission subsystem connected to the first processing subsystem. . One or more SD transmission subsystems (1〇1, 1〇2) can be used to transmit the first S_D day yen to one or more subsystems (HO, U5, 120, 125, 130, 135, 140) One of the S_D processing elements (112, 117, 122, 127, 132, 142, 147, 157) of U5, 15A, 155). In addition, by using the S_D transmission subsystem (Xie, 1〇2), the 7L piece 104, or more S_D transmission subsystems (dish, move) can be used to delay the -SD wafer - the first paragraph The transmission element 1〇4 can support two or more crystals 1 . After the first period of time, the delayed first S_D wafer can be processed in one or more subsystems (110, 115, 120, 125, 130, 135, 140, 145, 150, 155). After the S-D wafer transfer is complete, the first unverified program can be executed using the first S-D wafer, and during the first unverified S_D program, the first set of §. The verification feature is generated on the first-processed S_D wafer. The first set of S_D verification features can include a first verification feature of the first location on the first processed S_D wafer. Although the first unverified S-D program is executed on the first wafer, the first processed S_D wafer can be generated; when the first S-D evaluation component (137, 152) is available, the borrowing 41 200903686
用連接到檢驗m ι35及評估次魏15GUse the connection to test m ι35 and evaluate the secondary Wei 15G
S'D 135中的S_D评估兀件137或第一評估 S-D 152 ; ^ I^° f f 一叫間。此外，减用S_D傳輸次系統(Hn、則中之值 輸兀件104，一或更多個S_D傳輸次系統 ! -已處理S-D程序，且傳輸元件1〇4能支持二==== 第二段時間之後，第一已處理SD曰圓处户认及更夕個日日圓在 評估次系統150中接受評^ _日日固月匕桃驗次系統135及/或 當執行評估程序時，第一位置能加以使用。此 =第;;做出評估決策。-或更二二器 (^14 . 119 124、129、134、別、144、149、154 ' 159、食匕 付ί /ϋ已處理S_D晶κ上之該數量的所需位置中選定第二 位置射與其錢並湘第—未,驗證s_d程序所 及/或檢驗資料; =工=資:包含已驗證量測及/或藉= 望資料之間的第—差異，建立第一位置的 值；猎使用第-信賴值、第—差異或晶圓㈣，或上述 對Γίΐ證S_D程序建立第—風險因素；藉使用 ί，：ί 第一差異、晶圓資料或上述任何組 。ΪS_D程序建立第—總風險因素；當第一風險 S D tit 界極限(threS_ limit)時，將第一未驗證 床識為具有與其有關之第—風險因素的第一已驗證程 ^、將二“位置的數量減少—個及將已造訪位置的數加一 一風險因素大於第一臨界極限時，將第—未驗證S-D 私序辨識為具有與其有關之第二風險因素的第—未驗證程序、將 42 200903686 所需位置錄量減少-似將已造訪位置的數量 ①程序具綱度㈣、風險#料及/或』有^ 在某些_巾，當騎_程料，娜位£朗 曰曰 B曰 =上。舉例而言，藉使用源自第一位置的資料及源 圓上一或更多個額外位置的資料，能做出評估 _ 個控制器(114、119、124、129、134、139、144、二⑼或&夕、 進行下列步驟：a)從第一S_D晶圓上之該數量的所需 位置中選定-新位置，其情位置具有與其有關 11 得到新未驗證資料’其中新位置具有與其有關置 =驗資料；C)為新位置建讀驗證龍 未=資 與新驗證資料之間的新差異，為第 禾驗迅貝枓 信賴值；e)藉使用新信賴值、新差里、第一=之笛位新 圓資料，或上述任何組合，為t未異^曰 上述任何=夫風險因素或新第—風險因素，或 辦新未 程序建立新第—總風險因素； s =护皮心風險因素小於或等於新臨界極限時，將第-未驗證 S 關之新第-全體新= η讀少—似將已造職置缝量增加一 程序辨^為具有於新二臨=限時，將第—未驗證S-D 所需位置的數量心:―個及纟""因素的新未驗證程序、將 需位置的數Ϊ二夺==置的數量增加-個;1}當所 等於零時，停止第-晶圓的^驟4〜h);及的當所需位置的數量 m' ；39^；：f4^ ϋ'ΟΗ > Π9 59、D5)亦能用以：藉使用晶圓資料、 43 200903686 處理狀態資料、所需驗證位置的數量或所造訪驗證位置的數量， 或上述任何組合，為第一組S-D晶圓中之額外S-D晶圓建立額外 程序驗證次序；及為額外S-D晶圓決定第一未驗證S_D程序，其 中第一未驗證S-D程序藉使用額外程序驗證次序來決定，且其包 含一或更多個處理程序。 一或更多個S-D傳輸次系統(101、1〇2)能用以傳輸額外S_D 晶圓至一或更多個次系統(11〇、115、120、125、130、135、140、 145、150、155)中之 S-D 處理元件(112、117、122、127、132、142、The S_D evaluation component 137 or the first evaluation S-D 152 in S'D 135; ^ I^° f f is called. In addition, the S_D transmission subsystem is deducted (Hn, the value of the transmission unit 104, one or more S_D transmission subsystems! - The SD program has been processed, and the transmission component 1〇4 can support two ==== After two periods of time, the first processed SD rounds and the other day's yen are evaluated in the evaluation subsystem 150. _ 日 日 日 固 匕 验 135 135 and/or when the evaluation procedure is performed, The first position can be used. This = the first; make an evaluation decision. - or two or two (^14. 119 124, 129, 134, 144, 149, 154 ' 159, restaurant pay ί / ϋ The selected second position of the number of required positions on the S_D crystal κ has been processed with its money and has not been verified, and the verification s_d program and/or inspection data; = work = capital: contains verified measurements and / or Borrow = look at the first difference between the data, establish the value of the first position; use the first-trust value, the first difference or the wafer (four), or the above-mentioned Sίΐ证 S_D procedure to establish the first risk factor; by using ί, :ί First difference, wafer data or any of the above groups. ΪS_D program establishes the first-total risk factor; when the first risk SD tit bounds limit (threS_ l Imit), the first unverified bed is identified as the first verified process with the first risk factor associated with it, the number of the two "positions is reduced" and the number of visited locations is increased by one risk factor greater than At the first critical limit, the first unverified SD private sequence is identified as the first unverified procedure with the second risk factor associated with it, and the 42 200903686 required location is reduced - like the number of visited locations 1 procedure With the outline (4), risk #料和/或』有^ In some _ towel, when riding _程料,娜位£朗曰曰B曰=上. For example, by using the information from the first position and Data from one or more additional locations on the source circle can be evaluated _ controllers (114, 119, 124, 129, 134, 139, 144, two (9) or & eve, performing the following steps: a) The selected number of the desired positions on the first S_D wafer - the new location, the location of which has its associated information 11 to obtain new unverified data 'where the new location has its associated data = C) for the new location Verify that the new difference between the dragon and the new verification data is Bessie trust value; e) by using the new trust value, the new difference, the first = the new position of the flute, or any combination of the above, is not the same as any of the above = risk factors or new risk factors , or to establish a new first-total risk factor; s = when the risk factor of the skin is less than or equal to the new critical limit, the new-first new = η read-less The amount of job-sewing is increased by a program to determine the number of positions required for the first-unverified SD: the new unverified program of the "and" 因素"" factors, the required position The number of digits is equal to == the number of sets is increased by one; 1} when it is equal to zero, the first wafer is stopped 4~h); and when the number of required positions is m'; 39^;:f4 ^ ϋ'ΟΗ > Π9 59, D5) can also be used: by using wafer data, 43 200903686 processing status data, the number of required verification locations or the number of verified verification locations, or any combination of the above, first Additional SD wafers in the group SD wafer establish additional program verification sequence; and determine the first unverified S_D program for additional SD wafers Wherein the first S-D is not verified by the use of an additional program verification procedure to determine the order, and which comprises one or more handlers. One or more SD transmission subsystems (101, 1〇2) can be used to transfer additional S_D wafers to one or more subsystems (11〇, 115, 120, 125, 130, 135, 140, 145, SD processing elements (112, 117, 122, 127, 132, 142, 150, 155)
147、157)的其中一個。此外，藉使用S-D傳輸次系統(1〇卜1〇2) 中的傳輸元件104，一或更多個S-D傳輸次系統(ιοί、1〇2)能用以 延遲額外S-D晶圓一第二段時間。經過第二段時間之後，額外S_D 晶圓能在一或更多個次系統(11〇、115、12〇、125、130、135、U0、 145、150、155)中受處理。 在傳輸額外S-D晶圓之後，第一未驗證S-D程序能用額外 晶，來執行，且在第一未驗證S_D程序期間，第一組S_D驗證特 徵月b產生在額外已處理s_d晶圓上。第一組驗證特徵能包括 額外已處理S-D晶圓上之第一位置的第一驗證特徵。One of 147, 157). In addition, by using the transmission element 104 in the SD transmission subsystem (1〇2), one or more SD transmission subsystems (ιοί, 1〇2) can be used to delay the additional SD wafer to the second segment. time. After a second period of time, additional S_D wafers can be processed in one or more subsystems (11〇, 115, 12〇, 125, 130, 135, U0, 145, 150, 155). After transmitting the additional S-D wafer, the first unverified S-D program can be executed with additional crystals, and during the first unverified S_D procedure, the first set of S_D verification feature months b is generated on the additional processed s_d wafer. The first set of verification features can include a first verification feature of the first location on the additional processed S-D wafer.
V 當第一未驗證S-D程序在額外晶圓上執行時，能產生額外已 處理S-D晶圓；當第一 S_D評估元件⑽、152)可利用時，藉 用連接到檢驗次系統135及評估次系統15〇的一或更多個S_D曰 ，二^統(10卜102)」額外處理S_D晶圓能傳輸到檢驗次系統135 、的苐一 S-D評估元件137或第一評估次系統15〇中的第一 s七 件152 ;而當第一 S_D評估元件無法利 3 、1〇2) ’額外已處理S_D晶圓能: 已，理S-D日日0-第三段時間，且傳輸元件职 個晶圓。經過第三段時間之後，第一已處理 系統出及/或評估次系統15〇中接受評^古。S D日日U檢驗次 44 200903686 個控制器(ims、u t之f個第—位置時，一或更多 藉使用额外信賴值、額外差異、第—建=外_值，el) 料，或上述任何組合，為第一未 ^、苐一差異或晶圓資 _使用麟風_素4外^2=„卜風險因素； ί;ΐ=序第;差異或晶圓資料，或上述任何:合風未 ===素=驗證程序、將所需Si量= 外第二風程序觸為具有與其有關之額 將已迭念；ΐΐ?卜驗麵序、將所需位數量減少一個及 ίΪ; ; Π)當所需額外Μ晶圓的數量大 於，，停t 當所需額外S-D晶圓的數量等 ^當使用額外已處理S_D晶圓上的額外所需位㈣，-·^夕 ^(114 ^ 119 ^ 124 . 129 . 134 . 139.1：^ 154 量^a2)w卜已處理沾晶圓上之該數 曰曰圓上之新位置獲得額外新未驗證資料，其中新位置具^ 45 200903686V. When the first unverified SD program is executed on the additional wafer, an additional processed SD wafer can be generated; when the first S_D evaluation component (10), 152) is available, the connection to the inspection subsystem 135 and the evaluation is borrowed. One or more S_D曰, two systems (10 102) of the system 15〇 can be transferred to the SD-evaluation component 137, the first evaluation subsystem 137, or the first evaluation subsystem 15 The first s seven pieces 152; and when the first S_D evaluation component can not benefit 3, 1 〇 2) 'Additional processed S_D wafer can: Yes, the SD day 0 - the third time, and the transmission component Wafer. After the third period of time, the first processed system is out and/or evaluated in the secondary system 15〇. SD day U inspection time 44 200903686 controllers (ims, ut f-position - one or more borrowed extra trust value, extra difference, first - construction = outer_value, el) material, or above Any combination, for the first un-, the first difference, or the wafer _ use Lin Feng _ 素 4 outside ^ 2 = „ risk factor; ΐ; ΐ = order; difference or wafer data, or any of the above: Wind is not === prime = verification procedure, the amount of Si required = the second wind program is related to the amount associated with it will be already over; ΐΐ 卜 验 验 验 、 、 、 验 验 验 验 验 验 验 验 验 验 验 验 验 验 验 验 验 验 验 验 验; Π) When the number of additional wafers required is greater than, stop t when the number of additional SD wafers required, etc. ^ When using additional required bits on the additional processed S_D wafer (4), -·^^^( 114 ^ 119 ^ 124 . 129 . 134 . 139.1:^ 154 The quantity ^a2)w has been processed to the new position on the circle on the wafer to obtain additional new unverified information, of which the new position has ^ 45 200903686
S.D 其中新驗證資料包=已卜建立新額外驗證資料， 值、位置建立新額外信賴值；e2)藉使用新額夕ίί 額—未驗證S_D程序^立^ 外差里if 使用新額外風險因素、新額外信賴值、新額 ㉗·值、弟一差異或晶圓資料，或上述任何組合，為第_1、去 ;;有素 素大於新額二Γίίί增力二個；h2)當新總第—風險因 量it第二風險因素的額外未驗證程序、將所需位置的數 數量增加-個;ι2)當所需額外』 曰複步驟a2)〜h2);及爾所需額外沾 曰日0=數里專於零時，停止第一晶圓的驗證。 用文延遲之已處理S_D晶圓上的額外所需位置，-戍更 Γ=，(114、ιΐ9、ΐ24、ΐ29、ΐ34、，..154、ά /5)^此用以執行下列步驟：a3)從受延遲之已處理s_d晶圓上之 中選Ϊ 一位置’其中該位置具有與其相關之 弟，也特斂’ b3)從艾延遲之已處理S_D晶圓上之該位置庐 驗證資料，其中該位置具有與其有關之受延遲未驗^量測 及^檢驗資料；e3)藉使用受延遲之已處理S_D晶圓上的該位置， 延遲之已處理S-D晶圓建立受延遲驗證資料，其中受延遲驗 證f $包含受延遲已驗證量測及/或檢驗資料；d3)藉使用受延遲未 驗證資料與受延遲驗證資料之間的受延遲差異，為受延遲之已處 46 200903686 ϊ 5 = ΐ的該位置建立受延遲信賴值；e3)藉使用受延遲俨賴 異、額外信賴值、額外差異、第-信賴值、第二差 ㈣素_受延遲風險因素、受延遲== ίί任何;:風:Γ夫值、第一差異或晶圓資料，或 延遲臨界極限時，將第一 ^驗 序、將所剩驗證程 延遲總風險因素大於延遲臨界 程序外第二風險_額外未驗證 一個^紅造靖的數量增加 證。J)田又延遲S_D曰曰®的所剩餘數量等於零時，停止驗 处例中’ 一或更多個處理元件能包括：一或更多個 =相關處理兀件、-或更多個s -或更多個S-D檢驗相關處理元件、= : = f里，、 件、-或更多個S-D評估相關元件、^ 測相關元 理元件、-或更多個S_D沉積相^處相關處 處理元件、—或更多個S D = 、—或更多個S-D熱 對準相關處理元件二戍更^=?元件、—或更多個功 多個S-D清潔相關處理元件、ΐ ===元件、一或更 元件、-或更多個S-D氧化相關f新改製相關處理 處理元件或-或更多個S_D外部處理=，、多個氮^目關 此外，第-未驗證S-D程序能二述任何組合。 相關程序、—或更多個S_D^ 或f個奶掃福器 概相關桎序、一或更多個S-D量測 47 200903686 二估相關程序、—或更多個S-D_ :二、或更夕個S-D〉儿積相關程序、一或更多個S-D熱處 ^程^-或更多個S_D塗布相關程序、 準 :s-⑽光相關程序、—或ίί個s樹i?子相 Ι;ί:庠。，傳輸相關程序、一或更多個S_D清潔相 Y 重新改製相關程序、一或更多個S-D氧 邱乂 % :、·/、更多個S_D氮化相關程序或一或更多個S_D外 部私序，或上述任何纟且合。 料、未驗證資料能包括：S-D強度(intensity)資 枓 透射貝枓、S~D 13及收資料、S-D反射率資料、S_D繞射資 料、S-D光學屬性資料或S_D影 才十=、凡射貧 資料能包括歷史資料U ί上_何組合。驗證 f拉貝科' CD如田電子顯微鏡(CD-SEM)資料、穿透式電子顯微 (gooness of fit)資料、臨只尺士次划 界極限此包括適合度 辟資料、彳| 貝枓、正確度資料、波長資料、側 i =^理資料'歷史資料，或上述任何組合。 在第-S-D已處理晶圓上。力s Γ"Γ 驗迅特徵產生SD where the new verification package = the new additional verification data is created, the value and location establish a new additional trust value; e2) the new amount is used to borrow - the unverified S_D program ^ ^ ^ heterodyne in the use of new additional risk factors , new extra trust value, new amount 27 value, brother-differential or wafer data, or any combination of the above, is _1, go;; velocin is greater than the new amount of two Γ ί ίίί force two; h2) when new Total - risk due to the second undetected procedure of the second risk factor, increase the number of required positions - ι2) when needed extra 曰 步骤 步骤 step a2) ~ h2); The next day 0 = several miles dedicated to zero time, stop the verification of the first wafer. The additional required position on the processed S_D wafer has been delayed, - 戍 Γ =, (114, ι ΐ 9, ΐ 24, ΐ 29, ΐ 34, , .. 154, ά /5) ^ This is used to perform the following steps: A3) Select from a delayed processed s_d wafer. A location where the location has its associated brother, and also 'b3'. The location on the processed S_D wafer from the AI delay 庐 verification data Where the location has a delayed untested and measured data associated with it; e3) by using the delayed position on the processed S_D wafer, the delayed processed wafer is created with delayed verification data, The delayed verification f $ contains the delayed verified measurement and/or inspection data; d3) the delay difference between the delayed unverified data and the delayed verification data is the delay of the already being 46 200903686 ϊ 5 = 该 This location establishes a delayed trust value; e3) Uses delayed delay, additional trust value, extra difference, first-trust value, second difference (four) prime_delayed risk factor, delayed == ίί ;: Wind: Coward value, first difference or wafer data, or delay The limit, the first ^ test sequence, the remaining total risk factor authentication process delay than the delay of the second critical program outer unverified additional risk _ a ^ increase in the number of red made Yasushi card. J) The field delays the remaining number of S_D曰曰® to be equal to zero. In the example of stopping the inspection, one or more processing elements can include: one or more = related processing elements, - or more s - Or more than one SD test related processing element, =: = f, , , , or - or more of the SD evaluation related components, the associated metaphysical component, or more than one S_D deposition phase , or more than SD = , - or more than SD thermal alignment related processing elements, ^^? components, - or more work, multiple SD cleaning related processing elements, ΐ === components, one Or more elements, or more than one SD oxidation related f new modification related processing processing element or - or more S_D external processing =, multiple nitrogens, in addition, the first - unverified SD program can describe any combination . Related procedures, - or more S_D^ or f milk sweepers, related procedures, one or more SD measurements 47 200903686 Second evaluation related procedures, - or more S-D_: two, or夕SD>Child-related program, one or more SD heat-processing ^- or more S_D coating related procedures, standard: s-(10) light-related program, or ίί s tree i? ; ί: Hey. , transmission related procedures, one or more S_D clean phase Y re-engineering related programs, one or more SD oxygen % %, , /, more S_D nitride related programs or one or more S_D external Private order, or any of the above. Materials, unverified data can include: SD intensity (intensity), transmission of shellfish, S~D 13 and data, SD reflectance data, S_D diffraction data, SD optical property data or S_D shadow only =, 凡射Poor data can include historical data U 上 on the combination. Verification of Rabeco's CD-like electron microscopy (CD-SEM) data, gooness of fit data, and only the limit of demarcation of the ruler. This includes suitable data, 彳| , correctness data, wavelength data, side i = ^ data, 'history data, or any combination of the above. On the first-S-D processed wafer. Force s Γ"Γ
第-組S-D驗證特徵^生在藉侧一或更多個層， 中，藉曝光_沉積幕H已處理晶81上。在其他範例 已處^上。罩層第-組灿驗證特徵產生在第- S-D 等層貫;=括-或更多個層，該 任何組合。 '化㈣幕罩㈣或平坦化㈣，或上述 在某些範例中，微影相關處理 S-D的幕罩層沉積程序、 仵此執仃此疋S-D及/或非 元件能用來驗證能是s七及/或顯影程序’且評估 曝光程序及/或顯影程序。①的縣層沉齡序、幕罩層 48 200903686The first set of S-D verification features are generated on the borrowing side of one or more layers, and the exposure-deposition screen H has been processed on the crystal 81. Other examples have been placed on ^. The cover layer-group validation feature is generated in the first-S-D layer; = bracket- or more layers, any combination. 'Chemical (four) mask (four) or flattened (four), or in some examples, lithography-related processing SD mask layer deposition procedure, 仃 仃 疋 及 SD and / or non-component can be used to verify that it can be s Seven and/or development procedures' and evaluate the exposure procedure and/or development procedure. 1 county level, ageing, curtain cover layer 48 200903686
S-D 的傳輸襄置量、欲使用傳輪次系統、欲使用 率。 _輪兀件數量、傳輪時間及/或傳輪速 、S_D晶圓狀態資料能依賴 旦 成)位置數量或所剩餘位置數 1、所造訪(所評估/所完 資料能依賴所需程序數量、組合。S-D處理狀態 或上述任何組合。在某；：成剩餘程序數量， 量。產量時間能用來決定需要㈡更，;_元件數 健存程序及與該S-D程序有關之資料能 S-D ίΐί 能新建、精煉、更新及/或使用一或更多個 結構、程序、影⑽括位置相依性如特徵、屬性、 或更一程序來為- 楂於Ϊ Ϊ :二，例中’—或更多個晶圓能由連接到—或更多個s*° 傳輸-人糸'礙101、102)的-或更多個處理元件(112、117、122、127、 132 142: 147、157)來接收’且S-D傳輸次系統(ιοί、1〇2)能連 接到處理系統100中一或更多個次系統(11〇、115、12〇、125、13〇、 13= 140'145'150、155)。各晶圓在其之上能具有一或更多個層， 並月b具有與其有關之晶圓資料，且晶圓資料能包括歷史及/或即時 資料。 一或更多個控制器(114、119、124、129、134、139、144、149、 154、159、195)能用以為第一組S-D晶圓來接收晶圓資料。 一或更多個處理元件(112、117、122、127、132、142、147、 157)能執行一或更多個第一 S-D產生程序，其中所產生之第一組 已處理S-D晶圓’其等在第一數量之評估位置上具有一或更多個 49 200903686 程式庫相關參考特徵。 154、15^ί^Τ(114^19、124、129、134、139、144、149、 態資料，而如晶圓狀 評估程序來評估；^接到中’/一^評估晶圓將要使用第一 S-D 多個次系統中，為/個S_D傳輸次系統之一或更 -或更多個S-D評立第；：操作性狀態；藉使用 利用評估元件；藉使用晶_ 數量的可 建立第一 -數量，或上數任何組合， 估元，的第一數量Ϊ序施⑵圓的數量多於 量時或=:，的第-數 「或更多個評估次系'_5 二·能傳輸到 ⑴7、152)。-或更多個灿傳^欠之f ^的可利用評估元件 次系統135及評估次系統15〇。 …$(10卜102)能連接到檢驗 此外’ 一或更多個控制器⑴4、119 :44、149、154、159、195)能用以：藉使、:134、139、 範，或上述任何組合，決=評估程式庫產生規 ，；從第—S-D評估晶圓上位置的數 f Λ中，第一位置具有與其有關並第定第一位 生的第-程式庫相關參考特徵；從第一 sd 產生私序所 位置獲得第-程式庫相_估資料， ^估晶圓上之第- 關^第-程式庫相關量測及/或檢& =具有與其有 之第一位置建立第一預測資料，^ = f f — S-D評估晶圓上 測及/或檢驗資料；籍使用從第一程式庫二 50 200903686 ^料所計算出的第一程式庫相關差異，在第一 S_D評估晶圓上之 第一位f建ί第一信賴值；藉使用第一信賴值、第一程式庫相關 差異、晶圓資料或上述任何組合，建立第一 S_D評估晶圓上之第 一=置的第一風險因素；藉使用第一風險因素、第一信賴值、第 二程，，相關差異或晶圓資料，或上述任何組合，建立第一 s_d 。平估:圓上之第一位置的第一總風險因素；當第一總風險因素小 ^或等於第-程式庫相關產生限制時，將第—S_D評估晶圓上之 ^ -位置辨識為具有與其有關之第—總風險因素的第—驗證位 ^、將所剩餘的位置減少—個、將已造訪的位置增加—個及將與 中了關之資料作為第一已驗證資料儲存在S_D評估程式庫 ir罢總風險因素大於第一程式庫相關產生限制時，將第 具有與其有關之第二風險因素的第-她Li 餘的位置減少—個、將已造訪的位置增加一個，其中第-，-证位f具有與其有關之已驗證程式庫相關資料。 額外建完成後，能使用第一 S-D評估晶圓上的 估晶C之ί數15=15)能用以執行下列步驟：a)從第一 S娜 考(評估_支；b)從第-SD M a i生的新程式庫相關參 關評估資料，其)中弟新位 1具^ 或檢驗資料；c)在第 坪有；、有t新私式庫相關量測及/ 庫=測資料包含新===== 資料，或上述認任何組合，建一 式庫相關差異 新風險因素，· 〇藉使用新風險因素新信賴上之新 …第-風險因素、第一信賴值、第一‘式庫相 51 200903686 圓貿料’或上述任何《且人奢笙— 新總風關素;g)當新總σ風二二_ 之新位置的 制時，將第，評估晶圓上的二產生限 訪的位置位餘位置的減少—個、將已造 時，將第因素大於新程式庫相關產生限制 二風險因素的新未驗‘ 與其有關之新第 訪的位置增加-個，其中，新咸少一個及將已造 證程式庫相難料；i)當所· * 讀其錢之新已驗 及當所需位置數量等於零日^ 里大於零時，重複步驟a)〜h); S-D坪估t 停止產* S①程式庫的處理。 額外位置°，用額外S①評估晶圓上的 144 > 149 ^ 154 '119 ' 124 ^ 129 ^ 134 ^ 139 ^ 外S-D評估曰η . 亦能用以執行下列步驟：al)選定-額 量；cl)從額^ ^估^外S_匕評估晶圓之所需位置的第-數 外位置，其中，額外曰曰^；之弟一數量的所需位置中選定-額 序所產生的其有關並藉使用第一 S-D產生程 晶圓上之額外位置^H平估)特徵；dl)從額外S-D評估 置具有r :卜財軸_估:倾，其巾，額外位 S-D評估晶圓i之 測及/f檢驗資料；⑷為額外 資料包含額外預測量測及/或檢驗^料預，其中，額外預測 額外S-D評估曰曰圓斤计异出的額外程式庫相關差異，為 信賴值、額外^式庫相立額外信賴值；gi)藉使用額外 第一信賴值、第一、新“賴值、新程式庫相關差異、 52 200903686 二庫相關差異或晶圓資料’或上述任何組合，為額外S-D評 之額外位置建立額外總風險因素；u)當額外總風險因素 二額外程式庫相關產生限制時，將額夕卜S_D評估晶圓上 =卜^置辨識為具有與其錢之额外總風險因素_外已驗證 ㈣位置的數4減少—個、將已造訪位置的數量增加一 ^ Λ置有關之觸作為㈣證資_存树估程式庫 ί因位置辨識為具有與其有關之額外第二Ϊ = 位置1所需位置的數量減少—個、將已造 )J ) ’及虽額外S-D坪估晶圓無法利用時，且 量ίΓ時’停止產生S_D程式庫的處二曰曰S-D transmission capacity, the use of the transmission system, and the rate of use. _The number of rims, the transfer time and/or the transfer speed, the S_D wafer status data can depend on the number of positions or the number of remaining positions. 1. Visits (the estimated/completed data can depend on the number of programs required) , combination, SD processing status or any combination of the above. In a;: into the number of remaining programs, quantity. The production time can be used to determine the need (2) more,; _ component number storage program and information related to the SD program can be SD ίΐί Ability to create, refine, update, and/or use one or more structures, programs, shadows (10), positional dependencies such as features, attributes, or a program for - 楂 Ϊ 二 : 2, in the case ' or Multiple wafers can be connected to - or more s*° transmissions - or more processing elements (112, 117, 122, 127, 132 142: 147, 157) To receive 'and the SD transmission subsystem (ιοί, 1〇2) can be connected to one or more subsystems in the processing system 100 (11〇, 115, 12〇, 125, 13〇, 13=140'145'150 , 155). Each wafer can have one or more layers thereon, and the monthly b has wafer information associated therewith, and the wafer data can include historical and/or real-time data. One or more controllers (114, 119, 124, 129, 134, 139, 144, 149, 154, 159, 195) can be used to receive wafer material for the first set of S-D wafers. One or more processing elements (112, 117, 122, 127, 132, 142, 147, 157) can execute one or more first SD generation programs, wherein the first set of processed SD wafers produced They have one or more of the 49 200903686 library-related reference features at the first number of evaluation locations. 154, 15^ί^Τ(114^19, 124, 129, 134, 139, 144, 149, state data, and evaluation as a wafer evaluation program; ^ received the '/ one ^ evaluation wafer will be used In the first SD multiple subsystems, one or more S/D transmission subsystems or more than one SD rating;: operational state; by using the evaluation component; by using the number of crystals One-number, or any combination of upper numbers, the first quantity of the estimated quantity, the number of rounds (2) is more than the quantity or =:, the first number "or more than one evaluation sub-system"_5 To (1) 7, 152). - or more can pass the evaluation component sub-system 135 and the evaluation sub-system 15 〇. ... $ (10 bu 102) can be connected to the inspection in addition to 'one or more Controllers (1)4, 119:44, 149, 154, 159, 195) can be used to: borrow, : 134, 139, nor, or any combination of the above, determine = evaluation library generation rules; from the first - SD evaluation In the number f Λ of the position on the wafer, the first position has a first library-related reference feature associated with it, and the position of the private sequence is obtained from the first sd The first-level library-estimate data, estimate the first-level on the wafer--the library-related measurement and/or check &= has the first prediction data with the first position, ^ = ff — SD evaluates the on-wafer measurement and/or inspection data; using the first library-related difference calculated from the first library 2 50 200903686, the first f-figure on the first S_D evaluation wafer a first trust value; using the first trust value, the first library related difference, the wafer data, or any combination of the above, establishing a first risk factor of the first=set on the first S_D evaluation wafer; Risk factor, first confidence value, second pass, relevant difference or wafer data, or any combination of the above, establish the first s_d. Flat estimate: the first total risk factor at the first position on the circle; When the risk factor is small or equal to the first-database related generation limit, the position on the first-S_D evaluation wafer is identified as the first-verification bit with the first-to-total risk factor associated with it, and the remaining position is Decrease one, increase the location that has been visited, and will be in the middle As the first verified data is stored in the S_D evaluation library, the total risk factor is greater than the first library related generation limit, and the position of the first and second Li factors related to the second risk factor is reduced. Add one location to the visited location, where the -, - the certificate f has information about the verified library associated with it. After the additional construction is completed, the first SD can be used to evaluate the number of crystals on the wafer. 15=15) can be used to perform the following steps: a) from the first S Nacao (evaluation_branch; b) from the new library related to the -SD M ai related assessment information, its new position 1 Have ^ or inspection data; c) have on the ping;; have a new private library related measurement and / library = test data contains new ===== data, or any combination of the above, build a library related differences new Risk factors, · 〇 use new risk factors, new trust, new... first-risk factor, first trust value, first 'type library phase 51 200903686 round trade materials' or any of the above-mentioned "and extravagant - new wind Guan Su; g) When the new total σ wind 22 _ new position system, will be the first, on the evaluation wafer The decrease in the position of the position where the restricted visit is made, the time when the time is created, the new factor of the new factor in the new library related to the new library is increased, and the position of the new interview is increased. It is difficult to make a new salty one and it will be difficult to read the library; i) when the new reading of the money has been checked and when the required number of positions is equal to zero day ^ is greater than zero, repeat steps a) ~ h); SD Ping estimates t stop production * S1 library processing. Additional position °, 144 > 149 ^ 154 '119 ' 124 ^ 129 ^ 134 ^ 139 ^ external SD evaluation 曰 η on the wafer with additional S1 can also be used to perform the following steps: a) selected - amount; Cl) from the amount ^ ^ estimate ^ S_匕 to evaluate the position of the first position of the desired position of the wafer, wherein the additional 曰曰 ^; brother of a number of desired positions selected - the order produced by it Relevant and borrowed from the use of the first SD production process on the wafer to determine the additional position of the feature; dl) from the additional SD evaluation set with r: 财 轴 axis _ estimated: tilt, its towel, extra bit SD evaluation wafer i test And /f test data; (4) additional forecasting and/or testing data for additional data, wherein the additional forecasting additional SD evaluation is related to the additional library related differences, which is the trust value, extra ^ Additional trust value; gi) by using an additional first trust value, first, new "value, new library related differences, 52 200903686 two library related differences or wafer data" or any combination of the above, for additional SD evaluates the additional location to establish additional total risk factors; u) when additional total risk factors are two additional When the library is related to the restriction, the amount of the visited position is increased by the number of the additional total risk factors _ the externally verified (four) position is reduced. ^ 有关 有关 作为 作为 作为 作为 作为 作为 作为 作为 作为 作为 作为 作为 作为 作为 作为 作为 有关 有关 有关 有关 有关 ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί ί Although the extra SD ping is not available when the wafer is not available, and the amount is reduced, 'stop the generation of the S_D library.
處理晶圓:第”!量正;作；，藉由使用介於s-D 1cn v iZ4 129、134、139、144、149、Η4、 sm^)能用以決定受延遲S_D晶圓的第—數量，且一戍更多個 段=====請能以第一 γ數，使用介於S-D評估晶圓之第一 ^4 遲s。晶圓的第」:量以 理次系統中一或更多‘ S-D處: = 料;決定第一處 決定第-受延遲S_D評估“作性狀態資料； 件’及當第-剛才· S_D評估元件無=時用，== 53 200903686 外個剛才可_沾評狀件可利用時， ^之一或更夕個值於序，A—或更多個傳輸次系統(1CU、102) 在ίι外k φ剧2 1G4能用以傳輸—或更多個受延遲晶圓。 ,, ' & ，>正動作能包括停止處理、暫停處理、再古平 #；ϊ ltT：n &8 ' r，二㈣::：估; 度地圖組計算已處理S_D日日日圓的S_D信賴 徵的信賴U ==二更多嫩 量㈣^寺枓產生在各已處理S'D晶圓上之第一數 立第L組評估晶圓糟使用已處理沾晶圓的S_D信賴度地圖，建 賴产^組Ϊ外處理步驟能包括：計算已處理S_D晶圓的S_D信 特S_D信賴度地圖包括一或更多個程式庫相關參考 數二二杜’該等資料產生在各已處理S_D晶圓上之第一 ;當第—沾信賴度地圖中之—或更多個值未在 個· 的關内時’將所需評估位置的數量減少一或更多 限的S'D信賴度地圖中之一或更多個值有在第—信賴極 勺^圍内B寸，將所需評估位置的數量增加一或更多個。 險評ΙΐΪ額Ϊ處理步驟能包括：計算已處理S_D晶圓之S七風 表考特徵二—S_D風險評估地圖包括—或更多個程式庫相關 之ΐίίΐ風險評估資料，該等資料產生在各已處理S-D晶圓上 值夫在楚it砰估位置；當第一 S_D風險評估地圖中一或更多個 或更夕個了信賴極限的範圍内時，將所需評估位置的數量減少一 作賴ίρρ从士當第一 S-D風險評估地圖中一或更多個值有在第— 。的乾圍内時，將所需評估位置的數量增加一或更多個。 替代的實施例中，第一組非S-D晶圓能加以決定，這些 54 200903686 j能包括:或處J使=:S_D處理次 更多個第—巧統中的-或更多個第用f決定一或 在某些實施例中，S_D評估程式 1 70件。 資料、处量測資料、S_D檢驗度2生規範 性資料，或上述任何組合。貝抖沾處理育料或沾均句 圖2根據本發明之實施例，說明 方法的例示性流糊。晶·包括-或更多個層，# = f = 合。在某些情況下，S_D程序能在整個生 ’而在其他情況下，在生產週期早期階段時，S-D 私序此在執行較為關鍵處理的步驟時使用。在某些範例中，sd 程序可用以：解釋NMOS與PMOS結構間的流動差異；找到測試 、’、。構，改善配線見度粗糙度及/或配線邊緣粗糙度；及改盖聂 測問題。 ^ 在某些範例中，晶圓資料能包括即時資料、歷史資料、S_D 信賴度資料、非S-D係賴度資料、S-D風險資料、非S_D風險資 料、S-D限制資料或非S-D限制資料，或上述任何組合。 在205中，一或更多個晶圓能藉由處理系統(1〇〇)之一或更多 個次系統(1(Π、102、110、115、120、125、130、135、140、145、 150、155)接收。在某些實施例中，一或更多個晶圓能由連接到一 或更多個次系統(101、102、110、115、120、125、130、135、140、 145、150、155)的一或更多個傳輸次系統(101、1〇2)接收。或者， 一或更多個晶圓能由一不同的次系統接收。此外，系統控制器195 能用來接收一或更多個晶圓的晶圓資料。或者，部分晶圓資料可 55 200903686 由一不同的控制器接收。晶圓資料能包括歷史及/或 個日料能包括S_D及/或非S_D地圖，該等地圖包括: 或更夕個日日II的.晶圓相關地圖、處理相關地圖、 參考地圖、量測地圖、預測地圖、風險地圖、檢驗^圖子估=也 圖、評估地圖、微粒地圖及/或—或更多個信賴度地 =’1製1Ϊ2執^系統180能與系統控制器、195及—或更多個次系 統(10卜 102、110、U5、120、125、130、135、140、145、150、 交2L且該龍能絲決定及/或控制處理次序及/或傳輸 料可用來決定S_D及/或非S_D程序何者用於各晶 感應^資==、次系統資料、處理室資料、產品資料、 S D S_D晶圓及非S_D晶圓。沾晶圓狀態資料能為 =’而非^晶圓狀態資料能為非S_D晶圓而建立。 及使用晶Μ料及S_D晶圓狀態資料，S-D處理 Ϊ 晶圓建立。#制晶® f料及非S—D晶圓 可“其他1序及傳輸次序能為非S_D晶圓建立。或者， 程式程序、S_D晶圓及/或S_D 序、s 目關次序能包括沾產生程序、s-d傳輸程 ，ί評估程序、S-D量測程序或S-D檢驗程序， 圓能用-或更乡。—或更多個S_D晶 序來驗證。 相關知序來處理’並能用處理驗證處理次 渠結構、二i記原極ΐ構、電容器結構、通孔結構、溝 準2、寸:陣列、週期性結構、對 上述任何組合。 Μ 寺徵、損壞結構或參考結構，或 56 200903686 產生H處非處理次序能包括·一或更多個幕軍Processing wafer: "!" is positive; made; by using sD 1cn v iZ4 129, 134, 139, 144, 149, Η4, sm^) can be used to determine the first number of delayed S_D wafers And more than one segment ===== Please use the first gamma number, use the first ^4 of the SD evaluation wafer later. The first "wafer": the amount of the system in the system More 'SD': = material; decides the first decision - the delayed S_D evaluation "the status data; the piece" and when the first - just · S_D evaluation component has no =, == 53 200903686 _ When the evaluation piece is available, ^ one or more values are in order, A - or more transmission subsystems (1CU, 102) in ίι outside k φ drama 2 1G4 can be used for transmission - or more Delayed wafers , , ' & , > positive actions can include stop processing, pause processing, re-Gupin #; lt ltT:n & 8 ' r, two (four)::: estimate; degree map group calculation has been The S_D trust reliance on the S_D day yen is U == two more tenders (four) ^ 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓 枓Wafer's S_D reliability map, built on Lai The group external processing step can include: calculating the S_D signal S_D reliability map of the processed S_D wafer including one or more library related reference numbers 22 Du's. The data is generated on each processed S_D wafer. First; one of the S'D reliability maps that reduces the number of required evaluation positions by one or more when the number in the first-in-one reliability map is more than one or more. The value of more than one value is increased by one or more in the first-trusted range, and the number of required evaluation positions is increased by one or more. The evaluation process may include: calculating the S of the processed S_D wafer Seven Winds Test Features - S_D Risk Assessment Map includes - or more library related ΐ ίίΐ risk assessment data, which is generated on each processed SD wafer. When one or more or more of the S-D risk assessment maps are within the range of the trust limit, the number of required evaluation positions is reduced by one or more values from the first SD risk assessment map. The number of locations to be evaluated when in the dry perimeter of the first Adding one or more. In an alternative embodiment, the first set of non-SD wafers can be determined, and these 54 200903686 j can include: or J ==S_D processing times more - in the system - Or more than f decides one or in some embodiments, the S_D evaluation program is 70. Data, measurement data, S_D test degree 2 raw normative data, or any combination of the above. Material or Stained Figure 2 illustrates an exemplary flow of a method in accordance with an embodiment of the present invention. Crystal · includes - or more layers, # = f = combined. In some cases, the S_D program can be used throughout the life cycle, and in other cases, during the early stages of the production cycle, the S-D private sequence is used when performing the more critical processing steps. In some examples, the sd program can be used to: interpret the difference in flow between the NMOS and PMOS structures; find the test, ',. Structure, improve wiring visibility roughness and / or wiring edge roughness; and change the Nie test problem. ^ In some examples, wafer data can include real-time data, historical data, S_D reliability data, non-SD-based data, SD risk data, non-S_D risk data, SD-restricted data, or non-SD-restricted data, or Any combination. In 205, one or more wafers can be processed by one or more subsystems of the processing system (1, 102, 102, 110, 115, 120, 125, 130, 135, 140, 145, 150, 155) receiving. In some embodiments, one or more wafers can be connected to one or more subsystems (101, 102, 110, 115, 120, 125, 130, 135, One or more transmission subsystems (101, 1〇2) of 140, 145, 150, 155) are received. Alternatively, one or more wafers can be received by a different subsystem. Further, system controller 195 Can be used to receive wafer data for one or more wafers. Alternatively, some wafer data can be received by a different controller at 55 200903686. Wafer data can include history and/or daily materials including S_D and / Or non-S_D maps, including: or the same day of the day II. Wafer-related maps, processing related maps, reference maps, measurement maps, forecast maps, risk maps, inspections, maps, estimates, Evaluating maps, particle maps, and/or—or more than one reliability = '1 system 1 Ϊ 2 execution system 180 can be with system controllers, 195 and — or more System (10, 102, 110, U5, 120, 125, 130, 135, 140, 145, 150, 2L and the dragon can determine and/or control the processing sequence and/or the transmission material can be used to determine S_D and/or Non-S_D programs are used for each crystal sensor ==, subsystem data, process room data, product data, SD S_D wafers, and non-S_D wafers. The wafer state data can be =' instead of wafer state Data can be created for non-S_D wafers. Also using wafer materials and S_D wafer status data, SD processing 晶圆 wafer setup. #晶晶® f materials and non-S-D wafers can be "other 1 sequence and transfer order can be Non-S_D wafers are established. Alternatively, the program, S_D wafer and/or S_D sequence, s order can include the dip generating program, sd transmission path, ί evaluation program, SD measurement program or SD verification program. - or more townships - or more S_D crystal sequences to verify. Relevant know-how to process 'and can use processing to verify the treatment of the secondary channel structure, the second-order original pole structure, capacitor structure, through-hole structure, trench 2 , inch: array, periodic structure, any combination of the above. 寺 Temple sign, damaged structure or reference structure, or 56 200903686 Generate non-processing order at H can include one or more curtains
多個蝕刻程序次ί J 、-或更多個塗布程序、―或J -或更多個摻雜程里程序、-或更多個植入程序 序、一或更多個氮化程序5 光程序、—或更多個氧化程 顧夢寇庠、_+、矛序、一或更多個游離化程序、一或更夕& 二ϊ更多個量倾—或更多個掃描器相關裎ΐ、έ 新改製程序、—或f、—或更多個重 更多個直*腿儲存私序、一或更多個傳輪程序、-或 何組合了二、 ）程序或一或更多個清潔程序，或上述ί 勃一範例中，s_d處理次序能包括能用較小數量之曰圓步 相if生的先理程序。預士及/或事後處理程序能ΐ位置 估程序。或者曰、f估、量測、檢驗、驗證及/或損壞評 處理-欠岸处/吝么了以疋非位置相依性的。在產品生命期期間， 二在產σσ成熟期間改變許多次，且絲處理及/或事後卢 的知度可因不同晶圓及/或不同時間而有不同。一些 = 估、損壞評估、峨及/或先送(send:ahL)晶^ 及，或驗證時’處理結果會有變化，額外程序二 ίϋ的圓來執行。舉例而言，當需要額外S_D程序時，預 ^及/或事後處理程序能個晶社―預先決定之數量的位置來^ 在215中’藉使用一或更多個S_D驗證相關次序、晶圓 資料及其他所需資料’能決定各S_D晶圓之所需產 生，序的數1。此外’藉使用-或更多非S-D驗證相關次序、曰 圓貢料、及非S-D晶圓狀態資料，能蚊各非S_D晶圓所需之= 生程序的數量。或者，可使用額外資料。 在某些狀況下，晶圓狀態能包括所需處理相關位置的數量、 所造訪處理相關位置的數量或所剩餘處理相關位置的數量，或上 57 200903686 產ΛΤί為f待處理雜 序。SD產^庠处用*雜:私序能包括一或更多個處理相關程 s-d ^ 在220中’藉使用一或更多個S-D處理次序、晶圓資枓 产定各S_D敝所咖J二貝量科= ，使用或更夕個非S-D處理次序、晶圓資料及非沾 =外^定各非S_D晶圓之所需評估程序的數量。或ΐ，可^ 旦些情況下，晶圓狀態資料能包括所需評估相關位置的數 造^，相關位置的數量或所剩餘評估相關位=數 或上述任何組合。S-D評估程序能為「待評估 晶，、程序及/或程式庫來加以決定，且S_D評包) 括-或更多個驗證、評估、量測、檢驗及/或測 =Multiple etching procedures ί J , - or more coating programs, or J - or more doping procedures, - or more implant programs, one or more nitriding programs 5 light Program, - or more oxidation processes, _+, spear order, one or more dissociation programs, one or more eves & two more slanting - or more scanner related 裎ΐ , έ new restructuring procedures, — or f, — or more, more than one straight leg storage private sequence, one or more routing programs, — or a combination of two, a program, or one or more In the cleaning procedure, or in the above example, the s_d processing order can include a procedural procedure that can be generated with a smaller number of rounds. The pre-war and/or post-processing procedures can be used to evaluate the location. Or 曰, f estimation, measurement, inspection, verification and/or damage assessment - owing to the shore / 吝 了 疋 疋 位置 位置 位置 。 。 。 。 。 。 。 。 。 。 。 。 。 。 During the life of the product, the second is changed many times during the σσ maturity, and the knowledge of the silk treatment and/or the after-the-fact may vary from wafer to wafer and/or from time to time. Some = estimate, damage assessment, 峨 and / or send (send: ahL) crystal and / or verification, the processing results will change, the extra program is used to execute the circle. For example, when an additional S_D program is required, the pre- and/or post-processing program can have a pre-determined number of locations. In 215, 'by using one or more S_Ds to verify the relevant order, wafer The data and other required data 'can determine the required generation of each S_D wafer, the number of orders. In addition, by using - or more non-S-D verification related orders, 贡 贡 、, and non-S-D wafer status data, the number of non-synchronous programs required for non-S_D wafers. Alternatively, additional information can be used. In some cases, the wafer state can include the number of locations required to process, the number of locations associated with the processing process, or the number of remaining processing-related locations, or the pending processing order. SD production ^ 庠 * : : : : : : : : : : : : : : : : : : : : : : : : : 私 私 私 私 私 私 私 私 私 私 私 私 私 私 私 私 私 私 私The number of required evaluation procedures for each non-S_D wafer is used for the non-SD processing order, wafer data, and non-sticking. Or, in some cases, the wafer status data can include the number of locations needed to evaluate the relevant location, the number of related locations or the remaining evaluation correlation bits = number or any combination of the above. The S-D assessment procedure can be used to determine the crystal to be evaluated, the program and/or the library, and the S_D assessment package includes - or more verification, evaluation, measurement, inspection and/or measurement.
Ct0.be.verif^ ^ ^ S-D %式庫來加以決定。將在欲使用之驗證次系統中使用之=二 次系統及/或S:D評估元件可用S_D評估程序來辨識出。-汗估 旦他情1兄下’晶圓狀態資料能包括所需驗證相關位置的數 =、訪驗證湖位置賊量或所職驗證 旦 或上述任何組合。S-D驗證程序能為「待驗=置的數里 :置:晶圓、程序及/或程式庫來加以決 括或更多個驗逢、§平估、量測、檢驗及/或測試程 = 程序能时纽使狀驗證:欠t財纖 f = S-D驗證元件。 铖吸-人糸統及/或 在225巾，藉使用S-D次序資料、載入資料、 操作性狀態資料、程序資料、系統資料、次 =生貝料、 圓資料或S-D晶圓狀態資料，或上述^ = 晶 ，之-或更多個S-D傳輸次序。此外，能建 晶 或更多個非S_D傳輸次序。或者，可使用不同^。七日曰固之- 58 200903686 輸第組定，並_傳 ^:其他相關晶圓做出決策、。一弟或二固「t ===在「處理期_。此外，傳輸及/或處=== 皮=t十或減低弟一晶圓效應」（“first wafer effectS，，）。S-D傳輪次 元Ϊ的數S①傳輸次系統、欲使用之傳輸裝置及/或 件=數里、載入次序、傳輪時間及/或傳輪速率。 多個影相關次序時，藉使用微影相關產生程序，—或更 多I估舰能產生在一或更多個S_D晶圓上之-ίϊ 關次ί某個于系統(180)能提供一或更多個驗證相 更吝—/更夕個處相關次序、—或更多個產生程序、-或 在程序或一或更多個傳輸次序，或上述任何植 立二或驗統(18G)能提供資訊，利用該資訊能建 遞元序能為以下建立：在次系統内連接_部S-D傳 間的交^兀静及件之間的交換、傳輸元件與處理元件之 沾次純靖元件之_嫩傳輪元件與非 7,ΐ S'D r4iI J {iipr0CQSSin^^mm^ 性狀ΐϊϊ ί钱Λ之;'或更多個可利用S_D處理元件。操作 理元件。在綱==處更 件來執仃處理’且傳輸:欠序可建絲允許贿理發生。 59 200903686 ^ 間、處理元件的仰^處理步職/雜置的預期處理時 更多個處^===風_、信_料及/或—或 理元件可利用時，藉使用8七傳 弟严處 圓之其他S-D晶圓益法利用ςη^兀1午"这組沾處理晶 系統，該組s-d理f圓:3=3時，藉使用S_D傳輪次 次序能加，並用f ^性狀態能改變。即時傳輪 —S-D處理元件。藉進出於微影相關次系統中的第 ί,ΐί ί ,ίΐ二統，_得已更新之操作性狀態。藉即時 更新4入ί料件及’或-或更多個傳輸次系統’能獲得已 ηιΓϋ包延遲程序及提供受延遲資料的「受延遲」 爲严ί及及/或「受延遲」傳輸次序’受延遲晶圓能接 ，處„輸。舉例而言，當辨識出一 接 件時，使用「受延遲」傳輸次序，i 利ί」S_D== 傳輸到—或更多個評估樣_該「剛才可 * j 235中’能執行產生程序。—已驗證S_D產生程序能使用 更^ ’該已驗證晶®在—或更多個位置具有一或 _ 一未驗證S_D產生程序能使用來產 個未驗执特彳！^ ^未驗雜®在—或更多個位置具有-或更多 料能在ί行沾i、=理元件^處理次系統資 /或儲存。 次非S_D產生耘序之珂、之中及/或之後獲得及 200903686 在某些產生程序期間，在S_d程序之—赤Φ夕 間，輸出資料能從-或更多個處理相錄位^《個處理步驟期 個晶_S-D信賴度資料能藉由將s_ g二^-或更多 相依性位置所建立之-或更多個s_ 貝=對於位為處理 五在240中，現行曰曰曰圓何時需要額外勃 決定。當現行晶圓需要另-產生程序時，程執行查詢來 而當現行關不需要另—產生程料，程序2Q() ^f回到240， 在245中，能建立第一組s①評估晶^ 到250。 晶圓能包括第一數量之S_D晶圓。 且弟一組S-D評估 在250中’ 一或更多個第一 έ日q p\ ， 多個評估次系統中之-或更多個可利用能，到一或更 態資料能為-或更翅評m統巾 轉。操作性狀 來加以決定，域雜狀態觸能 評估元件 評估元件。在某些替代情況下二=或更多個可利用S_D 執行，且傳輸次柯建絲鱗評估元件來 第一組S_D評估晶圓能傳輸到，—或更多的 多個可利用S-D評估元件。操作^能中之-或更 次系統t之-或更多個S_D評估^為—或更多侧衾驗 對資:例括評估元件之配 ==錢曝、_錢乡彳_^=== 在某些範例中，當S-D評估晶圓沾穿^ f平估元件的第—數量時，傳輪次於或等於可利 組S-D晶圓的第—數量多於J =可=用評估元件。當第_ 更多個修正動作能抑施加，=的第—數量時，-或 /、中，可利用評估元件的第—數量 61 200903686 由第一操作性狀態來決定。 圓、二予=。評估晶圓能包括第-晶 選定決策能基於二剩晶圓能予以查驗。 量、所需評估及/或驗證位置的數量:二二=晶圓的數 數量==或驗，0==位置的 -位置能從第-。在某些範例中，第 第=置能具有與其有;=一= 上位；外位置能從第，評估晶圓 ίϊ第t 額触置能具有與其有關並藉 能是最重要晶圓之估特徵。第一晶圓 資ί其他範例中，決策係能基於源自額外晶圓職受 評二 ^驗^而言’量測程序能提供量測資料，檢驗^能: 在某些範例中，第-位置能從評估及/或驗證 ΓΓίΓ選^ ’且第—位置具有與其有關之第— n:雜紐第—位置獲得，且第—位置的第-未驗 ，料能為第-位置建立，且第—驗證資料能包括已貝m ίί驗it藉使用第—未驗證資料與第—驗證資料之間 ^二第-仏賴度育料能為第一位置建立，而藉使用第—传賴值， 於第一_艮時’第一位置能辨識為:有= 弟仏賴私度的第-已驗證位置，所剩餘位置的數量能減少 62 200903686 一個，且所造訪位置的數量能增加一個。當第— ^咖限時，第一位置能辨識為具有與其有關⑦ 度的第-未驗證位置，所剩餘位置的數量能減少」：弟 位置的數量能增加一個。 個且所造汸 在某些實施例中，未驗證資料能包括針對 電晶體中的閘極結構、電晶體中的汲極結構貝料沾 記憶體結構、側壁角度、臨界尺寸、陣列、週 =特徵、應變特徵、損壞結構或參考結構，二 &。在其他實施例中，未驗證資料能包括評估資料》==、、且 檢驗資料、對準資料、驗證資料、處理雜、 。貝，庙 ，、歷史資料、即時資料、光學資料、層51敎^ 日守間賢料’或上述任何組合。或者，可制其师料、處理貝枓或 在某些實施例中，已驗證資料能包括針對列 ='、、。構、電晶體中的源極結構、電容器結構 -玉 巧週期性結構、對準特徵、摻雜特徵 2考結構，或上述任何組合。在其他實施驗 =估資料、量測資料、檢驗資料、對準H以枓j ;斗工;『=程5庫資料、歷史資料、即時資料:光學！ 資Ϊ處理韻_料，或上述任何組合。或者，、 -或ί H ϊ到—或更多個信賴度及/或風險限制時， 達到一或更多個限辦，能予以施加修正動作。 疋田未 料；驗證程式庫中的第一 S-D已驗證資 輪料及有關的第一已驗證評估資料;且匕：=的以 63 200903686 做為第一已驗證信號資料的特徵。 時驗驗證;料。舉例而言:: ϋίίίΐΐ °歷史驗證資料能战存的資料。 圓、i序及/Π制時，S-D評估特徵、結構、資料、晶 睥，广此接受驗證。當多重位置及/或晶圓接受評估 上能為個別晶圓及/或群組晶圓來建立。或 Ϊ舉例而言，信賴度資料的值能從零涵蓋到 ί料的執r此外’風險 代表最低風險狀況。或者，；：或南風險狀況’而九 有與;=界極限時:正受評估的項目能辨識為具 (最不正確)臨界^時又，正t賴^風險因素。當達到另外 私度的仏賴度及域高顺因素的未驗證項目。/、有〜、有關之低 在270中，一查詢能執行來決定評估 成…步驟200能分支到步驟275 右评估未完 能分支到步驟285。 而田汗估完成時，步驟200 額外能執行來決定是否需要額外位置。卷需要 :t置時，程序2()()㉟折回步驟26G ;而當不需要二二而士要 私序200能折回步驟28〇。 田不而要額外位置時， 需要^⑽中，—查詢能執行來決定是否需要額外評估日η本 晶圓時’程序200能折回步，驟255 .而卜°當 砰估晶圓時，程序勘能折回步驟285。 5，而备不需要額外 在挪中，-查詢能執行來決定現行次序是否已經完成。當 64 200903686 現行次序已經完成後，程序200能折回到步驟290，而當現行次序 還未完成時’程序200能折回到步驟215。 在290中，一查詢能執行來決定是否需要額外次序。當需要 額外次序時’程序2⑻能折回到步驟21〇，而當不需要額外次序 時，程序200能折回到步驟295。程序能在295結束。 —在^些實施例，第一雙重圖案化(d〇uble_patteming)次序能先執 订’接著執行第二雙重圖案化次序。第一組晶圓能由處理系統(1〇〇) 中之一或更多個次系統(101、102、11〇、115、120、125、13〇、135、 =0、I45、150、I55)接收，且藉利用第一 s_D雙重圖案化處理次 ’-，更多個第-圖案層能產生在—或更多個第—組圖案化晶 ^第一 S_D處理次序能用處理系統(100)中之一或更多個次系 li·^102、110、115、120、125、130、135、140、145、150、 。接ΐ、’藉使用第一 S①評估程序，第一信賴度資料 一貧料能為第—組圖案化晶圓建立，而藉使用源自第 -赤V” 的資料，第一組高信賴度晶圓能加以建立。接著， “二二ίΐΐ案層能產生在第二組圖案化晶圓上，且藉 案3 L產度晶圓來執行第二S_D處理次序，第二組圖 更多序S處理系_)中之一或 145 > 150 . . 110、115、120、125、130、135、140、 多個第二圖宰且，使用掃描器次系統(115)，一或更 為第二組圖案化曰:，第二信賴度資料及/或第二風險資料能 程序的資料第m，使用源自第一及域第二s-D評估 户η純賴度晶圓能加以建立。 屬職層=處理次序能用來產生第一雙重金 SD ί 0 或更多個S-D微影相關即時執行’且能包括：一 一或更多個S-D檢驗相_&或更夕個处掃描器相關程序、 仏驗相關程彳、一或更多個S-D制相關程序、 65 200903686 -或更多個S-D評估相關程序、—或更多個S_D侧相關程序、 -或更多個S-D沉積相關程序、—或更多個S_D熱處理程序、一 或更多個S-D、塗布相關程序、一或更多個S_D對準相關程序、一 或更多個S-D拋光相關程序、一或更多個S_D儲存相關程序、一 ,更^固S-D傳輸程序、一或更多個S_D清潔相關程序、一或更 夕個_D飾改製糊程序、—或更多個S_D氧化相關程序、一 或更多個S-D氮化相關程序或—或更多個S_D外部程序，或上述 任何組合。 ，3^據本發明之實施例，繪示晶圓地圖的簡化圖。所說明 ，晶圓地圖表示為具有—百二十五個晶片/晶粒，但本 S ^要如此。或者’可表示不同數量的晶片/晶粒。此外， 圓形僅為說明性質，本發明並非需要如此。舉例而言， 形晶圓替換’且晶片/晶粒可具有非圓形的形狀。 個曰曰300上的晶圓地圖320包括有一或更多 3K)。所緣示之行與列，以編號零到十二來說明。此 2圖=十ΐ個位置33g能絲界定與所綱之晶圓 (3〇ί 302彳私序用的區位。此外，緣示有二環狀虛線 t =ί ί ί顧來建立位於晶圓上的外部區域305、 域306及内部區域307。或者，可在晶圓地圖划上建立且 ί/^ 數量的區域’且可在晶圓上的不同區位為仙 建或更多個量測、檢驗及/或評估位置能 制丄ίϊ::曰圓區域。舉例而言’當S_D策略、計書及/或 二及/或評估程序並不需要包靖使 具、二 66 200903686 商可歷史性地在晶圓上選擇數個位址。 此外，當製造商越有信心，認為該奋 _ 品及/或裝置時’便能減少在及/或非S d ^、、’貝生產尚品質產 量。 狂斤〒使用的位置數 當需要新及/或額外量測資料、檢 外S-D資料能從晶圓上一或更多個^及料時，額Ct0.be.verif^ ^ ^ S-D % library to decide. The =secondary system and/or S:D evaluation component to be used in the verification subsystem to be used can be identified by the S_D evaluation procedure. - Khan estimates that he is under the 1st brother's wafer status data can include the number of required verification related positions =, visit the verification lake location thief volume or the job verification or any combination of the above. The SD Verification Program can be used for "inspection = set number: set: wafer, program and / or library to be determined or more, § flattening, measuring, testing and / or testing procedures = The program can be used to verify the status: owe t-fibre f = SD verification component. 铖 - - 糸 及 and / or in 225 towel, by using SD order data, loading data, operational status data, program data, system Data, sub-material, raw material, circular data or SD wafer status data, or the above-mentioned ^ = crystal, or more or more SD transmission order. In addition, crystal or more non-S_D transmission order can be built. Or, can be used Different ^. Seven days of tamping - 58 200903686 Lose the first set, and _ pass ^: other related wafers make decisions, one brother or two solid "t === in the "processing period _. In addition, transmission and / or ========================================================================================================== , loading order, transit time, and/or transfer rate. When using multiple shadow-related sequences, use lithography-related generation programs—or more I estimate that the ship can be produced on one or more S_D wafers. ί ϊ 某个 于 于 于 于 于 某个 于 某个 于 于 于 于 于 于 于 于 于 于 于 于 于 于 于 于 于 于 *** *** *** *** *** *** *** ***More generating programs, - or in the program or one or more transmission orders, or any of the above-mentioned two or the first (18G) can provide information, using the information to build the meta-order can be established for the following: In the system, the connection between the SD and the SD is static and the exchange between the components, the transmission component and the processing component are the same as the components of the pure component. The tender transmission component and the non-7, ΐ S'D r4iI J {iipr0CQSSin^ ^mm^ traits ί Λ Λ ;; ' or more can use S_D processing elements. Operational components. At the level == more to handle the processing 'and transmission: under-order can be allowed to allow bribery. 59 200903686 ^ Inter-process, processing component, processing, stepping, miscellaneous, expected processing, more places ^=== wind_, letter_material and/or-or when the rational component is available, borrow 8-7 Yan Shouyuan's other SD wafers benefit from the use of ςη^兀1 noon" this group of smear processing crystal system, the group sd f round: 3 = 3, by using the S_D pass order can add And can be changed with the f ^ state. Instant transfer - SD processing component. Borrowed from the gamma, ΐί ί , ΐ 出于 in the lithography-related subsystem, _ has updated the operational state. By instant update 4 into The item and the 'or-or multiple transmission subsystems' can obtain the "delayed" and the "delayed" transmission sequence of the delayed program and the delayed data transmission. Can be connected, „trans. For example, when a connector is identified, the “delayed” transmission order is used, i”“__============================= In 235, 'the program can be executed. - Verified S_D generation program can be used. ^ The verified Crystal® has one or _ an unverified S_D generation program at - or more locations to enable the production of untested features! ^ ^Unexamined® has - or more in - or more locations. The material can be processed in the system. Sub-S_D generation order, during and/or after acquisition and 200003686 During some generation procedures, in the S_d program - red Φ 夕, the output data can be recorded from - or more processing points ^ The processing time of the crystallization _SD reliability data can be established by s_ g ^- or more dependence positions - or more s _ _ = for the bit processing 5 in 240, the current 曰曰曰When the round needs extra erection decisions. When the current wafer needs another-generating program, the program executes the query and when the current level does not need to generate another material, the program 2Q() ^f returns to 240. In 245, the first group s1 evaluation crystal can be established. To 250. The wafer can include a first number of S_D wafers. And a group of SD evaluations in 250 'one or more first day qp\, multiple evaluation subsystems - or more available energy, to one or more data can be - or more winged Comment on the m-style towel. Operational traits are used to determine the domain miscellaneous state of the energy assessment component. In some alternative cases, two or more can be performed using S_D, and the secondary stencil evaluation component can be transmitted to the first set of S_D evaluation wafers, or more than one of the plurality of available S-D evaluation components. The operation can be - or more than the system t - or more S_D evaluation ^ is - or more side inspections: for example, the evaluation component is matched = = money exposure, _ money nostalgia _ ^ = = = In some examples, when the SD evaluation wafer is immersed in the first quantity of the component, the number of passes is equal to or equal to the number of the OK wafers. . When the _ more corrective action can suppress the application, the first number of =, or -, /, the number of available evaluation elements 61 200903686 is determined by the first operational state. Round, two for =. The evaluation wafer can include a first-crystal selection decision that can be verified based on the remaining wafers. Quantity, required evaluation and/or number of verification locations: 22 = number of wafers = number = = or inspection, 0 = = position - position can be from -. In some examples, the first = set has the same; = one = upper; the outer position can be from the first, the evaluation of the wafer, the t-th touch can have its associated and borrowed energy is the most important wafer evaluation feature. . In the other examples of the first wafer, the decision-making system can be based on the evaluation of the additional wafers. The measurement program can provide measurement data, and the test can: In some examples, the first The position can be obtained from the evaluation and/or verification ΓΓίΓ^ and the first position has its associated n-th:---the position is obtained, and the first-in-first position of the first position can be established for the first position, and The first-verification data can include the first-placed 育 育 育 借 借 借 借 借 借 借 借 借 借 借 借 借 借 ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ ^ In the first time, the first position can be identified as: the number of the remaining positions can be reduced by 62 200903686, and the number of visited positions can be increased by one. When the first is limited, the first position can be recognized as having a first-unverified position with 7 degrees associated with it, and the number of remaining positions can be reduced.": The number of positions can be increased by one. And in some embodiments, the unverified data can include for the gate structure in the transistor, the gate structure in the transistor, the memory structure, the sidewall angle, the critical dimension, the array, the perimeter = Features, strain characteristics, damaged structures or reference structures, two & In other embodiments, the unverified data can include the evaluation data ==, , and the inspection data, the alignment data, the verification data, the processing, and the miscellaneous. Bei, temple, historical data, real-time data, optical materials, layer 51敎^ 日守间贤料' or any combination of the above. Alternatively, the material can be processed, processed, or in some embodiments, the verified data can be included for the column = ', , . Structure, source structure, capacitor structure in the transistor - jade periodic structure, alignment features, doping characteristics, or any combination of the above. In other implementation tests = estimation data, measurement data, inspection data, alignment H to 枓 j; fighting; "= Cheng 5 library materials, historical data, real-time data: optical! Asset processing rhyme, or any combination of the above. Or, - or ί H — to - or more than one of the reliability and / or risk limits, one or more restrictions are reached, and a corrective action can be applied. Putian did not expect; the first S-D verified resource in the verification library and the related first verified evaluation data; and 匕:= was characterized by 63 200903686 as the first verified signal data. Time verification; material. For example:: ϋίίίΐΐ ° Historical verification data can be saved. S-D evaluates features, structures, data, and crystals when round, i-ordered, and/or clamped, and is widely accepted for verification. Multiple locations and/or wafer acceptance evaluations can be established for individual wafers and/or group wafers. Or Ϊ For example, the value of the reliability data can be covered from zero to the other. The risk represents the lowest risk situation. Or, :: or the South risk situation' and nine have and; = the limit of the limit: the project being evaluated can be identified as having (the most incorrect) criticality and then the risk factor. An unverified project that achieves additional degree of privacy and domain high factors. /, there is ~, the relevant low In 270, a query can be executed to determine the evaluation... Step 200 can branch to step 275 The right evaluation is not completed to branch 285. When Tianhan estimates are completed, step 200 can be performed additionally to determine if additional locations are required. Volume needs: When set, the program 2()() 35 folds back to step 26G; and when it is not necessary, the private order 200 can be folded back to step 28〇. When the field does not need additional location, it needs ^(10), the query can be executed to determine whether it is necessary to additionally evaluate the wafer η. When the program 200 can be folded back, step 255. When the wafer is evaluated, the program The survey can be folded back to step 285. 5, and there is no need for additional in the move, - the query can be executed to determine whether the current order has been completed. When the current order of 64 200903686 has been completed, the program 200 can be folded back to step 290, and the program 200 can be folded back to step 215 when the current order has not been completed. At 290, a query can be executed to determine if an additional order is needed. Program 2(8) can be folded back to step 21 when additional order is required, and program 200 can be returned to step 295 when no additional order is needed. The program can end at 295. - In some embodiments, the first double patterning (d〇uble_patteming) order can be executed first' followed by the second double patterning order. The first set of wafers can be made up of one or more subsystems (101, 102, 11〇, 115, 120, 125, 13〇, 135, =0, I45, 150, I55) in the processing system (1〇〇) Receiving, and by using the first s_D double patterning process '-, more first-pattern layers can be generated in - or more sets of patterned crystals - first S_D processing order processing system ( One or more of the subordinates li·^102, 110, 115, 120, 125, 130, 135, 140, 145, 150, 100). Next, 'by using the first S1 evaluation program, the first reliability data can be established for the first group of patterned wafers, and the first group of high trusts can be obtained by using the data from the first - red V" Wafers can be built. Then, the “two layers” can be generated on the second set of patterned wafers, and the 3 L-production wafers are used to perform the second S_D processing sequence. One of the multi-sequence S processing systems _) or 145 > 150 . . . 110, 115, 120, 125, 130, 135, 140, multiple second maps, using the scanner subsystem (115), one or A second group of patterned 曰:, the second reliability data and / or the second risk data energy program data m, using the first and second sD evaluation η pure latitude wafer can be used set up. The affiliation layer = processing order can be used to generate the first double gold SD ί 0 or more SD lithography-related immediate execution 'and can include: one or more SD test phase _ & or even a scan Related procedures, test related procedures, one or more SD related programs, 65 200903686 - or more SD evaluation related programs, - or more S_D side related programs, - or more SD deposition related Program, - or more S_D heat treatment procedures, one or more SD, coating related programs, one or more S_D alignment related programs, one or more SD polishing related programs, one or more S_D storage Related programs, one, more secure SD transmission program, one or more S_D cleaning related programs, one or more _D decoration paste program, or more S_D oxidation related programs, one or more SD Nitriding related programs or—or more S_D external programs, or any combination of the above. 3 is a simplified diagram of a wafer map in accordance with an embodiment of the present invention. As illustrated, the wafer map is shown to have - one hundred and twenty-five wafers/die, but this is the case. Or ' can represent a different number of wafers/grains. Moreover, the circular shape is merely illustrative and not required by the present invention. For example, a wafer replacement' and the wafer/die can have a non-circular shape. The wafer map 320 on the top 300 includes one or more 3K). The rows and columns of the description are indicated by numbers from zero to twelve. This 2 figure = ten places 33g can define the location of the wafer (3〇ί 302彳 private order). In addition, the edge has a two-ring dotted line t = ί ί 顾 to build the wafer The upper outer area 305, the upper area 306, and the inner area 307. Alternatively, the number of areas that can be established on the wafer map and can be measured in different locations on the wafer, Inspection and / or evaluation location can be made 丄 ϊ 曰 曰 曰 曰 曰 曰 曰 曰 曰 曰 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 。 当 当 当 当Select a number of addresses on the wafer. In addition, the more confident the manufacturer is, the more it is possible to reduce the production and quality of the products in the production and/or non-S d ^, The number of positions used by the madness 当 when new and/or additional measurement data is required, and the external SD data can be one or more materials from the wafer.
結構“量it能SI 統的產量。ΛΪΪΪ期 能影響處理系 驗證及/或評估晶圓的進行時間最小化。^望檢驗、 的’且不同的S-D料可基於本身的間相依性 過長時，可使用較小數量的位置。 、s &疋。執行時間 在半導體處理的-發展階段期間， 能產生並儲存，以供後續使用。s D ，更'個S_D參考地圖 圖3所干位1 參考量測地圖能包括位於與 能 J二不 證地円f不位置不同之位置的檢驗資料。S-D參考驗 參考;Ϊη-不位置不同之位置的驗證資料。S_D 料:ΐ 立於與圖3所示位置不同之位置的評估資 地圖 圖能使關組位置，或可不需—或更多個參考 或4外3 ^程序期間…或更多個S_D預測地圖能產生及/ 預測“气料另預，、圖能包括預測量測資料、麵檢驗資料、 古、，、箱ί处及或預測评估貧料、及/或預測處理資料。舉例而 ° 預測負料月巨用S-D模型獲得。 改，或更多個S_D及/或非s-D信賴度地圖能產生及/或修 驗地圖能包括以下資料的信賴值：所測量的資料、檢 貝^^驗證貧料、評估資料、所預測的資料及/或處理資料。 晶圓地圖能包括一或更多個適合度(GOF，Goodness Of Fit)地 67 200903686 圖、一 或更多個格柵板厚度地 圖 或更多個通孔相關地圖圖 更 一在的數量、χ軸資料標 S-D 中;管序^行來為晶圓上不包括在 技巧或其他數學if可決定=地|使2面估計、表面擬合 其热觫猫如^, ^夫疋日日®地圖。當為晶圓產生地圖時，^置斤賴測及/或實際正確性數值及/或需求，能選定量測 或更多個臨界尺寸地圖、一或 二二關地 ㈣關_、—或更多個溝渠相關地圖、- 或更多個 該 由映射應肖所產生的—些錯誤被能送至卿^ 且FDC系統能決定處理系統應該如何對該錯i做出= 其他錯誤能由映射應用來解決。 ^ =產生及/或修改晶圓地圖後’數值可不用為整個晶圓計算及/ 或兩要，且晶圓地圖可包括下列㈣料··—或更多個 果之品質的獨特特徵。此外，為了產量最大化，賴晶圓之 ，多個區賴⑼/晶粒’製造商可允許較不正確之處理及/或評估 資料。-映射應用及/或FDC彡、統能職業規格來決定信賴度 險、均句性及/或正確性的限制。 當地圖中一值接近限制時，信賴值可能比地圖中一值不接 P艮制時低。此外，正確性值能因晶圓之不同晶片/晶粒及/或不同區 域而給予加權。舉例而言’較高信賴值加權能指派到有關一 多個先前使用過之評估位置的正確性計算及/或正確性資料。 此外，有關一或更多個處理之處理結果、量測、檢驗、驗證、 評估及/或預測地圖可用來計算晶圓的信賴度地圖。舉例而言， 自另外地圖的數值可用來當作加權因素。 、 68 200903686 圖4根據本發明之實施例，繪示例示性次系統之簡化方塊圖。 在所說明的實施例中，例示性S_D次系統400表示為包括有五個 S-l^ 元件(410、420、430、440、450)、第一 S-D 傳輸次系統 460 及第一 S-D傳輸次系統470。第一 S-D傳輸次系統460能連接到 第一非S-D傳輸次系統401及第二非S_D傳輸次系統4〇2。第二 S-D傳輸次系統470能連接到第一非S-D傳輸次系統401及第二 非S-D，輸次系統402。第一非S-D傳輸次系統401及第二非S_D 傳輸次系統402能連接到及/或係一部份之傳輸次系統(1〇1、1〇2、 103，圖/)。或者，可使用不同數量的次系統，可使用不同數量的 ，傳輸次系統’且次系統可有不同配置。此外’可使用非次系 v 統。 ’、 例，性S-D次系統400能包含能連接到第一 S_D傳輸次系統 460及第二S-D傳輸次系統47〇的五個S_D真空預備元件(415、 425、435、445、455)。或者，不同數量的真空預備元件可加以使 用，且可進行不同配置。在其他實施例中，可不需要真空預備元 件SD真空預備元件415能連接到一或更多個§_d處理元件 410 ; S-D真空預備元件425能連接到一或更多個S_D處理元件 420 ; S-D真空預備元件435能連接到一或更多個S_D處理元件 430 ; S-D真空預備元件44S能連接到一或更多個S_D處理元件 I 440,及S D真二預備元件455能連接到一或更多個處理元件 450。在各式實施例中，S_D真空預備元件(415、奶、435、4衫、 455)能包含S-D内部傳輪裝置(分別對應是417、427、437、447、 457)，用以在實質上同一時間傳輸、延遲、儲存、對準及/或檢驗 一或更多個晶圓。 第一 S-D傳輸次系統460能包含能連接到第一數量之第一 S-D 傳輪元件(461、462、463、464'465)的第一 S-D 傳遞元件 467。 在某些實施例中，第-S_D傳輸元件能動態連接或不連接到第一 S-D傳遞元件467，其並能在一或更多個方向469下移動。此外， 連接及/或不連接能是位置相依性的，並能用下列來決定：第一 69 200903686 件467、第—s~°傳輸元件、晶圓資料、系統資料、處理 一人序 =料或傳輸次序資料，或上述任何組合。第一 S_D傳遞元件The structure "quantitizes the output of the SI system. The flood season can affect the processing system to verify and / or evaluate the wafer's execution time to minimize. ^When testing, and different SD materials can be based on their own interdependence is too long A smaller number of locations can be used. s & 疋. Execution time can be generated and stored during the semiconductor processing-development phase for subsequent use. s D , more 'S_D reference map Figure 3 1 The reference measurement map can include inspection data located at a position different from the position of the energy source J. The SD reference test reference; Ϊη- verification data of the position where the position is not different. S_D material: 立 standing on the map 3 The location maps of the locations shown at different locations can be used to set the location, or may not need - or more references or 4 outside the 3 ^ program period ... or more S_D predicted maps can generate and / / predict "gas In addition, the map can include predictive measurement data, surface inspection data, ancient,, box, or predictive assessment of poor materials, and/or predictive processing data. For example, ° predicts that the negative month is obtained by the S-D model. Change, or more S_D and/or non-sD reliability maps can generate and/or repair maps that can include the following values of confidence: measured data, inspections, verification of poor materials, assessment data, predicted Information and / or processing data. The wafer map can include one or more Goodness Of Fit (GOF) 67 200903686 maps, one or more grid plate thickness maps or more through-hole related map maps, and the number of The axis data is marked in SD; the tube sequence ^ row is not included in the wafer on the tip or other math if you can decide = ground | to make 2-sided estimation, surface fitting its hot cat such as ^, ^夫疋日日® map . When generating a map for a wafer, the measurement and/or actual correctness value and/or demand can be selected to measure or more critical dimension maps, one or two or two (4) off _, or more Multiple ditch-related maps, - or more, generated by the mappings - can be sent to the system and the FDC system can determine how the processing system should make the error = other errors can be mapped by the application To solve. ^ = After generating and/or modifying the wafer map, the value may not be calculated and/or for the entire wafer, and the wafer map may include the following (four) material-- or more unique characteristics of the quality of the fruit. In addition, for maximum throughput, multiple wafers (9)/die manufacturers may allow for lesser processing and/or evaluation data. - Mapping applications and/or FDC, and professional specifications to determine the limits of reliability, uniformity, and/or correctness. When a value in the map approaches the limit, the trust value may be lower than when the value in the map is not connected. In addition, the correctness value can be weighted by different wafers/grains and/or different regions of the wafer. For example, a higher confidence weighting can be assigned to correctness calculations and/or correctness data for a plurality of previously used evaluation locations. In addition, processing results, measurements, inspections, verifications, evaluations, and/or predictions for one or more processes can be used to calculate a wafer's reliability map. For example, values from other maps can be used as weighting factors. 68 200903686 FIG. 4 is a simplified block diagram of an exemplary subsystem in accordance with an embodiment of the present invention. In the illustrated embodiment, the exemplary S_D subsystem 400 is shown to include five S1 components (410, 420, 430, 440, 450), a first SD transmission subsystem 460, and a first SD transmission subsystem 470. . The first S-D transmission subsystem 460 can be coupled to the first non-S-D transmission subsystem 401 and the second non-S_D transmission subsystem 4〇2. The second S-D transmission subsystem 470 can be coupled to the first non-S-D transmission subsystem 401 and the second non-S-D, the transmission system 402. The first non-S-D transmission subsystem 401 and the second non-S_D transmission subsystem 402 can be connected to and/or part of the transmission subsystem (1〇1, 1〇2, 103, diagram/). Alternatively, a different number of secondary systems can be used, a different number of transmissions can be used, and the secondary system can have different configurations. In addition, non-sub-systems can be used. For example, the S-D subsystem 400 can include five S_D vacuum preparation elements (415, 425, 435, 445, 455) that can be coupled to the first S_D transmission subsystem 460 and the second S-D transmission subsystem 47A. Alternatively, different numbers of vacuum preparation components can be used and can be configured differently. In other embodiments, the vacuum preparation element SD vacuum preparation element 415 can be connected to one or more §_d processing elements 410; the SD vacuum preparation element 425 can be coupled to one or more S_D processing elements 420; SD vacuum The preparation component 435 can be coupled to one or more S_D processing components 430; the SD vacuum preparation component 44S can be coupled to one or more S_D processing components I 440, and the SD True Two Provisioning component 455 can be coupled to one or more Processing component 450. In various embodiments, the S_D vacuum preparation elements (415, milk, 435, 4 shirts, 455) can include SD internal transfer devices (respectively corresponding to 417, 427, 437, 447, 457) for substantially One or more wafers are transferred, delayed, stored, aligned, and/or inspected at the same time. The first S-D transmission subsystem 460 can include a first S-D transmission component 467 that can be coupled to a first number of first S-D transmission components (461, 462, 463, 464 '465). In some embodiments, the first-S_D transmission element can be dynamically coupled or not coupled to the first S-D transfer element 467 and can be moved in one or more directions 469. In addition, the connection and/or disconnection can be position dependent and can be determined by the following: First 69 200903686 piece 467, _s~° transmission component, wafer data, system data, processing one person order = material or Transfer order data, or any combination of the above. First S_D transfer element
If71包括一或更多個層級(未繪示），並能以一或更多個速率來操 作。或者，可使用其他晶圓傳輸技術。 ㈣ί者i基於處理次序、傳輸次序、操作性狀態、晶圓及/或處 、處理時間、現行時間、晶圓資料、晶圓上位置數量、晶 置麵、所需位置數量、所完成位置數量、所剩餘位置數 ^或=度資料’或上述任何組合，第—S_D傳輸次系統46〇及 弟一 -D，輸次系統47〇能裝載、搬運及/或卸除晶圓。 -、日日ΪΪ第一 S_D傳輸元件(46卜462、463、464、465)繪示在所 的貝施例巾’但此並非本發明之必須。在其他實施例中，可 巧J同數量之第一 S_D傳輸元件。此外，圖4中之所說明的第 =-D傳輸元件⑽、462、463、椒、465)，纷示為位於第一傳 ^ L此並非本發明之必須。#第一 S_D傳輸元件位於第-傳 更多個晶圓(未纷示)能在第—S_D傳輸元件與S_D 真空預備70件之間傳輸。 。^一沾傳輸次系統獨能包含能連接到第工數量之第一 S-D#^ SD^H弟一 s_D傳輸元件能動態連接或不連接到第二 ϋ傳遞兀件477」並能在-或更多個方向479下移動。此外，連If71 includes one or more levels (not shown) and can operate at one or more rates. Alternatively, other wafer transfer techniques can be used. (d) 者 based on processing order, transmission order, operational status, wafer and / or location, processing time, current time, wafer data, number of locations on the wafer, crystal plane, number of required locations, number of completed locations The remaining number of positions ^ or = degree data ' or any combination of the above, the first - S_D transmission subsystem 46 and the first one - D, the output system 47 can load, transport and / or remove the wafer. -, day, day, first S_D transmission element (46, 462, 463, 464, 465) is shown in the case of 'Bei Shi', but this is not a requirement of the present invention. In other embodiments, the same number of first S_D transmission elements may be used. In addition, the =-D transmission elements (10), 462, 463, pepper, 465) illustrated in FIG. 4 are shown to be located in the first transmission, which is not essential to the present invention. #第一 S_D transmission component is located in the first transmission. More wafers (not shown) can be transferred between the first S_D transmission component and the S_D vacuum preparation 70. . ^ One touch transmission system can only contain the first SD#^ SD^H brother s_D transmission component can be dynamically connected or not connected to the second transmission component 477" and can be in - or more Move in direction 479. In addition, even
H或ί連接能是位置相錄的，並能使用下列來決定：第二S-D =傳輪元件、晶圓資料、系統資料、處理 j貝科或傳輸次序貧料，或任何組合。第二S_D傳遞 )乍^括一或更多個層級(未繪示）’並能以一或更多個速率來操 作。或者，可使用其他晶圓傳輸技術。 …五，第二S-D傳輸元件(471、472、473、474、475)1 备示於所 但此並非本發明之必須。在其他實_二可使 元件⑼、472、473、474、475)if^4;t== 70 200903686 士 傳輸元件位於第二傳輸點時’ 元件之間傳Ϊ。w Μ在弟二S_D傳輸元件與S-D真空預備 统47^ ^ 傳輸次系統460及/或第二1 2 3 4 5-D傳輸次系 次序及/或5-D傳輸次序來傳輸晶圓。 444二、笛Γ糸統400能包含五個控制器(414、424、434、 Γ41Γ 制器414能連接到一或更多個第一 S-D處理元 S D直丄=^制—或更多個第—S_D處理元件410及第一 虑於預備兀件415。此外，第一控制器414能連接411到資料 frmm 424 件420 Γ镜-ςη古’並能用來控制一或更多個第二S_D處理元 第二3 3元件，並能用來控制—或更多個 弟一 5處理70件430及苐三S-D真空韻元件435。此外，第 二控制器434能連接431到資料傳輸次系統⑽，圖u。第四巧 S3 一或更多個第四S_D處理元件440，並能“ 控制-或更夕個弟四S_D處理元件及第四S_D真空預備元 71 1 45】。、此ί ’ f，制器444能連接441到資料傳輸:欠系統(106 , 、。第五控制斋454能連接到一或更多個第五S_D處理元件 2 450，並能用來控制一或更多個第五S_D處理元件45〇及第五 3 真空預備元件455。此外，第五控制器454能連接451到資料 4 次系，(觸’ ®丨）。或者，可使用不同數量的控制器，可使用不 同數量的處理元件，且資料傳輸次系統可有不同配置。 5 一或更多個控制器(414、424、434、444、454)能即時地產生、 處理、修改、傳送及/或接收一或更多個訊息。第一 S_D傳輸次系 統460能連接466到資料傳輸次系統(1〇6，圖1}，並能即時地^ 生二處理、修改、傳送及/或接收一或更多個訊息。第二S_D傳輸 次系統470能連接476到資料傳輸次系統(1〇6，圖1)，並能即時 200903686 =生、處理、修改、傳送及/或接收—或更 二人系統106亦能用來即時地產生、處理 值輸 ，多個訊息。訊息能包括S_D資料及I 包括即時資料及/或歷史資料。 貝科，且Λ心月b 實二或更多個晶圓能由第—S_D傳輸次系統 統二iiz L ί 接收。晶圓的處理次序能由系 後，在建立产理1二而1，晶圓及/或處理狀態資料能在晶圓接收 元件來= 藏之後來制。或者，能由處理 '424'434'444' ίί'?π ^ ；,430'440'45〇)4ίΙ 0 第一 Hi人序。舉例而言’藉使用第—真空預備树415， 曰曰第—處理元件410;藉使用第二真空預備元件The H or ί connection can be positionally recorded and can be determined using the following: Second S-D = transfer component, wafer data, system data, process j Becko or transmission order lean, or any combination. The second S_D transfer) includes one or more levels (not shown) and can operate at one or more rates. Alternatively, other wafer transfer techniques can be used. ...five, the second S-D transmission element (471, 472, 473, 474, 475) 1 is shown here but is not essential to the invention. In other real-times, the elements (9), 472, 473, 474, 475) if^4; t== 70 200903686 when the transmission element is located at the second transmission point, are transmitted between the elements. w Μ The second S_D transmission element and the S-D vacuum system 47^^ transmit sub-system 460 and/or second 1 2 3 4 5-D transmission sub-system order and/or 5-D transmission order to transport the wafer. 444. The flute 400 can include five controllers (414, 424, 434, Γ 41 414 can be connected to one or more first SD processing elements SD ^ = ^ system - or more The S_D processing element 410 and the first precaution element 415. In addition, the first controller 414 can connect 411 to the data frmm 424 420 Γ mirror-ςη古' and can be used to control one or more second S_D Processing the second 3 3 element, and can be used to control - or more than one of the 5 - processing 70 pieces 430 and the third SD vacuum element 435. In addition, the second controller 434 can be connected 431 to the data transmission subsystem (10) Figure u. The fourth S3 one or more fourth S_D processing elements 440, and can "control - or even the fourth four S_D processing elements and the fourth S_D vacuum preparation elements 71 1 45.", this ί ' f, the controller 444 can be connected 441 to the data transfer: the under system (106, , the fifth control 454 can be connected to one or more fifth S_D processing elements 2 450 and can be used to control one or more The fifth S_D processing element 45〇 and the fifth 3 vacuum preparation element 455. In addition, the fifth controller 454 can connect 451 to the data 4 times system, (touch '®丨Alternatively, a different number of controllers can be used, different numbers of processing elements can be used, and the data transfer subsystem can be configured differently. 5 One or more controllers (414, 424, 434, 444, 454) can be instant One or more messages are generated, processed, modified, transmitted, and/or received. The first S_D transmission subsystem 460 can connect 466 to the data transmission subsystem (1, 6, Figure 1}, and can instantly generate two Processing, modifying, transmitting, and/or receiving one or more messages. The second S_D transmission subsystem 470 can connect 476 to the data transmission subsystem (1, 6, Figure 1), and can immediately generate, process, modify , transmitting and/or receiving - or two-person system 106 can also be used to generate, process, and output multiple messages in real time. The messages can include S_D data and I include real-time data and/or historical data. The second or more wafers of the heart month b can be received by the first S_D transmission subsystem. The processing order of the wafers can be determined by the post-system, and the wafers and/or wafers and/or Processing status data can be made after the wafer receiving component is hidden. By processing '424'434'444' ίί'?π ^ ;, 430'440'45〇) 4ίΙ 0 first Hi human order. For example, 'by using the first vacuum preparation tree 415, 曰曰 first—processing component 410; by using the second vacuum preparation component
Hir:傳送到第二處理元件420;藉使用第三真空預備 供，弟"Γ晶圓能傳送到第三處理元件430 ;使用第四真空預 第四晶圓能傳送到第四處理元件440;且使用第五真 ^ ^ 455，第五晶圓能傳送到第五處理元件450。此外，一 ίϋ固訊息能包括晶圓資料、製程配方資料、剖面輪靡資料、 权射料、工具資料及/或處理資料。 一或^多個控制器(414、424、434、444、454)能用來決定如 藉使用—或更多個S_D處理元件(41G、42G、43(3、440、 =地理—或更多個晶圓。控制器能用來決定S-D次系統中之 兀件於何時可利用，及/或S-D次系統中之S-D處理元件 利用。舉例而言’因為時間差的關係’ S_D訊息及/或 =月匕無法利用’而控制器能等待到仙訊息及/或資料為可利 外，當新(已更新)S-D資料無法可利用時’晶圓能用未 更新之S-D資料來處理。 在某些實施例中，待處理之晶圓的第一數量能夠藉使用第— 72 200903686Hir: transferred to the second processing element 420; by using the third vacuum preparation, the "wafer" can be transferred to the third processing element 430; using the fourth vacuum pre-fourth wafer can be transferred to the fourth processing element 440 And using the fifth true ^ 455, the fifth wafer can be transferred to the fifth processing element 450. In addition, a sturdy message can include wafer data, process recipe data, profile rim data, power shots, tool data, and/or processing data. One or more controllers (414, 424, 434, 444, 454) can be used to determine, for example, by using - or more S_D processing elements (41G, 42G, 43 (3, 440, = Geography - or more) The wafer can be used to determine when the components in the SD subsystem are available, and/or the SD processing components in the SD subsystem. For example, 'because of the time difference' S_D message and / or = The moon can't be used' and the controller can wait for the message and/or the data to be profitable. When the new (updated) SD data is not available, the wafer can be processed with the unupdated SD data. In an embodiment, the first quantity of the wafer to be processed can be borrowed from the use of -72 200903686
處理次序來建立。S_D 藉由查詢S_D次系統中之f或^=用處理元件的第二數量能 言，操作性狀態能為各處理元理兀件來辨識出。舉例而 處理元件而言，當一定，針對第二數量之可利用 -數值，耐處理树t ㈣，帛—狀態能是第 當第二數ί等操作狀態能是第二數值。 到S-D次系統中之第量’第一數量的晶圓能傳輸 第一^量時，編元件。當第二數量小於 ;剩:=圓·可能;理最多 在某些實施例中，能執^"1 或^/=餘^曰圓到該次系統。 罩沉積程序能用第- ς n 幕罩程序。舉例而言，幕 元件物來執行；乾燥及;曝光=輯二如 f产S-D元件。在其ί範=執;置 ^巧能使用額外次系統。其他S_D處 用之Ϊ錢的數量及/或_，以及何時使料ί ^疋欲使 S-D ^執行S_D量測程序。藉使用晶圓資料， 序處理次序及/或S_D傳輪次序 來執行。兴你丨而〜g t40、45〇)及傳輸次系統(401、460、470) 舉例而吕’ 4 一非S_D傳輸次系、统彻及/或繁ϋη 專，次系統能接收-數量的晶圓，該等 ·^ S-D晶圓。第一 S-D傳輸次***46〇及"戈固及/或非 能接收第-組晶圓。 及戈弟―沾傳輪次糸統47〇 資料#關M K f料’且晶圓資料能包括沾 、枓及/或非Μ)貝枓。—或更多個晶圓在其之上具有一或更多個 73 200903686 ^金=冓及/或非S-D信賴度資料能為下列來決定：晶圓、 -人糸^二處理元件、程序或處理結果資料，或上述任何組合。 Φ姑ir組S_D量測晶圓能加以建立，且該第—組沾量測晶圓 、a曰圓在其之上能具有一或更多個評估結構。第一组s_d量 S_D資料及/或非S_D資料來建立，且第一組s_d量測 =囫此，輸到一或更多個S-D處理元件(410、420、430、440、450)。 ，可使用信賴度資料、晶圓狀態資料、處理次序資料或 一 一第一 S -D量測程序能為第一組s _D量測晶圓來加以決定，且 ί I組S-D量測晶圓係用第—S_D量測程序在第—S-D評估元件 ΐίΐΐΐ L舉例而言，信賴度資料、晶圓狀態資料、處理次序 貝枓，歷史資料可用來建立第一 S_D量測程序。 旦、目丨:或更多個沾傳輸次系統_、47〇)，第一組S~D 里測日日固犯傳輸到第一 S_D次系統4〇〇中的一或多 量測，元件41〇。第—S_D傳輸次序、第_ S_D 序= 一 S-D罝測程序，或上述任何組合，能用來一 S-D量測相關元件41G。鱗—或更多個第—s ==第一 410能執行第一 S_D量測程序。 里關70件 ^在例中’第—量測晶圓能從第一組S①量測晶圓中 ϋ楚弟—》7、測晶圓在其等之上能具有第一 S_D評估特徵。r =的t置測▼料包括源自第一 S_D特徵的第一 s_D所^^ ϋ弟-S-D取佳估計信號資料及有關之第—灿最 二Process order to build. S_D can be identified for each processing lemma by querying the second number of processing elements in f or ^= in the S_D subsystem. For example, in terms of processing components, when certain, for the second number of available-values, the processing tree t (four), the state can be the second, and the operational state can be the second value. When the first quantity in the S-D subsystem is capable of transmitting the first amount, the component is encoded. When the second quantity is less than; remaining: = circle · possible; most in some embodiments, it is possible to execute ^"1 or ^/= remainder^ to circle the system. The hood deposition procedure can be performed using the -n mask procedure. For example, the curtain element is used to perform; drying and; exposure = series 2 such as the production of S-D components. In its 范范=执; The amount of money and/or _ used by other S_Ds, and when to make the S-D ^ perform the S_D measurement procedure. Execute by using wafer data, sequential processing order and/or S_D routing order. Xing you 丨~g t40,45〇) and transmission subsystem (401, 460, 470) Example and Lu '4 a non-S_D transmission sub-system, thorough and/or ϋ 专 special Wafer, these / ^ SD wafers. The first S-D transmission subsystem 46 and "Gogu and/or the inability to receive the first set of wafers. And Godi---------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------------- - or more wafers having one or more 73 thereon. 200903686 ^ Gold = 冓 and / or non-SD reliability data can be determined by: wafer, - human processing device, program or Process results data, or any combination of the above. The Φ ur group S_D measurement wafer can be established, and the first group of immersion measurement wafers, a circle can have one or more evaluation structures thereon. The first set of s_d quantities S_D data and/or non-S_D data is established, and the first set of s_d measurements = 囫, to one or more S-D processing elements (410, 420, 430, 440, 450). The reliability data, the wafer status data, the processing order data, or the first S-D measurement program can be used to determine the wafer for the first set of s__D, and the I set of SD wafers For example, the first-S_D measurement program can be used to establish the first S_D measurement program by using the first-S_D measurement program in the first-SD evaluation component ΐίΐΐΐ L, for example, the reliability data, the wafer state data, and the processing order. Once, witnessed: or more than the transmission sub-system _, 47 〇), the first group S~D measured the daily smuggling transmission to the first S_D system 4 的 one or more measurement, components 41〇. The first-S_D transmission order, the _S_D sequence = an S-D test procedure, or any combination of the above, can be used for an S-D measurement related component 41G. The scale - or more - s == first 410 can perform the first S_D measurement procedure. In the case of the case, the 'the first measurement wafer can be measured from the first set of S1 wafers." 7. The wafer can have the first S_D evaluation feature on it. r = t test ▼ includes the first s_D from the first S_D feature ^ ^ ϋ - - S-D take the best estimate signal information and related
構能從S-D量測信號與有關結構的程式庫中選^。舉例冲= ^言?虎可包括：繞射信號及/或光譜、折射信號及/或光譜;二 唬及/或光譜或傳輸信號及/或光譜，或上述任何組合。 射L 此外，S-D評估特徵能包括：幕罩結構、侧結構 構、填充結構、半填充結構、損壞結構、介電質結構 閘極電極結構、_堆4結構、電晶黯構、賦場效構、 (FinFET)結構、CM0S結構、光阻結構、週期式結構、對 74 200903686 溝渠結構、通孔結構、陣列結構 第-奶差異能彳·述任何，合。 計，資料之間來計算出，並藉使貝最健 賴度資料能為第-量測晶圓建立 ς，第一 S-EM§ S-D產品需求做比較，並且，賴度資料能與第- 求’便能將第一量測晶圓辨識為第^二^一 S-D產品需 行處理，或是，若未達到一_多個2能繼續進 加第一修正動作。 & D產πα需求，便能施 纽合=測信號資料能從沾評估結構或其他結構或上述任何 當達到一或更多個第—S_D產^㊉ 能用第-S-D最佳估計結構金有Zf =苐一 S-D評估特徵 來辨識。 /、奇之弟一 S_D最佳估計信號資料 在某些實施例中，第—修正動作处 有關之結構的程式庫中，選定斩 .從S~D繞射信號與 新沾最佳估計結構；言；；估計信號資料與有關之 最佳估計信號資料之間的iS_D f里·==信號資料與新S-D -量測晶圓建立新S_D传賴产牛/.\’μ /利用新S_D差異’為第 如產品需求，·以及，較新沾信賴度資料與新 將第-量測晶圓辨識為新高』賴^3個新，產品需求時，便 當未達到-或更多個新S_D產二^亚、均進行處理’或是， 立、比較及辨識。當達到第一產&而=2,選定、計算、建 第-S-D評估特徵能用新沾最佳 庫產生準則時， 估計信號資料來辨識。或者 二十了構與有關之新S-D最佳 例中，—第一修 晶®中，選定一第二量^栝.仗弟一組S _D . 估特徵；獲得第二测f#料，^ 上具有第-S- 其他比較。 一 用，、他取佳估計資料，且可進 測The configuration can be selected from the S-D measurement signal and the library of related structures. For example, a laser can include: a diffracted signal and/or a spectrum, a refracted signal, and/or a spectrum; a bismuth and/or a spectral or transmitted signal and/or spectrum, or any combination of the above. In addition, the SD evaluation features can include: mask structure, side structure, filling structure, half-filled structure, damaged structure, dielectric structure gate electrode structure, _heap 4 structure, electro-crystal structure, field effect Structure, (FinFET) structure, CM0S structure, photoresist structure, periodic structure, pair 74 200903686 trench structure, via structure, array structure, first-milk difference energy, any. Calculate the data between the data and the data of the first S-EM § SD product, and the lag data can be compared with the first - The request can be used to identify the first measurement wafer as the second ^1 SD product to be processed, or, if it does not reach one or more 2, continue to add the first correction action. & D produces πα demand, can apply = = = signal data can be evaluated from the structure or other structure or any of the above when one or more of the first -S_D production can be used - the best estimate of the structural gold There is Zf = SD one SD evaluation feature to identify. /, odd brother - S_D best estimated signal data In some embodiments, the first - correct action in the relevant structure of the library, select 斩. from S ~ D diffraction signal and the new best estimate structure; ???; estimated signal data and the best estimated signal data between the iS_D f ·== signal data and the new SD - measurement wafer to establish a new S_D pass on the cattle /. \ 'μ / use the new S_D difference 'For the first product demand, · and, the newer reliance information and the new metric-measured wafers are recognized as new highs." 3 new, product demand, when not reached - or more than a new S_D Both ^, are treated 'or, stand, compare and identify. When the first production & and =2 is selected, the selection, calculation, and construction of the first-S-D evaluation feature can be used to identify the signal data to identify the criteria. Or in the best example of the new SD related to the structure, in the first trimming®, select a second quantity ^栝.仗, a group of S _D. Estimate the feature; obtain the second test f# material, ^ on Has the -S- other comparison. For use, he takes good estimates and can test
評估特徵；獲得第二量測晶圓上具有第-S 处特徵的第二S_D所;_ =、. f—測！貧料包括源自第 斤桃號貝科，從S七量測資料【繞射铜 75 200903686 與有關之結構的程式庫中，選定第二S_D最佳 關之第二S-D最佳估計結構；計算出介於第;二二貝t二有 與第fS-D最佳估計信號資料=所料 信賴度資料比對第二S_D產品需弟賴度f料；將第二S-D 二SD 純 欠及’若達到一或更多個第 ^ 求時，便將弟二量測晶圓辨識為第曰 ，主亚繼續進行處理’或是若未達到一或更多二 求時，便施加一第二修正動作。 弟一 S D產0口而 選定又i其施例中，一第—修正動作能包括：在量測晶圓上 料包括源自第二S_D特徵的第：；該等第二測量資 資料[_號]與有關之^^ 信號資料與有關之第二S_D最佳估^ 二S-D取佳估= 異；藉利用^ t號資料之間的第二S_D差 資料；比較第-了置測晶圓建立第二S-D信賴度 丄 夕個第一 S-D產口口需求時，侵蔣一旦曰 弟-南信賴度晶圓，並繼續進行 、辨識為 個第二处產品需求時，便=細 晶，上選定額外S_D評估特徵；或更多個量，Evaluating the feature; obtaining the second S_D having the feature at the -S point on the second measurement wafer; _ =, . f - measured! The poor material includes the second SD best estimation structure selected from the S-Peach No. Beck, from the S-Seven measurement data [Diffraction Copper 75 200903686 and related structures, the second S_D is selected as the best; calculation Out of the second; the second two t and the second fS-D best estimate signal data = the expected reliability data comparison of the second S_D products need to rely on the material; the second SD two SD pure owe and ' If one or more of the first requirements are reached, the second wafer is identified as the third, the main sub-process continues to be processed' or a second correction is applied if one or more of the two requests are not reached. action. In the case where the SD is produced by the SD, and the first modification, the first correction operation can include: the measurement of the wafer loading includes the first from the second S_D feature:; the second measurement information [_ No.] and the relevant ^^ signal data and the related second S_D best estimate ^ two SD is better than the other; use the second S_D difference data between the ^ t data; compare the first - placed wafer Establishing the second SD reliability, when the first SD production port demand is met, the invading Jiang once the younger brother-South reliability wafer, and continue to identify and identify as a second product demand, then = fine crystal, on Select additional S_D evaluation features; or more quantities,
f貢料包括源自額外S-D特徵的=測貧料’該等額外量 量测資料與有關之姓接^ =頸外S_D所測信號資料；從S-D 資料與有關之額外S°_D最彳^^選，外如最佳估計系號 號資料與額外s D # =、、、°構，计异介於額外S-D所測信 ，差異 料；比較額外S七作賴产資=曰曰®建立額外S-D信賴度資 到—或更多個額外如產品需求；以及，若達 賴度曰曰0 ’並繼_行處理，或是，若未達到一或更 76 200903686 夕個ϊΐ卜ίΐ 品需求，便停止選定、計算、建立、比較及辨識。 ,# ^疋後’程式庫產生規格便能加以使用。 寇库“他實ί例中，雙重圖案化處理次序能用—或更多個S-D #接# ®二。第一 S_D傳輸次系統460及/或第二傳輸次系統470 ^ 41f)。二組晶圓。第一組晶圓能傳輸到一或更多個第一 S-D元 各曰曰圓上稭利?第—S_D幕罩沉積程序，—第—幕罩層能沉積在 曰第一S_D評估程序’能建立第一組高信賴度 Μ —。二D傳輸次系統460及/或第二S-D傳輸次系統470能 多信賴度晶圓。第一組高信賴度晶圓能傳輸到-或更 ί罩°藉利用第一 S-D曝光程序，各晶圓上的 序二^ 弟Γ圖案化輕射中，且藉利用第二S-D評估程 第-組咼信賴度晶圓。第一 S_D傳輸次系統460及/或 ίϊ产統470能接收第·"組高信賴度晶圓。第二組高 3到一或更多個第三S_D元件430。曝光層能用 序^顯影，且第三組高信賴度晶圓能用第三S_D評估 Ϊί ί Ϊ Λ—組傳輸次系統46°及/或第二S-D傳輸次系統47〇 信賴度晶圓。第三組高信賴度晶圓能傳輸到一或 列，而凡件440。顯影後的晶圓能用S_D钱刻程序絲 各日日圓上—或更多個薄層能產生第—組_結構，四 立賴度晶圓能用第四仰評估程序來建立。第_ & $統^60及/或第二S_D傳輸次系統47〇能接收第四組高信J = 圓。、第四組高信賴度晶圓能傳輸到一或更多個第五S-D元件4^〇曰曰。 或更^個第一材料能用S-D沉積程序來沉積在各已蝕刻之曰 上，，第一組填充結構能在晶圓上之一或更多個層中產生，^ 五組咼信賴度晶圓能用第五S-D評估程序來建立。 第一 S-D傳輸次系統460及/或第二S_D傳輸次系統47〇 收第五組高信賴度晶圓。第五組高簡度晶圓能傳輸到 1 個第一 S-D元件。第二幕罩層能用第二⑽幕罩 # = 沉積在各晶圓上，且第六組高信賴度晶圓能用第六評=程序 77 200903686 ΐϊ t笛t傳輸:欠系統460及/或第二S_D傳輸次系統470 f。藉利用第二S_D曝光程序，各晶圓上 圓r用mi 光於第—81案化輻射巾，且第七組高信賴度晶 f㈣日η得^糸、4 470此接收弟七高信賴度晶圓。第七組高 圓能傳輸到一或更多個第三S-D元件430。第二曝光層 程序來顯影，且第八組高信賴度晶圓能用第八The f tribute includes the = poor material from the additional SD characteristics 'the additional amount of measurement data and the relevant surname ^ = the signal data measured outside the neck S_D; from the SD data and the additional S °_D related 彳 ^ ^Select, external as the best estimate of the number number data and additional s D # =,,, ° structure, the difference between the additional SD measured letter, the difference material; compare the additional S seven for Lai production = 曰曰 ® established Additional SD trusts are funded – or more than additional product requirements; and, if Dalai Lai 曰曰 0 ' and processed _, or if not reached one or 76 200903686 夕 ϊΐ ΐ ΐ demand Then stop selection, calculation, establishment, comparison and identification. , # ^疋's library can be used to generate specifications. In the case of the library, the double patterning processing order can be used—or more than SD #接#®2. The first S_D transmission subsystem 460 and/or the second transmission subsystem 470^41f). Wafer. The first set of wafers can be transferred to one or more first SD elements on each round. The first-S_D mask deposition procedure, the first-mask layer can be deposited on the first S_D evaluation. The program 'can establish a first set of high reliability Μ —. The two D transmission subsystem 460 and/or the second SD transmission subsystem 470 can trust the wafer. The first group of high reliability wafers can be transferred to - or By using the first SD exposure program, the sequence of the wafers is patterned in the light shot, and by using the second SD evaluation process, the first group of the reliability wafers. The first S_D transmission subsystem 460 and/or 470 can receive the first "group high reliability wafer. The second group is 3 to one or more third S_D elements 430. The exposure layer can be developed by the sequence, and the third group High-reliability wafers can be evaluated with a third S_D Ϊί ί Λ—group transfer subsystem 46° and/or second SD transfer subsystem 47〇trust wafers. The wafer can be transferred to one or a column, and the workpiece 440. The developed wafer can be printed on the Japanese yen by S_D money - or more thin layers can produce the first-group structure, the four-dimensional structure The circle can be established using the fourth evaluation program. The _ & $ system ^ 60 and / or the second S_D transmission subsystem 47 can receive the fourth group of high-signal J = circle. The fourth group of high-reliability wafers Can be transferred to one or more fifth SD components. Or a first material can be deposited on each etched pad using an SD deposition process, the first set of fill structures can be on the wafer The one or more layers are generated, and the five sets of reliability wafers can be established by the fifth SD evaluation program. The first SD transmission subsystem 460 and/or the second S_D transmission subsystem 47 is fifth. Group of high-reliability wafers. The fifth set of high-detail wafers can be transferred to one first SD component. The second mask layer can be deposited on each wafer with a second (10) mask # = High-reliability wafers can be transmitted using the sixth review = program 77 200903686 ΐϊ t flute t: under system 460 and / or second S_D transmission subsystem 470 f. By using the second S_D exposure program, each The circle on the circle r uses the mi light on the -81 case radiation towel, and the seventh group of high-reliability crystal f (four) day η is ^糸, 4 470 this receives the brother seven high-reliability wafer. The seventh group of high-round transmission To one or more third SD elements 430. The second exposure layer is programmed to develop, and the eighth group of high reliability wafers can be used in the eighth
收第八高信賴度晶圓。第八高信賴度晶圓能^ 第四S_D元件440。顯影後的晶圓能用第二S_D tii ίίί; 第- 且4賴度晶圓能用第九S_D評估程序來建立。 1 έΒ h *s雨一人糸統460及/或第二S-D傳輸次系統470能接收第 $二賴度晶圓。第九組高信賴度晶圓能傳輸到—或更多妾: 料能^ίρ:ΐ利用第二S①沉積程序，一或更多個第二枯 已綱晶圓上，而第二組填充結構能在各晶圓-或更 ί來i立。生’且第十組高信賴度晶圓能利用第十組S_D評估程 彦峰信賴度晶圓能藉由下列來建立：la)在第一 S-D幕罩 多個幕ίΐί 一組晶圓中之各晶圓的仙信賴度資料與為-Ϊ更 的—或好健财絲^ 圓辨識為坌4 &罩產生七賴度需求時，將第—組晶圓中之一晶 W辨f為弟—組尚信賴度晶圓的一成員。 日 間，圓f藉由下列建立：叫在S-D曝光程序期 將第一组1^^ π中^立曰置门獲得S_D信賴度(蝴 一或更多侗處丄广日日囫中之各日日圓的S_D信賴度(映射}資料盥為 78 200903686 需求做比較；及3b)若制第-曝光相難賴度_ 將第-，高信賴度晶圓中之—晶圓辨識為第二組高信賴度u 之成貝。 Η "第^高^度晶圓能由下列建立：⑷在沾顯影程序期 間’攸一或更夕個顯影相依性位置獲得S_D信賴度(映 = 將ίΐΐΞίΪΐ晶圓中之各晶圓的S_D信賴度(映射資料盘^ -或更多個顯影相依性位置所建立的—或更多個叶j Γ:匕較二ί)若達到第一顯影相關信賴度(映射)需ί?: 了賴度晶81中之—晶圓辨識為第三組高信賴度晶圓中的 第四組高信賴度晶圓能由下列建立：ld)在S_D 間，從-或更多個餘刻相錄位置獲得S_D信賴度(映射j序7 將弟二組南信賴度晶圓中之各晶圓的S_D信賴度(映)資料盘） -或更多麵刻相依性位置所建立的—或更多個 、=、為 Ϊ做^d)若達到第—關相關信賴度(映射)需ί時、，便J 度晶圓中之—晶圓辨識為第四組高信賴度晶圓ί的 第五組咼信賴度晶圓能由下列建立：le)在S_D 間多個沉積相依性位置獲得S_D信賴度(映射)=序2月 將苐四組⑥信賴度晶圓中之各晶圓的S_D信賴度(映資料盘1) -或更多個沉積相依性位置所建立的—或更多 ^ 較;=)日若_—__賴度(映 ίΐ'ΐ 圓中之—晶圓辨識為第五組高信賴度晶圓ΪΞ 額外尚彳S賴度晶圓組能用類似程序建立。 評估位置能包括：處理相依性位置、量測相依 it位置望層相依性位置、晶圓相依性位置；如信賴度ί'ϊ 月匕〇括s-d(幕罩產生)育料的信賴值，該等S_D資料包括.、二ς 資料、S·!)纽龍、S_D量_+、S_D檢崎料、沾模^ 79 200903686 料、S-D預測資料或S-D歷史資料，或上述任何組合；及第一幕 罩產生彳&賴度需求能包括幕罩產生資料的信賴度資料限制，該等 k賴度資料限制包括.正確度限制、處理資料限制、量測資料限 制、檢驗資料限制、模擬資料限制、預測資料限制及/或歷史資料 限制。 、 在某些額外實施例中，第-非S_D傳輸次系統賴及/或第二 非S-D，輸次系統4〇2能接收S_D及/或非S_D晶圓。s_D晶圓能 傳輸到第- S-D傳輸次系統460及/或第二S_D傳輸次系統47〇。 與晶圓相關的資料能包括S-D信賴度資料及/或非S_D信賴度資 料。 、 來建用Λ乂信賴度資料及/或非s-D信賴度資料 (4ΐΓΓΪ3Γί〇, ΓΓ Γ)中受處理，且晶圓狀態資料能用來建 來執工ίό 資用第-組S-D晶圓 第一組S-D晶圓中之—或更多個=來=資料能^ 利用第-S_D次系統處理資料，第j 例中’藉 晶圓中之第一S _D曰曰曰圓建立 j S -D㈣值能為第一組S① 與第一 S-D信賴值限制做比較'D |圓S-D信賴值能 一組S-D晶圓的處理能繼續 信賴值限制，第 f _ - Μ 14=作為第第:,，正動作能包括： 夕個额外晶圓建立s ，’、、，D晶财之一或更 賴值與额外第一站信賴值:二J更ί個Ϊ外晶圓的剛言 又叫乂，及，若達到-或更多個 80 200903686 達至二賴值’便繼續處理第一組S-D晶圓’或是’若未 =個額外第一 S_D信賴值，則停止建立及比較。 他組^3日^賴，料及/或非S_D信賴度資料，亦能建立其 決定。1他t他S_D處理次序能為其他組的S4)晶圓來 中接受處理，且日，處理次序在其他S_D次系統 他组日曰曰®狀恶貝枓月b用來建立其他S-D處理次序。1 =ί=他S_D次系統中的-或糊 元件。舉例序能用來決定一或更多個其他沾處理 次系統中的-i更個其他沾 ?誠S_D信賴度資 -組非S-D曰立，且第一非沾處理次序能為第 次情況下，藉利用第—非沾處理 傳輸到非S D a i k i u $ ~D處理认序。苐一組非S_D晶圓能 Γίΐϊ 中的—或更多個非s_d處理元件，且第-非 而士% ^決定—或更多個第-非S-D處理元件。舉例 或i多個非L處理ί:能傳輪到-或更多娜^ 非，i各式實施例中，藉使用非S_D處理次序，非S-D ββ 在 次系統，接受處理，或藉使用非S_D處理次序，^沾匕晶Receive the eighth high-reliability wafer. The eighth high-reliability wafer can be the fourth S_D element 440. The developed wafer can be created with a second S_D tii ίί;; and the 4th and 4th resolution wafers can be created using the ninth S_D evaluation procedure. 1 έΒ h *s Rain One System 460 and/or Second S-D Transmission Sub System 470 can receive the $2 second wafer. The ninth set of high-reliability wafers can be transferred to - or more: 料 ^ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ ΐ 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二 第二Can be on each wafer - or more. And the tenth group of high-reliability wafers can use the tenth group S_D to evaluate the Cheng Yanfeng reliability wafers can be established by: la) in the first SD mask multiple screens The circle of trust reliability data and the value of the Ϊ Ϊ 或 或 或 或 或 或 & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & & The group is still a member of the reliability wafer. During the day, the circle f is established by the following: in the SD exposure program, the first group of 1^^ π is placed in the door to obtain the S_D reliability (one or more of the days in the day) The yen's S_D reliability (mapped data) is 78 200903686 demand comparison; and 3b) if the first-exposure phase is difficult _ the first-, high-reliability wafer-wafer is identified as the second group high Reliance u is achieved. Η "The ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ S_D reliability of each of the wafers (mapped data discs - or more developed dependencies locations - or more leaves j Γ: 匕 二) if the first development-related reliability is reached (map ) ί?: In Lai Jingjing 81—the wafer identified as the fourth group of high-reliability wafers in the third group of high-reliability wafers can be established by: ld) between S_D, from - or S_D reliability is obtained for multiple residual recording positions (S_D reliability data table for each wafer in the second group of South reliability wafers) - or more If the dependency position is established—or more, =, Ϊ do ^d), if the first-level related reliability (mapping) is required, then the wafer is identified as the fourth in the J-degree wafer. Group 5 High-reliability Wafers The fifth set of 咼 reliability wafers can be established by: l) obtaining S_D reliability (mapping) at multiple deposition dependencies between S_Ds = ordering February will be four groups of 6 reliabilities S_D reliability of each wafer in the wafer (reflection data disk 1) - or more deposition dependent positions established - or more ^ comparison; =) daily ____ Lai (reflection 映ΐ In the circle—the wafer is identified as the fifth group of high-reliability wafers. Additional S-Layer wafer sets can be established using similar procedures. The evaluation location can include: processing the dependence position, measuring the dependent position Dependent position, wafer dependency position; such as reliability ί ϊ ϊ 匕〇 s sd (curtain generated) feedworthy value of the feed, such S_D data including., two data, S·!) New Dragon, S_D quantity _+, S_D check raw material, smear mold ^ 79 200903686 material, SD forecast data or SD historical data, or any combination of the above; and the first mask produced 彳 & Limitation of the reliability data of the data generated by the mask. The limitation of the data includes: accuracy limit, processing data limit, measurement data limit, test data limit, analog data limit, forecast data limit and/or historical data limit. . In some additional embodiments, the first-non-S_D transmission subsystem and/or the second non-S-D, the transmission system 4〇2 can receive S_D and/or non-S_D wafers. The s_D wafer can be transferred to the first-S-D transmission subsystem 460 and/or the second S_D transmission subsystem 47A. Wafer-related data can include S-D reliability data and/or non-S_D reliability data. , used to build reliability data and / or non-sD reliability data (4ΐΓΓΪ3Γί〇, ΓΓ Γ) processed, and wafer status data can be used to build the work ό 资 第 第 组 SD SD SD In a group of SD wafers - or more = to = data can use the first -S_D system to process data, in the j example, 'by the first S _D circle in the wafer to establish j S -D (4) The value can be compared with the first SD trust value limit of the first group S1 'D | circle SD trust value can be processed by a set of SD wafers to continue the trust value limit, the first f _ - Μ 14 = as the first :,, The positive action can include: 夕 an additional wafer build s, ',,, D, one of the crystal money or the value of the additional first station trust value: the second J is more than the outer silicon wafer, also called 乂, And, if - or more than 80 200903686 reaches the second value, 'will continue to process the first set of SD wafers' or 'if not = an additional first S_D trust value, then stop establishing and comparing. His group's ^3 days, material and / or non-S_D reliability data can also establish its decision. 1 He can process the S_D processing order for other groups of S4) wafers, and the processing order is used in other S_D subsystems to set up other SD processing orders. . 1 = ί = the - or paste component in his S_D subsystem. The example sequence can be used to determine the -i and other SZD trust-group non-SD stands in one or more other processes, and the first non-stick process order can be the first case. , by using the first - non-stick processing to transfer to the non-SD aikiu $ ~ D processing order.苐 A set of non-S_D wafers can be used—or more than one non-s_d processing element, and the first-non-six%^—or more than the first-non-S-D processing elements. For example or i or more non-L processes ί: can pass - or more Na ^, i in the various embodiments, by using non-S_D processing order, non-SD ββ in the secondary system, accept processing, or borrow non- S_D processing order, ^ 匕 匕
3¾ ® mil Id J # S_D 立處理次序。此外，非s D ϋ並a晶81狀射料能用來建 輸次序來傳輸。嫩序能輸次細⑽傳 用第3非資:=第一料D處理次序 用晶圓資料及/或第-非处次系統處理或 81 200903686 範例申’藉利用第一非S—D々条处老M〜 能為第-組非S-D晶圓中之第非功信賴值 晶圓的第-非⑽信賴值能與第=立。第-非S-D 達到第-非S-D信賴值限制，第 °曰、，限制做比較。若 行，或是，若未達到第— #SD紹非_〇日日圓的處理能繼續進 修正動作。第-非S-时正動作^值限制’便能施加第—非S-Ϊ 處_料’為第—組非灿“S_D次系統 如信賴值；將—或更多個額^齡^ =外晶圓建立非 非S-D信賴值限制做比較；及二^ :U “賴值與額外第— S_D信賴值限制時，便繼續處理“疋二或2個額外第-非 值限制時，到—或 資料來建立，且j：他非s、=S_Dk賴度貧料及/或非S-D信賴度 定。其他組咖邮他組非S-D晶圓S 理次序來接受處理，且曰圓次糸統中用其他非S-D處 個其他非S-D處理元他非S_D次系統中的-或更多 更多個其他非S-D處理元件、j沾處理次序能用來決定-或 S-D處理次序及/或非=；^夕個處理以牛。 程序、-或更多個银亥 H 认序能包括：一或更多個塗布 個曝光程序、-或更化:J更程序、—或更多 更多個顯影程序、_或爭夕I序或更夕個鼠化程序、-或 程序、-更多個量測程‘ 、-或更多個掃描器相關 ;或更多«空爾料‘^ 系、苑及/麵S_D次緒能包括··—歧多個塗布次系 82 200903686 統、-或更多個侧次系統、一或更多個熱處理次***、 多個曝光次祕、-或更多個氧化次系統、 多個士更 統、-或更多，影次系統、—或更多個微影;^ 個掃描為相人，統：-或更多個量測次系統、—或更多個二 次系統…或子夕個評估次系統、—或更多個模擬次系統、二式 更多個預測次=統、-蚊多健新改製次系統…或 = t欠=次系統一或更多個真空預備次系:ΐ 或一或更多個 > 月冻次糸統，或上述任何組合。 亍、、死 S-D處理^件及/或非S_D處理元件能 f l 更刻處理元件、-或更多個以 更多滅化處理;件，=多處理或 ，理元件一或更多個掃描器㈣;件 „件、-或更多個错存處理f:或;= 個載所處理元件或-或更多個清潔處理ΐ 圖5依據本發明之實施例，說明 士, 理元更多個處理次系統中的一或更多個S-D處 接“更= 圓資料n 一+*寻·^糸'，'充且月b接收一或更多個晶圓的晶 料能包括歷史及/或^時能接收晶81。晶圓資 建立，且晶圓狀態s曰曰D0$f貪料能為一或更多個晶圓 粒相依性資料 ▲包括S_D轉、晶片相依性資料及/或晶 T ^ Id s D i° 处埋-人序此為邛/刀S-D晶圓來決定。或者，可建 83 200903686 立非S-D處理次序。 ，一或更多個晶圓能接受處理。在某些實施例中， =棘ti夕日-^處理元件執行第一 S_D產生程序，能產生 ί未驗说^ :η，贫且—或更多個未驗證評估特徵能產生在 ίίίΓ ΒΒ®苐—數量的評估位置。S_D晶圓狀離資料33⁄4 ® mil Id J # S_D The processing order. In addition, non-s D ϋ and a crystal 81 shaped shots can be used to transmit in order. The order of the tender order can be reduced. (10) The third non-investment is used: = The processing order of the first material D is processed by the wafer data and/or the non-division system or 81 200903686 The example is used to borrow the first non-S-D々 The old M~ can be the first-non-(10) trust value of the first non-SD-trusted wafer in the first-group non-SD wafer. The first-non-S-D reaches the first-non-S-D trust value limit, and the first, and the limit are compared. If you do, or if you have not reached the first - #SD绍非_〇日日 processing, you can continue to correct the action. The first-non-S-time positive action ^value limit 'can apply the first - non-S-Ϊ _ material' is the first-group non-can" S_D subsystem such as the trust value; will be - or more than the age ^ ^ The external wafer establishes a non-non-SD trust value limit for comparison; and when the second: U "value" and the extra - S_D trust value limit, it continues to process "two or two additional first-non-value limits, to - Or data to establish, and j: he is not s, = S_Dk bias poor material and / or non-SD reliability. Other groups of coffee mail his group non-SD wafer processing order to accept processing, and in the round circuit Using other non-SD processing other non-SD processing elements in the non-S_D subsystem - or more and more other non-SD processing elements, the j-processing order can be used to determine - or SD processing order and / or non =; The procedure is to use a cow. The program, or more than one Yinhai H sequence, can include: one or more coating exposure programs, or more: J-program, or more development programs , or _ or sequel to the sequel, or program, - more metrics, - or more scanners; or more «空尔料'^, 苑 and / face S_D The second can include a plurality of coating subsystems 82 200903686, or more side systems, one or more heat treatment subsystems, multiple exposure subsystems, or more oxidation subsystems, Multiple divisions, or more, shadow systems, or more lithography; ^ scans for people, systems: or more measurement subsystems, or more secondary systems ...or sub-evaluation subsystem, or more simulation subsystems, two more predictions = system, - mosquitoes, new systems, sub-systems... or = t ows = subsystems, one or more vacuums Prepare sub-systems: 或 or one or more > lye systems, or any combination of the above. 亍, 死 SD 加工, and/or non-S_D processing elements can process components more, or more One with more extinguishing; piece, = multi-processing or rational component one or more scanners (four); pieces, - or more or more of the error processing f: or; = one of the processed components or - Or more cleaning processes ΐ Figure 5 illustrates, according to an embodiment of the present invention, one or more SDs in a more processing subsystem, "more = circular data n + + seeking ^糸', 'The crystals that receive one or more wafers can include the history and / or ^ can receive the crystal 81. The wafer is established, and the wafer state s曰曰D0$f greed Can be determined for one or more wafer grain dependency data ▲ including S_D turn, wafer dependency data, and/or crystal T ^ Id s D i° buried-human sequence as a 邛/knife SD wafer. 83 200903686 can be set up in a non-SD processing order. One or more wafers can be processed. In some embodiments, the =Spear-Through processing component performs the first S_D generation procedure, which can generate ί untested Say ^: η, lean and—or more than one unverified evaluation feature can be generated at the evaluation location of ίίίΓ 苐®. S_D wafer-like data
；«ί " K sS 斤而產生位置的數置及所需評估位置的數量。 丕p r ^ t ’ 一查詢能執行來決定一或更多個S_D產生程序使 一或更多個S_D產生程序正確 Ϊ支到步驟53G，且當—或更多個S-D產生程序非正 =執:後’程序500能分支到步驟58〇。舉: 資料、微粒資料、影像資料及/或故障^ 或更多個額外程序來接受事後處理， 理次括再測1、再評估、再重新改製及/或將晶圓從處 第一 朗選定的位置來評估。在某些情況下， 的第一位置獲得。第 料’該等資料能藉使用執行於S_D ^元件 且第一已驗拔干估日日圓上的第一位置來建立， 已驗證量、、則ί料從歷史及/或即時資料庫中獲得的第一 第:信雛能為晶圓驗證差異， 圓驗證差魏㈣-㈣驗鮮料Μ ^置粒’且第一晶 藉使用第-信賴值I::;;已述 任何組合，第一風險因素能為第一 s_ ^ ’或上述 建立’且藉使用第一風險因素、第:曰曰圓 或晶圓資料’或上述任何組合，第-總風二 84 200903686 估晶圓來建立。 圓已否-或更多個-評估晶 能分支到步驟565，而ί一或=#=日，被驗證時’程序⑽ 序能分支到步驟555。一 S_D 5平估晶圓未被驗證時’程 S-D晶圓，所剩餘位置的數量能 3風=素的第一已驗證 增加-個，且與第-处評:工關:固第，=置的數量能 識為第-已驗證S-D程;^ 有關之—处產生程序能辨 唯因素大於第—晶圓驗證限制時，第-位置㈣ 識為具有與其有關之第—風險因素的第 < 置此辨 Ϊ造訪位置的數量能增:-個:第= 说平估晶圓能有與其有關之已驗證晶圓資料。弟已驗 在555中，能執行一查詢來決 額外位置時，餅齡支闕麵。當需要 時，程序500能分支到步驟555。 而田不吊要額外位置 當現行晶圓需要額外位置時，能執 =晶圓上之該數量的所需位置中選定—新位第-S-D f有與其之新未驗證評估特徵，該 ^ ’新位置 =生；b)從第-处評估晶圓上之新位置獲得^日^產土程序 ，立第-S-D評估晶圓上之新位置的新H 資料； 新已驗證資料包括新已驗證量測及/或檢^貝其中，該 =圓，，，及新已驗證資料所計算出的新晶由使用 驗紅異、苐-信賴值、第—晶圓驗證差H新細員值、 ，述任何組合，建立第一 S_D評估晶圓上之日日圓資料， 素，Q猎使用新風險因素、新信賴值、新晶圓驗^ ^的新風險因 ° /、、第一風險 85 200903686 組合’建立第異或晶圓資料，或上述任何 =或等於新晶圓二;^當新總風險因 J…、有關之新總風險因素的第一已-，估晶圓辨識為具 ::置的數量，增加一個所造訪：旦減少一個所 芯，生程序辨識 數量，增加i所造訪位U、—個所需位置的 其有關之新已驗證晶圓資料；i)當所‘驗證晶圓具有與 ，當所需位置數量以置;= 或者’可使用盆侦壬皮 需要要額外評估晶圓。當 外評，時，程序500能分支二，而當不需要額 沾圓額，能執行下列步驟:ai)選定-額外 置；ci)從額外s-d評ii、圓上之第一數量的所需位 外位置，i中，飾第一數置的所需位置中選定-額 S-D量測資料及/或S_D / 2 證—包括額外 外位置建立額外已驗證額外S.D評估晶圓上之額 或信賴值、第-晶 'n次上述任何組合，為額外S-D評估晶圓 86 200903686 亡之額外位置建立額外風險因素； ^賴值、額外晶圓驗證差1 9额卜風險因素、额外 證差異、第-風險因素f言賴值、新晶圓驗 貧料’或上述任何組合，為額外S:D 曰^驗證差異或晶圓 素’· 1Ϊ)當額外總風險因素小於或紛j建立額外總風險因 外S-D許话晶圓辨識為具苴關之=驗證限制時，將额 驗證S-D晶圓，將所f ^數==额外總風險因素的額外已 量增加，，且在評触式3里=：^ ’將所造訪位置的數 為已驗證資料，Ί1)當额外總風險因辛大、有關之資料館存 將額外S-D評估晶圓辨^ 1 驗證限制時， 額外未驗證S-D晶圓，將^的jfj額外弟-風險因素的 已驗證晶圓資料;kl)當額外圓具有f其有關之額外 ^估晶圓上之所需位置的«Λ砂二外处 位置於零時，停止S_D程ΪΪ產需 需要額外評估晶是否需要額外產生晶圓。當 行，如圖5所干。」Λ此刀支回到步驟515，且處理能進 570 〇 5 5〇0 量與之=== g的第:ί量;及藉利用s-d傳輸次系統中之二固 夂子及/或延遲第一數量的受延遲s-D晶圓，其 宁，^件包括支撐二或更多個晶圓的裳置。 利用:ΐΐ:，之”估晶圓的第-數量與可 -數吾ί數之間的差異，決定受延遲S_D晶圓的第 料.為楚、心_文延遲S_D評估晶圓決定已更新S-D晶圓狀態資 科’為弟1估次系統中之一或更多個S七評估元件決定已更新 87 200903686 可操作狀態資料；為第一受延遲 輸次序；藉利用已更新可操作狀能=估晶圓決定第-已更新傳 可利用S-D評估元件；當第—剛才斗’辨識出—或更多铜才 藉利用第—已更新傳輸次 元件可利用時， 一或更多個評估次系統中的第才3評估晶圓傳輸至 一剛才可_ 8-0評估元件無法#S_D評估元件；當第 其他修正動作包括：停止處射加一第二修正動作。 個S_D評估晶圓、再測量理、再評估-或更多 更多個S-D言平估晶圓、再重新改製_ f 再檢驗一或 存—或更多個S.D評估晶圓、清^評估晶圓、儲 評估-或： 晶圓 。卜SDU度地圖及/或功風險評估地圖能用來驗證一 圖6依據本發明之實施例’說明產生& ==雜一 Μ多個處理次系統中之一以= ^到二二2 —組3①晶圓，且一或更多S_D處理元件能連 資料，it 輸次㈣。各晶圓能具有與其有關之晶圓 料包括气及'或即時㈣。或者，—不同的次系 壯。晶圓狀態資料能為—或更多個晶圓建立，且晶圓 悲貝…括S-D資料、晶片她性資料及/或晶粒相依性資 二外，一或更多個S_D處理次序能為晶圓建立，且S-D處理 :人序朗S_D晶圓狀態資料、晶片相依性晶圓狀態資料及/或晶粒 相依性晶圓狀態資料來建立。 位各S-D晶圓能建立有晶圓狀態資料，且晶圓狀態資料包括各 圓之所需產生位置的數量及所需評估位置的數量。 晶;«ί " K sS kg to generate the number of positions and the number of required evaluation positions.丕 pr ^ t ' A query can be executed to determine that one or more S_D generation programs cause one or more S_D generation programs to correctly branch to step 53G, and when - or more than one SD generation program is not positive = hold: After the 'program 500 can branch to step 58 〇. To: Data, particle data, image data and/or faults ^ or more additional procedures for post-processing, including re-testing 1, re-evaluation, re-reforming and/or wafer selection from the first The location to evaluate. In some cases, the first position is obtained. The material 'this information can be established by using the first position on the S_D ^ component and the first tested dry day, the verified quantity, then the material is obtained from the historical and / or real-time database. The first number: letter chick can verify the difference for wafer, round verification difference Wei (four) - (four) inspection materials Μ ^ granulation ' and the first crystal borrows the use of the first - trust value I::;; any combination has been described, A risk factor can be established for the first s_^' or the above-mentioned 'and using the first risk factor, the first: round or wafer data' or any combination of the above, the first total wind II 84 200903686. The circle has no-or more-evaluation of the crystal energy branch to step 565, and ί1 or =#=day, when verified, the program (10) sequence can branch to step 555. An S_D 5 flattened wafer is not verified when the 'process SD wafer, the number of remaining positions can be 3 wind = prime first verified increase - and with the first comment: Gongguan: Gudi, = The number of settings can be recognized as the first-verified SD process; ^ the relevant--the generation process can identify the factor greater than the first-wafer verification limit, the first-position (four) is recognized as the first-thickness factor associated with the risk factor The number of locations that can be identified by this can be increased: - one: the first = the flat wafer can have verified wafer information related to it. The younger brother has already checked in 555, and can perform a query to determine the extra position. Program 500 can branch to step 555 when needed. The field does not hang additional locations. When the current wafer requires additional locations, it can be selected from the desired number of locations on the wafer - the new bit - SD f has a new unverified evaluation feature, ^ ' New location = raw; b) Obtain the new date from the new location on the evaluation wafer, and establish a new H data for the new location on the wafer. The newly verified data includes the new verified data. Measurement and/or inspection of the new crystals calculated by the = circle,, and new verified data, using the red, 苐-trust value, the first wafer verification difference H new skill value, , describe any combination, establish the first S_D evaluation wafer on the Japanese yen data, prime, Q hunting using new risk factors, new trust value, new wafer inspection ^ ^ new risk factor ° /, first risk 85 200903686 Combine 'establish divergence or wafer data, or any of the above = or equal to new wafer 2; ^ When the new total risk is due to J..., the first new total risk factor related to the existing -, the wafer identification is: The number of placements is increased by one visit: once the number of cores is reduced, the number of programs identified is increased, and the number of visits made by i is increased. For a desired position of its new wafer verified information; I) when the "verification wafer having, when the number is set to a desired position; or = 'pots can be used to detect non skin requires additional evaluation wafer. When the external evaluation, the program 500 can branch two, and when the amount is not required, the following steps can be performed: ai) selected - extra set; ci) from the additional sd ii, the first quantity required on the circle Out-of-position position, i, the selected number of required positions in the first number, and / or S_D / 2 certificate - including additional external position to establish additional verified additional SD evaluation on the wafer or the amount of trust Value, first-crystal 'n times any combination of the above, to establish additional risk factors for the additional position of the additional SD evaluation wafer 86 200903686; ^ Lay value, additional wafer verification difference 1 9 amount risk factor, additional certificate difference, - risk factor f, value of new wafers, or any combination of the above, for additional S:D 曰^ verification difference or susceptibility '· 1 Ϊ) when the additional total risk factor is less than or When the SD disc is recognized as having a verification = verification limit, the SD wafer will be verified, and the additional quantity of the total number of additional factors will be increased, and in the evaluation 3 =:^ 'The number of locations visited will be verified, Ί1) When the additional total risk is due to The closed library will add additional SD to evaluate the wafer identification limit, the additional unverified SD wafer, the jfj additional brother-risk factor of the verified wafer data; kl) when the extra circle has f related Extra evaluation of the required position on the wafer «Zero Sand 2 outside the position at zero, stop S_D process production needs additional evaluation of whether the crystal needs additional wafers. When it is done, as shown in Figure 5.刀This knife returns to step 515, and the processing can enter the amount of 570 〇5 5 〇 0 and === g; and use sd to transmit the second solid scorpion and/or delay in the subsystem The first number of delayed sD wafers, including the ones that support two or more wafers. Utilize: ΐΐ:, “Evaluate the difference between the number of wafers and the number of tensors, and determine the material of the delayed S_D wafer. The decision to update the wafer has been updated. SD Wafer Status 资科's evaluation of one or more S7 evaluation components in the system 1 has been updated 87 200903686 operational status data; for the first delayed input order; by using the updated operational status = Estimate wafer decision--Updated can use SD evaluation component; when the first-just-recognition--or more copper is used to use the first-updated transmission sub-component available, one or more evaluation times The third evaluation wafer in the system is transferred to a _ 8-0 evaluation component cannot be #S_D evaluation component; when the other correction actions include: stop at the injection plus a second correction action. S_D evaluation wafer, then Measurement, re-evaluation - or more and more SD words to flatten the wafer, re-reform _ f re-test one or save - or more SD evaluation wafers, clear evaluation wafers, storage evaluation - or: Wafer. The SDU degree map and/or the work risk assessment map can be used to verify a Figure 6 basis. The embodiment of the invention 'illustrates that one of the multiple processing subsystems is generated by = ^ to two two - two groups of 31 wafers, and one or more S_D processing elements can connect data, it is output (4) Each wafer can have its associated wafers including gas and 'or instant (4). Or, - different sub-systems. Wafer status data can be established for - or more wafers, and wafers are sad ... including SD data, wafer data, and/or grain dependency, one or more S_D processing sequences can be established for wafers, and SD processing: S-D wafer state data, wafer dependencies Wafer status data and/or die-dependent wafer status data is established. Each SD wafer can be created with wafer status data, and the wafer status data includes the number of required locations for each circle and the required evaluation. The number of positions.
^在610中’一程式庫產生處理次序能建立來產生S-D評估資 料的程式庫’且該程式庫產生處理次序能用晶圓狀態資料產生。 程式庫產生處理次序能包括S-D傳輸程序、S-D產生程序或S-D 88 200903686 5平估程序’或上述任何組合。 廑甚if2〇中，待處理之第一數量的S_D處理晶圓能用第一藉々 程序能料-程式庫產生處理次序來決定。序J s七評估 第二操作性狀態能為一或更多個處理次系統中之複數個 i能建立。藉利用一或更多個S_D處理元件之第—摔作性 狀L丄此決定可利用處理元件的第一數量。 呆作陘 藉利用晶圓資料、晶圓狀態資料、S_D程序晶 3處理7^件之第—數量，或上述任何組合，能建立第―s-ϊ^ In 610, a library generation processing sequence can be established to generate a library of S-D evaluation data' and the library generation processing order can be generated using wafer state data. The library generation processing order can include an S-D transmission program, an S-D generation program, or an S-D 88 200903686 5 evaluation program' or any combination of the above. In the case of if2, the first number of S_D processing wafers to be processed can be determined by the first processing procedure of the program. Sequence J s Seven Evaluation The second operational state can be established for a plurality of i in one or more processing subsystems. The first number of processing elements can be utilized by utilizing the first-to-be-fall behavior of one or more S_D processing elements. By using wafer data, wafer state data, S_D program crystal 3 processing, the number of the pieces, or any combination of the above, can create the first s-ϊ
理亓中，當S-D處理晶圓之第一數量小於或等於可利用虛 ，理曰m弟一數量時，藉利用第一 S_D傳輸次序，第一數量的SD 個處理次祕中之第—數量的可_ -數量時，^Lt序；量大於可姻處理元件之第 相關S-D產生程序’且一或更多個程式庫 新晶“# if=序’產生了已更新晶圓資料及/或已更 之所需評估位更新晶圓狀態資料能包括各s-d處理晶圓 序已于來決定是否一或更多個s-d產生程 序_能分支到^ ^更多個S_D產生程序正確地執行後，程 確地執行後，程;At ^而當一或更多個S_D產生程序並未正 資料、處理室次 刀支到步驟690。舉例而言，可使用工具 在64(^1、微粒資料、影像資料及/或故障資料。In the meantime, when the first quantity of the SD processing wafer is less than or equal to the available virtual quantity, the first S_D transmission order, the first quantity of the first number of SD processing sub-secrets is utilized. _ - quantity, ^ Lt order; quantity is greater than the relevant SD generation program of the processing component' and one or more libraries of new crystal "# if=序" have generated updated wafer data and / or The required evaluation bit update wafer state data can include each sd processing wafer sequence to determine whether one or more sd generation programs can branch to ^^ more S_D generation programs are executed correctly, After the program is executed, At ^ and when one or more S_D generating programs are not positive data, the processing room is procedurally extended to step 690. For example, the tool can be used at 64 (^1, particle data, Image data and / or fault data.
評估程序來決定，评^之S'0評估晶圓的第一數量能用第一 S-D 料、晶圓資料或更，圓資料、已更新晶圓狀態資 評估晶圓的所需評估位’或上述任何組合’能決定各S-D 89 200903686The evaluation process determines that the first number of S'0 evaluation wafers can be evaluated using the first SD material, wafer data, or wafer data, or the updated wafer state evaluation wafer. Any combination of the above can determine each SD 89 200903686
評估能===統中之複數個S-D 評估元件。 傳輪人系統此連接到一或更多個S_D 第IS第一操作性狀態，能為一或更多個沾評估元株^ 二ίΐ:可利用評估元件。藉使用已更新晶圓資二=定 量或可利用評估元件晶圓之第-數 S_D傳輸次序。 《數里或上述任何組合，能建立第二 估元評估晶圓之第一數量小於或等於可利用坪 估兀仵之弟一數置時’藉利用第二s_ 旦训汗Evaluate multiple S-D evaluation components in the === system. The passer system is connected to one or more S_D IS first operational states and can be used to evaluate one or more divisors: an evaluation component is available. The first-number S_D transmission order of the wafer of the evaluation component wafer can be utilized by using the updated wafer. "After a few miles or any combination of the above, the second estimate can be established. The first quantity of the wafer is less than or equal to the number of available flats."
評估晶圓能傳輪到一或更多個 的S-D 一數量時，則能施加%糊評估元件之第 所需^置U定，S_D評估晶圓上之該數量的 程序=產生之第，式庫相關^(評^^並用第一处產生 從第- S-D晶圓一 式庫相關評估資料能 第一程式庫相關量測及/或檢驗ΐί。’第f 有關之When the evaluation wafer can transmit one or more SD quantities, the first requirement of the % paste evaluation component can be applied, and the quantity of the program on the wafer is evaluated by S_D. The library related ^ (evaluate ^^ and use the first place to generate the relevant data from the first - SD wafer library. The first library can be related to the measurement and / or inspection ΐ ί. 'f related
晶圓上之第-位置建立，貝3 & 侃為第一 S4D 值。藉使用第一信賴值、第一程式第位置=立有第-信賴 述任何組合，第-位置能建立有i士風或，或上 何組合，第-位置能建立有晶圓資料，或上述任 生限制時，第作等2 一程式庫相關產 第一總風險因素，所剩餘位置的數少=具二 90 200903686 數量能增加一個，且與第一位置有 估程式庫中。當第—總風 一個。第-已驗證位置能具有與數量能增加 m時’程序_能分支回到步驟65G，而當不4額 時’程序600能分支到步驟67〇。 向田不而要額外位置 驟：—或更多個控制器能使用下列步 位置，其中，該新位置；有與其 產生的新程式庫相關參考特徵第估D $程序所 位_得新程式庫相關評估資料，4，3;平士，從新 新程式庫量測及/或檢驗資料；c)在第! 有3有關之 立新已預測資料，其中，新p 日日囫上，為新位置建 驗資料;利用由使用新程式庫^量測及/或檢 計算出的新程式庫相關差異，為 已預測資料所 賴值式庫_差異、第;咖新信 晶圓貧料，或上述任何組合，耘式庫相關差異或 新風險因素、新信賴值、新程險因素；糊吏用 為新位置建立卿’或上述任何組合， 庫相關產生限制時，將新位;^於或等於新程式 素的新已驗證位置，將所，立有與其有關之新總風險因 的數量增加一個，且將固，將所造訪位置 位時置：置 新已驗證資料具有與其有關之新；：證=^*1;以需 91 200903686 二置ίίϊΐί日ί庫=2科）；及j)當所需位置數量等於零 估晶要-或更多個处評 =驟需要-或更 當使用額外晶圓時，一岑爭客彻 。. 在額外S_D評估晶圓上，從下列步驟：al) 置’其中，該額外位置具有缝有斤中選定一額外位 額外程式庫相關參考(評峨徵；M 生程序的 位置獲得額外程式庫相關評估資料，)上，從額外 關之额外程式庫相關量測及^ 、上位置具有與其有 為額外位置建立額外已預測:驗二z额外沾晶圓上， 估資料及額外已預測資料所夕程式庫相關評 =置?立額外信賴值4;;出用=卜=庫座為額 f異、新信賴值、新程式庫相關差異、第二ΐ賴J外Ϊ式庫相關 相關差異或晶圓資料，或上述任何組合 程式庫 險因素；fi)藉使用額外風險因素二賴、置建立額外風 :丄第值、第-程式庫相關差異或晶圓ΐ料，㈡=因 、、且a，為額外位置建立額外總風險因素 戍上述任何 ϊίΓ額外程式庫相關產生限制時:將額二立 減>、-個’將所造訪位置的數量增加—個 置的數量 2^作為已驗證資料儲存在評估程式庫中；hi) 置有關 f之額外第二風險因素的額外未驗證位置，將有f其 減卜個’將所造訪位置的數量增加-個，其中= 92 200903686 置具有與其有關之額外已驗證程式庫相 估晶圓可利用時，並且額外S_D評估曰’ U)當額外S-D評 零時，重複步驟al)〜hi);及仍當額外所需位置數量大於 或額外S-D言平估晶圓上之所需位曰曰圓無法利用時’ 庫產生程序。 里寺於苓4，停止S-D程式 此外，在不同時間下，受延遲S_D 評估。源自受延遲晶圓的資料—旦可利用時 源自受延遲晶圓的資料能前授及/或反饋，二 需要額外產生° # 行，如圖6所示。當不需要額外產夺 々驟15 ’且處理能進 步驟_。程序_ 1Γ束叫，料6GG能分支到 圖7說明儀S-D程序在晶圓上產生雙重 法的例示性流程圖。 蜀蛾敗、，Ό構之万 -欠j傳輪次系統能接收—或更多個晶圓’且晶圓 -貝枓，為-或更多個晶圓接收。或者，—不同次系統能接收晶圓。 晶圓貧料能包括歷史及/或即時資料。—或更多個晶圓能建立有晶 圓狀態資料’且晶圓狀態資料能包括S_D資料、晶片相錄資料 及/或晶粒相依性資料。此外’―或更多個S_D處理次序能為晶圓 建立’且使用S-D晶圓狀態資料、晶片相依性晶圓狀態資料及/或 晶粒相依性晶圓狀態資料，能建立S_D處理次序。 在，一例示性實施例中，回頭參考圖i，一 S_D晶圓能夠由 連接到第一微影次系統110的一或更多個S_D傳輸次系統(HH、 102)所接收。一或更多個控制器(114、119、124、129、134、139、 144 ' 149 ' 154、159、195)能接收資料。在某些實施例中，當一晶 圓被接收時’與該晶圓及/或晶圓批次有關之資料能被接收，且該 等資料包括S-D及/或非S-D資料及/或訊息。舉例而言，該等資料 能包括S-D地圖’如輸入之S_D晶圓及/或輸入之晶圓批次的信賴 93 200903686 營地圖、處理地圖、風險評估地圖、損壞評估地圖、參考地圖、 量測地圖、，測地圖、成像地圖、程式庫相關地圖及/或晶圓相關 地圖。該等資料能包括源自一或更多個與處理系統、主系統及/或 另外處理^系統有關之次系統的資料及/或訊息。舉例而言，S_D訊 息及/或，貧料能用來決定及/或控制處理次序及/或傳輸次序。 一該等資料巧用來處理，以獲得能包括歷史及/或即時資料的晶 圓資料。晶圓資料亦能為各晶圓來決定，且S_D晶圓資料 S-D晶圓狀態資料及S_D信賴度資料。 、计此匕括 士，額外S-D晶圓需要處理時，且當第一仙處理元件可利用 日了 ’藉使用連接到-或更多個處理次系統的S_D傳輸次系統，額 外S-D晶圓能傳輸到一或更多個處理次系統中的額外s_d處理元 件丄而當第-S-D處理元件無法利料，藉使聽制一或更多 Ϊί理次系統的S_D傳輸次系統，則能延遲額外S-D晶圓。S-D 專輸，系、统中的^輸元件能用來以一段時間儲存及/或延遲晶圓。 j 7U巾’藉使用晶圓資料，一或更多個S_D處理次序能為 m ΐ建立。晶圓資料及/或S_D晶圓狀態資料能在晶圓被接 ^來晶圓建立S_D處理程序之前及/或之後時使用。此The first position on the wafer is established, and Bayes 3 & 侃 is the first S4D value. By using the first trust value, the first program position = the combination of the first-trust statement, the first position can establish the i-wind or the combination, the first position can establish the wafer data, or the above When the limit is limited, the first total risk factor related to the production of the library is the first total risk factor, and the number of remaining positions is small = two 90 200903686 The number can be increased by one, and the first position is estimated in the library. When the first - the total wind one. The first-verified position can have a quantity that can be increased by m. The program_ can branch back to step 65G, and when it is not 4, the program 600 can branch to step 67. There is no need for additional location to the field: - or more controllers can use the following step positions, where the new location; has a reference to the new library associated with the resulting reference feature estimated that the D $ program is located in the new library Assessment information, 4, 3; Pingshi, measuring and/or testing data from the new library; c) in the third! There are 3 relevant new and predicted data, among them, the new p day and day, for the new location Data; using the new library-related differences calculated and/or calculated by using the new library, the value of the predicted data is _difference, the first; any new combination of the above, or any combination of the above耘 库 相关 或 或 或 或 或 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关 相关The new verified location, the number of new total risk factors associated with the establishment, will be increased, and will be fixed, the position of the visit will be set: the new verified data has new information related to it; ^*1; needs 91 200903686 2 sets ίίϊΐί Branch Library = 2); and j) is equal to zero when the number of the desired position to estimate the grain - more at neutral or = sudden need - or more when using extra wafer, a Cen fight off thoroughly. On the additional S_D evaluation wafer, proceed from the following steps: a) Set the 'extra position with the extra block selected for the extra position in the additional position (reviewed; the location of the M program gets the extra library) Relevant assessment data,), from the additional library related measurement and ^, the upper position has an additional predicted position with the additional position: the second z additional on the wafer, the estimated data and the additional predicted data夕 库 相关 = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = = Wafer data, or any combination of the above mentioned library risk factors; fi) by using additional risk factors, set up additional wind: 丄 value, library-related differences or wafer defects, (b) = cause, and a, create additional total risk factors for additional locations. When any of the above Γ Γ additional libraries are related to the restriction: the amount of the second is reduced by >, the number of the visited locations is increased by - the number of 2^ is verified Data stored in the evaluation library In the additional unverified position of the additional second risk factor for f, there will be a decrease in the number of visits by the number of visits, where = 92 200903686 has additional verified programs associated with it The library evaluates the wafers available, and the additional S_D evaluates 曰' U) when the additional SD is zeroed, repeats steps a)~hi); and still when the number of additional required locations is greater than or additional SD is flattened on the wafer The library is generated when the required bit is not available. In the temple, the S-D program is stopped. In addition, at different times, it is evaluated by the delayed S_D. Data from delayed wafers—when available, data from delayed wafers can be pre-authorized and/or fed back. Second, additional ## rows are required, as shown in Figure 6. When no additional production is required, step 15 ’ and processing can proceed to step _. Program _ 1 叫 叫 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , The 蜀 蜀 、 , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , , Or, - different subsystems can receive wafers. Wafer poor materials can include historical and/or real-time data. - more or more wafers can be created with wafer state data' and wafer state data can include S_D data, wafer history data, and/or grain dependency data. In addition, the "- or more S_D processing sequences can be established for the wafer" and the S-D processing order can be established using S-D wafer state data, wafer dependency wafer state data, and/or grain dependent wafer state data. In an exemplary embodiment, referring back to FIG. 1, an S_D wafer can be received by one or more S_D transmission subsystems (HH, 102) connected to the first lithography subsystem 110. One or more controllers (114, 119, 124, 129, 134, 139, 144 '149 '154, 159, 195) are capable of receiving data. In some embodiments, data relating to the wafer and/or wafer lot can be received when a wafer is received, and the data includes S-D and/or non-S-D data and/or messages. For example, such information can include SD maps such as input S_D wafers and/or input wafer batches of trust 93 200903686 camp maps, processing maps, risk assessment maps, damage assessment maps, reference maps, measurements Maps, maps, image maps, library-related maps, and/or wafer-related maps. Such information can include data and/or information derived from one or more subsystems associated with the processing system, the host system, and/or the additional processing system. For example, S_D messages and/or lean materials can be used to determine and/or control the processing order and/or transmission order. A piece of such information is used to process the data to include historical and/or real-time data. Wafer data can also be determined for each wafer, and S_D wafer data S-D wafer status data and S_D reliability data. In this case, additional SD wafers need to be processed, and when the first processing component is available, the additional SD wafer can be used by the S_D transmission subsystem that is connected to - or more processing subsystems. Transferring to additional s_d processing elements in one or more processing subsystems, and when the first-SD processing elements are unpredictable, can be delayed by listening to one or more S_D transmission subsystems of the system SD wafer. The S-D dedicated transmission system can be used to store and/or delay the wafer for a period of time. j 7U towel 'by using wafer data, one or more S_D processing orders can be established for m ΐ. Wafer data and/or S_D wafer status data can be used before and/or after the wafer is connected to the wafer to establish an S_D process. this
Hi i曰ί 一S-D處理次序及7或S_D曰曰曰圓資料，第一處理次系 各n識出。在一範例中’第—處理次序能建立來在晶 0上之一或更多個層中產生一數量的蝕刻特徵。 在第-，示性實施财，能建立S_D雙重金屬駭㈣’㈣ 該S_D DD處理次序能包括第一镶録生程 序、第二職產生程序及第二鑲嵌評估程序。 ί二=B:曰Ξ能加以建立’七晶圓資料能用來建立該 序來處理。ws日圓。第一組S_D處理晶圓能用第—鎮嵌產生程 S D 2未S①晶圓能接受傳輸及/或受延遲。第一組 第-未處理S_D晶圓來決定，s 括一或多個處理相關程序。當第—站處财件可時，藉利 94 200903686 用連接到第一處理次系統的S_D傳輸次系 :J傳=第一處ίΙ次系統中之第，處理以= 次系統丄能延遲第-未處理S_D晶圓。Μ—人系統的S-D傳輸 晶圓建I。即二::::茫二傳七:能為第-組S_D處理 件時，操作性狀態能改變。即時傳輸处1出S-D處理το 輪晶圓進出微影相關次系統中的第一，並用來傳 當弟一數量的第- S-D處理元件可利動r f並改變。 統，第一數量的第-組S_D處理晶圓能傳沾傳輸次系 中之第一數量的第—S_D處理元件口nib2^= 一微影次系統⑽） 中之其他S-D晶圓無法利用第一 4處)理處理晶圓 輸次系統，第-組S_D處理晶圓中之盆他曰。錯利用S_D傳 序。舉例而言，藉利用S_D傳 气用第一 S-D傳輸次 第一組S-D處理晶圓中之苴侦ς n、曰 或更多個傳輸元件， 輸元件能用以支撐二或更多個晶圓。曰曰圓^以第—段時間延遲。傳 他S-D晶圓能在第一段時間後接^ ^。^ ，理晶圓中之其 能建立新S-D傳輸次序。 田S-D日日圓受延遲時， 當已辨識出受延遲未處理S__D aHi i曰ί An S-D processing order and 7 or S_D round data, the first processing sub-system is recognized. In an example, the 'process-process order' can be established to produce a number of etch features in one or more layers on the crystal 0. In the first, the implementation of the financial, the S_D double metal 骇 (4) can be established. (4) The S_D DD processing order can include the first programming program, the second job generation program, and the second mosaic evaluation program. ί二=B: You can build it. Seven-wafer data can be used to create this sequence for processing. Ws yen. The first set of S_D processing wafers can be used for the first-in-one process. S D 2 The S1-free wafer can accept transmissions and/or be delayed. The first set of unprocessed S_D wafers determines that s includes one or more processing related programs. When the first station is available, the borrowing 94 200903686 uses the S_D transmission sub-system connected to the first processing subsystem: J transmission = the first in the system, the processing is = the system is delayed. - Unprocessed S_D wafer. Μ-Human system S-D transmission Wafer construction I. That is, two::::茫二传七: When the device can be processed for the first group S_D, the operational state can be changed. The instant transfer 1 out S-D process το rounds the wafer into and out of the lithography-related subsystem, and is used to transmit a number of first-S-D processing elements to boost r f and change. The first number of the first-group S_D processing wafers can transmit the first number of the first S_D processing element ports nib2^= one of the micro-image systems (10) in the transmission sub-system cannot be utilized. One of the four) processes the wafer transfer system, and the first set of S_D processes the pots in the wafer. Wrong use S_D order. For example, by using S_D gas transmission, the first SD transmission is used to process the detection signals n, 曰 or more transmission elements in the first set of SD processing wafers, and the transmission elements can be used to support two or more wafers. .曰曰 round ^ delayed by the first period. It is said that his S-D wafer can be connected after the first time. ^, in the wafer, it can establish a new S-D transmission order. When the field S-D day yen is delayed, when it is recognized that the delay is unprocessed S__D a
晶圓決定已更新晶圓狀態資料。在^ 延遲未處理S-D 作性狀態資料能為-或更多個處灸’已更新操 理元件來決定，且一或更多 =、、死中之或更多個S-D處 新操作性狀態資料來辨識f 處理元件能用已更 時’藉使用連接到-或更多個===二可利用 才可细S-D處理元件。個處理次糸統中之第-剛 田弟S-D處理元件無法利用時，藉使 95 200903686 未處理&D晶圓能第二傳輸次糸統，第—受延遲 在以第二段時間延遲。受延遲未處理S_D晶圓能 處理、暫停處理、S估，且事後處理能包括停止 圓、再檢驗—或更多個晶圓:^㈡二-或更多個晶 清潔-或更多個“以=存 的-或輸二？處理次序為晶圓辨識出 -或 中之-或更多個=ίί=ίί;^在7或更多個處理次系統 理第-未處理S_D晶圓，且 S_D程序能用來處 相關程序。在替代實施制φ，一-序能包括一或更多個處理 中受處理。舉例而言，S_D理能在非S-D次系統The wafer determines that the wafer status data has been updated. In the ^ delayed unprocessed SD status data can be - or more moxibustion 'has updated operational elements to determine, and one or more =, dead or more SD new operational status data To identify that the f processing component can be used to connect to - or more === two to use the fine SD processing component. When the S-D processing component of the processing system in the secondary system is not available, the 95 200903686 unprocessed &D wafer can be used as the second transmission subsystem, and the first delay is delayed in the second period. Delayed unprocessed S_D wafers can be processed, paused, evaluated, and post-processed can include stop circles, re-inspections—or more wafers: ^(two) two-or more crystal cleanings—or more” Identifying - or - in the - or more = ίί = ίί; ^ in the = stored - or in the second processing order - in 7 or more processing subsystem - unprocessed S_D wafer, and The S_D program can be used to program related programs. In the alternative implementation system φ, the 1-sequence can be processed in one or more processes. For example, S_D can be used in non-SD subsystems.
> - s-D 能產生在;?驗組未驗證S-D驗證晶特徵 在第晶圓上之第一位置的第； 當已識別出額外未處理S_D ::驗1徵。 處理。額外第—組的未驗證^ 程序來 上，且額外第—組的未驗證c產生在額外驗證晶圓 上之^—位置的第-未驗證驗證特^特徵能包括各額外驗證晶圓 - S-D程序3時’其在較晚時間能用第 延遲驗證晶圓上，且驗證特徵能產生在受 延遲驗證晶圓上之第一位詈、^祖S-D驗證特徵能包括各受 未驗證奶程序能用額外未處理i圓證特徵。或者，另外 96 200903686 繼續進行第一例示性實施例，當第一鑲嵌 執行第一產生程序，而當第二《層正在，能 生知序。在第—產生程序期間，第一數量之第—b ^苐-產 ΐ用ί一鑲嵌產生程序來處理，且第—組已處理晶晶Ϊ 。第-鑲鼓產生程序能用來產生第—組S_D =』以建 量組/D晶圖之上，且第HD鑲嵌 ^圓上之—或更多個位置的—或更多個St 鑲嵌i生間，第一數量的第二組S_D處理晶圓能用第-生，來處理，且第二組已處理晶圓能加以建立第： 曰/或^1二組S_D評估晶圓能加=立t 在第二產生程。此外， 立，且在第二S-D評估晶嶋 延遲多=處理S-D晶圓能接受傳輸及/或接受 驗證、晶圓i證、特徵驗證1C:;庫理J序 的晶圓，或上述任_人。# Π 户式庫黯或處理驗證 接到一或更多個評估次i統ίίί II利^理f ^吏3 ==評估次系統中> - s-D can be generated; the first unidentified S-D verification crystal feature on the first wafer; when an additional unprocessed S_D:Check 1 sign has been identified. deal with. The additional first-group unverified^ program is up, and the additional first-group unverified c generates the first-unverified verification feature on the additional verification wafer. The additional verification wafer can be included. At program 3, 'it can be verified on the wafer with a delay at a later time, and the verification feature can be generated on the delayed verification wafer. The first verification, the SD verification feature can include each unverified milk program. Use the extra unprocessed i-round feature. Alternatively, another 96 200903686 continues with the first exemplary embodiment, when the first mosaic executes the first generation program, and when the second "layer is in progress, the order can be learned. During the first-generation process, the first number of -b^苐-products are processed using a mosaic generation program, and the first group has processed the crystal grains. The first-drum generation program can be used to generate the first set S_D = "on the build group / D crystal map, and on the HD mosaic circle - or more positions - or more St mosaics i During the lifetime, the first number of the second set of S_D processing wafers can be processed by the first generation, and the second set of processed wafers can be established: 曰/ or ^1 two sets of S_D evaluation wafers can be added = Stand t in the second production process. In addition, Li, and in the second SD evaluation wafer delay more = processing SD wafer can accept transmission and / or accept verification, wafer i certificate, feature verification 1C:; Ku Li J-order wafer, or the above _ people. # Π 式 黯 处理 处理 处理 处理 处理 处理 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到 接到
傳輸次系、已猎= 連=一或更多個評估次系統的S_D 纽才已，晶圓時’已更新晶圓資料能為 次系統中之一或ϊΐ;固s°n弟一延遲時段之後，能為第-評估 料，且-或更多個^才可件決2更新操作性狀態資 97 200903686 連接到-或更多個評估次系統中的S_D傳輸次系統，受延遲 處理之S-D晶圓能傳輸到—或更多個評估次系統中之 利用S-D評估科。當第-S_D評估元件無法姻時，藉使= 接到第-處理次系統的-或更多個S_D傳輸次系統，第 遲、已處理之S-D晶圓能以第二段時間延遲。受延遲已 > 二段時間之後，能接受事後處理，事後處理能 停止處理、暫停處理、再評估—或更多個晶圓、再測量一 個晶圓、再檢驗-或更多個晶圓、再重新改製—或更多 ，：f if，晶圓、清潔一或更多個晶圓或剝除-或更多個晶 固，或上述任何組合。藉使用S_D傳輪次系統中的傳輸元件，一 或=„能以—或更多個時段延遲，且傳輸元件能包括支標 一或更夕個晶圓的裝置。 又繼續進行第-例示性實施例，第一組評估晶圓中之各s_D 立有第二s①傳輸次序。即時操作性狀態能為評估次系 认(、之一或更多個第一 S_D評估元件(152)來建立。當晶圓傳 輸進出S-D If估元件(152)時’操作性狀態能改變。即時傳輸次序 能加以建立，並用來傳輸晶圓進出評估次系統(150)中的第一 S_D 評估兀件(152)。或者，檢驗次系統〇35)中的S-D評估元件(i37) #第—數量的第―S_D評估元件可姻時，藉使用 ㈣ii—統⑽、1()2) ’第一數量的第一組s_d評估晶圓能傳 ，到，估:人糸統(150)中之第一數量的第—S_D評估元件(152)。當 匕、，且S-D評估晶圓中的其他S_D晶圓無法利用第一 s_D評估元 Γί:糟使用S'D傳輸次系統⑼卜舰），第—組S-D評估晶圓 播S_D晶圓能以第二段時間延遲。舉例而言，藉使用S_D 糸統(m、1〇2)中之一或更多個傳輸元件(顺)，第-組S-D n中的其他S_D晶圓能以第二段時間延遲。傳輸元件(刚) ΐ^ΐ樓二或更多個晶圓。第—組S_D評估晶圓中的其他S-D 第二段時間之後接受評估。當欲作第二鑲嵌層之S-D晶 圓而要傳輸時’能使醜似的—組步驟來進行。舉例而言，能使 98 200903686 用第三及第四傳輸次序。 兩要，—查詢能執行來決定晶圓是否需要評估。當晶圓 支_’而#晶圓不需要評估時，程 在740中，一或更多個S_D晶圓上能選定—或 置s_d程序能使用位置，該等站程序包括：位 處理^程序序、f像驗證料、程式庫驗證程序或 彻I財選（，且齡置能财與餘社讀證或驗證 已選資；;srsr”圓能用源自-或更多個 =分驗證決;位 且有-或更多個=因—^個信賴值’ 置的額抑賴能使用源自一或更多個晶圓上之額外位 v 資料亦能使用。在1他2建立與更新。其他風險評估 以個位置“或風險源上之— 決定：核理純、已處理晶nHti圓信2 仍繼續進行第—彳 + 能執行第-評估程序，第—鑲嵌層正被評估時， 評估程序。在第—評估程正被評估時，能執行第二 ，且能建立第鑲嵌評估4 砰估產生在第一組日日圓。弟一鑲嵌評估程序能用來 5子估晶圓上的第—組如鑲_徵， 99 200903686 一組S-D鑲嵌特徵能包括各個 個位置的—錢多個驗證特徵。在第n估晶®上之一或更多 或更多個S-D第二評估程序。第程序期間，能執行一 用第二鑲嵌評估程序來評估 第二組S-D評估晶圓能 S-D鑲嵌特徵，且第二'组晶圓上的第二組 日日圓上之-或更多個位置的一寺包括各第二組S_D評估 在第—評估程序期間及/或之後，能建'^登，徵。 第-組S-D處理能包括一或更多 建組S-D處理，且 在745中，一杳詢能執行來 —^且已驗證晶圓。 當額外处評估晶圓ί要f夕^站評估晶圓。 不需在要==:^ 當額外功產生晶圓= 理來要產生晶圓。 額外產生晶圓時，程序能分 ^ $ 720 ’而當 貧料能從一或更多個額外s①晶 。此外’額外驗證 外信賴值能為額外S-D晶圓上之額外夕獲得。額 旎用額外信賴度資料來建立。更者、，當驗證 險因素亦 延遲曰中圓=日ί時間受處理的;料:夠接受^ 程序。當需額f s_d及=_ 715，而當不需要額外S_D及^孟，士私序7〇〇能分支到 到·。程序700能在結^外序日守’程序·能分支Transmission sub-system, hunt = connection = one or more evaluation system sub-system S_D New Zealand, wafer time 'updated wafer data can be one of the sub-systems or ϊΐ; solid s °n brother one delay period After that, the operability status can be updated for the first-evaluation material, and - or more than the number of components. 2009 2009686 Connecting to the S_D transmission subsystem in the evaluation system or more, the delayed processing SD The wafer can be transferred to - or more of the evaluation subsystems using the SD Evaluation Section. The late, processed S-D wafer can be delayed by a second period of time when the first-S_D evaluation component is not married, if it is connected to the - or more S_D transmission subsystems of the first-processing subsystem. After the delay has been > after two periods of time, can accept post-processing, after-the-fact processing can stop processing, suspend processing, re-evaluation - or more wafers, then measure a wafer, re-inspect - or more, Re-modification - or more, : f if, wafer, cleaning one or more wafers or stripping - or more crystal solids, or any combination of the above. By using the transmission elements in the S_D transmission round system, one or = can be delayed by - or more time periods, and the transmission element can include a device that supports one or more wafers. Continue to the first - exemplary In an embodiment, each s_D in the first set of evaluation wafers has a second s1 transmission order. The immediate operational status can be established for the evaluation sub-system (one or more first S_D evaluation elements (152). The operational state can be changed as the wafer is transferred into and out of the SD If component (152). The instantaneous transfer order can be established and used to transmit the first S_D evaluation component (152) in the wafer entry and exit evaluation subsystem (150). Or, the SD evaluation component (i37) in the inspection sub-system ) 35) #第—the number of the S-D evaluation elements can be used by marriage, by (4) ii-system (10), 1 () 2) 'the first number of the first The group s_d evaluation wafer can pass, to, estimate: the first number of S-D evaluation components (152) in the system (150). When 匕, and other S_D wafers in the SD evaluation wafer are not available The first s_D evaluation Yuan Γ ί: the use of S'D transmission subsystem (9) Bu ship), the first group SD evaluation wafer broadcast S_D wafer In the second period of time delay. For example, by using one or more transmission elements (shun) of S_D system (m, 1〇2), other S_D wafers in the first group SD n can be Two-stage time delay. Transmission component (just) 二^ΐ2 or more wafers. The first group S_D evaluates the other SD in the wafer and is evaluated after the second time. When the second mosaic layer is to be used When the wafer is to be transferred, it can be 'ugly'--steps can be performed. For example, 98 200903686 can be used in the third and fourth transmission orders. Two, - the query can be executed to determine whether the wafer needs to be evaluated. When the wafer branch does not need to be evaluated, the process is selected in 740, one or more S_D wafers can be selected - or the s_d program can use the location, the station program includes: bit processing ^ program Order, f-like verification material, library verification program or Che-I election (and the age-setting and Yushe reading or verification has been selected;; srsr" circle can be derived from - or more = sub-validation The amount of the position and the number of - or more = the - ^ confidence value can be used to generate additional bits from one or more wafers. Use. In 1 and 2 to establish and update. Other risk assessments are based on a position "or risk source - decision: purely pure, processed crystal nHti letter 2 will continue to be carried out - 彳 + can perform the first - evaluation procedure, The first-inlaid layer is being evaluated, the evaluation procedure. When the first-evaluation process is being evaluated, the second can be performed, and the first mosaic evaluation can be established. 4 The evaluation is generated in the first group of Japanese yen. Used to estimate the number of groups on the wafer, such as inlays, 99 200903686 A set of SD mosaic features can include multiple verification features for each location. One or more or more S-D second evaluation procedures on the nth estimated crystal®. During the first procedure, a second mosaic evaluation procedure can be performed to evaluate the second set of SD evaluation wafers for SD inlay features, and the second set of wafers on the second set of days on the yen - or more locations A temple consisting of each second group of S_D assessments can be built during and/or after the first evaluation procedure. The first set of S-D processes can include one or more set of S-D processes, and in 745, a query can be performed - and the wafers are verified. When the extra site is evaluated, the wafer is evaluated. No need to ==:^ When extra work is done on the wafer = it is reasonable to generate the wafer. When additional wafers are produced, the program can divide by $ 720 ’ while the lean material can be crystallized from one or more additional s1s. In addition, the extra verification value can be obtained for additional slaps on additional S-D wafers. The amount is established with additional reliability data. Moreover, when the risk factor is delayed, the time is reduced. The time is processed. When the demand f s_d and =_ 715, and when no additional S_D and ^ Meng are needed, the private order 7 can branch to . The program 700 can keep the program on the end of the program.
Sr 序，且 s二D的幕罩層沉積程序、幕罩層曝絲序及/ ^ D及/， 或伙 ===理元件細’；特徵能用： 100 200903686 在其他有多重步驟的範例中，雙重金屬鑲嵌程序能在一 多個日:曰,上執行。在雙重金顧練序姻， 二第二職處理。在某些實施例中，能執行先H ί ΐ L，Via First Trench Last)程序。在其他實施例中，能執行 士溝^通孔(TFVL，Trench First Via L难序。在舰 =/月€及/或之後’能執行S_D量測、檢驗、驗證及/或評估程序。 ’可能需要-或更多個非S_D程序。舉例而言，第一圖案化 =層亡的侧特徵能能在執行「先通孔」或％溝渠」银刻 。能使用一或更多個S_D資料收集(DC, data collection) 计旦及/或S-D映射應用。或者可使用不同程序。Sr order, and s 2D mask layer deposition procedure, mask layer exposure order and / ^ D and /, or === rational component fine '; feature can be used: 100 200903686 in other examples with multiple steps In the double metal mosaic program can be executed on more than one day: 曰. In the double gold, the practice of marriage, the second second job. In some embodiments, the first H ΐ L, Via First Trench Last) program can be executed. In other embodiments, the TFVL (Trench First Via L) can be executed. The S_D measurement, inspection, verification, and/or evaluation procedures can be performed after the ship =/month and/or after. It may be necessary to have more than one non-S_D program. For example, the first patterning = layering feature of the layer can perform the "first through hole" or % ditch" silver engraving. One or more S_D data can be used. Collect (DC, data collection) and / or SD mapping applications. Or you can use different programs.
f微影程序期間’ S-D晶圓厚度資料及/或晶圓溫度資料能用 ^^^^^(綱資料：產生沾幕罩浸潰事後之清潔及/ iit/f產幕罩顯影及/或㈣資料。此外，侧次 l''·' 0能使用S_D晶圓厚度資料及/或晶圓溫度資料，以產生S-D =，灰化·。舉_言，鱗龍能包滅雜學資料、 =4間育料、處理氣體比例資料、預期終點時間、加熱器功率During the lithography procedure, 'SD wafer thickness data and/or wafer temperature data can be used ^^^^^ (Summary data: cleaning after the immersion mask is immersed and / iit / f screen cover development and / or (4) Data. In addition, the side of the l''·' 0 can use the S_D wafer thickness data and / or wafer temperature data to generate SD =, graying ·. _, the scale dragon can contain miscellaneous data, =4 breeding materials, processing gas ratio data, expected end time, heater power
处功率資料。此外，熱處理處理次系統130能使用S-D 溫度資料’以產生S_D加熱及/或冷卻資 1次糸統135能使用S-D晶圓厚度資料及/或晶圓温度資 產生S_Df驗、驗證及/或檢查資料。在其他範例中，重新 ^統I55能使用S-D晶圓厚度資料及/或晶圓溫度資料，以 屋生S-D重新改製程序。 明夕，^ °兒月气生S D 5平估程式庫的另—例示性流程®。在所說 ㈣i81G中’一或更多個s_d晶圓能用—或更多個s_d傳輪系 ΐίΐί。或者’亦可接收—或更多個非S_D晶圓。此外，能i 料或個ΐ圓ΐ收晶圓資料。晶圓資料能包括歷史及/或即時資 料。或者’晶圓能由不同次系統接故。 、 101 200903686 在815中’能為一或更多個晶圓決定S-D晶圓資料及/或非S_D 晶圓資料，該等晶圓能用-或更多個S-D傳輸系統接收。 料能用來建立數組的S-D及非S-D晶圓。在各式範例中， 晶圓有關之S-D晶圓資料能夠是位置相依性、晶片相依性了 相依性、區位相依性、層相依性、晶圓相依性或晶粒相依性扣 或上述任何組合。此外，-或更多個S_D處理次序能 且S-D處理次序能用S-D晶圓狀態資料、晶片相依 ^ 料及/或晶粒相依性晶圓狀態資料建立。 問狀^貝 在820巾’藉使用S-D傳輸系統，一或多個 到一或更多個S-D處理元件。 日日圓此傅輪 在825中’能產生-或多個已處理沾晶圓。 ，能具有在其之上朋-或更多個S_D產生程Ί 多個位置的一或更多個S-D程式庫相關特徵。 玍隹次更 在830中，-查詢能執行來決定一或更多個 ，正確地執行。當一或更多· S_D產生程序正確地=== 序800能分支到步驟835，而當一或更多個沾產生^ ^ 確地執行後’程序800能分支到步驟88〇。舉例而+生2未f 資料、處理室資料及/或故障資料。 ° 了使用工具 建立了或更多組S-D評估晶圓能用一或更多組已處⑽晶圓來 在835中，藉使用S_D傳輸系統， 能傳輸到-或更多個S-D評估树。此外，‘用_ 能延遲及/或儲存一或更多組S_D評估晶圓。 _D傳輪系統， 在840中，藉使用傳輪到一或 _ 多個S-D評估晶圓，能執行一或f f兀件的-或更 可利用一或更多個S-D評估元件時拉蚀/私序。此外，當 或更多個S①評估元件的牛/個^延遲後傳輪至-更多個S_D評估程序。一戈更夕個S_D #估晶圓，能執行-或 在某些評估程序期間，藉由評估在第一功評估晶圓上之第 102 200903686 信^ ί ί $D S $目！，第ΓS_D評估晶圓能建立有第一 個第-信賴值限鑛比較，料能與-或更多 限制有關。 不门耘度的彳5賴度能與不同信賴值 為具關:庫相關參考特徵能辨識Power data. In addition, the heat treatment processing subsystem 130 can use the SD temperature data 'to generate S_D heating and/or cooling. The first time 135 can use the SD wafer thickness data and/or the wafer temperature to generate S_Df inspection, verification, and/or inspection. data. In other examples, the Re-I55 can use the S-D wafer thickness data and/or wafer temperature data to re-engineer the program for the S-D. On the eve of the evening, ^ ° 儿 气 S S S S S S 平 平 另 另 另 另 另 另 另 另 另 另In the (iv) i81G, 'one or more s_d wafers can be used—or more than one s_d carrier system ΐίΐί. Or 'can also receive—or more than one non-S_D wafer. In addition, the wafer data can be collected from a single material or a round. Wafer data can include historical and/or real-time information. Or 'the wafer can be picked up by different subsystems. 101 200903686 In 815 'S-D wafer data and/or non-S_D wafer data can be determined for one or more wafers that can be received with - or more S-D transmission systems. Materials can be used to create arrays of S-D and non-S-D wafers. In various examples, wafer-related S-D wafer data can be position dependent, wafer dependency dependent, location dependent, layer dependent, wafer dependent or grain dependent, or any combination of the above. In addition, - or more S_D processing orders can be performed and the S-D processing order can be established using S-D wafer state data, wafer dependent material, and/or die dependent wafer state data. The question is to use the S-D transmission system, one or more to one or more S-D processing elements. This round of the Japanese yen can produce - or multiple processed wafers in the 825. One or more S-D library related features that can have multiple locations on top of one or more S_Ds. In 830, the query can be executed to determine one or more and execute correctly. When one or more of the S_D generation programs correctly === the sequence 800 can branch to step 835, and when one or more of the digests are executed, the program 800 can branch to step 88. For example, + raw 2 not f data, processing room data and / or fault data. ° Using tools Established or more sets of S-D evaluation wafers can be transferred to one or more S-D evaluation trees using one or more sets of (10) wafers in 835, using the S_D transmission system. In addition, the wafer can be evaluated by delaying and/or storing one or more sets of S_Ds. _D transmission system, in 840, by using a transfer to one or more SD evaluation wafers, capable of performing one or ff components - or more utilising one or more SD evaluation components sequence. In addition, when the number of cows or more of the S1 evaluation elements is delayed, it is passed to - more S_D evaluation procedures. A Gee S_D #evaluation wafer, can be executed - or during some evaluation procedures, by evaluating the 102th 200903686 信 ί ί $D S $ on the first evaluation wafer! The Dijon S_D evaluation wafer can be established with a first rm-value limit mine comparison, which can be related to - or more restrictions. The 彳5 赖 degree of the ambiguity can be related to different trust values: the library-related reference features can be identified
評估晶圓能賴度的高信賴度特徵，nD 晶圓，且有關於高信賴度'特徵度!!高信賴度 相關評估㈣能儲存在γ 晶0之第-程式庫 她個程度的信賴度。 序已正確地執行。：否—或更多個站評估程 序_能分支到步i 8ί〇更二程序正破地執行時，程 確地執行時，程序評估程序並未正 資料、處理室:_/或故障$。驟綱。舉_，可使用工具 更多=動中作當未達成一或更多個信賴值限制時，能執行-或 κ 估。—麵能執行來決定—額特估晶《是否需要坪 當額夕田卜評估序800能分支到步驟835，而 在_ I / 時’程序800能分支到步驟_。 處理所利用冬額^曰執^于來決定額外產生晶圓是否可為後續 程序心ί在ί70 ^無法利用時，程序細能分支到步咖。 S-D 中，施加修正動作能包括下列步驟：a)決定第一 ύ U 5平估晶圓上之評估 风疋弟 ☆之評估位置的最小數量;估晶圓 度地圖；d)決定笛一 ςη 十估曰曰囫產生第一信賴 在第-S-D坪估曰鬥卜、估曰曰圓上之評估位置的所需數量；e) 5子估曰曰固上選疋—新位置；f)藉使用新S-D評估程序， 103 200903686 為，义0评估晶圓建立新信賴度資料，苴中，笸一 ς n曰 ==置=接受称g)為第- s‘i 灿評估晶圓的言賴度資料比較於第- 關之新第-程度义^ it，評估晶_識為具有與其有 賴值限制時，將度，；以及，當達到新第-信 -程式庫相關評;古資：:、二f徵及第- S_D評估晶圓有關之第 一信賴值限I 程式庫中，」·)當未達到新第 相關特徵辨識為罝有勉右曰曰圓上之新位置的S-D程式庫 將所需位置的ί量關i 未驗證特徵， k)當第-S-D評估日_ 將所^位置的數量增加一個； 及 1)當第- - S-D評估晶圓的評估。1^〈所而位置的數里#於零時，停止第 ： al)ffi S-D#Evaluating the high reliability characteristics of wafer latitude, nD wafers, and high reliability 'characteristics!! High reliability related evaluation (4) can be stored in the gamma crystal 0 - the library of her degree of reliability . The order has been executed correctly. : No—or more than one station evaluation program _ can branch to step i 8ί〇. When the program is executed, the program evaluation program does not have the data, processing room: _/ or failure $. The outline. For example, you can use the tool. More=actions can perform - or κ estimation when one or more confidence limits are not reached. - The face can be executed to determine - the amount of the estimate "Whether it is necessary to ping the eve." The evaluation sequence 800 can branch to step 835, and the _I / hour program 800 can branch to step _. The processing uses the amount of winter to determine whether the additional wafer can be used for subsequent programs. When the program is unavailable, the program can branch to the step. In SD, the application of the corrective action can include the following steps: a) determining the first ύ U 5 to estimate the minimum number of evaluation positions on the wafer ; ; ; ;; estimating the wafer degree map; d) determining the flute Estimated to generate the first number of required positions in the evaluation of the position of the first-side squad, and to estimate the position of the evaluation; e) 5 sub-estimate the selection of the new position; f) use The new SD evaluation program, 103 200903686, for the evaluation of the wafer to establish new reliability data, in the middle of the 笸 ς ς 曰 曰 曰 接受 接受 接受 接受 接受 接受 接受 接受 评估 评估 评估 评估 评估 评估 评估 评估 评估 评估The data is compared with the new-degree of the first-level, and the evaluation crystal is recognized as having a limit on its value, and when it reaches the new first-letter-related library evaluation; In the first confidence-value limit I library of the second-segment and the first-S_D evaluation wafer, "·) the SD library that is not recognized by the new relevant feature as the new position on the right-hand circle will be The amount of the required position is not verified, k) when the first-SD evaluation date _ increases the number of positions by one; and 1) when the - - SD evaluation wafer evaluation of. 1^<The position of the number of miles # at zero, stop the first : al)ffi S-D#
輪到額外第一 S-D處=件，)產額外S-D晶圓傳 晶圓，其中，藉使用第_ )產生或更夕個額外已處理S-D 相關特徵產生在各额外-—或更多個S-D程式庫 用額外已處理S-D晶圓央、、叔曰圓士的—或更多個位置；dl) 系統將額外S_D日^彳查认'、疋額外S_D評估晶圓；el)用S-D傳輸 外第-s-d評心傳;元件;⑴藉使用： 資料，其中，額外S.D = S卜==:11建立額外第-信賴度 關之新第—程度^估晶_識為具有與其有 、又的4賴度晶®;以及，當達到額外第- 104 200903686 (賴值_時’將與額外高信賴 ^額外程式庫相關評估資料儲存s &估_ =估晶圓有關 達到，-信賴值限制時，施力 中；及咐未 評估曰圓i施加第二修正動作能包括下列步驟：定額夕κ f估日日®上之評估位置的最）决疋額外8七 f評估位崎·卿估晶圓上 地圖；d2)決定額外S-D評估曰η μ平商®產生第一信賴度 選定額外S-D評估曰圖卜的:困上之評估位置的所需數量；e2、 程序，為_ s ；β)藉使 在額外s-D評估晶圓之=外，其中，位於 估，·g2)將新位置加入額外s的曰s-=式庫相關特徵接受評 針對額外S-D評估晶圓，日日囫的第一信賴度地圖中；h2) 制做比較；資料與新第-信賴值^ 庫相關特徵辨識為具有與之有^:上的S-D裎式 新兩信賴度特徵；將第- s-d坪估曰域度的額外 外新第-程度信賴度 辨識為具有與其有關之額 關之新額外程式庫相關 ^徵及額外S·!)評估晶圓有 i. 未達到額外新第一子在S_D評估程式庫中；j2)當 新位置上的Sit ti位於在額外沾評估晶圓^ 資料的額外新未關與其有關之新信賴度 置數量大於零d复夕卜迎評估晶圓上的所需位 時，停止額2 S-D評估ί曰圓3估:及12)當所需位置數量等於零 於一 之irif 最重要位置其中之一，且能基 源自如及/或非S_D貝果來作決策。 證及/或評估處理 :^的貝料施用來改變量測、檢驗、驗 或評估位置。此外並何時要建立新量測、檢驗、驗證及/ 田日日圓之一或更多個區域的信賴值係低數值 105 200903686 J更多個新位置能加以建立。再者， 者處里，彳5賴度地圖上的數值係保持高數值時，及/或 定處理，正確度數值係保持在可接受限制範圍之内 J; Ιίΐ 一新量測、檢驗、驗證及/或評估計畫，該等計晝使用 旱乂小數里的位置，並能減少各晶圓的生產時間。 在某些情況下，整個晶圓的資料能在S_D程序期間計营出。 針對晶圓的—部分計算及/或預測資料。舉例而言了-部 I] ^ 一或更多個徑向區域及/或扇形區域(quadrants)。當一戍更 數值及/或計算/預測數值在晶圓所建立之正癌度限制 呈’便能宣示一錯誤狀況。部分錯誤能用S—D正確度改 °程序來消除。其他錯誤能由次系統及/或控制器解決。 j某些部分可具有不同信賴值的產品，且在產品發展週期 T之_夕不同階段下，S_D處理能用來獲得S_D晶圓的最大產量。 與處理結果及/或其他地圖有關的公差值及/魏制能用來辨 多個處理中的可允許變化。此外，處理結果及/或其他地 二此用來為處理次序中之—或更多個處猶立信賴度資料及/或風 ^素。舉例而言，處理結果及/或其他地圖可因應處理室清潔程 \ 序而變，丄且程序能用來改善及/或消除能發生在處理室清潔 之後的「弟一晶圓」問題。 ’、 二在某些實施例中，S-D資料能包括層製造資訊，且層製造資 訊，依不同層而有不同。新S_D層資料能在S_D程序期間， ^忐1來更新及/或最佳化處理製程配方，能用來更新及/或最佳化 处理核型’以及能用來更新及/或最佳化剖面輪廓資料。此外，S_D ^序能傳送新S-D層資料到其他次系統及/或薇房系統的控制器。 牛例而言，新S-D資料能包括新晶圓厚度資料及/或均勻性資^。 S:D程序能利用資訊，如位置ID、晶片ID、產品ID、次系統 ΙΓ)、時間、晶圓ID、slotID、晶圓批次ID、製程配方及/或圖^化 結構ID，作為整理及編號晶圓資料的手段。 ” 此外’ S-D模型程序能產生、精煉及/或使用晶圓模型、正確 106 200903686 度模^、製程配方模型、光學屬性模型、結構模型、FDC模型、 預，模型賴度模型、量測模型、蝕刻模型、沉積模型、第一 晶圓效應模型、處理室模型、卫具模型、偏移模型、延遲時 型、電路效能模型或裝置模型，或上述任何組合。 、 S-D程序亦能使用歷史資料、晶圓資料、正確度資料、處理 資料、光學屬性資料、結構資料、FDC資料、酬f料、传賴产 資料、量測資料、钱刻資料、處理室資料、工具資料、偏移資料二 電路效能資料或裝置資料，或上述任何組合。 、 吹S-D參數能包括S_D層資訊。微影處理後，可提供s_D厚度 資料’且S-D程序能用來將此資訊通訊給掃描器次系統。此外， ' 處理5 ’可提供厚度資料，且S-D程序能用來將此資訊通訊 了其他次糸統。藉由將S_D晶隨料即時前授到量測及/或處理次 系統’便能提供改善的晶圓處理。影響層厚度的材料變化及/或處 理變化能依在位置到位置之間、晶關晶圓之間及晶圓批次到晶 圓批次之間做改變。厚度變化缺因為沉積處理未_地橫跨晶 圓面上，而此包括在處理室到處理室之間的變化及處理上隨時間 的處理室偏移。厚度變化能導致光學雜變化及/或熱處理變化的 电生。S-D私序此用來減少及/或消除這些變化。 系統及/或次系統資料能包含非S_D及/或S_D資料，該等非 t- S_D及/或S-D貧料能包括：設定資料、組態資料、歷史資料、輸 入資料、輸出資料、優絲料、延遲資料、故障資料、反應 錯誤資料、前授資料、反饋資料、通過資料、内部資料、外部資 料、最佳化資料、狀態資料、時間資料、處理結果資料及/或測量 資料。 在f些把5彳中’S_D晶圓資料及/或晶圓資料能包括底部CD 貢料、中間CD資料、頂部CD資料或角度資料，或上述任何组合。 f例而*，能包含侧工具，且侧工具能使用S_D新晶 圓及/或處理狀悲資料，以決定在晶圓上侧一深溝渠時所使用的 蝕刻時間’以決定在晶圓上钱刻一雙重金屬鑲嵌結構時所使用的 107 200903686 钱刻時間，以沐令+ 間。此外，即時;上侧—閑極'结構時所使用的钱刻時 計算側則度镇料⑤包括所計算CD、所計算深度及/或所 之前’ —S_D控制應用能用來 或資料之前，接收者準備好使用沾訊息及7 去。S-D控制應用&用f/f ^ S_D 訊息及/或資料傳送出 或量測。H 用延遲時間變數來延遲晶圓、計算、處理及/ 在S_D資料能被用來對晶圓做計算、處理及/ 料延;=用來防止S-D細達。延遲時間二 ΧΖ«^^\124'129'134'139'144'149'- ，警告狀況。FDC S_D程序能優先化及/或二‘ =g =部延展系統帽 扮H立ί系統根據警報/故障的本質，能採取各種行動，以對盤止/ °對警告/故障所採取的行動能是基於背景的tl/ =疋，置相依性的，並能由下列來指定：規格 = ^處理室類型、辨識編號、承載埠編號、晶舟編:處 控制=編號、處理工作編號、晶槽編號及/或資=^號、 ，於輸入巧態、處理特徵及處理模型，一或更多個It is the turn of the extra first SD = part, to produce additional SD wafer transfer wafers, where the use of the _) or the additional processed SD related features is generated in each additional - or more SD programs The library uses the extra processed SD wafer center, the uncle's position - or more positions; dl) the system will check the additional S_D day ^, 疋 additional S_D evaluation wafer; el) use SD transmission -sd comment on the heart; components; (1) by using: data, where, additional SD = S Bu ==: 11 to establish an additional first - the degree of reliability - the degree ^ estimated crystal _ known as having it, and 4 Lai Dujing®; and, when the additional -104 200903686 is reached (value _ when 'will be associated with extra high reliability ^ additional library related evaluation data storage s & evaluation _ = estimated wafer related to reach, - confidence value limit Applying the second corrective action to the unrecognized round i can include the following steps: the rating of the 夕 f f 估 日 ® ® ® ® ® ® ® ® ® ® 疋 疋 疋 卿 卿 卿 卿 卿 卿 卿Map; d2) Decide on additional SD evaluation 曰η μ平商® to generate first confidence to select additional SD assessment 曰 图: Estimate the required number of locations; e2, program, _ s ; β) l 评估 - - = 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在 在Relevant features are evaluated for additional SD evaluation wafers, in the first reliability map of the day; h2) system comparison; data and new first-trust value library related features are identified as having SD on ^: The new two-reliability feature of the 裎-type; the additional external new-level reliability of the first-sd ping domain is identified as a new additional library associated with the relevant amount and additional S·!) evaluation crystal The circle has i. The new first child is not reached in the S_D evaluation library; j2) When the new location of the Sit ti is located in the additional dip evaluation wafer ^ data, the new new unrelated value is greater than When the zero d is used to evaluate the required position on the wafer, the stop amount 2 SD evaluation 曰 曰 3 estimate: and 12) when the required number of positions is equal to one of the most important positions of the irif, and the energy base Originated from and/or non-S_D Bayo for decision making. Proof and/or evaluation of treatment: ^ Bead application to change the measurement, test, test or evaluation position. In addition, when new measurements, inspections, verifications, and/or confidence values in one or more areas of the Tianri yen are established, 105 200903686 J more new locations can be created. Furthermore, in the case where the value on the map is maintained at a high value, and/or the processing is performed, the correctness value is kept within acceptable limits; J Ιίΐ A new measurement, inspection, verification And/or an evaluation plan that uses the location of the drought and flood and reduces the production time of each wafer. In some cases, the entire wafer's data can be counted during the S_D process. Partial calculation and/or prediction of data for wafers. For example - part I] ^ one or more radial zones and / or quadrants. When a more numerical value and/or a calculated/predicted value is established on the wafer, the positive cancer degree limit can be declared as an error condition. Some errors can be eliminated by using the S-D correctness program. Other errors can be resolved by the secondary system and/or controller. j Some parts can have products with different trust values, and S_D processing can be used to obtain the maximum yield of S_D wafers at different stages of the product development cycle. Tolerance values and/or controls associated with processing results and/or other maps can be used to identify allowable changes in multiple processes. In addition, the processing results and/or other uses are used to maintain reliability data and/or wind quality in the processing order. For example, processing results and/or other maps may vary depending on the process cleaning process, and the program can be used to improve and/or eliminate the "wafer-wafer" problem that can occur after the process chamber is cleaned. In some embodiments, the S-D data can include layer manufacturing information, and the layer manufacturing information varies from layer to layer. The new S_D layer data can be updated and/or optimized for process recipes during the S_D program, which can be used to update and/or optimize the processing core type and can be used to update and/or optimize. Profile profile data. In addition, the S_D ^ sequence can transmit new S-D layer data to controllers of other subsystems and/or Weifang systems. For cattle, the new S-D data can include new wafer thickness data and/or uniformity. The S:D program can use information such as location ID, wafer ID, product ID, sub-system, time, wafer ID, slotID, wafer lot ID, process recipe, and/or map structure ID as collation And means of numbering wafer data. In addition, the SD model program can generate, refine, and/or use wafer models, correct 106 200903686 moduli, process recipe models, optical property models, structural models, FDC models, pre-models, model metric models, measurement models, Etching model, deposition model, first wafer effect model, process chamber model, guard model, offset model, delay time type, circuit performance model or device model, or any combination of the above. SD programs can also use historical data, Wafer data, accuracy data, processing data, optical property data, structural data, FDC data, reward materials, rumor data, measurement data, money engraving materials, processing room data, tool data, offset data two circuits Performance data or device data, or any combination of the above. The blow SD parameter can include S_D layer information. After lithography, s_D thickness data can be provided' and the SD program can be used to communicate this information to the scanner subsystem. 'Process 5' provides thickness data, and the SD program can be used to communicate this information to other sub-systems. By immediately granting S_D crystals Measurement and/or processing subsystems can provide improved wafer processing. Material variations and/or process variations that affect layer thickness can range from position to location, between wafers, and wafer batches. The wafer batch is changed. The thickness variation is missing because the deposition process does not cross the wafer surface, and this includes variations between the processing chamber and the processing chamber and processing chamber shifts over time. Variations can result in changes in optical miscellaneous changes and/or heat treatment changes. The SD private sequence is used to reduce and/or eliminate these changes. System and/or sub-system data can contain non-S_D and/or S_D data, such non-t - S_D and/or SD poor materials can include: setting data, configuration data, historical data, input data, output data, superior wire materials, delay data, fault data, reaction error data, pre-grant data, feedback data, and data. , internal data, external data, optimized data, status data, time data, processing results data and/or measurement data. In the case of some 5's, the 'S_D wafer data and/or wafer data can include the bottom CD. Material, intermediate CD Material, top CD data or angle data, or any combination of the above. f example and * can include side tools, and side tools can use S_D new wafer and / or processing data to determine the depth of the wafer The etching time used in the ditch is used to determine the amount of time spent on the wafer when engraving a double damascene structure. The time is between 0 and 2009. In addition, the instant; the upper side - the idle pole' structure When using the money, the calculation side includes the calculated CD, the calculated depth and/or the previous '-S_D control application can be used or data, the receiver is ready to use the dip message and 7 to go. SD control Application & Transmit or measure with f/f ^ S_D messages and/or data. H Delays wafers, calculations, processing, and/or S_D data can be used to calculate, process, and/or delay the wafer with delay time variables; = used to prevent S-D fine-grained. Delay time two ΧΖ«^^\124'129'134'139'144'149'- , warning status. The FDC S_D program can be prioritized and / or two ' = g = part of the extension system caps H ί ί system according to the nature of the alarm / fault, can take various actions to take action against the warning / failure of the warning / failure It is based on the background of tl / = 疋, depending on the following, and can be specified by: specification = ^ processing room type, identification number, bearing 埠 number, wafer rig: control = number, processing work number, crystal channel Number and / or capital = ^ number, , in the input state, processing features and processing model, one or more
° S"D 而言，預綱纖細 圖表、PLS _、PCA模型、FDC模型及多變量分析轉， 108 200903686 multivariate Analysis)模型。 的處;-處理及/或來評估(a麵财S_D處理。驗證新处 及/或驗證時，該處理結果係能夠變化，^仕-处理正在發展 ;序==分的晶圓上執行 置。建立何時及如何來使用評估位 已在之前選取了」《二_量測時，可能 具、TEM工具及/或Fffi工呈所測資料與用簡工 在半導體製裎的一 旦♦之°平估位置的子集合來執行。 能產生及儲存，作為後^展，間’ S_D一及/或非S-D歷史資料 位置的資料。 、M 。_D歷史資料能包括在一數量之 生及/或修25/或之後’模擬及/或預測資料能產 料。新模能包括S_D資料及/或非S-D資 此外，在執行二程庠、來㈣更新計算、模型及/或結果。 及/或預娜料來產生及^^文申及/或之後’信賴度資料能為模擬 通孔料、熱處理資料、厚度資料、 、枓、CD剖面輪廓資料、材料相關資料、溝 109 200903686 料、侧壁角度資料、微分寬度資料，或上述任何组合。 ΐ#貧，能包括：位置結果資料、位置數量資料、CD量·濟 貧料:量測位置數量資料、X座標資料、γ座標資料及立他資料: 一二人糸統能用S-D程序纟即時調整製程配方及/或模型、，以處斗理 ς維結構，如記憶體結構、雙重金屬鑲舰構、溝渠、通孔及多 驗問體义^欠能用S-D程序來即時調整評估、檢 irp，丨ί棋3 /或模型’以評估、檢驗、驗證及/ ίΐί二表、、°構。二維結構能增加厚度變化的S-D感應度，並需 ί ί模型及/或量測。評估次系統能導致產量問 f S-D半導體處理系統中，能出現多重處理及/或量測工具， =工八匹配成為-關鍵議題。在某些情況下，源自内部工且^資 ^必f要與源自外部及/或參考工具的資料匹配。s ^來 能用來產生次系統需要的校準調整。這些調 f更多個S_D程序能用來促成用以交換S·0資料及交握的 f 序能查詢次系統、控制器及/或S_D程序，以得 ι ^ ”分離各裝置的獨特參數，以及藉由分配資 i t L 程序能用來通聯次系統中的多重裝置。舉例而 a ’ S-D參數能被傳送到控制器、處理工具、量測工具、卿〗工 ϋ感應器、照相機、光學感應器、ccDs、端點偵測哭、、、w 度感應器及深度感應器。 * n /皿 圓狀ΐίΞ在中!siD f料處理後，藉由改變該晶圓的晶 姑曰二、4 °亥已處理晶圓能辨識為已處理S_D晶圓；並且，盥 ^曰，關的處理資料能辨識及/或儲存為 理 “ 圓用非S_D資料處理後，藉由改變該晶圓的^二 理晶圓能辨識為已處理非S~D晶圓；並且，盘該晶 ®相關的處理資料能辨識及/或儲存為新非S-D處理資料/、 110 200903686 該等晶圓資料能包括已處理晶圓的模型資料，該已處理晶圓 二糸統中能產生、加強及/或修改。當使用S_D模型資料時，新 吴1及相關之模型參數能辨識及儲存為S-D模型與資料。而當使 3資料時’模型及相關之模型參數能辨識及儲存為非k ΐίΐΓ4 °舉例而言’ S_D模型與資料能儲存在S_D程式庫及/ ，貝^庫’且非S_D模型與資料能儲存在非S-D程式庫及/或資料 料能資料用來執行模擬時’模擬模型及/或模擬資 程序能產生、使用、改變及/或驗證晶圓剖面輪廊資料。 尺寸縮小時，在對準、測量及/或處理期間，S-D晶 廓斗能具有較大的影響’且晶圓剖面輪廓資料能包括 +位貝枓、弧，育料、特徵資料、溫度資料及/或厚度資料。 ϋ在某些次祕中，S_D及/或非S_D晶圓資料能用來決定污染 転度、>可染機率及/或逸氣率(〇说_职防{1培1^把）。在其他次***中， ㈣嘴位址’及/或對準及/或量測程序期間的探針位 疋。處理室中由晶圓所放射的能量多寡能加以決定。 使用之光學树、喷嘴及/或探針可以是位址__ ΐΐ Ί 1〇Cati〇n)敏感的、位置(site)敏感的及/或溫度敏感的。 此=丄日日圓，學屬性及/或光學屬性之校準因素能加以決^。舉 例而,，已處理幕罩及/或材料層的特徵能加以決定。 芮資t统態資訊、區位資訊、量測資訊、供應 以佈局資訊、程式庫資訊、工具資訊或檢 在某些實施例巾’-或更乡個:欠緒能接收 與相關之晶圓資料。次系統能包含用來在實=固：因° S"D, pre-scale slender chart, PLS _, PCA model, FDC model and multivariate analysis transfer, 108 200903686 multivariate Analysis) model. - processing and / or evaluation (a face S_D processing. When verifying new and / or verification, the processing results can be changed, ^ Shi - processing is developing; order = = points on the wafer implementation "When and how to use the evaluation bits have been selected before" "Second-measurement, may have TEM tools and / or Fffi workers to present the measured data and use the simple work in the semiconductor system Estimate the subset of locations to perform. Can generate and store, as a post-show, between the 'S_D one and / or non-SD historical data location. M, _D historical data can be included in a number of births and / or repairs 25/ or later 'simulation and/or forecast data can be produced. New models can include S_D data and/or non-SD assets. In addition, two-way calculations, (four) update calculations, models and/or results are performed. Nao material to produce and ^^ Wenshen and / or later 'reliability data can be simulated through hole material, heat treatment data, thickness data, 枓, CD profile profile data, material related data, ditch 109 200903686 material, sidewall angle Data, differential width data, or any combination of the above. ΐ#Poor, can Including: location result data, location quantity data, CD volume, poor material: measurement position quantity data, X coordinate data, γ coordinate data and official data: One or two people can use the SD program to adjust the process recipe and/or Or model, in order to fight the structure, such as memory structure, double metal inlaid structure, ditch, through hole and multi-examination body ^ can use SD program to adjust the evaluation, check irp, 丨ί chess 3 / or model 'to evaluate, verify, verify and / ίΐί two tables, ° structure. Two-dimensional structure can increase the thickness of the SD sensitivity, and need to model and / or measurement. Evaluation of the subsystem can lead to production Q f SD semiconductor processing system, there can be multiple processing and / or measurement tools, = work eight matching becomes a key issue. In some cases, it comes from internal work and must be derived from the outside and / or reference tool data matching. s ^ can be used to generate the calibration adjustments required by the secondary system. These adjustments f can be used to facilitate the exchange of S·0 data and the grip of the f-order can be queried. System, controller and/or S_D program, separated by ι ^ ” The unique parameters of each device, as well as the multi-devices in the secondary system, can be used to communicate with the multi-device in the secondary system. For example, a 'SD parameter can be transmitted to the controller, processing tool, measurement tool, and , camera, optical sensor, ccDs, endpoint detection cry, , w sensor and depth sensor. * n / dish round ΐ Ξ ! si si si si si si si si si si si si si si si The crystallized wafers can be identified as processed S_D wafers; and the processed data can be identified and/or stored as “there is a non-S_D data processed by the The wafers that change the wafer can be identified as processed non-S~D wafers; and the processing data associated with the wafers can be identified and/or stored as new non-SD processing data/, 110 200903686 Wafer data can include model data for processed wafers that can be generated, enhanced, and/or modified in the processed wafer. When using the S_D model data, the new Wu 1 and related model parameters can be identified and stored as S-D models and data. When the 3 data is used, the model and related model parameters can be identified and stored as non-k ΐίΐΓ4 °. For example, the S_D model and data can be stored in the S_D library and /, the library and the non-S_D model and data can The simulation model and/or simulation program can generate, use, change, and/or verify wafer profile wheel data when stored in a non-SD library and/or data material. When the size is reduced, the SD crystal profile can have a greater impact during alignment, measurement, and/or processing. The wafer profile data can include +bits, arcs, feeds, characterization data, temperature data, and / or thickness data.某些 In some sub-secrets, S_D and/or non-S_D wafer data can be used to determine pollution intensity, > dyeable probability and/or outgassing rate (〇 _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ In other subsystems, (iv) the mouth address' and/or the probe position during the alignment and/or measurement procedure. The amount of energy emitted by the wafer in the processing chamber can be determined. The optical tree, nozzle and/or probe used may be address sensitive, site sensitive and/or temperature sensitive. This = the Japanese yen, the calibration factor of the academic attributes and / or optical properties can be determined. For example, the characteristics of the treated mask and/or material layer can be determined.芮 t t status information, location information, measurement information, supply with layout information, library information, tool information or check in some embodiments of the towel - or more: can receive and related wafer information . The secondary system can be included to be used in the real:
或更多個晶圓之-數量的處理元件。舉例而言J 括1來在實質上，—時間檢驗—或更多個晶圓的二或更；個二驗 元件/板組。與次系統相關的控制器能使用S_D處理次 各處理讀處理哪個關。：域統之崎及/或外部的傳輸元1牛能 111 200903686 用J移動及/或儲存晶圓。此外，—或更多個次 ，，件辨識出，各晶圓能建立有晶圓龍，且 二史晶圓資7料。處理次序能包括内部及/或外部程^在 序，、中’晶81能傳送至外部量測及/或處理H晶圓批 中的2晶圓能傳送到其他次系統或其他整合量測(ΙΜ)工日日呈。""人 :該3又 昱.脾筮至s A >>· 1冢興弟S_D杈擬影像之間的第一差 第丄ί^ίί與第一s①影像產生準則做比較；以及，ί符ί 並將第-準則時’藉使用假想影像辨識出第一 S_D特徵， 絲目關位__在s_D^_i 修%作 苐—S_D影像產生準則時，便施加第一 能產：「處行因 S-D訊息及資料可能無法利用。〇為_差的關係，新 S_D g 圓統藉使用一或更多個 微影次系統能傳送s_ U -人系、统，且-或更多個 能接收及處理S_D訊息，1能=、 時間及/或餘刻化學的S_D_資f立^括姓刻製程配f、钱刻 侧資料钱刻晶圓。此外，告、D 、者，钱刻次系統能用S_D 算時間能触，且正確度。層㈣提供給侧卫具時’計 112 200903686 ，確度值能為S-D及/或非S-D程序及/或結果加以決定，正確 度值fb與正確度限制做比較，且若正確度值未達到正確度限制， 當使用精化程序時，精化程序能利用雙線性(bilinear)精化、拉 格朗日（Lagrange)精化、三次樣條(Cubic Spline)精化、艾特肯 (Aitken)精化、加權平均（weighted average)精化、多元二次 (^lti-quadmtic)精化、雙立方(bicubic)精化、杜蘭(Tu腿)精化小 ===精化、料(Bessel，s)精化、艾弗雷卿觸化、有 二 2i:te:dlfference)精化、高斯(Gauss)精化、厄米(Hermite)精 divided difference)精化、密切(osculating) -精化或帝勒(Thide，s)精化，或上述任何組合。 中:完成時間及/或執行時間能為S_D及/或非 時門^化、、疋1 元成時間及/或執行時與制及域處理啟動 定是否有足夠時間建立已更新的製程配方。若 :=處理敬動時間，藉使上 因時間改變°# S-D處理次序正開發中時， 開的測工具間當晶圓用分 程序:接著=化’便先發展穩定的功 處理加強2及處理最使紅用序。s-d程序能在處理穩定化、 立之前時，能用來提在:;圭化 處理切，延遲時間_來等待風險α素執仃— 113 200903686 「或更多個S_D量測能在 來比較源自圖案化_層之s ^ 仃，以獲得能用 S-D厚度資*、均句性 H且化些S-D量測能提供 _料或歷史資^ 工資料能當作 測工具、對準工且、僂 日日®貝科此攸處理工具、量 得。 、傳輪工具、檢驗工具及/或圖案辨別工具來獲A number or more of the number of processing elements of the wafer. For example, J is included to be in essence, a time test—or two or more of a plurality of wafers; a second component/plate set. The controller associated with the secondary system can use S_D to process which of the processing reads. : Domain Sakizaki and / or external transmission element 1 Niu can 111 200903686 Use J to move and / or store wafers. In addition, or more than one, the pieces identify that each wafer can be built with a wafer dragon, and the second wafer is 7 materials. The processing sequence can include internal and/or external processes, where the 'crystal 81 can be transferred to external measurement and/or the 2 wafers processed in the H wafer batch can be transferred to other subsystems or other integrated measurements ( ΙΜ) Work day and day. ""People: The 3 is 昱. Spleen to s A >>· 1 The first difference between the S_D simulation images is compared with the first s1 image generation criterion; And, ί ί and the first criterion can be used to identify the first S_D feature by using the imaginary image, and the first target energy is applied when the s_D^_i % : "The operation may not be possible due to SD messages and data. The relationship between the _ poor, the new S_D g system can transmit s_U-human, system, and/or by using one or more lithography systems. Multiple S_D messages can be received and processed, 1 can =, time and / or the remaining chemical S_D_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ The money engraving system can use S_D to calculate the time and the correctness. When the layer (4) is provided to the sideguards, the accuracy value can be determined for SD and/or non-SD programs and/or results. The value fb is compared to the accuracy limit, and if the correctness value does not reach the correctness limit, the refinement program can utilize bilinear when using the refinement program. Lagrange refinement, Cubic Spline refinement, Aitken refinement, weighted average refinement, multivariate quadratic (^lti-quadmtic) , bicubic refinement, duran (Tu leg) refinement ===refining, material (Bessel, s) refinement, Avery's touch, two 2i:te:dlfference) , Gauss refinement, Hermite fined difference, refinement, osculating-refining or Thide, refinement, or any combination of the above. Medium: completion time and / Or the execution time can be S_D and / or non-time gated, 疋1 yuan into time and / or execution time and system and domain processing start to determine whether there is enough time to establish an updated process recipe. If: = processing honour Time, if the time is changed by time °# When the SD processing sequence is under development, the open test tool is used as a wafer subroutine: then = chemicalization, then develop stable power processing enhancement 2 and process the most red order The sd program can be used to raise the stability of the sd before it is processed: the guillotization process, the delay time _ to wait for the risk α 仃 仃 - 113 2 00903686 "More than one S_D measurement can be compared to the s ^ 源自 from the patterned _ layer to obtain the thickness of the SD, the uniformity H, and the SD measurement can provide _ material or history ^ The work data can be used as a test tool, an alignment tool, and a day/day. , transfer tools, inspection tools and/or pattern recognition tools to obtain
資料在竟中’ S_D程序:能提供先前無法利用的SD 破壞性的方法；能提供更高信it的能換掉The data is in the middle of the 'S_D program: it can provide an SD destructive method that was previously unavailable; it can be replaced with a higher letter.
均勻性;能降低有風=二S 及/或工具的事故，能提供更短反應時間。1及對於處理 工且當前積體1路的製造方法贿房設計需要呼多 Φ。二此亚△吏用乂二工具的设備便因此亦必須廣泛遍佈於廠层 典㈣能是：基板塗布㈣魅布、BARC、 光後滩^2?」、頂蓋層塗布〕；供烤(塗布抗钱劑後烘烤及曝 ^後九、烤）’成像(曝光)；1測(疊對量測、臨界尺寸、缺 ^ 献處理的曝光前解光後清潔；及侧(定Α下方薄膜 之圖案)及钱刻後清潔(聚合物及其他副產物之移除）。針對低於r 二技娜需要重複這㈣多㈣絲完成半導體晶 啟動層’亦即’二次抗反射底層、二次或三次圖案化、 —人或二次成像等。為了在這些製造用「島Λ與」之間移 路’刖開式晶圓傳送盒(FOUPs，Forward Opening Unified Pods)便用 來在分開之平台間移動積體電路。 為了加速處理，並提供較佳產生的3〇〇_、45〇_或其他直 徑的晶圓，包括塗布、烘烤、曝光、顯影、全檢驗、_’、、姓刻 ί清Ϊ、ί圓報廢及晶圓重新改製的整個生產製程能理想地在單 平台上完成，該平台由該單一平台内之共同控制軟體所控制， 114 200903686 該平台並包括對#刻後結果的前授及/或反饋之先進製程控制 (APC)，該先進製程控制係能連接到最初第一處理步驟。藉由將資 料兩授(以指導使用同樣晶圓的後續處理)或將資料反饋(以指導^ 用現行晶圓的現行處理，或以指導使用後續晶圓的現行處理),APC 能使蝕刻後CD、疊對量測及缺陷資訊受評估並幾乎立刻作用。 此外’前授及/或反饋APC糸統及相關S-D傳輸次系統可使用 具位置特定性（site-specific)之技術。例如，S-D傳輸次系統能用 來傳輸晶圓到一特定處理元件，且可針對晶圓之指定位置作/pc 調整。此外，基於從晶圓上特定位置所執行之處理而蒐集的具位 置特定性之資訊，生產處理及傳輸次序能加以發展。 再者’藉使用「先遣」（“send ahead”)晶圓（亦即，先處理及呼 估-完整晶圓，再進行整批)而因此對晶圓觀FAB, fabricatk)nplam) 之利用造成最小影響，生產處職傳輸次序便能據此加以發展並 更臻完善，而此對於習知製程而言，若不在晶圓廠產量大量損失 =況下進行，則幾乎不可能達到。舉例而言，藉使用沾傳輸 ••人序先遣」晶圓能經由蝕刻及檢驗來處理，同時間主要批次在 程處理。如此允許上游生產製程調整為對整體產量具有最 因此，源自薄膜處理(或其他上游處理)的晶圓能進入平A 邊，且良好的、結束處理的晶圓能在另一邊離 圓到-邊作處理’且新聊將在另二邊另接。收之： 具問題所造成的指, 賴期之模組層級工 的基本區塊設計“=用 115 200903686 應需要而加入或移除，而不會有長時間停機及昂貴之移除盘重 架設工具。 '、 當晶圓在模組間移動時’晶圓能被執道類型系統上的機器人 加以管理。移動晶圓用之機器人能包含旋轉於一中軸上的雙鉗或 三鉗平衡系統。這些機器人將晶圓在區位間移動，並能在掃描器 任一侧的執道上移動，以允許用快速週期時間及處理步驟的全^ 可能配置來達到改善的處理多樣化。因此針對多重微影(雙圖案化 或试影)或重新改製’「侧邊傳輸」(“side transport”)系統能促使曰$圓 輕易地從顯影後IM回到塗布過程的起點’以使曝光工具的使用择 加。此外，「側邊傳輸」能促成多重圖案化，單一晶圓^從顯影^ IM移動而回到光微影系統的輸入口’以進行多重微影。若重新改 製處理在光微影系統之微影前部分可利用，需要重新改製的晶圓 亦可以此方式處置。如此，晶圓不須以人工或架空搬運自動化系 統(overhead automation)之方式來載入F0UP及在工具間移動，^ 此減低晶圓層級之缺陷率。 曰 。上述軌道祕的使用亦能造成系統不—定要按照次序處理晶 圓。組成整個製程的模组能與服務模組群組的一或更多個機哭人 ϊΐΐϋί，ί次晶圓並不需要等待重新改製或報廢晶^。Uniformity; can reduce windy = two S and / or tool accidents, can provide shorter reaction time. 1 and for the processing and the current manufacturing method of the 1st road, the design of the bribe room needs more than Φ. The equipment of the second 亚 吏 乂 工具 tool must also be widely distributed in the factory floor (four) can be: substrate coating (four) charm cloth, BARC, light back beach ^ 2?", top cover layer coating]; for baking (Coating after anti-money agent baking and exposure), imaging (exposure); 1 measurement (stacking measurement, critical size, lack of treatment, pre-exposure, post-exposure cleaning; and side (fixed) The pattern of the underlying film) and the cleaning after the engraving (removal of the polymer and other by-products). For the lower than r, the second (four) multi-fourth wire is required to complete the semiconductor crystal starting layer 'that is, the secondary anti-reflective bottom layer. , secondary or tertiary patterning, human or secondary imaging, etc. In order to move between these islands, the "FOUPs" (Forward Opening Unified Pods) are used in Move the integrated circuit between separate platforms. In order to speed up the process, and provide better generated 3〇〇_, 45〇_ or other diameter wafers, including coating, baking, exposure, development, full inspection, _', The entire production process of the surname ί Ϊ, 圆 round scrap and wafer re-engineering can ideally be in the flat Upon completion, the platform is controlled by a common control software within the single platform, 114 200903686 The platform includes advanced process control (APC) for pre-authorization and/or feedback of the #刻刻结果, the advanced process control system can be connected To the initial first processing step. By either granting the data (to guide the subsequent processing of the same wafer) or feeding back the data (to guide the current processing of the current wafer, or to guide the current processing of subsequent wafers) ), APC enables post-etch CD, stack-to-measurement, and defect information to be evaluated and acted almost immediately. In addition, 'pre-grant and/or feedback APC systems and related SD transmission subsystems can make site-specific (site-specific) For example, an SD transfer subsystem can be used to transfer wafers to a specific processing component and can be /pc adjusted for a given location on the wafer. In addition, it is collected based on processing performed at specific locations on the wafer. The location-specific information, production processing and transmission order can be developed. In addition, 'by using the "send ahead" wafer (that is, processing and re-evaluation - complete wafer, then The entire batch) and thus the use of the wafer view FAB, fabricatk) nplam), the production order can be developed and improved, and for the conventional process, if not in the wafer A large loss of factory output = under conditions, it is almost impossible to achieve. For example, wafers can be processed by etching and inspection by using the “Distance Transfer” • The main batch is processed at the same time. This allows the upstream production process to be adjusted to have the highest overall yield, so wafers from thin film processing (or other upstream processing) can enter the flat A side, and good, finished wafers can be rounded off on the other side - Do it side by side and the new chat will be connected on the other side. Accepted: The problem caused by the problem, the basic block design of the module level worker in the reliance period "=Add or remove with 115 200903686 as needed, without long downtime and expensive removal of the disk erection Tools. 'When the wafer moves between modules', the wafer can be managed by robots on the type of system. The robot for moving wafers can include a double or triple clamp balancing system that rotates on a central axis. These robots move the wafer between locations and move on either side of the scanner to allow for improved processing diversification with fast cycle times and full configuration of processing steps. (Double patterning or experimentation) or re-engineering the 'side transport' system can cause the 圆$ circle to easily return from the post-development IM to the starting point of the coating process' to allow the use of exposure tools. . In addition, "side transfer" can facilitate multiple patterning, and a single wafer moves from the developing device to the input port of the photolithography system to perform multiple lithography. If the re-modification process is available in the lithography of the photolithography system, the wafers that need to be re-formed can also be disposed of in this way. In this way, the wafer does not have to be loaded by the manual or overhead automation system to load the F0UP and move between the tools, thereby reducing the defect rate at the wafer level. Oh. The use of the above-mentioned track secrets can also cause the system to not process the crystals in order. The modules that make up the entire process can be crying with one or more machines in the service module group. The wafer does not need to wait for re-engineering or scrapping the crystal.
批次」（“_*，’)能產生、處理，並細懷t 此相同概念能用於從主要批次淘汰報廢晶圓，而不 1?準的晶圓的重新改製可^即開始並自 動化。如此，整個製造、檢驗與控制功能包含於般工 =單-工具並有共同軟體來即時控制或監視輪出及調整製程輸 在本發明之-實施例中有包括數個模組，該 來在黏合到钱刻後清潔檢驗等階段處理s圓士、"、 模組並不需細9崎要的設備。 如圖9翁示，接受過_處理(他上游處寧晶圓進入 116 200903686 已驗證、已完成之晶圓在另一端點離開。例如，模 可處二布機、空烤板、浸潰前清潔處理。模組2 進而污染晶圓。據此:、、本發= 污毕^ 具_開，藉此降低缺陷並將可能 '^ 、。工淨微粒計數器能建立在晶圓路徑盥關鍵奥 二缺陷。_便接著可以啟動警報狀兄Ιϊ m處可駕馭在多重軌道類型的系統上，_ I日 器。接著在曝光之後田f可具有本身内部晶圓處理 到模組4 ί 多重系統上另—機器人拾取 進仃/又，貝後清潔、曝光後烘烤(PEB)、BWEE盥 ^界^的:可到1M模組7(成像模組)進行疊^量 廢1^士晶圓若故障，能進行重新改製，若不能重新改f則報 f二=由，置系統或單-晶圓之「側邊軌道」 _)、曝光後供烤(pEB)布抗钱劑後烘烤 基於在此時所獲得^量^士理所做的APC調整能 特定性之與^ 例中，雖然IM槿細7 «兹二休1 j吋候不疋成。例如，在本範 的資訊成像，該等資“晶圓與晶圓上特定位置 圓某些特定位置執行之處理的資訊處二的;= 上特ϊγγ成，並能制處理巾各祕之 含在内部的右ϊίΐϊΐ本身的内部處置器(模組8)中進行。亦包 終厦i包含所需及最終ιμ工具(模組ι〇)。最 寸資料來執行，以該整的apc能由_後臨界尺 °等貝枓驅動光阻光微影系統塗布抗蝕劑後烘 117 200903686 =(方。）曝光後;t、烤(PEB)、曝光工具或光微影系統顯影劑製程 之細=式實’而是根據在此提供 :，之配置'操作、運;=2:== 無_如何並非意指或用來限制本，π # ~ γ °手3^ 專利範圍狀之。 财H而其濟係由隨附之申請 【圖式簡單說明】 參照二』概:作為範例來敘述，其中各 ^ 1 本發明之實施例嘴示處理祕的例雜方塊圖。 心m據本發明之實施例，說明使用s_D程序用以處理晶 圓之方法的例示性流程圖。 日日 繪示晶圓地圖的簡化圖。 繪示例示性次系統的簡化方塊 圖3係根據本發明之實施例 圖4係根據本發明之實施例 圖。 me 7〜，說明用來驗證S-D特徵、S-D — 或七程序之方法的例示性流程圖。 之方之實施例，說明用來建構S_D評估程式庫 方法沾程序在晶圓上建構雙重金屬鑲嵌結構之 ，兒明勤毒S_D評估程式庫的另—例示性流程圖。 的系ΐ明之—實施_方顧，該方額說贿個模組 的糸統，各_組容納有處理晶義所有必須設備。 圖5係根據本發明之實施例 118 200903686 【主要元件符號說明】 100處理系統 101第一 S-D傳輸次系統 102第二S-D傳輸次系統 103第三傳輸次系統 104傳輸元件 105遞送元件 106資料傳輸次系統 110第一微影次系統 111a連接 111b連接 112處理元件 113内部傳輸裝置 114控制器 115掃描器次系統 116a連接 116b連接 117處理元件 118内部傳輸裝置 119控制器 120第二微影次系統 121a連接 121b連接 122處理元件 123内部傳輸裝置 124控制器 125第三微影次系統 126a連接 200903686 126b連接 127處理元件 128内部傳輸裝置 129控制器 130熱處理處理次系統 131a連接 131b連接 132處理元件 133内部傳輸裝置 134控制器 135檢驗次系統 136a連接 136b連接 137S-D評估元件 138内部傳輸裝置 139控制器 140蝕刻次系統 141a連接 141b連接 142處理元件 143内部傳輸裝置 144控制器 145沉積次系統 146a連接 146b連接 147處理元件 148内部傳輸裝置 149控制器 150評估次系統 120 200903686 151a連接 151b連接 152評估元件 153内部傳輸裝置 154控制器 155重新改製次系統 156a連接 156b連接 157處理元件 158内部傳輸裝置 159控制器 180製造執行系統 195系統控制器 196資料傳輸系統 200程序 205、210、215、220、225、230、235、240、245、250、255、260、 265'270、275、280、285、290、295、510、515、520、525、530、 535、540、545、550、555、560、565、570、580、610、615、620、 625、630、630、635、640、645、650、655、660、665、670、675、 680、690、710、715、720、725、730、735、740、745、750、755、 760、810、815、820、825、830、835、840、845、850、855、860、 870、880 步驟 300晶圓 301、302環狀虛線 305外部區域 306中間區域 307内部區域 310晶片 320晶圓地圖 121 200903686 330位置 4⑻S-D次系統 401第一非S-D傳輸次系統 402第二非S-D傳輸次系統 410、 420、430、440、450 S-D 元件/次系統 411、 421、431、441、451、466、476 連接 414、 424、434、444、454 控制器 415、 425、435、445、455 S-D 真空預備元件 417、427、437、447、457 S-D 内部傳輸裝置 460第一 S-D傳輸次系統 461、462、463、464、465 第一 S-D 傳輸元件 467第一 S-D傳遞元件 469、479 方向 470第二S-D傳輸次系統 471、472、473、474、475 第二 S-D 傳輸元件 477第二S-D傳遞元件 500、600、700、800 程序Batches ("_*,') can be generated, processed, and carefully t. This same concept can be used to phase out scrapped wafers from major batches, and the re-engineering of wafers can be started without Automation. Thus, the entire manufacturing, inspection, and control functions are included in the general work = single-tool and have a common software to instantly control or monitor the rotation and adjustment process. In the embodiment of the present invention, there are several modules. In the stage of bonding to the money, after cleaning and inspection, the s round, ", the module does not need to be fine.) As shown in Figure 9, Weng has received _ processing (he upstream of the wafer into 116 200903686 The verified, completed wafer leaves at the other end. For example, the mold can be placed in the second machine, the empty baking sheet, and the cleaning process before the dipping. The module 2 in turn contaminates the wafer. According to this:,, this hair = Stained with _ open, thereby reducing defects and possibly '^,. The net particle counter can be established in the wafer path 盥 key Austrian two defects. _ can then start the alarm-like brother Ιϊ m can be controlled in multiple tracks Type of system, _ I day device. Then after exposure, field f can have itself Internal wafer processing to the module 4 ί Multi-system on the other - the robot picks up the 仃 / again, after the cleaning, after exposure (PEB), BWEE 盥 ^ boundary: can go to the 1M module 7 (imaging module If the stacking of the waste wafer is faulty, it can be re-modified. If it cannot be changed again, it will be reported as f==, the system or single-wafer "side track" _), after exposure Bake (pEB) cloth anti-money agent post-baking is based on the APC adjustment energy specificity obtained in this case. In the example, although IM槿细7 «兹二休1 j吋Yu Cheng. For example, in the information imaging of this model, the information of the processing of the wafer and the specific position of the wafer on a specific position is performed at the specific position; = the upper ϊγγ is formed, and the processing can be processed. It is carried out in the internal right processor (module 8) of the right side. It also contains the required and final ιμ tool (module ι〇). The most inch data is executed, so that the whole apc can be _After the critical ruler, etc., the beryllium-driven photo-resistance photolithography system is coated with a resist and then baked 117 200903686 = (square) after exposure; t, baked (PEB), exposure tool or photolithography system = "real" is provided here:, the configuration of 'operation, transport; = 2: == no _ how not to mean or to limit this, π # ~ γ ° hand 3 ^ patent range. H and its application is attached to the application [simplified description of the drawings] Referring to the second embodiment: as an example, each of the embodiments of the present invention shows a detailed block diagram of the processing secret. An embodiment of an exemplary flow chart illustrating a method of processing a wafer using the s_D program. Figure 3 is a simplified block diagram of an exemplary subsystem. Figure 3 is an embodiment of the present invention. Figure 4 is a diagram of an embodiment of the present invention. Me 7~, illustrating a method for verifying SD features, SD - or seven programs. An exemplary flow chart illustrates an alternative exemplary flow chart for constructing a S-D evaluation library method for constructing a dual damascene structure on a wafer. It is said that the implementation is _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ Processing system 101 first SD transmission subsystem 102 second SD transmission subsystem 103 third transmission subsystem 104 transmission component 105 delivery component 106 data transmission subsystem 110 first lithography subsystem 111a connection 111b connection 112 processing component 113 internal transmission Device 114 controller 115 scanner subsystem 116a connection 116b connection 117 processing component 118 internal transmission device 119 controller 120 second lithography subsystem 121a connection 121b connection 122 Processing element 123 internal transmission device 124 controller 125 third lithography subsystem 126a connection 200903686 126b connection 127 processing element 128 internal transmission device 129 controller 130 heat treatment processing subsystem 131a connection 131b connection 132 processing element 133 internal transmission device 134 controller 135 inspection subsystem 136a connection 136b connection 137S-D evaluation component 138 internal transmission device 139 controller 140 etching subsystem 141a connection 141b connection 142 processing component 143 internal transport device 144 controller 145 deposition subsystem 146a connection 146b connection 147 processing component 148 Internal transmission device 149 controller 150 evaluation subsystem 120 200903686 151a connection 151b connection 152 evaluation component 153 internal transmission device 154 controller 155 re-engineering subsystem 156a connection 156b connection 157 processing component 158 internal transmission device 159 controller 180 manufacturing execution system 195 System controller 196 data transfer system 200 programs 205, 210, 215, 220, 225, 230, 235, 240, 245, 250, 255, 260, 265'270, 275, 280, 285, 290, 295, 510, 515 , 520, 525, 530, 535, 540, 545, 550, 555, 560, 565, 5 70, 580, 610, 615, 620, 625, 630, 630, 635, 640, 645, 650, 655, 660, 665, 670, 675, 680, 690, 710, 715, 720, 725, 730, 735, 740, 745, 750, 755, 760, 810, 815, 820, 825, 830, 835, 840, 845, 850, 855, 860, 870, 880 Step 300 wafer 301, 302 annular dotted line 305 intermediate area 306 intermediate Area 307 Internal Area 310 Wafer 320 Wafer Map 121 200903686 330 Position 4 (8) S-D Sub System 401 First Non SD Transmission Sub System 402 Second Non SD Transmission Sub System 410, 420, 430, 440, 450 SD Element / Sub System 411 421, 431, 441, 451, 466, 476 connection 414, 424, 434, 444, 454 controller 415, 425, 435, 445, 455 SD vacuum preparation element 417, 427, 437, 447, 457 SD internal transmission device 460 first SD transmission subsystem 461, 462, 463, 464, 465 first SD transmission element 467 first SD transmission element 469, 479 direction 470 second SD transmission subsystem 471, 472, 473, 474, 475 second SD Transmission element 477 second SD transfer element 500, 600, 700, 800 program
fr V 122Fr V 122
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| US11/730,283 US7373216B1 (en) | 2007-03-30 | 2007-03-30 | Method and apparatus for verifying a site-dependent wafer |
| US11/730,202 US7531368B2 (en) | 2007-03-30 | 2007-03-30 | In-line lithography and etch system |
| US11/730,279 US7783374B2 (en) | 2007-03-30 | 2007-03-30 | Method and apparatus for performing a site-dependent dual damascene procedure |
| US11/730,341 US7650200B2 (en) | 2007-03-30 | 2007-03-30 | Method and apparatus for creating a site-dependent evaluation library |
| US11/730,284 US7596423B2 (en) | 2007-03-30 | 2007-03-30 | Method and apparatus for verifying a site-dependent procedure |
| US11/730,339 US7935545B2 (en) | 2007-03-30 | 2007-03-30 | Method and apparatus for performing a site-dependent dual patterning procedure |
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| TWI503680B (en) * | 2010-03-08 | 2015-10-11 | Cadence Design Systems Inc | Method, system and program product for interactive checking for double pattern lithography violations |
| TWI631636B (en) * | 2013-12-16 | 2018-08-01 | 克萊譚克公司 | Integrated use of model-based metrology and a process model |
| US10769320B2 (en) | 2012-12-18 | 2020-09-08 | Kla-Tencor Corporation | Integrated use of model-based metrology and a process model |
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| US9277186B2 (en) * | 2012-01-18 | 2016-03-01 | Kla-Tencor Corp. | Generating a wafer inspection process using bit failures and virtual inspection |
| US11263737B2 (en) * | 2019-01-10 | 2022-03-01 | Lam Research Corporation | Defect classification and source analysis for semiconductor equipment |
| US20220351996A1 (en) * | 2021-04-29 | 2022-11-03 | Changxin Memory Technologies, Inc. | Front opening unified pod, wafer transfer system and wafer transfer method |
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| US3889355A (en) * | 1973-02-05 | 1975-06-17 | Ibm | Continuous processing system |
| US5124927A (en) * | 1990-03-02 | 1992-06-23 | International Business Machines Corp. | Latent-image control of lithography tools |
| JPH0480939A (en) * | 1990-07-24 | 1992-03-13 | Hitachi Ltd | Manufacture of semiconductor integrated circuit device |
| US6171174B1 (en) * | 1998-06-26 | 2001-01-09 | Advanced Micro Devices | System and method for controlling a multi-arm polishing tool |
| US6909930B2 (en) * | 2001-07-19 | 2005-06-21 | Hitachi, Ltd. | Method and system for monitoring a semiconductor device manufacturing process |
| JP4158384B2 (en) * | 2001-07-19 | 2008-10-01 | 株式会社日立製作所 | Semiconductor device manufacturing process monitoring method and system |
| US6908807B2 (en) * | 2002-03-26 | 2005-06-21 | Micron Technology, Inc. | Methods of forming semiconductor constructions |
| JP4694843B2 (en) * | 2002-09-30 | 2011-06-08 | 東京エレクトロン株式会社 | Equipment for semiconductor manufacturing process monitoring and control |
| US7065738B1 (en) * | 2004-05-04 | 2006-06-20 | Advanced Micro Devices, Inc. | Method of verifying an optical proximity correction (OPC) model |
| US8084400B2 (en) * | 2005-10-11 | 2011-12-27 | Intermolecular, Inc. | Methods for discretized processing and process sequence integration of regions of a substrate |
| US8882914B2 (en) * | 2004-09-17 | 2014-11-11 | Intermolecular, Inc. | Processing substrates using site-isolated processing |
| TW200745771A (en) * | 2006-02-17 | 2007-12-16 | Nikon Corp | Adjustment method, substrate processing method, substrate processing apparatus, exposure apparatus, inspection apparatus, measurement and/or inspection system, processing apparatus, computer system, program and information recording medium |
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| TWI503680B (en) * | 2010-03-08 | 2015-10-11 | Cadence Design Systems Inc | Method, system and program product for interactive checking for double pattern lithography violations |
| US10769320B2 (en) | 2012-12-18 | 2020-09-08 | Kla-Tencor Corporation | Integrated use of model-based metrology and a process model |
| TWI631636B (en) * | 2013-12-16 | 2018-08-01 | 克萊譚克公司 | Integrated use of model-based metrology and a process model |
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| JP5200276B2 (en) | 2013-06-05 |
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