TW200901155A - Video display device capable of compensating for display defects - Google Patents
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200901155 九、發明說明: 【發明所屬之技術領域】 本發明係關於一種顯示裝置,尤其係關於一種具有補償顯示 缺陷能力之影音顯示裝置。雖然本發明實施例適合廣泛的應用範 圍,但是尤其適合使用補償資料以增強顯示品質。 【先前技術】 近來’對於影音顯示裝置來說,人們通常使用平面顯示裝置, 例如液晶顯示裝置(liquid crystal display ; LCD )、電漿顯示裝置 (plasma display panel ; PDP)以及有機發光二極體(organiclight emitting diode ; 〇LH))等顯示裝置。這種影音顯示裝置在製造期 間被提交至檢查制程,以檢查顯示面板上可能存在的顯示缺陷。 當顯示面板被偵測到存在缺陷時,執行修復制程以修復顯示面板 之缺陷部。然而,可能存在修復制程所無法修復之顯示缺陷。 薄膜圖案形成制程中使用的曝光設備之多次曝光操作中重疊 曝光之曝光量的偏差或者曝光設備中使用的多個透鏡之色差係為 顯不缺陷之主要原因。尤其地,曝光量的偏差造成細圖案的寬 度變化,從而導致薄膜電晶體中寄生電容(p腿脱capadty)之 偏差、用於轉職液晶_之攔狀間隔物之高度偏差,和/或 如虎顯中寄生電容之偏差。這種偏差導致出現亮度色差之顯示缺 陷曝光量之偏差所產生的這些顯示缺陷依照曝光設備之掃描方 向顯示於顯示面板之上,成輕直線或水平線。然而,即使可能 6 200901155 透過制程技術之改善也很難全部消除這麵直或水平線形狀之顯 示缺陷。 顯示缺陷還可以點缺陷(p〇int defect)之形式被顯示於包含夾 雜物(foreignmatter)之缺陷畫素處。雖然這些缺陷晝素被提交至 6復制程,但疋處於被修復狀態時仍然可包含點缺陷。例如,當 暗畫素(dark pixel)形式中的缺陷晝素透過修復制程被修復時, 暗晝素將以黑點缺陷的形式被顯示於白色影像中。此外,當修復 制程被完成時,這樣暗晝素形式中被修復的晝素則被鏈結至鄰接 的正常晝素,因為供應至正常晝素的資料也必須均勻地被分配至 修復晝素,由於資料電荷f短缺,所哺鏈結之晝素被顯示為點 缺陷。 為此,近來已經提出藉由電路之顯示缺陷之補償方法,以解 決實體修復制程無法消除之顯示缺陷。然而,在使用水平線資料 補償電路以解決具有垂直線顯示缺陷之顯示裝置時,習知技術之 黾路補償方法存在問題,反之亦然,應用垂直線資料補償電路至 具有水平線顯示缺陷之顯示裝置時也存在問題。這是因為由於曝 光1之偏差而導致的水平和垂直顯示缺陷在亮度分配和缺陷位置 資訊方面彼此不同。 習知技術之電路補償方法還無法依照關聯缺陷區域之亮度得 到適應性的加法和減法補償值。問題在於透過一種方法難以為缺 陷區域定量且系統化補償值,例如,假設缺陷區域係為黑暗,其 200901155 中缺陷區域被補償亮度,這樣缺陷區域比缺陷區域周圍的正常區 域更亮,或者當缺陷區域為明亮時,正常區域被補償亮度,從而 正常區域變得更亮。因此,習知技術之影音顯示裝置需要一種資 料補償電路,能夠依照關聯缺陷區域的位置獲得自適應加法和減 法之補償值,同時可應用至具有水平線顯示缺陷之影音顯示裝置 和具有垂直之影音顯示裝置,*錢考慮顯示缺陷之 類型。此外,希望資料補償電路具有簡單的配置以降低成本。 【發明内容】 因此,本發明實施例在於提供一種能夠補償顯示缺陷之影音 顯不裝置,藉以實質上避免習知技術之關和缺陷所帶來的一或 多個問題。 本發明實關之目的在於提供—種具有補償各鋪示缺陷能 力之影音顯示健,此裝置使關償·並且具有簡單的電路配 置。 本考X月其匕的優點、目的和特徵將在如下的說明書中部分地 加以闡述’並且本發明其它的伽、目的和特徵對於本領域的普 通技術人S來說’可以透過本發明如下龍明得㈣分地理解或 者可以從本發_實射得出。本發明的目的和其它優點可以透 過本發明所記齡觸書和申請專職财特·日⑽結構旅結 合图式部份,得以實現和獲得。 可以理解的是’如上所述的本發日狀概括說明和隨後所述的 8 200901155 本㈣之詳細_均是財代表師_性的朗,並且是為了 進一步揭示本發明之申請專利範圍。 【實施方式】 以下’將結合關對本發_触實施方式作詳細說明。立 中在這些圖切份中所制__參考標號代表相_同類部 件0 /第1圖」所示係為本發明有代表性實施例之具有補償顯示 缺陷能力之液晶顯示裝置。「第丨圖」所示之液晶顯示裝置包含資 料補償電路105和時序控制器104。液晶顯示裝置還包含資料驅動 口間極驅動器102,其功能在於驅動液晶面板1〇3。資料補 償電路可連同時序控制器刚以—個半導體晶片之形式共同被實 施。 、 貝料補償電路1〇5接收液晶顯示I置之外部輸入的資料取、 Ge和Be,並且接收複數個同步訊號Vsync、脚沉、和WLK。 貝料補f貝電路105在記憶體中储存用於典型缺陷區域之資訊,例 如規則的水平線或規則_直線,包含位㈣訊、灰階資訊以及 典型缺陷區域之補償資料。記__存點缺陷區域之資訊,包 3位置纽、灰階貧訊以及點缺陷區域之補償資料。藉由用於典 型缺區域之資訊’資料補償電路1〇5補償細示於典型缺陷區 域之上的資料’並且輸出被補償之資料。在典型缺陷區域被劃分 為主區域和邊界區域的條件下’ f料補償電路⑽執行資料補償 200901155 (第-補償)。此後’在典型缺陷區域之補償資料依照框速率控制 (frame rate co咖1; FRC)顫動方法在空間上和時間上被分散的 條件下,資料補償電路1()5使用麵資料精細地補償典型缺陷區 域之資料(第二補償)。資料補償電路1〇5還使用點缺陷區域之資 訊補償點缺陷區域之資料,並且輸出經過補償之資料(第三補 償)。然後,資料補償電路105供應經過補償之資料連同同步訊號 Vsync、Hsync、DE和DCLK至實現控制器,其中經過補償之資 料即為資料Re、Ge和Be。資料補償祕1()5還供應待顯示於正 常區域上之資料至時序控制器辦,無須補償此㈣。以後將描述 資料補償電路105之詳細配置。 ^序控制器1〇4排列資料補償電路1〇5輸入之資料Rc、& 和Be ’並且輸出結果資料至資料驅動器ι〇ι。使用同步訊號 vSync、Hsync、DE^DCLK,時序控制器1〇4產生資料控制訊號υ DDC以控制資料驅動器1〇1之驅動時序以及間極控制訊號 以&制閘極驅動器1〇2之驅動時序。紐,時序控制器撕輸出 貧料控制訊號DDC和閘極控制訊號GDC。 回應來自時序控制器1〇4之資料控制訊號DDC,資料驅動器 1〇1使用伽馬電壓轉換接收自時序控制器1〇4之數位資料即資料 Rc Gc和Be為類比資料。資料驅動器、1〇1輸出類比資料至液晶 面板103之資料線。回應來自時序控制器1〇4之閘極控制訊號 GDC閘極驅動器1〇2順序地驅動液晶面板期之問極線。 10 200901155 液晶面板103透過畫素矩陣顯示影像,其中複數個晝素排列 於晝素矩陣之上。使用紅、綠和藍色子晝素之組合,依照資料訊 號透過液晶之排列變化調整透光率,每—晝素呈現一種所需之色 彩。每一子畫素包含一薄膜電晶體(thinfllmtransist〇r ; TFT),薄 膜電晶體搞合於一條閘極線17和一條資料線π。每一子晝素還包 含液晶電容器Ck和並行搞合於軸電晶體之儲存電容器⑸。使 用透過薄膜電晶體而供應至晝素電極之資料訊號和供應至共同電 極之共同電S Vcom之間的差分電壓為液晶電容器ac充電,以依 照充電電壓驅動液晶,從而調整子晝素之透光率。由於使用的製 造制私的緣故,液晶面板103可包含水平或垂直線形狀的典型缺 陷區域和點缺陷區域’缺陷區域顯示由資料補償電路1()5所補償 的資料。結果,正常區域和缺陷區域之間的亮度差值可被避免, 因此可增強顯示品質。 同時,本來事先應§亥儲存在資料補償電路105之記憶體中的 典型缺陷區域之資訊和點缺陷區域之資訊依照以下方法被設定。 顯示缺陷可被劃分為典型缺陷和點缺陷,其中典型缺陷通常 以水平線或垂直線的形式規則地被顯示,主要係由曝光量的偏差 而造成,點缺陷通常由於夹雜物的介入而被不規則地顯示。影音 顯示裝置中,這種典型缺陷和點缺陷在檢查程序中被偵測。然後, σ又疋偵/則之典型缺陷之補償資料以及偵測之點缺陷之補償資料。 設定的補償資料被儲存在資料補償電路105之記憶體中。 11 200901155 在影音顯示裝置的亮度檢查程序中,當偵測到水平線或垂直 線形式的典型缺陷時,依照偵測之典型缺陷之類型以及典型缺陷 區域之污染分佈範圍,設定每一邊界區域中包含的每一細分邊界 區之i度以及母以邊界區域之位置資訊。此外,測量典型缺陷區 域之污染程度’ g卩’正常區域和缺陷區域之間的亮度差值或色彩 差值。此後,設定補償資料以補償被測量的亮度差值和色彩差值。 例如,在檢查程序中’「第2圖」所示之規則垂直線缺陷區域 或者「第3圖」所示之規則水平線缺陷區域可被偵測為顯示裝置 之典型缺陷。如「第4圖」所示,每一垂直線缺陷區域可被劃分 為主區域C1以及邊界區域SG1和SG2,其中主區域C1沿垂直方 向延伸同時顯示固定亮度,邊界區域SG1和SG2對稱地排列於主 區域C1之相對侧面處同時展現逐漸變化之亮度。如「第5圖」所 示’母一水平線缺陷區域可被劃分為主區域以及邊界區域SQ1 和SG2,其中主區域Cl沿水平方向延伸同時顯示固定亮度,邊界 區域SG1和SG2對稱地排列於主區域C1之相對侧面同時展現逐 漸變化之亮度。每一缺陷區域之每一邊界區域SG1和SG2對應主 區域C1之焭度與缺陷區域鄰接之正常區域之亮度重疊之區域。每 —邊界區域SG1和SG2可被劃分為複數個邊界區,這樣邊界區域 SG1或SG2之邊界區相對主區域C1與另一邊界區域sg2或SG1 之邊界區對稱。當每一邊界區域SG1和SG2接近主區域C1,每 一邊界區域SG1和SG2顯示逐漸接近主區域C1亮度之亮度,當 12 200901155 每-邊界區域SG1和SG2接近正常區域時,顯示逐漸接近正常區 域亮度之亮度。 依照主區域ci之開始位置和主區域C1之寬度設定主區域α 之位置貝訊。另-方面’依照主區域C1之位置資訊、每一邊界區 域SG1和SG2中包含的細分邊界區之數目以及每—細分邊界區之 寬度’自動地設定邊界區域SG1和SG2之位置資訊。依照主區域 C1之寬度以及主區域C1之_、補償資料之大小,每—邊界區域 SCH和SG2中包含的細分邊界區之數目以及每一細分邊界區之寬 度可在未偏離顫動圖案之規定的範_被調整,以在空間上和時 間上分配補償資料。 ,典型缺陷區域之主區域C1之補償資料a!被設定以補償主區 域C1和正常區域之間的亮度差值。每一對稱排列之邊界區域灿 和SG2之補償資料,即補償資料片段bl至ei,依照bi、ci、山 和el的順序自動地被設定為逐漸減少。同時,如「第6圖」所示, 液晶顯示裝置展示不_伽馬電壓特性於不同的灰階範圍A』、 =和D中。因此,典型缺陷區域之每一補償資料片段μ至以依 照展現不同的伽馬娜的不同灰階區A、B、c和d被設定,以 具有不同的補償值,。此外,典型缺陷區域之補償資料片段^至 el可依照制缺陷區域之位置被設定,以具林同的補償值。 因此,於檢查程序中偵測的典型缺陷之資訊,即侦測之並型 缺陷之位置資訊、依照典型缺陷之位置為各灰階範圍最佳化之補 13 200901155 4員資料,以及表示灰階範圍之灰階範圍資訊被儲存在記憶體中。 在檢查程序中,還執行檢查點缺陷區域之操作。對於被偵測 的點缺陷區域,位置資訊和最佳補償資料被設定。設定的位置資 訊和補償資料被儲存在記憶體中。就是說,點缺_域之補償資 料依照點缺陷區域之顯示缺陷程度針對每一灰階範圍被最佳化, 使用的方法與上述使用的最佳化垂直或水平線缺陷區域之補償資 料方法相同。織,被最佳化之補償㈣觀存在記憶體中。用 於表示灰階範目之雄資訊也被儲存在㈣裝置之記憶體中。 例如’在;k查&序中,當偵測到由於夾雜物之介人而導致的 具有缺_梵缺陷畫素gf,透過從相義號線巾錄亮缺陷晝素 而執行修復操作’賴職為暗晝素1G,並且_麟圖案12 鏈結暗晝素10至鄰接暗晝素1〇之正常晝素n,如「第7圖」所 示。此實例中,點缺陷可透過鏈結晝素13被顯示,其中鍵結畫素 13包含被鏈結的正常晝素u和暗畫素1()。這細為供應至正常 晝素11之資料甚至必須被分配至與正常晝素u鏈結之暗晝素⑴ 以充滿正常晝素11,輯與未鏈結其他晝麵其他正常畫素^相 比較’正常晝素11的資料填充量被減少。為了補償這種資料填充 量減少所帶來_缺陷,·正常晝素和_録13之真产 差值或色彩紐,即點缺_域和正f區域之卩摘亮度差值或^ 彩差值。此後,設定能夠補償此測量亮度差值或色彩差值之補償 資料。依照點缺陷之位置,點缺陷區域之補償資料也針對各 14 200901155 灰階範圍被最佳化。此最佳化補償⑽相此點缺陷之位置資訊 和灰階範圍資訊被儲存於記憶體中。 …「第8圖」所示係為本發㈣—實施例之液晶顯示裝置之資 料補償電路。如「第8圖,所千,咨刹_、士、冰 乐α」所不貝枓補^員電路1〇5包含:記憶 體4〇,用於儲存典型缺陷資訊和點缺陷資訊;第一補償器%,用 於透過記髓4〇巾儲存的典型缺_簡償翻缺謹域之資料BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a display device, and more particularly to an audio-visual display device having the capability of compensating for display defects. While embodiments of the present invention are suitable for a wide range of applications, it is particularly suitable to use compensation data to enhance display quality. [Prior Art] Recently, for a video display device, a flat display device such as a liquid crystal display (LCD), a plasma display panel (PDP), and an organic light emitting diode ( Organic light emitting diode; 〇LH)) and other display devices. This video display device is submitted to the inspection process during manufacture to check for display defects that may be present on the display panel. When the display panel is detected to be defective, a repair process is performed to repair the defective portion of the display panel. However, there may be display defects that cannot be repaired by the repair process. The deviation of the exposure amount of the overlap exposure in the multiple exposure operation of the exposure apparatus used in the thin film pattern forming process or the color difference of the plurality of lenses used in the exposure apparatus is the main cause of the defect. In particular, the deviation of the exposure amount causes a change in the width of the fine pattern, thereby causing a variation in parasitic capacitance (p-cap capable) in the thin film transistor, a height deviation of the barrier spacer for the transfer liquid crystal, and/or a tiger The deviation of the parasitic capacitance in the display. These deviations cause the display defects caused by the deviation of the display defect amount of the luminance chromatic aberration to be displayed on the display panel in accordance with the scanning direction of the exposure device, forming a light straight line or a horizontal line. However, even though it is possible to improve the manufacturing process technology, it is difficult to completely eliminate the display defects of this straight or horizontal line shape. The display defect can also be displayed in the form of a defect defect in the form of a defective pixel containing a foreign matter. Although these defects are submitted to the 6-copy process, they can still contain point defects when they are in the repaired state. For example, when the defective element in the dark pixel form is repaired through the repair process, the dark pigment will be displayed in the white image in the form of a black dot defect. In addition, when the repair process is completed, the quercetin that is repaired in the form of cryptoside is linked to the adjacent normal quinone, because the data supplied to the normal quinone must be evenly distributed to the repaired sputum. Due to the shortage of the data charge f, the element of the chain to be fed is shown as a point defect. For this reason, compensation methods for display defects of circuits have recently been proposed to solve display defects that cannot be eliminated by the physical repair process. However, when a horizontal line data compensation circuit is used to solve a display device having a vertical line display defect, the conventional technique of the circuit compensation method has a problem, and vice versa, when a vertical line data compensation circuit is applied to a display device having a horizontal line display defect. There are also problems. This is because the horizontal and vertical display defects due to the deviation of the exposure 1 are different from each other in terms of luminance distribution and defect position information. The circuit compensation method of the prior art has not been able to obtain adaptive addition and subtraction compensation values in accordance with the brightness of the associated defect area. The problem is that it is difficult to quantify and systematically compensate the defect area by a method. For example, if the defect area is dark, the defect area in 200901155 is compensated for brightness, so that the defect area is brighter than the normal area around the defect area, or when the defect When the area is bright, the normal area is compensated for brightness, so that the normal area becomes brighter. Therefore, the audio-visual display device of the prior art requires a data compensation circuit capable of obtaining adaptive compensation and subtraction compensation values according to the position of the associated defect region, and can be applied to a video display device having horizontal line display defects and having a vertical video display. Device, * money considers the type of defect displayed. In addition, it is desirable that the data compensation circuit has a simple configuration to reduce costs. SUMMARY OF THE INVENTION Accordingly, it is an embodiment of the present invention to provide an audiovisual display device capable of compensating for display defects, thereby substantially obviating one or more problems associated with the related art. SUMMARY OF THE INVENTION The object of the present invention is to provide an audiovisual display that has the ability to compensate for various defect defects, and that has a simple circuit configuration. The advantages, objects and features of the present invention will be partially explained in the following descriptions, and other gammas, objects and features of the present invention can be used by the present invention as follows: Obviously (4) understand the land or can be derived from the actual _ real shot. The objects and other advantages of the present invention can be realized and obtained by the combination of the ageing book of the present invention and the application of the full-time financial (Japanese) (10) structural brigade. It is to be understood that the above-mentioned general description of the present invention and the detailed description of the above-mentioned 8 200901155 (4) are both financial statements and are intended to further disclose the scope of the patent application of the present invention. [Embodiment] Hereinafter, the present embodiment will be described in detail. The liquid crystal display device having the ability to compensate for display defects is a representative embodiment of the present invention, which is formed by the reference numeral __like component 0 / 1 shown in the drawings. The liquid crystal display device shown in the "figure map" includes a data compensation circuit 105 and a timing controller 104. The liquid crystal display device further includes a data driving port driver 102 whose function is to drive the liquid crystal panel 1〇3. The data compensation circuit can be implemented together with the timing controller in the form of a semiconductor wafer. The bead compensation circuit 1〇5 receives the data input, Ge and Be of the external input of the liquid crystal display I, and receives a plurality of synchronization signals Vsync, foot sink, and WLK. The beaker circuit 105 stores information for a typical defect area in the memory, such as a regular horizontal line or a rule_line, including bit (four) information, gray level information, and compensation data for a typical defect area. Record the information of the __ storage defect area, including the compensation information of the location, the grayscale, and the defect area. The data "substituted above the typical defect area" is compensated by the information 'data compensation circuit 1' for the typical missing area and the compensated data is output. The material compensation circuit (10) performs data compensation 200901155 (first-compensation) under the condition that the typical defect area is divided into the main area and the boundary area. Thereafter, under the condition that the compensation data in the typical defect area is spatially and temporally dispersed according to the frame rate control (frame rate co coffee 1; FRC) method, the data compensation circuit 1 () 5 finely compensates the typical use of the surface data. Information on the defective area (second compensation). The data compensation circuit 1〇5 also uses the information of the defect compensation area of the point defect area and outputs the compensated data (third compensation). Then, the data compensation circuit 105 supplies the compensated data together with the synchronization signals Vsync, Hsync, DE and DCLK to the implementation controller, wherein the compensated data is the data Re, Ge and Be. The data compensation secret 1 () 5 also supplies the data to be displayed on the normal area to the timing controller, without compensating for this (4). The detailed configuration of the data compensation circuit 105 will be described later. The sequence controller 1〇4 arranges the data Rc, & and Be' input by the data compensation circuit 1〇5 and outputs the result data to the data driver ι〇ι. Using the synchronization signals vSync, Hsync, DE^DCLK, the timing controller 1〇4 generates a data control signal υ DDC to control the driving timing of the data driver 1〇1 and the inter-polar control signal to drive the gate driver 1〇2 Timing. New, the timing controller tears the output of the lean control signal DDC and the gate control signal GDC. In response to the data control signal DDC from the timing controller 1〇4, the data driver 1〇1 uses the gamma voltage conversion to receive the digital data from the timing controller 1〇4, that is, the data Rc Gc and Be are analog data. The data driver and the 1〇1 output analog data are connected to the data line of the liquid crystal panel 103. In response to the gate control signal from the timing controller 1〇4, the GDC gate driver 1〇2 sequentially drives the edge line of the liquid crystal panel. 10 200901155 The liquid crystal panel 103 displays an image through a pixel matrix in which a plurality of pixels are arranged on the pixel matrix. Using a combination of red, green and blue sub-alligens, the light transmittance is adjusted according to the arrangement of the data signals through the arrangement of the liquid crystals, and each of the alizarins exhibits a desired color. Each sub-pixel contains a thin film transistor (thinfllmtransist〇r; TFT), and the thin film transistor is combined with a gate line 17 and a data line π. Each sub-element also includes a liquid crystal capacitor Ck and a storage capacitor (5) that is coupled to the shaft transistor in parallel. The liquid crystal capacitor ac is charged by using a differential voltage between the data signal supplied to the halogen electrode through the thin film transistor and the common electric S Vcom supplied to the common electrode to drive the liquid crystal according to the charging voltage, thereby adjusting the light transmittance of the sub-element rate. The liquid crystal panel 103 may include a typical defect area of a horizontal or vertical line shape and a point defect area 'defect area' showing the data compensated by the data compensation circuit 1() 5 due to the manufacturing process used. As a result, the difference in luminance between the normal area and the defective area can be avoided, and thus the display quality can be enhanced. At the same time, the information of the typical defect area and the information of the point defect area which were originally stored in the memory of the data compensation circuit 105 in advance should be set as follows. Display defects can be classified into typical defects and point defects, where typical defects are usually displayed regularly in the form of horizontal lines or vertical lines, mainly caused by deviations in exposure amount, which are usually not caused by the intervention of inclusions. Displayed regularly. In video and audio display devices, such typical defects and point defects are detected in the inspection program. Then, σ also detects the compensation data of the typical defect and the compensation data of the detected defect. The set compensation data is stored in the memory of the data compensation circuit 105. 11 200901155 In the brightness check program of the AV display device, when a typical defect in the form of a horizontal line or a vertical line is detected, each boundary area is set according to the type of the typical defect detected and the pollution distribution range of the typical defect area. The i degree of each subdivision boundary area and the location information of the parent boundary area. Further, the degree of contamination of the typical defect area is measured as 'g卩' the luminance difference or color difference between the normal area and the defective area. Thereafter, the compensation data is set to compensate for the measured luminance difference and color difference. For example, the ruled vertical line defect area shown in the "2nd picture" in the inspection program or the regular horizontal line defect area shown in "Fig. 3" can be detected as a typical defect of the display device. As shown in Fig. 4, each vertical line defect area can be divided into a main area C1 and a boundary area SG1 and SG2, wherein the main area C1 extends in the vertical direction while displaying fixed brightness, and the boundary areas SG1 and SG2 are symmetrically arranged. The gradually varying brightness is simultaneously exhibited at the opposite sides of the main area C1. As shown in Fig. 5, the 'parent-horizontal line defect area can be divided into a main area and boundary areas SQ1 and SG2, wherein the main area C1 extends in the horizontal direction while displaying a fixed brightness, and the boundary areas SG1 and SG2 are symmetrically arranged in the main The opposite sides of the area C1 simultaneously exhibit a gradual change in brightness. Each of the boundary regions SG1 and SG2 of each defective region corresponds to a region where the luminance of the main region C1 overlaps with the luminance of the normal region adjacent to the defective region. Each of the boundary regions SG1 and SG2 may be divided into a plurality of boundary regions such that the boundary region of the boundary region SG1 or SG2 is symmetrical with respect to the boundary region of the other boundary region sg2 or SG1. When each of the boundary regions SG1 and SG2 is close to the main region C1, each of the boundary regions SG1 and SG2 displays a brightness gradually approaching the luminance of the main region C1, and when the 12 200901155 per-boundary regions SG1 and SG2 are close to the normal region, the display gradually approaches the normal region. The brightness of the brightness. The position of the main area α is set according to the start position of the main area ci and the width of the main area C1. The other aspect 'automatically sets the positional information of the boundary areas SG1 and SG2 in accordance with the position information of the main area C1, the number of subdivision boundary areas included in each of the boundary areas SG1 and SG2, and the width of each subdivision boundary area'. According to the width of the main area C1 and the size of the main area C1, the size of the compensation data, the number of subdivision boundary areas included in each of the boundary areas SCH and SG2 and the width of each subdivision boundary area may be deviated from the provisions of the dither pattern. Fan_ is adjusted to allocate compensation data spatially and temporally. The compensation data a! of the main area C1 of the typical defect area is set to compensate for the luminance difference between the main area C1 and the normal area. The compensation data of the boundary regions of each symmetric arrangement and SG2, that is, the compensation data fragments bl to ei, are automatically set to be gradually reduced in the order of bi, ci, mountain and el. Meanwhile, as shown in "Fig. 6," the liquid crystal display device exhibits a non-gamma voltage characteristic in different gray scale ranges A", =, and D. Therefore, each of the compensated data segments μ of the typical defective regions is set to have different compensation values in accordance with different grayscale regions A, B, c and d which exhibit different gamma. In addition, the compensation data segments ^ to el of the typical defect area can be set according to the position of the defect area to have the same compensation value. Therefore, the information of the typical defects detected in the inspection program, that is, the position information of the detected parallel type defects, the position of the typical defect is optimized for each gray scale range, and the gray scale is indicated. The grayscale range information of the range is stored in the memory. In the inspection program, the operation of the checkpoint defect area is also performed. For the detected point defect area, the position information and the best compensation data are set. The set position information and compensation data are stored in the memory. That is to say, the compensation data of the point _ field is optimized for each gray scale range according to the degree of display defect of the point defect area, and the method used is the same as the compensation method of the optimized vertical or horizontal line defect area used above. Weaving, the compensation that is optimized (4) is stored in the memory. The information used to represent the grayscales is also stored in the memory of the (4) device. For example, in the 'k check & sequence, when it is detected that there is a lack of van Gogh defect gf due to the inclusion of inclusions, the repair operation is performed by recording the defective element from the phase line towel. Lai is a dark scorpion 1G, and the _ lin pattern 12 chain sucrose 10 to the adjacent sputum 1 〇 normal 昼 n n, as shown in Figure 7. In this example, the point defect can be displayed by the streptozoin 13, wherein the bond pixel 13 contains the normal halogen u and the dark pixel 1 () which are linked. The data supplied to the normal 昼素11 must even be assigned to the scorpion scorpion (1) which is normal 昼 u 以 ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( ( The data filling amount of 'normal vegan 11 is reduced. In order to compensate for the _ defect caused by the reduction of the filling amount of this data, the true difference or color of the normal 昼素 and _录13, that is, the difference between the point _ field and the positive f area, or the color difference value . Thereafter, compensation data capable of compensating for the measured luminance difference value or color difference value is set. According to the position of the point defect, the compensation data of the point defect area is also optimized for each of the 14 200901155 gray scale ranges. The optimization compensation (10) position information and gray scale range information of the defect are stored in the memory. The "Fig. 8" is a data compensation circuit for the liquid crystal display device of the present invention (4). For example, "8th picture, thousand, sb. _, 士, 冰乐α" is not included in the circuit. The memory 1〇5 contains: memory 4〇, used to store typical defect information and point defect information; % compensator, for the typical lack of storage of the memory
Re、Ge和Be,並且輸出資料㈣、Gml和Bmi作為被補償資料; 第二補償器16G ’藉由框速率控制顫動方法,透過在空間和時間上 分配Rm卜Gml和Bm卜驗精細地補償從第—補償器%輸出 的資料Rm卜Gml和Bml ;以及,第三補償器17(),使用記憶體 40中儲存的點缺陷資訊補償點缺陷區域之資料。第三補償器17〇 柄合於第二補償H 16〇。對於正常區域的㈣,㈣補償電路1〇5 輸出資料,而無須任何資料補償。 如上所述,記憶體40儲存具有垂直線缺陷和/或水平線缺陷 等缺陷之典型缺陷區域之典型缺陷資訊,典型缺陷資訊包含位置 資訊PD卜灰階範圍資訊GDI以及補償資訊CD卜每一典型缺陷 區域之位置資訊PD 1包含缺陷區域之開始位置資訊以及結束位置 資δίΐ ’分別由晝素的對應號碼表示。例如,每一典型缺陷區域之 位置資訊PD1包含晝素號碼,分別表示典型缺陷區域中包含的每 一主區域和典型缺陷區域中包含的每一邊界區域之細分區域之開 始位置資訊和結束位置資訊。補償資料CD1用於補償缺陷區域和 200901155 正常區域之間的亮度差值或色彩差值。依照對應的灰階範圍和對 應缺陷區域之位置,補償資料CD1在分類之後被儲存。每一典型 缺陷區域之補償資料CD1包含補償值,此補償值分別針對典型缺 陷區域之主區域以及典型缺陷區域之每一邊界區域之細分區而被 最it化灰階範圍資訊GDI包含依照伽馬特性而劃分的複數個灰 階範圍貧訊。記憶體4〇還儲存點缺陷資訊,點缺陷資訊包含點缺 陷區域之位置資訊PD2、灰階範圍f訊⑽以及補償資料㈣。 資料補償電路1〇5更包含位元擴張器⑽expander) 2〇,用 於擴張從液晶顯示裝置之外部接收的輸人倾R、G和B之位元, 並且供應被舰位元之資料至第—補償器3G。例如,位元擴張器Re, Ge, and Be, and output data (4), Gml, and Bmi as compensated data; second compensator 16G' is finely compensated by spatially and temporally distributing Rm Bu Gml and Bm by frame rate control flutter method The data Rm Bu Gml and Bml output from the first compensator %; and the third compensator 17 () compensate the data of the point defect area using the point defect information stored in the memory 40. The third compensator 17 is coupled to the second compensation H 16 。. For the normal area (4), (4) the compensation circuit 1〇5 outputs the data without any data compensation. As described above, the memory 40 stores typical defect information of a typical defect area having defects such as vertical line defects and/or horizontal line defects, and typical defect information includes position information PD, gray scale range information GDI, and compensation information CD. The location information PD 1 of the area includes the start position information of the defect area and the end position δ ΐ ΐ ' respectively represented by the corresponding number of the element. For example, the location information PD1 of each typical defect area includes a pixel number, which respectively indicates the start position information and the end position information of the subdivision area of each of the main area included in the typical defect area and each boundary area included in the typical defect area. . The compensation data CD1 is used to compensate for the luminance difference or color difference between the defective area and the normal area of 200901155. The compensation data CD1 is stored after classification according to the corresponding gray scale range and the position of the corresponding defect area. The compensation data CD1 of each typical defect area includes a compensation value, which is respectively included in the main area of the typical defect area and the subdivision area of each boundary area of the typical defect area, and is included in the gamma according to the most normal gray scale range information GDI. The plurality of grayscale ranges of the characteristics are divided. Memory 4〇 also stores point defect information. The point defect information includes location information PD2 of the defect area, grayscale range f (10), and compensation data (4). The data compensation circuit 1〇5 further includes a bit expander (10) expander 2〇 for expanding the bits of the input R, G, and B received from the outside of the liquid crystal display device, and supplying the information of the ship position to the first - Compensator 3G. For example, a bit expander
第-補償ϋ 3〇伽記憶體4〇中儲存的典型缺陷資訊细 GDI和CD1補償輸入資料Re、 、Ge和Be’並且輸出被補償之資料,First-compensation ϋ 3 typical defect information stored in 〇 记忆 memory 4〇 GDI and CD1 compensate input data Re, Ge, and Be’ and output the compensated data,
〜穴王哪阳险埤之資料或者從典型缺陷~ The point of the king of the sun is dangerous or from typical defects
負科’無須進行任何資料補償。 透過在空間和時間上分配資料 16 200901155The negative department does not need to make any data compensation. By distributing data in space and time 16 200901155
Rml、Gml和Bm卜第二補償器16〇精細地補償第一補償器兕 輸出之被補償資料RnU、Gml和Bml。當典型缺陷區域中每一邊 界區域之補償資料依照框速率控制顫動方法在空間和時間上被分 配時,邊界區域之亮度差值精細地被補償。例如,第二補償器16〇 使用顫動圖案在空間和時間上分配第—補償器3Q輸出之資料 RnU、Gml和Bml之被供應低序位位元部之補償資料。結果,典 型缺陷區域和正常區域之_亮度隸可精細地被補償。 第二補償器no使用記憶體4〇中儲存的點缺陷資訊PD2、 GD2和CD2補償資料㈣、Gm2和Bm2,其中資料触、㈤ 和Bm2將被顯示於點缺陷區域之上。對於正常區域之資料,第三 補偵器170則輸出資料,無須任何資料補償。 「第9圖」所示係為「第8圖」所示之第-補償器30和記憶 體40之示意圖。如「第9圖」所示,第一補償器3〇包含垂直線 補償器70和水平線補償器8〇,這樣第一補償器%可被應用至具 有垂直線顯示缺陷之顯示裝践具有水平_示缺陷之顯示裂 置,與顯示缺陷之類型無關。第一補償器3〇還包含多工器 (multiplexer ; MUX) 9〇 ’用於依照偵測的典型缺陷係為垂直線 缺陷或水平線缺陷轉猶麟猶H ?Q讀岐水平線補償器 80之輸出。 記憶體40包含第-記憶體42V,耦合於垂直線補償器7〇且 儲存垂直線缺陷資訊;以及第二記憶體42H,輕合於水平線補償 17 200901155 器80且儲存水平線缺陷資訊。第一記憶體42V包含:電可抹寫程 式化唯讀記憶體(eiectricauy-erasable piOgrammable read Qnly rThe second compensator 16 of Rml, Gml, and Bm finely compensates the compensated data RnU, Gml, and Bml output by the first compensator 。. When the compensation data for each of the boundary regions in the typical defect region is spatially and temporally allocated according to the frame rate control flutter method, the luminance difference value of the boundary region is finely compensated. For example, the second compensator 16 分配 spatially and temporally distributes the compensation data of the data RnU, Gml, and Bml supplied from the first compensator 3Q to the low-order bit portion using the dither pattern. As a result, the brightness of the typical defect area and the normal area can be finely compensated. The second compensator no compensates the data (4), Gm2, and Bm2 using the point defect information PD2, GD2, and CD2 stored in the memory 4, wherein the data touch, (5), and Bm2 will be displayed above the point defect area. For the data in the normal area, the third responder 170 outputs the data without any data compensation. The "Fig. 9" is a schematic diagram of the first compensator 30 and the memory 40 shown in Fig. 8. As shown in Fig. 9, the first compensator 3〇 includes a vertical line compensator 70 and a horizontal line compensator 8〇, so that the first compensator % can be applied to a display with a vertical line display defect to have a level _ The display of the defect is displayed regardless of the type of defect displayed. The first compensator 3〇 also includes a multiplexer (MUX) 9〇' for the typical defect detected according to the vertical line defect or the horizontal line defect. The output of the horizontal line compensator 80 is read. . The memory 40 includes a first memory 42V coupled to the vertical line compensator 7 and storing vertical line defect information; and a second memory 42H that is lightly coupled to the horizontal line compensation and stores horizontal line defect information. The first memory 42V includes: an electrically rewritable read-only memory (eiectricauy-erasable piOgrammable read Qnly r
C memory ; EEPR0M) 44V,用於儲存位置資訊pmv、灰階範圍 資訊GD1V以及垂直線缺陷區域之補償資料CD1V ;以及,暫存 益偷,用於臨時地儲存電可抹寫程式化唯讀記憶體術中健存 的資料pmv、⑽v和CD1V,並且供應臨時儲存的資料至垂直 線補償器7G。第二記憶體42H包含電可抹寫程式化唯讀記憶體 44H ’用於儲存水平線缺陷區域之位置f訊阳出、灰階範圍資訊 GD1H以及補償資料CD1H ;以及,暫存器姻,用於臨時地儲存 電可抹寫程式化唯讀記‘随備巾儲存的㈣pDm、GmH和 CD1H,並且供麟時齡的資料至水平線補償器⑽。兩個電可 抹寫程式化唯讀記憶體44V和44H可由單_可抹寫程式化唯讀 記憶體實現。此外’兩個暫存器暫存器術和備也可由單個暫 存器實現。在電可抹寫程式化唯讀記随術和權的位置,還 可使用擴展式顯示識別資料唯讀記憶體(她编出咖 如編㈣data刪;EDI则M),用於儲存例如顯示褒置之 解析度等朗資訊。此實财,部分驗式顯示識师料唯讀記 憶體可適當地被分配f可抹寫程式化唯讀記健之魏。電可抹 寫程式化唯讀記㈣術和44H之—射在雜定恤處儲存控 制資訊CS。控制資訊cs包含:典型缺陷方向資訊,用於表示业 型缺陷區域之缺陷類型係為垂直線缺陷或水平線缺陷;典型缺陷 18 200901155 樹貝而求/無需求魏’用於表示是否存在典型缺陷區域,從而 表不是否需要典型缺陷區域之補償;以及,點缺陷補償需求/無 需求資訊’驗表示是否需要點缺_域之補償。例如,為控制 資訊CS分_-條元組巾,3位元:#料之各位元可表示三段資 訊。同時,時序控制器刚中包含的三個選擇插腳值可設定控制 資訊CS,資料補償電路1〇5在其中被組合。 為了補償待顯示於垂直線缺陷區域之上的輸入資料Re、Ge 和Be ’垂直線補償器70包含灰階判定器72、位置判定器74、補 償資料選擇器76以及計算器78。 灰階判定器72分析輸入資料Re、Ge和Be各自的灰階等級, 根據分析的灰階等級,從第一記憶體42V中讀取的灰階範圍資訊 GD1V中選擇輸入資料Re、Ge和Be之對應灰階範圍資訊,並且 輸出選擇的灰階範圍資訊至補償資料選擇器76。例如,灰階範圍 資訊GD1V可包含三個灰階範圍資訊段,依照伽馬特性分別對應 由256灰階範圍劃分的三個灰階範圍,例如,第一灰階範圍從% 到70 ’第二灰階範圍從71到150 ’第三灰階範圍從151到250。 灰階判定器72從三個灰階範圍資訊段中選擇包含輸入資料Re、 Ge和Be之灰階等級之灰階範圍資訊,並且輸出選擇的灰階範圍 資訊。 使用垂直同步訊號Vsync、水平同步訊號Hsync、資料賦能訊 號DE以及點時鐘DCLK至少其一,位置判定器74判定輸入資料 19 200901155C memory ; EEPR0M) 44V, used to store location information pmv, grayscale range information GD1V and vertical line defect area compensation data CD1V; and, temporary storage, for temporary storage of electrically rewritable stylized read-only memory The data pmv, (10)v, and CD1V are stored in the body, and the temporarily stored data is supplied to the vertical line compensator 7G. The second memory 42H includes an electrically rewritable stylized read-only memory 44H' for storing the position of the horizontal line defect area, the signal yang, the gray level range information GD1H, and the compensation data CD1H; Temporary storage of rewritable stylized readings (4) pDm, GmH and CD1H stored with the preparation of the towel, and data for the Lin time to the horizontal line compensator (10). Two electrically rewritable stylized read-only memory 44V and 44H can be implemented by a single rewritable stylized read-only memory. In addition, the two scratchpad registers and devices can also be implemented by a single register. In the position of the rewritable stylized reading and the right, you can also use the extended display to identify the data read-only memory (she compiled the coffee (4) data deleted; EDI is M), for storage, for example, display 褒Set the resolution and other information. This kind of real money, part of the test shows that the teacher can only read the memory can be properly assigned f can be transcribed stylized only reading Jian Wei. The electric rewritable stylized only reading (4) and 44H - shooting in the miscellaneous tents store control information CS. The control information cs includes: typical defect direction information, which is used to indicate that the defect type of the industry defect area is a vertical line defect or a horizontal line defect; the typical defect 18 200901155 is used to indicate whether there is a typical defect area. Therefore, whether or not the compensation of the typical defect area is required; and, the point defect compensation requirement/no-demand information, indicates whether the compensation of the missing field is required. For example, in order to control the information CS, the _-strip group towel, the 3-digit: # material element can represent three pieces of information. At the same time, the three selection pin values included in the timing controller can set the control information CS in which the data compensation circuits 1〇5 are combined. In order to compensate for the input data Re, Ge and Be' to be displayed above the vertical line defect area, the vertical line compensator 70 includes a gray scale determiner 72, a position determiner 74, a compensation data selector 76, and a calculator 78. The gray scale determiner 72 analyzes the gray scale levels of the input data Re, Ge, and Be, and selects the input data Re, Ge, and Be from the gray scale range information GD1V read from the first memory 42V according to the analyzed gray scale level. Corresponding to the gray scale range information, and outputting the selected gray scale range information to the compensation data selector 76. For example, the grayscale range information GD1V may include three grayscale range information segments corresponding to three grayscale ranges divided by 256 grayscale ranges according to gamma characteristics, for example, the first grayscale range is from % to 70' second. Gray scales range from 71 to 150 'The third gray scale ranges from 151 to 250. The gray scale determiner 72 selects gray scale range information including the gray scale levels of the input data Re, Ge, and Be from the three gray scale range information segments, and outputs the selected gray scale range information. Using at least one of the vertical sync signal Vsync, the horizontal sync signal Hsync, the data enable signal DE, and the dot clock DCLK, the position determiner 74 determines the input data 19 200901155
Re、Ge和Be在水平方向之晝素位置。例如,位置判定器%判定 輸入身料Re、Ge和Be之水平晝素位置,㈤時在資料賦能訊號 DE的賦能週期内計數點時鐘DCLK之脈衝。然後,位置判定器 74比較輸人龍Re、Ge和①之舦斜晝素位置無第一記憶 體42V中讀取的垂直線缺陷區域位置資訊pDiv,以制缺陷區 域疋否為垂直線缺陷區域。當細m域被伽彳為垂直線缺陷區域 時,位置判定器74從位置資訊PD1V中選擇缺陷區域之對應位置 =貝戒,並且輸出選擇的位置資訊至補償資料選擇器76。 補償貧料選擇器76從第一記憶體俗中讀取的補償資料 CD1V中選擇每—輸人資料Re、&和取之對應補償資料,以回 應灰判U 72選擇的灰階翻資訊和位置判定器%選擇的位 置資訊。換言之,補償資料選擇器76從依照灰階判定器Μ之灰 階範圍資訊㈣擇之對應灰階細巾,選擇位制定H 74之位置 貧訊對應之補償倾,並且輸出選擇賴償㈣。當位置資訊表 不垂直線缺陷區域之主區域時,用闕償主區域之補償資料被選 擇且輪出。另一方面,當位置資訊表示垂直線缺陷區域之邊界區 域之細分區時’祕補償細分區之補償資料被選擇且輸出。 透過對每-輪入資料Re、Ge和Be增加或減少補償資料選擇 器76中輸出的關聯補償資料,計算器%補償待顯示於垂直線缺 區域之上的輸入資料Re、Ge和此,並且輸出被補償資料。例 士透過對11位元輸入資料Re、Ge和Be增加或減少補償資料 20 200901155 、擇°° 76中輪出的對應8位元補償資料,計算器78補償每一輪 入貝料Re γ Ge和Be ’並且輸出被補償資料。 為了補償待顯示於水平線缺陷區域之上的輸入資料Re、Ge 和如,水平線補償器包含灰階判定器82、位置判定器84 償資料選擇器86以及計算器88。 灰階判定器82分析輸入資料Re、Ge和Be各自的灰階等級, 根據分析的灰’級,從第二記憶體樹中讀取的灰階範圍資訊 GD1H中選擇輸入資料Re、&和&之對應灰階範圍資訊,並且 輸出選擇的灰階範圍資訊至補償資料選擇器86。 使用垂直同步訊號Vsync、水平同步訊號出卿、資料賦能訊 號DE以及點時鐘DCLK至少其一,位置判定器84判定輸入資料 Re Ge和Be在垂直方向之晝素位置。例如,位置判定器料判定 輸入資料Re、Ge和Be之垂直晝素位置,同時計數垂直同步訊號 Vsync和資料賦能訊號DE均被賦能之週期内之水平同步訊號 Hsync之脈衝。然後,位置判定器84比較輪入資料Re、以和说 之判定垂直晝素位置與從第二記紐4211巾讀取的水平線缺陷區 域位置資訊PD1H,以偵測缺陷區域是否為水平線缺陷區域。當偵 測區域被偵測為水平線缺陷區域時,位置判定器84從位置資訊 PD1H中選擇缺陷區域之對應位置資訊,並且輸出選擇的位置資訊 至補償資料選擇器86。 補償資料選擇器86從第二記憶體42H中讀取的補償資料 21 200901155 CD1H中選擇每—輸人資 岸灰_、 ⑶和Be之對應補償資料,以回 應灰82選擇的灰階範圍資訊和位 置資訊。⑽祕响__询稱, 主區域之補償·被選擇且輪出。另―方面,當位㈣絲干= ==邊崎細分區時,用於補償細分區之補償資 哭86透ΓΓ輸入㈣Re、G^Be增加或減少補償資料選擇 =斤輪出權_料,補償細示於水平線缺 祕紅城輸人㈣Re、Ge和Be,並且輸出被補償資料。 夕工器9〇選擇垂直線補償器%之輸出資料或水平線補償器 肋曰之輸出資料,以回應控制資訊cs中包含的典型缺陷方向資訊。 就是說’當典型缺财向魏表雜錄缺陷時n %選擇 =輸出垂直線補償器70之輸出資料。另—方面,當典型缺陷方 向資訊表示水平線缺陷時H 9G選擇性地輸出水平線補償器 80之輸出資料。 因此’第-補该器30補償具有例如垂直線缺陷或水平線缺陷 之典型缺陷區域之輸人資料Re、Ge和Be,以回應控制資訊cs, 並且輸出被補償資料。 「第10圖」所示係為「第8圖」所示之第二補償器160。如 「第10圖」所示’第二補償器16〇包含框判定器162、晝素位置 判定器164、顫動值選擇器166以及加法器168。 22 200901155 框判定器162計數從第一補償器3〇供應之複數個同步訊號即 同步訊號Vsync、Hsync、DE和DCLK中選擇的垂直同步訊號 Vsync之脈衝,以偵測框數目。框判定器162輸出表示_之框數 - 之資訊至顫動值選擇器166。 、 使用同步訊號Vsync、Hsync、DE和DCLK至少其一,查素 位置判定器164偵測輸入資料Rru、Gml和Bml之晝素位置。 ^ 例如,晝素位置判定器164判定輸入資料Rm〗、Gml和Bml之 水平畫素位置,同時計數資料賦能訊號〇£之賦能週期中的點時鐘 DCLK之脈衝,並且判定輸入資料^卜Gml和Bml之垂直書 素位置’同時計數垂直同步訊號Vsync和資料賦能訊號DE均被 賦能之週期中水平同步訊號Hsync之脈衝。晝素位置判定器164 輸出表示被偵測晝素位置之資訊至顫動值選擇器166。 使用第一補償器30中應用的補償資料,即第一補償器3〇之 「 輸出資料Rml、Gml和Bml之各低序位位元之對應灰階等級、 框判定器162輸出之框數目資訊以及晝素位置判定器164輸出之 晝素位置資訊’顫動值選擇器166從複數個顫動圖案中選擇所需 ' 的顫動值Dr、Dg和Db。 - 顫動值選擇器166包含由設計者事先儲存在顫動值選擇器 166中的複數個顫動圖案。例如,如「第11A圖」、「第11B圖」、 「第11C圖」和「第11D圖」所示,顫動值選擇器166儲存各自 包含矩陣大小為8x32的複數個顫動圖案。依照0、1/8、2/8、3/8、 23 200901155 4/8、5/8、6/8、7/8和!的灰階等級,顫動圖案分顺排列以包含 數目逐漸增加的具有“1,,(黑色)顫動值之畫素(灰階等級為i的 顫動圖案未被表不)。顫動圖案以查表的形式被儲存。每一顧動圖 -案之每一畫素具有“1’’(黑色)4“0”(白色)的顏動值。依照具有 ' “1”顫動值之晝素數目,每—顫動圖案之灰階等級被狀。對於每 -灰階等級’儲存複數個顫動圖f,其巾顫動圖案對於不同框之 「具有1鑛值之晝素位置而不同。即,贿複數個顫動圖案,其 r 帽_魏據具有“丨” _值之晝素之位置分麟於複數個不 同的框FRAMm至FRAME8。換言之,顫動值選擇器166為每一 灰階等級和每-框儲存複數個不同的顫動圖案。顫動圖案的尺寸 和每-顫動圖案中具有“ i,,顫動值之畫素之位置可依照設計者的 需求而改變。因為第一補償器%中應用至典型缺陷區域之補償資 料使用上述顫動圖案在空間和時間上被分佈,所以可能精細地補 償典型缺陷區域之亮度差值。 第一補償器3〇輸出之每一資料㈣、Gml和Bmi包含” 位70韻動值選擇器166使用每一⑴立元資料中的低序位之3位 元k擇顧動值,並且輸出剩餘的8位元至力口法器_。此實例 «中’ 3 H觸為補健料在第-麵器%帽供應之資料 4。對應正常區域之3位元資料部被設定為“_”。脑值選擇 器166從第11A圖」、「第11B圖」、「第11C圖」和「第iid圖」 所示之顫細針選擇—個顫_案,此顫_案對應每-輸入 24 200901155 資;斗 Gml和Bml之低序位3位元所表示的灰階等級以及 框判定器!62輸出之框數目資訊。織,使用來自晝素位置判定 器164之晝素位置資訊,顫動值選擇器166從選擇的顏動圖案中 選擇1位元顫動值Dr、Dg和Db,此i位元顫動值以、呢和加 對應輸入資料Rm卜Gml和Bml之各晝素位置。顏動值選擇器 166輸出選擇的顫動值Dr、Dg*Db至加法器⑽。 加法器168增加顫動值選擇器166選擇的每一顫動值Dr、Dg 或Db至對應資料㈣、㈤和Bml之高序位8位元,低序位3 位元從中被分離。織,加法器⑽輸出結果龍作為賴_、Reciprocal positions of Re, Ge, and Be in the horizontal direction. For example, the position determiner % determines the horizontal pixel position of the input materials Re, Ge, and Be, and (5) counts the pulse of the dot clock DCLK during the energizing period of the data enable signal DE. Then, the position determiner 74 compares the vertical line defect area position information pDiv read in the first memory 42V at the position of the input element of the input dragon Re, Ge, and 1 to determine whether the defect area is a vertical line defect area. . When the fine m field is gamma-delimited to the vertical line defect area, the position determiner 74 selects the corresponding position of the defective area from the position information PD1V = 贝, and outputs the selected position information to the compensation material selector 76. The compensation poor material selector 76 selects each of the input data Re, & and the corresponding compensation data from the compensation data CD1V read from the first memory voxel, in response to the grayscale information selected by the gray judgment U 72 and Location information selected by the position determiner %. In other words, the compensation data selector 76 selects the corresponding gray scale fines according to the gray scale range information (4) of the gray scale determiner, selects the position to formulate the compensation tilt corresponding to the position of the H 74, and outputs the selection compensation (4). When the location information table is not the main area of the vertical line defect area, the compensation data for the compensation main area is selected and rotated. On the other hand, when the position information indicates the subdivision area of the boundary area of the vertical line defect area, the compensation data of the secret compensation subdivision area is selected and output. By increasing or decreasing the associated compensation data outputted in the compensation data selector 76 for each of the wheeled data Re, Ge, and Be, the calculator % compensates the input data Re, Ge, and the to be displayed above the vertical line missing area, and Output compensated data. The lawyer adds or reduces the compensation data 20 200901155 to the 11-bit input data Re, Ge and Be, and selects the corresponding 8-bit compensation data in the ° ° 76. The calculator 78 compensates each round of the feed material Re γ Ge and Be 'and output the compensated data. In order to compensate for the input data Re, Ge and, for example, to be displayed above the horizontal line defect area, the horizontal line compensator includes a gray scale determiner 82, a position determiner 84 compensation data selector 86, and a calculator 88. The gray scale determiner 82 analyzes the gray scale levels of the input data Re, Ge, and Be, and selects the input data Re, & and the gray scale range information GD1H read from the second memory tree according to the gray level of the analysis. Corresponding gray scale range information of & and outputting the selected gray scale range information to the compensation data selector 86. Using at least one of the vertical sync signal Vsync, the horizontal sync signal, the data enable signal DE, and the dot clock DCLK, the position determiner 84 determines the pixel position of the input data Re Ge and Be in the vertical direction. For example, the position determiner determines the vertical pixel position of the input data Re, Ge, and Be, and simultaneously counts the pulse of the horizontal sync signal Hsync in the period in which the vertical sync signal Vsync and the data enable signal DE are energized. Then, the position determiner 84 compares the rounded data Re, and the determined vertical pixel position with the horizontal line defect area position information PD1H read from the second note 4211 to detect whether the defective area is a horizontal line defective area. When the detection area is detected as the horizontal line defect area, the position determiner 84 selects the corresponding position information of the defective area from the position information PD1H, and outputs the selected position information to the compensation material selector 86. The compensation data selector 86 selects the compensation data for each of the input ash _, (3) and Be from the compensation data 21 200901155 CD1H read from the second memory 42H to respond to the gray scale range information selected by the gray 82 and Location information. (10) Secret __ Inquire, the compensation of the main area is selected and turned out. On the other hand, when the position (four) silk is dry = == Bianqi subdivision area, the compensation for the compensation of the subdivision area is cautious. 86 input (4) Re, G^Be increase or decrease the compensation data selection = kg round out right _ material, The compensation is shown in the horizontal line, the missing red city loses (4) Re, Ge and Be, and outputs the compensated data. The 9th 夕 器 〇 selects the output data of the vertical line compensator or the output data of the horizontal line compensator ribs in response to the typical defect direction information contained in the control information cs. That is to say, 'When the typical lack of money to the Wei table miscellaneous defect, n % select = output the output data of the vertical line compensator 70. On the other hand, H 9G selectively outputs the output data of the horizontal line compensator 80 when the typical defect direction information indicates a horizontal line defect. Therefore, the 'first complement' 30 compensates the input data Re, Ge, and Be having a typical defect area such as a vertical line defect or a horizontal line defect in response to the control information cs, and outputs the compensated material. The "10th figure" is the second compensator 160 shown in "Fig. 8". The "second compensator 16" shown in Fig. 10 includes a frame determiner 162, a pixel position determiner 164, a flutter value selector 166, and an adder 168. 22 200901155 The frame determiner 162 counts the pulses of the vertical sync signal Vsync selected from the plurality of sync signals supplied from the first compensator 3, that is, the sync signals Vsync, Hsync, DE, and DCLK, to detect the number of frames. The frame determiner 162 outputs information indicating the number of frames of _ to the jitter value selector 166. Using at least one of the synchronization signals Vsync, Hsync, DE, and DCLK, the parity position determiner 164 detects the pixel locations of the input data Rru, Gml, and Bml. ^ For example, the pixel position determiner 164 determines the horizontal pixel position of the input data Rm, Gml, and Bml, and simultaneously counts the pulse of the dot clock DCLK in the energizing period of the data enable signal, and determines the input data. The vertical pixel positions of Gml and Bml simultaneously count the pulses of the horizontal sync signal Hsync in the period in which the vertical sync signal Vsync and the data enable signal DE are both enabled. The pixel position determiner 164 outputs information indicating the position of the detected pixel to the jitter value selector 166. The compensation data applied in the first compensator 30, that is, the corresponding gray scale level of each low-order bit of the output data Rml, Gml, and Bml of the first compensator 3, and the number of frames output by the frame determiner 162 are used. And the pixel position information "jitter value selector 166 output from the pixel position determiner 164 selects the desired "shake values Dr, Dg, and Db from the plurality of wobbling patterns." - The jitter value selector 166 is stored in advance by the designer. A plurality of dither patterns in the dither value selector 166. For example, as shown in "11A", "11B", "11C", and "11D", the dither value selector 166 stores each of the dither patterns. A matrix of 8x32 has a plurality of dither patterns. According to 0, 1/8, 2/8, 3/8, 23 200901155 4/8, 5/8, 6/8, 7/8 and! The grayscale level, the dither pattern is arranged in a sequence to include a gradually increasing number of pixels having a "1, (black) jitter value (the dither pattern of the gray scale i is not shown). The dither pattern is checked. The form is stored. Each pixel of the map has a "1" (black) 4 "0" (white) color value. According to the number of elements having a '1' dither value, the gray level of each of the dither patterns is shaped. For each of the grayscale levels, a plurality of dither patterns f are stored, and the trembling pattern of the tweezers is different for the different positions of the nuclei having a mine value. That is, bribes a plurality of trembling patterns, and the r caps have The position of the 丨 _ value is divided into a plurality of different boxes FRAMm to FRAME 8. In other words, the tremor value selector 166 stores a plurality of different tremor patterns for each gray level and every frame. And the position of the pixel with the "i,, the jitter value in the per-vibration pattern can be changed according to the designer's needs. Since the compensation material applied to the typical defect area in the first compensator % is spatially and temporally distributed using the above-described dither pattern, it is possible to finely compensate the luminance difference value of the typical defect area. Each of the data (4), Gml, and Bmi of the first compensator 3〇 includes a bit 70 rhythm value selector 166 that uses the 3-bit k of the low-order bit in each (1) metadata to select a motion value, and outputs The remaining 8 bits to the force mouth device _. This example «中' 3 H touch is the material of the supplemental material in the first face % cap supply. 4. The 3-bit data part corresponding to the normal area is set to "_ The brain value selector 166 selects a vibrating needle from the 11A map, the 11B map, the 11C map, and the iid diagram, and the flutter corresponds to each case. Enter 24 200901155 capital; the gray level and the box determiner represented by the low order 3 bits of Gml and Bml! 62 output frame number information. Using the pixel position information from the pixel position determiner 164, the jitter value selector 166 selects the 1-bit jitter values Dr, Dg, and Db from the selected pattern, and the i-bit jitter values are Add the corresponding pixel positions of the input data Rm, Gml and Bml. The blink value selector 166 outputs the selected flutter values Dr, Dg*Db to the adder (10). The adder 168 increments each of the flutter values Dr, Dg, or Db selected by the flutter value selector 166 to the high order bits of the corresponding data (4), (5), and Bml, from which the low order bits are separated. Weave, adder (10) output results as a Lai _,
Gm2 和 Bm2 〇 口此第一補償器16〇使用桎速率控制顫動方法在空間上和 時間上分佈第—補償器30輸出的資料㈣、Gml和Bml之被補 償貧料部,以更加精細地補償典型缺祕域之亮度差值,從而防 止補償資料所引起的顯示品質之退化。 第12圖」所不係為「第8圖」所示之第三補償器之示 思圖。如「第12圖」所示,第三補償器17〇包含灰階判定器、 位置判疋器174、補償資料選擇器176以及計算器178。用於補償 點缺陷區域之每—點缺陷資訊取、GD2和CD2被儲存在第—和 苐一 §己憶體42V和42H其一中。 灰階判定器172分析待供應至點缺陷區域之鏈結畫素之輸入 貝料Rm2、Gm2和Bm2之各灰階等級,根據分析的灰階等級, 25 200901155 從第一和第二記憶體42V和42H其一中讀取的灰階範圍資訊gj)2 中選擇輸入資料Rm2、Gm2和Bm2之對應灰階範圍資訊,並且 輸出選擇的灰階範圍資訊至補償資料選擇器176。 使用外部系統輸入的垂直同步訊號Vsync、水平同步訊號Gm2 and Bm2 此 This first compensator 16 空间 spatially and temporally distributes the data (4), Gml and Bml compensated poor parts of the data output by the compensator 30 using the 桎 rate control flutter method to compensate more finely. The brightness difference of the typical missing domain prevents the degradation of display quality caused by the compensation data. Figure 12 is not intended to be a diagram of the third compensator shown in Figure 8. As shown in FIG. 12, the third compensator 17A includes a gray scale determiner, a position determiner 174, a compensation data selector 176, and a calculator 178. Each of the point defect information for compensating the point defect area, GD2 and CD2 is stored in one of the first and the first suffixes 42V and 42H. The gray scale determiner 172 analyzes the gray scale levels of the input shells Rm2, Gm2, and Bm2 of the link pixels to be supplied to the point defect area, according to the analyzed gray scale level, 25 200901155 from the first and second memory 42V And the corresponding gray scale range information of the input data Rm2, Gm2, and Bm2 is selected in the gray scale range information gj)2 read in one of the 42H, and the selected gray scale range information is output to the compensation data selector 176. Vertical sync signal Vsync, horizontal sync signal input by external system
Hsync、資料賦能訊號DE以及點時鐘DCLK至少其中之一,位置 判定器174判定輸入資料Rm2、Gm2和Bm2之晝素位置。例如, 位置判定器174判定輸入資料RnG、Gm2和Bm2之水平晝素位 置,同時計數資料賦能訊號DE之賦能週期中點時鐘!^!^之脈 衝,並且判定輸入資料Rn^、Gm2和Bm2之垂直晝素位置,同 時計數垂直同步訊號Vsync和資料賦能訊號DE均被賦能之週期 内水平同步§fl號Hsync之脈衝。然後,晝素位置判定器174比較 輸入賁料Rm2、Gm2和之欺晝餘置和從第—和第二記 fe體42V和42H其中之-讀取的點缺陷位置資訊pD2,以偵測出 此偵測區域是否為點缺陷區域。當_區域被偵測為點缺陷區域 % ’位置判定器174輸出用於表示判定晝素位置之資訊至補償資 料選擇器176。 ' 補償資料選擇n 176從第—記憶體42V和第二記憶體42h中 讀取的補償雜CD2中選縣—輸人賴_、如2和Bm2之 對應補償賴,以喃灰階判定器m選擇的灰階細資訊以及 位置列Ιϋ 174選擇的位置資訊。然後’補償資料選擇器μ輸 出選擇的補償資料。 26 200901155 计算器178 i曰加補償資料選擇器ι76所輸出的補償資料至輪 入貝料Rm2、Gm2 #口 Bm2,或者從輸入資料如2、Gm2和Bm2 中減去補償龍選擇H 176所輸出的補償㈣,並且輸出結果資 料。 因此’第二補償器17〇補償點缺陷區域之資料版2'〇尬和 Bm2 ’並且輸出被補償資料。 從以上描述顯而易見,本發明第一實施例之資料補償電路 中’典型缺陷區域之亮度差鶴透過選難麟補償B %和水平 線補償器80之輸出其—而被補償,垂直線補償器%和水平線補 償器80餘關聯典型缺财_賴㈣制分離的記憶體 俗和42H。本發明第一實施例之資料補償電路中,典型缺陷區 域之邊界區域之亮度差值係使用第二補償器⑽在空間上和時間 上分佈第-補H 3〇中被應用至典型缺陷區域之資料之補償資料 而精細地被補償。此外,點缺陷區域之亮度差值還可使用第三補 償器170被補償。 「第13圖」所示係為本發明第二實施例之液晶顯示裝置之資 料補償電路。如「第13圖」所示,資料麵電路包含:記憶體: 儲存典型缺陷資訊PD1、CD1和⑽以及點缺陷資訊pD2二⑽ 和GD2 ;第-補償器11〇,使用記憶體1〇〇中儲存的典型缺陷資 訊PD卜CD1和GDi補償典型缺陷區域之資料以、&和恥,並 且輸出資料Rml、Gml和Bml作為被補償資料;第二補償器副, 27 200901155 使用框速率控制顫動方法,透過在空間和時間上分配資料Rmi、 Gml和Bml而精細地補償第一補償器11〇所輸出的資料、 Gml和Bml ;以及,第三補償器170 ’使用記憶體1〇〇中儲存的 ' 點缺陷資訊PD2、CD2和GD2補償點缺陷區域之資料。 ' 「第13圖」所示之第一補償器11〇與「第9圖」所示之第一 補償器30不同,因為第一補償器110之垂直線補償器12〇和水平 線補償器140彼此共享一個記憶體1〇〇。 C ^ 因為顯示面板被劃分為產生垂直線缺陷之類型和產生水平線 缺陷之類型,依照曝光設備之掃描方向,使用對應兩種類型其一 之顯不面板之顯示裝置僅僅使用垂直線缺陷資訊和水平線缺陷資 訊其中之一。因此,依照本發明之實施例,垂直線缺陷資訊中使 用的參數和水平線缺陷資訊中使用的參數被統一,垂直線缺陷資 訊或水平線缺陷資訊針對垂直線缺陷資訊和水平線缺陷資訊均被 ( 儲存在單個s己憶體1⑻的相同位址。在存取單個記憶體100之相 同位址之後,雖然垂直線補償器120和水平線補償器140被並行 驅動,但是垂直線補償器丨2〇所補償的資料或水平線補償器14〇 所補償的資料依照顯示裝置之典型缺陷為垂直線缺陷或水平線缺 陷而被輸出。結果,與垂直線補償器12〇和水平線補償器14〇分 另·!使用獨立記憶體的例子相比,本發明實施例之資料補償電路可 減少記憶體的使用數目。與垂直線缺陷資料和水平線缺陷資訊分 別館存在;^同健的例子相比,制單個記憶體可能減少記憶體 28 200901155 的容量。 記憶體100包含:電可抹寫程式化唯讀記憶體,用於儲存典 型缺IV貝APDl'CDl和GDI以及點缺陷資訊pD2、CD2和GD2; 暫存器,用於叫地儲存電可抹寫程式化唯讀記·巾儲存的資 料,並且輸出臨時儲存的資料。垂直線缺陷區域中使用的參數和 斜線缺陷_巾使_參數可被統—。此外,垂錄缺陷區域 =貝或水平、、泉缺|^區域針對垂直線缺陷資料和水平線缺陷資訊均 被儲存在Alt體1GG的相同位址巾。例如,每—垂直線缺陷區域 和水平線缺陳域之位址資訊咖由對應的晝素數目表示。用於 判疋缺1½區域之典型缺陷是否為垂直線缺陷或水平線缺陷的典型 缺陷方向資訊_存在記憶體⑽騎.址。典型缺陷方向資 成還可使㈣序控制騎選擇插腳被表示,資料補償電路在其中 被組合。例如,典型缺陷方向資訊可被設定為“0,,以表示垂直線缺 陷’可被設定m表示水平線缺陷。典型缺財向資訊對應τ 處,記憶體100中儲存的位址資訊PDU吏用水平線解析度範圍内 分配的晝素數目被設定,时別表隸錄缺随域之位置。另 一方面’典型缺陷方向資訊對應“!,’處,記憶體1〇〇中儲存的位址 貝訊PD1使用垂直線解析度細内分配的晝素數目被設定,以分 別表示水平線缺陷區域之位置。換言之,依照記憶體1〇〇中設定 的典型缺財向:#訊,典型缺陷區域之位置資訊_表示垂直線 缺陷區域之位置或水平線缺陷區域之位置。 29 200901155 同日守,典型缺陷區域可顯示於如「第14圖」所示之比正常區 域更凴的狀態中,如「第15圖」所示之比正常區域更暗的狀態中, 或者如「第16圖」所示之亮缺陷區域和暗缺陷區域均被表示為典 型缺陷區域之狀態巾。依賴示缺陷對應亮缺陷區域或暗缺陷區 域,用於顯示缺陷之補償㈣被增加至輸人資料或者從輸入資料 中減除’以補償亮度。為此,依照典型缺陷區域之順序,用於表 示典型缺_域對應亮缺陷還是暗之亮度資訊被儲存於記憶 體100中’以用於典型缺陷區域。換言之’包含每—典型缺陷區 域之亮度資訊以及典型缺陷區域之順序資訊之控制資訊CS1儲存 在記憶體100的特別位置,以分類典型缺陷區域為比正常區域更 壳的缺陷區域或者比正常區域更暗的缺陷區域,如「第14圖」、「第 15圖」和「第16圖」所示。例如,為控制資訊CS1分配的一個 位元組之3位元表示關聯典型缺陷區域之順序之資訊,分配的位 元組之1位元表示亮度資訊,此亮度資訊用於表示關聯典型缺陷 係為亮缺陷或暗缺陷。 此外,用於表示典型缺陷區域之缺陷類型係為垂直線缺陷或 水平線缺陷之典型缺陷方向資訊、用於表示是否存在典型缺陷區 域從而表示是否需要補償典型缺陷區域之典型缺陷補償需求/無 需求資訊,以及用於表示是否需要補償點缺陷區域之點缺陷補償 需求/無需求資訊可被儲存在相同位址,作為控制資訊CS2。例 如,為控制資訊CS2分配的一個位元組中3位元資料之各位元可 30 200901155 表示三段資訊。 同時,控制資訊CS1和CS2可透過時序控制器1〇4中包含的 選擇插腳值被設定,資料補償電路105在其中被組合。 - 由「第8圖」所示之位元擴張器20擴張位元的資料Re、Ge -和Be被輸入至第一補償器110。使用記憶體刚中儲存的典型缺 陷資訊PD卜GDI和CD卜第-補償器11〇補償待顯示於垂直線 广典型缺陷區域或水平線典型缺陷區域之上的輸入資料Re、&和 、Be ’並且輸出被補償資料。換言之,第—補償器ιι〇補償典型缺 陷區域中包含的主區域C1以及邊界區域SG1和SG2之輸入資料 Re、Ge和Be,以回應記憶體100中的典型缺陷資訊piM、cD1 和GDI,並且輸出被補償資料。對於正常區域之輸入資料,第一 補償器110輸出資料,無須任何資料補償。 詳細地’第-補償器110包含:垂直線補償器12〇,使用記憶 υ體100中的位置資訊m作為垂直線缺陷區域之位置資訊以補償 輸入資料Re、Ge和Be,並且輸出被補償資料;水平線補償器14〇, 使用記憶體100之位置資訊PD1作為水平線缺陷區域之位置資 、訊,用於補償輸入資料Re、Ge和Be,並且輸出被補償資料;以 ’及,多工器膽’依照控制資訊CS2巾包含的典型缺陷方向資訊, 用於選擇垂直線補償器120之輸出資料或者水平線補償器14〇之 輪出資料。第-補償110並行轉垂直線補償^⑽和水平線 補償器140,其中垂直線補償器、12〇和水平線補償器14〇彼此共享 31 200901155 。己隐體100,以同時為輸入資料Re、Ge和Be執行垂直線補償和 水平線補償。然後,第一補償器110透過多工器160選擇垂直線 補償益120之輸出資料或者水平線補償器140之輸出資料,並且 輸出選擇的資料。 垂直線補償器12〇包含灰階判定器122、位置判定器124、補 償貪料選擇器126、加法器128、減法器13G以及多工器132和134。 灰階判定器122分析輸入資料Re、Ge* Be之各自灰階等級, 根據刀析的灰料級’從記憶體⑽巾讀取的灰階範圍資訊⑽ 中選擇輸入貧料Re、Ge#〇Be之對應灰階範圍資訊,並且輸出選 擇的灰階範圍資訊至補償資料選擇器126。 使用孟直同步5孔號Vsync、水平同步訊號Hsync、資料賦能訊 號DE以及點時鐘DCLK至少其中之一,位置判定器 124判定輸 入貝料Re、Ge和Be在水平方向之晝素位置。例如,位置判定器 I24判定輸入資料Re、Ge和Be之水平晝素位置,同時計數資料 賦能訊號DE之賦能週期中點時鐘DCLK之脈衝。然後,位置判 定器124 t匕較輪人資料Re、Ge和&之判定水平晝素位置與從記 ft體100中項取的垂直線缺陷區域位置資訊則,以彳貞測缺陷區 域疋否為垂麵缺’域。當缺腿域被伽彳轻直線缺陷區域 b,位置判疋β 124從位置資訊PD1中選擇缺陷區域之對應位置 資訊’並且輸岐擇的位置資訊至補償資料選擇器⑼。 補仏資料選擇器126從記憶體1〇〇中讀取的補償資料CD1中 32 200901155 4母-輸人㈣Re、Be之對應補償資料,㈣應灰階判 疋為⑵選擇的灰階翻資訊和位置判定器124選擇的位置資 说。換言之,補償資料選· 126選擇補償資訊,此補償資料對 應位置判定it 124之位置資訊以及錢灰_ “ 122之灰階範 圍貧訊而選擇的對應灰階顧,並且輸出選擇的補償資料。當位 置資訊表示垂直線缺陷區域之主區域時,用於補償主區域之二償 資料被選擇且輪出。另—方面,纽置資訊表示垂直線缺陷區域 之邊界區域之細分區時,祕補償細分區之補償料被選擇且輪 出0 一加法器128增加麵資料選擇器、126輸出的補償資料至輸入 資料Re、Ge和Be,並且輸出結果資料。減法器13〇從輸入資料At least one of Hsync, data enable signal DE, and dot clock DCLK, position determiner 174 determines the pixel locations of input data Rm2, Gm2, and Bm2. For example, the position determiner 174 determines the horizontal pixel position of the input data RnG, Gm2, and Bm2, and simultaneously counts the midpoint clock of the energizing period of the data enable signal DE! The pulse of ^!^ is determined, and the vertical pixel position of the input data Rn^, Gm2, and Bm2 is determined, and the pulse of the Hsync pulse of the §fl number is synchronized in the period in which the vertical sync signal Vsync and the data enable signal DE are both asserted. Then, the pixel position determiner 174 compares the input data Rm2, Gm2 and the bully remaining and the point defect position information pD2 read from the first and second body members 42V and 42H to detect Whether this detection area is a point defect area. When the _ area is detected as the point defect area %' position determiner 174 outputs information for indicating the position of the decision element to the compensation information selector 176. ' Compensation data selection n 176 from the first memory 42V and the second memory 42h read the compensation of the hybrid CD2 selected county - the input of the _, such as 2 and Bm2 corresponding compensation Lai, to the gray scale judge m The selected grayscale detail information and the location information selected by the location column 174. Then the compensation data selector μ outputs the selected compensation data. 26 200901155 Calculator 178 i 曰 plus compensation data selector ι76 output compensation data to the wheel material Rm2, Gm2 # port Bm2, or subtract the compensation dragon selection H 176 output from the input data such as 2, Gm2 and Bm2 Compensation (four), and output results. Therefore, the second compensator 17 compensates the data sheets 2' and Bm2' of the defect area and outputs the compensated data. As apparent from the above description, in the data compensating circuit of the first embodiment of the present invention, the luminance difference of the typical defect region is compensated by the selection of the Nb-compensation B% and the output of the horizontal line compensator 80, and the vertical line compensator % and The horizontal line compensator is more than 80 related to the typical lack of wealth _ Lai (four) system separation of memory and 42H. In the data compensation circuit of the first embodiment of the present invention, the luminance difference value of the boundary region of the typical defect region is applied to the typical defect region by using the second compensator (10) spatially and temporally distributed in the first complement C3〇. The compensation data of the data is finely compensated. In addition, the luminance difference value of the point defect area can also be compensated using the third compensator 170. Fig. 13 is a view showing a material compensating circuit of the liquid crystal display device of the second embodiment of the present invention. As shown in Figure 13, the data plane circuit contains: memory: store typical defect information PD1, CD1 and (10) and point defect information pD2 2 (10) and GD2; first compensator 11〇, using memory 1〇〇 Typical defect information stored PD PD CD and GDi compensate for the data of typical defect areas, & and shame, and output data Rml, Gml and Bml as compensation data; second compensator pair, 27 200901155 using frame rate control flutter method The data, Gml and Bml output by the first compensator 11A are finely compensated by distributing the data Rmi, Gml and Bml in space and time; and the third compensator 170' is stored in the memory 1 'Point defect information PD2, CD2 and GD2 compensation point defect area information. The first compensator 11A shown in "Fig. 13" is different from the first compensator 30 shown in "Fig. 9" because the vertical line compensator 12A of the first compensator 110 and the horizontal line compensator 140 are mutually Share a memory 1〇〇. C ^ Since the display panel is divided into a type that generates a vertical line defect and a type that generates a horizontal line defect, according to the scanning direction of the exposure device, the display device using the display panel corresponding to the two types is only used for the vertical line defect information and the horizontal line. One of the defect information. Therefore, according to an embodiment of the present invention, the parameters used in the vertical line defect information and the parameters used in the horizontal line defect information are unified, and the vertical line defect information or the horizontal line defect information is stored for the vertical line defect information and the horizontal line defect information. The same address of a single suffix 1 (8). After accessing the same address of a single memory 100, although the vertical line compensator 120 and the horizontal line compensator 140 are driven in parallel, the vertical line compensator 补偿2〇 compensates The data compensated by the data or horizontal line compensator 14 is output as a vertical line defect or a horizontal line defect according to a typical defect of the display device. As a result, the vertical line compensator 12 and the horizontal line compensator 14 are separated from each other! Compared with the physical example, the data compensation circuit of the embodiment of the present invention can reduce the number of memory usages, and the vertical line defect data and the horizontal line defect information respectively exist; compared with the example of the health, the single memory may reduce the memory. Volume 28 The capacity of 200901155. Memory 100 contains: electrically rewritable stylized read-only memory for storage Typical lack of IV APD1 'CDl and GDI and point defect information pD2, CD2 and GD2; a register for storing data that can be stored in an electrically rewritable stylized reading/storage, and outputting temporarily stored data. The parameters used in the vertical line defect area and the slash defect _ parameters can be unified. In addition, the recorded defect area = shell or horizontal, spring missing | ^ area for vertical line defect data and horizontal line defect information are stored In the same address of the Alt body 1GG. For example, the address information of each of the vertical line defect area and the horizontal line defect field is represented by the corresponding number of pixels. It is used to determine whether the typical defect of the missing area is a vertical line. Typical defect direction information of defects or horizontal line defects _ there is memory (10) riding address. Typical defect direction resources can also make (4) sequence control riding selection pins are displayed, and data compensation circuits are combined therein. For example, typical defect direction information can be It is set to “0, to indicate vertical line defect” and m can be set to indicate horizontal line defect. The typical lack of wealth corresponds to information τ, and the address information PDU stored in the memory 100 is used for water. The number of pixels allocated in the line resolution range is set, and the time table is recorded as missing the position of the domain. On the other hand, the 'typical defect direction information corresponds to '!,', the address stored in the memory 1〇〇 PD1 uses the number of pixels allocated in the vertical line resolution to be set to indicate the position of the horizontal line defect area. In other words, according to the typical lack of money set in the memory 1〇〇: #信息, the location information of the typical defect area _ indicates the position of the vertical line defect area or the position of the horizontal line defect area. 29 200901155 On the same day, the typical defect area can be displayed in a state more than the normal area as shown in "Fig. 14", such as "Fig. 15" In the state shown to be darker than the normal area, or the bright defect area and the dark defect area as shown in "Fig. 16" are shown as the state towel of the typical defect area. The dependence defect indicates a bright defect area or a dark defect area, and the compensation for displaying the defect (4) is added to the input data or subtracted from the input data to compensate for the brightness. For this reason, in accordance with the order of typical defective areas, information indicating whether a typical missing area corresponds to a bright defect or a dark brightness is stored in the memory 100' for a typical defective area. In other words, the control information CS1 containing the brightness information of each typical defect area and the order information of the typical defect area is stored in a special position of the memory 100 to classify the typical defect area as a defective area that is more shelled than the normal area or more than the normal area. Dark defect areas, as shown in Figure 14, Figure 15, and Figure 16. For example, the 3-bit of a byte allocated for the control information CS1 indicates the information of the order of the associated typical defect area, and the 1-bit of the assigned byte represents the brightness information, and the brightness information is used to indicate that the associated typical defect is Bright or dark defects. In addition, the type of defect used to represent a typical defect area is typical defect direction information of a vertical line defect or a horizontal line defect, and a typical defect compensation area/no demand information indicating whether a typical defect area exists to indicate whether it is necessary to compensate for a typical defect area. And the point defect compensation demand/no demand information for indicating whether the point defect area needs to be compensated can be stored at the same address as the control information CS2. For example, the elements of the 3-bit data in a byte allocated for the control information CS2 can represent three pieces of information. At the same time, the control information CS1 and CS2 can be set through the selection pin values included in the timing controller 1〇4, in which the data compensation circuit 105 is combined. - The data Re, Ge - and Be of the bit expansion elements of the bit expander 20 shown in "Fig. 8" are input to the first compensator 110. The input data Re, & and Be ' to be displayed on the typical defect area of the vertical line or the typical defect area of the horizontal line are compensated using the typical defect information PDBu GDI and CD Bu-Compensator 11 stored in the memory. And output the compensated data. In other words, the first compensator ιι〇 compensates the main region C1 included in the typical defect region and the input data Re, Ge, and Be of the boundary regions SG1 and SG2 in response to the typical defect information piM, cD1, and GDI in the memory 100, and Output compensated data. For the input data of the normal area, the first compensator 110 outputs the data without any data compensation. In detail, the 'first-compensator 110 includes: a vertical line compensator 12A, which uses the position information m in the memory unit 100 as the position information of the vertical line defect area to compensate the input data Re, Ge, and Be, and outputs the compensated data. The horizontal line compensator 14〇 uses the position information PD1 of the memory 100 as the position information and signal of the horizontal line defect area, and is used for compensating the input data Re, Ge, and Be, and outputting the compensated data; and 'and, the multiplexer 'According to the typical defect direction information contained in the control information CS2 towel, it is used to select the output data of the vertical line compensator 120 or the round line compensator 14〇. The first compensation 110 is parallel to the vertical line compensation ^ (10) and the horizontal line compensator 140, wherein the vertical line compensator, the 12 〇 and the horizontal line compensator 14 共享 are shared with each other 31 200901155 . The hidden body 100 performs vertical line compensation and horizontal line compensation for the input data Re, Ge, and Be at the same time. Then, the first compensator 110 selects the output data of the vertical line compensation benefit 120 or the output data of the horizontal line compensator 140 through the multiplexer 160, and outputs the selected data. The vertical line compensator 12A includes a gray scale determiner 122, a position determiner 124, a compensation paste selector 126, an adder 128, a subtractor 13G, and multiplexers 132 and 134. The gray scale determiner 122 analyzes the respective gray scale levels of the input data Re, Ge* Be, and selects the input lean material Re, Ge# according to the gray scale range information (10) read from the memory (10) towel. The corresponding gray scale range information of Be, and outputs the selected gray scale range information to the compensation data selector 126. Using at least one of the Mengzhi sync 5 hole number Vsync, the horizontal sync signal Hsync, the data enable signal DE, and the dot clock DCLK, the position determiner 124 determines the position of the pixel in the horizontal direction of the input materials Re, Ge, and Be. For example, the position determiner I24 determines the horizontal pixel position of the input data Re, Ge, and Be, and simultaneously counts the pulse of the midpoint clock DCLK of the energizing period of the data enable signal DE. Then, the position determiner 124 t determines the defective area by comparing the determined horizontal pixel position of the wheel data Re, Ge, and & and the vertical line defect area position information of the item from the ft body 100. For the vertical lack of 'domain. When the missing leg field is gamma light linear defect area b, the position judgment β 124 selects the corresponding position information of the defective area from the position information PD1 and inputs the selected position information to the compensation data selector (9). The compensation data selector 126 reads the compensation data CD1 from the memory 1 2009 32 200901155 4 mother-input (four) Re, Be corresponding compensation data, (4) should be gray scale judgment (2) selected gray scale information and The position judger 124 selects the position to be said. In other words, the compensation data selection 126 selects the compensation information, and the compensation data corresponds to the position information of the position determination it 124 and the corresponding gray level selected by the gray level _ "the gray level range of 122, and outputs the selected compensation data. When the position information indicates the main area of the vertical line defect area, the second compensation data for compensating the main area is selected and rotated. On the other hand, when the home information indicates the subdivision area of the boundary area of the vertical line defect area, the secret compensation subdivision The compensation material of the zone is selected and the 0-adder 128 is added to add the surface data selector, the compensation data output by 126 to the input data Re, Ge and Be, and the result data is output. The subtractor 13〇 input data
Re、Ge和Be中減去補償資料選擇器126輸出的補償資料,並且 輸出結果資料。 依照典型缺陷區域的亮度,多工器Μ選擇加法器⑵之輸 出資料或者減法器13G之輸出資料,並且輸出選擇的資料。依: 典型缺陷區域之順序,多^ 132順序地輪出典型缺隱域之亮 度貧訊以控姆U4,其巾多H34選擇加法器128之輸出 貧二或者減法ϋ 13G之輸㈣料。典型缺陷區域亮度資訊儲存在 記憶體1GQ中’連同典魏陷區域順序資訊作為控制資訊CS卜 依照典型缺陷區域之數目,從記憶體励中讀取的控制資訊⑶ 重後地被供應至多卫器132。多工器132選擇控制資訊⑶,並且 33 200901155 供應選擇的控制資訊CS1至多工器134,其中控制資訊CS1對應 位置判定器124偵測的垂直線缺陷區域之順序,即垂直線缺陷區 域順序Vm。因此,依照多工器132供應之控制資訊CS1中包含 的亮度資訊,多工器134選擇加法器128之輪出或減法器13〇之 輸出,並且供應選擇的輸出至多工器156。 水平線補償器140包含灰階判定器142、位置判定器144、補 m料選擇器146、加法器148、減法器15G以及多工器152和 154。除了位置判定器144之外’水平線補償器14()與垂直線補償 器120具有相同的電路配置。 灰階判定器m分析輸入資料Re、G_Be之各自灰階等級, 根據分析的灰階等級,從記憶體⑽中讀取的灰階範圍資訊⑽ 中選擇輸入資料Re、Ge和Be之對應灰階範圍資訊,並且輸出選 擇的灰階範圍資訊至補償資料選擇器146。 使用垂直时《 Vsyne、水销步观、㈣賦能訊 號DE以及點時鐘DCLK至少其中之一,位置判定器144判定輸 入資料Re、Ge和Be在垂直方向上之晝素位置。例如,位置判定 器!44判定輸入資料Re、Ge和此之垂直晝素位置,同時計數垂 直同步訊號Vsync和資料賦能訊號DE均被賦能之週期中水平同 步訊號Hsync之脈衝。然後,位置判定器144比較判定的輸入資 料Re、Ge和Be之垂直畫素位置與從記憶體觸中讀取的典型缺 陷區域位置資訊PD卜以偵測缺陷區域是否為典型缺陷區域。當 34 200901155 ,位置判定器144從位置資訊 ,並且輸出選擇的位置資訊 缺陷區域被偵測為典型缺陷區域時 PD1中選縣純域之對應位置資 至補償資料選擇器146。 —補償㈣轉器146從記鋪_取_償資料CD1中選 擇母輸人貝料Re、Ge#QBe之對應補償資料,以回應灰階判定 器142選擇_瓣訊純雜請細位置資訊The compensation data output from the compensation data selector 126 is subtracted from Re, Ge, and Be, and the result data is output. In accordance with the brightness of the typical defective area, the multiplexer selects the output data of the adder (2) or the output data of the subtractor 13G, and outputs the selected data. According to the sequence of typical defect areas, more than 132 sequentially rotate the brightness of the typical missing area to control the U4, and the multi-H34 selects the output of the adder 128 to be poor or subtracted from the 13G (four) material. The typical defect area brightness information is stored in the memory 1GQ' together with the coded area information as the control information CS, according to the number of typical defect areas, the control information read from the memory excitation (3) is then supplied to the multi-guard 132. The multiplexer 132 selects the control information (3), and 33 200901155 supplies the selected control information CS1 to the multiplexer 134, wherein the control information CS1 corresponds to the order of the vertical line defect areas detected by the position determiner 124, that is, the vertical line defect area order Vm. Therefore, in accordance with the luminance information contained in the control information CS1 supplied from the multiplexer 132, the multiplexer 134 selects the output of the rounder or subtractor 13 of the adder 128, and supplies the selected output to the multiplexer 156. The horizontal line compensator 140 includes a gray scale determiner 142, a position determiner 144, a complement selector 146, an adder 148, a subtractor 15G, and multiplexers 152 and 154. The horizontal line compensator 14() has the same circuit configuration as the vertical line compensator 120 except for the position determiner 144. The gray scale determiner m analyzes the respective gray scale levels of the input data Re and G_Be, and selects the corresponding gray scale of the input data Re, Ge, and Be from the gray scale range information (10) read from the memory (10) according to the analyzed gray scale level. The range information is output, and the selected gray scale range information is output to the compensation data selector 146. The position determiner 144 determines the position of the pixel in the vertical direction of the input data Re, Ge, and Be using at least one of the Vsyne, the water step, the (four) enable signal DE, and the dot clock DCLK. For example, the position determiner! 44 determines the input data Re, Ge and the vertical pixel position, and simultaneously counts the pulse of the horizontal synchronization signal Hsync in the period in which both the vertical synchronization signal Vsync and the data enable signal DE are energized. Then, the position determiner 144 compares the vertical pixel positions of the determined input materials Re, Ge, and Be with the typical defective area position information PD read from the memory touch to detect whether the defective area is a typical defective area. When the position determiner 144 is from the position information and outputs the selected position information, the defective area is detected as a typical defective area, and the corresponding position of the selected pure domain in the PD1 is supplied to the compensation data selector 146. - Compensation (4) Transmitter 146 selects the corresponding compensation data of the parent input material Re and Ge#QBe from the record_receiving data CD1 in response to the gray scale determiner 142 selection.
加法裔148增加補償資料選擇器H6輸出的補償資料至輪入 資料Re、Ge和Be,#日私心 輸出結果資料。減法ϋ 150從輪入資料 ^ ^和取中減去補償資料選擇請輸出的補償資料,並且 輸出結果資料。 依照控制資訊CS1 器154選擇加法器148 並且輸出選擇的資料。 中包含的典型缺陷區域之亮度資訊,多工 之輸出資料或者減法器15G之輸出資料, 依照位置判定器144 _的典型缺陷區域之順序即典型缺陷 區域順序Hm,多工器132選擇從記憶體⑽中 ⑶,並且供應選擇的_咖至多工㈣。因此,依:多 工裔152供應之控崎訊⑶中包含的亮度資訊,多工㈣4可 選擇加法器⑽之輸出或減法器⑼之輪出。然後,多工請 供應選擇的輸出至多工器156。 為之輪出讀’以回應控制資訊CS2中包含的典型缺陷方向 35 200901155 資訊。就找,當典養陷方向魏表補直線缺陷時 ⑼選擇性地輸出垂直線補償器m之輪出資料。另—方面,去血 型缺陷方向資訊表示水平線缺陷時,多工器156選擇性地輸= 平線補償器140之輸出資料。Adding French 148 increases the compensation data output by the compensation data selector H6 to the wheeled data Re, Ge, and Be, #日私心 Output result data. Subtraction ϋ 150 Subtracts the data ^ ^ and subtracts the compensation data, selects the compensation data to be output, and outputs the result data. The adder 148 is selected in accordance with the control information CS1 154 and the selected material is output. The brightness information of the typical defect area included in the multiplexed output data or the output data of the subtracter 15G is selected from the memory according to the order of the typical defect area of the position determiner 144_, that is, the typical defect area order Hm. (10) Medium (3), and supply the selected _ coffee to multiplex (four). Therefore, according to the brightness information contained in the Controls (3) supplied by the multi-generation 152, the multiplex (4) 4 can select the output of the adder (10) or the round of the subtractor (9). Then, the multiplexer supplies the selected output to the multiplexer 156. Read it out in turn' in response to the typical defect direction contained in Control Information CS2 35 200901155 Information. Just look for it, when the code is trapped in the direction of the Wei table to fill the line defect (9) selectively output the vertical line compensator m round of data. On the other hand, when the blood loss type direction information indicates a horizontal line defect, the multiplexer 156 selectively outputs the output data of the flat line compensator 140.
因此’使用單個記憶體100中儲存的典型缺陷區域資訊PD1、 CD1和GD卜弟-補償器⑽補償具有垂直線缺陷或水平線缺陷 之典型缺陷區域之輸人資料Re、①和&,並且輸出補償資料。 使用框速率控制顫動方法透過在"和時間上分佈資料 Rml Gml和Bml ’第二補償器m精細地補償第—補償器“ο 輸出的補償資料RnU、Gml和Bml。因為每一典型缺陷區域之邊 界區或之她胃料係依照框速率控制顫動方法在空間和時間上被 刀佈每if界區域之免度差值精細地被補償。 使用此體1〇〇中儲存的點缺陷資訊舰、牙口 cD2,第 二補償器180補償待顯示於點缺陷區域之上的資料咖、㈤和Therefore, the input data Re, 1 and & of the typical defect area having the vertical line defect or the horizontal line defect are compensated using the typical defect area information PD1, CD1 and GD Budi-compensator (10) stored in the single memory 100, and output Compensation information. The frame rate control flutter method is used to finely compensate the compensation information RnU, Gml, and Bml of the first compensator by distributing the data Rml Gml and Bml 'second compensator m in the " and time. Because each typical defect area The border zone or her stomach system is finely compensated in space and time by the margin difference of the knife cloth per if boundary area according to the frame rate control method. The point defect information ship stored in the body 1〇〇 is used. , the mouth cD2, the second compensator 180 compensates for the data to be displayed on the point defect area, (5) and
Bm2。對應正常區域之資料,第三補償器請輸出資料,無須任 何資料補償。 從田述顯而易見’依照本發明第二實施例之資料補償電 路中依〜、關聯典型缺陷方向資訊,透過選顆直線補償器⑽ _ K平線貝器H〇之輸出之一,可能補償典型缺陷區域之亮度 差值垂直線招貞H⑽#水平線補傭_彼此共享單個記憶 體1〇〇 ’同h減少記憶體1〇〇的容量。本發明第二實施例之資料補 36 200901155 償電路中,依照典魏陷區域係為亮缺祕域或暗缺陷區域透過 執仃補償資料之加法或減法,還可能適當地補償典型缺陷區域之 亮度差值。 第17圖」所示係為本發明第三實施例之液晶顯示裝置之資 料補償電路。如「第17圖」所示,資料補償電路包含:記憶體1〇〇, 用於儲存典型缺陷資訊pm、cm和⑽以及點缺陷資訊則、 CD2和GD2,第-補你器22〇 ’使用記憶體刚中儲存的典型缺 陷資訊顺、CD1和Gm,用於補償典型缺陷區域之資料以、、 Ge和Be ’並且輸出資料触、Gml和Bml作為補償資料;第二 補償器16G,使用框速率控制顫動方法,透過在空間和時間上分配 資料Rm卜Gml和Bml,用於精細地補償第一補償器22〇輸出之 資料Rm卜Gml和Bml ;以及,第三補償器m,使用記憶體⑽ 中儲存的點缺陷資訊PD2、⑽和⑽麵點缺_域之補償資 料。第三補償器170耦合於第二補償器16〇。 々「第17圖」所示之第一補償器22〇不同於「第13圖」所示 之第-補償器110’因為第一補償器22〇具有單個補償器配置,用 於執行無論水平或垂直線缺陷之資料補償。 々5己fe體100包含··電可抹寫程式化唯讀記憶體,儲存典型缺 陷資訊pm、CD1和GD1以及點缺陷資訊PD2、CD2和⑽; 以及暫抑’躲_地儲錢可抹寫程式化唯讀域體中儲存 的資料’並且輸出臨時儲存的#料。對於垂直線曲線區域資訊和 37 200901155 水平線缺陷區域資§fl,垂直線缺陷區域資訊或水平線缺陷區域資 訊被儲存在記憶體100的相同位址處。包含典型缺陷區域之亮度 資訊之控制資訊CS1連同典型缺陷區域之順序資訊還可儲存在記 體100中。此外,用於表示典型缺陷區域之缺陷類型係為垂直 線缺陷或水平線缺陷之典型缺陷方向資訊、用於表示是否存在典 型缺陷區域從而表示是否需要補償典型缺陷區域之典型缺陷補償 需求/無需求資訊,以及用於表示誓詞需要點缺陷區域之補償之 點缺陷補償需求/無需求資訊可被儲存在記憶體100中,作為控 制資訊CS2。 「第8圖」所示之位元擴張器20所位元擴張的資料Re、Ge 和Be被輸入至第一補償器220。使用記憶體loo中存取的典型缺 陷資訊PD卜GDI和CD1,第一補償器220補償待顯示於垂直線 典型缺陷區域或水平線典型缺陷區域之上的輸入資料Re、Ge和 Be,並且輸出經過補償的資料。換言之,第一補償器22〇補償典 型缺陷區域中包含的主區域C1以及邊界區域sgi和SG2之輸入 資料Re、Ge和Be ’以回應記憶體1〇〇之典型缺陷資訊pD卜GD1 和CD1,並且輸出被補償的資料。對於正常區域之輸入資料,第 補傷器220輸出沒有任何資料補償之資料。 第一補償器220包含:灰階判定器222、位置判定器224、補 償資料選擇器226、加法器228、減法器230以及多工器232和234。 灰階判定器222分析輸入資料Re、Ge和Be之各自灰階等級, 38 200901155 根據分析的灰階等級,從記憶體100讀取的灰階範圍資訊GDI中 選擇輸入資料Re、Ge和Be之對應灰階範圍資訊,並且輸出選擇 的灰階範圍資訊至補償資料選擇器126。 使用垂直同步訊號Vsync、水平同步訊號Hsync、資料賦能訊 號DE以及點時鐘DCLK至少其中之一,位置判定器224判定水 平方向或垂直方向之輪入資料Re、Ge和Be之畫素位置。 詳細地’如「第18圖」所示,位置判定器224包含:第—位 置判定器322,用於判定輸入資料Re、Ge和Be在水平方向之書 素位址,第二位置判定器324,用於判定輸入資料Re、以和如 在垂直方向之畫素位址;以及多工器,依照控制資訊CS2中包含 的典型缺陷方向資訊選擇第一位置判定器322之輸出或第二位置 判定器324之輸出。 第位置判疋器322判定輸入資料Re、Ge和Be之水平書素Bm2. For the data corresponding to the normal area, the third compensator should output the data without any data compensation. It is obvious from Tian Shu that 'in the data compensation circuit according to the second embodiment of the present invention, according to the information of the typical defect direction, one of the outputs of the linear compensator (10) _ K flat line device H 选 can compensate for the typical defect. The brightness difference of the area is perpendicular to the line H (10) # horizontal line patch _ share a single memory 1 〇〇 'the same h reduce the capacity of the memory 1 。. In the circuit of the second embodiment of the present invention, in the compensation circuit, the brightness of the typical defect area may be appropriately compensated according to the addition or subtraction of the compensation data by the coded area or the dark defect area. Difference. Fig. 17 is a view showing a material compensating circuit of the liquid crystal display device of the third embodiment of the present invention. As shown in Figure 17, the data compensation circuit includes: memory 1〇〇 for storing typical defect information pm, cm and (10) and point defect information, CD2 and GD2, and The typical defect information stored in the memory is CD, CD1 and Gm, which is used to compensate the data of the typical defect area, Ge, and Be ' and output data touch, Gml and Bml as compensation data; second compensator 16G, use box The rate control flutter method distributes the data Rm Bu Gml and Bml in space and time for finely compensating the data Rm Bu Gml and Bml of the first compensator 22〇; and, the third compensator m, using the memory (10) Compensation information for point defect information PD2, (10) and (10) missing points in the field. The third compensator 170 is coupled to the second compensator 16A. The first compensator 22〇 shown in Fig. 17 is different from the first compensator 110' shown in Fig. 13 because the first compensator 22 has a single compensator configuration for performing horizontal or Data compensation for vertical line defects. 々5 己 体 100 contains · · electrically rewritable stylized read-only memory, storing typical defect information pm, CD1 and GD1 and point defect information PD2, CD2 and (10); and temporary suppression of 'hiding _ storage money can be wiped Write stylized read-only domain stored data 'and output temporary stock # material. For the vertical line curve area information and 37 200901155 horizontal line defect area §fl, the vertical line defect area information or the horizontal line defect area information is stored at the same address of the memory 100. The control information CS1 including the brightness information of the typical defect area together with the sequence information of the typical defect area can also be stored in the record 100. In addition, the type of defect used to represent a typical defect area is typical defect direction information of a vertical line defect or a horizontal line defect, and a typical defect compensation area/no demand information indicating whether a typical defect area exists to indicate whether it is necessary to compensate for a typical defect area. And the point defect compensation demand/no demand information for indicating that the oath needs the point defect area can be stored in the memory 100 as the control information CS2. The data Re, Ge, and Be of the bit expansion of the bit expander 20 shown in "Fig. 8" are input to the first compensator 220. Using the typical defect information PDs GDI and CD1 accessed in the memory loo, the first compensator 220 compensates the input data Re, Ge, and Be to be displayed on the typical defect area of the vertical line or the typical defect area of the horizontal line, and outputs the output. Compensation information. In other words, the first compensator 22 〇 compensates the main region C1 included in the typical defect region and the input data Re, Ge, and Be ' of the boundary regions sgi and SG2 in response to the typical defect information pD GD1 and CD1 of the memory 1,, And output the compensated data. For the input data of the normal area, the first filling device 220 outputs the data without any data compensation. The first compensator 220 includes a gray scale determiner 222, a position determiner 224, a compensation data selector 226, an adder 228, a subtractor 230, and multiplexers 232 and 234. The gray scale determiner 222 analyzes the respective gray scale levels of the input data Re, Ge, and Be, 38 200901155 selects the input data Re, Ge, and Be from the gray scale range information GDI read from the memory 100 according to the analyzed gray scale level. The gray scale range information is corresponding, and the selected gray scale range information is output to the compensation data selector 126. Using at least one of the vertical sync signal Vsync, the horizontal sync signal Hsync, the data enable signal DE, and the dot clock DCLK, the position determiner 224 determines the pixel positions of the wheeled data Re, Ge, and Be in the horizontal or vertical direction. In detail, as shown in FIG. 18, the position determiner 224 includes a first position determiner 322 for determining a pixel address of the input data Re, Ge, and Be in the horizontal direction, and a second position determiner 324. For determining the input data Re, and the pixel address as in the vertical direction; and the multiplexer, selecting the output of the first position determiner 322 or the second position determination according to the typical defect direction information contained in the control information CS2. The output of the 324. The first position determiner 322 determines the level of the input data Re, Ge, and Be.
位址’同時計數資料賦能訊號DE之職能週期中的點時鐘DCLK 之脈衝。然後,第—位置判定器322比較判定的輸入資料Re、Ge 彳Be之水平晝素位置與記憶體1〇〇中讀取的典型缺陷區域位置資 訊· ’以_缺陷區域衫為典型缺陷區域。當缺陷區域㈣ 測為典型缺陷區域時,[位置欺器322從位置資訊pm中選 擇缺陷區域之對應位置資訊,並且輸出選擇的位置資訊至多工器 326。 第二位置判定器324判定輸入資料Re、Ge #口 &之垂直晝素 39 200901155 位置’同時計數垂直同步訊號Vsync和資料賦能訊號DE均被賦 月b之週期内水平同步訊號Hsync之脈衝。然後,第二位置判定器 324比較判定的輸入資料Re、Ge和Be之垂直晝素位置與從記憶 體100讀取的典型缺陷區域位置資訊PD1,卩偵測缺陷區域是否 為典型缺陷區域。當缺陷區域被偵測為典型缺陷區域時,第二位 置判定器324從位置資訊PD1中選擇缺陷區域之對於位置資訊, 並且輸出選擇的位置資訊至多工器326。 依照控制資訊CS2中包含的典型缺陷反向資訊,多工器326 供應第-位置判定器322或第二位置判定器324輸入的典型缺陷 區域位置資訊至補償資料選擇器226。 補償資料選擇器220從記憶體100中讀取的補償資料cm中 ,擇每-輸人㈣Re、Ge和Be之對應補償資料,以回應灰階判 疋裔222選擇的灰階範圍資訊和位置判定器224選擇的位置資訊。 '加法器228增加補償資料選擇器226輸出的補償資料至輸入 貧料Re、Ge和Be ’並且輸出結果資料。減法器23〇從輸入資料The address 'synchronizes the pulse of the dot clock DCLK in the functional cycle of the data enable signal DE. Then, the first position determiner 322 compares the horizontal pixel position of the determined input data Re, Ge 彳Be with the typical defect area position information read in the memory 1 以 as a typical defective area. When the defective area (4) is measured as a typical defective area, the [Location Bulletin 322 selects the corresponding position information of the defective area from the position information pm, and outputs the selected position information to the multiplexer 326. The second position determiner 324 determines that the input data Re, Ge #口 & vertical pixel 39 200901155 position 'simultaneously counts the vertical sync signal Vsync and the data enable signal DE are both pulsed by the horizontal sync signal Hsync during the period of the month b . Then, the second position determiner 324 compares the determined vertical pixel positions of the input data Re, Ge, and Be with the typical defect area position information PD1 read from the memory 100, and detects whether the defective area is a typical defective area. When the defective area is detected as a typical defective area, the second position determiner 324 selects the position information for the defective area from the position information PD1, and outputs the selected position information to the multiplexer 326. The multiplexer 326 supplies the typical defect area position information input by the first position determiner 322 or the second position determiner 324 to the compensation data selector 226 in accordance with the typical defect reverse information contained in the control information CS2. The compensation data selector 220 selects the compensation data corresponding to each of the (four) Re, Ge, and Be from the compensation data cm read from the memory 100, in response to the grayscale range information and position determination selected by the grayscale 222. The location information selected by the device 224. The adder 228 adds the compensation data output from the compensation data selector 226 to the input lean materials Re, Ge, and Be' and outputs the resultant data. Subtractor 23〇 input data
Re Ge和Be中減去補償資料選擇器226輪出的補償資料,並且 輸出結果貢料。 依照典型缺陷區域之亮度’多工器234選擇加法器228之輸 出或減法器23G之輸出,並且供應選擇的資料至第二補償器膽。 …依照典型缺陷區域之順序,多工器232順序地輸出典型缺陷 品或之冗度貝Λ ’以控制多工器234,其中多工器234選擇加法器 200901155 挪之輸出或減法器23〇之輸出。典型缺陷區域亮度資訊被儲存在 記憶體100巾’連同典型缺陷區域順序資訊作為控制資訊⑶。 依照典型缺陷區域之數目,從記憶體觸讀取的控制資訊CS1重 稷地被供應至多工器232。多工器232選擇位置判定器224所摘測 之典型缺陷區域之順序之對應㈣資訊cs卜即典型缺陷區域順 序Μ,並且供應選擇的控制資訊CS1至多工器说。因此,依照 供應自多工器232之控制資訊CS1之亮度資訊,多工器234選擇 加法器228之輸出或減法器、23〇之輸出,並且供應選擇的輸出至 第二補償器160。 口此使用單個兄憶體1〇〇中儲存的典型缺陷區域資訊腿、 CD1和GD1,第一補償器22〇補償具有垂直線缺陷或水平線缺陷 之典型缺陷區域之輸人資料Re、Ge和仏,並且輸出被補償的資 料。The compensation data rotated by the compensation data selector 226 is subtracted from the Re Ge and Be, and the result is output. The output of the adder 228 or the output of the subtractor 23G is selected in accordance with the brightness of the typical defective area multiplexer 234, and the selected data is supplied to the second compensator. In accordance with the sequence of typical defect regions, the multiplexer 232 sequentially outputs a typical defect or redundancy to control the multiplexer 234, wherein the multiplexer 234 selects the output of the adder 200901155 or the subtractor 23 Output. The typical defect area brightness information is stored in the memory 100' along with the typical defect area order information as control information (3). The control information CS1 read from the memory touch is repeatedly supplied to the multiplexer 232 in accordance with the number of typical defective areas. The multiplexer 232 selects the correspondence of the order of the typical defect areas extracted by the position determiner 224 (4) the information cs, that is, the typical defect area order, and supplies the selected control information CS1 to the multiplexer. Therefore, in accordance with the brightness information of the control information CS1 supplied from the multiplexer 232, the multiplexer 234 selects the output of the adder 228 or the output of the subtractor, 23, and supplies the selected output to the second compensator 160. The mouth uses the typical defect area information legs, CD1 and GD1 stored in a single brother's memory, and the first compensator 22 compensates for the input data Re, Ge and 仏 of a typical defect area with vertical line defects or horizontal line defects. And output the compensated data.
使用框速率控制5貞動方法,透過在m和時間上分佈資料Use frame rate control 5 贞 method to distribute data over m and time
Rml Gml和Bml ’ f二補償器16〇精細地補償第一補償器22〇 輸=的被補㈣料Rml、Gml和細卜當每—典型缺陷區域之邊 界區域之補償倾在空間和時間上健框速率控制躺方法被分 配時,每-邊界區域之亮度差值被精細地補償。 使用s己憶體100中儲存的點缺陷資訊pD2、GD2和CE>2,第 二補償$ 170補償細示於點缺陷區域之上的資料版2、伽2和The Rml Gml and Bml 'f two compensators 16〇 finely compensate the compensated (four) materials Rml, Gml and fines of the first compensator 22 for each of the typical defect regions in space and time. When the health frame rate control lying method is assigned, the luminance difference value per boundary region is finely compensated. Using the point defect information pD2, GD2, and CE>2 stored in the suffix 100, the second compensation $170 compensates for the data version 2, gamma 2 and the fineness above the point defect area.
Bm2。對於正常區域之資料,第三補償器,輸出未經過任何資 41 200901155 料補償之資料。 從以上描·貞射料,本發明第三實_之諸補償電路 中,使用記憶體1〇〇中儲存的典型缺陷資訊PD1、⑽和⑽, 具有早個補配置的第—補彳m補償具有垂直線缺陷或水 平線缺陷之典型缺陷區域之輪人 Re、Ge和&,並且輸出被 補·的貝料。目此,本㈣第三實關之資侧償電路可減少記 憶體100的容量,同時依照具有垂直線缺陷或水平線缺陷之血型 缺陷區域之方向資_償各種典型缺陷_之資料。因為本發明 貫施例之資料補償電路中的第一補償器22〇具有統-的補償器配 置。無須棚分為_、_償器和水平_償器,可能減少關聯 邏輯電路之尺寸,從而降低製造成本。 同時’上述本發明每_實施例之資料補償電路不健可被應 用至液阳顯作置’射被應用至其他視姆歸裝置,例如有機 發光二極體和電漿顯示裝置。 雖然本發明以前述之實施例揭露如上,财並_以限定本 發明。在不脫離本發明之精神和範圍内,所為之更動與潤飾,均 屬本發明之專聰護制之内。本發明所界定之 參照所附之t料鄕圍。 【圖式簡單說明】 第1圖所示為本發明實施例之液晶顯示裝置之方塊圖; 第2圖所不為液晶面板上齡之n直躲陷ϋ域之示意圖 42 200901155 第3圖所示為液晶面板上顯示之水平線缺陷區域之示意圖; ▲第4 ®所不為第2 ®所示之—讎直線缺陷區域處於放大狀 態之示意圖; 第5圖所tf為第3圖所示之—個水平線缺腿域處於放大狀 態之不意圖;Bm2. For the data of the normal area, the third compensator outputs the data without any compensation. From the above description, the compensation circuit of the third embodiment of the present invention uses the typical defect information PD1, (10) and (10) stored in the memory 1〇〇, and has the first complement 彳m compensation of the early complementary configuration. The wheeler Re, Ge, and & of a typical defect area having a vertical line defect or a horizontal line defect, and outputting the beaded material. In view of this, the (4) third-guarantee side compensation circuit can reduce the capacity of the memory body 100, and at the same time, according to the direction of the blood-type defect area having vertical line defects or horizontal line defects, the information of various typical defects is compensated. Since the first compensator 22 in the data compensation circuit of the present embodiment has a unified compensator configuration. There is no need to divide the _, _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ At the same time, the above-described data compensating circuit of the present invention can be applied to other devices, such as organic light-emitting diodes and plasma display devices. Although the present invention has been disclosed above in the foregoing embodiments, it is intended to limit the invention. Modifications and retouchings are within the spirit and scope of the present invention and are within the scope of the invention. The invention is defined by reference to the accompanying t-materials. BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a block diagram of a liquid crystal display device according to an embodiment of the present invention; FIG. 2 is a schematic diagram of a n-direct hiding region of a liquid crystal panel. It is a schematic diagram of the horizontal line defect area displayed on the liquid crystal panel; ▲ 4′′ is not shown in the second ®—the schematic diagram of the linear defect area in the enlarged state; the tf in the fifth figure is the one shown in the third figure. The intention that the horizontal line missing leg is in an enlarged state;
第6圖所7F為輸$賴健輸人資料之伽馬特性圖; 第7圖所示為液晶面板上顯示的點缺陷區域之示意圖 第8圖所示為本發明第—實關之資料補償電路之方塊圖; 第9圖所不為第8圖所示之記憶體和第—補償器之方塊圖; 第10圖所示為第8圖所示之第二補償器之方塊圖; 第11A圖至帛11D圖所示為帛10目所示之顫動值選擇器中 儲存的複數個顫動圖案之示意圖; 第12圖所示為第8圖所示之第三補償器之方塊圖;Figure 7F shows the gamma characteristic map of the input data of the Laijian input data; Figure 7 shows the schematic diagram of the point defect area displayed on the liquid crystal panel. Figure 8 shows the data compensation of the first-reality of the present invention. Block diagram of the circuit; Figure 9 is not a block diagram of the memory and the compensator shown in Fig. 8; Fig. 10 is a block diagram of the second compensator shown in Fig. 8; Figure 11 to Figure 11D are schematic views of a plurality of dither patterns stored in the dither value selector shown in Figure 10; Figure 12 is a block diagram of the third compensator shown in Figure 8;
第13圖所示為本發·二實關之龍補償電路之方塊圖; 第14圖所不為液晶面板上 圖; 顯示的明亮典型缺陷區域之示音 第15圖所tf驗晶面板上顯示的灰暗典型缺陷區域之示音 圖; 第16圖所示為明亮缺陷區域和灰暗缺陷區域均顯示於液晶面 板之上狀態示意圖; θθ 第Π圖所7F為本發明第三實施例之資難償電路之方塊圖. 43 200901155 以及 第18圖所示為第17圖所示之位置判定器之方塊圖。 【主要元件符號說明】 10 暗晝素 11 正常晝素 12 鏈結圖案 13 鏈結晝素 14 其他正常晝素 20 位元擴張器 30 第一補償器 40 記憶體 42V 第一記憶體 42H 第二記憶體 44V ' 44H 電可抹寫程式化唯讀記憶體 46V ' 46H 暫存器 70 垂直線補償器 72 灰階判定器 74 位置判定器 76 補償資料選擇器 78 計算器 80 水平線補償器 44 200901155Figure 13 is a block diagram of the dragon compensation circuit of the hair and the second real thing; Figure 14 is not the upper panel of the liquid crystal panel; the display of the bright typical defect area is shown on the tf crystal panel of the 15th FIG. 16 is a schematic view showing a state in which a bright defect region and a gray defect region are both displayed on a liquid crystal panel; θθ is a diagram of a third embodiment of the present invention. Block diagram of the circuit. 43 200901155 and Fig. 18 are block diagrams of the position determiner shown in Fig. 17. [Main component symbol description] 10 Dark scorpion 11 Normal scorpion 12 Chain pattern 13 Chain sputum 14 Other normal 昼 20 20-bit dilator 30 First compensator 40 Memory 42V First memory 42H Second memory Body 44V ' 44H electrically rewritable stylized read only memory 46V ' 46H register 70 vertical line compensator 72 gray scale determiner 74 position determiner 76 compensation data selector 78 calculator 80 horizontal line compensator 44 200901155
82 灰階判定器 84 位置判定器 86 補償資料選擇器 88 計算器 90 多工器 100 記憶體 101 貢料驅動益 102 閘極驅動器 103 液晶面板 104 時序控制器 105 資料補償電路 110 第一補償器 120 垂直線補償器 122 灰階判定器 124 位置判定器 126 補償資料選擇器 128 加法器 130 減法器 132 、 134 多工器 140 水平線補償器 142 灰階判定器 45 200901155 144 位置判定器 146 補償資料選擇器 148 加法器 150 減法器 152 、 154 多工器 156 多工器 160 第二補償器 162 框判定器 164 晝素位置判定器 166 顫動值選擇器 168 加法器 170 第三補償器 172 灰階判定器 174 位置判定器 176 補償資料選擇器 178 計算器 220 第一補償器 222 灰階判定器 224 位置判定器 226 補償資料選擇器 228 加法器 46 200901155 230 減法器 232 > 234 多工器 322 第一位置判定器 324 第二位置判定器 326 多工器82 gray scale determiner 84 position determiner 86 compensation data selector 88 calculator 90 multiplexer 100 memory 101 tribute drive benefit 102 gate driver 103 liquid crystal panel 104 timing controller 105 data compensation circuit 110 first compensator 120 Vertical line compensator 122 gray scale determiner 124 position determiner 126 compensation data selector 128 adder 130 subtractor 132, 134 multiplexer 140 horizontal line compensator 142 gray scale determiner 45 200901155 144 position determiner 146 compensation data selector 148 Adder 150 Subtractor 152, 154 multiplexer 156 multiplexer 160 second compensator 162 block determinator 164 pixel position determiner 166 flutter value selector 168 adder 170 third compensator 172 gray scale determinator 174 Position determiner 176 compensation data selector 178 calculator 220 first compensator 222 gray scale determiner 224 position determiner 226 compensation data selector 228 adder 46 200901155 230 subtractor 232 > 234 multiplexer 322 first position determination 324 second position determiner 326 multiplexer
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TWI407423B (en) * | 2009-04-03 | 2013-09-01 | Himax Media Solutions Inc | Display data processing apparatus and method |
TWI616116B (en) * | 2016-12-02 | 2018-02-21 | 錼創科技股份有限公司 | Display and repair method thereof |
TWI685834B (en) * | 2017-11-02 | 2020-02-21 | 瑞鼎科技股份有限公司 | Display driving circuit and operating method thereof |
TWI813527B (en) * | 2023-02-23 | 2023-08-21 | 大陸商北京集創北方科技股份有限公司 | Method, system and display for developing display panel compensation algorithm using equivalent model |
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KR101137856B1 (en) * | 2005-10-25 | 2012-04-20 | 엘지디스플레이 주식회사 | Flat Display Apparatus And Picture Quality Controling Method Thereof |
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TWI407423B (en) * | 2009-04-03 | 2013-09-01 | Himax Media Solutions Inc | Display data processing apparatus and method |
TWI616116B (en) * | 2016-12-02 | 2018-02-21 | 錼創科技股份有限公司 | Display and repair method thereof |
US10354981B2 (en) | 2016-12-02 | 2019-07-16 | PlayNitride Inc. | Display and repair method thereof |
TWI685834B (en) * | 2017-11-02 | 2020-02-21 | 瑞鼎科技股份有限公司 | Display driving circuit and operating method thereof |
TWI813527B (en) * | 2023-02-23 | 2023-08-21 | 大陸商北京集創北方科技股份有限公司 | Method, system and display for developing display panel compensation algorithm using equivalent model |
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