200849202 九、發明說明: 【發明所屬之技術領域】 本發明係關於—種負電壓產生 顯示器之電源電路中之負“應用於液晶 【先前技術】 ②路。 液晶顯示器因其輕、帛、輻 於醫療、教育、監控等領域。通f,:^占,被廣泛應用 源電路,用於為電子設備提供工作電源之晶絲員示器包括一電 由於液晶顯示器既使用正電壓 部電源電壓通常為 亦使用負電壓,而外 要-負電壓產生電路,料將正電師電源電路需 負電壓產生電路可接收外部之正=換:負電塵。通常, 然,一爾輪出至電子元件。 另又之負電壓產生電路靈 調制器、電;2 要使用複雜之脈衝寬度 較高。4線圈及相關電子元件’電路結構複雜且成本 【發明内容】 有鏗於此,提供一種電路0士 口 壓產生電路實為必要。 、。間早且成本較低之負電 開關管、一第二― 示開關官、一弟 第- 弟一開關e 、一弟四開關管、一第一雷容、 弟一电各、—開關控制一 电谷 容第一開關管之源極與汲極、該第- 關官之源極與没極接地。該第-開關管之: 種負,生電路,其包括—第—開關管 200849202 極經由該第:r貼Η μ 門關其 官之源極與;及極、該第-雷々 開關官之源極與沒極連接至該第-門闕^電谷、該第四 開關管之沒極接地,Μ ρ/—開Μ Β之源極。該第三 屮嫂 Υ _ Μ弟四開關管之源極連接$兮_广、 出知。该弟一、第二、楚一 逆接至5亥電壓輪 開關控制器。—*二及第四開關管之間極連接至該 相較於先前技術,本發明 度調制器及相關元件,+: U產生电路無需脈衝寬 點。 件具有電路結構簡單、成本較低等優 【實施方式】 請苓閱圖1,係本發明負電壓產生 之電路έ 士谨闯。二六么& 路第一貫施方式 口構圖该負電壓產生電路10包括—笛 飞 11、-第二開關管12 括-弟-開關管 14、-第,15、一第二 H3 -弟四開關管 -A ^ 18 u %谷16、一開關控制器17、 輸入知18及一電壓輸出端19。 該電壓輸入端18經由該第一 極、該第一電容15nmt㈤關6 11之源極與及 該第-” 官12之源極與没極接地。 極,:”:之汲極經由該第三開關管13之源極盘汲 極、该弟二電容i 6、該第四開關管i :表: 至該第二開關管i2之、肩艿。q楚 々柽/、及極連接 該第四門上 開關管13之没極接地, /四開關官14之源極連接至該電壓輸出端19。該第_、 弟-、第三及第四開關管n、12、13、 開關㈣1 17。 问枉運接至该 體:f 一:第二開關管U、12為N型金屬氧化物半導 腹、丄N channel metal oxide cPrmV^^^ . 、 oxide semiconductor,NMOS)電晶體, 200849202200849202 IX. Description of the invention: [Technical field of the invention] The present invention relates to a negative voltage in a power supply circuit of a negative voltage generating display "applied to liquid crystal [prior art] 2 way. The liquid crystal display is light, smashed, and swayed by Medical, education, monitoring and other fields. Through f, : ^, is widely used in the source circuit, the crystal wire indicator for providing working power for electronic equipment includes a power. Because the liquid crystal display uses both the positive voltage part, the power supply voltage is usually Negative voltage is also used, and the external-negative voltage generating circuit is expected to be used by the positive electrician's power supply circuit to receive the external positive voltage = negative: negative electric dust. Usually, one rounds out to the electronic components. In addition, the negative voltage generates a circuit modulator, electricity; 2 to use a complex pulse width is higher. 4 coils and related electronic components 'circuit structure is complex and cost [invention content] In view of this, provide a circuit 0 mouth pressure It is necessary to generate a circuit. A negative switch with a low cost and a low cost, a second switch, a second brother, a switch, a switch, and a fourth switch. The tube, the first first thunder, the younger one each, the switch controls the source and the drain of the first switch tube of the electric valley, the source of the first-off official and the ground of the non-polarity. : a negative, raw circuit, which includes - the first switch tube 200849202 through the first: r paste Η μ gate off its official source and; and the pole, the first - Thunder switch official source and the poleless connection To the first door 阙 ^ electric valley, the fourth switch tube is not grounded, Μ ρ / - open the source of the Β. The third 屮嫂Υ _ Μ brother four switch tube source connection $ 兮 _ Wide, known. The brothers one, the second, Chu Yi reversed to the 5 Hai voltage wheel switch controller. - * The second and fourth switch tubes are connected to the pole to the phase compared to the prior art, the inventive modulator and Related components, +: U generation circuit does not need pulse width. Pieces have simple circuit structure, low cost, etc. [Embodiment] Please refer to Figure 1, which is the circuit of the negative voltage generation of the present invention. The first voltage application circuit 10 includes a flute 11 and a second switch 12 15. A second H3 - brother four switch - A ^ 18 u % valley 16, a switch controller 17, an input 18 and a voltage output 19. The voltage input 18 via the first pole, the first Capacitor 15nmt (5) off 6 11 source and the first -" official 12 source and no pole ground. Pole, ":: the drain of the third switch tube 13 through the source disk, the second capacitor i 6, the fourth switch i: table: to the second switch tube i2, the shoulder. q 々柽 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 、 Switch tube n, 12, 13, switch (4) 1 17. Ask the 枉 to the body: f one: the second switch tube U, 12 is N-type metal oxide semi-conducting belly, 丄N channel metal oxide cPrmV^^^. , oxide semiconductor, NMOS) transistor, 200849202
第三/第四開關管13、14為p型金屬氧化物半導體(PThe third/fourth switching tubes 13, 14 are p-type metal oxide semiconductors (P
channel metal 〇Xlde semiconductor, PM〇S) t 3¾ ft 〇 ^ M 控制器17為一方、、古座士 口口 ^ 士广 」弘曰日把口亥開關Channel metal 〇Xlde semiconductor, PM〇S) t 33⁄4 ft 〇 ^ M Controller 17 is a party, and the ancient sergeant mouth ^ Shi Guang "Hong 曰 把 口 亥 开关
直产正兩 /成為。戎电壓輪入端18被施加一 UV ’該電壓輸出端19用於輸出負電麼。 序二)#:芬:圖2,係圖1所示負電壓產生電路10之時 啟動;|二意圖。其中,V°E表示外部使能訊號,用於 制器17。?表示該開關控制器Π施加至該 為-連續方波。二控制訊號,該控制訊號pDirect production is two / become. The voltage input terminal 18 is applied with a UV' which is used to output a negative power. Sequence 2) #: Fen: Fig. 2, when the negative voltage generating circuit 10 shown in Fig. 1 is activated; Where V°E represents an external enable signal for the controller 17. ? Indicates that the switch controller Π is applied to the continuous-wave. Two control signals, the control signal p
Vln表不轭加於輸入電壓端18之直流正電 〇二表不該電壓輸出端19輸出之負電壓。 門二t〇時’使能訊號V〇E啟動該開關控制器17。該 tl期間’該開關控制器Η輸出之控制訊號p為 』P:該第一開關管11及該第二開關管12導通, —幵1關官13及該第四開關管14關閉。 談第Hi該電壓輸人端18經由導通之該第—開關管U、 人 %谷15及導通之該第二開關管12接地構成迴路 該12V之直产承麼v 广 侵迟稱成迴路。 爪Vink该笔壓輪入端18經由導通之該第 肩關& 11對該第一電容15充雷,今當 — 場能量。當”。亥弟-電容15儲存電 15钱^_田該弟一包谷15充電達到飽和時,該第一電 15儲存之電場能量最大。 谷 :U〜t2期間’該開關控制器17輸出之控制訊號p為 、-’因此該第一開關管u及該第二開關⑽關閉, 200849202 、 該第三開關管13及該第四開關管14導通。 • 此時,該第一電容15之一端經由導通之該第三開關管 13、該第二電容16及導通之該第四開關管14連接至該第 一電容15之另一端,構成一放電迴路。該第一電容15經 由導通之該第三開關管13對該第二電容16充電並同時釋 放電場能量。由於該第二電容16兩端壓差不能突變,而該 第二電容16與該第三開關管13相連接之一端接地,電壓 為零,因此該第二電容16之另一端電壓小於零,即該電壓 輸出端19輸出負電壓。隨着該第一電容15释放所儲存之 電場能量,其二端之電壓差逐漸減小,該第二電容16二端 之電壓差逐漸減小,因此該電壓輸出端19輸出之負電壓之 絕對值逐漸減小。 在t2〜t3期間,該開關控制器17輸出之控制訊號P為 正電位,所以該第一開關管11及該第二開關管12導通, 該第三開關管13及該第四開關管14關閉。 此時,該電壓輸入端18經由導通之該第一開關管11、 1 該第一電容15及導通之該第二開關管12接地構成迴路。 該12V之直流電壓Vin從該電壓輸入端18經由導通之該第 一開關管11對該第一電容15充電,該第一電容15儲存電 場能量。當該第一電容15充電達到飽和時,該第一電容 15儲存之電場能量最大。 該第二電容16經由該電壓輸出端19及後端負載接地 構成迴路並放電,電流從地經後端負載流向該電壓輸出端 19,該電壓輸出端19之負電壓之絕對值減小。 10 200849202 從時間t3開始,該負電壓產生器 期間之工作過程。 岍直後上述ti~t3 本發明負電壓產生電路10無 感線圈等元件,具有電路钍槿筒扣 、又凋制器及電 … 兒路結構間早、成本低等優點。 巧苓閱圖3,係本發明負電壓產 之電路結構圖。該負電壓產生電路50包括式 ”、-第二開關管52、—第三開關管二二: 54、一第—電容55、一第-泰六以 弟四開關管 -電壓輸入端58、一電厂;:出::及一,制器… 私态称出鸲59及一反相器5〇1。 該電壓輸入端58绰由兮筮 Ha ^ 炼、访# 、 、、工由垓弟一開關管51之源極與 卞第 '弟“55、5亥第二開關管52之源極與沒極接地 ;:弟;晴5一經由該第三開關管53之源:及 至該第二電Ϊ 56、該第四開關管54之源極與汲極連接 第—肩關官52之源極。該第三開關管53之汲極接地, =弟四開關管54之源極連接至該電遷輸出端59。 、 弟一開關管51、5 ϋ 相器50表L Γ 該開關控制器57。該反 連接在该開關控制器57盘該笫二另穿 gB 53、54之間極之間。 …亥弟—及弟四開關管 體電曰:開^ Μ、Μ、Η、Μ ^ N型金屬氧化物半導 曰曰體。侧控制器57為—方波生成器,用於控制該 5出^ 52、53、54。該反相器501用於將該開關控制 雨出之控制訊號反相。該電壓輪入端58被施加— L正电壓Vin,該電壓輸出端59輸出負電壓。 凊-併參閱圖4,係圖3所示負電壓產生電路5〇之時 11 200849202 ‘序訊號波型示意圖。Α .啟動該開關控制哭5;、:二。Ε表示外部使能訊號,用於 四開關5!、52、;:表不該開關控制器57施加至該 為-連續方波。v十控制訊號,該控制訊號Ρ 壓,L表示該電壓輸出=^^ 在临:‘輸“ 59輸出之負電壓。 在守間t〇日才,使能訊號 該第三開關管53 w弟一開關管52導通, “ S 53及该弟四開關管54關閉。 日守,5亥電壓輸入端58經由導通 該第一電容55及導通之兮裳一^一 σ"弟一開關管5卜 該12V之直流恭、—汗關官52接地構成迴路。 且机兒壓vin從該電壓輪 :開,對該第一電容55*電,:58二導通之該第 %能量。當該第一 人 弘谷55儲存電 55儲存之電場充電達到飽和時,該第-電容 在ti〜h期間,該開關控制器 負電位,因此該第一開關管51及兮第門之控制訊號p為 該第三開關管53及該第四開;二:、崎52關閉’ 此時,該第—電容55之一端破由^通。 53、該第—泰κ 、、工由蛉通之該第二門闕总 -電容之該第,管 由導通之、,構成-放電迴路。該第 ;\弟 ,管53對該第二電容-充電 200849202 放電場能量。由於該第二電容56兩端壓差不能突變,而該 第二電容56與該第三開關管53相連接之一端接地,電壓 為零,因此該第二電容56之另一端電壓小於零,即該電壓 輸出端59輸出負電壓。隨着該第一電容55釋放所儲存之 電場能量,其二端之電壓差逐漸減小,該第二電容56二端 之電壓差逐漸減小。該電壓輸出端59輸出之負電壓之絕對 值逐漸減小。 在t2〜t3期間,該開關控制器57輸出之控制訊號P為 正電位,因此該第一開關管51及該第二開關管52導通, 該第三開關管53及該第四開關管54關閉。 此時,該電壓輸入端58經由導通之該第一開關管51、 該第一電容55及導通之該第二開關管52接地構成迴路。 該12 V之直流電壓V ^ n從該電壓輸入端5 8經由導通之該第 一開關管51對該第一電容55充電,該第一電容55儲存電 場能量。當該第一電容55充電達到飽和時,該第一電容 55儲存之電場能量最大。 該第二電容56經由該電壓輸出端59及後端負載接地 構成迴路。該第二電容56放電,電流從地流向該電壓輸出 端59,該電壓輸出端59輸出之負電壓之絕對值減小。 從時間t3開始,該負電壓產生器50不斷重複上述 期間之工作過程。 上述負電壓產生電路10亦可具有其它變更設計,如: 該第一及第二開關管11、12替換為二P型金屬氧化物半 導體電晶體,該第三及第四開關管13、14替換為二N型 13 200849202 ^屬氧化物半導體電晶體。該二P型金屬氧化物半導體電 晶體之閘極、源極及汲極之連接關係與該第—及 = : 12之閘極、源極及汲極分別對應。該二N型金尸 ,化物半導體電晶體之閘極、源極及沒極之連接關係= 弟二及第四開關管13、14之閘極、源極及汲極分別對應。: 綜上所述,本發明確已符合發明之要件,麦依、 :專:申請。惟’以上所述者僅為本發明之較佳實施方 =安本發明之範圍並不以上述實施方式為限,舉凡二 之t士援依本發明之精神所作之等效修飾;; 白應涵蓋於以下申請專利範圍内。 次又 【圖式簡單說明】 圖1係本發明負電壓產生電 圖。 峪弟貝她方式之電路結構 圖2係圖1所示電壓產 + 圖3 ^ 時序訊號波型示意圖。 圖。 屯路弟一貫施方式之電路結構 圖4係圖3所示電壓產生雷 [^ ^ ^ 生兒路之時序訊號波型示意圖。 L王要兀件符號說明】 口 第一電容 第二電容 開關控制器 電壓輸入端 電壓輸出端 第一開關 第二開關 第三開關 第四開關 反相器 15、 55 16、 56 17、 57 18、 58 19、 59 負電壓產生電路 10、5〇 管 管 管 管 11、 51 12、 52 13、 53 14、 54 501 14The Vln meter is not conjugated to the DC positive voltage at the input voltage terminal 18. The second voltage is not the voltage output from the voltage output terminal 19. The switch controller 17 is activated by the enable signal V〇E when the door is closed. During the period of tl, the control signal p outputted by the switch controller is "P": the first switch tube 11 and the second switch tube 12 are turned on, and the first switch 13 and the fourth switch 14 are closed. In the first step, the voltage input terminal 18 is grounded via the first switch tube U, the human % valley 15 and the second switch tube 12 which are turned on. The 12V direct production is inferior to the circuit. The pawl Vink is charged to the first capacitor 15 via the first shoulder & 11 which is turned on, now - field energy. When "Hai Di - Capacitor 15 stores electricity 15 money ^ _ Tian the younger one pack Valley 15 charge reaches saturation, the first electric 15 stores the largest electric field energy. Valley: U ~ t2 period 'The switch controller 17 output The control signal p is, - 'the first switch tube u and the second switch (10) are turned off, 200849202, the third switch tube 13 and the fourth switch tube 14 are turned on. • At this time, one end of the first capacitor 15 The third switch tube 13 that is turned on, the second capacitor 16 and the fourth switch tube 14 that is turned on are connected to the other end of the first capacitor 15 to form a discharge circuit. The first capacitor 15 is turned on. The third switch tube 13 charges the second capacitor 16 and simultaneously releases the electric field energy. Since the voltage difference across the second capacitor 16 cannot be abruptly changed, the second capacitor 16 is connected to the third switch tube 13 and grounded at one end. Zero, so that the voltage of the other end of the second capacitor 16 is less than zero, that is, the voltage output terminal 19 outputs a negative voltage. As the first capacitor 15 releases the stored electric field energy, the voltage difference between the two ends gradually decreases. The voltage difference between the two ends of the second capacitor 16 is gradually reduced. Therefore, the absolute value of the negative voltage outputted by the voltage output terminal 19 is gradually decreased. During the period from t2 to t3, the control signal P outputted by the switch controller 17 is a positive potential, so the first switch 11 and the second The switch tube 12 is turned on, and the third switch tube 13 and the fourth switch tube 14 are turned off. At this time, the voltage input terminal 18 is turned on by the first switch tube 11, the first capacitor 15 and the second switch. The switch 12 is grounded to form a loop. The 12V DC voltage Vin is charged from the voltage input terminal 18 via the first switch 11 that is turned on, and the first capacitor 15 stores electric field energy. When the charging reaches saturation, the electric energy stored in the first capacitor 15 is the largest. The second capacitor 16 forms a loop through the voltage output terminal 19 and the back load ground, and discharges current from the ground through the back end load to the voltage output end. 19. The absolute value of the negative voltage of the voltage output terminal 19 is reduced. 10 200849202 The operation process of the negative voltage generator starts from time t3. After the ti~t3, the negative voltage generating circuit 10 of the present invention has no sense coil. The component has the advantages of the circuit buckle, the eliminator and the electric ... The structure of the child road is early, the cost is low, etc. The circuit structure diagram of the negative voltage production of the invention is shown in Fig. 3. The negative voltage generating circuit 50 Included in the formula, the second switch tube 52, the third switch tube 22: 54, a first capacitor 55, a first - Thai six brother four switch tube - voltage input terminal 58, a power plant; : and one, the controller... The private state is called 鸲59 and an inverter 5〇1. The voltage input terminal 58 is composed of 兮筮Ha ^ 炼, ##, ,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,,, The ground is connected to the source of the third switch 53 and the source of the fourth switch 54 and the drain of the fourth switch 54 are connected to the source of the first shoulder 52. The drain of the third switch tube 53 is grounded, and the source of the fourth switch tube 54 is connected to the relocation output terminal 59. The second switch tube 51, 5 ϋ phase unit 50 table L Γ the switch controller 57. The reverse connection is between the poles of the switch controller 57 and the other between the gBs 53 and 54. ... Haidi-and the younger four-switch body electric 曰: open ^ Μ, Μ, Η, Μ ^ N-type metal The oxide semi-conducting body. The side controller 57 is a square wave generator for controlling the 5 outputs 52, 53, 54. The inverter 501 is used to invert the control signal for controlling the rain out of the switch. The voltage wheel terminal 58 is applied with a positive voltage Vin, and the voltage output terminal 59 outputs a negative voltage. 凊 - and referring to FIG. 4, the negative voltage generating circuit 5 shown in FIG. 3 is 11 11 200849202 'Order signal wave Type Fig. 启动 Start the switch to control crying 5;,: 2. Ε indicates the external enable signal for the four switches 5!, 52,;: indicates that the switch controller 57 is applied to the continuous-wave. Ten control signals, the control signal is pressed, L indicates the voltage output = ^^ In the near: 'transmission' 59 output negative voltage. On the day of the squad, the third switch tube 53 is turned on, and the switch tube 52 is turned on. "S 53 and the fourth switch 54 are turned off. The Japanese gate, the 5 hp voltage input terminal 58 is turned on. A capacitor 55 and the conduction of the 兮 一 ^ ^ σ 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 弟 12 12 12 12 12 12 12 12 12 12 12 12 Capacitor 55*,: 58% of the first energy of the conduction. When the electric field charge of the first person Honggu 55 storage battery 55 is saturated, the first capacitor is negative during the ti~h period. Therefore, the control signal p of the first switch 51 and the first gate is the third switch 53 and the fourth switch; the second: the switch 52 is closed. At this time, one end of the first capacitor 55 is broken. 53. The first-Thai, the work is the second threshold of the total-capacitor, the tube is turned on, and constitutes a discharge circuit. The first; the younger, the tube 53 is the second Capacitor-charge 200849202 discharge field energy. Since the voltage difference across the second capacitor 56 cannot be abrupt, the second capacitor 56 is opposite to the third switch 53 One end is grounded and the voltage is zero, so the voltage of the other end of the second capacitor 56 is less than zero, that is, the voltage output terminal 59 outputs a negative voltage. As the first capacitor 55 releases the stored electric field energy, the two ends thereof The voltage difference gradually decreases, and the voltage difference between the two ends of the second capacitor 56 gradually decreases. The absolute value of the negative voltage outputted by the voltage output terminal 59 gradually decreases. During the period from t2 to t3, the output of the switch controller 57 is controlled. The signal P is a positive potential, so the first switch tube 51 and the second switch tube 52 are turned on, and the third switch tube 53 and the fourth switch tube 54 are turned off. At this time, the voltage input terminal 58 is turned on. A switching transistor 51, the first capacitor 55, and the second switching transistor 52 that is turned on are grounded to form a loop. The DC voltage V^n of the 12 V is output from the voltage input terminal 58 via the first switching transistor 51. The first capacitor 55 charges the electric field energy. When the first capacitor 55 is charged to be saturated, the electric energy stored in the first capacitor 55 is the largest. The second capacitor 56 passes through the voltage output terminal 59 and thereafter. The end load ground forms a loop. The second capacitor 56 discharges, current flows from the ground to the voltage output terminal 59, and the absolute value of the negative voltage outputted by the voltage output terminal 59 decreases. From time t3, the negative voltage generator 50 continuously repeats the above-mentioned working process. The negative voltage generating circuit 10 may have other modified designs, such as: the first and second switching tubes 11 and 12 are replaced by two P-type metal oxide semiconductor transistors, and the third and fourth switching tubes 13 and 14 Replaced with two N-type 13 200849202 ^ is an oxide semiconductor transistor. The connection of the gate, source and drain of the two P-type metal oxide semiconductor transistor and the gate and source of the first and the = 12 The pole and the bungee correspond respectively. The connection of the gate, the source and the immersion of the two N-type gold corpses, the semiconductor transistor, the gate, the source and the drain of the second and fourth switches 13, 14 respectively. : In summary, the present invention has indeed met the requirements of the invention, Mai Yi, : special: application. However, the above is only the preferred embodiment of the present invention. The scope of the invention is not limited to the above-described embodiments, and the equivalent modification of the spirit of the present invention; It is covered by the following patent application. Next, the following is a brief description of the negative voltage generating electrogram of the present invention. The circuit structure of her brother's mode Figure 2 is the voltage production shown in Figure 1. Figure 3 ^ Schematic diagram of the timing signal waveform. Figure. The circuit structure of the road mode is shown in Figure 4. Figure 4 is a diagram showing the waveform of the voltage generated by the voltage shown in Figure 3. [^ ^ ^ L Wang wants the symbol description] mouth first capacitor second capacitor switch controller voltage input terminal voltage output terminal first switch second switch third switch fourth switch inverter 15, 55 16, 56 17, 57 18, 58 19, 59 negative voltage generating circuit 10, 5 〇 pipe tube 11, 11, 12, 52 13, 53 14, 54 501 14