TW200846745A

TW200846745A - Driving device of a liquid crystal display device

Info

Publication number: TW200846745A
Application number: TW97116051A
Authority: TW
Inventors: Fumirou Matsuki
Original assignee: Tpo Displays Corp
Priority date: 2007-05-31
Filing date: 2008-05-01
Publication date: 2008-12-01
Also published as: CN101315753B; CN101315753A; TWI364747B; JP4505481B2; JP2008299129A

Abstract

A driving device of a liquid crystal display device comprises a reference voltage generator for generating rough values of gradation voltages, first and second digital-to-analog converters (DACs), a bi-directional analog buffer located between the first and second DACs, a de-multiplexer for selecting one of source bus lines and a switch device. The switch device is located between the first DAC, the bi-directional analog buffer and the de-multiplexer. When the bi-directional analog buffer is configured to a forward buffer, the switch device forwards the data from the first DAC to the bi-directional analog buffer. When the bi-directional analog buffer is configured to a reverse buffer, the switch device connects the output of the bi-directional analog buffer and the de-multiplexer to transmit the source voltage from the second DAC to the selected one of the source bus lines.

Description

200846745 九、發明說明：【發明所屬之技術領域】本發明係有關於一種液晶顯別是能夠爾购細置，特【先前技術】在液晶顯示装置中，階調顯示對於某個晝素進行顯示時，將對應於送到驅動裝置’在驅動裝置中則將此資料：料碼之電壓信號，並且送到其汲極連接到此書對應薄膜電晶體的源極線。再將用來打開日早-之電壓送到連接到此薄膜帝日斤而j間之高曰曰體閘極的間極線上，藉此讓口亥私壓^唬达到液晶單元以改表影像。处7^午獲致所需要的在此情況下，資料碼與驅動電㈣ Γ/:是具有所謂力，"下稱一)曲線的弟圖所示之習知標準結構，即是用來獲得對應於此 gamma曲線的電壓。此此處所示者具有資料對電壓之曲線的關係，，到256 _之㈣，提供之資料碼是從G到255:也^ 二具有8位兀的貢料’根據此資料可以得到所需要的電首先，為了彳寸到電壓範圍，利用從電源到接地端串如18個電阻分壓裔所構成的參考電壓產生器⑺，以電阻200846745 IX. Description of the invention: [Technical field to which the invention pertains] The present invention relates to a liquid crystal display which is capable of being finely mounted. [Prior Art] In a liquid crystal display device, a tone display is displayed for a certain pixel. At this time, it will correspond to the voltage signal sent to the driving device 'in the driving device, and the material is connected to the source line of the corresponding thin film transistor of the book. Then, the voltage used to turn on the early morning is sent to the interpolar line connected to the high-gate gate of the thin film of the film, thereby allowing the private cell to reach the liquid crystal cell to change the image. . In this case, the data code and the drive power (4) Γ/: is a conventional standard structure shown in the figure of the so-called force, "a) curve, which is used to obtain The voltage corresponding to this gamma curve. The one shown here has the relationship between the data and the voltage curve, to 256 _ (four), the information code provided is from G to 255: also ^ two has 8 兀 tribute 'according to this information can get what is needed First of all, in order to reduce the voltage to the range, use a reference voltage generator (7) composed of a string of 18 resistors from the power supply to the ground.

0773-A33161TW 6 200846745 分，的方式取出從V0到ν_π種電壓。4位 =用資料中高位的4個位元，由㈣電壓範圍中選門剧出v，vn+1以表示電壓範圍。在所選擇的電壓範圍内，4位兀線性數位類比轉換器（叫心卜繼㈣ _vener，DAC)則利用資料中低位的4個位元，從盆中 16個電壓中選擇其-。在第1圖的範例中，電麼範圍 ^-V15内的電壓被分配給資料碼奶到⑽ 中輸出其一。 /、第2圖表示在彩色液晶顯示裝置之源極匯流排上施加源極電壓之驅動裝置概略結構的方塊圖，與第i圖相同之部分標記相_參考編碼。另外，第2圖所示者對於3色2行之液晶單元提供電壓的部分。 . 現在就第η行某晝素之紅色液晶單元上施加電屋資料^況來說’如第！圖所朗者相同，由參考電壓產生器10取出17種電麗值，此其間的16種電壓中，是^ 用做為4位元數位類比轉換器的電壓選擇器μ，根壓資料的高位4位元，輸出對應於施加在待顯示晝素二之源極匯流排上電壓範圍的兩個電壓值％和、η，傳送到=位元低位位元（L S Β)數位類比轉換器3丨，以^致此= 壓f圍内對應於資料值的電壓。此電壓以緩衝器又札予二 L定後藉由1 . 3的解多工器51施加於紅色書素，極匯流排smR。另外，為了防止各源極匯流排上較= 電昼變動導致顯示動作遲緩的情況，亦設置了預充電電路60 〇0773-A33161TW 6 200846745 points, the way to take out the voltage from V0 to ν_π. 4 bits = 4 bits in the upper part of the data, and v (vn+1) is selected from the (4) voltage range to indicate the voltage range. In the selected voltage range, the 4-bit 兀 linear digital analog converter (called _vener, DAC) uses the lower 4 bits of the data to select - from the 16 voltages in the basin. In the example of Figure 1, the voltage in the range ^-V15 is assigned to the data code milk to the output of (10). /, Fig. 2 is a block diagram showing a schematic configuration of a driving device for applying a source voltage to a source bus bar of a color liquid crystal display device, and the same reference numeral as the i-th picture is referred to as a reference code. In addition, as shown in Fig. 2, a portion for supplying a voltage to a liquid crystal cell of three colors and two rows is provided. Now let's apply the electricity house information on the red liquid crystal cell of the η row. In the same way, the reference voltage generator 10 takes out 17 kinds of electric value, among which 16 kinds of voltages are used as the voltage selector μ of the 4-bit digital analog converter, and the high voltage of the root pressure data 4 bits, the output corresponds to two voltage values % and η applied to the voltage range of the source busbar of the pixel 2 to be displayed, and is transmitted to the = bit lower bit (LS Β) digital analog converter 3丨, to ^ this = voltage f corresponds to the voltage value of the data. This voltage is applied to the red book and the bus bar smR by the demultiplexer 51 of 1.3 after the buffer is again set. In addition, in order to prevent the display operation from being slow due to fluctuations in the source busbars, the precharge circuit 60 is also provided.

0773-A33161TW 7 200846745 y巾利2此、°構，在某行之源極匯流排上施加带p 動，再進行第紅色行的準備與驅行藍色行的準備與_㈣準備與_ ’接著進行第- 數位為各完== 解多工的動作，並且將第?同的結構。因此，藉由高速化 6或1:⑴便：：圖中1:3的選擇比㈣分之一。夠將所需要的電麼面積縮減到一半或四專利文獻：美國專利公開號2004_0174347。【發明内容】發明所欲解決之問題然而在上述結構中，亦即，在前段+ #、Pe I A、W艮難達到高速化的要求。 I 电屋選擇部分中貴八構成開關矩陣之電曰辦咖 > 甶於刀屋笔阻的阻抗、的單”因素=線性數_比轉換器中類比缓衝器本身的速声、解：'’在後段部分中，由於寄生電容等等因素使“度受夕至^:阻抗和源極匯流排為了解決此問題， 1 ^ ° 位類比轉換器之間再、自思、在電壓選擇器和線性數衝器之性能以增加解^工比緩衝器’提昇類比缓々各、二，丨的％擇比。八、々而，此方案中追加的晶片面積，同時也會增.=力1的=。比缓衝器需要追加0773-A33161TW 7 200846745 y towel 2, ° structure, apply a p-action on the source busbar of a certain line, then prepare for the red line and prepare for driving the blue line and _ (four) preparation and _ ' Then, the first digit is the operation of each completion == multiplex, and the same structure is used. Therefore, by speeding up 6 or 1: (1): The selection ratio of 1:3 in the figure is one of the (four) points. It is sufficient to reduce the required area of electricity to half or four. Patent Document: U.S. Patent Publication No. 2004_0174347. SUMMARY OF THE INVENTION Problems to be Solved by the Invention However, in the above configuration, it is difficult to achieve high speed in the preceding paragraphs + #, Pe I A, and W. I electric house selection part of the expensive eight constitutes the switch matrix of the electric coffee shop> 甶刀 knife knife resistance of the impedance, the single factor = linear number _ ratio converter in the analog buffer itself, the sound, solution: ''In the latter part, due to parasitic capacitance and other factors, the degree is affected by the impedance and source busbars in order to solve this problem, 1 ^ ° bit analog converter between again, self-thinking, in the voltage selector And the performance of the linear number buffer to increase the solution ratio buffer 'to improve the analogy ratio of each of the two, 丨, 丨. 8. In addition, the additional wafer area in this scheme will also increase by == force 1 =. Ratio buffer needs to be added

0773-A3316JTW 8 200846745 .么Γ此’本發明之目的在於提供—種液晶顯示f詈夕：置或能夠以比較簡單的結構讓面積使用^率_ 佳，亚且減少電力消耗。 d文卞較解決問題之技術手段用提供至 1係提供—種液晶顯示I置之驅動裝置，其利 =至源極匯流排之階調電壓，驅動液晶顯示元件粗範圍之:二“ ’用以產生決定出上述階調電壓中扣疋丨白凋电壓之貢料碼的高生器取出表示電壓範圍之值；70攸上述茶考電麼產第::位類比轉換器，其利用上述資料碼兀-擇出上述第一數位類比轉内的詳細值，並且選擇性輪出上述詳細值；耗圍雙向類比緩衝器，接連於上诚筮轉換器 Ί 運於上述弟一和弟二數位類比屮，^f工器’用以將上述第二數位類比轉換器之輪出美仪至源極匯流排之被選擇線；以及開關」設置於上述第一數位類比轉換器和上述雙向衝益之間’其中上述雙向類比缓衝器在正向時，疋將來自上述第-數位類比轉換器的資料切換到上述雔向類比緩衝器，而在反向時，是將上述.第二數位類比ς0773-A3316JTW 8 200846745 . The purpose of the present invention is to provide a liquid crystal display that can be used or can be used in a relatively simple structure to reduce the power consumption. The technical means for solving the problem is provided by the 1 series providing a driving device for liquid crystal display I, which has a step voltage of the source bus bar, and drives the coarse range of the liquid crystal display element: The high-power device that determines the tribute code that determines the buckle white voltage in the above-mentioned tone voltage is taken out to represent the value of the voltage range; 70攸 the above-mentioned tea test product: the:-bit analog converter, which uses the above data code兀-Select the detailed value of the above-mentioned first digit analog conversion, and selectively rotate the above detailed value; The consumption of the bidirectional analog buffer is connected to the above-mentioned brother and the second digit analogy. , the ^f worker 'for selecting the second digit analog converter from the US to the source bus line; and the switch" is disposed between the first digital analog converter and the two-way analogy 'When the bidirectional analog buffer is in the forward direction, 疋 switches the data from the above-mentioned digital-to-digital converter to the above-mentioned analog-to-class analog buffer, and in the reverse direction, the above-mentioned second digital analogy

0773-A33161TW 200846745 換器所得到的源極電__上述解多工h 發明功效由於本發明之_電設定動作和驅動動作時、:：：:類：緩衝器，4 提早使信號穩定，並且以羽^、、衝态，所以能多作。因此’能夠增加解多：二：中加倍的逮度進行鸯器本身的數量。#此j Μ選擇比，減少源極驅奢佳的面積使用效Γ也ΓΓ比較簡單的結構獲致輕文羊也可以減少電力消耗。【實施方式】 =下务考圖式’說明本案發明之實施例。弟3圖表不本發明中潘曰鹿-壯班i 社龜古“ M7F裝置之驅動裝置概4 明。，、衣不白知結構的第2圖對比而進行言 •:以獲得電壓範圍之參考電壓產生器1〇與第2圖所兀王相同，具有18個在電源和接地端之間串聯的分 f電阻，得到利用電阻分壓取出之17種V0至Vl6電壓。這π種屯壓則藉由17位元寬匯流排，送到源極驅動單凡1〇〇的電壓選擇器11〇。此電壓選擇器11〇為4位元數值類比轉換器。 _電壓選擇器110則根據所接收資料的高位4位元，輪出表示電壓範圍的電壓值1和Vn+1，此處為簡化說明係&述成單獨輸出電壓值V。0773-A33161TW 200846745 Source obtained by the converter __The above solution multiplex h The invention is effective due to the _electric setting action and the driving action of the present invention, :::: class: buffer, 4 early to stabilize the signal, and With feathers, and rushing, it can be done more. Therefore, it is possible to increase the number of solutions: two: the double the degree of catching the number of the device itself. #此j ΜSelection ratio, reduce the source of the drive, the best use of the area, and the simpler structure to achieve lighter sheep can also reduce power consumption. [Embodiment] The following is a description of an embodiment of the present invention. The 3rd chart is not in the present invention. Pan Elk-Zhuangban i 社古古" The driving device of the M7F device is 4, and the comparison of the 2nd figure of the clothing is not included. The voltage generator 1 is the same as the king of Fig. 2, and has 18 sub-f resistors connected in series between the power supply and the ground, and obtains 17 kinds of V0 to Vl6 voltages which are taken out by the resistor division. The 17-element wide bus is sent to the source driver 11 〇〇 voltage selector 11 〇. The voltage selector 11 4 is a 4-bit value analog converter. The _ voltage selector 110 is received according to The upper 4 bits of the data, the voltage values 1 and Vn+1 representing the voltage range are taken out, and the simplified output description is described here as a separate output voltage value V.

0773-A33161TW 10 200846745 此電壓值v是透過開w S1送到雙向類 12〇,其右方㈣輸㈣是送到以電容n為基本結構^ 位元線性數位類比轉換器（或稱為C_DAC)130。此線位類比轉換器130則根據低位4位元，從 Μ 内Ιό種電壓中選擇其一。 …i靶圍 ^此’雙㈣比緩衝器、12G可以將信號流切換成相反方向’ Μ前的輸出側做為輸人端接收來 =轉換_视Q13G的輸出並錢行緩衝動作^ 馨輸入侧做為輸出端進行輸出。寻當開關S1切換到輸出侧時，做為緩㈣被送到1:12解多工器14。，再提供至解擇的源極匯流排SB。另外設置有預充電電路15〇了斤= 極匯流排上施加標準電壓之前以既定位準進行充帝"、圖。第4圖表示雙向類比緩衝器㈣之詳細結構电的電路此電路是以差動放大器為基礎和TP2的源極和間極分別互 TP1 虽“通道電晶體TN1和ΤΝ2 = /η = ί= 的没極1通道電晶體ΤΝ3的源極則接地。^體™3 電晶體ΤΝ1的間極為輸出入端[ 閘極為輸出入綱，兩者功能上為體= 入端時，則另-方為輸出端。〇方為輪在電晶體Τ Ρ!和Τ Ρ 2的間極共同連接節點與各自的0773-A33161TW 10 200846745 This voltage value v is sent to the bidirectional class 12〇 through the open w S1, and the right (four) input (four) is sent to the capacitor n as the basic structure ^ bit linear analog analog converter (or C_DAC) 130. The line-bit analog converter 130 selects one of the voltages from the 根据 according to the lower 4 bits. ...i target circumference ^This 'double (four) ratio buffer, 12G can switch the signal flow to the opposite direction' 输出 front output side as the input end of the input = conversion _ view Q13G output and money line buffer action ^ Xin input The side is output as an output. When the seek switch S1 is switched to the output side, it is sent to the 1:12 demultiplexer 14 as a slow (four). , then to the source bus SB of the solution. In addition, there is a pre-charging circuit 15 〇 = = before the application of the standard voltage on the pole bus, the positioning is performed. Figure 4 shows the detailed structure of the bidirectional analog buffer (4). The circuit is based on the differential amplifier and the source and the interpole of TP2 are mutually TP1, respectively. "Channel transistors TN1 and ΤΝ2 = /η = ί= The source of the immersive 1-channel transistor ΤΝ3 is grounded. The body TM3 transistor ΤΝ1 is extremely connected to the input terminal [the gate is extremely output-oriented, and the two functions are the body = the input is the other end. The side is the wheel in the transistor Τ Τ! and Τ Ρ 2 inter-pole joint node and their respective

0773-A33161TW 200846745 汲極間，分別設置開關SW1和SW2。另外，電流源PS 之高電壓側連接到p通道電晶體TP1和TP2的源極共同連接節點，低電壓侧則透過汲極和閘極相連接之自偏壓η 通道電晶體ΤΝ4接地。電源PS的高電壓側則透過串聯之ρ通道電晶體ΤΡ3 和η通道電晶體ΤΝ5接地。電晶體ΤΡ3的閘極則透過開關SW3連接到電晶體ΤΝ1的汲極，並且透過開關SW4 連接到電晶體ΤΝ2的 >及極。 • 另外，電晶體ΤΡ3和ΤΝ5的連接節點，則透過開關 SW5連接到輸出入端[Β]，透過開關SW6連接到輸出入端[A]。在這些開關中，SW1和SW2、SW3和SW4、SW5 和SW6分別構成互補對，即其中一方為導通（ON)，另一方則為不導通（OFF)。接著說明以上所述結構之操作。第5圖表示使用第3圖所示之電路依序操作源極匯 _ 流排模式之示意圖，其所示之模式中，在操作前先用預充電電路150對於各源極匯流排進行預充電，在行1則是在進行設定動作之後進行驅動動作，接著在行2中進行設定動作之後進行驅動動作，也就是在每次依序改變行數便進行設定動作和驅動動作。第6圖表示設定階段（a)和驅動階段(b)中信號流動之模式圖。 * 在（a)的設定階段中，開關S1是切換成電壓選擇·器 0773-A33161TW 12 200846745 110和雙向缓衝器120連接的狀態。由電壓選擇器110所選擇的電壓，透過雙向類比缓衝器120，在線性數位類比轉換器130產生對應於資料碼的電壓。接著在（b)的驅動階段中，雙向緩衝器120的輸出和輸入顛倒，開關S1則切換到解多工器140侧，所以線性數位類比轉換器130中對應資料碼所產生的電壓，透過雙向緩衝器120和開關S1，送到解多工器140，提供至解多工器140從12條源極匯流排中所指定者。 • 第7圖和第9圖表示雙向緩衝器120之動作的電路圖。第7圖是相當於設定階段，即雙向缓衝器120是當作正方向缓衝器的情況，其中輸出入端[A]是輸入端，輸出入端[B]是輸出端。其中開關SW1、SW4、SW6為開路狀態，開關SW2、SW3、SW5為閉路狀態。在此情況中，利用輸入端[A]上所施加之電壓，電晶體TN1呈導通狀態而以電晶體TP1流過電流的範圍内流 • 過電流’所以利用電晶體TN1 >及極侧的電壓^電晶體TP 3 上有電流流過。由於開關SW5呈導通狀態，所以做為輸出端的電晶體TN2閘極上存在一電壓，電晶體TN2為導通狀態，而由於此電晶體與電晶體TN1構成一成對結構，所以受到電流鏡作用，電晶體TN2上流過的電流與電晶體TN1相同。由於電晶體TN2的汲極電壓為電晶體 TP1和TP2之共同閘極電壓，輸出端[B]上即呈現平衡且穩定的電壓。此電壓提供至線性類比數位轉換器130，以 0773-A33161TW 13 200846745 產生對應於貧料碼之低位位兀貢料的電堡。第8圖表示線性數位類比轉換器130結構的電路圖，其中包含一端接地之5個並聯電容器，其電容值以C 為單元電容，分別為10、10 20 4€、80在這些電容器中，則分別具有與電容串聯而設置的開關SW11、 SW12、SW13、SW14、SW15，分別利用資料中的 Dref、 DO、Dl、D2、D3來決定開關元件的開路閉路狀態，以便對於從1C到16C為止的電容值進行充電。 ⑩ 驅動階段則如第9圖所示，透過雙向缓衝器120，將藉由第8圖之線性數位類比轉換器130中所儲存電荷得到之電壓取出。因此，雙向緩衝器120被當做反方向的缓衝器。因此，如第9圖所示，輸出入端[6]做為輸入端，輸出入端 [A]做為輸出端。其中開關SW1、SW4、SW6為閉路狀態，開關SW2、SW3、SW5為開路狀態。此時的操作與第7圖的情況相同，利用輸入端[B] ⑩上所施加之電壓，電晶體TN2呈導通狀態而以電晶體TP2 流過電流的範圍内流過電流^所以利用電晶體TN 2 >及極侧的電壓，電晶體TP3上有電流流過。由於開關SW6呈導通狀態，所以做為輸出端的電晶體TN1閘極上存在一電壓，電晶體TN1為導通狀態，而由於此電晶體與電晶體TN2構成一成對結構，所以受到電流鏡作用，電晶體 TN1上流過的電流與電晶體TN2相同。由於電晶體TN1 的汲極電壓為電晶體TP1和TP2之共同閘極電壓，輸出 0773-A33161TW 14 200846745 、[]上即呈現平衡且穩定的冑壓的切換動作，送屮稱_ 猎由開關si 、 I出對應電壓到解多工器上。為了簡化說明，以上所述實際上定階段以兩階段來實行。 π將弟5圖中設乐10圖即表示此模式的型態，很階段是由設定階p 4 tbI^ 疋了以看出設定又疋UI又1和設定階段2所構成。此杈式下整體動作的型態也可以爯二々灸土 μ 田承11圖看出。冉一人 > 考弟8圖，在設定階段1 入 SW11-SW15 ^ ϋ pq ^ u a 中王部開關 \了者主閉路狀態，來自類比緩衝哭的θ0773-A33161TW 200846745 Set the switches SW1 and SW2 between the drains. In addition, the high voltage side of the current source PS is connected to the source common connection node of the p channel transistors TP1 and TP2, and the low voltage side is grounded through the self-biased n-channel transistor ΤΝ4 connected to the drain and the gate. The high voltage side of the power supply PS is grounded through the series of p-channel transistors ΤΡ3 and n-channel transistors ΤΝ5. The gate of the transistor ΤΡ3 is connected to the drain of the transistor 透过1 through the switch SW3, and is connected to the > and the electrode of the transistor 透过2 through the switch SW4. • In addition, the connection node of the transistor ΤΡ3 and ΤΝ5 is connected to the input/output terminal [Β] through the switch SW5, and is connected to the output terminal [A] through the switch SW6. Among these switches, SW1 and SW2, SW3 and SW4, SW5 and SW6 form complementary pairs, that is, one of them is ON and the other is OFF. Next, the operation of the above structure will be explained. Figure 5 is a schematic diagram showing the sequential operation of the source sink-stream pattern using the circuit shown in Figure 3, in which the pre-charge circuit 150 is precharged for each source bus before operation. In the row 1, the driving operation is performed after the setting operation is performed, and then the driving operation is performed after the setting operation is performed in the line 2, that is, the setting operation and the driving operation are performed every time the number of lines is sequentially changed. Fig. 6 is a view showing a pattern of signal flow in the setting phase (a) and the driving phase (b). * In the setting phase of (a), the switch S1 is switched to a state in which the voltage selection device 0773-A33161TW 12 200846745 110 and the bidirectional buffer 120 are connected. The voltage selected by voltage selector 110 is passed through bidirectional analog buffer 120 to produce a voltage corresponding to the data code at linear digital analog converter 130. Then, in the driving phase of (b), the output and input of the bidirectional buffer 120 are reversed, and the switch S1 is switched to the side of the demultiplexer 140. Therefore, the voltage generated by the corresponding data code in the linear digital analog converter 130 is bidirectional. Buffer 120 and switch S1 are sent to demultiplexer 140, which is provided to demultiplexer 140 from the one specified in the 12 source bus bars. • Figures 7 and 9 show circuit diagrams of the action of the bidirectional buffer 120. Fig. 7 is a diagram corresponding to the setting phase, i.e., the bidirectional buffer 120 is used as a positive direction buffer, wherein the input/output terminal [A] is an input terminal, and the input/output terminal [B] is an output terminal. The switches SW1, SW4, and SW6 are in an open state, and the switches SW2, SW3, and SW5 are in a closed state. In this case, the transistor TN1 is turned on by the voltage applied to the input terminal [A], and flows through the current flowing through the transistor TP1. • Overcurrent 'uses the transistor TN1 > There is a current flowing through the voltage ^ transistor TP 3 . Since the switch SW5 is in an on state, a voltage exists on the gate of the transistor TN2 as an output terminal, and the transistor TN2 is in an on state, and since the transistor and the transistor TN1 form a pair structure, it is subjected to a current mirror function. The current flowing through the crystal TN2 is the same as that of the transistor TN1. Since the drain voltage of the transistor TN2 is the common gate voltage of the transistors TP1 and TP2, a balanced and stable voltage is present at the output [B]. This voltage is supplied to a linear analog-to-digital converter 130, which generates a bunker corresponding to the low-position tribute of the poor material code at 0773-A33161TW 13 200846745. Figure 8 is a circuit diagram showing the structure of the linear-digital analog converter 130, which includes five parallel capacitors grounded at one end, the capacitance values of which are C, which are 10, 10 20 4 €, 80, respectively, in these capacitors, respectively The switches SW11, SW12, SW13, SW14, and SW15 provided in series with the capacitor are respectively determined by Dref, DO, D1, D2, and D3 in the data to determine the open circuit closed state of the switching element so as to be a capacitance from 1C to 16C. The value is charged. In the driving stage of Fig. 9, as shown in Fig. 9, the voltage obtained by the electric charge stored in the linear-digital analog converter 130 of Fig. 8 is taken out through the bidirectional buffer 120. Therefore, the bidirectional buffer 120 is treated as a buffer in the reverse direction. Therefore, as shown in Fig. 9, the input/output terminal [6] is used as an input terminal, and the output terminal [A] is used as an output terminal. The switches SW1, SW4, and SW6 are in a closed state, and the switches SW2, SW3, and SW5 are in an open state. The operation at this time is the same as in the case of Fig. 7, and the transistor TN2 is turned on by the voltage applied to the input terminal [B] 10, and the current flows in the range where the current flows through the transistor TP2. TN 2 > and the voltage on the pole side, current flows through the transistor TP3. Since the switch SW6 is in an on state, a voltage exists on the gate of the transistor TN1 as an output terminal, and the transistor TN1 is in an on state, and since the transistor and the transistor TN2 form a pair structure, it is subjected to a current mirror function. The current flowing through the crystal TN1 is the same as that of the transistor TN2. Since the gate voltage of the transistor TN1 is the common gate voltage of the transistors TP1 and TP2, the output of the 0773-A33161TW 14 200846745, [] is a balanced and stable switching action, and the nickname _ hunting by the switch si And I output the corresponding voltage to the demultiplexer. In order to simplify the explanation, the above-described actual stages are actually implemented in two stages. The pattern of the mode is shown in π. The picture of the mode is shown in Fig. 5, and the stage is formed by setting the level p 4 tbI^ to see the setting, UI and 1 and setting stage 2. The type of the overall movement under this squat can also be seen in the figure of 11 々2 moxibustion soil.冉一人 > Kaodi 8 map, in the setting stage 1 into SW11-SW15 ^ ϋ pq ^ u a in the king switch \ has the main closed state, from the analog buffer crying θ

Vn，將全部電容器充電至Vn。 ’“々輪入疋開關階段”’開關_呈閉路狀態，而 - 5則根據貧料碼控制其開路閉路狀態。妾者，驅動階段時讓全部開關呈二緩衝器取出電壓。岭狀心、，攸類比猎此’設定階段時從電塵選擇器取出兩個電壓V σ _而決定出範圍，在線性數位類比轉換器“ J正確地決定出提供到源極匯流排上的電壓。、，半段的驅動階段則與第6圖的說明相^。置中叙V ί、圖是用來說明本發明液晶顯示|置之驅動裝動作轉習知技術比較的波形圖。 ί+錢^12圖中’在設定階段，需要注意的是線性數位類才、盗的高電壓侧充電節，點Vch和低電塵側充 Vcl中電壓的變化。亦即’從苓考電壓產生器所獲得並且由電壓選擇器Vn, charging all capacitors to Vn. The 'switching stage ” switch' is in a closed state, and -5 controls its open circuit closed state according to the poor material code. In the drive phase, all the switches are in the second buffer to take out the voltage. The ridge-like heart, the 攸 analogy takes this two voltages V σ _ from the dust selector to determine the range, and the linear digital analog converter “J correctly determines the supply to the source busbar. The driving phase of the voltage, , and half is compared with the description of Fig. 6. The figure is a waveform diagram for explaining the comparison of the driving mechanism of the liquid crystal display of the present invention. + Money ^12 in the figure 'In the setting stage, it is necessary to pay attention to the linear digital class, the high-voltage side charging section of the stolen, the voltage change of the Vch and the low-dust side charging Vcl. That is, 'from the reference voltage Obtained by the voltage selector

0773-A33161TW 15 200846745 比:換器取出電壓……時由於参考轉產生器电路及數位類比轉換器之寄曰曰體^阻抗、以0773-A33161TW 15 200846745 Ratio: When the converter takes out the voltage... When the reference converter circuit and the digital analog converter are connected, the impedance is

Vcl中的電她比較緩；二相，，在郎點Vch和外在|_間，基板電位:::，長間。另而比較緩慢。幵也口為緩衝放大的特性時和階段 :;:r況來得快，可間内執行到驅動階段。心叹疋卩白奴期衝放多工昇，並且㈣減少緩定本二=乂較佳實施例揭露如上，然其並非用以限明dr任何熟習此項技藝者’在不脫離本發 >…月：伴；：，當可做些許的更動與潤飾，因此本保護乾圍以見後附之申請專利範圍所界定者為【圖式簡單說明】 j 用以從資料碼獲致驅動電塵之習知標準結構的示意圖。加源極電壓之驅動裝置概略結構的方塊第2圖表示在彩色液晶顯㈣置之源極匯流排上施圖The electricity in Vcl is relatively slow; the two phases, between the Lang point Vch and the external |_, the substrate potential:::, long. It is slower.幵口 is the characteristics of the buffer amplification time and phase :;: r condition is fast, can be executed to the drive phase. The heart sighs the white slave period and rushes to the multiplex, and (4) reduces the mitigation. The second embodiment is disclosed above. However, it is not intended to limit the use of any skilled person in the art. ... month: companion;:, when you can make some changes and retouching, therefore, the protection of the protection is defined by the scope of the patent application attached as follows [simplified description of the drawing] j is used to obtain the driving dust from the data code. A schematic diagram of a conventional standard structure. Block diagram of the schematic structure of the driving device with the source voltage is shown in Fig. 2, which is shown on the source busbar of the color liquid crystal display (four)

0773-A33161TW 16 200846745 第3圖表示本發明中液晶顯示裝置之驅動裝置概略結構的方塊圖。第4圖表示雙向類比缓衝器120之詳細結構的電路圖。第5圖表示使用第3圖所示之電路依序操作源極匯流排模式之示意圖。第6圖表示設定階段（a)和驅動階段(b)中信號流動之模式圖。 • 第7圖表示雙向缓衝器120之順方向動作的電路圖。第8圖表示線性數位類比轉換器130結構的電路圖。第9圖表示雙向緩衝器120之反方向動作的電路圖。第10圖表示兩階段設定階段模式之示意圖。第11圖表示整體動作模式之示意圖。第12圖是用來說明本發明液晶顯示裝置之驅動裝置中動作與習知技術比較的波形圖。 • 【主要元件符號說明】 10〜參考電壓產生器； 20〜電壓選擇器； 30〜4位元線性數位類比轉換器； 31、32〜4位元低位數位類比轉換器； 41、42〜缓衝器； 51、52〜解多工器； 60〜預充電電路； SB1R、SB1G、SB1B、SB2R、SB2G、SB2B〜源極匯流排； 0773-A33161TW 17 200846745 « 100〜源極驅動單元； 110〜電壓選擇器； 120〜雙向類比緩衝器； 130〜線性數位類比轉換器； 140〜解多工器； 150〜預充電電路； SI、SW1-SW6、SW11-SW15〜開關； TN1-TN5、TP1-TP3〜電晶體； PS〜電流源。0773-A33161TW 16 200846745 Fig. 3 is a block diagram showing a schematic configuration of a driving device of a liquid crystal display device of the present invention. Fig. 4 is a circuit diagram showing the detailed structure of the bidirectional analog buffer 120. Figure 5 is a diagram showing the sequential operation of the source bus mode using the circuit shown in Figure 3. Fig. 6 is a view showing a pattern of signal flow in the setting phase (a) and the driving phase (b). • Fig. 7 is a circuit diagram showing the forward operation of the bidirectional buffer 120. Fig. 8 is a circuit diagram showing the structure of the linear digital analog converter 130. Fig. 9 is a circuit diagram showing the reverse operation of the bidirectional buffer 120. Figure 10 shows a schematic diagram of a two-stage set phase mode. Figure 11 is a schematic diagram showing the overall operation mode. Fig. 12 is a waveform diagram for explaining the comparison between the operation of the driving device of the liquid crystal display device of the present invention and a conventional technique. • [Main component symbol description] 10~ reference voltage generator; 20~ voltage selector; 30~4 bit linear digital analog converter; 31, 32~4 bit low digit analog converter; 41, 42~ buffer 51, 52~demultiplexer; 60~ precharge circuit; SB1R, SB1G, SB1B, SB2R, SB2G, SB2B~source busbar; 0773-A33161TW 17 200846745 « 100~source drive unit; 110~ voltage Selector; 120~ bidirectional analog buffer; 130~ linear digital analog converter; 140~ demultiplexer; 150~ precharge circuit; SI, SW1-SW6, SW11-SW15~ switch; TN1-TN5, TP1-TP3 ~ transistor; PS ~ current source.

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Claims

200846745 镇十、申請專利範圍： 1 ·種液晶顯示裝置之驅動裝極匯流排之階哨帝厭/、利用鍉供至源 ▲卩之^凋包壓，驅動液晶顯示元件，其包括：麥考1壓產生#，用以產生決粗範圍之電壓值；上XU白凋屯壓中第一數位類比轉換器，其利用指定階調電叙資料㈣if料顯讀象液晶單元丄郎馬的回位位兀，從上述袁者雷厭客生态取出表示電壓範圍之值； " '^產第二數位類比轉換器，1利元，選擇出卜、f筮一叙 ^ 上述貝料碼的低位位出上处弟一數位類比轉換器所指定之内的詳細值，並且選擇性輪出上述詳細值；圍雙向類比缓衝器’接連於上轉換器之間丨一數位卖貝比 ^多工器，用以·將上述第二數位類比轉換器之，提供至源極匯流排之被選擇線；以及、雨開關’設置於上述第—數位類比轉類比緩衝器之間，盆中J_、+-雒Ak又向曰 …/、中上述雙向類比緩衝器在正向時， =c上：4第-數位類比轉換器的資料 2比缓衝器’而在反向時’是將上述第二二= 換S所侍㈣祕電4切_上輯多工器。 2.如申請專利範圍第i項所述之動裝置，其中上述參考電题產在哭1古、―垂^ 丁衣置之驅土產生口口具有稷數個串聯之带且’ A各連接節點取出利用電阻分塵所產生的電屢。I 3·如申請專利範圍第1項所述之液晶顯示褒置之驅 0773-A33161TW 19 200846745 m 動裝置，其中上述雙向類比缓衝器包括：差動電晶體對，其個別閘極作為輸出入端；以及輸出端電壓上拉/下拉電路，其利用在上述輸.出入端之一方上施加電壓，使得上述輸出入端之另一方上電壓提早穩定。 4·如申請專利範圍第3項所述之液晶顯示裝置之驅動裝置，其中更包括複數開關對，其彼此互補地呈開路閉路狀態，使得利用上述差動電晶體對之中輸入侧所產生的電壓，提供電壓至輸出端。200846745 Town 10, the scope of application for patents: 1 · The driving device of the liquid crystal display device is equipped with the squad of the squadron, and the use of the 鍉 supply to the source ▲ 卩 ^ 、、、、、、、、、、、、、、、、、、、、 1 pressure generation #, used to generate the voltage value of the thick range; the first digital analog converter in the XU white smashing pressure, which uses the specified tone to adjust the data (4) if the material is read back like the liquid crystal cell In the above, the value of the voltage range is taken out from the above-mentioned Yuan Zhe Lei yoke ecology; " '^ produces the second digit analog converter, 1 ray, selects the bu, f筮一叙 ^ the lower position of the above-mentioned shell code The detailed value specified by the digital analog converter is selected, and the above detailed value is selectively rotated; the bidirectional analog buffer is connected to the upper converter to sell the Babi^ multiplexer And the second digital analog converter is provided to the selected line of the source bus; and the rain switch is disposed between the first digital analog analog buffer, and the J_, +- in the basin雒Ak is again 曰.../, In the above two-way analog buffer in the forward direction, =c: 4 data of the digital-to-digital analog converter of the converter is compared to the buffer 'in the reverse direction' is the second two = change S (four) 4 cut _ on the multiplexer. 2. The mobile device according to item i of the patent application scope, wherein the reference electric quantity is produced in the crying 1 ancient, and the dredging of the drowning clothes has a plurality of tandem belts and the 'A connection The node takes out the electricity generated by the resistor dust. I. The liquid crystal display device of claim 1, wherein the bidirectional analog buffer comprises: a differential transistor pair, and the individual gates serve as an input and output. And an output voltage pull-up/pull-down circuit that applies a voltage on one of the input, output, and input terminals to stabilize the voltage on the other side of the output terminal. 4. The driving device for a liquid crystal display device according to claim 3, further comprising a plurality of pairs of switches which are complementary to each other in an open circuit closed state so as to utilize the input side of the differential transistor pair Voltage, providing voltage to the output.

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