200826161 九、發明說明： 【發明所屬之技術領域】 本發明係有關一種製備SGOI及GeOI之半導體結構的方法。 【先前技術】 在先别技術中，絕緣層上覆石夕（silicon on insulator，SOI) 結構通系疋藉由所謂的氧之離子植入之隔離（separati〇n by i〇n implantation 〇f oxygen ’ SIMOX )製程或以層轉移方法而製備。 在SIMOX方法中，以高劑量將氧植入至一矽基板中，隨後 在高溫（>1200°C )下熱處理及氧化該基板，以製得一氧化埋 層於該矽基板中。 在層轉移方法中，一分離層於接近一矽晶圓（稱為「施體晶 圓」，donor wafer)表面下方產生。該分離層舉例言之係包含 腔體，其通常係藉由植入氲於該區域中而製得。然後以此方法 製備之施體晶圓連接至一第二晶圓，即支撐晶圓（supp〇rt wafer)(黏結）上。隨後沿著該分離層剝離施體晶圓。藉此使 施體晶圓上一層或多層轉移至·支撐晶圓上。以層轉移方法製備 SOI 晶圓係描述於諸如 EP 533551 Al、WO 98/52216 A1 或 W0 03/003430 A2等專利文獻。 SIMOX及層轉移方法亦適於製備SGOI及/或GeOI之結構： US 2005/0153487 A1揭露一種製備SG0I基板的方法，其包 含以100-220千電子伏特（keV)之植入能量植入一矽基板之 二種氧植入（高劑量及低劑量），隨後在該基板上沉積厚度為 10-500奈米（nm)之一含鍺層（例如為—矽錯層，Si_Ge layer), 6 200826161 然後熱處理該基板，該熱處理係由多個次步驟所組成。 T· Tezuka 等人於 Applied Physics Letters 第 79 卷 1798-1800 頁報 ’ 糟由化學 Ά相沉積（chemical vapor deposition，CVD ) 在一 SIMOX基板上沉積一矽鍺層，隨後在氧氛圍中進行熱處 理，以氧化該基板，藉由二氧化矽層（si〇2層）於上下方黏結 該石夕鍺層’該Si〇2層對於鍺原子構成一擴散障礙，使其在經壓 縮矽鍺層内產生均勻鍺斷面。移除上方之Si〇2層後，獲得一具 有均勻鍺斷面之無差排的SG0I基板。 US 2005/0039100 A1描述一種製備SG0I及GeOI之結構的 方法，其中GeOI結構藉由1〇〇千電子伏特能量植入氫離子至 含鍺、黏結支撐晶圓之氧化施體晶圓中，然後進行熱處理而轉 移至支撐晶圓上。藉此產生GeOI基板包含一鍺層及Si02埋層 (buried Si02 layer)，在該Si02埋層和鍺層之間存在一矽分離 層。 由於使用高能量植入技術（氧、氩植入能量為100-220千電 子伏特），及附加製程步驟，例如在層轉移方法中之黏結步驟， 或因為非常高的製程溫度，先前技術所知之方法係相對複雜且 昂貴。 【發明内容】 因此’本發明之目的係提供一種實質上更具成本效益之製備 SGOI和GeOI半導體結構的方法。 本發明之目的藉由一種製備SGOI和GeOI半導體結構的方 法而得以實現，該方法包含：a)提供一單晶矽基板；b)在該 7 200826161 基板上沉積一鍺層，其包含至少一鍺原子層；C)植入氧離子於 具有一鍺層之基板中，該植入能量係大於或等於1電子伏特 (eV)且小於或等於1千電子伏特；d)在大於或等於600°C且 小於938°C之溫度下熱處理該經氧植入的基板。 首先，於步驟a)中製備一單晶矽基板。 較佳為經拋光之一半導體晶圓，其根據先前技術藉由拉提一 單晶矽、自該單晶切割一晶圓、進行機械製程步驟如研磨或研 / 削、清洗和蝕刻步驟及藉由拋光使該晶圓表面平滑而製得。 隨後，於步驟b)中沉積一鍺層至該基板上。較佳為藉由先前 技術之化學汽相沉積加以完成。所沉積之鍺層包含至少一鍺原 子層。 該鍺層可藉由假晶（pseudomorphically)沉積或沉積為一鬆 弛層。 為了獲得一假晶層（pseudomorphic layer )，依據所選之沉積 溫度，其需保持在低於該沉積溫度下之各臨界厚度。 v 據文獻中報導’錯在碎上之假晶成長的臨界厚度為d<d臨界’ d 約為 2-4 奈米（J. W. Matthews，A.E. Blakeslee 在 J. Crystal Growth，27,（ 1974) 118 中）。 該沉積之鍺層厚度較佳為小於鍺在矽上之假晶成長的臨界 厚度。此可阻止鬆弛過程而導致在錯層中的差排。 然而，亦可沉積較厚層。在此情況下，將會發生鍺層的至少 部分鬆弛。 步驟c)中，植入氧離子於具有一鍺層之基板中。該植入能量 8 200826161 為1電子伏特至1千電子伏特。 該植入能量較佳為1電子伏特至500電子伏特。 植入劑量較佳為大於或等於1X 1〇14/平方公分且小於或等於 1 Χίο17/平方公分。較佳地選擇該劑量作為熱處理之後所欲最終 氧化物厚度的函數。 在此情況下，淺薄地植入氧離子，且較佳為僅植入至該基板 表面下方大於或等於10奈米且小於或等於30奈米之深度。 p 此外，植入方向較佳選擇為使氧與鍺晶格之交互作用盡可能 小。其係藉由沿著<110>方向（通道效應）植入而實現。 更進一步，準確的植入條件較佳係選擇為使在已沉積至矽基 板上之鍺層中無植入誘導之缺陷。此亦利用在低植入能量下， 鍺與氧彈性地交互作用。 因此，較佳為在植入期間額外加熱該矽基板至200°C或更低 之溫度，以壓制甚至更大的植入缺陷的形成。 在氧植入結束後，較佳係在該鍺層上沉積一薄矽層（覆層）。 % 較佳藉由化學汽相沉積加以完成。 . 該沉積之矽層厚度較佳為大於或等於1奈米且小於或等於 100奈米，更佳為大於或等於5奈米且小於或等於50奈米。 該覆層之功能為在隨後的熱處理之前或期間保護該薄鍺 層，促進矽晶圓的處理且使在隨後熱處理期間得以選擇較寬敞 的製程窗口。 此外，步驟d)中，在大於或等於600°C且小於938°C之溫度 下熱處理該具有一鍺層且經氧植入的基板。 9 200826161 該處理溫度較佳為大於或等於650°C且小於或等於800°C。 較佳地，熱處理之持續時間係低於1小時，典型為10至30 分鐘。 由於該熱處理，氧擴散遠至鍺界面。由於該鍺層構成一擴散 阻礙物，因此氧擴散至此停止。200826161 IX. DESCRIPTION OF THE INVENTION: TECHNICAL FIELD The present invention relates to a method of fabricating a semiconductor structure of SGOI and GeOI. [Prior Art] In the prior art, the silicon on insulator (SOI) structure of the insulating layer is isolated by so-called oxygen ion implantation (separati〇n by i〇n implantation 〇f oxygen 'SIMOX' process or prepared by layer transfer method. In the SIMOX method, oxygen is implanted into a substrate at a high dose, and then the substrate is heat-treated and oxidized at a high temperature (>1200 ° C) to obtain an oxide buried layer in the substrate. In the layer transfer method, a separation layer is produced under the surface of a wafer (referred to as a "donor wafer"). The separation layer, for example, comprises a cavity which is typically produced by implantation in the region. The donor wafer prepared in this way is then attached to a second wafer, a support wafer (bond). The donor wafer is then stripped along the separation layer. Thereby, one or more layers of the donor wafer are transferred onto the support wafer. The preparation of SOI wafers by the layer transfer method is described in patent documents such as EP 533551 Al, WO 98/52216 A1 or WO 03/003430 A2. The SIMOX and layer transfer methods are also suitable for the preparation of SGOI and/or GeOI structures: US 2005/0153487 A1 discloses a method of preparing a SG0I substrate comprising implanting an implant energy at 100-220 kiloelectron volts (keV) Two kinds of oxygen implantation (high dose and low dose) of the substrate, and then depositing a germanium-containing layer (for example, a germanium-stagger layer, Si_Ge layer) having a thickness of 10 to 500 nanometers (nm) on the substrate, 6 200826161 The substrate is then heat treated and consists of a plurality of sub-steps. T. Tezuka et al., Applied Physics Letters, Vol. 79, 1798-1800, published a chemical vapor deposition (CVD) deposition of a layer of germanium on a SIMOX substrate followed by heat treatment in an oxygen atmosphere. To oxidize the substrate, the ruthenium layer is bonded to the upper and lower layers by a layer of ruthenium dioxide (the layer of si 〇 2). The layer of Si 〇 2 forms a diffusion barrier for the ruthenium atoms, so that it is generated in the compressed ruthenium layer. Evenly cross section. After removing the upper Si 2 layer, a SG0I substrate having a uniform tantalum cross section was obtained. US 2005/0039100 A1 describes a method for preparing a structure of SG0I and GeOI, wherein a GeOI structure implants hydrogen ions into an oxidized donor wafer containing ruthenium, bonded support wafers by 1 〇〇 keV energy, and then heat treatment. Transfer to the support wafer. The GeOI substrate is thereby formed to include a germanium layer and a buried SiO 2 layer, and a germanium separation layer exists between the SiO 2 buried layer and the germanium layer. Due to the use of high energy implantation techniques (oxygen, argon implant energy of 100-220 keV), and additional processing steps, such as bonding steps in layer transfer methods, or because of very high process temperatures, known in the prior art The method is relatively complicated and expensive. SUMMARY OF THE INVENTION Accordingly, it is an object of the present invention to provide a substantially more cost effective method of fabricating SGOI and GeOI semiconductor structures. The object of the present invention is achieved by a method of fabricating a SGOI and GeOI semiconductor structure, the method comprising: a) providing a single crystal germanium substrate; b) depositing a germanium layer on the 7 200826161 substrate, comprising at least one germanium An atomic layer; C) implanting oxygen ions in a substrate having a germanium layer having an energy system greater than or equal to 1 electron volt (eV) and less than or equal to 1 kiloelectron volt; d) greater than or equal to 600 ° C The oxygen-implanted substrate is heat treated at a temperature of less than 938 °C. First, a single crystal germanium substrate is prepared in step a). Preferably, the semiconductor wafer is polished by drawing a single crystal germanium, cutting a wafer from the single crystal, performing mechanical processing steps such as grinding or grinding/cutting, cleaning and etching steps and borrowing according to the prior art. It is made by polishing to smooth the surface of the wafer. Subsequently, a layer of germanium is deposited onto the substrate in step b). This is preferably accomplished by chemical vapor deposition of the prior art. The deposited germanium layer comprises at least one germanium layer. The layer of germanium may be deposited or deposited as a relaxed layer by pseudomorphically. In order to obtain a pseudomorphic layer, it is required to maintain a critical thickness below the deposition temperature depending on the deposition temperature selected. v According to the literature, the critical thickness of the pseudo-crystal growth of the fault is d<d-critical' d is about 2-4 nm (JW Matthews, AE Blakeslee in J. Crystal Growth, 27, (1974) 118 ). The thickness of the deposited tantalum layer is preferably less than the critical thickness of the pseudomorphic growth of the tantalum on the tantalum. This can prevent the relaxation process from causing a difference in the staggered layer. However, thicker layers can also be deposited. In this case, at least partial relaxation of the enamel layer will occur. In step c), oxygen ions are implanted in a substrate having a layer of germanium. The implant energy 8 200826161 is from 1 eV to 1 kV. The implant energy is preferably from 1 eV to 500 eV. The implant dose is preferably greater than or equal to 1X 1〇14/cm 2 and less than or equal to 1 Χίο 17/cm 2 . The dose is preferably selected as a function of the desired final oxide thickness after heat treatment. In this case, oxygen ions are implanted shallowly, and preferably implanted only to a depth of 10 nm or less and less than or equal to 30 nm below the surface of the substrate. In addition, the direction of implantation is preferably chosen such that the interaction of oxygen and helium lattice is as small as possible. This is achieved by implantation along the <110> direction (channel effect). Furthermore, the precise implantation conditions are preferably selected such that there are no implant-induced defects in the layer of germanium that has been deposited onto the ruthenium substrate. This also utilizes the elastic interaction of helium and oxygen at low implant energies. Therefore, it is preferred to additionally heat the tantalum substrate to a temperature of 200 ° C or lower during implantation to suppress the formation of even larger implant defects. Preferably, after the end of the oxygen implantation, a thin layer of germanium (cladding) is deposited on the layer of germanium. % is preferably accomplished by chemical vapor deposition. The thickness of the deposited ruthenium layer is preferably greater than or equal to 1 nanometer and less than or equal to 100 nanometers, more preferably greater than or equal to 5 nanometers and less than or equal to 50 nanometers. The function of the coating is to protect the thin layer before or during subsequent heat treatment, to facilitate processing of the tantalum wafer and to enable selection of a more spacious process window during subsequent heat treatment. Further, in the step d), the substrate having a tantalum layer and oxygen-implanted is heat-treated at a temperature greater than or equal to 600 ° C and less than 938 ° C. 9 200826161 The treatment temperature is preferably greater than or equal to 650 ° C and less than or equal to 800 ° C. Preferably, the duration of the heat treatment is less than 1 hour, typically 10 to 30 minutes. Due to this heat treatment, oxygen diffuses as far as the 锗 interface. Since the ruthenium layer constitutes a diffusion hindrance, oxygen diffusion stops here.
Si〇2氧化區藉由在較佳的假晶鍺層下直接變相形成。 在此情況下，氧化區厚度（最終氧化物厚度）較佳為30奈 米或更薄，特佳為10奈米或更薄。 該鍺層在結構上的維持，由於實質上鍺比矽更不易氧化且具 有非常低的擴散率。 於步驟d)中之熱處理後，若先沉積一石夕覆層，較佳係將其移 除；藉此，形成一 GeOI晶圓。 同樣較佳地，若不移除該石夕覆層，則得到一 SGOI晶圓。 若在步驟d)中之該處理前不沉積一矽覆層，所述方法同樣可 得一 GeOI晶圓。 本發明之目的亦藉由一種製備SGOI半導體結構的方法而實 現，該方法包含a)提供一單晶矽基板；b)在該基板上沉積一 錯層，其包含至少一錯原子層；c)植入氧離子於該基板内’該 植入能量為大於或等於1電子伏特且小於或等於1千電子伏 特；d)在該鍺層上沉積一單晶矽覆層；e)在大於或等於900°C 且小於或等於1300°C之溫度下熱處理該經氧植入的基板。 該方法實質上不同於前述方法之處為，於步驟d)中在該基板 上沉積一矽覆層且於步驟e)中之經修正的熱處理。 10 200826161The Si〇2 oxidation zone is formed by direct phase change under a preferred pseudomorph layer. In this case, the thickness of the oxidized zone (final oxide thickness) is preferably 30 nm or less, particularly preferably 10 nm or less. The ruthenium layer is structurally maintained because it is substantially less oxidized than ruthenium and has a very low diffusivity. After the heat treatment in the step d), if a coating is deposited first, it is preferably removed; thereby, a GeOI wafer is formed. Also preferably, if the layer is not removed, a SGOI wafer is obtained. If a coating is not deposited prior to the treatment in step d), the method also results in a GeOI wafer. The object of the present invention is also achieved by a method of fabricating a SGOI semiconductor structure, the method comprising: a) providing a single crystal germanium substrate; b) depositing a split layer on the substrate comprising at least one atomic layer; c) Implanting oxygen ions into the substrate 'the implantation energy is greater than or equal to 1 electron volt and less than or equal to 1 kiloelectron volt; d) depositing a single crystal germanium coating on the germanium layer; e) greater than or equal to The oxygen-implanted substrate is heat treated at a temperature of 900 ° C and less than or equal to 1300 ° C. The method is substantially different from the foregoing method in that a ruthenium coating is deposited on the substrate in step d) and the modified heat treatment in step e). 10 200826161
具體而言，在此情況下，進行熱處理使該鍺層在熱處理期 間，較佳在接近熱處理結束時，全部移除且最終形成一 SGOI 晶圓。 首先，於步驟a)中製備一單晶矽基板。 隨後，步驟b)中在該基板上沉積一鍺層。較佳藉由先前技術 之化學汽相沉積加以完成。該沉積之鍺層包含至少一鍺原子 層。 f ； 該鍺層可藉由假晶沉積或沉積為一鬆弛層。 為了得到一假晶層，依據所選擇的沉積溫度，其需保持在低 於該沉積溫度下之各臨界厚度。 該沉積之鍺層厚度較佳為小於鍺在矽上假晶成長之臨界厚 度。 然而，亦可沉積較厚層。在此情況下，將會發生該鍺層之至 少部分鬆弛。 步驟c)中，植入氧離子於具有一鍺層之基板中。該植入能量 / I 為1·電子伏特至1千電子伏特。 較佳植入能量為1電子伏特至500電子伏特。 該植入劑量較佳為大於或等於1X1014 /平方公分且小於或等 於lx 1017/平方公分。較佳地，選擇該劑量作為熱處理後所欲之 最終氧化物厚度的函數。 在此情況下，淺薄地植入氧離子，且較佳為僅植入至該基板 表面下方大於或等於10奈米且小於或等於30奈米之深度。 其後，於步驟d)中在該鍺層上沉積一砍層（覆層）。較佳藉 200826161 由化學汽相沉積加以完成。 該沉積之矽層厚度較佳為大於或等於1奈米且小於或等於 100奈米，更佳為大於或等於5奈米且小於或等於50奈米。 步驟e)中，在900°C至1300°C之溫度下熱處理具有鍺層及矽 覆層之經氧植入的基板。 該熱處理較佳使用溫度曲線圖進行，其中在熱處理快結束 時，該處理溫度接近鍺之熔點（ 938°C )，或明顯地超過該溫度， \ 即在高達1300°C之溫度下進行熱處理且因而導致鍺加速向外 擴散。 在該熱處理中，溫度較佳增加為每分鐘小於或等於100°c， 更佳為每分鐘10°c至50°c (退火斜坡）。 在此，再次藉由變相在該鍺層下方開始形成一 3丨02氧化區。 在此情況下，氧擴散亦停止於鍺/矽界面處。 簡要而言，各所述方法只需相對簡單的磊晶步驟（沉積鍺或 沉積矽覆層）及低能量植入步驟（1電子伏特至1千電子伏特）， ‘ 因此顯然地更具成本效益且比先前用於製備GeOI或SGOI結 構之技術更為經濟。 磊晶層較佳用於GeOI和/或SGOI結構之矽鍺及/或鍺層上 (例如矽鍺及/或鍺之磊晶層，以增加相應層之厚度）。該矽鍺 或鍺表面較佳用作為進一步磊晶成長之單晶模版，例如III-V 型半導體，像是砷化鎵（GaAs)或氮化鎵（GaN)。 【實施方式】 實施例 12 200826161 ”在第-製程步驟中，在CVD反應器中將無缺陷同晶型錯層 。匕積至單曰曰石夕晶圓上。為此目的，將經氣氣酸洗淨之一石夕晶 圓裝載至該反應器中，在氧氛圍中加熱至溫度為T=85(TC (低 溫供烤），隨後冷卻至4〇(TC之製程溫度且以沉積氣體錯炫 (GeH4)沉積厚度為4奈米之一鍺層。 在第一製权步驟中進行氧的植入。為此目的，將該鍺/矽晶圓 =載至私水脸中，且隨後以1〇〇電子伏特之能量及l (、平方公分之劑量植人—淺薄層中。由此建立—氧斷面，其中植 入氧至該⑪表面下方約1G奈米之深度。在該氧植人層中的氧 濃度為5xl〇16/立方公分。 在其後的製程步驟中沉積一矽層。在此情況下，將該經氧植 入之鍺/矽晶圓裝载至CVD裝置中，在溫度T=5〇(rc&以矽烷 (S1H4)作為矽源下，沉積一厚度為5〇奈米之矽層。 接下來的步驟為，在退火爐中，溫度為850°C下，進行處理 歷時2分鐘。 灸、“式化學名虫刻過程（wet chemical etching process)移 除该石夕層’由此獲得一 Ge〇I晶圓。 或者在退火爐中以900 C-1100°C之退火斜坡進行熱處理1〇 刀4里此相對應於該修正之熱處理，其中該鍺層較佳係在處理 結束刖完全移除。在此情況下未移除該矽覆層，藉此形成一 SGOI晶圓。 °亥氧化物厚度藉由橢圓偏光儀測定，其值為10奈米土 1.5奈 米^氧化物之斷裂場強度係藉由電測試法測定，其值為8百 13 200826161 萬伏特/公分（MV/cm)。 現在藉由以下第1至3圖說明本發明。 第la)-f)圖係表示製備SGOI或GeOI晶圓之方法的實施。首 先，於步驟a)中製備一基板1。於步驟b)中，在基板1上沉積 一錯層2。 於步驟c)中，植入氧離子於基板1之一區域3中。於步驟d) 中，沉積一矽覆層4至鍺層2上。於步驟e)中，進行熱處理， ， 在此情況下，在該基板1内形成一氧化層3a，獲得一 SG0I晶 圓。 於視情況選用之步驟f)中，移除覆層4以獲得一 GeOI晶圓。 第2a)-d)圖係表示製備GeOI晶圓之方法的實施。於步驟a) 中製備一基板1。於步驟b)中，在基板1上沉積一鍺層2。於 步驟c)中，植入氧離子於基板1之一區域3中。於步驟d)中， 進行熱處理，在基板1内形成一氧化層3a，獲得一 GeOI晶圓。 第3a)-e)圖係表示製備SG0I晶圓之方法的實施。於步驟a) I 中，製備一基板1。於步驟b)中，在基板1上沉積一鍺層2。 於步驟c)中，植入氧離子於基板1之一區域3中。於步驟d) 中，沉積一矽覆層4至鍺層2上。於步驟e)中，進行熱處理， 退火斜坡為900°C至1300°C，由此在基板1内形成一氧化層 3a，且自原始鍺層2及部分覆層4形成一矽鍺層5。該覆層之 剩餘部分4a係未移除。由此獲得一 SG0I晶圓。 【圖式簡單說明】 第1圖係繪示製備SG0I或GeOI晶圓之方法的實施。 14 200826161 第2圖係繪示製備GeOI晶圓之方法的實施。 第3圖係繪示藉由經修正之熱處理製備SGOI晶圓之方法的 實施。 【主要元件符號說明】 1基板 2鍺層 3區域 4 >5夕覆層 5矽鍺層 1 a基板之一部份 3a氧化層 4a矽覆層之剩餘部份Specifically, in this case, the heat treatment is performed so that the tantalum layer is completely removed during the heat treatment, preferably near the end of the heat treatment, and finally a SGOI wafer is formed. First, a single crystal germanium substrate is prepared in step a). Subsequently, a layer of germanium is deposited on the substrate in step b). This is preferably accomplished by chemical vapor deposition of the prior art. The deposited germanium layer comprises at least one germanium atomic layer. f; the layer of germanium may be deposited or deposited as a relaxed layer by pseudomorphology. In order to obtain a pseudomorphic layer, it is desirable to maintain a critical thickness below the deposition temperature, depending on the deposition temperature selected. The thickness of the deposited tantalum layer is preferably less than the critical thickness of the pseudomorphic growth of the tantalum on the tantalum. However, thicker layers can also be deposited. In this case, at least some relaxation of the enamel layer will occur. In step c), oxygen ions are implanted in a substrate having a layer of germanium. The implant energy / I is from 1 volt volts to 1 kilo volt volts. Preferably, the implantation energy is from 1 eV to 500 eV. The implant dose is preferably greater than or equal to 1 x 1014 / cm ^ 2 and less than or equal to l x 1017 / cm ^ 2 . Preferably, the dose is selected as a function of the desired final oxide thickness after heat treatment. In this case, oxygen ions are implanted shallowly, and preferably implanted only to a depth of 10 nm or less and less than or equal to 30 nm below the surface of the substrate. Thereafter, a chopped layer (cladding) is deposited on the tantalum layer in step d). Preferably, 200826161 is completed by chemical vapor deposition. The thickness of the deposited tantalum layer is preferably greater than or equal to 1 nanometer and less than or equal to 100 nanometers, more preferably greater than or equal to 5 nanometers and less than or equal to 50 nanometers. In the step e), the oxygen-implanted substrate having the ruthenium layer and the ruthenium layer is heat-treated at a temperature of from 900 °C to 1300 °C. The heat treatment is preferably carried out using a temperature profile in which, at the end of the heat treatment, the treatment temperature is close to the melting point of the crucible (938 ° C), or significantly exceeds the temperature, ie, heat treatment at a temperature of up to 1300 ° C and As a result, the cockroach accelerates outward diffusion. In this heat treatment, the temperature is preferably increased to less than or equal to 100 ° C per minute, more preferably from 10 ° C to 50 ° C per minute (annealing slope). Here, a 3 丨 02 oxidation zone is again formed under the ruthenium layer by phase change. In this case, oxygen diffusion also stops at the 锗/矽 interface. Briefly, each of the methods requires a relatively simple epitaxial step (deposited tantalum or deposited tantalum coating) and a low energy implantation step (1 eV to 1 kV), so it is obviously more cost effective It is more economical than the techniques previously used to fabricate GeOI or SGOI structures. The epitaxial layer is preferably used on the germanium and/or germanium layers of the GeOI and/or SGOI structures (e.g., germanium and/or tantalum epitaxial layers to increase the thickness of the respective layers). The tantalum or tantalum surface is preferably used as a single crystal stencil for further epitaxial growth, such as a III-V type semiconductor such as gallium arsenide (GaAs) or gallium nitride (GaN). [Embodiment] Example 12 200826161 "In the first process step, a defect-free isomorphous layer is deposited in a CVD reactor. It is deposited on a single sapphire wafer. For this purpose, the gas is gas-filled. One of the acid washed ones was loaded into the reactor and heated in an oxygen atmosphere to a temperature of T=85 (TC (low temperature for baking), followed by cooling to 4 〇 (TC process temperature and distorted by deposition gas) (GeH4) deposits a layer of 4 nm thick. The implantation of oxygen is performed in the first weighting step. For this purpose, the 锗/矽 wafer = is carried in the private water face, and then 1 The energy of 〇〇 electron volts and l (the square centimeter dose implanted in the shallow layer. This establishes the oxygen section, in which oxygen is implanted to a depth of about 1G nanometer below the surface of the 11th. The oxygen concentration in the layer is 5 x 16 / 16 / cubic centimeter. A layer of germanium is deposited in a subsequent process step. In this case, the oxygen implanted ruthenium / iridium wafer is loaded into the CVD apparatus, Temperature T=5〇(rc& with decane (S1H4) as the source of bismuth, deposit a layer of 5 〇 nanometer thickness. The next step is In the furnace, the temperature is 850 ° C, and the treatment is carried out for 2 minutes. Moxibustion, "wet chemical etching process removes the layer" to obtain a Ge〇I wafer. The annealing furnace is heat-treated at an annealing slope of 900 C-1100 ° C. The boring tool 4 corresponds to the heat treatment of the correction, wherein the enamel layer is preferably completely removed after the treatment is finished. In addition to the ruthenium coating, a SGOI wafer is formed thereby. The thickness of the oxide is determined by an ellipsometer, and the value of the fracture field strength of the oxide is measured by an electric test method. The value is 8.313.261.6 million volts/cm (MV/cm). The invention will now be illustrated by the following figures 1 to 3. The drawings la)-f) show the implementation of the method of preparing a SGOI or GeOI wafer. First, a substrate 1 is prepared in step a). In step b), a split layer 2 is deposited on the substrate 1. In step c), oxygen ions are implanted in a region 3 of the substrate 1. In step d), a coating 4 is deposited onto the layer 2. In the step e), heat treatment is performed, in which case an oxide layer 3a is formed in the substrate 1 to obtain a SG0I crystal circle. In step f), optionally selected, the cladding 4 is removed to obtain a GeOI wafer. 2a)-d) are diagrams showing the implementation of a method of preparing a GeOI wafer. A substrate 1 is prepared in step a). In step b), a layer 2 is deposited on the substrate 1. In step c), oxygen ions are implanted in a region 3 of the substrate 1. In the step d), heat treatment is performed to form an oxide layer 3a in the substrate 1 to obtain a GeOI wafer. Figures 3a)-e) show the implementation of a method of preparing an SG0I wafer. In step a) I, a substrate 1 is prepared. In step b), a layer 2 is deposited on the substrate 1. In step c), oxygen ions are implanted in a region 3 of the substrate 1. In step d), a coating 4 is deposited onto the layer 2. In the step e), heat treatment is performed, and the annealing slope is 900 ° C to 1300 ° C, whereby an oxide layer 3a is formed in the substrate 1, and a germanium layer 5 is formed from the original germanium layer 2 and the partial cladding layer 4. The remaining portion 4a of the coating is not removed. Thus, an SG0I wafer is obtained. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a diagram showing the implementation of a method of preparing an SG0I or GeOI wafer. 14 200826161 Figure 2 illustrates the implementation of a method of fabricating a GeOI wafer. Figure 3 is a diagram showing the implementation of a method of preparing a SGOI wafer by a modified heat treatment. [Description of main component symbols] 1 substrate 2 layer 3 region 4 > 5 cladding layer 5 layer 1 a part of the substrate 3a oxide layer 4a remaining part of the cladding layer