200818673 HD-2006-0020-TW 20964twf.doc/n 九、發明說明： 【發明所屬之技術領域】 本發明是有關於一種電荷幫浦，且特別是有關於一種 電荷幫浦電路及其控制電路。 【先前技術】 在電子裝置中，往往需要各種不同準位的電源電壓， 因此常配置電荷幫浦(Charge pump)電路以便利用現有的電 源電壓來產生各種不同準位的電源電壓。 ” 一般在设计電源升壓電路時，最直接的方法是使用升 壓ic去構成升壓電路(boost circuit)。如果在驅動電流 (driving cu腦够大的情況之下(<3〇mA)，使用電荷幫浦電 路是最簡單的方法。但是使用電·浦電路有—個缺點， 就是比起使用升壓電路有較大的漣波雜訊(ripplen〇ise)，尤 其是在輸入電壓愈接近輸出電壓時。 、圖"會示為習知的電荷幫浦電路。如圖i所示，電荷 幫浦電路包括-控制器100與—電荷幫浦單元⑻。控制 杰100包含一控制單元CU10與一比較器〇ρι〇。電荷幫浦 單元ιοί包含一電容n 102與多個開關swu、簡3、 SW14、SW15 〇 圖2、，曰示為圖1之動作波形圖。請同時參考圖1與圖 2，習知的電荷幫浦電路動作原理是使用psM(puise獅[Technical Field] The present invention relates to a charge pump, and more particularly to a charge pump circuit and a control circuit therefor. [Prior Art] In electronic devices, power supply voltages of various levels are often required, and thus a charge pump circuit is often provided to utilize existing power supply voltages to generate power supply voltages of various levels. Generally, when designing a power boost circuit, the most direct method is to use boost ic to form a boost circuit. If the driving current (driving cu brain is large enough (<3〇mA) The use of the charge pump circuit is the easiest method. However, the use of the electric pump circuit has a disadvantage, that is, it has a larger ripple noise than the booster circuit, especially at the input voltage. When the output voltage is close to the output voltage, the figure will be shown as a conventional charge pump circuit. As shown in Figure i, the charge pump circuit includes a controller 100 and a charge pump unit (8). The control unit 100 includes a control unit. CU10 and a comparator 〇ρι〇. The charge pump unit ιοί includes a capacitor n 102 and a plurality of switches swu, 简 3, SW14, SW15 〇 Figure 2, which is shown as the action waveform diagram of Figure 1. Please also refer to the figure 1 and Figure 2, the conventional charge pump circuit action principle is to use psM (puise lion
Mention，脈波省略調變)去控制電容器ι〇2的充放電時 間°㈣2所^初始時’輸出電壓VGUt的電壓值較小， 比UP1G正輸人端的電壓小於負輸人端的預設電壓 Vref，此時内部震盈器會產生一時脈訊號去控制開關 200818673 HD-2006-0020-TW 20964twf.doc/n SW11、SW13、SW14、SW15 的導通狀態；當開關 SW11、 SW14導通時，開關swi3、SW15不導通，此時輸入電壓 Vm開始對電容器1〇2充電；當開關SWU、SW14導通時， 開關SW13、SW15會不導通，此時電容器102開始對負載 電容C11放電，負載電容C11兩端之輸出電壓vout為輸 入電壓Vin加上電容器1〇2之電壓。 電容器102所儲存之電荷會隨著時間損耗而使得電容 器102之電壓值下降，導致輸出電壓v〇ut下降。重複數個 充放電週期，直到輸出電壓V〇ut的電壓值上升，比較器 ΟΡΙΟ正輸入端的電壓大於負輸入端的預設電壓Vref。此 時PSM脈波開始作用，開關SW11、SW14保持不導通， 開關SW13、SW15保持導通。當輸出電壓v〇ut下降，比 較器ΟΡΙΟ正輸入端的電壓再度小於負輸入端的預設電壓Mention, pulse wave omitting modulation) to control the charge and discharge time of capacitor ι〇2 ° (4) 2 ^ initial voltage output voltage VGUt is smaller, than the voltage of UP1G positive input terminal is less than the negative input voltage of the negative input terminal Vref At this time, the internal oscillator will generate a clock signal to control the on-state of the switch 200818673 HD-2006-0020-TW 20964twf.doc/n SW11, SW13, SW14, SW15; when the switches SW11, SW14 are turned on, the switch swi3, SW15 is not conducting. At this time, the input voltage Vm starts to charge the capacitor 1〇2. When the switches SWU and SW14 are turned on, the switches SW13 and SW15 are not turned on. At this time, the capacitor 102 starts to discharge the load capacitor C11, and the load capacitor C11 is at both ends. The output voltage vout is the input voltage Vin plus the voltage of the capacitor 1〇2. The charge stored by capacitor 102 will cause the voltage value of capacitor 102 to decrease over time, causing the output voltage v〇ut to drop. Several charge and discharge cycles are repeated until the voltage value of the output voltage V〇ut rises, and the voltage at the positive input terminal of the comparator is greater than the preset voltage Vref at the negative input terminal. At this time, the PSM pulse starts to act, the switches SW11 and SW14 remain non-conductive, and the switches SW13 and SW15 remain turned on. When the output voltage v〇ut drops, the voltage at the positive input of the comparator is again less than the preset voltage at the negative input.
Vref之後’ PSM脈波再將開關swi卜SW12、SW13、 SW15的導通狀態反向，使輸入電壓vin重新開始對電容 為102充電，使輸出電壓v〇ut再度上升，比較器〇pl〇正 輸入端的電壓再度大於負輸入端的預設電壓After Vref, the PSM pulse reverses the conduction state of the switches swibs SW12, SW13, and SW15, causing the input voltage vin to restart charging the capacitor 102, causing the output voltage v〇ut to rise again, and the comparator 〇pl〇 is input. The voltage at the terminal is again greater than the preset voltage at the negative input
Vref〇PSM 脈 波會重複此動作，將輸出電壓v〇ut維持在一定電壓值。 為了更突顯習知電荷幫浦電路的缺點，假設輸入電壓 Vm為5V’所需輸出電壓v〇ut為8V，因此目標電容器ι〇2 的電壓為3V。-開始由内部震盤器反覆切換開_ swu、 SW13、SWM、SWI5對電容器1〇2充電，使電容器1〇2 之電壓大於3V，也就是使輸出電壓v〇ut大於8V。 然而習知電荷幫浦電路在對電容器1〇2充電時，由於 200818673 HD-2006-0020-TW 20964twf.doc/r 缺少一個控制電路，電容器102會被過度充電至5V，也 是輸入電壓Vin的電壓準位，使得輪出電壓在開關swi3、 SW15導通的同時為爾。待電容$ 1〇2的電壓下降至w 以下’ PSM脈波控制開關SW13、SW15不導通、swi卜 SW14導通，輸入電壓Vin會重新對電容器1〇2充 容器H)2會再度被過度充電至sv，使得輸出電壓再 ιον。因此在PSM脈波反覆對電容器1〇2充電的過程^ ^生漣=訊至少為2V ’輸人電壓％越接近輸 Vout ’漣波雜訊越嚴重。 ％ i 【發明内容】 本發明的目的就是在提供一種控制電路， :，端之電壓大小去控制電荷幫浦單元以峨容； ’且根據電荷幫浦單元的輸出端的 ； 谷為的放電時間，減少漣波雜訊。 、疋冤 本發_再—目的是提供—㈣前料路， 制輸人端之電壓大小去控制電荷幫浦單= 電電ί根據電荷幫浦單元的輪出端的 穩^决疋電μ的放電時間’穩定輸出電壓，增加系統 ^發明提出—種控制電路，此控制電路係控制 此電荷幫浦單元包括-電容器。控制電路包: 控㈣器。控制輸入端接收-輸入電壓 ^根據控制輸人端之電壓大小去控制電荷 〜疋電容器的充電時間，且根攄雷，¥ _ 70以 且根據電何幫浦早几的輸出端的 7 200818673 HD-2UU6-0020-TW 20964hvf.doc/n 電壓值決定電容器的放電時間。 依照本發明的較佳實施例所述之控制電路，上述電荷 幫浦單元更包括一第一開關，且控制器包括一第一比較器 以及一控制單元。第一開關耦接於電容器與一輸入電壓之 間。第一比較為將控制輸入端的電壓與一鋸齒波作比較 後’ ^出一脈寬調變信號。控制單元根據此脈寬調變信號 的狀悲，決定第一開關的導通狀態。 c o 抑依照本發明的較佳實施例所述之控制電路，上述控制 裔更士括一第二比較器與一控制單元。第二比較器將電荷 幫浦單兀所輸出的電壓與一預設電壓作比較後，輸出一控 制k號。上述控制單元根據此控制信號決定電容器 與否。 本發明更提出-種電荷幫浦電路，此電前浦電路係 匕括一輸入端、-輸出端、一電荷幫浦單元以及一控制電 路二輸入端耦接至一輸入電壓。輸出端輸出一輸出電壓， =!出電壓大於輸入電壓。電荷幫浦單元耦接於輸入 t輸出端之間，包括至少—電容器。控 之間’此控制電路包括-控制輸入端 =5制輸人雜接至輸人端。㈣輸 入wVln之電黯婦電容器的充 電壓v⑽的㈣值決定電容器的放電時間。_輸出 依照本發明的較佳實施例所述之電荷幫 電荷幫浦單元更包括一第一開冑 ，述 乐開關，且控制器包括一第一比 8 200818673 HU^UU〇-0020-TW 20964twf.doc/n 較為以及一控制單元。第一開關耦接於電容器與一輸入電 壓之間。第一比較器將輸入電壓與一鋸齒波作比較後，輪 出-脈寬崎錢。控鮮元根據脈寬難信號的狀態， 決定第一開關的導通狀態。 依照本發明的較佳實施例所述之電荷幫浦電路，上述 控制器更包括-第二比較器以及一控制單元。第二比較器 將，出電壓與-預設電壓作比較後，輸出一控制信號。控 〔制單元根據控制信號的邏輯狀態，決定電容器的放電與否。 本發明因採用控制器根據控制輸入端之電壓值控制電 荷絮浦單元，進而調整電容器的充電時間，且根據電荷幫 浦單元的輸出端的電壓值決定電容器的放電時間，因此 到減少漣波雜訊的目的。 “為讓本發明之上述和其他目的、特徵和優點能更明顯 易馇，下文特舉較佳實施例，並配合所附圖式，作詳細 明如下。 ^ 【實施方式】 由於先前技術的電路架構僅利用一個比較器，將輸出 端的電壓與參考電壓比較，輸出—控制信號至—控制單 $ ’以控制電容器的充放電時間，會造成電容器的過度充 ^，產生較大的漣波雜訊。因此本發明提出一種電荷幫浦 %路及其控制電路，用以獲得較良好之電容器充放電時間 控制’減少漣波雜訊，使電荷幫浦電路有較好輸出電壓表 現。以下便以實施例來說明本發明。 圖3繪不為本發明實施例之電荷幫浦電路的電路圖。 200818673 HU-2UU0-0020-TW 20964t\vf.d〇c/n 如圖3所不’電荷幫浦電路包括電荷幫浦單元3〇1及本發 明實施例的控制電路。電荷幫浦單元3G1包括至少一電容 ^302 與數個關 SW3l、SW33、SW34、sw354_ 貫施例的控制電路包括—控制器3⑼以及一控制輸入端 303。控制器300包括一第一比較器〇p3〇、一第二比較器 OP31以及-控制單兀CU3()。㈣輸入端3⑽減到輸入 雷懕νΐη。The Vref〇PSM pulse repeats this action to maintain the output voltage v〇ut at a certain voltage. In order to further highlight the shortcomings of the conventional charge pump circuit, it is assumed that the output voltage v〇ut of the input voltage Vm is 5V' is 8V, so the voltage of the target capacitor ι〇2 is 3V. - Start switching internally by the internal disc drive _ swu, SW13, SWM, SWI5 to charge the capacitor 1〇2, so that the voltage of the capacitor 1〇2 is greater than 3V, that is, the output voltage v〇ut is greater than 8V. However, when the conventional charge pump circuit charges the capacitor 1〇2, since the control circuit is lacking in 200818673 HD-2006-0020-TW 20964twf.doc/r, the capacitor 102 is overcharged to 5V, which is also the voltage of the input voltage Vin. The level is such that the turn-off voltage is at the same time as the switches swi3 and SW15 are turned on. The voltage of the capacitor $1〇2 drops to below w. 'The PSM pulse control switches SW13 and SW15 are not turned on, and the swib SW14 is turned on. The input voltage Vin will re-charge the capacitor 1〇2 to the container H)2 again. Sv, so that the output voltage is again ιον. Therefore, the process of charging the capacitor 1〇2 repeatedly in the PSM pulse wave is at least 2V. The closer the input voltage is to the Vout, the more severe the chopping noise. % i [Invention] The object of the present invention is to provide a control circuit that: the voltage level of the terminal is used to control the charge pump unit; and according to the output of the charge pump unit; the discharge time of the valley, Reduce chop noise.疋冤本发_ _ again - the purpose is to provide - (four) the front material path, the voltage level of the input and output terminal to control the charge pump single = electric ί Time 'stabilizes the output voltage, increases the system ^Invented a control circuit that controls the charge pump unit to include a capacitor. Control circuit pack: Control (four) device. Control input receiving-input voltage ^ according to the voltage of the control input terminal to control the charging time of the charge ~ 疋 capacitor, and root 摅 雷, ¥ _ 70 and according to the output of the power of the pump 7 200818673 HD-2UU6- 0020-TW 20964hvf.doc/n The voltage value determines the discharge time of the capacitor. According to a preferred embodiment of the present invention, the charge pump unit further includes a first switch, and the controller includes a first comparator and a control unit. The first switch is coupled between the capacitor and an input voltage. The first comparison is to compare the voltage at the control input with a sawtooth wave and then output a pulse width modulation signal. The control unit determines the conduction state of the first switch according to the sorrow of the pulse width modulation signal. In other words, in accordance with a preferred embodiment of the present invention, the control circuit further includes a second comparator and a control unit. The second comparator compares the voltage outputted by the charge pump unit with a predetermined voltage and outputs a control k number. The control unit determines whether the capacitor is or not based on the control signal. The invention further provides a charge pump circuit comprising an input terminal, an output terminal, a charge pump unit and a control circuit input terminal coupled to an input voltage. The output outputs an output voltage, and the =! output voltage is greater than the input voltage. The charge pump unit is coupled between the input t output terminals, including at least a capacitor. Between the control's control circuit includes - control input = 5 system input to the input terminal. (4) The charging voltage of the electric widow capacitor input to wVln (4) determines the discharge time of the capacitor. The charge-charge pump unit according to the preferred embodiment of the present invention further includes a first opening, a music switch, and the controller includes a first ratio of 8 200818673 HU^UU〇-0020-TW 20964twf .doc/n is more than a control unit. The first switch is coupled between the capacitor and an input voltage. The first comparator compares the input voltage with a sawtooth wave and turns out the pulse width. The control unit determines the conduction state of the first switch according to the state of the pulse width difficulty signal. In accordance with a preferred embodiment of the present invention, the controller further includes a second comparator and a control unit. The second comparator outputs a control signal after comparing the output voltage with the preset voltage. The control unit determines the discharge of the capacitor according to the logic state of the control signal. The invention controls the charge flocculation unit according to the voltage value of the control input terminal, thereby adjusting the charging time of the capacitor, and determining the discharge time of the capacitor according to the voltage value of the output end of the charge pump unit, thereby reducing the chop noise the goal of. The above and other objects, features, and advantages of the present invention will become more apparent from the embodiments of the invention. The architecture uses only one comparator to compare the voltage at the output with the reference voltage, and the output-control signal to the control unit $' to control the charge and discharge time of the capacitor, causing overcharge of the capacitor and generating large ripple noise. Therefore, the present invention proposes a charge pump % path and its control circuit for obtaining a better capacitor charge and discharge time control 'reducing chopping noise, so that the charge pump circuit has better output voltage performance. The present invention will be described by way of example. Figure 3 is a circuit diagram of a charge pump circuit which is not an embodiment of the present invention. 200818673 HU-2UU0-0020-TW 20964t\vf.d〇c/n Figure 3 does not describe the 'charge pump circuit The charge pump unit 3〇1 and the control circuit of the embodiment of the invention are included. The charge pump unit 3G1 includes at least one capacitor ^302 and a plurality of control circuits of the switches SW3l, SW33, SW34, sw354_ The controller 3 (9) and a control input 303. The controller 300 includes a first comparator 〇p3 〇, a second comparator OP31 and a control unit 兀 CU3 (). (4) The input terminal 3 (10) is reduced to the input Thunder 懕 ΐ ΐ .
第一比杈ΟΡ30將控制輸入端3〇3的電壓與一鑛齒 波vi作比較，輸出一脈寬調變信號CT3〇。第二比較哭 OPS1 ’其將電荷幫浦單元3〇1的輸出端電壓與一預設電^ V2比較之後輸出一控制信號CT31。控制單元c㈣根據 脈寬調變信號CT30與控制信號CT31決定開關撕卜 SW33、SW34、SW35的導通狀態。換句話說，控制單元 CU30根據脈寬調變信號CT3〇與控制信號CT3丨控制 器302之充放電時間。 圖4繪示為圖3之動作波形圖。請同時參考圖3與圖 4,初始電路之電容器3〇2的電壓值小於一門限電壓，^制 單元CU30根據脈寬調變信號CT30與控制信號cT3! ^制 電容器302之充放電時間，重複數個週期直到電容器^〇2 的電壓值大於門限電壓，之後同時應用PSM技術以及 PWM(Pulse Width Modulation，脈波寬度調變)技術之脈波 將電容器302維持在門限電壓之上。 /The first ratio 30 compares the voltage at the control input terminal 3〇3 with a mine tooth wave vi, and outputs a pulse width modulation signal CT3〇. The second comparison cry OPS1' outputs a control signal CT31 after comparing the output voltage of the charge pump unit 3〇1 with a predetermined voltage V2. The control unit c (4) determines the conduction state of the switch tearing SW33, SW34, and SW35 based on the pulse width modulation signal CT30 and the control signal CT31. In other words, the control unit CU30 switches the charge and discharge time of the controller 302 based on the pulse width modulation signal CT3 and the control signal CT3. FIG. 4 is a waveform diagram of the operation of FIG. 3. Referring to FIG. 3 and FIG. 4 simultaneously, the voltage value of the capacitor 3〇2 of the initial circuit is less than a threshold voltage, and the unit CU30 repeats the charging and discharging time of the capacitor 302 according to the pulse width modulation signal CT30 and the control signal cT3! Several cycles until the voltage of the capacitor ^2 is greater than the threshold voltage, and then the PSM technique and the PWM (Pulse Width Modulation) pulse are applied to maintain the capacitor 302 above the threshold voltage. /
比較圖4與習知圖2下方開關SW31、SW34的導通狀 態動作波形，本圖4實施例同時應用PS]VI技術以及PWM 200818673 HU-2U06-0020-TW 20964twf.doc/n 技術，以控制電荷幫浦單元3〇1 ;目2習知技術則是僅應 用PSM技術來控制電荷幫浦單元1〇1。本實施例之動作原 理為當控制輸入端303所耦接到的輸入電壓Vin較大時， 同牯應用PSM技術以及PWM技術之脈波（下文簡稱 PSM+PWM脈波)的工作週期(duty cyde)會變小；反之，當 輸入電壓Vin較小時，PSM+PWM脈波的工作週期會變 大。如此一來，在當輸入電壓Vin增大時，輸出電壓 (' 的漣波雜訊不會跟著提高，且在輸入電壓Vin下降時，增 加的PSM+PWM脈波的責任週期，能讓電容器3〇2在充電 過程中獲得較多的能量。 如圖4上方所示，電容器302之充放電所產生的漣波 雜訊，本實施例在同時應用PSM技術以及PWM技術之 後，車父習知技術僅應用PSM技術來控制電荷幫浦單元 101，所產生之漣波雜訊為小。 為了更突顯此實施例電荷幫浦電路及其控制電路的優 點’假设一開始的輸入電壓Vin為5 V，所需輸出電壓v〇ut 〇 為8V’因此目標電容器302的電壓為3V。一開始控制單 元CU3 0根據脈寬調變信號CT3 0與控制信號CT3丨切換開 關SW31、SW33、SW34、SW35的導通狀態，使電容器 302充電至3V。 此實施例在對電容器302充電時，由於控制器300新 加入一個比較器OP30,電容器302不會被過度充電至5V。 控制電路300將輸入端303的電壓值(也就是輸入電壓vin 的電壓值)與鋸齒波VI比較，控制電容器302的充電時 200818673 HD-2006-0020-TW 20964twf.doc/n 間，使電容器302不至於充電至3.5V，即輸出電壓在開關 SW33、SW35導通的同時僅為約8.5V。待電容器302的電 壓下降至3V以下，PSM+PWM脈波脈波控制開關SW33、 SW35不導通、SW31、SW32、SW34導通，輸入電壓Vin 會重新對電容器302充電，電容器302會再度被充電至約 3.5V，使得輸出電壓再度為約8,5V。因此本實施例在同時 應用PSM技術以及PWM技術之後，產生漣波雜訊僅為約 0.5V，較習知的電荷幫浦電路為低。 經過一段時間之後，假設在時間tl時，輸入電壓Vin 增加為6V’則比較裔OP30將控制輸入端303的電壓值(也 就是輸入電壓Vin的電壓值)與鋸齒波vi比較後，指示控 制單元CU30會減少PSM+PWM脈波脈波的工作週期，使 電容器302的充電時間縮短，使得電容器302亦僅會充電 至約3.5V，因而輸出電壓Vout之漣波雜訊不會隨輸入電 壓Vin增加而增加。 再經過一段時間之後’假設在時間t2，輸入電壓vin 減少為4V，則比較器〇P3〇指示控制單元CU3〇增加 PSM+PWM脈波脈波的工作週期，使電容器3〇2的充電時 間延長，因此可控制電容器302充電至約3.5V，使得電容 器302不會隨輸入電壓Vin之減少而充電不足，維持輸出 電壓Vout穩定。 值得一提的是，雖然上述實施例中已經對電荷幫浦電 路及其控制電路描繪出了一些可能的型態，但在本領域具 有通常知識者應知，各廠商對於控制電路的設計方式都不 12 200818673 nu-zuuo-0020-TW 20964^f.d〇c/n 二樣’因此本發明之應用當不限制於此種可能的型態。換 言之，只要是控制電路的控制輸入端3〇3接收一輸又電壓 二二以及控制器3〇〇根據控制輸入端3〇3之電壓值調整電 容器302的充電時間，且根據電荷幫浦單元3〇1的輸= 電壓值決定電容器3〇2的放電時間，就已經是符合 明的精神所在。 x 接下來將舉出另一種實施例以便本領域具有通常知識 ^ 者能輕易施行本發明。 圖5繪示為本發明另一實施例之電荷幫浦電路的電路 圖。如圖5所示，電荷幫浦電路包括電荷幫浦單元5〇丨與 本發明實施例的控制電路。本發明實施例的控制電路包^ 一控制輸入端503以及控制器500。控制器5〇〇包括一第 一比較器ΟΡ50、一第二比較器〇Ρ51以及一控制單元 CU50。圖5與圖3不同之處在於圖5之電荷幫浦單元5〇卜 其包括電容器502與504,以及開關SW51、SW53、SW54、 SW55、SW56、SW57 與 SW58。 j 第一比較器0p50將控制輸入端503的電壓與一鋸齒 波vi作比較，輸出一脈寬調變信號CT50。第二比較器 OP51 ’其將電荷幫浦單元501的輸出端電壓與一預設電壓 V2比較之後輸出一控制信號CT51。控制單元CU5〇根據 脈寬調變信號CT50與控制信號CT51決定開關SW51、 SW53、SW54、SW55、SW56、SW57 與 SW58 的導通狀 態。換句話說，控制單元CU50根據脈寬調變信號CT50 與控制信號CT51控制電容器502與504之充放電時間。 13 200818673 HD-2006-0020-TW 20964t\vf.doc/n 圖5的電路與圖3的不同之處在於圖5的電荷幫浦單 元501是採用了 3倍壓電路架構的實施例，在本領域具有 通常知識者應當知道，其操作細節如同圖3實施例中的2 倍壓電路架構所述，故在此不予贅述。另外，本發明之應 用不應只侷限於2倍壓、3倍壓電荷幫浦電路結構，4倍壓、 5倍壓乃至任意倍壓皆可應用本發明及其衍生之各種實施 例去降低漣波雜訊。 、 fComparing FIG. 4 with the conduction state action waveforms of the switches SW31 and SW34 in the lower part of FIG. 2, the embodiment of FIG. 4 simultaneously applies the PS]VI technology and the PWM 200818673 HU-2U06-0020-TW 20964twf.doc/n technology to control the charge. The pump unit 3〇1; the second technique is to apply only the PSM technology to control the charge pump unit 1〇1. The operation principle of this embodiment is that when the input voltage Vin coupled to the control input terminal 303 is large, the duty cycle of the PSM technology and the pulse wave of the PWM technology (hereinafter referred to as PSM+PWM pulse wave) is applied (duty cyde). ) will become smaller; conversely, when the input voltage Vin is small, the duty cycle of the PSM+PWM pulse will become larger. In this way, when the input voltage Vin increases, the output voltage ('the chopping noise will not increase, and when the input voltage Vin drops, the duty cycle of the increased PSM+PWM pulse wave can make the capacitor 3 〇2 obtains more energy during the charging process. As shown in the upper part of Fig. 4, the chopping noise generated by the charging and discharging of the capacitor 302, after the application of the PSM technology and the PWM technology in this embodiment, the familiar technique of the father Only the PSM technology is used to control the charge pump unit 101, and the generated chop noise is small. To further highlight the advantages of the charge pump circuit and its control circuit of this embodiment, assuming that the initial input voltage Vin is 5 V, The required output voltage v〇ut 〇 is 8V', so the voltage of the target capacitor 302 is 3V. At the beginning, the control unit CU3 0 switches the conduction of the switches SW31, SW33, SW34, SW35 according to the pulse width modulation signal CT3 0 and the control signal CT3 丨. State, capacitor 302 is charged to 3 V. This embodiment, while charging capacitor 302, capacitor 302 will not be overcharged to 5 V since controller 300 newly adds a comparator OP30. Control circuit 300 will input 303 The voltage value (that is, the voltage value of the input voltage vin) is compared with the sawtooth wave VI to control the charging of the capacitor 302 between 200818673 HD-2006-0020-TW 20964twf.doc/n so that the capacitor 302 is not charged to 3.5V, ie The output voltage is only about 8.5V while the switches SW33 and SW35 are turned on. When the voltage of the capacitor 302 drops below 3V, the PSM+PWM pulse wave control switches SW33 and SW35 are not turned on, and SW31, SW32, and SW34 are turned on, and the input voltage is applied. Vin will recharge capacitor 302, capacitor 302 will be charged again to about 3.5V, so that the output voltage is again about 8,5 V. Therefore, in this embodiment, after applying PSM technology and PWM technology at the same time, chopping noise is only generated. About 0.5V, which is lower than the conventional charge pump circuit. After a period of time, assuming that the input voltage Vin increases to 6V' at time t1, the comparator OP30 will control the voltage value of the input terminal 303 (that is, the input voltage). After comparing the voltage value of Vin with the sawtooth wave vi, the control unit CU30 is instructed to reduce the duty cycle of the PSM+PWM pulse wave, shortening the charging time of the capacitor 302, so that the capacitor 302 is only charged to about 3.5V, so the chopping noise of the output voltage Vout will not increase with the increase of the input voltage Vin. After a period of time, 'assuming the input voltage vin is reduced to 4V at time t2, the comparator 〇P3〇 indicates the control unit CU3 〇 Increase the duty cycle of the PSM+PWM pulse wave to extend the charging time of the capacitor 3〇2, so that the capacitor 302 can be controlled to be charged to about 3.5V, so that the capacitor 302 does not charge insufficiently with the decrease of the input voltage Vin. The output voltage Vout is stable. It is worth mentioning that although the above embodiments have shown some possible patterns for the charge pump circuit and its control circuit, it is known to those skilled in the art that the design methods of the control circuits are all manufacturers. No 12 200818673 nu-zuuo-0020-TW 20964^fd〇c/n 2 'The application of the invention is therefore not limited to this possible type. In other words, as long as the control input terminal 3〇3 of the control circuit receives a voltage and voltage and the controller 3〇〇 adjusts the charging time of the capacitor 302 according to the voltage value of the control input terminal 3〇3, and according to the charge pump unit 3 The output voltage of 〇1 determines the discharge time of capacitor 3〇2, which is already in line with the spirit of Ming. x Next, another embodiment will be given so that the ordinary knowledge in the art can be easily implemented. FIG. 5 is a circuit diagram of a charge pump circuit according to another embodiment of the present invention. As shown in Fig. 5, the charge pump circuit includes a charge pump unit 5 and a control circuit of an embodiment of the present invention. The control circuit of the embodiment of the present invention includes a control input 503 and a controller 500. The controller 5A includes a first comparator ΟΡ50, a second comparator 〇Ρ51, and a control unit CU50. 5 differs from FIG. 3 in that the charge pump unit 5 of FIG. 5 includes capacitors 502 and 504, and switches SW51, SW53, SW54, SW55, SW56, SW57 and SW58. j The first comparator 0p50 compares the voltage of the control input terminal 503 with a sawtooth wave vi, and outputs a pulse width modulation signal CT50. The second comparator OP51' outputs a control signal CT51 after comparing the output voltage of the charge pump unit 501 with a predetermined voltage V2. The control unit CU5 determines the on state of the switches SW51, SW53, SW54, SW55, SW56, SW57 and SW58 based on the pulse width modulation signal CT50 and the control signal CT51. In other words, the control unit CU50 controls the charge and discharge times of the capacitors 502 and 504 based on the pulse width modulation signal CT50 and the control signal CT51. 13 200818673 HD-2006-0020-TW 20964t\vf.doc/n The circuit of Figure 5 differs from that of Figure 3 in that the charge pump unit 501 of Figure 5 is an embodiment employing a 3x voltage circuit architecture. Those skilled in the art will appreciate that the operational details are as described for the 2x voltage circuit architecture of the embodiment of Figure 3 and will not be described herein. In addition, the application of the present invention should not be limited to the 2 times voltage and 3 times voltage charge pump circuit structure, and the present invention and its various embodiments can be applied to reduce 涟 by 4 times pressure, 5 times pressure or even any multiple pressure. Wave noise. , f
綜上所述，本發明控制電路因採用控制器根據控制輸 之電【值控制電;^幫浦單^，進而調整電容器的充電 時間’且根據電荷幫浦單元的輸出端的電壓值 的放電時間，因此可達到減少漣波雜訊，並且增= 穩定性。 电峪的 雖然本發明已經以較佳實施例揭露如上，然 以限疋本發明，任何所屬技術領域具有通常知識者、/ 定者 範圍内，當可作些許之更動與潤掷， 為準。x 圍當視後社t料利範圍所界 【圖式簡單說明】 圖1缘示為習知的電荷幫浦電路。 圖示為圖1之動作波形圖。 電路的電路圖。 幫浦電路的電路 圖3~不為本發明實施例之電荷幫浦 圖4繪示為圖3之動作波形圖。 圖5纷不為本發明另-實施例之電荷 14 200818673 HD-2006-0020-TW 20964twf.doc/n 【主要元件符號說明】 100、 300、500 ··控制器 101、 3(U、5〇1 :電荷幫浦單元 102、 302、502、504 :電容器 303、503 :控制輸入端In summary, the control circuit of the present invention uses the controller according to the control power input [value control power; ^ pump single ^, and then adjust the charging time of the capacitor ' and according to the discharge time of the voltage value of the output of the charge pump unit Therefore, it is possible to reduce chop noise and increase = stability. The present invention has been described above with reference to the preferred embodiments, and is intended to be limited to the scope of the invention. x is a boundary between the scope of the company and the company. [Simplified illustration] Figure 1 shows the conventional charge pump circuit. The figure shows the action waveform of Figure 1. Circuit diagram of the circuit. Circuit of the pump circuit Fig. 3 is a charge pump which is not an embodiment of the invention. Fig. 4 is a diagram showing the action waveform of Fig. 3. FIG. 5 is not a charge of another embodiment of the invention. 14 200818673 HD-2006-0020-TW 20964twf.doc/n [Description of main components] 100, 300, 500 ········· 1 : charge pump unit 102, 302, 502, 504: capacitor 303, 503: control input
Vin :輸入電壓 SW11、SW13、SW14、SW15、SW31、SW33、SW34、 SW35、SW51、SW53、SW54、SW55、SW56、SW57、 SW58 :開關 CU10、CU30、CU50 :控制單元 ΟΡΙΟ、OP30、OP3卜 OP50、OP51 :比較器 R10、Rll、R30、R31、R32、R33、R50、R51、R52、 R53 :電阻 C1卜C31、C51 :負載電容 Vout :輸出電壓 VI :鋸齒波 V2 :預設電壓 CT30、CT50 :脈寬調變信號 CT31、CT51 :控制信號 15Vin : Input voltage SW11, SW13, SW14, SW15, SW31, SW33, SW34, SW35, SW51, SW53, SW54, SW55, SW56, SW57, SW58: Switch CU10, CU30, CU50: Control unit ΟΡΙΟ, OP30, OP3, OP50 , OP51 : Comparator R10, R11, R30, R31, R32, R33, R50, R51, R52, R53: Resistor C1, C31, C51: Load capacitance Vout: Output voltage VI: Sawtooth wave V2: Preset voltage CT30, CT50 : Pulse width modulation signal CT31, CT51: Control signal 15