TW200805593A - Electronic device embedded with semiconductor package(s) - Google Patents

Electronic device embedded with semiconductor package(s) Download PDF

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Publication number
TW200805593A
TW200805593A TW095125716A TW95125716A TW200805593A TW 200805593 A TW200805593 A TW 200805593A TW 095125716 A TW095125716 A TW 095125716A TW 95125716 A TW95125716 A TW 95125716A TW 200805593 A TW200805593 A TW 200805593A
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Taiwan
Prior art keywords
semiconductor package
electronic device
printed circuit
circuit board
cavity
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Application number
TW095125716A
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Chinese (zh)
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TWI298530B (en
Inventor
Ron Iwata
Wen-Jeng Fan
Li-Chih Fang
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Powertech Technology Inc
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Priority to TW095125716A priority Critical patent/TWI298530B/en
Publication of TW200805593A publication Critical patent/TW200805593A/en
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Publication of TWI298530B publication Critical patent/TWI298530B/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/19Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
    • H01L2924/191Disposition
    • H01L2924/19101Disposition of discrete passive components
    • H01L2924/19105Disposition of discrete passive components in a side-by-side arrangement on a common die mounting substrate

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  • Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)

Abstract

Disclosed is an electronic device embedded with semiconductor package (s), which includes a printed wiring board (PWB) and at least one of the semiconductor package. The PWB has a cavity for the package. The semiconductor package includes a chip carrier and a plurality of conductive balls on side (s) of the carrier. Accordingly, the semiconductor package will not fill up the cavity and have an improved embedded depth.

Description

200805593 九、發明說明: 【發明所屬之技術領域】 本發明係有關於半導體封裝件之電子裝置 有關於一種嵌埋半導體封裝件之電子裝置。 【先前技術】 泛舉記憶卡、記憶體模組、手機通訊板、 筆記型電腦)主機板或顯示卡等電子裝置,無 效能、微小化與薄化發展。然在發展過程中 其製造可行性、成本、良率與可修補性等因. 在以往的電子裝置中會表面接合上至少 封裝件。如第1圖所示,一種習知的電子裝 少包含一印刷電路板 11 0、至少一半導體封 以及適當所需之被動元件130等等。該半導 120主要包含有晶片載體121、晶片122、封 與銲球1 2 4,晶片1 2 2係設置於該晶片載體 並以銲線125使該晶片122之銲塾122A電性 晶片载體 121。目前常見地,該半導體封裝叫 為球格陣列(BGA)封裝型態,複數個銲球1 24 設在該晶片載體121之一下表面。當該半導 1 2 0表面接合至該印刷電路板11 〇之外表面 裝置100之整體厚度係包含了該印刷電路板 度 '該半導體封裝件1 20之厚度與該些銲球 高,不符合薄化與微小化之要求,在有限高 密集配置該電子裝置1 00,該半導體封裝件 ’特別係 電腦(或 不朝向高 仍要考慮 一半導體 豊1 0 0至 裝件120 體封裝件 膠體123 121 上, 連接至該 ί牛120係 係陣列裝 體封襞件 ,該電子 1 1 0之厚 124之球 度内無法 120容易 200805593 受到碰撞而導致銲球1 24之掉球或電性斷路。 如第2圖所示,另一種習知的電子裝置200係採用 直接晶片連接(Direct Chip Attachment,DCA)技術,晶 片220及被動元件230係直接裝設在一印刷電路板21 〇 上,以銲線222電性連接該晶片220之銲墊221至該 印刷電路板2 1 0,再以一封膠體223塗敷在該印刷電 路板210上,以密封該晶片22〇。由於晶片22〇是不 _ 先封設成半導體封裝件,故能小幅降低電子裝置2 〇 〇 之厚度。但此一電子裝置200所採用的晶片22〇必須 是已知良好晶粒(KGD)且在模組過程不能有失誤,否 則會產生高不良率並且不良的晶片220是無法被拆卸 修補。 【發明内容】 為了解決上述之問題,本發明之主要目的係在於提 供一種欲埋半導體封裝件之電子裝置,能增加半導體 # 封裝件之嵌埋深度,在有限高度下接合半導體封裝件 與印刷電路板,且能在模組測試之後容易脫拔半導體 封裝件進行修補。 本發明的目的及解決其技術問題是採用以下技術 方案來實現的。本發明揭示一種嵌埋半導體封裝件之 電子裝置,其係包含一印刷電路板以及至少一半導體封襞 件。該印刷電路板係具有至少一容穴,在該容穴之至少一側 壁係形成有複數個内接端。該半導體封裝件係嵌埋該容弋 内,該半導體封裝件包含_晶片載體一晶片、—封膠體 200805593 及複數個導電球,其中該些導電球係設置於該晶片載體之一 側面以接合至該些内接端,並使該半導體封裝件不填滿該 容穴。 本發明的目的及解決其技術問題還可採用以下技 術措施進一步實現。 在岫述的電子裝置中,另包含有一液態填充膠,其係 真滿於該各穴與該半導體封裝件之間的縫隙並密封該些導 電球。 在前述的電子裝置中,該容穴係為一貫通孔。 在則述的嵌埋半導體封裝件之電子裝置中,該印刷 電路板係為一硬質多層板。 在則述的電子裝置中,該印刷電路板係選自於通訊 板、記憶卡之载板與記憶體模組之模組板。 、卜&述的電子裝置中,該印刷電路板之一側係形成有 複數個金手指。 • 在前述的電子裝置中,該晶片係為一記憶體晶片。 在前述的嵌埋半導體射裝件之電子裝置中,另包含 有一散熱片,其係貼附於該印刷電路板。 且t前述的電子裝置中’該半導體封裝件之晶片載體係 u 表面導熱層,其係熱耦合(thermally coupled)至該散熱 在前述的電子裝置中, 在前述的電子裝置中, 在前述的電子襞置中, «亥些内接端係為側面金屬塾。 亥些内接端係為縱切之鍍通孔。 該些導電球係為銲球,並以回 200805593 銲方式接合至該些内接墊。 【實施方式】 在本發明之第一具體實施例中,配合參閱第3及4 圖,揭示一種嵌埋半導體封裝件之電子裝置3 〇 。 如第3及4圖所示,該電子裝置3〇〇主^包含一印刷電 路板310以及至少-半導體封裝件32()。該印刷電路板⑽ 係具有至少一容穴311,在該容穴311之至少一側壁312係 形成有複數個内接端3 13,如侧面金屬墊。在本實施例中, 該印刷電路板3K)係可為-硬質多層板,例如該印刷電路板 310係可選自於通訊板、記憶卡之載板與記憶體模組之模組 板之其中之一,在該印刷電路板31〇之外 被動元請或電子零組件。此外,該容穴311;;;= 通孔,以利取放吸嘴上下方向之吸附固定。另,該容穴3ιι 之尺寸係可大於該半導體封裝件32〇之尺寸。 該半導體封裝件320係嵌埋該容穴3丨i内。該半導體封 # 裝件320主要包含一晶片載體321、一晶片322、一封膠體 323以及複數個導電球324。該晶片322係設置於該晶片载 體321上,該晶片載體32丨係可為小型印刷電路板、電路薄 膜或導線架,並可利用複數個銲線或凸塊使該晶片322之銲 墊322A電性連接至該晶片載體321,並以該封膠體密 封該日日片3 22。在本實施例中,該晶片322係可為一記憶體 晶片,如快閃記憶體或是動態隨機存取記憶體。 不同習知球格陣列封裝件(BGA package),該些導電球 324係5又置於漆晶片载體321之一側面a,以接合至該些 8 200805593 内接端313,並使該半導體封裝件320不填滿該容穴3ιι。 因此,該電子裝置300能增進該半導體封裝件32〇之嵌埋深 度。在嵌埋之後,該半導體封裝件320可電性導通至該印刷 電路板310且不明顯凸出於該印刷電路板3 1〇之外表面,而 能進行模組測試。當測得不良的半導體封裝件32〇,可以容 易地由該容穴311内拔除不良的半導體封裝件32〇,並更換 另一半導體封裝件320。因此,該電子裝置3〇〇之最大高 度可接近該印刷電路板3 1 0之厚度,可運用於各式可 攜式電子產品,並使該半導體封裝件32〇不易被碰傷。 如第4圖所示,在本實施例中,該些導電球324係可設 置於该晶片載體321之四周側面321A,並且該些導電球324 係可為銲球。其中一種已知的球接合方法係使用回銲方法使 该些導電球3 24焊接接合至該些内接端313,該些導電球3 24 在溶融時會有高表面張力,使該晶片載體321之側面321 a 對準在該些内接端313之水平面,自動調整該半導體封裝件 320到預定的嵌埋深度。 較隹地,該電子裝置300可另么含有一液態填充膠 330,其係填滿於該容穴3 i〗與該半導體封裝件32〇之間的 缝隙並密封該些導電球324。通常該液態填充膠330係形成 在測試之後,能使該半導體封裝件32〇 一體化堅固結合至該 印刷電路板3 10。在本實施例中,該液態填充膠33〇係可選 自底部填充膠(imderfill material)、液態環氧樹脂(liquid epoxy resin)或非導電膠(NCP)等。 在本發明之第二具體實施例中,揭示另一種嵌埋半 9 200805593 導體封裝件之電子裝置。第5圖為該電子裝置400之 截面示意圖。第6圖為該電子裝置4 0 0之俯視示意圖。 如第5及6圖所示,該電子裝置400主要包含一印刷電 路板41 0以及至少一半導體封裝件420。該印刷電路板41 〇 係具有至少一容穴411,在該容穴411之至少一侧壁412係 形成有複數個内接端413。較佳地,該些内接端4 13係可為 縱切之鍍通孔,有助於導電球424之球對位(如第6圖所示)。 在本實施例中,該印刷電路板4 10係可為記憶卡之載板或是 馨 記憶體模組之模組板,在該印刷電路板41 0之一側(如第6 圖所示)或是底面係形成有複數個可供插拔連接之金手指 414。為了增加散熱性,該電子裝置4〇〇可另包含有一散 熱片440,其係貼附於該印刷電路板41〇之其中一表面。可 利用一黏著層430黏著該印刷電路板4 1 〇與該散熱片44〇。 該半導體封裝件420係嵌埋該容穴411内,該半導體封 裝件420包含一晶片載體421、一晶片422、一封膠體ο] • 以及複數個導電球424,該晶片422之銲墊422A係以銲線 或其它電連接元件電性連接至該晶片载體4 2丨且被該封膠體 423所密封。其中,該些導電球424係設置於該晶片載體々η 之一側面421A,以接合至該些内接端413,並使該半導體封 衣件420不填滿該容穴411。一種導電球接合至内接端 413的方法係可運用導電膠、非導電顆粒膠(觀)或錫膏(圖 未繪出)等材料達成。如第6圖所示,該些導電球424係可 設置於該晶片載體421之其中兩對應側面421A。較佳地, 該晶片載體421係具有一表面導熱層421B,如鋼箱,其係 10 200805593 熱搞合至該散熱片440,以快速導散該半導體封裝件420發 出之熱量。一液態填充膠450係可填滿於該容穴411與該半 導體封裝件42G之間的縫隙並密封該些導電球424,以增進 產品一體結合性。 如第6圖所示,該電子裝置_係為―種薄片型可攜式 電子產品,如記憶卡或記憶體模組,同時兼具有產品薄化與 良好散熱性的功效,該印刷電路板41〇可插接至一插槽 460藉由該些金手指414能與外部電子裝置電性導通。因 此,本發明之電子裝置400能增進對半導體封裝件42〇之嵌 埋深度,在有限高度下嵌埋至少一半導體封裝件"Ο而呈薄 片狀,並使該半導體封裝件不易受碰傷,解決導電球424 受撞擊而掉球的問題。 以上所述,僅是本發明的較佳實施例而已,並非對 本發明作任何形式上的限制,雖然本發明已以較佳實 施例揭露如上,然而並非用以限定本發明,任何熟悉 本項技術者,在不脫離本發明之技術範圍内,所作的 任何簡單修改、等效性變化與修飾,#仍屬於本發明 的技術範圍内。 【圖式簡單說明】 第1圖·一種習知表面接合有球格陣列封裝件(BGA) 之電子裝置之截面示意圖。 第2圖:另一種習知直接晶片連接(DCA)之電子裝置之 截面示意圖。 第3 ® :依據本發明之第一具體實施例,一種嵌埋半 11 200805593 導體封襞件之電子裝置之截面示意圖。 第4圖:依據本發明之第一具體實施例,該電子裝置 之俯視示意圖。200805593 IX. Description of the Invention: [Technical Field] The present invention relates to an electronic device for a semiconductor package relating to an electronic device embedding a semiconductor package. [Prior Art] Electronic devices such as a memory card, a memory module, a mobile communication board, and a notebook computer, such as a motherboard or a display card, are inefficient, miniaturized, and thinned. However, in the development process, its manufacturing feasibility, cost, yield and repairability, etc.. In the past electronic devices, at least the package was surface-bonded. As shown in Fig. 1, a conventional electronic device comprises a printed circuit board 110, at least one semiconductor package, and a suitably required passive component 130 and the like. The semiconductor package 120 mainly includes a wafer carrier 121, a wafer 122, a sealing ball and a solder ball 1224. The wafer 12 is disposed on the wafer carrier and the bonding wire 122 is used to bond the wafer 122 to the wafer wafer. 121. Currently, the semiconductor package is called a ball grid array (BGA) package type, and a plurality of solder balls 1 24 are disposed on a lower surface of the wafer carrier 121. When the semiconducting surface of the semiconductor substrate is bonded to the printed circuit board 11 , the overall thickness of the surface device 100 includes the printed circuit board degree, and the thickness of the semiconductor package 120 is higher than the solder balls. Thinning and miniaturization requirements, the electronic device 100 is arranged in a limited high density, the semiconductor package 'specially computer (or not facing high still considers a semiconductor 豊1 0 0 to a package 120 body package colloid 123 On the 121, connected to the ί牛120 series array package sealing member, the thickness of the electron 110 is not able to be 120, and the damage is caused by the impact of the solder ball 1 24 or the electrical disconnection. As shown in FIG. 2, another conventional electronic device 200 adopts a direct chip attachment (DCA) technology, and the wafer 220 and the passive component 230 are directly mounted on a printed circuit board 21 , for soldering. The wire 222 is electrically connected to the pad 221 of the wafer 220 to the printed circuit board 210, and then coated on the printed circuit board 210 with a glue 223 to seal the wafer 22. The wafer 22 is not _ First sealed into semiconductor The package can reduce the thickness of the electronic device 2 。. However, the wafer 22 used in the electronic device 200 must be a known good die (KGD) and cannot be mistaken in the module process, otherwise it will be high. The defect rate and defective wafer 220 cannot be disassembled and repaired. SUMMARY OF THE INVENTION In order to solve the above problems, the main object of the present invention is to provide an electronic device for burying a semiconductor package, which can increase the embedding of the semiconductor # package. Depth, the semiconductor package and the printed circuit board are bonded at a limited height, and the semiconductor package can be easily removed after the module is tested for repair. The object of the present invention and solving the technical problem are achieved by the following technical solutions. The invention discloses an electronic device embedded with a semiconductor package, comprising a printed circuit board and at least one semiconductor sealing member. The printed circuit board has at least one cavity, and at least one sidewall of the cavity is formed with a plurality of sidewalls The semiconductor package is embedded in the capacitor, and the semiconductor package comprises a wafer carrier The wafer, the encapsulant 200805593 and the plurality of conductive balls, wherein the conductive balls are disposed on one side of the wafer carrier to be bonded to the inner ends, and the semiconductor package does not fill the cavity. The purpose and the solution of the technical problem can be further achieved by the following technical measures. In the electronic device described above, a liquid filling glue is further included, which is completely filled with the gap between the holes and the semiconductor package and sealed. In the above electronic device, the cavity is a through hole. In the electronic device in which the semiconductor package is embedded, the printed circuit board is a rigid multilayer board. In the electronic device described, the printed circuit board is selected from a communication board, a carrier board of a memory card, and a module board of a memory module. In the electronic device described in the above paragraph, a plurality of gold fingers are formed on one side of the printed circuit board. • In the aforementioned electronic device, the wafer is a memory wafer. In the above electronic device embedding a semiconductor injection device, a heat sink is further included, which is attached to the printed circuit board. And in the above electronic device, the wafer carrier of the semiconductor package is a thermally conductive layer on the surface of the substrate, which is thermally coupled to the heat sink in the aforementioned electronic device. In the aforementioned electronic device, in the aforementioned electronic device In the set, the inner end of the section is the side metal 塾. The inner ends of the hood are plated through holes for slitting. The conductive balls are solder balls and are joined to the inner pads by a welding method back to 200805593. [Embodiment] In a first embodiment of the present invention, with reference to Figures 3 and 4, an electronic device 3 嵌 embedding a semiconductor package is disclosed. As shown in Figures 3 and 4, the electronic device 3 includes a printed circuit board 310 and at least a semiconductor package 32 (). The printed circuit board (10) has at least one cavity 311, and at least one sidewall 312 of the cavity 311 is formed with a plurality of internal terminals 3 13, such as side metal pads. In this embodiment, the printed circuit board 3K) may be a hard multi-layer board. For example, the printed circuit board 310 may be selected from the group consisting of a communication board, a carrier card of a memory card, and a module board of a memory module. One of them is a passive component or an electronic component outside the printed circuit board 31〇. In addition, the cavity 311;;; = through hole, in order to facilitate the suction and fixation of the suction nozzle in the up and down direction. In addition, the size of the cavity 3 ιι can be larger than the size of the semiconductor package 32 。. The semiconductor package 320 is embedded in the cavity 3丨i. The semiconductor package assembly 320 mainly includes a wafer carrier 321, a wafer 322, a gel 323, and a plurality of conductive balls 324. The wafer carrier 322 is disposed on the wafer carrier 321, and the wafer carrier 32 can be a small printed circuit board, a circuit film or a lead frame, and the pad 322A of the wafer 322 can be made by using a plurality of bonding wires or bumps. The wafer carrier 321 is electrically connected, and the day sheet 3 22 is sealed with the sealant. In this embodiment, the wafer 322 can be a memory chip such as a flash memory or a dynamic random access memory. In a conventional BGA package, the conductive balls 324 are placed on one side a of the lacquer wafer carrier 321 to bond to the 8 200805593 internal terminals 313, and the semiconductor package 320 is Do not fill the pocket 3ιι. Therefore, the electronic device 300 can enhance the embedded depth of the semiconductor package 32. After embedding, the semiconductor package 320 can be electrically conducted to the printed circuit board 310 and does not significantly protrude from the outer surface of the printed circuit board 3, and can be tested by the module. When the defective semiconductor package 32 is measured, the defective semiconductor package 32A can be easily removed from the cavity 311, and the other semiconductor package 320 can be replaced. Therefore, the maximum height of the electronic device 3 can be close to the thickness of the printed circuit board 310, and can be applied to various portable electronic products, and the semiconductor package 32 is not easily scratched. As shown in FIG. 4, in the embodiment, the conductive balls 324 can be disposed on the peripheral side 321A of the wafer carrier 321, and the conductive balls 324 can be solder balls. One of the known ball bonding methods uses a solder reflow method to solder-bond the conductive balls 3 24 to the inner terminals 313. The conductive balls 3 24 have a high surface tension during melting, so that the wafer carrier 321 The side surface 321a is aligned with the horizontal plane of the inner terminals 313 to automatically adjust the semiconductor package 320 to a predetermined embedding depth. In a relatively short manner, the electronic device 300 can further comprise a liquid filling adhesive 330 which fills the gap between the cavity 3 and the semiconductor package 32A and seals the conductive balls 324. Typically, the liquid fill 330 is formed after testing to enable the semiconductor package 32 to be integrally bonded to the printed circuit board 3 10 . In this embodiment, the liquid filling adhesive 33 can be selected from an imderfill material, a liquid epoxy resin or a non-conductive rubber (NCP). In a second embodiment of the present invention, another electronic device embedding a semi-conductor package of 200805593 is disclosed. Fig. 5 is a schematic cross-sectional view of the electronic device 400. Figure 6 is a schematic plan view of the electronic device 400. As shown in Figures 5 and 6, the electronic device 400 mainly includes a printed circuit board 41 0 and at least one semiconductor package 420. The printed circuit board 41 has at least one cavity 411, and at least one side wall 412 of the cavity 411 is formed with a plurality of internal ends 413. Preferably, the inner ends 413 are longitudinally plated through holes to facilitate ball alignment of the conductive balls 424 (as shown in Fig. 6). In this embodiment, the printed circuit board 4 10 can be a carrier board of a memory card or a module board of a memory module, on one side of the printed circuit board 41 0 (as shown in FIG. 6 ) Or the bottom surface is formed with a plurality of gold fingers 414 for plugging and unplugging. In order to increase heat dissipation, the electronic device 4 may further include a heat dissipation sheet 440 attached to one surface of the printed circuit board 41. The printed circuit board 4 1 〇 can be adhered to the heat sink 44 by an adhesive layer 430. The semiconductor package 420 is embedded in the cavity 411. The semiconductor package 420 includes a wafer carrier 421, a wafer 422, a gel, and a plurality of conductive balls 424. The pads 422A of the wafer 422 are used. The wire carrier or other electrical connection component is electrically connected to the wafer carrier 42 and sealed by the sealant 423. The conductive balls 424 are disposed on one side 421A of the wafer carrier Tn to be bonded to the inner ends 413, and the semiconductor package 420 does not fill the cavity 411. A method of bonding a conductive ball to the inner end 413 can be achieved by using a conductive paste, a non-conductive granule (viewing) or a solder paste (not shown). As shown in Fig. 6, the conductive balls 424 can be disposed on two corresponding side faces 421A of the wafer carrier 421. Preferably, the wafer carrier 421 has a surface heat conducting layer 421B, such as a steel box, which is thermally bonded to the heat sink 440 to rapidly dissipate the heat generated by the semiconductor package 420. A liquid filling glue 450 can fill the gap between the cavity 411 and the semiconductor package 42G and seal the conductive balls 424 to enhance the product integration. As shown in FIG. 6, the electronic device is a type of portable electronic product such as a memory card or a memory module, and has the functions of thinning and good heat dissipation, and the printed circuit board The 41 〇 can be plugged into a slot 460 by which the gold fingers 414 can be electrically connected to the external electronic device. Therefore, the electronic device 400 of the present invention can enhance the embedding depth of the semiconductor package 42, embedding at least one semiconductor package at a limited height, and forming a thin sheet, and making the semiconductor package less susceptible to bumps. The problem that the conductive ball 424 is hit by the impact and the ball is dropped. The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention. Any simple modifications, equivalent changes, and modifications made within the technical scope of the present invention are still within the technical scope of the present invention. BRIEF DESCRIPTION OF THE DRAWINGS Fig. 1 is a schematic cross-sectional view showing an electronic device in which a conventional ball grid array package (BGA) is bonded. Figure 2: A schematic cross-sectional view of another conventional direct die attach (DCA) electronic device. 3 ○: A schematic cross-sectional view of an electronic device embedding a semi-container 11 200805593 in accordance with a first embodiment of the present invention. Figure 4 is a top plan view of the electronic device in accordance with a first embodiment of the present invention.

第5圖:依據本發明之第二具體實施例,另一種嵌埋 半導體封裝件之電子裝置之截面示意圖。 第6圖:依據本發明之第二具體實施例,該電子裝置 之俯視示意圖 0 【主要元件符號說明】 100 電子裝置 110 印刷電路板 120 半導體封裝 件 121 晶片載體 122 晶片 122A銲墊 123 封膠體 124 銲球 125 銲線 130 被動元件 200 電子裝置 210 印刷電路板 220 晶片 22 1 銲墊 222 銲線 223 封膠體 230 被動元件 300 電子裝置 3 10 印刷電路板 3 11 容穴 3 12 側壁 3 13 内接端 320 半導體封裝件 321 晶片載體 321 A .側面 322 晶片 322A .銲墊 12 200805593 3 23 封膠體 324導電球 3 30液態填充膠 340被動元件 400電子裝置 4 1 0 印刷電路板 4 1 1 容穴 412側壁 4 1 3 内接端 4 1 4金手指 420半導體封裝件 421晶片載體 421A侧面 421B表面導熱層 ^ 422晶片 422A銲墊 423 封膠體 424 導電球 430黏著層 440散熱片 450液態填充膠 4 6 0插槽 13Figure 5 is a cross-sectional view showing another electronic device embedding a semiconductor package in accordance with a second embodiment of the present invention. FIG. 6 is a top plan view of the electronic device according to a second embodiment of the present invention. [Main component symbol description] 100 electronic device 110 printed circuit board 120 semiconductor package 121 wafer carrier 122 wafer 122A pad 123 encapsulant 124 Solder ball 125 Solder wire 130 Passive component 200 Electronic device 210 Printed circuit board 220 Wafer 22 1 Solder pad 222 Wire bond 223 Sealant 230 Passive component 300 Electronics 3 10 Printed circuit board 3 11 Hole 3 12 Side wall 3 13 Inner end 320 semiconductor package 321 wafer carrier 321 A. side 322 wafer 322A. pad 12 200805593 3 23 sealing body 324 conductive ball 3 30 liquid filling glue 340 passive component 400 electronic device 4 1 0 printed circuit board 4 1 1 cavity 412 side wall 4 1 3 Interminating End 4 1 4 Gold Finger 420 Semiconductor Package 421 Wafer Carrier 421A Side 421B Surface Thermal Conductive Layer ^ 422 Wafer 422A Solder Pad 423 Sealant 424 Conductive Ball 430 Adhesive Layer 440 Heat Sink 450 Liquid Filled Rubber 4 6 0 Insert Slot 13

Claims (1)

200805593 十、申請專利範圍: 1 種嵌埋半導體封裝件之電子裝置,主要包含: 印刷電路板,其係具有至少一容穴,在該容穴之至少 一側壁係形成有複數個内接端;以及 至少一半導體封裝件,其係嵌埋該容穴内,該半導體封 裝件包含一晶片載體、一晶片、一封膠體以及複數個導 電球,其中該些導電球係設置於該晶片載體之一侧面, 以接合至該些内接端,並使該半導體封裝件不填滿該容 穴。 如申明專利範圍第1項所述之嵌埋半導體封裝件之電子 裝置,另包含有一液態填充膠,其係填滿於該容穴與該 半導體封裝件之間的縫隙並密封該些導電球。 如申喷專利範圍第1項所述之嵌埋半導體封裝件之電子 裝置,其中該容穴係為一貫通孔。 4如申睛專利範圍第1項所述之嵌埋半導體封裝件之電子 裝置,其中該印刷電路板係為一硬質多層板。 如申明專利範圍第1項所述之嵌埋半導體封裝件之電子 裝置,其中該印刷電路板係選自於通訊板、記憶卡之载 板與記憶體模組之模組板之其中之一。 如申明專利範圍第1項所述之嵌埋半導體封裝件之電子 裝置,其中該印刷電路板之一側係形成有複數個金手指。 7如申明專利範圍第i項所述之嵌埋半導體封裝件之電子 衣置,其中該晶片係為一記憶體晶片。 8如申4專利範圍第〗項所述之嵌埋半導體封裝件之電子 200805593 裝置另包含有一散熱片,其係貼附於該印刷電路板。 9如申專利範圍第8項所述之嵌埋半導體封裝件之電子 裝置’其中該半導體封裝件之晶片載體係具有一表面導 熱層,其係熱耦合(thermailye〇upled)至該散熱片。 10、 如申請專利範圍第i項所述之嵌埋半導體封裝件之電 子裝置,其中該些内接端係為側面金屬塾。 11、 如申請專利範圍第i項所述之嵌埋半導體封裝件之電 子裝置,其中該些内接端係為縱切之鍍通孔。 • 12、如申請專利範圍第!項所述之嵌埋半導體封裝件之電 子裝置,其中該些導電球係為銲球,並以回鮮方式接人 至該些内接墊。200805593 X. Patent application scope: An electronic device embedded with a semiconductor package, comprising: a printed circuit board having at least one cavity, wherein at least one sidewall of the cavity is formed with a plurality of internal ends; And at least one semiconductor package embedded in the cavity, the semiconductor package comprising a wafer carrier, a wafer, a gel, and a plurality of conductive balls, wherein the conductive balls are disposed on one side of the wafer carrier , to bond to the inner ends, and the semiconductor package does not fill the cavity. An electronic device embedding a semiconductor package according to claim 1, further comprising a liquid filling glue filling the gap between the cavity and the semiconductor package and sealing the conductive balls. An electronic device embedded in a semiconductor package according to claim 1, wherein the cavity is a through hole. 4. The electronic device embedding a semiconductor package according to claim 1, wherein the printed circuit board is a rigid multi-layer board. An electronic device embedding a semiconductor package according to claim 1, wherein the printed circuit board is selected from the group consisting of a communication board, a carrier card of a memory card, and a module board of a memory module. An electronic device embedding a semiconductor package according to claim 1, wherein one side of the printed circuit board is formed with a plurality of gold fingers. 7. The electronic device of the embedded semiconductor package of claim i, wherein the wafer is a memory wafer. The electronic device of the embedded semiconductor package of claim 4, wherein the device further comprises a heat sink attached to the printed circuit board. The electronic device embedded in the semiconductor package of claim 8, wherein the wafer carrier of the semiconductor package has a surface heat conducting layer that is thermally coupled to the heat sink. 10. The electronic device of the embedded semiconductor package of claim i, wherein the inner ends are side metal turns. 11. The electronic device of the embedded semiconductor package of claim i, wherein the inner ends are longitudinally plated through holes. • 12, such as the scope of patent application! The electronic device embedding the semiconductor package, wherein the conductive balls are solder balls and are reciprocated to the inner pads. 1515
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Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9431327B2 (en) 2014-05-30 2016-08-30 Delta Electronics, Inc. Semiconductor device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9431327B2 (en) 2014-05-30 2016-08-30 Delta Electronics, Inc. Semiconductor device

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