200805588 九、發明說明： 【發明所屬之技術領域】 本發明係有關於一種影像感測封裝構造，特別係有 關於一種晶片尺寸影像感測封裝構造。 【先前技術】 如同其它的半導體封裝產品朝向微小化發展這 般，影像感測封裝構造之尺寸亦是越來越小。故會採 行覆晶玻璃（Chip-On-Glass)之封裝技術，以縮小以往 銲線的佔用空間。然在玻璃基板與影像感測晶片之間 通常會有一氣密空間，若有塵粒進入該氣密空間則會 嚴重影響影像感測品質。 如第1圖所示，一種習知的晶片尺寸影像感測封裝 構造100主要包含一影像感測晶片110、複數個凸塊12〇 與一玻璃基板13 0。該影像感測晶片11 〇之一主動面丨丨丨上 係形成有一感測區112與複數個銲墊113。利用凸塊12〇或 銲料或使該些銲墊113電連接至該玻璃基板13〇，並經由該 玻璃基板1 3 0之導通孔1 3 1與位在另一表面之球墊1 3 2，電 性連接至在外表面之銲球140。通常在該影像感測晶片1】〇 與該玻璃基板130之間設置有一擋堤15〇，其係圍繞該晶片 110之感測區112，以避免在COG接合過程使用之密封膠 16〇(如underfill、ACP、NCP等等）會溢膠污染至該感測區 112。故在該影像感測晶片〗10與該玻璃基板13〇之間會有 氣德、空間1 7 0。當有塵粒171落入該氣密空間17 〇内，會 自由活動，當沾附至該感測區112，光線無法射入，下方的 5 200805588 感測元件會大量失效。又感測元件相當敏感，無法清理在感 測區112上的塵粒171。目前已知在晶圓切割、c〇(3接合與 模組製程塵粒中均有可能會導致塵粒的發生。 【發明内容】 本發明之主要目的係在於提供一種晶片尺寸影像 感測封裝構造，用以解決上述問題，達到保護感測區 及在凸塊接合時塵粒不會卡在感測區而無法清理，並 避免有其他污染直接影響感測區。 本發明之次一目的係在於提供一種晶片尺寸影像 感測封裝構造，解決影像感測器在C 〇 G接合時溢膠污 染感測區之問題。 本發明的目的及解決其技術問題是採用以下技術 方案來實現的。依據本發明，一種晶片尺寸影像感測 封裝構造主要包含一影像感測晶片、複數個凸塊以及一 B 階光固化透明膠層。該影像感測晶片在一主動面上係形成有 一感測區與複數個銲墊。該些凸塊係設置於該些銲塾。該B 階光固化透明膠層係形成於該影像感測晶片之主動面，其係 覆蓋於該感測區之上並包覆該些凸塊之至少一部位。 本發明的目的及解決其技術問題還可採用以下技 術措施進一步實現。 在前述的晶片尺寸影像感測封裝構造中，該B階光 固化透明膠層係為B階UV透明膠。 在前述的晶片尺寸影像感測封裝構造中，該影像感 測晶片係具有一保護層（passivation layer)，該保護層係具有 200805588 一開口，以不遮蓋該感測區。 在前述的晶片尺寸影像感測封裝構造中，該B階光 固化透明膠層之厚度係約略等同該些凸塊的高度。 在前述的晶片尺寸影像感測封裝構造中，另包含有 一玻璃基板，其係具有一線路層，其中該些凸塊係接合至該 玻璃基板之該線路層’該光固化透明膠層係貼合該玻璃基 板。 【實施方式】 本發明之第一具實體實施例配合參閱第2圖揭示 一種晶片尺寸影像感測封裝構造200。 請參閱第2圖，該晶片尺寸影像感測封裝構造2〇〇主 要包含一影像感測晶片21 〇、複數個凸塊220以及一 B階光 固化透明膠層230，其整體尺寸大致與該影像感測晶片21〇 相等。該影像感測晶片2 10係具有一主動面2 11，在該主動 面211上係形成有一感測區212與複數個銲塾213。CMOS 影像感測元件係設置於該感測區2 12内，並以該些銲塾2 1 3 對外電性傳導。該影像感測晶片2 1 0另在該主動面2 11上具 有一保護層214(passivation layer)，該保護層214係具有一 開口 215，以不遮蓋該感測區212。 該些凸境220係設置於該些銲墊213。通常該些凸塊220 之材質可為金（Au)，可由打線或電艘技術形成在該些銲墊 上。 該B階光固化透明膠層230係形成於該影像感測晶片 210之主動面211，。該b階光固化透明膠層230係覆蓋於 7 200805588 該感測區212之上並包覆該些凸塊220之至少一部位。如第 2圖所示，該些凸塊220被該B階光固化透明膠層23〇所包 覆之部位係至少包含有該些凸塊220之底部。在本實施例 中’該B階光固化透明膠層230之厚度係可約略等同該些凸 塊220的高度。在本實施例中，該b階光固化透明膠層230 係為B階UV透明膠，在COG製程中，該b階光固化透明 膠層2 3 0係為B階狀癌’而呈半固化狀態，以黏接一玻璃基 板 240 〇 在本實施例中，該晶片尺寸影像感測封裝構造2〇〇另包 含有一玻璃基板240以及複數個銲球250。該玻璃基板240 除了具有一玻璃片之外另具有一線路層241、複數個通孔242 以及複數個球墊243。其中，該些凸塊220係接合至該玻璃 基板2 4 0之該線路層2 41，該B階光固化透明膠層2 3 〇係貼 合該玻璃基板240，而使得該晶片240與該玻璃基板240之 間不具有可供塵粒活動之氣密空間。該些銲球2 5 0係接合至 遠玻璃基板240之該些球墊243，該些通孔242係電連接該 些球塾243與該線路層24 1之間。 因此’在上述之晶片尺寸影像感測封裝構造2〇〇，當該 晶片21 0與該玻璃基板240相接合時，即使有塵粒260落在 兩者之間’亦會被該B階光固化透明膠層230固定在該玻璃 基板240具有線路層241之接合面，塵粒260不會自由活動 也不會落在該感測區212内。故塵粒260與感測區2 1 2之間 會有一高度差，約等同該B階光固化透明膠層230之厚度， 光線仍可以從旁散設進入該感測區212，在該感测區212内 8 200805588 的CMOS影像感測元件持續能有效運作。 請參閱第3圖，在本發明之第二具體實施例中，揭 示另一種晶片尺寸影像感測封裝構造300主要包含一影像 感測晶片3 10、複數個凸塊320以及一 B階光固化透明膠層 330。該影像感測晶片310在一主動面311上係形成有一感 測區312與複數個銲墊313。其中，該影像感測晶片310係 可具有一保護層3 iMpassivation layer)，該保護層3 14係具 有一開口 3 1 5，以不遮蓋該感測區3 12。該些凸塊320係設 ® 置於該些銲墊313上。該B階光固化透明膠層330係形成於 該影像感測晶片3 10之主動面3 11，其係覆蓋於該感測區3 12 之上並包覆該些凸塊320之至少一部位。在本實施例中， 該B階光固化透明膠層3 3 0係為B階UV透明膠，該B階光 固化透明膠層330之厚度係可約略等同該些凸塊32〇的高 度。因此，無論是晶圓切割或是在後續的COG接合或模組 製程中，塵粒會落在該B階光固化透明膠層330之外表面 而易於清理’解決習知塵粒卡在感測區而無法清理之問 題，並避免有其他污染直接影響該感测區3 1 2。 依據本發明之第一^具體實施例’該晶片尺寸影像感 測封裝構造3 00可進一步應用於影像感測器模組。請參 閱第4圖，一種影像感測器模組包含一電路板41 〇、一玻 璃基板420以及該晶片尺寸影像感測封裝構造3〇〇。該電路 板41 0表面結合有一控制器411與至少一被動元件412。該 玻璃基板420係結合於該電路板410並具有一線路層421以 電性連通至該電路板41 0。該晶片尺寸影像感測封裝構造$ 〇 〇 9 200805588 係結合至該玻璃基板420。其中，該晶片尺寸影像感測封裝 構造300包含該影像感測晶片31〇、該些凸塊32〇以及該光 固化透明膠層330。其中，該些凸塊320係接合至該玻璃基 板420之該線路層421，該光固化透明膠層33〇係貼合該玻 璃基板420，並能以UV照射達到完全固化。 或者，如第5圖所示，依據本發明之第二具體實施 例，該晶片尺寸影像感測封裝構造3〇〇係可應用於另 一種影像感測器模組，其包含一電路板5 1 〇、一鏡頭模組 520以及該晶片尺寸影像感測封裝構造3〇〇。該電路板5 1 〇 表面結合有一控制器5 11與至少一被動元件5 12，該電路板 5 10係具有一窗孔5 13。該鏡頭模組520係對準於該窗孔5 13 而結合於該電路板5 10之上方。該晶片尺寸影像感測封裝構 造3 00係對準於該窗孔513而結合於該電路板510之下方， 該晶片尺寸影像感測封裝構造300包含該影像感測晶片 310、該些凸塊320以及該光固化透明膠層330。其中，該些 凸塊320係接合至該電路板510之一線路層530，該光固化 透明膠層330係貼合該電路板510。 以上所述，僅是本發明的較佳實施例而已，並非對 本發明作任何形式上的限制，雖然本發明已以較佳實 施例揭露如上，然而並非用以限定本發明，任何熟悉 本項技術者，在不脫離本發明之技術範圍内，所作的 任何簡單修改、等效性變化與修飾，均仍屬於本發明 的技術範圍内。 【圖式簡單說明】 10 200805588 第1圖··一種習知影像感測封装構造之截面示意圖。 弟2圖：依據本發明之第一 i體實施例’ 一種晶片尺 寸影像感測封裝構造之截面示意圖。 第3圖：依據本發明之第二具體實施例，另一種晶片 尺寸影像感測封裝構造之截面示意圖。 弟4圖：依據本發明之第二具鑛實施例’一種晶片尺 寸影像感測封裝構造之應用於一種影像感測 器模組之截面示意圖。 第5圖：依據本發明之第二具體實施例，一種晶片尺 寸影像感測封裝構造之應用於另一種影像感 測器模組之截面示意圖。 【主要元件符號說明】 100 影像感測封裝構造 110 影像感測晶片 111 主動面 112 感測區 113 銲墊 120 凸塊 130 玻璃基板 131 導通孔 132 球墊 140 辉球 150 擋堤 160 密封膠 170 氣密空間 171 塵粒 200 晶片尺寸影像感測封裝構造 210 影像感測晶片 211 主動面 212 感測區 213 銲墊 214 保護層 215 開口 220 凸塊 230 B階光固化透明膠層 240 玻璃基板 241 線路層 242 通孔 11 200805588200805588 IX. Description of the Invention: TECHNICAL FIELD The present invention relates to an image sensing package structure, and more particularly to a wafer size image sensing package structure. [Prior Art] As other semiconductor package products are moving toward miniaturization, the size of image sensing package structures is becoming smaller and smaller. Therefore, chip-on-glass (Chip-On-Glass) packaging technology is adopted to reduce the space occupied by the conventional bonding wires. However, there is usually an airtight space between the glass substrate and the image sensing wafer. If dust particles enter the airtight space, the image sensing quality is seriously affected. As shown in FIG. 1, a conventional wafer size image sensing package structure 100 mainly includes an image sensing wafer 110, a plurality of bumps 12A and a glass substrate 130. A sensing region 112 and a plurality of pads 113 are formed on one of the active sensing surfaces of the image sensing wafer 11 . Using the bumps 12 〇 or solder or electrically connecting the pads 113 to the glass substrate 13 , and via the vias 1 3 1 of the glass substrate 130 and the ball pads 1 3 2 located on the other surface, Electrically connected to the solder balls 140 on the outer surface. Generally, a barrier 15 is disposed between the image sensing wafer 1 and the glass substrate 130, which surrounds the sensing region 112 of the wafer 110 to avoid the sealant 16 used in the COG bonding process (eg, Underfill, ACP, NCP, etc.) will contaminate the sensing area 112. Therefore, there is a gas and space 170 between the image sensing wafer 10 and the glass substrate 13A. When the dust particles 171 fall into the airtight space 17 ,, they will move freely. When they are attached to the sensing area 112, the light cannot be injected, and the lower sensing element of the 200805588 will be largely deactivated. The sensing element is also quite sensitive and cannot clean the dust particles 171 on the sensing area 112. It is known that wafer dicing, c 〇 (3 bonding and module process dust particles may cause dust particles to occur. SUMMARY OF THE INVENTION The main object of the present invention is to provide a wafer size image sensing package structure In order to solve the above problem, the protection sensing area is reached and the dust particles are not stuck in the sensing area when the bumps are joined, and cannot be cleaned, and other pollution is directly affected to affect the sensing area. The second object of the present invention is A wafer size image sensing package structure is provided to solve the problem that the image sensor overflows the sensing area during the C 〇 G bonding. The object of the present invention and solving the technical problem are achieved by the following technical solutions. According to the invention, a wafer size image sensing package structure mainly comprises an image sensing wafer, a plurality of bumps and a B-stage photocurable transparent adhesive layer. The image sensing wafer is formed with a sensing area and a plurality of active surfaces. The bumps are disposed on the solder bumps. The B-step photocurable transparent adhesive layer is formed on the active surface of the image sensing wafer, and the bump is covered by the sensing And covering at least one portion of the bumps. The object of the present invention and solving the technical problem thereof can be further achieved by the following technical measures. In the foregoing wafer size image sensing package structure, the B-stage light curing transparent The adhesive layer is a B-stage UV transparent adhesive. In the foregoing wafer size image sensing package structure, the image sensing wafer has a passivation layer having an opening of 200805588 to cover the opening. In the foregoing wafer size image sensing package structure, the thickness of the B-stage photocurable transparent adhesive layer is approximately equal to the height of the bumps. In the foregoing wafer size image sensing package structure, an additional There is a glass substrate having a circuit layer, wherein the bumps are bonded to the circuit layer of the glass substrate. The photocurable transparent adhesive layer is adhered to the glass substrate. [Embodiment] The first device of the present invention Physical Embodiments Referring to FIG. 2, a wafer size image sensing package structure 200 is disclosed. Referring to FIG. 2, the wafer size image sensing package structure 2〇〇 The image sensing chip 21 〇, the plurality of bumps 220, and the B-stage photocurable transparent adhesive layer 230 are substantially equal in size to the image sensing chip 21 。. The image sensing wafer 2 10 has a The active surface 211 has a sensing area 212 and a plurality of soldering pads 213 formed on the active surface 211. The CMOS image sensing elements are disposed in the sensing area 212, and the soldering pads 2 1 3 The image sensing wafer 2 10 further has a passivation layer 214 on the active surface 2 11 , and the protective layer 214 has an opening 215 to not cover the sensing region 212 . The bumps 220 are disposed on the pads 213. Generally, the bumps 220 may be made of gold (Au), and may be formed on the pads by wire bonding or electric boat technology. The B-stage photocurable transparent adhesive layer 230 is formed on the active surface 211 of the image sensing wafer 210. The b-stage photocurable transparent adhesive layer 230 is covered on the sensing area 212 of 7 200805588 and covers at least a portion of the bumps 220. As shown in FIG. 2, the portions of the bumps 220 covered by the B-stage photocurable transparent adhesive layer 23A include at least the bottoms of the bumps 220. In the present embodiment, the thickness of the B-stage photocurable transparent adhesive layer 230 can be approximately equal to the height of the bumps 220. In this embodiment, the b-stage photocurable transparent adhesive layer 230 is a B-stage UV transparent adhesive. In the COG process, the b-stage photocurable transparent adhesive layer is a B-stage cancer and is semi-cured. The state is to adhere a glass substrate 240. In the embodiment, the wafer size image sensing package structure 2 further includes a glass substrate 240 and a plurality of solder balls 250. The glass substrate 240 has a wiring layer 241, a plurality of through holes 242, and a plurality of ball pads 243 in addition to a glass sheet. The bumps 220 are bonded to the circuit layer 2 41 of the glass substrate 240, and the B-stage photocurable transparent adhesive layer 2 3 is attached to the glass substrate 240, so that the wafer 240 and the glass are bonded to the glass. There is no airtight space between the substrates 240 for dust particles to move. The solder balls 250 are bonded to the ball pads 243 of the far glass substrate 240, and the through holes 242 are electrically connected between the ball 243 and the circuit layer 24. Therefore, in the above-described wafer size image sensing package structure 2, when the wafer 210 is bonded to the glass substrate 240, even if the dust particles 260 fall between the two, the B-stage light is cured. The transparent adhesive layer 230 is fixed to the bonding surface of the glass substrate 240 having the wiring layer 241, and the dust particles 260 are not free to move or fall within the sensing region 212. Therefore, there is a height difference between the dust particles 260 and the sensing region 2 1 2, which is approximately equal to the thickness of the B-stage photocurable transparent rubber layer 230, and the light can still be scattered from the side into the sensing region 212, and the sensing is performed. The CMOS image sensing elements in zone 212 200805588 continue to operate effectively. Referring to FIG. 3, in a second embodiment of the present invention, another wafer size image sensing package structure 300 is disclosed. The image sensing package 300 includes an image sensing wafer 3 10, a plurality of bumps 320, and a B-stage photocurable transparent. Adhesive layer 330. The image sensing wafer 310 is formed with a sensing region 312 and a plurality of pads 313 on an active surface 311. The image sensing chip 310 may have a protective layer 3 iM passivation layer, and the protective layer 314 has an opening 3 15 to cover the sensing region 312. The bumps 320 are disposed on the pads 313. The B-stage photo-curable transparent adhesive layer 330 is formed on the active surface 3 of the image sensing wafer 3 10 and covers the sensing area 312 and covers at least a portion of the bumps 320. In this embodiment, the B-stage photocurable transparent adhesive layer 330 is a B-stage UV transparent adhesive, and the thickness of the B-stage photocurable transparent adhesive layer 330 is approximately equal to the height of the bumps 32〇. Therefore, whether it is wafer cutting or in the subsequent COG bonding or module process, the dust particles will fall on the outer surface of the B-stage photocurable transparent adhesive layer 330 and be easy to clean 'solving the conventional dust particles in the sensing The area cannot be cleaned up, and avoiding other pollution directly affects the sensing area 3 1 2 . According to a first embodiment of the present invention, the wafer size image sensing package structure 300 can be further applied to an image sensor module. Referring to FIG. 4, an image sensor module includes a circuit board 41, a glass substrate 420, and the wafer size image sensing package structure. The surface of the circuit board 41 0 incorporates a controller 411 and at least one passive component 412. The glass substrate 420 is bonded to the circuit board 410 and has a wiring layer 421 electrically connected to the circuit board 41 0 . The wafer size image sensing package construction is incorporated into the glass substrate 420 by a 〇 2008 9 200805588. The wafer size image sensing package structure 300 includes the image sensing wafer 31A, the bumps 32A, and the photocurable transparent adhesive layer 330. The bumps 320 are bonded to the circuit layer 421 of the glass substrate 420. The photocurable transparent adhesive layer 33 is adhered to the glass substrate 420 and can be completely cured by UV irradiation. Alternatively, as shown in FIG. 5, in accordance with the second embodiment of the present invention, the wafer size image sensing package structure 3 can be applied to another image sensor module including a circuit board 5 1 A lens module 520 and the wafer size image sensing package structure are used. The circuit board 5 1 〇 surface is coupled with a controller 5 11 and at least one passive component 5 12 , the circuit board 5 10 having a window 5 13 . The lens module 520 is aligned with the window 5 13 and coupled to the circuit board 5 10 . The chip size image sensing package structure 300 is aligned with the window 513 and is coupled to the circuit board 510. The chip size image sensing package structure 300 includes the image sensing chip 310 and the bumps 320. And the photocurable transparent adhesive layer 330. The bumps 320 are bonded to the circuit layer 530 of the circuit board 510, and the photocurable transparent adhesive layer 330 is attached to the circuit board 510. The above is only a preferred embodiment of the present invention, and is not intended to limit the scope of the present invention. Although the present invention has been disclosed in the above preferred embodiments, it is not intended to limit the present invention. Any simple modifications, equivalent changes and modifications made without departing from the technical scope of the present invention are still within the technical scope of the present invention. [Simple description of the drawing] 10 200805588 Fig. 1 is a schematic cross-sectional view showing a conventional image sensing package structure. Figure 2 is a cross-sectional view showing a wafer size image sensing package structure according to a first embodiment of the present invention. Figure 3 is a cross-sectional view showing another wafer size image sensing package structure in accordance with a second embodiment of the present invention. Figure 4: A cross-sectional view of a second embodiment of the present invention in which a wafer size image sensing package structure is applied to an image sensor module. Figure 5 is a cross-sectional view showing another embodiment of an image sensor module in accordance with a second embodiment of the present invention. [Main component symbol description] 100 image sensing package structure 110 image sensing wafer 111 active surface 112 sensing area 113 pad 120 bump 130 glass substrate 131 via 132 ball pad 140 glow ball 150 barrier 160 sealant 170 gas Dense space 171 Dust particles 200 Wafer size image sensing package structure 210 Image sensing wafer 211 Active surface 212 Sensing area 213 Pad 214 Protective layer 215 Opening 220 Bump 230 B-stage photocurable transparent adhesive layer 240 Glass substrate 241 Circuit layer 242 through hole 11 200805588
243 球墊 250銲球 260 塵粒 300 晶片尺寸影像感測封裝構造 310 影像感測晶片 311 主動面 3 12感測區 313 銲墊 314 保護層 315 開口 320 凸塊 330 B階光固化透明膠層 410 電路板 411控制器 412 被動元件 420 玻璃基板 421線路層 510 電路板 5 11控制器 512 被動元件 513 窗孔 520鏡頭模組 530 線路層243 Ball pad 250 solder ball 260 Dust grain 300 Wafer size image sensing package structure 310 Image sensing wafer 311 Active surface 3 12 Sensing area 313 Pad 314 Protective layer 315 Opening 320 Bump 330 B-stage photocurable transparent adhesive layer 410 Circuit board 411 controller 412 passive component 420 glass substrate 421 circuit layer 510 circuit board 5 11 controller 512 passive component 513 aperture 520 lens module 530 circuit layer
1212