TW200802556A - Method and structure for implanting bonded structures for electrical conductivity - Google Patents

Method and structure for implanting bonded structures for electrical conductivity

Info

Publication number
TW200802556A
TW200802556A TW095144436A TW95144436A TW200802556A TW 200802556 A TW200802556 A TW 200802556A TW 095144436 A TW095144436 A TW 095144436A TW 95144436 A TW95144436 A TW 95144436A TW 200802556 A TW200802556 A TW 200802556A
Authority
TW
Taiwan
Prior art keywords
substrate
thickness
implanting
face region
electrical conductivity
Prior art date
Application number
TW095144436A
Other languages
Chinese (zh)
Other versions
TWI447785B (en
Inventor
Francois J Henley
Original Assignee
Silicon Genesis Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Priority claimed from US11/292,395 external-priority patent/US7399680B2/en
Application filed by Silicon Genesis Corp filed Critical Silicon Genesis Corp
Publication of TW200802556A publication Critical patent/TW200802556A/en
Application granted granted Critical
Publication of TWI447785B publication Critical patent/TWI447785B/en

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/26Bombardment with radiation
    • H01L21/263Bombardment with radiation with high-energy radiation
    • H01L21/265Bombardment with radiation with high-energy radiation producing ion implantation

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • High Energy & Nuclear Physics (AREA)
  • General Physics & Mathematics (AREA)
  • Toxicology (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Health & Medical Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Laminated Bodies (AREA)

Abstract

A partially completed multi-layered substrate, e.g. silicon on silicon. The substrate has a thickness of material from a first substrate. The thickness of material comprises a first face region. The substrate has a second substrate having a second face region. Preferably, the first face region of the thickness of material is joined to the second face region of the second substrate. The substrate has an interface region formed between the first face region of the thickness of material and the second face region of the second substrate. A plurality of particles are implanted within a portion of the thickness of the material and a portion of the interface region to electrically couple a portion of the thickness of the material to a portion of the second substrate.
TW095144436A 2005-11-30 2006-11-30 Method and structure for implanting bonded structures for electrical conductivity TWI447785B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US11/292,395 US7399680B2 (en) 2004-11-24 2005-11-30 Method and structure for implanting bonded substrates for electrical conductivity

Publications (2)

Publication Number Publication Date
TW200802556A true TW200802556A (en) 2008-01-01
TWI447785B TWI447785B (en) 2014-08-01

Family

ID=38214327

Family Applications (1)

Application Number Title Priority Date Filing Date
TW095144436A TWI447785B (en) 2005-11-30 2006-11-30 Method and structure for implanting bonded structures for electrical conductivity

Country Status (3)

Country Link
KR (1) KR100853580B1 (en)
CN (1) CN1992173B (en)
TW (1) TWI447785B (en)

Families Citing this family (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2934925B1 (en) * 2008-08-06 2011-02-25 Soitec Silicon On Insulator METHOD FOR MANUFACTURING A STRUCTURE COMPRISING A STEP OF ION IMPLANTATIONS TO STABILIZE THE BONDING INTERFACE.
KR101319252B1 (en) * 2012-03-06 2013-10-23 (주) 이피웍스 Method for forming a through silicon via

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5141887A (en) * 1990-07-02 1992-08-25 Motorola, Inc. Low voltage, deep junction device and method
US5841197A (en) * 1994-11-18 1998-11-24 Adamic, Jr.; Fred W. Inverted dielectric isolation process
US7052941B2 (en) * 2003-06-24 2006-05-30 Sang-Yun Lee Method for making a three-dimensional integrated circuit structure
US6162705A (en) * 1997-05-12 2000-12-19 Silicon Genesis Corporation Controlled cleavage process and resulting device using beta annealing
AU9296098A (en) * 1997-08-29 1999-03-16 Sharon N. Farrens In situ plasma wafer bonding method
EP1041624A1 (en) * 1999-04-02 2000-10-04 Interuniversitair Microelektronica Centrum Vzw Method of transferring ultra-thin substrates and application of the method to the manufacture of a multilayer thin film device
JP2004507084A (en) * 2000-08-16 2004-03-04 マサチューセッツ インスティテュート オブ テクノロジー Manufacturing process of semiconductor products using graded epitaxial growth
JP3510576B2 (en) * 2000-09-28 2004-03-29 Necエレクトロニクス株式会社 Semiconductor device and manufacturing method thereof
FR2845523B1 (en) * 2002-10-07 2005-10-28 METHOD FOR MAKING A SUBSTRATE BY TRANSFERRING A DONOR WAFER HAVING FOREIGN SPECIES, AND ASSOCIATED DONOR WAFER

Also Published As

Publication number Publication date
CN1992173B (en) 2010-04-21
CN1992173A (en) 2007-07-04
TWI447785B (en) 2014-08-01
KR20070057044A (en) 2007-06-04
KR100853580B1 (en) 2008-08-21

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